Repository: getinstachip/vpm Branch: main Commit: 03763cc40a23 Files: 27 Total size: 167.5 KB Directory structure: gitextract_f5njyyrd/ ├── .github/ │ └── workflows/ │ └── release.yml ├── .gitignore ├── CONTRIBUTING.md ├── Cargo.toml ├── LICENSE.md ├── README.md ├── install.sh ├── installer.iss └── src/ ├── cmd/ │ ├── cmd.rs │ ├── config.rs │ ├── docs.rs │ ├── dotf.rs │ ├── include.rs │ ├── install.rs │ ├── list.rs │ ├── load.rs │ ├── mod.rs │ ├── remove.rs │ ├── run.rs │ ├── sim.rs │ ├── synth.rs │ ├── update.rs │ └── upgrade.rs ├── config_man.rs ├── error.rs ├── main.rs └── toml.rs ================================================ FILE CONTENTS ================================================ ================================================ FILE: .github/workflows/release.yml ================================================ name: release on: push: workflow_dispatch: env: CARGO_INCREMENTAL: 0 permissions: contents: write jobs: release: name: ${{ matrix.target }} runs-on: ${{ matrix.os }} strategy: fail-fast: false matrix: include: - os: ubuntu-latest target: x86_64-unknown-linux-musl deb: true - os: ubuntu-latest target: arm-unknown-linux-musleabihf - os: ubuntu-latest target: armv7-unknown-linux-musleabihf deb: true - os: ubuntu-latest target: aarch64-unknown-linux-musl deb: true - os: ubuntu-latest target: i686-unknown-linux-musl deb: true - os: ubuntu-latest target: aarch64-linux-android - os: macos-latest target: x86_64-apple-darwin - os: macos-latest target: aarch64-apple-darwin - os: windows-latest target: x86_64-pc-windows-msvc - os: windows-latest target: i686-pc-windows-msvc - os: windows-latest target: aarch64-pc-windows-msvc steps: - name: Checkout repository uses: actions/checkout@v4 with: fetch-depth: 0 - name: Get version id: get_version uses: SebRollen/toml-action@v1.2.0 with: file: Cargo.toml field: package.version - name: Install Rust uses: actions-rs/toolchain@v1 with: toolchain: stable profile: minimal override: true target: ${{ matrix.target }} - name: Setup cache uses: Swatinem/rust-cache@v2.7.3 with: key: ${{ matrix.target }} - name: Install cross if: ${{ runner.os == 'Linux' }} uses: actions-rs/cargo@v1 with: command: install args: --color=always --git=https://github.com/cross-rs/cross.git --locked --rev=02bf930e0cb0c6f1beffece0788f3932ecb2c7eb --verbose cross - name: Build binary uses: actions-rs/cargo@v1 env: POSTHOG_API_KEY: ${{ secrets.POSTHOG_API_KEY }} DOCS_KEY: ${{ secrets.DOCS_KEY }} with: command: build args: --release --target=${{ matrix.target }} --color=always --verbose use-cross: ${{ runner.os == 'Linux' }} - name: Install cargo-deb if: ${{ matrix.deb == true }} uses: actions-rs/install@v0.1 with: crate: cargo-deb - name: Build deb if: ${{ matrix.deb == true }} uses: actions-rs/cargo@v1 with: command: deb args: --no-build --no-strip --output=. --target=${{ matrix.target }} - name: Package (*nix) if: ${{ runner.os != 'Windows' }} run: | tar -cv LICENSE README.md \ -C target/${{ matrix.target }}/release/ vpm | gzip --best > \ vpm-${{ steps.get_version.outputs.value }}-${{ matrix.target }}.tar.gz - name: Create variable files if: ${{ runner.os == 'Windows' }} run: | echo "${{ steps.get_version.outputs.value }}" > version.txt echo "${{ matrix.target }}" >> target.txt - name: Package (Windows) if: ${{ runner.os == 'Windows' }} uses: Minionguyjpro/Inno-Setup-Action@v1.2.4 with: path: installer.iss options: /O+ - name: Upload artifact uses: actions/upload-artifact@v4 with: name: ${{ matrix.target }} path: | *.deb *.tar.gz *.zip *.exe - name: Create release if: | github.ref == 'refs/heads/main' && startsWith(github.event.head_commit.message, 'chore(release)') uses: softprops/action-gh-release@v2 with: draft: true files: | *.deb *.tar.gz *.zip *.exe name: ${{ steps.get_version.outputs.value }} tag_name: '' ================================================ FILE: .gitignore ================================================ # Generated by Cargo # will have compiled files and executables debug/ target/ # Remove Cargo.lock from gitignore if creating an executable, leave it for libraries # More information here https://doc.rust-lang.org/cargo/guide/cargo-toml-vs-cargo-lock.html Cargo.lock # These are backup files generated by rustfmt **/*.rs.bk # MSVC Windows builds of rustc generate these, which store debugging information *.pdb # RustRover # JetBrains specific template is maintained in a separate JetBrains.gitignore that can # be found at https://github.com/github/gitignore/blob/main/Global/JetBrains.gitignore # and can be added to the global gitignore or merged into this file. For a more nuclear # option (not recommended) you can uncomment the following to ignore the entire idea folder. #.idea/ vpm_modules/ Vpm.toml vpm.toml vpm.lock .svlangserver/ .env .DS_Store .vscode/launch.json ================================================ FILE: CONTRIBUTING.md ================================================ # Contributing Guidelines First off, thank you for considering contributing to the Verilog Package Manager (VPM). It's people like you that make VPM such a great tool. Following these guidelines helps to communicate that you respect the time of the developers managing and developing this open source project. In return, they should reciprocate that respect in addressing your issue, assessing changes, and helping you finalize your pull requests. ## Getting started Anybody is welcome to contribute—we encourage anybody who is interested in this project to join the VPM discord. We'll discuss upcoming changes, user suggesions, and roadmaps. _For something that is bigger than a one or two line fix:_ 1. Create your own fork of the code 2. Do the changes in your fork (be sure to follow the code style of the project) 3. If you like the change and think the project could use it, send a pull request indicating that you have a CLA on file (for these larger fixes, try to include an update on the discord as well) _For small or "obvious" fixes..._ * Small contributions such as fixing spelling errors, where the content is small enough to not be considered intellectual property, can be submitted by a contributor as a patch **As a rule of thumb, changes are obvious fixes if they do not introduce any new functionality or creative thinking.** As long as the change does not affect functionality, some likely examples include the following: - Spelling / grammar fixes - Typo correction, white space and formatting changes - Comment clean up - Bug fixes that change default return values or error codes stored in constants - Adding logging messages or debugging output - Changes to ‘metadata’ files like Gemfile, .gitignore, build scripts, etc. - Moving source files from one directory or package to another ## How to report a bug **Security Disclosure** If you find a security vulnerability, do **NOT** open an issue. Email jag.maddipatla@gmail.com or sathvik.redrouthu@gmail.com instead. Any security issues should be submitted here directly. In order to determine whether you are dealing with a security issue, ask yourself these two questions: * Can I access something that's not mine, or something I shouldn't have access to? * Can I disable something for other people? If the answer to either of those two questions are "yes", then you're probably dealing with a security issue. Note that even if you answer "no" to both questions, you may still be dealing with a security issue, so if you're unsure, just email us. ## Code review process Once you submit a contribution, it will be signed off by either @Jag-M or @sathvikr prior to being implemented. Interested contributors should join our discord to get commit access. We also hold weekly triage meetings in a public google meet that all contributors/interested persons may join. Any community feedback will be implemented as soon as possible (usually within a couple of hours). ## Philosophy Our philosophy is to provide robust tooling to make chip design as intuitive as possible. If you find yourself wishing for a feature that doesn't exist in VPM, you are probably not alone. There are bound to be others out there with similar needs. Many of the features that VPM has today have been added because our users saw the need. Open an issue on our issues list on GitHub which describes the feature you would like to see, why you need it, and how it should work. ================================================ FILE: Cargo.toml ================================================ [package] description = "A powerful package manager for Verilog projects, streamlining IP core management and accelerating hardware design workflows" documentation = "https://github.com/getinstachip/vpm#readme" homepage = "https://getinstachip.com" repository = "https://github.com/getinstachip/vpm" name = "vpm" version = "0.2.18" edition = "2021" license = "MIT" copyright = "Copyright (c) 2024 Instachip" authors = ["Instachip "] [dependencies] clap = { version = "4.5.13", features = ["derive"] } tokio = { version = "1.39.2", features = ["full"] } openssl = { version = "0.10", features = ["vendored"] } reqwest = { version = "0.12.5", features = ["json", "blocking"] } serde = { version = "1.0.208", features = ["derive"] } tree-sitter-verilog = { git = "https://github.com/tree-sitter/tree-sitter-verilog" } tree-sitter = "0.20.6" anyhow = "1.0.86" serde_json = "1.0.125" walkdir = "2.5.0" once_cell = "1.19.0" tempfile = "3.12.0" cargo-lock = "9.0.0" fastrand = "2.1.1" fancy-regex = "0.13.0" dialoguer = "0.11.0" fuzzy-matcher = "0.3.7" indicatif = "0.17.8" which = "6.0.3" regex = "1.10.6" toml_edit = "0.22.20" imara-diff = "0.1.7" uuid = { version = "1.10.0", features = ["v7"] } directories = "5.0.1" ring = "0.17.8" base64 = "0.22.1" hex = "0.4.3" rand = "0.8.5" sha2 = "0.10.8" sys-info = "0.9.1" [build-dependencies] cc="*" ================================================ FILE: LICENSE.md ================================================ # MIT License Copyright (c) 2024 Instachip Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ================================================ FILE: README.md ================================================ # Verilog Package Manager (VPM) VPM is a powerful package manager for Verilog projects, currently being piloted at Stanford and UC Berkeley. It's designed to streamline the management, reuse, and communication of IP cores and dependencies in hardware design workflows, significantly accelerating your design process. ## Features - **Module Management**: Easily include, update, and remove modules in your project. - **Documentation Generation**: Automatically create comprehensive documentation for your Verilog modules. - **Dependency Handling**: Manage project dependencies with ease. - **Simulation Support**: Simulate your Verilog files directly through VPM. - **Tool Integration**: Seamlessly install and set up open-source tools for your project. - **File Generation**: Automatically generate necessary files like .f, .svh, .xcd, and .tcl. ## Installation VPM is designed for easy installation with no additional dependencies. ### Default Installation (Linux/MacOS): ```bash curl -f https://getinstachip.com/install.sh | sh ``` ### Default Installation (Windows): 1. Download the `.zip` file matching your Windows architecture from the [latest release page](https://github.com/getinstachip/vpm/releases/latest) 2. Extract and run the `.exe` file If installation doesn't work, try the following: ### Linux alternative: We support Snap ```bash snap download instachip-vpm alias vpm='instachip-vpm.vpm' ``` ### MacOS alternative: ```bash brew tap getinstachip/vpm brew install vpm ``` After installation, the vpm command will be available in any terminal. ## Commands - `vpm include `: Include any module from a repo (and all its submodules). - `vpm docs `: Generate documentation for any module (highlighting bugs and edge cases) - `vpm install `: Auto-integrate an open-source tool without manual setup - `vpm update `: Update module to the latest version - `vpm remove `: Remove a module from your project - `vpm list`: List all modules in our standard library - `vpm dotf `: Generate a `.f` filelist when exporting your project - `vpm sim `: Simulate Verilog module using iVerilog ### vpm include Include a module or repository in your project. This command: - Downloads the specified module or repository - Analyzes the module hierarchy - Includes all necessary submodules and generates appropriate header files - Updates the vpm.toml file with new module details This command comes in two forms: 1. Include a module and all its submodules: ```bash vpm include ``` `URL_TO_TOP_MODULE`: Full GitHub URL to the top module to include. The URL should come in the format of `https://github.com///blob/branch/`. Example: ```bash vpm include https://github.com/ZipCPU/zipcpu/blob/master/rtl/core/prefetch.v ``` ![](https://i.giphy.com/media/v1.Y2lkPTc5MGI3NjExY3Jmbmw0NWlva3F2bHdyY2h0NGZwNGlvNXRjZTY2bXB4ODRzOXd6eiZlcD12MV9pbnRlcm5hbF9naWZfYnlfaWQmY3Q9Zw/KwHCr2ifmIZzSkpfjv/giphy.gif) 2. Include a repository: ```bash vpm include --repo ``` Press tab to select multiple modules and press ENTER to install. If no modules are selected, all modules in the repository will be installed. Example: ```bash vpm include --repo ZipCPU/zipcpu ``` ![](https://i.giphy.com/media/v1.Y2lkPTc5MGI3NjExMG5uaHJ1N2twd2JiY2pucjlwbjNjNm02NjRycDlocDF5bnB2eHNvYiZlcD12MV9pbnRlcm5hbF9naWZfYnlfaWQmY3Q9Zw/QJ2sIDYIftEgu5uNAg/giphy.gif) ### vpm docs Generate comprehensive documentation for a module. This command generates a Markdown README file containing: - Overview and module description - Pinout diagram - Table of ports - Table of parameters - Important implementation details - Simulation output and GTKWave waveform details (Coming soon!) - List of any major bugs or caveats if they exist ```bash vpm docs ``` ``: Name of the module to generate documentation for. Include the file extension. `[URL]`: Optional URL of the repository to generate documentation for. If not specified, VPM will assume the module is local, and will search for the module in the vpm_modules directory. Examples: ```bash vpm docs pfcache.v vpm docs pfcache.v https://github.com/ZipCPU/zipcpu ``` ![](https://i.giphy.com/media/v1.Y2lkPTc5MGI3NjExOXc5NWpmYnV5eGxtYzRud2tid3poYTZyYXEwdmpqaGF3MjZwdW5leiZlcD12MV9pbnRlcm5hbF9naWZfYnlfaWQmY3Q9Zw/C8nFHwNq0qBpXRF9pP/giphy.gif) ### vpm update Update a package to the latest version. This command: - Checks for the latest version of the specified module - Downloads and replaces the current version with the latest - Updates all dependencies and submodules - Modifies the vpm.toml file to reflect the changes ```bash vpm update ``` ``: Full module path of the package to update Example: ```bash vpm update my_project/modules/counter ``` ### vpm remove Remove a package from your project. This command: - Removes the specified module from your project - Updates the vpm.toml file to remove the module entry - Cleans up any orphaned dependencies ```bash vpm remove ``` ``: Full module path of the package to remove Example: ```bash vpm remove my_project/modules/unused_module ``` ### vpm dotf Generate a .f file list for a Verilog or SystemVerilog module. ```bash vpm dotf ``` ``: Path to the top module to generate the file list for. File should be local. Example: ```bash vpm dotf ./vpm_modules/pfcache/fwb_master.v ``` ![](https://i.giphy.com/media/v1.Y2lkPTc5MGI3NjExMHhkdjQ1bnl0cTA3cW1lOHVuNjkxaW1ydzFndXNnaDZlMHFiMWRpNSZlcD12MV9pbnRlcm5hbF9naWZfYnlfaWQmY3Q9Zw/mafBT4PURloV52oLFP/giphy.gif) This command: - Analyzes the specified top module - Identifies all submodules and dependencies - Generates a .f file containing all necessary file paths - Includes all locally scoped defines for submodules ### vpm install Install and set up an open-source tool for integration into your project. This command: - Downloads the specified tool - Configures the tool for your system - Integrates it with your VPM project setup ```bash vpm install ``` ``: Name of the tool to install Example: ```bash vpm install verilator ``` ![](https://i.giphy.com/media/v1.Y2lkPTc5MGI3NjExNjFhc2t1ZTBwM29xdm10dThubWN3ZGhvOWhjeXJjNnQ0dWVqd2szdSZlcD12MV9pbnRlcm5hbF9naWZfYnlfaWQmY3Q9Zw/737P65RSHVlu2dxXVu/giphy.gif) Currently supported tools: - Verilator - Chipyard - OpenROAD - Edalize - Icarus Verilog Coming soon: - Yosys (with support for ABC) - RISC-V GNU Toolchain ### vpm sim Simulate Verilog files. This command: - Compiles the specified Verilog files - Runs the simulation - Provides output and analysis of the simulation results ```bash vpm sim ... ``` ``: List of Verilog files to simulate using Icarus Verilog. Example: ```bash vpm sim testbench.v module1.v module2.v ``` ![](https://i.giphy.com/media/v1.Y2lkPTc5MGI3NjExcnhiaDNwZmRhazVlODAxanlqaW1yaXdpazVmNTVwanJ4c2V3a3RscSZlcD12MV9pbnRlcm5hbF9naWZfYnlfaWQmY3Q9Zw/6ImXOh4OVsjrWYrikf/giphy.gif) ### vpm list List all modules in VPM's standard library. This command displays all available modules in the standard Verilog library, including: - Common modules - RISC-V modules ```bash vpm list ``` ### vpm config Configure VPM settings. This command allows you to enable or disable anonymous usage data collection. ```bash vpm config