[ { "path": ".gitattributes", "content": "# Auto detect text files and perform LF normalization\n* text=auto\n" }, { "path": "README.md", "content": "### UCSD CSE 240D Fall '19\n\n# Hierarchical Mesh NoC - Eyeriss v2\n## A SystemVerilog implementation of Row-Stationary dataflow based on Eyeriss and Hierarchical Mesh NoC based on the [Eyeriss v2 CNN accelerator](https://arxiv.org/abs/1807.07928).\n\nThis repository contains the SystemVerilog source code developed as part of the final project for the course \"Accelerator Design for Deep Learning\" at UCSD. Eyeriss is a popular CNN accelerator that showcased dataflow-based architectures using systolic arrays. The project implemented is inspired by the RS dataflow from the original Eyeriss paper and the Hierarchical Mesh NoC Architecture from the follow-up paper Eyeriss v2. \n\n![Image of top-level Architecture](https://github.com/karthisugumar/CSE240D-Hierarchical_Mesh_NoC-Eyeriss_v2/blob/master/images/Eyeriss_scaled_down_top.PNG)\n\n### Prerequisites\n#### Simulation requires a Verilog/SystemVerilog syntheis software package. Xilinx's Vivado Suite is recommended (available for free at the [Xilinx downloads webpage](https://www.xilinx.com/support/download.html))\n\n### File structure\n\n- **images/** - Figures used in report\n \n- **synth/** - synthesis folder\n - *.xdc* file to specify timing constraints - clock period, waveform shape (can also be used to include jitter, uncertainty, false paths etc for more accurate STA)\n - *.vds* files contain synthesis log\n - *.rpt* files contain area utlization report\n \n- **rtl/** - Contains SystemVerilog models of all components designed\n - **misc/** - combinational logic blocks for miscellaneous tasks\n - **phase_1/** - Focus on demonstration of a convolution operation through a single grouped cluster of PEs, routers and GLBs\n - **phase_2/** - Scaled-up design with 4 grouped clusters. Has new routers with provisions for direction control and configuration\n - **phase_3/** - Exploration of router design for data reuse opportunities - Unicast, Multicast, Broadcast\n \n- **synth/** - constraints and reports directory - synthesis results containing top level and clusterized reports for timing and area utilization\n\n- **testbench/** - Contains all testbenches, verification code, and experiments. \n - **phase_1/, phase_2/, phase_3/** - Contains testbenches specific to each design phase\n \n- **waveforms/** - directory containing simulation output graphs\n - *4_Convs.PNG* - parallel convolution output of 4 PE clusters\n - *conv_3x3.PNG* - convolution with 3x3 kernel size\n - *conv_5x5.PNG* - convolution with 5x5 kernel size\n - *conv_out.PNG* - phase_1 convolution output\n" }, { "path": "rtl/FA.sv", "content": "`timescale 1ns / 1ps\n//////////////////////////////////////////////////////////////////////////////////\n// Company: \n// Engineer: \n// \n// Create Date: 11/27/2019 07:43:21 AM\n// Design Name: \n// Module Name: FA\n// Project Name: \n// Target Devices: \n// Tool Versions: \n// Description: \n// \n// Dependencies: \n// \n// Revision:\n// Revision 0.01 - File Created\n// Additional Comments:\n// \n//////////////////////////////////////////////////////////////////////////////////\n\n\nmodule FA( input A_in,\n\t\t\tinput B_in,\n\t\t\tinput C_in,\n\t\t\toutput logic S_out,\n\t\t\toutput logic C_out\n );\n\t\n\tassign {C_out, S_out} = A_in + B_in + C_in;\n\t\nendmodule\n" }, { "path": "rtl/GLB_cluster.sv", "content": "`timescale 1ns / 1ps\n//////////////////////////////////////////////////////////////////////////////////\n// Company: \n// Engineer: \n// \n// Create Date: 12/01/2019 01:18:56 PM\n// Design Name: \n// Module Name: GLB_cluster\n// Project Name: \n// Target Devices: \n// Tool Versions: \n// Description: \n// \n// Dependencies: \n// \n// Revision:\n// Revision 0.01 - File Created\n// Additional Comments:\n// \n//////////////////////////////////////////////////////////////////////////////////\n\n\nmodule GLB_cluster \n\t\t\t#( \n\t\t\tparameter DATA_BITWIDTH = 16,\n\t\t\tparameter ADDR_BITWIDTH = 10,\n\t\t\tparameter NUM_GLB_IACT = 1,\n\t\t\tparameter NUM_GLB_PSUM = 1,\n\t\t\tparameter NUM_GLB_WGHT = 1\n\t\t\t)\n\t\t ( input clk,\n\t\t\t input reset,\n\t\t\t \n\t\t\t input read_req_iact, \n\t\t\t input read_req_psum,\n\t\t\t input read_req_wght,\n\t\t\t \n\t\t\t input write_en_iact, \n\t\t\t input write_en_psum,\n\t\t\t input write_en_wght,\n\t\t\t \n\t\t\t input [ADDR_BITWIDTH-1 : 0] r_addr_iact,\n\t\t\t input [ADDR_BITWIDTH-1 : 0] r_addr_psum,\n\t\t\t input [ADDR_BITWIDTH-1 : 0] r_addr_wght,\n\t\t\t \n\t\t\t input [ADDR_BITWIDTH-1 : 0] w_addr_iact,\n\t\t\t input [ADDR_BITWIDTH-1 : 0] w_addr_psum,\n\t\t\t input [ADDR_BITWIDTH-1 : 0] w_addr_wght,\n\t\t\t \n\t\t\t input [DATA_BITWIDTH-1 : 0] w_data_iact,\n\t\t\t input [DATA_BITWIDTH-1 : 0] w_data_psum,\n\t\t\t input [DATA_BITWIDTH-1 : 0] w_data_wght,\n\t\t\t \n\t\t\t output logic [DATA_BITWIDTH-1 : 0] r_data_iact,\n\t\t\t output logic [DATA_BITWIDTH-1 : 0] r_data_psum,\n\t\t\t output logic [DATA_BITWIDTH-1 : 0] r_data_wght\n\t\t\t);\n\t\t\t\n\t\t\t//Instantiate iact global buffer\n\t\t\tgenerate\n\t\t\tgenvar i;\n\t\t\tfor(i=0; i BUFGCE: 1 instances\n DSP48E2 => DSP48E2 (DSP_ALU, DSP_A_B_DATA, DSP_C_DATA, DSP_MULTIPLIER, DSP_M_DATA, DSP_OUTPUT, DSP_PREADD_DATA, DSP_PREADD): 12 instances\n IBUF => IBUF (IBUFCTRL, INBUF): 70 instances\n RAM64M8 => RAM64M8 (RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E): 240 instances\n RAM64X1D => RAM64X1D (RAMD64E, RAMD64E): 240 instances\n\nINFO: [Common 17-83] Releasing license: Synthesis\n265 Infos, 170 Warnings, 0 Critical Warnings and 0 Errors encountered.\nsynth_design completed successfully\nsynth_design: Time (s): cpu = 00:00:56 ; elapsed = 00:01:09 . Memory (MB): peak = 2134.805 ; gain = 1853.051\nNetlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.003 . Memory (MB): peak = 2134.805 ; gain = 0.000\nWARNING: [Constraints 18-5210] No constraints selected for write.\nResolution: This message can indicate that there are no constraints for the design, or it can indicate that the used_in flags are set such that the constraints are ignored. This later case is used when running synth_design to not write synthesis constraints to the resulting checkpoint. Instead, project constraints are read when the synthesized design is opened.\nINFO: [Common 17-1381] The checkpoint 'D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.runs/synth_1/HMNoC_cluster.dcp' has been generated.\nINFO: [runtcl-4] Executing : report_utilization -file HMNoC_cluster_utilization_synth.rpt -pb HMNoC_cluster_utilization_synth.pb\nINFO: [Common 17-206] Exiting Vivado at Fri Dec 13 10:49:32 2019...\n" }, { "path": "synth/HMNoC_cluster_utilization_synth.rpt", "content": "Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.\n---------------------------------------------------------------------------------------------------------------------\n| Tool Version : Vivado v.2018.3 (win64) Build 2405991 Thu Dec 6 23:38:27 MST 2018\n| Date : Fri Dec 13 10:49:32 2019\n| Host : Karthi running 64-bit major release (build 9200)\n| Command : report_utilization -file HMNoC_cluster_utilization_synth.rpt -pb HMNoC_cluster_utilization_synth.pb\n| Design : HMNoC_cluster\n| Device : xczu7evffvf1517-1LV\n| Design State : Synthesized\n---------------------------------------------------------------------------------------------------------------------\n\nUtilization Design Information\n\nTable of Contents\n-----------------\n1. CLB Logic\n1.1 Summary of Registers by Type\n2. BLOCKRAM\n3. ARITHMETIC\n4. I/O\n5. CLOCK\n6. ADVANCED\n7. CONFIGURATION\n8. Primitives\n9. Black Boxes\n10. Instantiated Netlists\n\n1. CLB Logic\n------------\n\n+----------------------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------------------+------+-------+-----------+-------+\n| CLB LUTs* | 4196 | 0 | 230400 | 1.82 |\n| LUT as Logic | 1796 | 0 | 230400 | 0.78 |\n| LUT as Memory | 2400 | 0 | 101760 | 2.36 |\n| LUT as Distributed RAM | 2400 | 0 | | |\n| LUT as Shift Register | 0 | 0 | | |\n| CLB Registers | 817 | 0 | 460800 | 0.18 |\n| Register as Flip Flop | 817 | 0 | 460800 | 0.18 |\n| Register as Latch | 0 | 0 | 460800 | 0.00 |\n| CARRY8 | 0 | 0 | 28800 | 0.00 |\n| F7 Muxes | 132 | 0 | 115200 | 0.11 |\n| F8 Muxes | 21 | 0 | 57600 | 0.04 |\n| F9 Muxes | 0 | 0 | 28800 | 0.00 |\n+----------------------------+------+-------+-----------+-------+\n* Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count.\n\n\n1.1 Summary of Registers by Type\n--------------------------------\n\n+-------+--------------+-------------+--------------+\n| Total | Clock Enable | Synchronous | Asynchronous |\n+-------+--------------+-------------+--------------+\n| 0 | _ | - | - |\n| 0 | _ | - | Set |\n| 0 | _ | - | Reset |\n| 0 | _ | Set | - |\n| 0 | _ | Reset | - |\n| 0 | Yes | - | - |\n| 0 | Yes | - | Set |\n| 0 | Yes | - | Reset |\n| 24 | Yes | Set | - |\n| 793 | Yes | Reset | - |\n+-------+--------------+-------------+--------------+\n\n\n2. BLOCKRAM\n-----------\n\n+----------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------+------+-------+-----------+-------+\n| Block RAM Tile | 0 | 0 | 312 | 0.00 |\n| RAMB36/FIFO* | 0 | 0 | 312 | 0.00 |\n| RAMB18 | 0 | 0 | 624 | 0.00 |\n| URAM | 0 | 0 | 96 | 0.00 |\n+----------------+------+-------+-----------+-------+\n* Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E2 or one FIFO18E2. However, if a FIFO18E2 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E2\n\n\n3. ARITHMETIC\n-------------\n\n+----------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------+------+-------+-----------+-------+\n| DSPs | 12 | 0 | 1728 | 0.69 |\n| DSP48E2 only | 12 | | | |\n+----------------+------+-------+-----------+-------+\n\n\n4. I/O\n------\n\n+------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+------------+------+-------+-----------+-------+\n| Bonded IOB | 87 | 0 | 464 | 18.75 |\n+------------+------+-------+-----------+-------+\n\n\n5. CLOCK\n--------\n\n+----------------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------------+------+-------+-----------+-------+\n| GLOBAL CLOCK BUFFERs | 1 | 0 | 544 | 0.18 |\n| BUFGCE | 1 | 0 | 208 | 0.48 |\n| BUFGCE_DIV | 0 | 0 | 32 | 0.00 |\n| BUFG_GT | 0 | 0 | 144 | 0.00 |\n| BUFG_PS | 0 | 0 | 96 | 0.00 |\n| BUFGCTRL* | 0 | 0 | 64 | 0.00 |\n| PLL | 0 | 0 | 16 | 0.00 |\n| MMCM | 0 | 0 | 8 | 0.00 |\n+----------------------+------+-------+-----------+-------+\n* Note: Each used BUFGCTRL counts as two global buffer resources. This table does not include global clocking resources, only buffer cell usage. See the Clock Utilization Report (report_clock_utilization) for detailed accounting of global clocking resource availability.\n\n\n6. ADVANCED\n-----------\n\n+-----------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+-----------------+------+-------+-----------+-------+\n| GTHE4_CHANNEL | 0 | 0 | 24 | 0.00 |\n| GTHE4_COMMON | 0 | 0 | 6 | 0.00 |\n| OBUFDS_GTE4 | 0 | 0 | 12 | 0.00 |\n| OBUFDS_GTE4_ADV | 0 | 0 | 12 | 0.00 |\n| PCIE40E4 | 0 | 0 | 2 | 0.00 |\n| PS8 | 0 | 0 | 1 | 0.00 |\n| SYSMONE4 | 0 | 0 | 1 | 0.00 |\n| VCU | 0 | 0 | 1 | 0.00 |\n+-----------------+------+-------+-----------+-------+\n\n\n7. CONFIGURATION\n----------------\n\n+-------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+-------------+------+-------+-----------+-------+\n| BSCANE2 | 0 | 0 | 4 | 0.00 |\n| DNA_PORTE2 | 0 | 0 | 1 | 0.00 |\n| EFUSE_USR | 0 | 0 | 1 | 0.00 |\n| FRAME_ECCE4 | 0 | 0 | 1 | 0.00 |\n| ICAPE3 | 0 | 0 | 2 | 0.00 |\n| MASTER_JTAG | 0 | 0 | 1 | 0.00 |\n| STARTUPE3 | 0 | 0 | 1 | 0.00 |\n+-------------+------+-------+-----------+-------+\n\n\n8. Primitives\n-------------\n\n+----------+------+---------------------+\n| Ref Name | Used | Functional Category |\n+----------+------+---------------------+\n| RAMD64E | 2400 | CLB |\n| LUT6 | 1088 | CLB |\n| FDRE | 793 | Register |\n| LUT5 | 258 | CLB |\n| LUT4 | 256 | CLB |\n| LUT1 | 174 | CLB |\n| LUT3 | 138 | CLB |\n| LUT2 | 134 | CLB |\n| MUXF7 | 132 | CLB |\n| INBUF | 70 | I/O |\n| IBUFCTRL | 70 | Others |\n| FDSE | 24 | Register |\n| MUXF8 | 21 | CLB |\n| OBUF | 17 | I/O |\n| DSP48E2 | 12 | Arithmetic |\n| BUFGCE | 1 | Clock |\n+----------+------+---------------------+\n\n\n9. Black Boxes\n--------------\n\n+----------+------+\n| Ref Name | Used |\n+----------+------+\n\n\n10. Instantiated Netlists\n-------------------------\n\n+----------+------+\n| Ref Name | Used |\n+----------+------+\n\n\n" }, { "path": "synth/HMNoC_top.vds", "content": "#-----------------------------------------------------------\n# Vivado v2018.3 (64-bit)\n# SW Build 2405991 on Thu Dec 6 23:38:27 MST 2018\n# IP Build 2404404 on Fri Dec 7 01:43:56 MST 2018\n# Start of session at: Fri Dec 13 11:06:45 2019\n# Process ID: 21196\n# Current directory: D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.runs/synth_1\n# Command line: vivado.exe -log HMNoC_top.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source HMNoC_top.tcl\n# Log file: D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.runs/synth_1/HMNoC_top.vds\n# Journal file: D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.runs/synth_1\\vivado.jou\n#-----------------------------------------------------------\nsource HMNoC_top.tcl -notrace\nCommand: synth_design -top HMNoC_top -part xczu7ev-ffvf1517-1LV-i\nStarting synth_design\nAttempting to get a license for feature 'Synthesis' and/or device 'xczu7ev'\nINFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xczu7ev'\nINFO: Launching helper process for spawning children vivado processes\nINFO: Helper process launched with PID 21496 \n---------------------------------------------------------------------------------\nStarting RTL Elaboration : Time (s): cpu = 00:00:02 ; elapsed = 00:00:02 . Memory (MB): peak = 362.484 ; gain = 101.301\n---------------------------------------------------------------------------------\nINFO: [Synth 8-6157] synthesizing module 'HMNoC_top' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 10 - type: integer \n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter NUM_GLB_IACT bound to: 1 - type: integer \n\tParameter NUM_GLB_PSUM bound to: 1 - type: integer \n\tParameter NUM_GLB_WGHT bound to: 1 - type: integer \n\tParameter ADDR_BITWIDTH_GLB bound to: 10 - type: integer \n\tParameter ADDR_BITWIDTH_SPAD bound to: 9 - type: integer \n\tParameter NUM_ROUTER_PSUM bound to: 1 - type: integer \n\tParameter NUM_ROUTER_IACT bound to: 1 - type: integer \n\tParameter NUM_ROUTER_WGHT bound to: 1 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \n\tParameter X_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter Y_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter W_READ_ADDR bound to: 0 - type: integer \n\tParameter A_READ_ADDR bound to: 0 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 0 - type: integer \n\tParameter PSUM_READ_ADDR bound to: 0 - type: integer \n\tParameter PSUM_LOAD_ADDR bound to: 0 - type: integer \nINFO: [Synth 8-6157] synthesizing module 'HMNoC_cluster_west' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 10 - type: integer \n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter NUM_GLB_IACT bound to: 1 - type: integer \n\tParameter NUM_GLB_PSUM bound to: 1 - type: integer \n\tParameter NUM_GLB_WGHT bound to: 1 - type: integer \n\tParameter ADDR_BITWIDTH_GLB bound to: 10 - type: integer \n\tParameter ADDR_BITWIDTH_SPAD bound to: 9 - type: integer \n\tParameter NUM_ROUTER_PSUM bound to: 1 - type: integer \n\tParameter NUM_ROUTER_IACT bound to: 1 - type: integer \n\tParameter NUM_ROUTER_WGHT bound to: 1 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \n\tParameter X_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter Y_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter W_READ_ADDR bound to: 0 - type: integer \n\tParameter A_READ_ADDR bound to: 0 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 0 - type: integer \n\tParameter PSUM_READ_ADDR bound to: 0 - type: integer \n\tParameter PSUM_LOAD_ADDR bound to: 0 - type: integer \nINFO: [Synth 8-6157] synthesizing module 'GLB_cluster' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/GLB_cluster.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 10 - type: integer \n\tParameter NUM_GLB_IACT bound to: 1 - type: integer \n\tParameter NUM_GLB_PSUM bound to: 1 - type: integer \n\tParameter NUM_GLB_WGHT bound to: 1 - type: integer \nINFO: [Synth 8-6157] synthesizing module 'glb_iact' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 10 - type: integer \nINFO: [Synth 8-6155] done synthesizing module 'glb_iact' (1#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'glb_psum' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_psum.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 10 - type: integer \nINFO: [Synth 8-6155] done synthesizing module 'glb_psum' (2#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_psum.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'glb_weight' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 10 - type: integer \nINFO: [Synth 8-6155] done synthesizing module 'glb_weight' (3#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:23]\nINFO: [Synth 8-6155] done synthesizing module 'GLB_cluster' (4#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/GLB_cluster.sv:23]\nWARNING: [Synth 8-6104] Input port 'west_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:253]\nWARNING: [Synth 8-6104] Input port 'west_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:255]\nINFO: [Synth 8-6157] synthesizing module 'router_cluster' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router_cluster.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \nINFO: [Synth 8-6157] synthesizing module 'router' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:22]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \nINFO: [Synth 8-294] found qualifier unique on case statement: implementing as parallel_case [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nINFO: [Synth 8-6155] done synthesizing module 'router' (5#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:22]\nINFO: [Synth 8-6155] done synthesizing module 'router_cluster' (6#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router_cluster.sv:23]\nWARNING: [Synth 8-6104] Input port 'filt_in' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:316]\nWARNING: [Synth 8-6104] Input port 'act_in' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:360]\nWARNING: [Synth 8-6104] Input port 'w_data_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:405]\nWARNING: [Synth 8-6104] Input port 'write_en_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:406]\nINFO: [Synth 8-6157] synthesizing module 'PE_cluster' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE_cluster.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter X_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter Y_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \n\tParameter W_READ_ADDR bound to: 0 - type: integer \n\tParameter A_READ_ADDR bound to: 100 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \nINFO: [Synth 8-6157] synthesizing module 'PE' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 0 - type: integer \n\tParameter A_READ_ADDR bound to: 100 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-6157] synthesizing module 'SPad' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/SPad.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 9 - type: integer \nINFO: [Synth 8-6155] done synthesizing module 'SPad' (7#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/SPad.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'MAC' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/MAC.sv:23]\n\tParameter IN_BITWIDTH bound to: 16 - type: integer \n\tParameter OUT_BITWIDTH bound to: 16 - type: integer \nWARNING: [Synth 8-6014] Unused sequential element mult_out_reg was removed. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/MAC.sv:36]\nINFO: [Synth 8-6155] done synthesizing module 'MAC' (8#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/MAC.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'mux2' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/mux2.sv:23]\n\tParameter WIDTH bound to: 16 - type: integer \nINFO: [Synth 8-6155] done synthesizing module 'mux2' (9#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/mux2.sv:23]\nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized0' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 3 - type: integer \n\tParameter A_READ_ADDR bound to: 105 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized0' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized1' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 6 - type: integer \n\tParameter A_READ_ADDR bound to: 110 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized1' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized2' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 0 - type: integer \n\tParameter A_READ_ADDR bound to: 101 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized2' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized3' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 3 - type: integer \n\tParameter A_READ_ADDR bound to: 106 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized3' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized4' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 6 - type: integer \n\tParameter A_READ_ADDR bound to: 111 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized4' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized5' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 0 - type: integer \n\tParameter A_READ_ADDR bound to: 102 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized5' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized6' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 3 - type: integer \n\tParameter A_READ_ADDR bound to: 107 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized6' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6157] synthesizing module 'PE__parameterized7' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter W_READ_ADDR bound to: 6 - type: integer \n\tParameter A_READ_ADDR bound to: 112 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 100 - type: integer \n\tParameter PSUM_ADDR bound to: 500 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \nINFO: [Synth 8-155] case statement is not full and has no default [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:120]\nINFO: [Synth 8-6155] done synthesizing module 'PE__parameterized7' (10#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:23]\nINFO: [Synth 8-6155] done synthesizing module 'PE_cluster' (11#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE_cluster.sv:23]\nWARNING: [Synth 8-3848] Net west_data_o_psum in module/entity HMNoC_cluster_west does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:213]\nWARNING: [Synth 8-3848] Net west_enable_o_psum in module/entity HMNoC_cluster_west does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:214]\nINFO: [Synth 8-6155] done synthesizing module 'HMNoC_cluster_west' (12#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:23]\nWARNING: [Synth 8-6104] Input port 'north_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:177]\nWARNING: [Synth 8-6104] Input port 'north_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:178]\nWARNING: [Synth 8-6104] Input port 'west_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:197]\nWARNING: [Synth 8-6104] Input port 'west_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:198]\nWARNING: [Synth 8-6104] Input port 'north_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:221]\nWARNING: [Synth 8-6104] Input port 'north_enable_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:222]\nWARNING: [Synth 8-6104] Input port 'west_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:241]\nWARNING: [Synth 8-6104] Input port 'west_enable_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:242]\nWARNING: [Synth 8-6104] Input port 'north_data_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:266]\nWARNING: [Synth 8-6104] Input port 'north_enable_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:267]\nWARNING: [Synth 8-6104] Input port 'west_data_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:286]\nWARNING: [Synth 8-6104] Input port 'west_enable_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:287]\nWARNING: [Synth 8-6104] Input port 'south_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:364]\nWARNING: [Synth 8-6104] Input port 'south_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:365]\nWARNING: [Synth 8-6104] Input port 'west_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:394]\nWARNING: [Synth 8-6104] Input port 'west_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:395]\nWARNING: [Synth 8-6104] Input port 'south_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:408]\nWARNING: [Synth 8-6104] Input port 'south_enable_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:409]\nWARNING: [Synth 8-6104] Input port 'south_data_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:453]\nWARNING: [Synth 8-6104] Input port 'south_enable_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:454]\nWARNING: [Synth 8-6104] Input port 'west_data_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:483]\nWARNING: [Synth 8-6104] Input port 'west_enable_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:484]\nINFO: [Synth 8-6157] synthesizing module 'HMNoC_cluster_east' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:23]\n\tParameter DATA_BITWIDTH bound to: 16 - type: integer \n\tParameter ADDR_BITWIDTH bound to: 10 - type: integer \n\tParameter DATA_WIDTH bound to: 16 - type: integer \n\tParameter ADDR_WIDTH bound to: 9 - type: integer \n\tParameter NUM_GLB_IACT bound to: 1 - type: integer \n\tParameter NUM_GLB_PSUM bound to: 1 - type: integer \n\tParameter NUM_GLB_WGHT bound to: 1 - type: integer \n\tParameter ADDR_BITWIDTH_GLB bound to: 10 - type: integer \n\tParameter ADDR_BITWIDTH_SPAD bound to: 9 - type: integer \n\tParameter NUM_ROUTER_PSUM bound to: 1 - type: integer \n\tParameter NUM_ROUTER_IACT bound to: 1 - type: integer \n\tParameter NUM_ROUTER_WGHT bound to: 1 - type: integer \n\tParameter kernel_size bound to: 32'sb00000000000000000000000000000011 \n\tParameter act_size bound to: 32'sb00000000000000000000000000000101 \n\tParameter X_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter Y_dim bound to: 32'sb00000000000000000000000000000011 \n\tParameter W_READ_ADDR bound to: 0 - type: integer \n\tParameter A_READ_ADDR bound to: 0 - type: integer \n\tParameter W_LOAD_ADDR bound to: 0 - type: integer \n\tParameter A_LOAD_ADDR bound to: 0 - type: integer \n\tParameter PSUM_READ_ADDR bound to: 0 - type: integer \n\tParameter PSUM_LOAD_ADDR bound to: 0 - type: integer \nWARNING: [Synth 8-6104] Input port 'east_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:253]\nWARNING: [Synth 8-6104] Input port 'east_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:255]\nWARNING: [Synth 8-689] width (1) of port connection 'west_data_o_wght' does not match port width (16) of module 'router_cluster' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:316]\nWARNING: [Synth 8-689] width (1) of port connection 'east_data_o_wght' does not match port width (16) of module 'router_cluster' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:326]\nWARNING: [Synth 8-6104] Input port 'act_in' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:370]\nWARNING: [Synth 8-6104] Input port 'w_data_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:415]\nWARNING: [Synth 8-6104] Input port 'write_en_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:416]\nWARNING: [Synth 8-3848] Net east_data_o_psum in module/entity HMNoC_cluster_east does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:222]\nWARNING: [Synth 8-3848] Net east_enable_o_psum in module/entity HMNoC_cluster_east does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:223]\nINFO: [Synth 8-6155] done synthesizing module 'HMNoC_cluster_east' (13#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:23]\nWARNING: [Synth 8-6104] Input port 'north_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:570]\nWARNING: [Synth 8-6104] Input port 'north_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:571]\nWARNING: [Synth 8-6104] Input port 'east_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:580]\nWARNING: [Synth 8-6104] Input port 'east_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:581]\nWARNING: [Synth 8-6104] Input port 'north_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:614]\nWARNING: [Synth 8-6104] Input port 'north_enable_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:615]\nWARNING: [Synth 8-6104] Input port 'east_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:624]\nWARNING: [Synth 8-6104] Input port 'east_enable_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:625]\nWARNING: [Synth 8-6104] Input port 'east_data_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:669]\nWARNING: [Synth 8-6104] Input port 'east_enable_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:670]\nWARNING: [Synth 8-6104] Input port 'south_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:755]\nWARNING: [Synth 8-6104] Input port 'south_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:756]\nWARNING: [Synth 8-6104] Input port 'east_data_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:775]\nWARNING: [Synth 8-6104] Input port 'east_enable_i_wght' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:776]\nWARNING: [Synth 8-6104] Input port 'south_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:799]\nWARNING: [Synth 8-6104] Input port 'south_enable_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:800]\nWARNING: [Synth 8-6104] Input port 'east_data_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:819]\nWARNING: [Synth 8-6104] Input port 'east_enable_i_iact' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:820]\nWARNING: [Synth 8-6104] Input port 'south_data_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:844]\nWARNING: [Synth 8-6104] Input port 'south_enable_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:845]\nWARNING: [Synth 8-6104] Input port 'east_data_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:864]\nWARNING: [Synth 8-6104] Input port 'east_enable_i_psum' has an internal driver [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:865]\nWARNING: [Synth 8-3848] Net west_enable_i_wght in module/entity HMNoC_top does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:184]\nWARNING: [Synth 8-3848] Net west_enable_i_iact in module/entity HMNoC_top does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:228]\nWARNING: [Synth 8-3848] Net west_data_i_psum in module/entity HMNoC_top does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:272]\nWARNING: [Synth 8-3848] Net west_enable_i_psum in module/entity HMNoC_top does not have driver. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:273]\nINFO: [Synth 8-6155] done synthesizing module 'HMNoC_top' (14#1) [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[15]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[14]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[13]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[12]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[11]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[10]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[9]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[8]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[7]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[6]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[5]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[4]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[3]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[2]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[1]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[0]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_enable_o_psum\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[15]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[14]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[13]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[12]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[11]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[10]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[9]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[8]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[7]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[6]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[5]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[4]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[3]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[2]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[1]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[0]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_enable_o_psum\n---------------------------------------------------------------------------------\nFinished RTL Elaboration : Time (s): cpu = 00:00:03 ; elapsed = 00:00:04 . Memory (MB): peak = 435.688 ; gain = 174.504\n---------------------------------------------------------------------------------\n\nReport Check Netlist: \n+------+------------------+-------+---------+-------+------------------+\n| |Item |Errors |Warnings |Status |Description |\n+------+------------------+-------+---------+-------+------------------+\n|1 |multi_driven_nets | 0| 0|Passed |Multi driven nets |\n+------+------------------+-------+---------+-------+------------------+\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:write_en_psum to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[15] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[14] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[13] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[12] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[11] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[10] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[9] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[8] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[7] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[6] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[5] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[4] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[3] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[2] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[1] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[0] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[15] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[14] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[13] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[12] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[11] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[10] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[9] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[8] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[7] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[6] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[5] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[4] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[3] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[2] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[1] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_wght[0] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[15] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[14] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[13] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[12] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[11] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[10] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[9] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[8] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[7] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[6] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[5] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[4] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[3] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[2] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[1] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:west_data_i_iact[0] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[15] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[14] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[13] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[12] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[11] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[10] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[9] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[8] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[7] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[6] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[5] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[4] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[3] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[2] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[1] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:act_in[0] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[15] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[14] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[13] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[12] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[11] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[10] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[9] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[8] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[7] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[6] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[5] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[4] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[3] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[2] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[1] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin pe_cluster_0:filt_in[0] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_west.sv:431]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:write_en_psum to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[15] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[14] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[13] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[12] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[11] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[10] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[9] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[8] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[7] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[6] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[5] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[4] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[3] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[2] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[1] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin GLB_cluster_0:w_data_psum[0] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:243]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:east_data_i_wght[15] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:284]\nWARNING: [Synth 8-3295] tying undriven pin router_cluster_0:east_data_i_wght[14] to constant 0 [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_cluster_east.sv:284]\nINFO: [Common 17-14] Message 'Synth 8-3295' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.\n---------------------------------------------------------------------------------\nStart Handling Custom Attributes\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Handling Custom Attributes : Time (s): cpu = 00:00:04 ; elapsed = 00:00:04 . Memory (MB): peak = 435.688 ; gain = 174.504\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished RTL Optimization Phase 1 : Time (s): cpu = 00:00:04 ; elapsed = 00:00:04 . Memory (MB): peak = 435.688 ; gain = 174.504\n---------------------------------------------------------------------------------\nINFO: [Device 21-403] Loading part xczu7ev-ffvf1517-1LV-i\nINFO: [Project 1-570] Preparing netlist for logic optimization\n\nProcessing XDC Constraints\nInitializing timing engine\nParsing XDC File [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/constrs_1/new/constraints_1.xdc]\nFinished Parsing XDC File [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/constrs_1/new/constraints_1.xdc]\nCompleted Processing XDC Constraints\n\nNetlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.002 . Memory (MB): peak = 1546.910 ; gain = 0.000\nINFO: [Project 1-111] Unisim Transformation Summary:\nNo Unisim elements were transformed.\n\nNetlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.003 . Memory (MB): peak = 1546.910 ; gain = 0.000\nConstraint Validation Runtime : Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.278 . Memory (MB): peak = 1546.910 ; gain = 0.000\n---------------------------------------------------------------------------------\nFinished Constraint Validation : Time (s): cpu = 00:00:17 ; elapsed = 00:00:19 . Memory (MB): peak = 1546.910 ; gain = 1285.727\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Loading Part and Timing Information\n---------------------------------------------------------------------------------\nLoading part: xczu7ev-ffvf1517-1LV-i\nINFO: [Synth 8-6742] Reading net delay rules and data\n---------------------------------------------------------------------------------\nFinished Loading Part and Timing Information : Time (s): cpu = 00:00:17 ; elapsed = 00:00:20 . Memory (MB): peak = 1546.910 ; gain = 1285.727\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Applying 'set_property' XDC Constraints\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:17 ; elapsed = 00:00:20 . Memory (MB): peak = 1546.910 ; gain = 1285.727\n---------------------------------------------------------------------------------\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"load_done\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\n---------------------------------------------------------------------------------\nFinished RTL Optimization Phase 2 : Time (s): cpu = 00:00:19 ; elapsed = 00:00:22 . Memory (MB): peak = 1546.910 ; gain = 1285.727\n---------------------------------------------------------------------------------\n\nReport RTL Partitions: \n+-+--------------+------------+----------+\n| |RTL Partition |Replication |Instances |\n+-+--------------+------------+----------+\n+-+--------------+------------+----------+\n---------------------------------------------------------------------------------\nStart RTL Component Statistics \n---------------------------------------------------------------------------------\nDetailed RTL Component Info : \n+---Adders : \n\t 3 Input 16 Bit Adders := 12 \n\t 2 Input 9 Bit Adders := 96 \n\t 2 Input 8 Bit Adders := 36 \n\t 2 Input 3 Bit Adders := 36 \n+---Registers : \n\t 16 Bit Registers := 204 \n\t 9 Bit Registers := 72 \n\t 8 Bit Registers := 72 \n\t 3 Bit Registers := 144 \n\t 1 Bit Registers := 216 \n+---RAMs : \n\t 16K Bit RAMs := 12 \n\t 8K Bit RAMs := 36 \n+---Muxes : \n\t 3 Input 16 Bit Muxes := 48 \n\t 2 Input 16 Bit Muxes := 72 \n\t 2 Input 14 Bit Muxes := 48 \n\t 8 Input 9 Bit Muxes := 72 \n\t 2 Input 8 Bit Muxes := 36 \n\t 8 Input 8 Bit Muxes := 36 \n\t 2 Input 7 Bit Muxes := 36 \n\t 8 Input 3 Bit Muxes := 36 \n\t 4 Input 3 Bit Muxes := 36 \n\t 2 Input 3 Bit Muxes := 108 \n\t 12 Input 1 Bit Muxes := 48 \n\t 8 Input 1 Bit Muxes := 540 \n\t 2 Input 1 Bit Muxes := 360 \n\t 9 Input 1 Bit Muxes := 72 \n---------------------------------------------------------------------------------\nFinished RTL Component Statistics \n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart RTL Hierarchical Component Statistics \n---------------------------------------------------------------------------------\nHierarchical RTL Component report \nModule glb_iact \nDetailed RTL Component Info : \n+---Registers : \n\t 16 Bit Registers := 1 \n+---RAMs : \n\t 16K Bit RAMs := 1 \n+---Muxes : \n\t 3 Input 16 Bit Muxes := 1 \n\t 2 Input 14 Bit Muxes := 1 \nModule glb_psum \nDetailed RTL Component Info : \n+---Registers : \n\t 16 Bit Registers := 1 \n+---RAMs : \n\t 16K Bit RAMs := 1 \n+---Muxes : \n\t 3 Input 16 Bit Muxes := 1 \n\t 2 Input 14 Bit Muxes := 1 \nModule glb_weight \nDetailed RTL Component Info : \n+---Registers : \n\t 16 Bit Registers := 1 \n+---RAMs : \n\t 16K Bit RAMs := 1 \n+---Muxes : \n\t 3 Input 16 Bit Muxes := 1 \n\t 2 Input 14 Bit Muxes := 1 \nModule router \nDetailed RTL Component Info : \n+---Muxes : \n\t 12 Input 1 Bit Muxes := 4 \nModule SPad \nDetailed RTL Component Info : \n+---Registers : \n\t 16 Bit Registers := 1 \n+---RAMs : \n\t 8K Bit RAMs := 1 \n+---Muxes : \n\t 3 Input 16 Bit Muxes := 1 \n\t 2 Input 14 Bit Muxes := 1 \nModule MAC \nDetailed RTL Component Info : \n+---Registers : \n\t 16 Bit Registers := 1 \nModule mux2 \nDetailed RTL Component Info : \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \nModule PE \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 2 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized0 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 3 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized1 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 3 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized2 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 2 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized3 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 3 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized4 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 3 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized5 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 2 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized6 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 3 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE__parameterized7 \nDetailed RTL Component Info : \n+---Adders : \n\t 2 Input 9 Bit Adders := 3 \n\t 2 Input 8 Bit Adders := 1 \n\t 2 Input 3 Bit Adders := 1 \n+---Registers : \n\t 16 Bit Registers := 3 \n\t 9 Bit Registers := 2 \n\t 8 Bit Registers := 2 \n\t 3 Bit Registers := 4 \n\t 1 Bit Registers := 6 \n+---Muxes : \n\t 2 Input 16 Bit Muxes := 1 \n\t 8 Input 9 Bit Muxes := 2 \n\t 2 Input 8 Bit Muxes := 1 \n\t 8 Input 8 Bit Muxes := 1 \n\t 2 Input 7 Bit Muxes := 1 \n\t 8 Input 3 Bit Muxes := 1 \n\t 4 Input 3 Bit Muxes := 1 \n\t 2 Input 3 Bit Muxes := 3 \n\t 8 Input 1 Bit Muxes := 15 \n\t 2 Input 1 Bit Muxes := 10 \n\t 9 Input 1 Bit Muxes := 2 \nModule PE_cluster__hierPathDup__1 \nDetailed RTL Component Info : \n+---Adders : \n\t 3 Input 16 Bit Adders := 3 \n+---Registers : \n\t 16 Bit Registers := 3 \nModule PE_cluster__hierPathDup__3 \nDetailed RTL Component Info : \n+---Adders : \n\t 3 Input 16 Bit Adders := 3 \n+---Registers : \n\t 16 Bit Registers := 3 \nModule PE_cluster \nDetailed RTL Component Info : \n+---Adders : \n\t 3 Input 16 Bit Adders := 3 \n+---Registers : \n\t 16 Bit Registers := 3 \nModule PE_cluster__hierPathDup__2 \nDetailed RTL Component Info : \n+---Adders : \n\t 3 Input 16 Bit Adders := 3 \n+---Registers : \n\t 16 Bit Registers := 3 \n---------------------------------------------------------------------------------\nFinished RTL Hierarchical Component Statistics\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Part Resource Summary\n---------------------------------------------------------------------------------\nPart Resources:\nDSPs: 1728 (col length:144)\nBRAMs: 624 (col length: RAMB18 144 RAMB36 72)\n---------------------------------------------------------------------------------\nFinished Part Resource Summary\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Cross Boundary and Area Optimization\n---------------------------------------------------------------------------------\nWarning: Parallel synthesis criteria is not met \nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"r_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"sum_in_mux_sel\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"w_addr\" won't be mapped to RAM because it is too sparse\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5546] ROM \"filt_count\" won't be mapped to RAM because it is too sparse\nINFO: [Synth 8-5546] ROM \"state\" won't be mapped to RAM because it is too sparse\nINFO: [Common 17-14] Message 'Synth 8-5546' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-4471] merging register 'filt_count_reg[7:0]' into 'filt_count_reg[7:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:104]\nINFO: [Synth 8-4471] merging register 'iter_reg[2:0]' into 'iter_reg[2:0]' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/PE.sv:115]\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nINFO: [Synth 8-5544] ROM \"filt_count\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nINFO: [Synth 8-5544] ROM \"iter\" won't be mapped to Block RAM because address size (3) smaller than threshold (5)\nDSP Report: Generating DSP mac_0/out_reg, operation Mode is: (P or (C:0x0))+A2*B2.\nDSP Report: register filt_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register act_in_reg_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: register mac_0/out_reg is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out0 is absorbed into DSP mac_0/out_reg.\nDSP Report: operator mac_0/out1 is absorbed into DSP mac_0/out_reg.\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[15]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[14]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[13]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[12]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[11]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[10]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[9]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[8]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[7]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[6]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[5]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[4]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[3]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[2]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[1]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_data_o_psum[0]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east has unconnected port east_enable_o_psum\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[15]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[14]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[13]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[12]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[11]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[10]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[9]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[8]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[7]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[6]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[5]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[4]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[3]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[2]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[1]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_data_o_psum[0]\nWARNING: [Synth 8-3331] design HMNoC_cluster_east__hierPathDup__1 has unconnected port east_enable_o_psum\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[15]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[14]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[13]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[12]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[11]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[10]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[9]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[8]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[7]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[6]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[5]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[4]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[3]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[2]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[1]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_data_o_psum[0]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west__hierPathDup__1 has unconnected port west_enable_o_psum\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[15]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[14]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[13]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[12]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[11]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[10]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[9]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[8]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[7]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[6]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[5]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[4]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[3]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[2]\nWARNING: [Synth 8-3331] design HMNoC_cluster_west has unconnected port west_data_o_psum[1]\nINFO: [Common 17-14] Message 'Synth 8-3331' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[0]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3333] propagating constant 0 across sequential element (HMNoC_cluster_east_1/\\GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[1] )\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[2]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3333] propagating constant 0 across sequential element (HMNoC_cluster_east_1/\\GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[3] )\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[4]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[5]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[6]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3333] propagating constant 0 across sequential element (HMNoC_cluster_east_1/\\GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[7] )\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[8]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[9]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3886] merging instance 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[10]' (FDR) to 'HMNoC_cluster_east_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[13]'\nINFO: [Synth 8-3333] propagating constant 0 across sequential element (HMNoC_cluster_east_1/\\GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[11] )\nINFO: [Synth 8-3333] propagating constant 0 across sequential element (HMNoC_cluster_east_1/\\GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[12] )\nINFO: [Synth 8-3333] propagating constant 0 across sequential element (HMNoC_cluster_east_1/\\GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[14] )\nINFO: [Synth 8-3333] propagating constant 0 across sequential element (HMNoC_cluster_east_1/\\GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[15] )\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[15]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[14]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[12]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[11]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[7]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[3]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[1]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/data_reg[15]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/data_reg[14]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/data_reg[12]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/data_reg[11]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/data_reg[7]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/data_reg[3]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_west_1/GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/data_reg[1]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_weight.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_east_0/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[15]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_east_0/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[14]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_east_0/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[12]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_east_0/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[11]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_east_0/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[7]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_east_0/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[3]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 1st driver pin 'HMNoC_cluster_east_0/GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/data_reg[1]/Q' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin Q with 2nd driver pin 'GND' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\nCRITICAL WARNING: [Synth 8-6858] multi-driven net Q is connected to at least one constant driver which has been preserved, other driver is ignored [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/glb_iact.sv:42]\n---------------------------------------------------------------------------------\nFinished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:35 ; elapsed = 00:00:40 . Memory (MB): peak = 1546.910 ; gain = 1285.727\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart ROM, RAM, DSP and Shift Register Reporting\n---------------------------------------------------------------------------------\n\nDistributed RAM: Preliminary Mapping Report (see note below)\n+----------------------------------+-------------------------------------------------------+-----------+----------------------+-------------------------------+\n|Module Name | RTL Object | Inference | Size (Depth x Width) | Primitives | \n+----------------------------------+-------------------------------------------------------+-----------+----------------------+-------------------------------+\n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[0].gen_Y[0].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[0].gen_Y[1].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[0].gen_Y[2].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[1].gen_Y[0].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[1].gen_Y[1].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[1].gen_Y[2].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[2].gen_Y[0].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[2].gen_Y[1].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[2].gen_Y[2].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0 | GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0 | GLB_cluster_0/glb_psum_gen[0].glb_psum_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0 | GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_east_0 | GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_east_1 | GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n+----------------------------------+-------------------------------------------------------+-----------+----------------------+-------------------------------+\n\nNote: The table above is a preliminary report that shows the Distributed RAMs at the current stage of the synthesis flow. Some Distributed RAMs may be reimplemented as non Distributed RAM primitives later in the synthesis flow. Multiple instantiated RAMs are reported only once.\n\nDSP: Preliminary Mapping Report (see note below)\n+------------+----------------------+--------+--------+--------+--------+--------+------+------+------+------+-------+------+------+\n|Module Name | DSP Mapping | A Size | B Size | C Size | D Size | P Size | AREG | BREG | CREG | DREG | ADREG | MREG | PREG | \n+------------+----------------------+--------+--------+--------+--------+--------+------+------+------+------+-------+------+------+\n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n|PE | (P or (C:0x0))+A2*B2 | 16 | 16 | 16 | - | 16 | 1 | 1 | 0 | - | - | 0 | 1 | \n+------------+----------------------+--------+--------+--------+--------+--------+------+------+------+------+-------+------+------+\n\nNote: The table above is a preliminary report that shows the DSPs inferred at the current stage of the synthesis flow. Some DSP may be reimplemented as non DSP primitives later in the synthesis flow. Multiple instantiated DSPs are reported only once.\n---------------------------------------------------------------------------------\nFinished ROM, RAM, DSP and Shift Register Reporting\n---------------------------------------------------------------------------------\n\nReport RTL Partitions: \n+-+--------------+------------+----------+\n| |RTL Partition |Replication |Instances |\n+-+--------------+------------+----------+\n+-+--------------+------------+----------+\n---------------------------------------------------------------------------------\nStart Applying XDC Timing Constraints\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Applying XDC Timing Constraints : Time (s): cpu = 00:00:44 ; elapsed = 00:00:52 . Memory (MB): peak = 1987.973 ; gain = 1726.789\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Timing Optimization\n---------------------------------------------------------------------------------\n : HMNoC_cluster_west_0/\\router_cluster_0/router_psum/data_out_inferred /data3[15]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred__0/out[15]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred__0/in0[15]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred/out[15]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred/in0[15]\n : HMNoC_cluster_west_0/east_data_i_psum0[15]\n : east_data_i_psum_inferred__0/out[15]\n : east_data_i_psum_inferred__0/in0[15]\n : east_data_i_psum_inferred/out[15]\n : east_data_i_psum_inferred/in0[15]\n : HMNoC_cluster_east_0/west_data_o_psum[15]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred__0/out[15]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred__0/in0[15]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred/out[15]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred/in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred__0 /out[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred__0 /in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred /out[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred /in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /out0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /data2[15]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred__0/out[15]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred__0/in0[15]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred/out[15]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred/in0[15]\n : HMNoC_cluster_east_0/west_data_i_psum0[15]\n : west_data_i_psum_inferred__0/out[15]\n : west_data_i_psum_inferred__0/in0[15]\n : west_data_i_psum_inferred/out[15]\n : west_data_i_psum_inferred/in0[15]\n : HMNoC_cluster_west_0/east_data_o_psum[15]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred__0/out[15]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred__0/in0[15]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred/out[15]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred/in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred__0 /out[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred__0 /in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred /out[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred /in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_psum/data_out_inferred /out0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /data1[15]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred__0/out[15]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred__0/in0[15]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred/out[15]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred/in0[15]\n : HMNoC_cluster_east_0/south_data_i_psum0[15]\n : south_data_i_psum_inferred__2/out[15]\n : south_data_i_psum_inferred__2/in0[15]\n : south_data_i_psum_inferred__1/out[15]\n : south_data_i_psum_inferred__1/in0[15]\n : HMNoC_cluster_east_1/north_data_o_psum[15]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred__0/out[15]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred__0/in0[15]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred/out[15]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred/in0[15]\n : HMNoC_cluster_east_1/north_data_o_psum0[15]\n : north_data_o_psum_inferred__2/out[15]\n : north_data_o_psum_inferred__2/in0[15]\n : north_data_o_psum_inferred__1/out[15]\n : north_data_o_psum_inferred__1/in0[15]\n : HMNoC_cluster_east_0/south_data_o_psum[15]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred__0/out[15]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred__0/in0[15]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred/out[15]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred/in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /out0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_psum/data_out_inferred /data3[14]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred__0/out[14]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred__0/in0[14]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred/out[14]\n : HMNoC_cluster_west_0/east_data_i_psum_inferred/in0[14]\n : HMNoC_cluster_west_0/east_data_i_psum0[14]\n : east_data_i_psum_inferred__0/out[14]\n : east_data_i_psum_inferred__0/in0[14]\n : east_data_i_psum_inferred/out[14]\n : east_data_i_psum_inferred/in0[14]\n : HMNoC_cluster_east_0/west_data_o_psum[14]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred__0/out[14]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred__0/in0[14]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred/out[14]\n : HMNoC_cluster_east_0/west_data_o_psum_inferred/in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred__0 /out[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred__0 /in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred /out[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_psum_inferred /in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /out0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /data2[14]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred__0/out[14]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred__0/in0[14]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred/out[14]\n : HMNoC_cluster_east_0/west_data_i_psum_inferred/in0[14]\n : HMNoC_cluster_east_0/west_data_i_psum0[14]\n : west_data_i_psum_inferred__0/out[14]\n : west_data_i_psum_inferred__0/in0[14]\n : west_data_i_psum_inferred/out[14]\n : west_data_i_psum_inferred/in0[14]\n : HMNoC_cluster_west_0/east_data_o_psum[14]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred__0/out[14]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred__0/in0[14]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred/out[14]\n : HMNoC_cluster_west_0/east_data_o_psum_inferred/in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred__0 /out[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred__0 /in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred /out[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_psum_inferred /in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_psum/data_out_inferred /out0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /data1[14]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred__0/out[14]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred__0/in0[14]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred/out[14]\n : HMNoC_cluster_east_0/south_data_i_psum_inferred/in0[14]\n : HMNoC_cluster_east_0/south_data_i_psum0[14]\n : south_data_i_psum_inferred__2/out[14]\n : south_data_i_psum_inferred__2/in0[14]\n : south_data_i_psum_inferred__1/out[14]\n : south_data_i_psum_inferred__1/in0[14]\n : HMNoC_cluster_east_1/north_data_o_psum[14]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred__0/out[14]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred__0/in0[14]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred/out[14]\n : HMNoC_cluster_east_1/north_data_o_psum_inferred/in0[14]\n : HMNoC_cluster_east_1/north_data_o_psum0[14]\n : north_data_o_psum_inferred__2/out[14]\n : north_data_o_psum_inferred__2/in0[14]\n : north_data_o_psum_inferred__1/out[14]\n : north_data_o_psum_inferred__1/in0[14]\n : HMNoC_cluster_east_0/south_data_o_psum[14]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred__0/out[14]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred__0/in0[14]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred/out[14]\n : HMNoC_cluster_east_0/south_data_o_psum_inferred/in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_psum/data_out_inferred /out0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[15]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[15]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[15]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[15]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[15]\n : HMNoC_cluster_west_0/south_data_i_wght0[15]\n : south_data_i_wght_inferred__0/out[15]\n : south_data_i_wght_inferred__0/in0[15]\n : south_data_i_wght_inferred/out[15]\n : south_data_i_wght_inferred/in0[15]\n : HMNoC_cluster_west_1/north_data_o_wght[15]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[15]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[15]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[15]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[15]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[15]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[15]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[15]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[15]\n : HMNoC_cluster_west_1/north_data_i_wght0[15]\n : north_data_i_wght_inferred__0/out[15]\n : north_data_i_wght_inferred__0/in0[15]\n : north_data_i_wght_inferred/out[15]\n : north_data_i_wght_inferred/in0[15]\n : HMNoC_cluster_west_0/south_data_o_wght[15]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[15]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[15]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[15]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[15]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[15]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[15]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[15]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_west_0/east_data_i_iact0[15]\n : east_data_i_iact_inferred__0/out[15]\n : east_data_i_iact_inferred__0/in0[15]\n : east_data_i_iact_inferred/out[15]\n : east_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_east_0/west_data_o_iact[15]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[15]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[15]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[15]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[15]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[15]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_east_0/west_data_i_iact0[15]\n : west_data_i_iact_inferred__0/out[15]\n : west_data_i_iact_inferred__0/in0[15]\n : west_data_i_iact_inferred/out[15]\n : west_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_west_0/east_data_o_iact[15]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[15]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[15]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[15]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[15]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[15]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[15]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_east_1/west_data_i_iact[15]\n : east_data_o_iact_inferred__2/out[15]\n : east_data_o_iact_inferred__2/in0[15]\n : east_data_o_iact_inferred__1/out[15]\n : east_data_o_iact_inferred__1/in0[15]\n : HMNoC_cluster_west_1/east_data_o_iact0[15]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[15]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[15]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[15]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[15]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[15]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[15]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[15]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[15]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_west_1/east_data_i_iact0[15]\n : east_data_i_iact_inferred__2/out[15]\n : east_data_i_iact_inferred__2/in0[15]\n : east_data_i_iact_inferred__1/out[15]\n : east_data_i_iact_inferred__1/in0[15]\n : HMNoC_cluster_east_1/west_data_o_iact[15]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[15]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[15]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[15]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[15]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[15]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_east_0/south_data_i_iact0[15]\n : south_data_i_iact_inferred__2/out[15]\n : south_data_i_iact_inferred__2/in0[15]\n : south_data_i_iact_inferred__1/out[15]\n : south_data_i_iact_inferred__1/in0[15]\n : HMNoC_cluster_east_1/north_data_o_iact[15]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[15]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[15]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[15]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[15]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[15]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[15]\n : HMNoC_cluster_east_1/north_data_i_iact0[15]\n : north_data_i_iact_inferred__2/out[15]\n : north_data_i_iact_inferred__2/in0[15]\n : north_data_i_iact_inferred__1/out[15]\n : north_data_i_iact_inferred__1/in0[15]\n : HMNoC_cluster_east_0/south_data_o_iact[15]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[15]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[15]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[15]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[15]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[14]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[14]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[14]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[14]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[14]\n : HMNoC_cluster_west_0/south_data_i_wght0[14]\n : south_data_i_wght_inferred__0/out[14]\n : south_data_i_wght_inferred__0/in0[14]\n : south_data_i_wght_inferred/out[14]\n : south_data_i_wght_inferred/in0[14]\n : HMNoC_cluster_west_1/north_data_o_wght[14]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[14]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[14]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[14]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[14]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[14]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[14]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[14]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[14]\n : HMNoC_cluster_west_1/north_data_i_wght0[14]\n : north_data_i_wght_inferred__0/out[14]\n : north_data_i_wght_inferred__0/in0[14]\n : north_data_i_wght_inferred/out[14]\n : north_data_i_wght_inferred/in0[14]\n : HMNoC_cluster_west_0/south_data_o_wght[14]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[14]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[14]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[14]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[14]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[14]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[14]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[14]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_west_0/east_data_i_iact0[14]\n : east_data_i_iact_inferred__0/out[14]\n : east_data_i_iact_inferred__0/in0[14]\n : east_data_i_iact_inferred/out[14]\n : east_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_east_0/west_data_o_iact[14]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[14]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[14]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[14]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[14]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[14]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_east_0/west_data_i_iact0[14]\n : west_data_i_iact_inferred__0/out[14]\n : west_data_i_iact_inferred__0/in0[14]\n : west_data_i_iact_inferred/out[14]\n : west_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_west_0/east_data_o_iact[14]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[14]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[14]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[14]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[14]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[14]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[14]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_east_1/west_data_i_iact[14]\n : east_data_o_iact_inferred__2/out[14]\n : east_data_o_iact_inferred__2/in0[14]\n : east_data_o_iact_inferred__1/out[14]\n : east_data_o_iact_inferred__1/in0[14]\n : HMNoC_cluster_west_1/east_data_o_iact0[14]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[14]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[14]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[14]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[14]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[14]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[14]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[14]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[14]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_west_1/east_data_i_iact0[14]\n : east_data_i_iact_inferred__2/out[14]\n : east_data_i_iact_inferred__2/in0[14]\n : east_data_i_iact_inferred__1/out[14]\n : east_data_i_iact_inferred__1/in0[14]\n : HMNoC_cluster_east_1/west_data_o_iact[14]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[14]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[14]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[14]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[14]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[14]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_east_0/south_data_i_iact0[14]\n : south_data_i_iact_inferred__2/out[14]\n : south_data_i_iact_inferred__2/in0[14]\n : south_data_i_iact_inferred__1/out[14]\n : south_data_i_iact_inferred__1/in0[14]\n : HMNoC_cluster_east_1/north_data_o_iact[14]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[14]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[14]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[14]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[14]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[14]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[14]\n : HMNoC_cluster_east_1/north_data_i_iact0[14]\n : north_data_i_iact_inferred__2/out[14]\n : north_data_i_iact_inferred__2/in0[14]\n : north_data_i_iact_inferred__1/out[14]\n : north_data_i_iact_inferred__1/in0[14]\n : HMNoC_cluster_east_0/south_data_o_iact[14]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[14]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[14]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[14]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[14]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[13]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[13]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[13]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[13]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[13]\n : HMNoC_cluster_west_0/south_data_i_wght0[13]\n : south_data_i_wght_inferred__0/out[13]\n : south_data_i_wght_inferred__0/in0[13]\n : south_data_i_wght_inferred/out[13]\n : south_data_i_wght_inferred/in0[13]\n : HMNoC_cluster_west_1/north_data_o_wght[13]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[13]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[13]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[13]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[13]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[13]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[13]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[13]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[13]\n : HMNoC_cluster_west_1/north_data_i_wght0[13]\n : north_data_i_wght_inferred__0/out[13]\n : north_data_i_wght_inferred__0/in0[13]\n : north_data_i_wght_inferred/out[13]\n : north_data_i_wght_inferred/in0[13]\n : HMNoC_cluster_west_0/south_data_o_wght[13]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[13]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[13]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[13]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[13]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[13]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[13]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[13]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_west_0/east_data_i_iact0[13]\n : east_data_i_iact_inferred__0/out[13]\n : east_data_i_iact_inferred__0/in0[13]\n : east_data_i_iact_inferred/out[13]\n : east_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_east_0/west_data_o_iact[13]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[13]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[13]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[13]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[13]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[13]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_east_0/west_data_i_iact0[13]\n : west_data_i_iact_inferred__0/out[13]\n : west_data_i_iact_inferred__0/in0[13]\n : west_data_i_iact_inferred/out[13]\n : west_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_west_0/east_data_o_iact[13]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[13]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[13]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[13]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[13]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[13]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[13]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_east_1/west_data_i_iact[13]\n : east_data_o_iact_inferred__2/out[13]\n : east_data_o_iact_inferred__2/in0[13]\n : east_data_o_iact_inferred__1/out[13]\n : east_data_o_iact_inferred__1/in0[13]\n : HMNoC_cluster_west_1/east_data_o_iact0[13]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[13]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[13]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[13]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[13]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[13]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[13]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[13]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[13]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_west_1/east_data_i_iact0[13]\n : east_data_i_iact_inferred__2/out[13]\n : east_data_i_iact_inferred__2/in0[13]\n : east_data_i_iact_inferred__1/out[13]\n : east_data_i_iact_inferred__1/in0[13]\n : HMNoC_cluster_east_1/west_data_o_iact[13]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[13]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[13]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[13]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[13]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[13]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_east_0/south_data_i_iact0[13]\n : south_data_i_iact_inferred__2/out[13]\n : south_data_i_iact_inferred__2/in0[13]\n : south_data_i_iact_inferred__1/out[13]\n : south_data_i_iact_inferred__1/in0[13]\n : HMNoC_cluster_east_1/north_data_o_iact[13]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[13]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[13]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[13]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[13]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[13]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[13]\n : HMNoC_cluster_east_1/north_data_i_iact0[13]\n : north_data_i_iact_inferred__2/out[13]\n : north_data_i_iact_inferred__2/in0[13]\n : north_data_i_iact_inferred__1/out[13]\n : north_data_i_iact_inferred__1/in0[13]\n : HMNoC_cluster_east_0/south_data_o_iact[13]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[13]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[13]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[13]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[13]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[12]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[12]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[12]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[12]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[12]\n : HMNoC_cluster_west_0/south_data_i_wght0[12]\n : south_data_i_wght_inferred__0/out[12]\n : south_data_i_wght_inferred__0/in0[12]\n : south_data_i_wght_inferred/out[12]\n : south_data_i_wght_inferred/in0[12]\n : HMNoC_cluster_west_1/north_data_o_wght[12]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[12]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[12]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[12]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[12]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[12]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[12]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[12]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[12]\n : HMNoC_cluster_west_1/north_data_i_wght0[12]\n : north_data_i_wght_inferred__0/out[12]\n : north_data_i_wght_inferred__0/in0[12]\n : north_data_i_wght_inferred/out[12]\n : north_data_i_wght_inferred/in0[12]\n : HMNoC_cluster_west_0/south_data_o_wght[12]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[12]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[12]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[12]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[12]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[12]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[12]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[12]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_west_0/east_data_i_iact0[12]\n : east_data_i_iact_inferred__0/out[12]\n : east_data_i_iact_inferred__0/in0[12]\n : east_data_i_iact_inferred/out[12]\n : east_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_east_0/west_data_o_iact[12]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[12]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[12]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[12]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[12]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[12]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_east_0/west_data_i_iact0[12]\n : west_data_i_iact_inferred__0/out[12]\n : west_data_i_iact_inferred__0/in0[12]\n : west_data_i_iact_inferred/out[12]\n : west_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_west_0/east_data_o_iact[12]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[12]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[12]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[12]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[12]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[12]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[12]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_east_1/west_data_i_iact[12]\n : east_data_o_iact_inferred__2/out[12]\n : east_data_o_iact_inferred__2/in0[12]\n : east_data_o_iact_inferred__1/out[12]\n : east_data_o_iact_inferred__1/in0[12]\n : HMNoC_cluster_west_1/east_data_o_iact0[12]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[12]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[12]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[12]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[12]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[12]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[12]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[12]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[12]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_west_1/east_data_i_iact0[12]\n : east_data_i_iact_inferred__2/out[12]\n : east_data_i_iact_inferred__2/in0[12]\n : east_data_i_iact_inferred__1/out[12]\n : east_data_i_iact_inferred__1/in0[12]\n : HMNoC_cluster_east_1/west_data_o_iact[12]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[12]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[12]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[12]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[12]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[12]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_east_0/south_data_i_iact0[12]\n : south_data_i_iact_inferred__2/out[12]\n : south_data_i_iact_inferred__2/in0[12]\n : south_data_i_iact_inferred__1/out[12]\n : south_data_i_iact_inferred__1/in0[12]\n : HMNoC_cluster_east_1/north_data_o_iact[12]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[12]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[12]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[12]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[12]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[12]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[12]\n : HMNoC_cluster_east_1/north_data_i_iact0[12]\n : north_data_i_iact_inferred__2/out[12]\n : north_data_i_iact_inferred__2/in0[12]\n : north_data_i_iact_inferred__1/out[12]\n : north_data_i_iact_inferred__1/in0[12]\n : HMNoC_cluster_east_0/south_data_o_iact[12]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[12]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[12]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[12]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[12]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[11]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[11]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[11]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[11]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[11]\n : HMNoC_cluster_west_0/south_data_i_wght0[11]\n : south_data_i_wght_inferred__0/out[11]\n : south_data_i_wght_inferred__0/in0[11]\n : south_data_i_wght_inferred/out[11]\n : south_data_i_wght_inferred/in0[11]\n : HMNoC_cluster_west_1/north_data_o_wght[11]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[11]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[11]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[11]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[11]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[11]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[11]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[11]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[11]\n : HMNoC_cluster_west_1/north_data_i_wght0[11]\n : north_data_i_wght_inferred__0/out[11]\n : north_data_i_wght_inferred__0/in0[11]\n : north_data_i_wght_inferred/out[11]\n : north_data_i_wght_inferred/in0[11]\n : HMNoC_cluster_west_0/south_data_o_wght[11]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[11]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[11]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[11]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[11]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[11]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[11]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[11]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_west_0/east_data_i_iact0[11]\n : east_data_i_iact_inferred__0/out[11]\n : east_data_i_iact_inferred__0/in0[11]\n : east_data_i_iact_inferred/out[11]\n : east_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_east_0/west_data_o_iact[11]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[11]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[11]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[11]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[11]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[11]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_east_0/west_data_i_iact0[11]\n : west_data_i_iact_inferred__0/out[11]\n : west_data_i_iact_inferred__0/in0[11]\n : west_data_i_iact_inferred/out[11]\n : west_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_west_0/east_data_o_iact[11]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[11]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[11]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[11]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[11]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[11]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[11]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_east_1/west_data_i_iact[11]\n : east_data_o_iact_inferred__2/out[11]\n : east_data_o_iact_inferred__2/in0[11]\n : east_data_o_iact_inferred__1/out[11]\n : east_data_o_iact_inferred__1/in0[11]\n : HMNoC_cluster_west_1/east_data_o_iact0[11]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[11]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[11]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[11]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[11]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[11]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[11]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[11]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[11]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_west_1/east_data_i_iact0[11]\n : east_data_i_iact_inferred__2/out[11]\n : east_data_i_iact_inferred__2/in0[11]\n : east_data_i_iact_inferred__1/out[11]\n : east_data_i_iact_inferred__1/in0[11]\n : HMNoC_cluster_east_1/west_data_o_iact[11]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[11]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[11]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[11]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[11]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[11]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_east_0/south_data_i_iact0[11]\n : south_data_i_iact_inferred__2/out[11]\n : south_data_i_iact_inferred__2/in0[11]\n : south_data_i_iact_inferred__1/out[11]\n : south_data_i_iact_inferred__1/in0[11]\n : HMNoC_cluster_east_1/north_data_o_iact[11]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[11]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[11]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[11]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[11]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[11]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[11]\n : HMNoC_cluster_east_1/north_data_i_iact0[11]\n : north_data_i_iact_inferred__2/out[11]\n : north_data_i_iact_inferred__2/in0[11]\n : north_data_i_iact_inferred__1/out[11]\n : north_data_i_iact_inferred__1/in0[11]\n : HMNoC_cluster_east_0/south_data_o_iact[11]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[11]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[11]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[11]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[11]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[10]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[10]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[10]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[10]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[10]\n : HMNoC_cluster_west_0/south_data_i_wght0[10]\n : south_data_i_wght_inferred__0/out[10]\n : south_data_i_wght_inferred__0/in0[10]\n : south_data_i_wght_inferred/out[10]\n : south_data_i_wght_inferred/in0[10]\n : HMNoC_cluster_west_1/north_data_o_wght[10]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[10]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[10]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[10]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[10]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[10]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[10]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[10]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[10]\n : HMNoC_cluster_west_1/north_data_i_wght0[10]\n : north_data_i_wght_inferred__0/out[10]\n : north_data_i_wght_inferred__0/in0[10]\n : north_data_i_wght_inferred/out[10]\n : north_data_i_wght_inferred/in0[10]\n : HMNoC_cluster_west_0/south_data_o_wght[10]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[10]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[10]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[10]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[10]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[10]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[10]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[10]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_west_0/east_data_i_iact0[10]\n : east_data_i_iact_inferred__0/out[10]\n : east_data_i_iact_inferred__0/in0[10]\n : east_data_i_iact_inferred/out[10]\n : east_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_east_0/west_data_o_iact[10]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[10]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[10]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[10]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[10]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[10]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_east_0/west_data_i_iact0[10]\n : west_data_i_iact_inferred__0/out[10]\n : west_data_i_iact_inferred__0/in0[10]\n : west_data_i_iact_inferred/out[10]\n : west_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_west_0/east_data_o_iact[10]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[10]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[10]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[10]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[10]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[10]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[10]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_east_1/west_data_i_iact[10]\n : east_data_o_iact_inferred__2/out[10]\n : east_data_o_iact_inferred__2/in0[10]\n : east_data_o_iact_inferred__1/out[10]\n : east_data_o_iact_inferred__1/in0[10]\n : HMNoC_cluster_west_1/east_data_o_iact0[10]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[10]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[10]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[10]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[10]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[10]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[10]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[10]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[10]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_west_1/east_data_i_iact0[10]\n : east_data_i_iact_inferred__2/out[10]\n : east_data_i_iact_inferred__2/in0[10]\n : east_data_i_iact_inferred__1/out[10]\n : east_data_i_iact_inferred__1/in0[10]\n : HMNoC_cluster_east_1/west_data_o_iact[10]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[10]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[10]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[10]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[10]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[10]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_east_0/south_data_i_iact0[10]\n : south_data_i_iact_inferred__2/out[10]\n : south_data_i_iact_inferred__2/in0[10]\n : south_data_i_iact_inferred__1/out[10]\n : south_data_i_iact_inferred__1/in0[10]\n : HMNoC_cluster_east_1/north_data_o_iact[10]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[10]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[10]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[10]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[10]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[10]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[10]\n : HMNoC_cluster_east_1/north_data_i_iact0[10]\n : north_data_i_iact_inferred__2/out[10]\n : north_data_i_iact_inferred__2/in0[10]\n : north_data_i_iact_inferred__1/out[10]\n : north_data_i_iact_inferred__1/in0[10]\n : HMNoC_cluster_east_0/south_data_o_iact[10]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[10]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[10]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[10]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[10]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[9]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[9]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[9]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[9]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[9]\n : HMNoC_cluster_west_0/south_data_i_wght0[9]\n : south_data_i_wght_inferred__0/out[9]\n : south_data_i_wght_inferred__0/in0[9]\n : south_data_i_wght_inferred/out[9]\n : south_data_i_wght_inferred/in0[9]\n : HMNoC_cluster_west_1/north_data_o_wght[9]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[9]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[9]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[9]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[9]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[9]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[9]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[9]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[9]\n : HMNoC_cluster_west_1/north_data_i_wght0[9]\n : north_data_i_wght_inferred__0/out[9]\n : north_data_i_wght_inferred__0/in0[9]\n : north_data_i_wght_inferred/out[9]\n : north_data_i_wght_inferred/in0[9]\n : HMNoC_cluster_west_0/south_data_o_wght[9]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[9]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[9]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[9]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[9]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[9]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[9]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[9]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_west_0/east_data_i_iact0[9]\n : east_data_i_iact_inferred__0/out[9]\n : east_data_i_iact_inferred__0/in0[9]\n : east_data_i_iact_inferred/out[9]\n : east_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_east_0/west_data_o_iact[9]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[9]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[9]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[9]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[9]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[9]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_east_0/west_data_i_iact0[9]\n : west_data_i_iact_inferred__0/out[9]\n : west_data_i_iact_inferred__0/in0[9]\n : west_data_i_iact_inferred/out[9]\n : west_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_west_0/east_data_o_iact[9]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[9]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[9]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[9]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[9]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[9]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[9]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_east_1/west_data_i_iact[9]\n : east_data_o_iact_inferred__2/out[9]\n : east_data_o_iact_inferred__2/in0[9]\n : east_data_o_iact_inferred__1/out[9]\n : east_data_o_iact_inferred__1/in0[9]\n : HMNoC_cluster_west_1/east_data_o_iact0[9]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[9]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[9]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[9]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[9]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[9]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[9]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[9]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[9]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_west_1/east_data_i_iact0[9]\n : east_data_i_iact_inferred__2/out[9]\n : east_data_i_iact_inferred__2/in0[9]\n : east_data_i_iact_inferred__1/out[9]\n : east_data_i_iact_inferred__1/in0[9]\n : HMNoC_cluster_east_1/west_data_o_iact[9]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[9]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[9]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[9]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[9]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[9]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_east_0/south_data_i_iact0[9]\n : south_data_i_iact_inferred__2/out[9]\n : south_data_i_iact_inferred__2/in0[9]\n : south_data_i_iact_inferred__1/out[9]\n : south_data_i_iact_inferred__1/in0[9]\n : HMNoC_cluster_east_1/north_data_o_iact[9]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[9]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[9]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[9]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[9]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[9]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[9]\n : HMNoC_cluster_east_1/north_data_i_iact0[9]\n : north_data_i_iact_inferred__2/out[9]\n : north_data_i_iact_inferred__2/in0[9]\n : north_data_i_iact_inferred__1/out[9]\n : north_data_i_iact_inferred__1/in0[9]\n : HMNoC_cluster_east_0/south_data_o_iact[9]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[9]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[9]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[9]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[9]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[8]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[8]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[8]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[8]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[8]\n : HMNoC_cluster_west_0/south_data_i_wght0[8]\n : south_data_i_wght_inferred__0/out[8]\n : south_data_i_wght_inferred__0/in0[8]\n : south_data_i_wght_inferred/out[8]\n : south_data_i_wght_inferred/in0[8]\n : HMNoC_cluster_west_1/north_data_o_wght[8]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[8]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[8]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[8]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[8]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[8]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[8]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[8]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[8]\n : HMNoC_cluster_west_1/north_data_i_wght0[8]\n : north_data_i_wght_inferred__0/out[8]\n : north_data_i_wght_inferred__0/in0[8]\n : north_data_i_wght_inferred/out[8]\n : north_data_i_wght_inferred/in0[8]\n : HMNoC_cluster_west_0/south_data_o_wght[8]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[8]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[8]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[8]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[8]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[8]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[8]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[8]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_west_0/east_data_i_iact0[8]\n : east_data_i_iact_inferred__0/out[8]\n : east_data_i_iact_inferred__0/in0[8]\n : east_data_i_iact_inferred/out[8]\n : east_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_east_0/west_data_o_iact[8]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[8]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[8]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[8]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[8]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[8]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_east_0/west_data_i_iact0[8]\n : west_data_i_iact_inferred__0/out[8]\n : west_data_i_iact_inferred__0/in0[8]\n : west_data_i_iact_inferred/out[8]\n : west_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_west_0/east_data_o_iact[8]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[8]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[8]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[8]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[8]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[8]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[8]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_east_1/west_data_i_iact[8]\n : east_data_o_iact_inferred__2/out[8]\n : east_data_o_iact_inferred__2/in0[8]\n : east_data_o_iact_inferred__1/out[8]\n : east_data_o_iact_inferred__1/in0[8]\n : HMNoC_cluster_west_1/east_data_o_iact0[8]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[8]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[8]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[8]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[8]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[8]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[8]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[8]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[8]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_west_1/east_data_i_iact0[8]\n : east_data_i_iact_inferred__2/out[8]\n : east_data_i_iact_inferred__2/in0[8]\n : east_data_i_iact_inferred__1/out[8]\n : east_data_i_iact_inferred__1/in0[8]\n : HMNoC_cluster_east_1/west_data_o_iact[8]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[8]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[8]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[8]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[8]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[8]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_east_0/south_data_i_iact0[8]\n : south_data_i_iact_inferred__2/out[8]\n : south_data_i_iact_inferred__2/in0[8]\n : south_data_i_iact_inferred__1/out[8]\n : south_data_i_iact_inferred__1/in0[8]\n : HMNoC_cluster_east_1/north_data_o_iact[8]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[8]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[8]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[8]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[8]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[8]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[8]\n : HMNoC_cluster_east_1/north_data_i_iact0[8]\n : north_data_i_iact_inferred__2/out[8]\n : north_data_i_iact_inferred__2/in0[8]\n : north_data_i_iact_inferred__1/out[8]\n : north_data_i_iact_inferred__1/in0[8]\n : HMNoC_cluster_east_0/south_data_o_iact[8]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[8]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[8]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[8]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[8]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[7]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[7]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[7]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[7]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[7]\n : HMNoC_cluster_west_0/south_data_i_wght0[7]\n : south_data_i_wght_inferred__0/out[7]\n : south_data_i_wght_inferred__0/in0[7]\n : south_data_i_wght_inferred/out[7]\n : south_data_i_wght_inferred/in0[7]\n : HMNoC_cluster_west_1/north_data_o_wght[7]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[7]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[7]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[7]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[7]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[7]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[7]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[7]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[7]\n : HMNoC_cluster_west_1/north_data_i_wght0[7]\n : north_data_i_wght_inferred__0/out[7]\n : north_data_i_wght_inferred__0/in0[7]\n : north_data_i_wght_inferred/out[7]\n : north_data_i_wght_inferred/in0[7]\n : HMNoC_cluster_west_0/south_data_o_wght[7]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[7]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[7]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[7]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[7]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[7]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[7]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[7]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_west_0/east_data_i_iact0[7]\n : east_data_i_iact_inferred__0/out[7]\n : east_data_i_iact_inferred__0/in0[7]\n : east_data_i_iact_inferred/out[7]\n : east_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_east_0/west_data_o_iact[7]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[7]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[7]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[7]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[7]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[7]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_east_0/west_data_i_iact0[7]\n : west_data_i_iact_inferred__0/out[7]\n : west_data_i_iact_inferred__0/in0[7]\n : west_data_i_iact_inferred/out[7]\n : west_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_west_0/east_data_o_iact[7]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[7]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[7]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[7]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[7]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[7]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[7]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_east_1/west_data_i_iact[7]\n : east_data_o_iact_inferred__2/out[7]\n : east_data_o_iact_inferred__2/in0[7]\n : east_data_o_iact_inferred__1/out[7]\n : east_data_o_iact_inferred__1/in0[7]\n : HMNoC_cluster_west_1/east_data_o_iact0[7]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[7]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[7]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[7]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[7]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[7]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[7]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[7]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[7]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_west_1/east_data_i_iact0[7]\n : east_data_i_iact_inferred__2/out[7]\n : east_data_i_iact_inferred__2/in0[7]\n : east_data_i_iact_inferred__1/out[7]\n : east_data_i_iact_inferred__1/in0[7]\n : HMNoC_cluster_east_1/west_data_o_iact[7]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[7]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[7]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[7]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[7]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[7]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_east_0/south_data_i_iact0[7]\n : south_data_i_iact_inferred__2/out[7]\n : south_data_i_iact_inferred__2/in0[7]\n : south_data_i_iact_inferred__1/out[7]\n : south_data_i_iact_inferred__1/in0[7]\n : HMNoC_cluster_east_1/north_data_o_iact[7]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[7]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[7]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[7]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[7]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[7]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[7]\n : HMNoC_cluster_east_1/north_data_i_iact0[7]\n : north_data_i_iact_inferred__2/out[7]\n : north_data_i_iact_inferred__2/in0[7]\n : north_data_i_iact_inferred__1/out[7]\n : north_data_i_iact_inferred__1/in0[7]\n : HMNoC_cluster_east_0/south_data_o_iact[7]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[7]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[7]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[7]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[7]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[6]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[6]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[6]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[6]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[6]\n : HMNoC_cluster_west_0/south_data_i_wght0[6]\n : south_data_i_wght_inferred__0/out[6]\n : south_data_i_wght_inferred__0/in0[6]\n : south_data_i_wght_inferred/out[6]\n : south_data_i_wght_inferred/in0[6]\n : HMNoC_cluster_west_1/north_data_o_wght[6]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[6]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[6]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[6]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[6]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[6]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[6]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[6]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[6]\n : HMNoC_cluster_west_1/north_data_i_wght0[6]\n : north_data_i_wght_inferred__0/out[6]\n : north_data_i_wght_inferred__0/in0[6]\n : north_data_i_wght_inferred/out[6]\n : north_data_i_wght_inferred/in0[6]\n : HMNoC_cluster_west_0/south_data_o_wght[6]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[6]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[6]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[6]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[6]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[6]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[6]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[6]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_west_0/east_data_i_iact0[6]\n : east_data_i_iact_inferred__0/out[6]\n : east_data_i_iact_inferred__0/in0[6]\n : east_data_i_iact_inferred/out[6]\n : east_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_east_0/west_data_o_iact[6]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[6]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[6]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[6]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[6]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[6]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_east_0/west_data_i_iact0[6]\n : west_data_i_iact_inferred__0/out[6]\n : west_data_i_iact_inferred__0/in0[6]\n : west_data_i_iact_inferred/out[6]\n : west_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_west_0/east_data_o_iact[6]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[6]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[6]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[6]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[6]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[6]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[6]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_east_1/west_data_i_iact[6]\n : east_data_o_iact_inferred__2/out[6]\n : east_data_o_iact_inferred__2/in0[6]\n : east_data_o_iact_inferred__1/out[6]\n : east_data_o_iact_inferred__1/in0[6]\n : HMNoC_cluster_west_1/east_data_o_iact0[6]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[6]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[6]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[6]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[6]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[6]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[6]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[6]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[6]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_west_1/east_data_i_iact0[6]\n : east_data_i_iact_inferred__2/out[6]\n : east_data_i_iact_inferred__2/in0[6]\n : east_data_i_iact_inferred__1/out[6]\n : east_data_i_iact_inferred__1/in0[6]\n : HMNoC_cluster_east_1/west_data_o_iact[6]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[6]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[6]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[6]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[6]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[6]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_east_0/south_data_i_iact0[6]\n : south_data_i_iact_inferred__2/out[6]\n : south_data_i_iact_inferred__2/in0[6]\n : south_data_i_iact_inferred__1/out[6]\n : south_data_i_iact_inferred__1/in0[6]\n : HMNoC_cluster_east_1/north_data_o_iact[6]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[6]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[6]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[6]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[6]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[6]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[6]\n : HMNoC_cluster_east_1/north_data_i_iact0[6]\n : north_data_i_iact_inferred__2/out[6]\n : north_data_i_iact_inferred__2/in0[6]\n : north_data_i_iact_inferred__1/out[6]\n : north_data_i_iact_inferred__1/in0[6]\n : HMNoC_cluster_east_0/south_data_o_iact[6]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[6]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[6]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[6]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[6]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[5]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[5]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[5]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[5]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[5]\n : HMNoC_cluster_west_0/south_data_i_wght0[5]\n : south_data_i_wght_inferred__0/out[5]\n : south_data_i_wght_inferred__0/in0[5]\n : south_data_i_wght_inferred/out[5]\n : south_data_i_wght_inferred/in0[5]\n : HMNoC_cluster_west_1/north_data_o_wght[5]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[5]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[5]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[5]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[5]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[5]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[5]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[5]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[5]\n : HMNoC_cluster_west_1/north_data_i_wght0[5]\n : north_data_i_wght_inferred__0/out[5]\n : north_data_i_wght_inferred__0/in0[5]\n : north_data_i_wght_inferred/out[5]\n : north_data_i_wght_inferred/in0[5]\n : HMNoC_cluster_west_0/south_data_o_wght[5]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[5]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[5]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[5]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[5]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[5]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[5]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[5]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_west_0/east_data_i_iact0[5]\n : east_data_i_iact_inferred__0/out[5]\n : east_data_i_iact_inferred__0/in0[5]\n : east_data_i_iact_inferred/out[5]\n : east_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_east_0/west_data_o_iact[5]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[5]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[5]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[5]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[5]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[5]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_east_0/west_data_i_iact0[5]\n : west_data_i_iact_inferred__0/out[5]\n : west_data_i_iact_inferred__0/in0[5]\n : west_data_i_iact_inferred/out[5]\n : west_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_west_0/east_data_o_iact[5]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[5]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[5]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[5]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[5]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[5]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[5]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_east_1/west_data_i_iact[5]\n : east_data_o_iact_inferred__2/out[5]\n : east_data_o_iact_inferred__2/in0[5]\n : east_data_o_iact_inferred__1/out[5]\n : east_data_o_iact_inferred__1/in0[5]\n : HMNoC_cluster_west_1/east_data_o_iact0[5]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[5]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[5]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[5]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[5]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[5]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[5]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[5]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[5]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_west_1/east_data_i_iact0[5]\n : east_data_i_iact_inferred__2/out[5]\n : east_data_i_iact_inferred__2/in0[5]\n : east_data_i_iact_inferred__1/out[5]\n : east_data_i_iact_inferred__1/in0[5]\n : HMNoC_cluster_east_1/west_data_o_iact[5]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[5]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[5]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[5]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[5]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[5]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_east_0/south_data_i_iact0[5]\n : south_data_i_iact_inferred__2/out[5]\n : south_data_i_iact_inferred__2/in0[5]\n : south_data_i_iact_inferred__1/out[5]\n : south_data_i_iact_inferred__1/in0[5]\n : HMNoC_cluster_east_1/north_data_o_iact[5]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[5]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[5]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[5]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[5]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[5]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[5]\n : HMNoC_cluster_east_1/north_data_i_iact0[5]\n : north_data_i_iact_inferred__2/out[5]\n : north_data_i_iact_inferred__2/in0[5]\n : north_data_i_iact_inferred__1/out[5]\n : north_data_i_iact_inferred__1/in0[5]\n : HMNoC_cluster_east_0/south_data_o_iact[5]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[5]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[5]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[5]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[5]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[4]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[4]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[4]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[4]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[4]\n : HMNoC_cluster_west_0/south_data_i_wght0[4]\n : south_data_i_wght_inferred__0/out[4]\n : south_data_i_wght_inferred__0/in0[4]\n : south_data_i_wght_inferred/out[4]\n : south_data_i_wght_inferred/in0[4]\n : HMNoC_cluster_west_1/north_data_o_wght[4]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[4]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[4]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[4]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[4]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[4]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[4]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[4]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[4]\n : HMNoC_cluster_west_1/north_data_i_wght0[4]\n : north_data_i_wght_inferred__0/out[4]\n : north_data_i_wght_inferred__0/in0[4]\n : north_data_i_wght_inferred/out[4]\n : north_data_i_wght_inferred/in0[4]\n : HMNoC_cluster_west_0/south_data_o_wght[4]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[4]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[4]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[4]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[4]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[4]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[4]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[4]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_west_0/east_data_i_iact0[4]\n : east_data_i_iact_inferred__0/out[4]\n : east_data_i_iact_inferred__0/in0[4]\n : east_data_i_iact_inferred/out[4]\n : east_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_east_0/west_data_o_iact[4]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[4]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[4]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[4]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[4]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[4]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_east_0/west_data_i_iact0[4]\n : west_data_i_iact_inferred__0/out[4]\n : west_data_i_iact_inferred__0/in0[4]\n : west_data_i_iact_inferred/out[4]\n : west_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_west_0/east_data_o_iact[4]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[4]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[4]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[4]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[4]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[4]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[4]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_east_1/west_data_i_iact[4]\n : east_data_o_iact_inferred__2/out[4]\n : east_data_o_iact_inferred__2/in0[4]\n : east_data_o_iact_inferred__1/out[4]\n : east_data_o_iact_inferred__1/in0[4]\n : HMNoC_cluster_west_1/east_data_o_iact0[4]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[4]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[4]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[4]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[4]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[4]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[4]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[4]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[4]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_west_1/east_data_i_iact0[4]\n : east_data_i_iact_inferred__2/out[4]\n : east_data_i_iact_inferred__2/in0[4]\n : east_data_i_iact_inferred__1/out[4]\n : east_data_i_iact_inferred__1/in0[4]\n : HMNoC_cluster_east_1/west_data_o_iact[4]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[4]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[4]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[4]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[4]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[4]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_east_0/south_data_i_iact0[4]\n : south_data_i_iact_inferred__2/out[4]\n : south_data_i_iact_inferred__2/in0[4]\n : south_data_i_iact_inferred__1/out[4]\n : south_data_i_iact_inferred__1/in0[4]\n : HMNoC_cluster_east_1/north_data_o_iact[4]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[4]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[4]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[4]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[4]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[4]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[4]\n : HMNoC_cluster_east_1/north_data_i_iact0[4]\n : north_data_i_iact_inferred__2/out[4]\n : north_data_i_iact_inferred__2/in0[4]\n : north_data_i_iact_inferred__1/out[4]\n : north_data_i_iact_inferred__1/in0[4]\n : HMNoC_cluster_east_0/south_data_o_iact[4]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[4]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[4]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[4]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[4]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[3]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[3]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[3]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[3]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[3]\n : HMNoC_cluster_west_0/south_data_i_wght0[3]\n : south_data_i_wght_inferred__0/out[3]\n : south_data_i_wght_inferred__0/in0[3]\n : south_data_i_wght_inferred/out[3]\n : south_data_i_wght_inferred/in0[3]\n : HMNoC_cluster_west_1/north_data_o_wght[3]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[3]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[3]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[3]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[3]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[3]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[3]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[3]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[3]\n : HMNoC_cluster_west_1/north_data_i_wght0[3]\n : north_data_i_wght_inferred__0/out[3]\n : north_data_i_wght_inferred__0/in0[3]\n : north_data_i_wght_inferred/out[3]\n : north_data_i_wght_inferred/in0[3]\n : HMNoC_cluster_west_0/south_data_o_wght[3]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[3]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[3]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[3]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[3]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[3]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[3]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[3]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_west_0/east_data_i_iact0[3]\n : east_data_i_iact_inferred__0/out[3]\n : east_data_i_iact_inferred__0/in0[3]\n : east_data_i_iact_inferred/out[3]\n : east_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_east_0/west_data_o_iact[3]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[3]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[3]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[3]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[3]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[3]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_east_0/west_data_i_iact0[3]\n : west_data_i_iact_inferred__0/out[3]\n : west_data_i_iact_inferred__0/in0[3]\n : west_data_i_iact_inferred/out[3]\n : west_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_west_0/east_data_o_iact[3]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[3]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[3]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[3]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[3]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[3]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[3]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_east_1/west_data_i_iact[3]\n : east_data_o_iact_inferred__2/out[3]\n : east_data_o_iact_inferred__2/in0[3]\n : east_data_o_iact_inferred__1/out[3]\n : east_data_o_iact_inferred__1/in0[3]\n : HMNoC_cluster_west_1/east_data_o_iact0[3]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[3]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[3]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[3]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[3]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[3]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[3]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[3]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[3]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_west_1/east_data_i_iact0[3]\n : east_data_i_iact_inferred__2/out[3]\n : east_data_i_iact_inferred__2/in0[3]\n : east_data_i_iact_inferred__1/out[3]\n : east_data_i_iact_inferred__1/in0[3]\n : HMNoC_cluster_east_1/west_data_o_iact[3]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[3]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[3]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[3]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[3]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[3]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_east_0/south_data_i_iact0[3]\n : south_data_i_iact_inferred__2/out[3]\n : south_data_i_iact_inferred__2/in0[3]\n : south_data_i_iact_inferred__1/out[3]\n : south_data_i_iact_inferred__1/in0[3]\n : HMNoC_cluster_east_1/north_data_o_iact[3]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[3]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[3]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[3]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[3]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[3]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[3]\n : HMNoC_cluster_east_1/north_data_i_iact0[3]\n : north_data_i_iact_inferred__2/out[3]\n : north_data_i_iact_inferred__2/in0[3]\n : north_data_i_iact_inferred__1/out[3]\n : north_data_i_iact_inferred__1/in0[3]\n : HMNoC_cluster_east_0/south_data_o_iact[3]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[3]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[3]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[3]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[3]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[2]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[2]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[2]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[2]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[2]\n : HMNoC_cluster_west_0/south_data_i_wght0[2]\n : south_data_i_wght_inferred__0/out[2]\n : south_data_i_wght_inferred__0/in0[2]\n : south_data_i_wght_inferred/out[2]\n : south_data_i_wght_inferred/in0[2]\n : HMNoC_cluster_west_1/north_data_o_wght[2]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[2]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[2]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[2]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[2]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[2]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[2]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[2]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[2]\n : HMNoC_cluster_west_1/north_data_i_wght0[2]\n : north_data_i_wght_inferred__0/out[2]\n : north_data_i_wght_inferred__0/in0[2]\n : north_data_i_wght_inferred/out[2]\n : north_data_i_wght_inferred/in0[2]\n : HMNoC_cluster_west_0/south_data_o_wght[2]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[2]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[2]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[2]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[2]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[2]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[2]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[2]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_west_0/east_data_i_iact0[2]\n : east_data_i_iact_inferred__0/out[2]\n : east_data_i_iact_inferred__0/in0[2]\n : east_data_i_iact_inferred/out[2]\n : east_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_east_0/west_data_o_iact[2]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[2]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[2]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /out[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /out[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_o_iact_inferred /in0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data2[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /out[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /out[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/west_data_i_iact_inferred /in0[2]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/out[2]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/out[2]\n : HMNoC_cluster_east_0/west_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_east_0/west_data_i_iact0[2]\n : west_data_i_iact_inferred__0/out[2]\n : west_data_i_iact_inferred__0/in0[2]\n : west_data_i_iact_inferred/out[2]\n : west_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_west_0/east_data_o_iact[2]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/out[2]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred__0/in0[2]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/out[2]\n : HMNoC_cluster_west_0/east_data_o_iact_inferred/in0[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /out[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /out[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_o_iact_inferred /in0[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /out0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data2[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /out[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred__0 /in0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /out[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_i_iact_inferred /in0[2]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/out[2]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/out[2]\n : HMNoC_cluster_east_1/west_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_east_1/west_data_i_iact[2]\n : east_data_o_iact_inferred__2/out[2]\n : east_data_o_iact_inferred__2/in0[2]\n : east_data_o_iact_inferred__1/out[2]\n : east_data_o_iact_inferred__1/in0[2]\n : HMNoC_cluster_west_1/east_data_o_iact0[2]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/out[2]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred__0/in0[2]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/out[2]\n : HMNoC_cluster_west_1/east_data_o_iact_inferred/in0[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /out[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred__0 /in0[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /out[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_o_iact_inferred /in0[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /out0[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_iact/data_out_inferred /data3[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /out[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /out[2]\n : HMNoC_cluster_west_1/\\router_cluster_0/east_data_i_iact_inferred /in0[2]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/out[2]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred__0/in0[2]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/out[2]\n : HMNoC_cluster_west_1/east_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_west_1/east_data_i_iact0[2]\n : east_data_i_iact_inferred__2/out[2]\n : east_data_i_iact_inferred__2/in0[2]\n : east_data_i_iact_inferred__1/out[2]\n : east_data_i_iact_inferred__1/in0[2]\n : HMNoC_cluster_east_1/west_data_o_iact[2]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/out[2]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/out[2]\n : HMNoC_cluster_east_1/west_data_o_iact_inferred/in0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /out[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred__0 /in0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /out[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[2]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[2]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[2]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_east_0/south_data_i_iact0[2]\n : south_data_i_iact_inferred__2/out[2]\n : south_data_i_iact_inferred__2/in0[2]\n : south_data_i_iact_inferred__1/out[2]\n : south_data_i_iact_inferred__1/in0[2]\n : HMNoC_cluster_east_1/north_data_o_iact[2]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[2]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[2]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[2]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[2]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[2]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[2]\n : HMNoC_cluster_east_1/north_data_i_iact0[2]\n : north_data_i_iact_inferred__2/out[2]\n : north_data_i_iact_inferred__2/in0[2]\n : north_data_i_iact_inferred__1/out[2]\n : north_data_i_iact_inferred__1/in0[2]\n : HMNoC_cluster_east_0/south_data_o_iact[2]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[2]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[2]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[2]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[2]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /data1[1]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/out[1]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred__0/in0[1]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/out[1]\n : HMNoC_cluster_west_0/south_data_i_wght_inferred/in0[1]\n : HMNoC_cluster_west_0/south_data_i_wght0[1]\n : south_data_i_wght_inferred__0/out[1]\n : south_data_i_wght_inferred__0/in0[1]\n : south_data_i_wght_inferred/out[1]\n : south_data_i_wght_inferred/in0[1]\n : HMNoC_cluster_west_1/north_data_o_wght[1]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/out[1]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred__0/in0[1]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/out[1]\n : HMNoC_cluster_west_1/north_data_o_wght_inferred/in0[1]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /out0[1]\n : HMNoC_cluster_west_1/\\router_cluster_0/router_wght/data_out_inferred /data0[1]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/out[1]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred__0/in0[1]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/out[1]\n : HMNoC_cluster_west_1/north_data_i_wght_inferred/in0[1]\n : HMNoC_cluster_west_1/north_data_i_wght0[1]\n : north_data_i_wght_inferred__0/out[1]\n : north_data_i_wght_inferred__0/in0[1]\n : north_data_i_wght_inferred/out[1]\n : north_data_i_wght_inferred/in0[1]\n : HMNoC_cluster_west_0/south_data_o_wght[1]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/out[1]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred__0/in0[1]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/out[1]\n : HMNoC_cluster_west_0/south_data_o_wght_inferred/in0[1]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_wght/data_out_inferred /out0[1]\n : HMNoC_cluster_west_0/\\router_cluster_0/router_iact/data_out_inferred /data3[1]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /out[1]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred__0 /in0[1]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /out[1]\n : HMNoC_cluster_west_0/\\router_cluster_0/east_data_i_iact_inferred /in0[1]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/out[1]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred__0/in0[1]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/out[1]\n : HMNoC_cluster_west_0/east_data_i_iact_inferred/in0[1]\n : HMNoC_cluster_west_0/east_data_i_iact0[1]\n : east_data_i_iact_inferred__0/out[1]\n : east_data_i_iact_inferred__0/in0[1]\n : east_data_i_iact_inferred/out[1]\n : east_data_i_iact_inferred/in0[1]\n : HMNoC_cluster_east_0/west_data_o_iact[1]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/out[1]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred__0/in0[1]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/out[1]\n : HMNoC_cluster_east_0/west_data_o_iact_inferred/in0[1]\n : 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HMNoC_cluster_east_1/\\router_cluster_0/west_data_o_iact_inferred /in0[0]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[0]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /data1[0]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/out[0]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred__0/in0[0]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/out[0]\n : HMNoC_cluster_east_0/south_data_i_iact_inferred/in0[0]\n : HMNoC_cluster_east_0/south_data_i_iact0[0]\n : south_data_i_iact_inferred__2/out[0]\n : south_data_i_iact_inferred__2/in0[0]\n : south_data_i_iact_inferred__1/out[0]\n : south_data_i_iact_inferred__1/in0[0]\n : HMNoC_cluster_east_1/north_data_o_iact[0]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/out[0]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred__0/in0[0]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/out[0]\n : HMNoC_cluster_east_1/north_data_o_iact_inferred/in0[0]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /out0[0]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_iact/data_out_inferred /data0[0]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/out[0]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred__0/in0[0]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/out[0]\n : HMNoC_cluster_east_1/north_data_i_iact_inferred/in0[0]\n : HMNoC_cluster_east_1/north_data_i_iact0[0]\n : north_data_i_iact_inferred__2/out[0]\n : north_data_i_iact_inferred__2/in0[0]\n : north_data_i_iact_inferred__1/out[0]\n : north_data_i_iact_inferred__1/in0[0]\n : HMNoC_cluster_east_0/south_data_o_iact[0]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/out[0]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred__0/in0[0]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/out[0]\n : HMNoC_cluster_east_0/south_data_o_iact_inferred/in0[0]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_iact/data_out_inferred /out0[0]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[1]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[1]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[1]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[1]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[1]\n : HMNoC_cluster_east_1/north_data_i_wght0[1]\n : north_data_i_wght_inferred__2/out[1]\n : north_data_i_wght_inferred__2/in0[1]\n : north_data_i_wght_inferred__1/out[1]\n : north_data_i_wght_inferred__1/in0[1]\n : HMNoC_cluster_east_0/south_data_o_wght[1]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[1]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[1]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[1]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[1]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[1]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[1]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[1]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[1]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[1]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[1]\n : HMNoC_cluster_east_0/south_data_i_wght0[1]\n : south_data_i_wght_inferred__2/out[1]\n : south_data_i_wght_inferred__2/in0[1]\n : south_data_i_wght_inferred__1/out[1]\n : south_data_i_wght_inferred__1/in0[1]\n : HMNoC_cluster_east_1/north_data_o_wght[1]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[1]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[1]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[1]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[1]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[1]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[3]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[3]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[3]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[3]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[3]\n : HMNoC_cluster_east_1/north_data_i_wght0[3]\n : north_data_i_wght_inferred__2/out[3]\n : north_data_i_wght_inferred__2/in0[3]\n : north_data_i_wght_inferred__1/out[3]\n : north_data_i_wght_inferred__1/in0[3]\n : HMNoC_cluster_east_0/south_data_o_wght[3]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[3]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[3]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[3]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[3]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[3]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[3]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[3]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[3]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[3]\n : HMNoC_cluster_east_0/south_data_i_wght0[3]\n : south_data_i_wght_inferred__2/out[3]\n : south_data_i_wght_inferred__2/in0[3]\n : south_data_i_wght_inferred__1/out[3]\n : south_data_i_wght_inferred__1/in0[3]\n : HMNoC_cluster_east_1/north_data_o_wght[3]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[3]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[3]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[3]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[3]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[7]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[7]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[7]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[7]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[7]\n : HMNoC_cluster_east_1/north_data_i_wght0[7]\n : north_data_i_wght_inferred__2/out[7]\n : north_data_i_wght_inferred__2/in0[7]\n : north_data_i_wght_inferred__1/out[7]\n : north_data_i_wght_inferred__1/in0[7]\n : HMNoC_cluster_east_0/south_data_o_wght[7]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[7]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[7]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[7]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[7]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[7]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[7]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[7]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[7]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[7]\n : HMNoC_cluster_east_0/south_data_i_wght0[7]\n : south_data_i_wght_inferred__2/out[7]\n : south_data_i_wght_inferred__2/in0[7]\n : south_data_i_wght_inferred__1/out[7]\n : south_data_i_wght_inferred__1/in0[7]\n : HMNoC_cluster_east_1/north_data_o_wght[7]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[7]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[7]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[7]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[7]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[11]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[11]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[11]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[11]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[11]\n : HMNoC_cluster_east_1/north_data_i_wght0[11]\n : north_data_i_wght_inferred__2/out[11]\n : north_data_i_wght_inferred__2/in0[11]\n : north_data_i_wght_inferred__1/out[11]\n : north_data_i_wght_inferred__1/in0[11]\n : HMNoC_cluster_east_0/south_data_o_wght[11]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[11]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[11]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[11]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[11]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[11]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[11]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[11]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[11]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[11]\n : HMNoC_cluster_east_0/south_data_i_wght0[11]\n : south_data_i_wght_inferred__2/out[11]\n : south_data_i_wght_inferred__2/in0[11]\n : south_data_i_wght_inferred__1/out[11]\n : south_data_i_wght_inferred__1/in0[11]\n : HMNoC_cluster_east_1/north_data_o_wght[11]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[11]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[11]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[11]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[11]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[12]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[12]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[12]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[12]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[12]\n : HMNoC_cluster_east_1/north_data_i_wght0[12]\n : north_data_i_wght_inferred__2/out[12]\n : north_data_i_wght_inferred__2/in0[12]\n : north_data_i_wght_inferred__1/out[12]\n : north_data_i_wght_inferred__1/in0[12]\n : HMNoC_cluster_east_0/south_data_o_wght[12]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[12]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[12]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[12]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[12]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[12]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[12]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[12]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[12]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[12]\n : HMNoC_cluster_east_0/south_data_i_wght0[12]\n : south_data_i_wght_inferred__2/out[12]\n : south_data_i_wght_inferred__2/in0[12]\n : south_data_i_wght_inferred__1/out[12]\n : south_data_i_wght_inferred__1/in0[12]\n : HMNoC_cluster_east_1/north_data_o_wght[12]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[12]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[12]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[12]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[12]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[14]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[14]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[14]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[14]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[14]\n : HMNoC_cluster_east_1/north_data_i_wght0[14]\n : north_data_i_wght_inferred__2/out[14]\n : north_data_i_wght_inferred__2/in0[14]\n : north_data_i_wght_inferred__1/out[14]\n : north_data_i_wght_inferred__1/in0[14]\n : HMNoC_cluster_east_0/south_data_o_wght[14]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[14]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[14]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[14]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[14]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[14]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[14]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[14]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[14]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[14]\n : HMNoC_cluster_east_0/south_data_i_wght0[14]\n : south_data_i_wght_inferred__2/out[14]\n : south_data_i_wght_inferred__2/in0[14]\n : south_data_i_wght_inferred__1/out[14]\n : south_data_i_wght_inferred__1/in0[14]\n : HMNoC_cluster_east_1/north_data_o_wght[14]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[14]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[14]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[14]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[14]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[15]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[15]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[15]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[15]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[15]\n : HMNoC_cluster_east_1/north_data_i_wght0[15]\n : north_data_i_wght_inferred__2/out[15]\n : north_data_i_wght_inferred__2/in0[15]\n : north_data_i_wght_inferred__1/out[15]\n : north_data_i_wght_inferred__1/in0[15]\n : HMNoC_cluster_east_0/south_data_o_wght[15]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[15]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[15]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[15]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[15]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[15]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[15]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[15]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[15]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[15]\n : HMNoC_cluster_east_0/south_data_i_wght0[15]\n : south_data_i_wght_inferred__2/out[15]\n : south_data_i_wght_inferred__2/in0[15]\n : south_data_i_wght_inferred__1/out[15]\n : south_data_i_wght_inferred__1/in0[15]\n : HMNoC_cluster_east_1/north_data_o_wght[15]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[15]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[15]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[15]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[15]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[0]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[0]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[0]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[0]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[0]\n : HMNoC_cluster_east_1/north_data_i_wght0[0]\n : north_data_i_wght_inferred__2/out[0]\n : north_data_i_wght_inferred__2/in0[0]\n : north_data_i_wght_inferred__1/out[0]\n : north_data_i_wght_inferred__1/in0[0]\n : HMNoC_cluster_east_0/south_data_o_wght[0]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[0]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[0]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[0]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[0]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[0]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[0]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[0]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[0]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[0]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[0]\n : HMNoC_cluster_east_0/south_data_i_wght0[0]\n : south_data_i_wght_inferred__2/out[0]\n : south_data_i_wght_inferred__2/in0[0]\n : south_data_i_wght_inferred__1/out[0]\n : south_data_i_wght_inferred__1/in0[0]\n : HMNoC_cluster_east_1/north_data_o_wght[0]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[0]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[0]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[0]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[0]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[0]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[2]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[2]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[2]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[2]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[2]\n : HMNoC_cluster_east_1/north_data_i_wght0[2]\n : north_data_i_wght_inferred__2/out[2]\n : north_data_i_wght_inferred__2/in0[2]\n : north_data_i_wght_inferred__1/out[2]\n : north_data_i_wght_inferred__1/in0[2]\n : HMNoC_cluster_east_0/south_data_o_wght[2]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[2]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[2]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[2]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[2]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[2]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[2]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[2]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[2]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[2]\n : HMNoC_cluster_east_0/south_data_i_wght0[2]\n : south_data_i_wght_inferred__2/out[2]\n : south_data_i_wght_inferred__2/in0[2]\n : south_data_i_wght_inferred__1/out[2]\n : south_data_i_wght_inferred__1/in0[2]\n : HMNoC_cluster_east_1/north_data_o_wght[2]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[2]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[2]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[2]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[2]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[4]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[4]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[4]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[4]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[4]\n : HMNoC_cluster_east_1/north_data_i_wght0[4]\n : north_data_i_wght_inferred__2/out[4]\n : north_data_i_wght_inferred__2/in0[4]\n : north_data_i_wght_inferred__1/out[4]\n : north_data_i_wght_inferred__1/in0[4]\n : HMNoC_cluster_east_0/south_data_o_wght[4]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[4]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[4]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[4]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[4]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[4]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[4]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[4]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[4]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[4]\n : HMNoC_cluster_east_0/south_data_i_wght0[4]\n : south_data_i_wght_inferred__2/out[4]\n : south_data_i_wght_inferred__2/in0[4]\n : south_data_i_wght_inferred__1/out[4]\n : south_data_i_wght_inferred__1/in0[4]\n : HMNoC_cluster_east_1/north_data_o_wght[4]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[4]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[4]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[4]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[4]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[5]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[5]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[5]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[5]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[5]\n : HMNoC_cluster_east_1/north_data_i_wght0[5]\n : north_data_i_wght_inferred__2/out[5]\n : north_data_i_wght_inferred__2/in0[5]\n : north_data_i_wght_inferred__1/out[5]\n : north_data_i_wght_inferred__1/in0[5]\n : HMNoC_cluster_east_0/south_data_o_wght[5]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[5]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[5]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[5]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[5]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[5]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[5]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[5]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[5]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[5]\n : HMNoC_cluster_east_0/south_data_i_wght0[5]\n : south_data_i_wght_inferred__2/out[5]\n : south_data_i_wght_inferred__2/in0[5]\n : south_data_i_wght_inferred__1/out[5]\n : south_data_i_wght_inferred__1/in0[5]\n : HMNoC_cluster_east_1/north_data_o_wght[5]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[5]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[5]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[5]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[5]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[6]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[6]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[6]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[6]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[6]\n : HMNoC_cluster_east_1/north_data_i_wght0[6]\n : north_data_i_wght_inferred__2/out[6]\n : north_data_i_wght_inferred__2/in0[6]\n : north_data_i_wght_inferred__1/out[6]\n : north_data_i_wght_inferred__1/in0[6]\n : HMNoC_cluster_east_0/south_data_o_wght[6]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[6]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[6]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[6]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[6]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[6]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[6]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[6]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[6]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[6]\n : HMNoC_cluster_east_0/south_data_i_wght0[6]\n : south_data_i_wght_inferred__2/out[6]\n : south_data_i_wght_inferred__2/in0[6]\n : south_data_i_wght_inferred__1/out[6]\n : south_data_i_wght_inferred__1/in0[6]\n : HMNoC_cluster_east_1/north_data_o_wght[6]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[6]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[6]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[6]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[6]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[8]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[8]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[8]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[8]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[8]\n : HMNoC_cluster_east_1/north_data_i_wght0[8]\n : north_data_i_wght_inferred__2/out[8]\n : north_data_i_wght_inferred__2/in0[8]\n : north_data_i_wght_inferred__1/out[8]\n : north_data_i_wght_inferred__1/in0[8]\n : HMNoC_cluster_east_0/south_data_o_wght[8]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[8]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[8]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[8]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[8]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[8]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[8]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[8]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[8]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[8]\n : HMNoC_cluster_east_0/south_data_i_wght0[8]\n : south_data_i_wght_inferred__2/out[8]\n : south_data_i_wght_inferred__2/in0[8]\n : south_data_i_wght_inferred__1/out[8]\n : south_data_i_wght_inferred__1/in0[8]\n : HMNoC_cluster_east_1/north_data_o_wght[8]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[8]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[8]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[8]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[8]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[9]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[9]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[9]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[9]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[9]\n : HMNoC_cluster_east_1/north_data_i_wght0[9]\n : north_data_i_wght_inferred__2/out[9]\n : north_data_i_wght_inferred__2/in0[9]\n : north_data_i_wght_inferred__1/out[9]\n : north_data_i_wght_inferred__1/in0[9]\n : HMNoC_cluster_east_0/south_data_o_wght[9]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[9]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[9]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[9]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[9]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[9]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[9]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[9]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[9]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[9]\n : HMNoC_cluster_east_0/south_data_i_wght0[9]\n : south_data_i_wght_inferred__2/out[9]\n : south_data_i_wght_inferred__2/in0[9]\n : south_data_i_wght_inferred__1/out[9]\n : south_data_i_wght_inferred__1/in0[9]\n : HMNoC_cluster_east_1/north_data_o_wght[9]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[9]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[9]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[9]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[9]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[10]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[10]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[10]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[10]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[10]\n : HMNoC_cluster_east_1/north_data_i_wght0[10]\n : north_data_i_wght_inferred__2/out[10]\n : north_data_i_wght_inferred__2/in0[10]\n : north_data_i_wght_inferred__1/out[10]\n : north_data_i_wght_inferred__1/in0[10]\n : HMNoC_cluster_east_0/south_data_o_wght[10]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[10]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[10]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[10]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[10]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[10]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[10]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[10]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[10]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[10]\n : HMNoC_cluster_east_0/south_data_i_wght0[10]\n : south_data_i_wght_inferred__2/out[10]\n : south_data_i_wght_inferred__2/in0[10]\n : south_data_i_wght_inferred__1/out[10]\n : south_data_i_wght_inferred__1/in0[10]\n : HMNoC_cluster_east_1/north_data_o_wght[10]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[10]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[10]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[10]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[10]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /data0[13]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/out[13]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred__0/in0[13]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/out[13]\n : HMNoC_cluster_east_1/north_data_i_wght_inferred/in0[13]\n : HMNoC_cluster_east_1/north_data_i_wght0[13]\n : north_data_i_wght_inferred__2/out[13]\n : north_data_i_wght_inferred__2/in0[13]\n : north_data_i_wght_inferred__1/out[13]\n : north_data_i_wght_inferred__1/in0[13]\n : HMNoC_cluster_east_0/south_data_o_wght[13]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/out[13]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred__0/in0[13]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/out[13]\n : HMNoC_cluster_east_0/south_data_o_wght_inferred/in0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /out0[13]\n : HMNoC_cluster_east_0/\\router_cluster_0/router_wght/data_out_inferred /data1[13]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/out[13]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred__0/in0[13]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/out[13]\n : HMNoC_cluster_east_0/south_data_i_wght_inferred/in0[13]\n : HMNoC_cluster_east_0/south_data_i_wght0[13]\n : south_data_i_wght_inferred__2/out[13]\n : south_data_i_wght_inferred__2/in0[13]\n : south_data_i_wght_inferred__1/out[13]\n : south_data_i_wght_inferred__1/in0[13]\n : HMNoC_cluster_east_1/north_data_o_wght[13]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/out[13]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred__0/in0[13]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/out[13]\n : HMNoC_cluster_east_1/north_data_o_wght_inferred/in0[13]\n : HMNoC_cluster_east_1/\\router_cluster_0/router_wght/data_out_inferred /out0[13]\n---------------------------------------------------------------------------------\nFinished Timing Optimization : Time (s): cpu = 00:00:54 ; elapsed = 00:01:02 . Memory (MB): peak = 2125.828 ; gain = 1864.645\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart ROM, RAM, DSP and Shift Register Reporting\n---------------------------------------------------------------------------------\n\nDistributed RAM: Final Mapping Report\n+----------------------------------+-------------------------------------------------------+-----------+----------------------+-------------------------------+\n|Module Name | RTL Object | Inference | Size (Depth x Width) | Primitives | \n+----------------------------------+-------------------------------------------------------+-----------+----------------------+-------------------------------+\n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[0].gen_Y[0].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[0].gen_Y[1].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[0].gen_Y[2].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[1].gen_Y[0].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[1].gen_Y[1].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[1].gen_Y[2].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[2].gen_Y[0].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[2].gen_Y[1].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0/pe_cluster_0 | gen_X[2].gen_Y[2].pe/spad_pe0/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0 | GLB_cluster_0/glb_iact_gen[0].glb_iact_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0 | GLB_cluster_0/glb_psum_gen[0].glb_psum_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_west_0 | GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_east_0 | GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n|HMNoC_cluster_east_1 | GLB_cluster_0/glb_wght_gen[0].glb_weight_inst/mem_reg | Implied | 512 x 16 | RAM64X1D x 16 RAM64M8 x 16 | \n+----------------------------------+-------------------------------------------------------+-----------+----------------------+-------------------------------+\n\n---------------------------------------------------------------------------------\nFinished ROM, RAM, DSP and Shift Register Reporting\n---------------------------------------------------------------------------------\n\nReport RTL Partitions: \n+-+--------------+------------+----------+\n| |RTL Partition |Replication |Instances |\n+-+--------------+------------+----------+\n+-+--------------+------------+----------+\n---------------------------------------------------------------------------------\nStart Technology Mapping\n---------------------------------------------------------------------------------\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[13]\n : east_data_i_psum_inferred__0/out[13]\n : east_data_i_psum_inferred__0/in0[13]\n : east_data_i_psum_inferred/out[13]\n : east_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[13]\n : west_data_i_psum_inferred__0/out[13]\n : west_data_i_psum_inferred__0/in0[13]\n : west_data_i_psum_inferred/out[13]\n : west_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[13]\n : south_data_i_psum_inferred__2/out[13]\n : south_data_i_psum_inferred__2/in0[13]\n : south_data_i_psum_inferred__1/out[13]\n : south_data_i_psum_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[13]\n : north_data_o_psum_inferred__2/out[13]\n : north_data_o_psum_inferred__2/in0[13]\n : north_data_o_psum_inferred__1/out[13]\n : north_data_o_psum_inferred__1/in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[12]\n : east_data_i_psum_inferred__0/out[12]\n : east_data_i_psum_inferred__0/in0[12]\n : east_data_i_psum_inferred/out[12]\n : east_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[12]\n : west_data_i_psum_inferred__0/out[12]\n : west_data_i_psum_inferred__0/in0[12]\n : west_data_i_psum_inferred/out[12]\n : west_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[12]\n : south_data_i_psum_inferred__2/out[12]\n : south_data_i_psum_inferred__2/in0[12]\n : south_data_i_psum_inferred__1/out[12]\n : south_data_i_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[12]\n : north_data_o_psum_inferred__2/out[12]\n : north_data_o_psum_inferred__2/in0[12]\n : north_data_o_psum_inferred__1/out[12]\n : north_data_o_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[11]\n : east_data_i_psum_inferred__0/out[11]\n : east_data_i_psum_inferred__0/in0[11]\n : east_data_i_psum_inferred/out[11]\n : east_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[11]\n : west_data_i_psum_inferred__0/out[11]\n : west_data_i_psum_inferred__0/in0[11]\n : west_data_i_psum_inferred/out[11]\n : west_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[11]\n : south_data_i_psum_inferred__2/out[11]\n : south_data_i_psum_inferred__2/in0[11]\n : south_data_i_psum_inferred__1/out[11]\n : south_data_i_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[11]\n : north_data_o_psum_inferred__2/out[11]\n : north_data_o_psum_inferred__2/in0[11]\n : north_data_o_psum_inferred__1/out[11]\n : north_data_o_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[10]\n : east_data_i_psum_inferred__0/out[10]\n : east_data_i_psum_inferred__0/in0[10]\n : east_data_i_psum_inferred/out[10]\n : east_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[10]\n : west_data_i_psum_inferred__0/out[10]\n : west_data_i_psum_inferred__0/in0[10]\n : west_data_i_psum_inferred/out[10]\n : west_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[10]\n : south_data_i_psum_inferred__2/out[10]\n : south_data_i_psum_inferred__2/in0[10]\n : south_data_i_psum_inferred__1/out[10]\n : south_data_i_psum_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[10]\n : north_data_o_psum_inferred__2/out[10]\n : north_data_o_psum_inferred__2/in0[10]\n : north_data_o_psum_inferred__1/out[10]\n : north_data_o_psum_inferred__1/in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[9]\n : east_data_i_psum_inferred__0/out[9]\n : east_data_i_psum_inferred__0/in0[9]\n : east_data_i_psum_inferred/out[9]\n : east_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[9]\n : west_data_i_psum_inferred__0/out[9]\n : west_data_i_psum_inferred__0/in0[9]\n : west_data_i_psum_inferred/out[9]\n : west_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[9]\n : south_data_i_psum_inferred__2/out[9]\n : south_data_i_psum_inferred__2/in0[9]\n : south_data_i_psum_inferred__1/out[9]\n : south_data_i_psum_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[9]\n : north_data_o_psum_inferred__2/out[9]\n : north_data_o_psum_inferred__2/in0[9]\n : north_data_o_psum_inferred__1/out[9]\n : north_data_o_psum_inferred__1/in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[8]\n : east_data_i_psum_inferred__0/out[8]\n : east_data_i_psum_inferred__0/in0[8]\n : east_data_i_psum_inferred/out[8]\n : east_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[8]\n : west_data_i_psum_inferred__0/out[8]\n : west_data_i_psum_inferred__0/in0[8]\n : west_data_i_psum_inferred/out[8]\n : west_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[8]\n : south_data_i_psum_inferred__2/out[8]\n : south_data_i_psum_inferred__2/in0[8]\n : south_data_i_psum_inferred__1/out[8]\n : south_data_i_psum_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[8]\n : north_data_o_psum_inferred__2/out[8]\n : north_data_o_psum_inferred__2/in0[8]\n : north_data_o_psum_inferred__1/out[8]\n : north_data_o_psum_inferred__1/in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[7]\n : east_data_i_psum_inferred__0/out[7]\n : east_data_i_psum_inferred__0/in0[7]\n : east_data_i_psum_inferred/out[7]\n : east_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[7]\n : west_data_i_psum_inferred__0/out[7]\n : west_data_i_psum_inferred__0/in0[7]\n : west_data_i_psum_inferred/out[7]\n : west_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[7]\n : south_data_i_psum_inferred__2/out[7]\n : south_data_i_psum_inferred__2/in0[7]\n : south_data_i_psum_inferred__1/out[7]\n : south_data_i_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[7]\n : north_data_o_psum_inferred__2/out[7]\n : north_data_o_psum_inferred__2/in0[7]\n : north_data_o_psum_inferred__1/out[7]\n : north_data_o_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[6]\n : east_data_i_psum_inferred__0/out[6]\n : east_data_i_psum_inferred__0/in0[6]\n : east_data_i_psum_inferred/out[6]\n : east_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[6]\n : west_data_i_psum_inferred__0/out[6]\n : west_data_i_psum_inferred__0/in0[6]\n : west_data_i_psum_inferred/out[6]\n : west_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[6]\n : south_data_i_psum_inferred__2/out[6]\n : south_data_i_psum_inferred__2/in0[6]\n : south_data_i_psum_inferred__1/out[6]\n : south_data_i_psum_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[6]\n : north_data_o_psum_inferred__2/out[6]\n : north_data_o_psum_inferred__2/in0[6]\n : north_data_o_psum_inferred__1/out[6]\n : north_data_o_psum_inferred__1/in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[5]\n : east_data_i_psum_inferred__0/out[5]\n : east_data_i_psum_inferred__0/in0[5]\n : east_data_i_psum_inferred/out[5]\n : east_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[5]\n : west_data_i_psum_inferred__0/out[5]\n : west_data_i_psum_inferred__0/in0[5]\n : west_data_i_psum_inferred/out[5]\n : west_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[5]\n : south_data_i_psum_inferred__2/out[5]\n : south_data_i_psum_inferred__2/in0[5]\n : south_data_i_psum_inferred__1/out[5]\n : south_data_i_psum_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[5]\n : north_data_o_psum_inferred__2/out[5]\n : north_data_o_psum_inferred__2/in0[5]\n : north_data_o_psum_inferred__1/out[5]\n : north_data_o_psum_inferred__1/in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[4]\n : east_data_i_psum_inferred__0/out[4]\n : east_data_i_psum_inferred__0/in0[4]\n : east_data_i_psum_inferred/out[4]\n : east_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[4]\n : west_data_i_psum_inferred__0/out[4]\n : west_data_i_psum_inferred__0/in0[4]\n : west_data_i_psum_inferred/out[4]\n : west_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[4]\n : south_data_i_psum_inferred__2/out[4]\n : south_data_i_psum_inferred__2/in0[4]\n : south_data_i_psum_inferred__1/out[4]\n : south_data_i_psum_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[4]\n : north_data_o_psum_inferred__2/out[4]\n : north_data_o_psum_inferred__2/in0[4]\n : north_data_o_psum_inferred__1/out[4]\n : north_data_o_psum_inferred__1/in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[3]\n : east_data_i_psum_inferred__0/out[3]\n : east_data_i_psum_inferred__0/in0[3]\n : east_data_i_psum_inferred/out[3]\n : east_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[3]\n : west_data_i_psum_inferred__0/out[3]\n : west_data_i_psum_inferred__0/in0[3]\n : west_data_i_psum_inferred/out[3]\n : west_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[3]\n : south_data_i_psum_inferred__2/out[3]\n : south_data_i_psum_inferred__2/in0[3]\n : south_data_i_psum_inferred__1/out[3]\n : south_data_i_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[3]\n : north_data_o_psum_inferred__2/out[3]\n : north_data_o_psum_inferred__2/in0[3]\n : north_data_o_psum_inferred__1/out[3]\n : north_data_o_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[2]\n : east_data_i_psum_inferred__0/out[2]\n : east_data_i_psum_inferred__0/in0[2]\n : east_data_i_psum_inferred/out[2]\n : east_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[2]\n : west_data_i_psum_inferred__0/out[2]\n : west_data_i_psum_inferred__0/in0[2]\n : west_data_i_psum_inferred/out[2]\n : west_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[2]\n : south_data_i_psum_inferred__2/out[2]\n : south_data_i_psum_inferred__2/in0[2]\n : south_data_i_psum_inferred__1/out[2]\n : south_data_i_psum_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[2]\n : north_data_o_psum_inferred__2/out[2]\n : north_data_o_psum_inferred__2/in0[2]\n : north_data_o_psum_inferred__1/out[2]\n : north_data_o_psum_inferred__1/in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[1]\n : east_data_i_psum_inferred__0/out[1]\n : east_data_i_psum_inferred__0/in0[1]\n : east_data_i_psum_inferred/out[1]\n : east_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[1]\n : west_data_i_psum_inferred__0/out[1]\n : west_data_i_psum_inferred__0/in0[1]\n : west_data_i_psum_inferred/out[1]\n : west_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[1]\n : south_data_i_psum_inferred__2/out[1]\n : south_data_i_psum_inferred__2/in0[1]\n : south_data_i_psum_inferred__1/out[1]\n : south_data_i_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[1]\n : north_data_o_psum_inferred__2/out[1]\n : north_data_o_psum_inferred__2/in0[1]\n : north_data_o_psum_inferred__1/out[1]\n : north_data_o_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[0]\n : east_data_i_psum_inferred__0/out[0]\n : east_data_i_psum_inferred__0/in0[0]\n : east_data_i_psum_inferred/out[0]\n : east_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[0]\n : west_data_i_psum_inferred__0/out[0]\n : west_data_i_psum_inferred__0/in0[0]\n : west_data_i_psum_inferred/out[0]\n : west_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[0]\n : south_data_i_psum_inferred__2/out[0]\n : south_data_i_psum_inferred__2/in0[0]\n : south_data_i_psum_inferred__1/out[0]\n : south_data_i_psum_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[0]\n : north_data_o_psum_inferred__2/out[0]\n : north_data_o_psum_inferred__2/in0[0]\n : north_data_o_psum_inferred__1/out[0]\n : north_data_o_psum_inferred__1/in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[0]\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1624 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1624 /I0 (LUT2)\n 2: i_2236/O (LUT5)\n 3: i_2236/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[0]\n : south_data_i_wght_inferred__0/out[0]\n : south_data_i_wght_inferred__0/in0[0]\n : south_data_i_wght_inferred/out[0]\n : south_data_i_wght_inferred/in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[0]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1855 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1855 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1839 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1839 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[0]\n : north_data_i_wght_inferred__0/out[0]\n : north_data_i_wght_inferred__0/in0[0]\n : north_data_i_wght_inferred/out[0]\n : north_data_i_wght_inferred/in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[0]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1624 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1624 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 /I0 (LUT2)\n 2: i_2252/O (LUT5)\n 3: i_2252/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[0]\n : east_data_i_iact_inferred__0/out[0]\n : east_data_i_iact_inferred__0/in0[0]\n : east_data_i_iact_inferred/out[0]\n : east_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[0]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1992 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1992 /I0 (LUT2)\n 6: i_2363/O (LUT5)\n 7: i_2363/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[0]\n : west_data_i_iact_inferred__0/out[0]\n : west_data_i_iact_inferred__0/in0[0]\n : west_data_i_iact_inferred/out[0]\n : west_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[0]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1992 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1992 /I0 (LUT2)\n 2: i_2363/O (LUT5)\n 3: i_2363/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[0]\n : west_data_i_iact_inferred__0/out[0]\n : west_data_i_iact_inferred__0/in0[0]\n : west_data_i_iact_inferred/out[0]\n : west_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[0]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1992 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1656 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2136 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2136 /I0 (LUT2)\n 2: i_2429/O (LUT5)\n 3: i_2429/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[0]\n : east_data_o_iact_inferred__2/out[0]\n : east_data_o_iact_inferred__2/in0[0]\n : east_data_o_iact_inferred__1/out[0]\n : east_data_o_iact_inferred__1/in0[0]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[0]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1887 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1887 /I0 (LUT2)\n 6: i_2322/O (LUT5)\n 7: i_2322/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[0]\n : east_data_i_iact_inferred__2/out[0]\n : east_data_i_iact_inferred__2/in0[0]\n : east_data_i_iact_inferred__1/out[0]\n : east_data_i_iact_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[0]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2136 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2136 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1625 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1625 /I0 (LUT2)\n 2: i_2237/O (LUT5)\n 3: i_2237/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[1]\n : south_data_i_wght_inferred__0/out[1]\n : south_data_i_wght_inferred__0/in0[1]\n : south_data_i_wght_inferred/out[1]\n : south_data_i_wght_inferred/in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[1]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1856 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1856 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1840 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1840 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[1]\n : north_data_i_wght_inferred__0/out[1]\n : north_data_i_wght_inferred__0/in0[1]\n : north_data_i_wght_inferred/out[1]\n : north_data_i_wght_inferred/in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[1]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1625 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1625 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1657 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1657 /I0 (LUT2)\n 2: i_2253/O (LUT5)\n 3: i_2253/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[1]\n : south_data_i_iact_inferred__0/out[1]\n : south_data_i_iact_inferred__0/in0[1]\n : south_data_i_iact_inferred/out[1]\n : south_data_i_iact_inferred/in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[1]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1888 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1888 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1872 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1872 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[1]\n : north_data_i_iact_inferred__0/out[1]\n : north_data_i_iact_inferred__0/in0[1]\n : north_data_i_iact_inferred/out[1]\n : north_data_i_iact_inferred/in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[1]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1657 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1657 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2137 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2137 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2121 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2121 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[1]\n : north_data_i_iact_inferred__2/out[1]\n : north_data_i_iact_inferred__2/in0[1]\n : north_data_i_iact_inferred__1/out[1]\n : north_data_i_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[1]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1993 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1993 /I0 (LUT2)\n 6: i_2364/O (LUT5)\n 7: i_2364/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[1]\n : south_data_i_iact_inferred__2/out[1]\n : south_data_i_iact_inferred__2/in0[1]\n : south_data_i_iact_inferred__1/out[1]\n : south_data_i_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[1]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2137 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2137 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1657 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1657 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1888 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1888 /I0 (LUT2)\n 2: i_2323/O (LUT5)\n 3: i_2323/I2 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[1]\n : east_data_i_iact_inferred__2/out[1]\n : east_data_i_iact_inferred__2/in0[1]\n : east_data_i_iact_inferred__1/out[1]\n : east_data_i_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[1]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2137 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2137 /I0 (LUT2)\n 6: i_2430/O (LUT5)\n 7: i_2430/I2 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[1]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[1]\n : east_data_o_iact_inferred__2/out[1]\n : east_data_o_iact_inferred__2/in0[1]\n : east_data_o_iact_inferred__1/out[1]\n : east_data_o_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[1]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1888 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1888 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1626 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1626 /I0 (LUT2)\n 2: i_2238/O (LUT5)\n 3: i_2238/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[2]\n : south_data_i_wght_inferred__0/out[2]\n : south_data_i_wght_inferred__0/in0[2]\n : south_data_i_wght_inferred/out[2]\n : south_data_i_wght_inferred/in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[2]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1857 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1857 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1841 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1841 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[2]\n : north_data_i_wght_inferred__0/out[2]\n : north_data_i_wght_inferred__0/in0[2]\n : north_data_i_wght_inferred/out[2]\n : north_data_i_wght_inferred/in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[2]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1626 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1626 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 /I0 (LUT2)\n 2: i_2254/O (LUT5)\n 3: i_2254/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[2]\n : east_data_i_iact_inferred__0/out[2]\n : east_data_i_iact_inferred__0/in0[2]\n : east_data_i_iact_inferred/out[2]\n : east_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[2]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1994 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1994 /I0 (LUT2)\n 6: i_2365/O (LUT5)\n 7: i_2365/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[2]\n : west_data_i_iact_inferred__0/out[2]\n : west_data_i_iact_inferred__0/in0[2]\n : west_data_i_iact_inferred/out[2]\n : west_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[2]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1994 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1994 /I0 (LUT2)\n 2: i_2365/O (LUT5)\n 3: i_2365/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[2]\n : west_data_i_iact_inferred__0/out[2]\n : west_data_i_iact_inferred__0/in0[2]\n : west_data_i_iact_inferred/out[2]\n : west_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[2]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1994 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1658 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2138 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2138 /I0 (LUT2)\n 2: i_2431/O (LUT5)\n 3: i_2431/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[2]\n : east_data_o_iact_inferred__2/out[2]\n : east_data_o_iact_inferred__2/in0[2]\n : east_data_o_iact_inferred__1/out[2]\n : east_data_o_iact_inferred__1/in0[2]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[2]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1889 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1889 /I0 (LUT2)\n 6: i_2324/O (LUT5)\n 7: i_2324/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[2]\n : east_data_i_iact_inferred__2/out[2]\n : east_data_i_iact_inferred__2/in0[2]\n : east_data_i_iact_inferred__1/out[2]\n : east_data_i_iact_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[2]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2138 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2138 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1627 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1627 /I0 (LUT2)\n 2: i_2239/O (LUT5)\n 3: i_2239/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[3]\n : south_data_i_wght_inferred__0/out[3]\n : south_data_i_wght_inferred__0/in0[3]\n : south_data_i_wght_inferred/out[3]\n : south_data_i_wght_inferred/in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[3]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1858 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1858 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1842 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1842 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[3]\n : north_data_i_wght_inferred__0/out[3]\n : north_data_i_wght_inferred__0/in0[3]\n : north_data_i_wght_inferred/out[3]\n : north_data_i_wght_inferred/in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[3]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1627 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1627 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1659 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1659 /I0 (LUT2)\n 2: i_2255/O (LUT5)\n 3: i_2255/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[3]\n : south_data_i_iact_inferred__0/out[3]\n : south_data_i_iact_inferred__0/in0[3]\n : south_data_i_iact_inferred/out[3]\n : south_data_i_iact_inferred/in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[3]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1890 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1890 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1874 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1874 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[3]\n : north_data_i_iact_inferred__0/out[3]\n : north_data_i_iact_inferred__0/in0[3]\n : north_data_i_iact_inferred/out[3]\n : north_data_i_iact_inferred/in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[3]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1659 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1659 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2139 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2139 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2123 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2123 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[3]\n : north_data_i_iact_inferred__2/out[3]\n : north_data_i_iact_inferred__2/in0[3]\n : north_data_i_iact_inferred__1/out[3]\n : north_data_i_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[3]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1995 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1995 /I0 (LUT2)\n 6: i_2366/O (LUT5)\n 7: i_2366/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[3]\n : south_data_i_iact_inferred__2/out[3]\n : south_data_i_iact_inferred__2/in0[3]\n : south_data_i_iact_inferred__1/out[3]\n : south_data_i_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[3]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2139 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2139 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1659 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1659 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1890 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1890 /I0 (LUT2)\n 2: i_2325/O (LUT5)\n 3: i_2325/I2 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[3]\n : east_data_i_iact_inferred__2/out[3]\n : east_data_i_iact_inferred__2/in0[3]\n : east_data_i_iact_inferred__1/out[3]\n : east_data_i_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[3]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2139 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2139 /I0 (LUT2)\n 6: i_2432/O (LUT5)\n 7: i_2432/I2 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[3]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[3]\n : east_data_o_iact_inferred__2/out[3]\n : east_data_o_iact_inferred__2/in0[3]\n : east_data_o_iact_inferred__1/out[3]\n : east_data_o_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[3]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1890 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1890 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1628 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1628 /I0 (LUT2)\n 2: i_2240/O (LUT5)\n 3: i_2240/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[4]\n : south_data_i_wght_inferred__0/out[4]\n : south_data_i_wght_inferred__0/in0[4]\n : south_data_i_wght_inferred/out[4]\n : south_data_i_wght_inferred/in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[4]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1859 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1859 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1843 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1843 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[4]\n : north_data_i_wght_inferred__0/out[4]\n : north_data_i_wght_inferred__0/in0[4]\n : north_data_i_wght_inferred/out[4]\n : north_data_i_wght_inferred/in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[4]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1628 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1628 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 /I0 (LUT2)\n 2: i_2256/O (LUT5)\n 3: i_2256/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[4]\n : east_data_i_iact_inferred__0/out[4]\n : east_data_i_iact_inferred__0/in0[4]\n : east_data_i_iact_inferred/out[4]\n : east_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[4]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1996 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1996 /I0 (LUT2)\n 6: i_2367/O (LUT5)\n 7: i_2367/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[4]\n : west_data_i_iact_inferred__0/out[4]\n : west_data_i_iact_inferred__0/in0[4]\n : west_data_i_iact_inferred/out[4]\n : west_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[4]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1996 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1996 /I0 (LUT2)\n 2: i_2367/O (LUT5)\n 3: i_2367/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[4]\n : west_data_i_iact_inferred__0/out[4]\n : west_data_i_iact_inferred__0/in0[4]\n : west_data_i_iact_inferred/out[4]\n : west_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[4]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1996 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1660 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2140 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2140 /I0 (LUT2)\n 2: i_2433/O (LUT5)\n 3: i_2433/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[4]\n : east_data_o_iact_inferred__2/out[4]\n : east_data_o_iact_inferred__2/in0[4]\n : east_data_o_iact_inferred__1/out[4]\n : east_data_o_iact_inferred__1/in0[4]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[4]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1891 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1891 /I0 (LUT2)\n 6: i_2326/O (LUT5)\n 7: i_2326/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[4]\n : east_data_i_iact_inferred__2/out[4]\n : east_data_i_iact_inferred__2/in0[4]\n : east_data_i_iact_inferred__1/out[4]\n : east_data_i_iact_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[4]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2140 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2140 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1629 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1629 /I0 (LUT2)\n 2: i_2241/O (LUT5)\n 3: i_2241/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[5]\n : south_data_i_wght_inferred__0/out[5]\n : south_data_i_wght_inferred__0/in0[5]\n : south_data_i_wght_inferred/out[5]\n : south_data_i_wght_inferred/in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[5]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1860 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1860 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1844 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1844 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[5]\n : north_data_i_wght_inferred__0/out[5]\n : north_data_i_wght_inferred__0/in0[5]\n : north_data_i_wght_inferred/out[5]\n : north_data_i_wght_inferred/in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[5]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1629 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1629 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 /I0 (LUT2)\n 2: i_2257/O (LUT5)\n 3: i_2257/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[5]\n : east_data_i_iact_inferred__0/out[5]\n : east_data_i_iact_inferred__0/in0[5]\n : east_data_i_iact_inferred/out[5]\n : east_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[5]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1997 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1997 /I0 (LUT2)\n 6: i_2368/O (LUT5)\n 7: i_2368/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[5]\n : west_data_i_iact_inferred__0/out[5]\n : west_data_i_iact_inferred__0/in0[5]\n : west_data_i_iact_inferred/out[5]\n : west_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[5]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1997 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1997 /I0 (LUT2)\n 2: i_2368/O (LUT5)\n 3: i_2368/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[5]\n : west_data_i_iact_inferred__0/out[5]\n : west_data_i_iact_inferred__0/in0[5]\n : west_data_i_iact_inferred/out[5]\n : west_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[5]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1997 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1661 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2141 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2141 /I0 (LUT2)\n 2: i_2434/O (LUT5)\n 3: i_2434/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[5]\n : east_data_o_iact_inferred__2/out[5]\n : east_data_o_iact_inferred__2/in0[5]\n : east_data_o_iact_inferred__1/out[5]\n : east_data_o_iact_inferred__1/in0[5]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[5]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1892 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1892 /I0 (LUT2)\n 6: i_2327/O (LUT5)\n 7: i_2327/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[5]\n : east_data_i_iact_inferred__2/out[5]\n : east_data_i_iact_inferred__2/in0[5]\n : east_data_i_iact_inferred__1/out[5]\n : east_data_i_iact_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[5]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2141 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2141 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1630 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1630 /I0 (LUT2)\n 2: i_2242/O (LUT5)\n 3: i_2242/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[6]\n : south_data_i_wght_inferred__0/out[6]\n : south_data_i_wght_inferred__0/in0[6]\n : south_data_i_wght_inferred/out[6]\n : south_data_i_wght_inferred/in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[6]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1861 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1861 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1845 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1845 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[6]\n : north_data_i_wght_inferred__0/out[6]\n : north_data_i_wght_inferred__0/in0[6]\n : north_data_i_wght_inferred/out[6]\n : north_data_i_wght_inferred/in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[6]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1630 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1630 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 /I0 (LUT2)\n 2: i_2258/O (LUT5)\n 3: i_2258/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[6]\n : east_data_i_iact_inferred__0/out[6]\n : east_data_i_iact_inferred__0/in0[6]\n : east_data_i_iact_inferred/out[6]\n : east_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[6]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1998 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1998 /I0 (LUT2)\n 6: i_2369/O (LUT5)\n 7: i_2369/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[6]\n : west_data_i_iact_inferred__0/out[6]\n : west_data_i_iact_inferred__0/in0[6]\n : west_data_i_iact_inferred/out[6]\n : west_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[6]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1998 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1998 /I0 (LUT2)\n 2: i_2369/O (LUT5)\n 3: i_2369/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[6]\n : west_data_i_iact_inferred__0/out[6]\n : west_data_i_iact_inferred__0/in0[6]\n : west_data_i_iact_inferred/out[6]\n : west_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[6]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1998 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1662 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2142 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2142 /I0 (LUT2)\n 2: i_2435/O (LUT5)\n 3: i_2435/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[6]\n : east_data_o_iact_inferred__2/out[6]\n : east_data_o_iact_inferred__2/in0[6]\n : east_data_o_iact_inferred__1/out[6]\n : east_data_o_iact_inferred__1/in0[6]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[6]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1893 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1893 /I0 (LUT2)\n 6: i_2328/O (LUT5)\n 7: i_2328/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[6]\n : east_data_i_iact_inferred__2/out[6]\n : east_data_i_iact_inferred__2/in0[6]\n : east_data_i_iact_inferred__1/out[6]\n : east_data_i_iact_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[6]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2142 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2142 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1631 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1631 /I0 (LUT2)\n 2: i_2243/O (LUT5)\n 3: i_2243/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[7]\n : south_data_i_wght_inferred__0/out[7]\n : south_data_i_wght_inferred__0/in0[7]\n : south_data_i_wght_inferred/out[7]\n : south_data_i_wght_inferred/in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[7]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1862 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1862 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1846 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1846 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[7]\n : north_data_i_wght_inferred__0/out[7]\n : north_data_i_wght_inferred__0/in0[7]\n : north_data_i_wght_inferred/out[7]\n : north_data_i_wght_inferred/in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[7]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1631 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1631 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1663 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1663 /I0 (LUT2)\n 2: i_2259/O (LUT5)\n 3: i_2259/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[7]\n : south_data_i_iact_inferred__0/out[7]\n : south_data_i_iact_inferred__0/in0[7]\n : south_data_i_iact_inferred/out[7]\n : south_data_i_iact_inferred/in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[7]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1894 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1894 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1878 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1878 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[7]\n : north_data_i_iact_inferred__0/out[7]\n : north_data_i_iact_inferred__0/in0[7]\n : north_data_i_iact_inferred/out[7]\n : north_data_i_iact_inferred/in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[7]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1663 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1663 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2143 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2143 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2127 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2127 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[7]\n : north_data_i_iact_inferred__2/out[7]\n : north_data_i_iact_inferred__2/in0[7]\n : north_data_i_iact_inferred__1/out[7]\n : north_data_i_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[7]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1999 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_1999 /I0 (LUT2)\n 6: i_2370/O (LUT5)\n 7: i_2370/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[7]\n : south_data_i_iact_inferred__2/out[7]\n : south_data_i_iact_inferred__2/in0[7]\n : south_data_i_iact_inferred__1/out[7]\n : south_data_i_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[7]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2143 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2143 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1663 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1663 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1894 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1894 /I0 (LUT2)\n 2: i_2329/O (LUT5)\n 3: i_2329/I2 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[7]\n : east_data_i_iact_inferred__2/out[7]\n : east_data_i_iact_inferred__2/in0[7]\n : east_data_i_iact_inferred__1/out[7]\n : east_data_i_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[7]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2143 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2143 /I0 (LUT2)\n 6: i_2436/O (LUT5)\n 7: i_2436/I2 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[7]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[7]\n : east_data_o_iact_inferred__2/out[7]\n : east_data_o_iact_inferred__2/in0[7]\n : east_data_o_iact_inferred__1/out[7]\n : east_data_o_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[7]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1894 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1894 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1632 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1632 /I0 (LUT2)\n 2: i_2244/O (LUT5)\n 3: i_2244/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[8]\n : south_data_i_wght_inferred__0/out[8]\n : south_data_i_wght_inferred__0/in0[8]\n : south_data_i_wght_inferred/out[8]\n : south_data_i_wght_inferred/in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[8]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1863 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1863 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1847 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1847 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[8]\n : north_data_i_wght_inferred__0/out[8]\n : north_data_i_wght_inferred__0/in0[8]\n : north_data_i_wght_inferred/out[8]\n : north_data_i_wght_inferred/in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[8]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1632 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1632 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 /I0 (LUT2)\n 2: i_2260/O (LUT5)\n 3: i_2260/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[8]\n : east_data_i_iact_inferred__0/out[8]\n : east_data_i_iact_inferred__0/in0[8]\n : east_data_i_iact_inferred/out[8]\n : east_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[8]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2000 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2000 /I0 (LUT2)\n 6: i_2371/O (LUT5)\n 7: i_2371/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[8]\n : west_data_i_iact_inferred__0/out[8]\n : west_data_i_iact_inferred__0/in0[8]\n : west_data_i_iact_inferred/out[8]\n : west_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[8]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2000 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2000 /I0 (LUT2)\n 2: i_2371/O (LUT5)\n 3: i_2371/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[8]\n : west_data_i_iact_inferred__0/out[8]\n : west_data_i_iact_inferred__0/in0[8]\n : west_data_i_iact_inferred/out[8]\n : west_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[8]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2000 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1664 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2144 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2144 /I0 (LUT2)\n 2: i_2437/O (LUT5)\n 3: i_2437/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[8]\n : east_data_o_iact_inferred__2/out[8]\n : east_data_o_iact_inferred__2/in0[8]\n : east_data_o_iact_inferred__1/out[8]\n : east_data_o_iact_inferred__1/in0[8]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[8]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1895 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1895 /I0 (LUT2)\n 6: i_2330/O (LUT5)\n 7: i_2330/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[8]\n : east_data_i_iact_inferred__2/out[8]\n : east_data_i_iact_inferred__2/in0[8]\n : east_data_i_iact_inferred__1/out[8]\n : east_data_i_iact_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[8]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2144 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2144 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1633 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1633 /I0 (LUT2)\n 2: i_2245/O (LUT5)\n 3: i_2245/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[9]\n : south_data_i_wght_inferred__0/out[9]\n : south_data_i_wght_inferred__0/in0[9]\n : south_data_i_wght_inferred/out[9]\n : south_data_i_wght_inferred/in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[9]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1864 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1864 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1848 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1848 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[9]\n : north_data_i_wght_inferred__0/out[9]\n : north_data_i_wght_inferred__0/in0[9]\n : north_data_i_wght_inferred/out[9]\n : north_data_i_wght_inferred/in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[9]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1633 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1633 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 /I0 (LUT2)\n 2: i_2261/O (LUT5)\n 3: i_2261/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[9]\n : east_data_i_iact_inferred__0/out[9]\n : east_data_i_iact_inferred__0/in0[9]\n : east_data_i_iact_inferred/out[9]\n : east_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[9]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2001 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2001 /I0 (LUT2)\n 6: i_2372/O (LUT5)\n 7: i_2372/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[9]\n : west_data_i_iact_inferred__0/out[9]\n : west_data_i_iact_inferred__0/in0[9]\n : west_data_i_iact_inferred/out[9]\n : west_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[9]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2001 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2001 /I0 (LUT2)\n 2: i_2372/O (LUT5)\n 3: i_2372/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[9]\n : west_data_i_iact_inferred__0/out[9]\n : west_data_i_iact_inferred__0/in0[9]\n : west_data_i_iact_inferred/out[9]\n : west_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[9]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2001 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1665 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2145 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2145 /I0 (LUT2)\n 2: i_2438/O (LUT5)\n 3: i_2438/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[9]\n : east_data_o_iact_inferred__2/out[9]\n : east_data_o_iact_inferred__2/in0[9]\n : east_data_o_iact_inferred__1/out[9]\n : east_data_o_iact_inferred__1/in0[9]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[9]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1896 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1896 /I0 (LUT2)\n 6: i_2331/O (LUT5)\n 7: i_2331/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[9]\n : east_data_i_iact_inferred__2/out[9]\n : east_data_i_iact_inferred__2/in0[9]\n : east_data_i_iact_inferred__1/out[9]\n : east_data_i_iact_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[9]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2145 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2145 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1634 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1634 /I0 (LUT2)\n 2: i_2246/O (LUT5)\n 3: i_2246/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[10]\n : south_data_i_wght_inferred__0/out[10]\n : south_data_i_wght_inferred__0/in0[10]\n : south_data_i_wght_inferred/out[10]\n : south_data_i_wght_inferred/in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[10]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1865 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1865 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1849 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1849 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[10]\n : north_data_i_wght_inferred__0/out[10]\n : north_data_i_wght_inferred__0/in0[10]\n : north_data_i_wght_inferred/out[10]\n : north_data_i_wght_inferred/in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[10]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1634 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1634 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 /I0 (LUT2)\n 2: i_2262/O (LUT5)\n 3: i_2262/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[10]\n : east_data_i_iact_inferred__0/out[10]\n : east_data_i_iact_inferred__0/in0[10]\n : east_data_i_iact_inferred/out[10]\n : east_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[10]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2002 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2002 /I0 (LUT2)\n 6: i_2373/O (LUT5)\n 7: i_2373/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[10]\n : west_data_i_iact_inferred__0/out[10]\n : west_data_i_iact_inferred__0/in0[10]\n : west_data_i_iact_inferred/out[10]\n : west_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[10]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2002 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2002 /I0 (LUT2)\n 2: i_2373/O (LUT5)\n 3: i_2373/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[10]\n : west_data_i_iact_inferred__0/out[10]\n : west_data_i_iact_inferred__0/in0[10]\n : west_data_i_iact_inferred/out[10]\n : west_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[10]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2002 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1666 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2146 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2146 /I0 (LUT2)\n 2: i_2439/O (LUT5)\n 3: i_2439/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[10]\n : east_data_o_iact_inferred__2/out[10]\n : east_data_o_iact_inferred__2/in0[10]\n : east_data_o_iact_inferred__1/out[10]\n : east_data_o_iact_inferred__1/in0[10]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[10]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1897 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1897 /I0 (LUT2)\n 6: i_2332/O (LUT5)\n 7: i_2332/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[10]\n : east_data_i_iact_inferred__2/out[10]\n : east_data_i_iact_inferred__2/in0[10]\n : east_data_i_iact_inferred__1/out[10]\n : east_data_i_iact_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[10]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2146 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2146 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1635 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1635 /I0 (LUT2)\n 2: i_2247/O (LUT5)\n 3: i_2247/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[11]\n : south_data_i_wght_inferred__0/out[11]\n : south_data_i_wght_inferred__0/in0[11]\n : south_data_i_wght_inferred/out[11]\n : south_data_i_wght_inferred/in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[11]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1866 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1866 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1850 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1850 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[11]\n : north_data_i_wght_inferred__0/out[11]\n : north_data_i_wght_inferred__0/in0[11]\n : north_data_i_wght_inferred/out[11]\n : north_data_i_wght_inferred/in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[11]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1635 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1635 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1667 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1667 /I0 (LUT2)\n 2: i_2263/O (LUT5)\n 3: i_2263/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[11]\n : south_data_i_iact_inferred__0/out[11]\n : south_data_i_iact_inferred__0/in0[11]\n : south_data_i_iact_inferred/out[11]\n : south_data_i_iact_inferred/in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[11]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1898 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1898 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1882 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1882 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[11]\n : north_data_i_iact_inferred__0/out[11]\n : north_data_i_iact_inferred__0/in0[11]\n : north_data_i_iact_inferred/out[11]\n : north_data_i_iact_inferred/in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[11]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1667 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1667 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2147 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2147 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2131 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2131 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[11]\n : north_data_i_iact_inferred__2/out[11]\n : north_data_i_iact_inferred__2/in0[11]\n : north_data_i_iact_inferred__1/out[11]\n : north_data_i_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[11]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2003 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2003 /I0 (LUT2)\n 6: i_2374/O (LUT5)\n 7: i_2374/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[11]\n : south_data_i_iact_inferred__2/out[11]\n : south_data_i_iact_inferred__2/in0[11]\n : south_data_i_iact_inferred__1/out[11]\n : south_data_i_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[11]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2147 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2147 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1667 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1667 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1898 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1898 /I0 (LUT2)\n 2: i_2333/O (LUT5)\n 3: i_2333/I2 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[11]\n : east_data_i_iact_inferred__2/out[11]\n : east_data_i_iact_inferred__2/in0[11]\n : east_data_i_iact_inferred__1/out[11]\n : east_data_i_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[11]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2147 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2147 /I0 (LUT2)\n 6: i_2440/O (LUT5)\n 7: i_2440/I2 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[11]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[11]\n : east_data_o_iact_inferred__2/out[11]\n : east_data_o_iact_inferred__2/in0[11]\n : east_data_o_iact_inferred__1/out[11]\n : east_data_o_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[11]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1898 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1898 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1636 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1636 /I0 (LUT2)\n 2: i_2248/O (LUT5)\n 3: i_2248/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[12]\n : south_data_i_wght_inferred__0/out[12]\n : south_data_i_wght_inferred__0/in0[12]\n : south_data_i_wght_inferred/out[12]\n : south_data_i_wght_inferred/in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[12]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1867 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1867 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1851 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1851 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[12]\n : north_data_i_wght_inferred__0/out[12]\n : north_data_i_wght_inferred__0/in0[12]\n : north_data_i_wght_inferred/out[12]\n : north_data_i_wght_inferred/in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[12]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1636 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1636 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1668 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1668 /I0 (LUT2)\n 2: i_2264/O (LUT5)\n 3: i_2264/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[12]\n : south_data_i_iact_inferred__0/out[12]\n : south_data_i_iact_inferred__0/in0[12]\n : south_data_i_iact_inferred/out[12]\n : south_data_i_iact_inferred/in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[12]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1899 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1899 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1883 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1883 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[12]\n : north_data_i_iact_inferred__0/out[12]\n : north_data_i_iact_inferred__0/in0[12]\n : north_data_i_iact_inferred/out[12]\n : north_data_i_iact_inferred/in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[12]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1668 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1668 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2148 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2148 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2132 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2132 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[12]\n : north_data_i_iact_inferred__2/out[12]\n : north_data_i_iact_inferred__2/in0[12]\n : north_data_i_iact_inferred__1/out[12]\n : north_data_i_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[12]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2004 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2004 /I0 (LUT2)\n 6: i_2375/O (LUT5)\n 7: i_2375/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[12]\n : south_data_i_iact_inferred__2/out[12]\n : south_data_i_iact_inferred__2/in0[12]\n : south_data_i_iact_inferred__1/out[12]\n : south_data_i_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[12]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2148 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2148 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1668 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1668 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1899 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1899 /I0 (LUT2)\n 2: i_2334/O (LUT5)\n 3: i_2334/I2 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[12]\n : east_data_i_iact_inferred__2/out[12]\n : east_data_i_iact_inferred__2/in0[12]\n : east_data_i_iact_inferred__1/out[12]\n : east_data_i_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[12]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2148 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2148 /I0 (LUT2)\n 6: i_2441/O (LUT5)\n 7: i_2441/I2 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[12]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[12]\n : east_data_o_iact_inferred__2/out[12]\n : east_data_o_iact_inferred__2/in0[12]\n : east_data_o_iact_inferred__1/out[12]\n : east_data_o_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[12]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1899 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1899 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1637 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1637 /I0 (LUT2)\n 2: i_2249/O (LUT5)\n 3: i_2249/I2 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[13]\n : south_data_i_wght_inferred__0/out[13]\n : south_data_i_wght_inferred__0/in0[13]\n : south_data_i_wght_inferred/out[13]\n : south_data_i_wght_inferred/in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[13]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1868 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1868 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1852 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1852 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[13]\n : north_data_i_wght_inferred__0/out[13]\n : north_data_i_wght_inferred__0/in0[13]\n : north_data_i_wght_inferred/out[13]\n : north_data_i_wght_inferred/in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[13]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1637 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1637 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 /I0 (LUT2)\n 2: i_2265/O (LUT5)\n 3: i_2265/I3 (LUT5)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[13]\n : east_data_i_iact_inferred__0/out[13]\n : east_data_i_iact_inferred__0/in0[13]\n : east_data_i_iact_inferred/out[13]\n : east_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[13]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2005 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2005 /I0 (LUT2)\n 6: i_2376/O (LUT5)\n 7: i_2376/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[13]\n : west_data_i_iact_inferred__0/out[13]\n : west_data_i_iact_inferred__0/in0[13]\n : west_data_i_iact_inferred/out[13]\n : west_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[13]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2005 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2005 /I0 (LUT2)\n 2: i_2376/O (LUT5)\n 3: i_2376/I3 (LUT5)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[13]\n : west_data_i_iact_inferred__0/out[13]\n : west_data_i_iact_inferred__0/in0[13]\n : west_data_i_iact_inferred/out[13]\n : west_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[13]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2005 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1669 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2149 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2149 /I0 (LUT2)\n 2: i_2442/O (LUT5)\n 3: i_2442/I3 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[13]\n : east_data_o_iact_inferred__2/out[13]\n : east_data_o_iact_inferred__2/in0[13]\n : east_data_o_iact_inferred__1/out[13]\n : east_data_o_iact_inferred__1/in0[13]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[13]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1900 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1900 /I0 (LUT2)\n 6: i_2335/O (LUT5)\n 7: i_2335/I3 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[13]\n : east_data_i_iact_inferred__2/out[13]\n : east_data_i_iact_inferred__2/in0[13]\n : east_data_i_iact_inferred__1/out[13]\n : east_data_i_iact_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[13]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2149 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2149 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1638 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1638 /I0 (LUT2)\n 2: i_2250/O (LUT5)\n 3: i_2250/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[14]\n : south_data_i_wght_inferred__0/out[14]\n : south_data_i_wght_inferred__0/in0[14]\n : south_data_i_wght_inferred/out[14]\n : south_data_i_wght_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[14]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1869 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1869 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1853 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1853 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[14]\n : north_data_i_wght_inferred__0/out[14]\n : north_data_i_wght_inferred__0/in0[14]\n : north_data_i_wght_inferred/out[14]\n : north_data_i_wght_inferred/in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[14]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1638 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1638 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1670 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1670 /I0 (LUT2)\n 2: i_2266/O (LUT5)\n 3: i_2266/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[14]\n : south_data_i_iact_inferred__0/out[14]\n : south_data_i_iact_inferred__0/in0[14]\n : south_data_i_iact_inferred/out[14]\n : south_data_i_iact_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[14]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1901 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1901 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1885 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1885 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[14]\n : north_data_i_iact_inferred__0/out[14]\n : north_data_i_iact_inferred__0/in0[14]\n : north_data_i_iact_inferred/out[14]\n : north_data_i_iact_inferred/in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[14]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1670 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1670 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2150 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2150 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2134 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2134 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[14]\n : north_data_i_iact_inferred__2/out[14]\n : north_data_i_iact_inferred__2/in0[14]\n : north_data_i_iact_inferred__1/out[14]\n : north_data_i_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[14]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2006 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2006 /I0 (LUT2)\n 6: i_2377/O (LUT5)\n 7: i_2377/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[14]\n : south_data_i_iact_inferred__2/out[14]\n : south_data_i_iact_inferred__2/in0[14]\n : south_data_i_iact_inferred__1/out[14]\n : south_data_i_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[14]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2150 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2150 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1670 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1670 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1901 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1901 /I0 (LUT2)\n 2: i_2336/O (LUT5)\n 3: i_2336/I2 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[14]\n : east_data_i_iact_inferred__2/out[14]\n : east_data_i_iact_inferred__2/in0[14]\n : east_data_i_iact_inferred__1/out[14]\n : east_data_i_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[14]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2150 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2150 /I0 (LUT2)\n 6: i_2443/O (LUT5)\n 7: i_2443/I2 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[14]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[14]\n : east_data_o_iact_inferred__2/out[14]\n : east_data_o_iact_inferred__2/in0[14]\n : east_data_o_iact_inferred__1/out[14]\n : east_data_o_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[14]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1901 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1901 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1639 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1639 /I0 (LUT2)\n 2: i_2251/O (LUT5)\n 3: i_2251/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[15]\n : south_data_i_wght_inferred__0/out[15]\n : south_data_i_wght_inferred__0/in0[15]\n : south_data_i_wght_inferred/out[15]\n : south_data_i_wght_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[15]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1870 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1870 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1854 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_wght/i_1854 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[15]\n : north_data_i_wght_inferred__0/out[15]\n : north_data_i_wght_inferred__0/in0[15]\n : north_data_i_wght_inferred/out[15]\n : north_data_i_wght_inferred/in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[15]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1639 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_wght/i_1639 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1671 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1671 /I0 (LUT2)\n 2: i_2267/O (LUT5)\n 3: i_2267/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[15]\n : south_data_i_iact_inferred__0/out[15]\n : south_data_i_iact_inferred__0/in0[15]\n : south_data_i_iact_inferred/out[15]\n : south_data_i_iact_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[15]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1902 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1902 /I1 (LUT2)\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1886 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1886 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[15]\n : north_data_i_iact_inferred__0/out[15]\n : north_data_i_iact_inferred__0/in0[15]\n : north_data_i_iact_inferred/out[15]\n : north_data_i_iact_inferred/in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[15]\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1671 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1671 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2151 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2151 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2135 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2135 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[15]\n : north_data_i_iact_inferred__2/out[15]\n : north_data_i_iact_inferred__2/in0[15]\n : north_data_i_iact_inferred__1/out[15]\n : north_data_i_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[15]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2007 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_iact/i_2007 /I0 (LUT2)\n 6: i_2378/O (LUT5)\n 7: i_2378/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[15]\n : south_data_i_iact_inferred__2/out[15]\n : south_data_i_iact_inferred__2/in0[15]\n : south_data_i_iact_inferred__1/out[15]\n : south_data_i_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[15]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2151 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2151 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1671 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_iact/i_1671 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1902 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1902 /I0 (LUT2)\n 2: i_2337/O (LUT5)\n 3: i_2337/I2 (LUT5)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[15]\n : east_data_i_iact_inferred__2/out[15]\n : east_data_i_iact_inferred__2/in0[15]\n : east_data_i_iact_inferred__1/out[15]\n : east_data_i_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[15]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2151 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_iact/i_2151 /I0 (LUT2)\n 6: i_2444/O (LUT5)\n 7: i_2444/I2 (LUT5)\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_i_iact_inferred /in0[15]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/west_data_i_iact_inferred /in0[15]\n : east_data_o_iact_inferred__2/out[15]\n : east_data_o_iact_inferred__2/in0[15]\n : east_data_o_iact_inferred__1/out[15]\n : east_data_o_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/east_data_o_iact_inferred /in0[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_iact_inferred /in0[15]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1902 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_iact/i_1902 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1903 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1903 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[0]\n : north_data_i_psum_inferred__0/out[0]\n : north_data_i_psum_inferred__0/in0[0]\n : north_data_i_psum_inferred/out[0]\n : north_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[0]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1677 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1677 /I0 (LUT3)\n 6: i_2447/O (LUT2)\n 7: i_2447/I0 (LUT2)\n 8: i_2268/O (LUT4)\n 9: i_2268/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[0]\n : south_data_i_psum_inferred__0/out[0]\n : south_data_i_psum_inferred__0/in0[0]\n : south_data_i_psum_inferred/out[0]\n : south_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[0]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1677 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1677 /I0 (LUT3)\n 2: i_2447/O (LUT2)\n 3: i_2447/I0 (LUT2)\n 4: i_2268/O (LUT4)\n 5: i_2268/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[0]\n : south_data_i_psum_inferred__0/out[0]\n : south_data_i_psum_inferred__0/in0[0]\n : south_data_i_psum_inferred/out[0]\n : south_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[0]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1677 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2024 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2024 /I0 (LUT2)\n 2: i_2379/O (LUT5)\n 3: i_2379/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[0]\n : west_data_i_psum_inferred__0/out[0]\n : west_data_i_psum_inferred__0/in0[0]\n : west_data_i_psum_inferred/out[0]\n : west_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[0]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1677 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1677 /O (LUT3)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2024 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1919 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 /I0 (LUT2)\n 2: i_2380/O (LUT5)\n 3: i_2380/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[1]\n : south_data_i_psum_inferred__2/out[1]\n : south_data_i_psum_inferred__2/in0[1]\n : south_data_i_psum_inferred__1/out[1]\n : south_data_i_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[1]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2057 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2057 /I1 (LUT2)\n 6: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2041 /O (LUT2)\n 7: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2041 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[1]\n : south_data_o_psum_inferred__2/out[1]\n : south_data_o_psum_inferred__2/in0[1]\n : south_data_o_psum_inferred__1/out[1]\n : south_data_o_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[1]\n 8: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1920 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1920 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1904 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1904 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[1]\n : north_data_i_psum_inferred__0/out[1]\n : north_data_i_psum_inferred__0/in0[1]\n : north_data_i_psum_inferred/out[1]\n : north_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[1]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1678 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1678 /I0 (LUT3)\n 6: i_2448/O (LUT2)\n 7: i_2448/I0 (LUT2)\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1672 /O (LUT4)\n 9: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1672 /I1 (LUT4)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[1]\n : east_data_i_psum_inferred__0/out[1]\n : east_data_i_psum_inferred__0/in0[1]\n : east_data_i_psum_inferred/out[1]\n : east_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[1]\n 10: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 /O (LUT2)\n 11: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2025 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1920 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2057 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2057 /I0 (LUT2)\n 2: i_2396/O (LUT5)\n 3: i_2396/I2 (LUT5)\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /in0[1]\n : west_data_i_psum_inferred__2/out[1]\n : west_data_i_psum_inferred__2/in0[1]\n : west_data_i_psum_inferred__1/out[1]\n : west_data_i_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /in0[1]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1920 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1920 /I0 (LUT2)\n 6: i_2339/O (LUT5)\n 7: i_2339/I2 (LUT5)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[1]\n : east_data_i_psum_inferred__2/out[1]\n : east_data_i_psum_inferred__2/in0[1]\n : east_data_i_psum_inferred__1/out[1]\n : east_data_i_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[1]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2057 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2057 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1905 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1905 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[2]\n : north_data_i_psum_inferred__0/out[2]\n : north_data_i_psum_inferred__0/in0[2]\n : north_data_i_psum_inferred/out[2]\n : north_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[2]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1679 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1679 /I0 (LUT3)\n 6: i_2449/O (LUT2)\n 7: i_2449/I0 (LUT2)\n 8: i_2269/O (LUT4)\n 9: i_2269/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[2]\n : south_data_i_psum_inferred__0/out[2]\n : south_data_i_psum_inferred__0/in0[2]\n : south_data_i_psum_inferred/out[2]\n : south_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[2]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1679 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1679 /I0 (LUT3)\n 2: i_2449/O (LUT2)\n 3: i_2449/I0 (LUT2)\n 4: i_2269/O (LUT4)\n 5: i_2269/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[2]\n : south_data_i_psum_inferred__0/out[2]\n : south_data_i_psum_inferred__0/in0[2]\n : south_data_i_psum_inferred/out[2]\n : south_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[2]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1679 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2026 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2026 /I0 (LUT2)\n 2: i_2381/O (LUT5)\n 3: i_2381/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[2]\n : west_data_i_psum_inferred__0/out[2]\n : west_data_i_psum_inferred__0/in0[2]\n : west_data_i_psum_inferred/out[2]\n : west_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[2]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1679 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1679 /O (LUT3)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2026 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1921 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 /I0 (LUT2)\n 2: i_2382/O (LUT5)\n 3: i_2382/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[3]\n : south_data_i_psum_inferred__2/out[3]\n : south_data_i_psum_inferred__2/in0[3]\n : south_data_i_psum_inferred__1/out[3]\n : south_data_i_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[3]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2059 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2059 /I1 (LUT2)\n 6: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2043 /O (LUT2)\n 7: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2043 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[3]\n : south_data_o_psum_inferred__2/out[3]\n : south_data_o_psum_inferred__2/in0[3]\n : south_data_o_psum_inferred__1/out[3]\n : south_data_o_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[3]\n 8: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1922 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1922 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1906 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1906 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[3]\n : north_data_i_psum_inferred__0/out[3]\n : north_data_i_psum_inferred__0/in0[3]\n : north_data_i_psum_inferred/out[3]\n : north_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[3]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1680 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1680 /I0 (LUT3)\n 6: i_2450/O (LUT2)\n 7: i_2450/I0 (LUT2)\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1673 /O (LUT4)\n 9: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1673 /I1 (LUT4)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[3]\n : east_data_i_psum_inferred__0/out[3]\n : east_data_i_psum_inferred__0/in0[3]\n : east_data_i_psum_inferred/out[3]\n : east_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[3]\n 10: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 /O (LUT2)\n 11: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2027 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1922 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2059 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2059 /I0 (LUT2)\n 2: i_2398/O (LUT5)\n 3: i_2398/I2 (LUT5)\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /in0[3]\n : west_data_i_psum_inferred__2/out[3]\n : west_data_i_psum_inferred__2/in0[3]\n : west_data_i_psum_inferred__1/out[3]\n : west_data_i_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /in0[3]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1922 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1922 /I0 (LUT2)\n 6: i_2341/O (LUT5)\n 7: i_2341/I2 (LUT5)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[3]\n : east_data_i_psum_inferred__2/out[3]\n : east_data_i_psum_inferred__2/in0[3]\n : east_data_i_psum_inferred__1/out[3]\n : east_data_i_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[3]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2059 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2059 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1907 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1907 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[4]\n : north_data_i_psum_inferred__0/out[4]\n : north_data_i_psum_inferred__0/in0[4]\n : north_data_i_psum_inferred/out[4]\n : north_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[4]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1681 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1681 /I0 (LUT3)\n 6: i_2451/O (LUT2)\n 7: i_2451/I0 (LUT2)\n 8: i_2270/O (LUT4)\n 9: i_2270/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[4]\n : south_data_i_psum_inferred__0/out[4]\n : south_data_i_psum_inferred__0/in0[4]\n : south_data_i_psum_inferred/out[4]\n : south_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[4]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1681 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1681 /I0 (LUT3)\n 2: i_2451/O (LUT2)\n 3: i_2451/I0 (LUT2)\n 4: i_2270/O (LUT4)\n 5: i_2270/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[4]\n : south_data_i_psum_inferred__0/out[4]\n : south_data_i_psum_inferred__0/in0[4]\n : south_data_i_psum_inferred/out[4]\n : south_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[4]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1681 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2028 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2028 /I0 (LUT2)\n 2: i_2383/O (LUT5)\n 3: i_2383/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[4]\n : west_data_i_psum_inferred__0/out[4]\n : west_data_i_psum_inferred__0/in0[4]\n : west_data_i_psum_inferred/out[4]\n : west_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[4]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1681 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1681 /O (LUT3)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2028 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1923 /O (LUT2)\nCRITICAL WARNING: [Synth 8-295] found timing loop. [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/HMNoC_top.sv:23]\nINFO: [Common 17-14] Message 'Synth 8-295' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1908 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1908 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[5]\n : north_data_i_psum_inferred__0/out[5]\n : north_data_i_psum_inferred__0/in0[5]\n : north_data_i_psum_inferred/out[5]\n : north_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[5]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1682 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1682 /I0 (LUT3)\n 6: i_2452/O (LUT2)\n 7: i_2452/I0 (LUT2)\n 8: i_2271/O (LUT4)\n 9: i_2271/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[5]\n : south_data_i_psum_inferred__0/out[5]\n : south_data_i_psum_inferred__0/in0[5]\n : south_data_i_psum_inferred/out[5]\n : south_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[5]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1682 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1682 /I0 (LUT3)\n 2: i_2452/O (LUT2)\n 3: i_2452/I0 (LUT2)\n 4: i_2271/O (LUT4)\n 5: i_2271/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[5]\n : south_data_i_psum_inferred__0/out[5]\n : south_data_i_psum_inferred__0/in0[5]\n : south_data_i_psum_inferred/out[5]\n : south_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[5]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1682 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2029 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2029 /I0 (LUT2)\n 2: i_2384/O (LUT5)\n 3: i_2384/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[5]\n : west_data_i_psum_inferred__0/out[5]\n : west_data_i_psum_inferred__0/in0[5]\n : west_data_i_psum_inferred/out[5]\n : west_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[5]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1682 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1682 /O (LUT3)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2029 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1924 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1909 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1909 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[6]\n : north_data_i_psum_inferred__0/out[6]\n : north_data_i_psum_inferred__0/in0[6]\n : north_data_i_psum_inferred/out[6]\n : north_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[6]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1683 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1683 /I0 (LUT3)\n 6: i_2453/O (LUT2)\n 7: i_2453/I0 (LUT2)\n 8: i_2272/O (LUT4)\n 9: i_2272/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[6]\n : south_data_i_psum_inferred__0/out[6]\n : south_data_i_psum_inferred__0/in0[6]\n : south_data_i_psum_inferred/out[6]\n : south_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[6]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1683 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1683 /I0 (LUT3)\n 2: i_2453/O (LUT2)\n 3: i_2453/I0 (LUT2)\n 4: i_2272/O (LUT4)\n 5: i_2272/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[6]\n : south_data_i_psum_inferred__0/out[6]\n : south_data_i_psum_inferred__0/in0[6]\n : south_data_i_psum_inferred/out[6]\n : south_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[6]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1683 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2030 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2030 /I0 (LUT2)\n 2: i_2385/O (LUT5)\n 3: i_2385/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[6]\n : west_data_i_psum_inferred__0/out[6]\n : west_data_i_psum_inferred__0/in0[6]\n : west_data_i_psum_inferred/out[6]\n : west_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[6]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1683 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1683 /O (LUT3)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2030 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1925 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 /I0 (LUT2)\n 2: i_2386/O (LUT5)\n 3: i_2386/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[7]\n : south_data_i_psum_inferred__2/out[7]\n : south_data_i_psum_inferred__2/in0[7]\n : south_data_i_psum_inferred__1/out[7]\n : south_data_i_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[7]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2063 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2063 /I1 (LUT2)\n 6: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2047 /O (LUT2)\n 7: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2047 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[7]\n : south_data_o_psum_inferred__2/out[7]\n : south_data_o_psum_inferred__2/in0[7]\n : south_data_o_psum_inferred__1/out[7]\n : south_data_o_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[7]\n 8: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1926 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1926 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1910 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1910 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[7]\n : north_data_i_psum_inferred__0/out[7]\n : north_data_i_psum_inferred__0/in0[7]\n : north_data_i_psum_inferred/out[7]\n : north_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[7]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1684 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1684 /I0 (LUT3)\n 6: i_2454/O (LUT2)\n 7: i_2454/I0 (LUT2)\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1674 /O (LUT4)\n 9: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1674 /I1 (LUT4)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[7]\n : east_data_i_psum_inferred__0/out[7]\n : east_data_i_psum_inferred__0/in0[7]\n : east_data_i_psum_inferred/out[7]\n : east_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[7]\n 10: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 /O (LUT2)\n 11: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2031 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1926 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2063 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2063 /I0 (LUT2)\n 2: i_2402/O (LUT5)\n 3: i_2402/I2 (LUT5)\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /in0[7]\n : west_data_i_psum_inferred__2/out[7]\n : west_data_i_psum_inferred__2/in0[7]\n : west_data_i_psum_inferred__1/out[7]\n : west_data_i_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /in0[7]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1926 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1926 /I0 (LUT2)\n 6: i_2345/O (LUT5)\n 7: i_2345/I2 (LUT5)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[7]\n : east_data_i_psum_inferred__2/out[7]\n : east_data_i_psum_inferred__2/in0[7]\n : east_data_i_psum_inferred__1/out[7]\n : east_data_i_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[7]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2063 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2063 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1911 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1911 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[8]\n : north_data_i_psum_inferred__0/out[8]\n : north_data_i_psum_inferred__0/in0[8]\n : north_data_i_psum_inferred/out[8]\n : north_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[8]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1685 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1685 /I0 (LUT3)\n 6: i_2455/O (LUT2)\n 7: i_2455/I0 (LUT2)\n 8: i_2273/O (LUT4)\n 9: i_2273/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[8]\n : south_data_i_psum_inferred__0/out[8]\n : south_data_i_psum_inferred__0/in0[8]\n : south_data_i_psum_inferred/out[8]\n : south_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[8]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1685 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1685 /I0 (LUT3)\n 2: i_2455/O (LUT2)\n 3: i_2455/I0 (LUT2)\n 4: i_2273/O (LUT4)\n 5: i_2273/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[8]\n : south_data_i_psum_inferred__0/out[8]\n : south_data_i_psum_inferred__0/in0[8]\n : south_data_i_psum_inferred/out[8]\n : south_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[8]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1685 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2032 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2032 /I0 (LUT2)\n 2: i_2387/O (LUT5)\n 3: i_2387/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[8]\n : west_data_i_psum_inferred__0/out[8]\n : west_data_i_psum_inferred__0/in0[8]\n : west_data_i_psum_inferred/out[8]\n : west_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[8]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1685 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1685 /O (LUT3)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2032 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1927 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1912 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1912 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[9]\n : north_data_i_psum_inferred__0/out[9]\n : north_data_i_psum_inferred__0/in0[9]\n : north_data_i_psum_inferred/out[9]\n : north_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[9]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1686 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1686 /I0 (LUT3)\n 6: i_2456/O (LUT2)\n 7: i_2456/I0 (LUT2)\n 8: i_2274/O (LUT4)\n 9: i_2274/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[9]\n : south_data_i_psum_inferred__0/out[9]\n : south_data_i_psum_inferred__0/in0[9]\n : south_data_i_psum_inferred/out[9]\n : south_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[9]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1686 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1686 /I0 (LUT3)\n 2: i_2456/O (LUT2)\n 3: i_2456/I0 (LUT2)\n 4: i_2274/O (LUT4)\n 5: i_2274/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[9]\n : south_data_i_psum_inferred__0/out[9]\n : south_data_i_psum_inferred__0/in0[9]\n : south_data_i_psum_inferred/out[9]\n : south_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[9]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1686 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2033 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2033 /I0 (LUT2)\n 2: i_2388/O (LUT5)\n 3: i_2388/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[9]\n : west_data_i_psum_inferred__0/out[9]\n : west_data_i_psum_inferred__0/in0[9]\n : west_data_i_psum_inferred/out[9]\n : west_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[9]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1686 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1686 /O (LUT3)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2033 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1928 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1913 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1913 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[10]\n : north_data_i_psum_inferred__0/out[10]\n : north_data_i_psum_inferred__0/in0[10]\n : north_data_i_psum_inferred/out[10]\n : north_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[10]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1687 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1687 /I0 (LUT3)\n 6: i_2457/O (LUT2)\n 7: i_2457/I0 (LUT2)\n 8: i_2275/O (LUT4)\n 9: i_2275/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[10]\n : south_data_i_psum_inferred__0/out[10]\n : south_data_i_psum_inferred__0/in0[10]\n : south_data_i_psum_inferred/out[10]\n : south_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[10]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1687 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1687 /I0 (LUT3)\n 2: i_2457/O (LUT2)\n 3: i_2457/I0 (LUT2)\n 4: i_2275/O (LUT4)\n 5: i_2275/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[10]\n : south_data_i_psum_inferred__0/out[10]\n : south_data_i_psum_inferred__0/in0[10]\n : south_data_i_psum_inferred/out[10]\n : south_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[10]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1687 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2034 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2034 /I0 (LUT2)\n 2: i_2389/O (LUT5)\n 3: i_2389/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[10]\n : west_data_i_psum_inferred__0/out[10]\n : west_data_i_psum_inferred__0/in0[10]\n : west_data_i_psum_inferred/out[10]\n : west_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[10]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1687 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1687 /O (LUT3)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2034 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1929 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 /I0 (LUT2)\n 2: i_2390/O (LUT5)\n 3: i_2390/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[11]\n : south_data_i_psum_inferred__2/out[11]\n : south_data_i_psum_inferred__2/in0[11]\n : south_data_i_psum_inferred__1/out[11]\n : south_data_i_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[11]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2067 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2067 /I1 (LUT2)\n 6: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2051 /O (LUT2)\n 7: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2051 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[11]\n : south_data_o_psum_inferred__2/out[11]\n : south_data_o_psum_inferred__2/in0[11]\n : south_data_o_psum_inferred__1/out[11]\n : south_data_o_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[11]\n 8: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1930 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1930 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1914 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1914 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[11]\n : north_data_i_psum_inferred__0/out[11]\n : north_data_i_psum_inferred__0/in0[11]\n : north_data_i_psum_inferred/out[11]\n : north_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[11]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1688 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1688 /I0 (LUT3)\n 6: i_2458/O (LUT2)\n 7: i_2458/I0 (LUT2)\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1675 /O (LUT4)\n 9: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1675 /I1 (LUT4)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[11]\n : east_data_i_psum_inferred__0/out[11]\n : east_data_i_psum_inferred__0/in0[11]\n : east_data_i_psum_inferred/out[11]\n : east_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[11]\n 10: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 /O (LUT2)\n 11: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2035 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1930 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2067 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2067 /I0 (LUT2)\n 2: i_2406/O (LUT5)\n 3: i_2406/I2 (LUT5)\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /in0[11]\n : west_data_i_psum_inferred__2/out[11]\n : west_data_i_psum_inferred__2/in0[11]\n : west_data_i_psum_inferred__1/out[11]\n : west_data_i_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /in0[11]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1930 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1930 /I0 (LUT2)\n 6: i_2349/O (LUT5)\n 7: i_2349/I2 (LUT5)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[11]\n : east_data_i_psum_inferred__2/out[11]\n : east_data_i_psum_inferred__2/in0[11]\n : east_data_i_psum_inferred__1/out[11]\n : east_data_i_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[11]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2067 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2067 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 /I0 (LUT2)\n 2: i_2391/O (LUT5)\n 3: i_2391/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[12]\n : south_data_i_psum_inferred__2/out[12]\n : south_data_i_psum_inferred__2/in0[12]\n : south_data_i_psum_inferred__1/out[12]\n : south_data_i_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[12]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2068 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2068 /I1 (LUT2)\n 6: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2052 /O (LUT2)\n 7: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2052 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[12]\n : south_data_o_psum_inferred__2/out[12]\n : south_data_o_psum_inferred__2/in0[12]\n : south_data_o_psum_inferred__1/out[12]\n : south_data_o_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[12]\n 8: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1931 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1931 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1915 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1915 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[12]\n : north_data_i_psum_inferred__0/out[12]\n : north_data_i_psum_inferred__0/in0[12]\n : north_data_i_psum_inferred/out[12]\n : north_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[12]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1689 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1689 /I0 (LUT3)\n 6: i_2459/O (LUT2)\n 7: i_2459/I0 (LUT2)\n 8: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1676 /O (LUT4)\n 9: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1676 /I1 (LUT4)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[12]\n : east_data_i_psum_inferred__0/out[12]\n : east_data_i_psum_inferred__0/in0[12]\n : east_data_i_psum_inferred/out[12]\n : east_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[12]\n 10: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 /O (LUT2)\n 11: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2036 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1931 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2068 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2068 /I0 (LUT2)\n 2: i_2407/O (LUT5)\n 3: i_2407/I2 (LUT5)\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/west_data_i_psum_inferred /in0[12]\n : west_data_i_psum_inferred__2/out[12]\n : west_data_i_psum_inferred__2/in0[12]\n : west_data_i_psum_inferred__1/out[12]\n : west_data_i_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_1/east_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_o_psum_inferred /in0[12]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1931 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1931 /I0 (LUT2)\n 6: i_2350/O (LUT5)\n 7: i_2350/I2 (LUT5)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[12]\n : east_data_i_psum_inferred__2/out[12]\n : east_data_i_psum_inferred__2/in0[12]\n : east_data_i_psum_inferred__1/out[12]\n : east_data_i_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[12]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2068 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2068 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1916 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1916 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[13]\n : north_data_i_psum_inferred__0/out[13]\n : north_data_i_psum_inferred__0/in0[13]\n : north_data_i_psum_inferred/out[13]\n : north_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[13]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1690 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1690 /I0 (LUT3)\n 6: i_2460/O (LUT2)\n 7: i_2460/I0 (LUT2)\n 8: i_2276/O (LUT4)\n 9: i_2276/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[13]\n : south_data_i_psum_inferred__0/out[13]\n : south_data_i_psum_inferred__0/in0[13]\n : south_data_i_psum_inferred/out[13]\n : south_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[13]\n 10: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1690 /O (LUT3)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1690 /I0 (LUT3)\n 2: i_2460/O (LUT2)\n 3: i_2460/I0 (LUT2)\n 4: i_2276/O (LUT4)\n 5: i_2276/I1 (LUT4)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[13]\n : south_data_i_psum_inferred__0/out[13]\n : south_data_i_psum_inferred__0/in0[13]\n : south_data_i_psum_inferred/out[13]\n : south_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[13]\n 6: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 /O (LUT2)\n 7: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1690 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2037 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2037 /I0 (LUT2)\n 2: i_2392/O (LUT5)\n 3: i_2392/I3 (LUT5)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[13]\n : west_data_i_psum_inferred__0/out[13]\n : west_data_i_psum_inferred__0/in0[13]\n : west_data_i_psum_inferred/out[13]\n : west_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[13]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1690 /O (LUT3)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1690 /O (LUT3)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2037 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1932 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1917 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1917 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[14]\n : north_data_i_psum_inferred__0/out[14]\n : north_data_i_psum_inferred__0/in0[14]\n : north_data_i_psum_inferred/out[14]\n : north_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[14]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1693 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1693 /I0 (LUT2)\n 6: i_2277/O (LUT5)\n 7: i_2277/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[14]\n : south_data_i_psum_inferred__0/out[14]\n : south_data_i_psum_inferred__0/in0[14]\n : south_data_i_psum_inferred/out[14]\n : south_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[14]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2038 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2038 /I0 (LUT2)\n 2: i_2393/O (LUT5)\n 3: i_2393/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[14]\n : south_data_i_psum_inferred__2/out[14]\n : south_data_i_psum_inferred__2/in0[14]\n : south_data_i_psum_inferred__1/out[14]\n : south_data_i_psum_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[14]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2070 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2070 /I1 (LUT2)\n 6: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2054 /O (LUT2)\n 7: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2054 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[14]\n : south_data_o_psum_inferred__2/out[14]\n : south_data_o_psum_inferred__2/in0[14]\n : south_data_o_psum_inferred__1/out[14]\n : south_data_o_psum_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[14]\n 8: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2038 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2038 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1693 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1693 /I0 (LUT2)\n 2: i_2277/O (LUT5)\n 3: i_2277/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[14]\n : south_data_i_psum_inferred__0/out[14]\n : south_data_i_psum_inferred__0/in0[14]\n : south_data_i_psum_inferred/out[14]\n : south_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[14]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1933 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1693 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 /I1 (LUT2)\n 2: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1918 /O (LUT2)\n 3: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1918 /I0 (LUT2)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[15]\n : north_data_i_psum_inferred__0/out[15]\n : north_data_i_psum_inferred__0/in0[15]\n : north_data_i_psum_inferred/out[15]\n : north_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[15]\n 4: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1694 /O (LUT2)\n 5: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1694 /I0 (LUT2)\n 6: i_2278/O (LUT5)\n 7: i_2278/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[15]\n : south_data_i_psum_inferred__0/out[15]\n : south_data_i_psum_inferred__0/in0[15]\n : south_data_i_psum_inferred/out[15]\n : south_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[15]\n 8: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2039 /O (LUT2)\n 1: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2039 /I0 (LUT2)\n 2: i_2394/O (LUT5)\n 3: i_2394/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[15]\n : south_data_i_psum_inferred__2/out[15]\n : south_data_i_psum_inferred__2/in0[15]\n : south_data_i_psum_inferred__1/out[15]\n : south_data_i_psum_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[15]\n 4: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2071 /O (LUT2)\n 5: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2071 /I1 (LUT2)\n 6: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2055 /O (LUT2)\n 7: \\HMNoC_cluster_east_1/router_cluster_0/router_psum/i_2055 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[15]\n : south_data_o_psum_inferred__2/out[15]\n : south_data_o_psum_inferred__2/in0[15]\n : south_data_o_psum_inferred__1/out[15]\n : south_data_o_psum_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[15]\n 8: \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2039 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_0/router_cluster_0/router_psum/i_2039 \"\nFound timing loop:\n 0: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 /O (LUT2)\n 1: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 /O (LUT2)\nFound timing loop:\n 0: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1694 /O (LUT2)\n 1: \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1694 /I0 (LUT2)\n 2: i_2278/O (LUT5)\n 3: i_2278/I3 (LUT5)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[15]\n : south_data_i_psum_inferred__0/out[15]\n : south_data_i_psum_inferred__0/in0[15]\n : south_data_i_psum_inferred/out[15]\n : south_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[15]\n 4: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 /O (LUT2)\n 5: \\HMNoC_cluster_west_1/router_cluster_0/router_psum/i_1934 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_west_0/router_cluster_0/router_psum/i_1694 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2072 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2072 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2095 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2095 /I0 (LUT2)\n 4: i_2420/O (LUT2)\n 5: i_2420/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[0]\n : north_data_i_wght_inferred__2/out[0]\n : north_data_i_wght_inferred__2/in0[0]\n : north_data_i_wght_inferred__1/out[0]\n : north_data_i_wght_inferred__1/in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[0]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1951 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1951 /I0 (LUT2)\n 8: i_2354/O (LUT6)\n 9: i_2354/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[0]\n : south_data_i_wght_inferred__2/out[0]\n : south_data_i_wght_inferred__2/in0[0]\n : south_data_i_wght_inferred__1/out[0]\n : south_data_i_wght_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[0]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2072 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2072 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2074 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2074 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2097 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2097 /I0 (LUT2)\n 4: i_2421/O (LUT2)\n 5: i_2421/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[2]\n : north_data_i_wght_inferred__2/out[2]\n : north_data_i_wght_inferred__2/in0[2]\n : north_data_i_wght_inferred__1/out[2]\n : north_data_i_wght_inferred__1/in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[2]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1953 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1953 /I0 (LUT2)\n 8: i_2355/O (LUT6)\n 9: i_2355/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[2]\n : south_data_i_wght_inferred__2/out[2]\n : south_data_i_wght_inferred__2/in0[2]\n : south_data_i_wght_inferred__1/out[2]\n : south_data_i_wght_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[2]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2074 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2074 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2076 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2076 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2099 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2099 /I0 (LUT2)\n 4: i_2422/O (LUT2)\n 5: i_2422/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[4]\n : north_data_i_wght_inferred__2/out[4]\n : north_data_i_wght_inferred__2/in0[4]\n : north_data_i_wght_inferred__1/out[4]\n : north_data_i_wght_inferred__1/in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[4]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1955 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1955 /I0 (LUT2)\n 8: i_2356/O (LUT6)\n 9: i_2356/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[4]\n : south_data_i_wght_inferred__2/out[4]\n : south_data_i_wght_inferred__2/in0[4]\n : south_data_i_wght_inferred__1/out[4]\n : south_data_i_wght_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[4]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2076 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2076 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2077 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2077 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2100 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2100 /I0 (LUT2)\n 4: i_2423/O (LUT2)\n 5: i_2423/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[5]\n : north_data_i_wght_inferred__2/out[5]\n : north_data_i_wght_inferred__2/in0[5]\n : north_data_i_wght_inferred__1/out[5]\n : north_data_i_wght_inferred__1/in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[5]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1956 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1956 /I0 (LUT2)\n 8: i_2357/O (LUT6)\n 9: i_2357/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[5]\n : south_data_i_wght_inferred__2/out[5]\n : south_data_i_wght_inferred__2/in0[5]\n : south_data_i_wght_inferred__1/out[5]\n : south_data_i_wght_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[5]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2077 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2077 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2078 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2078 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2101 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2101 /I0 (LUT2)\n 4: i_2424/O (LUT2)\n 5: i_2424/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[6]\n : north_data_i_wght_inferred__2/out[6]\n : north_data_i_wght_inferred__2/in0[6]\n : north_data_i_wght_inferred__1/out[6]\n : north_data_i_wght_inferred__1/in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[6]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1957 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1957 /I0 (LUT2)\n 8: i_2358/O (LUT6)\n 9: i_2358/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[6]\n : south_data_i_wght_inferred__2/out[6]\n : south_data_i_wght_inferred__2/in0[6]\n : south_data_i_wght_inferred__1/out[6]\n : south_data_i_wght_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[6]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2078 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2078 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2080 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2080 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2103 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2103 /I0 (LUT2)\n 4: i_2425/O (LUT2)\n 5: i_2425/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[8]\n : north_data_i_wght_inferred__2/out[8]\n : north_data_i_wght_inferred__2/in0[8]\n : north_data_i_wght_inferred__1/out[8]\n : north_data_i_wght_inferred__1/in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[8]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1959 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1959 /I0 (LUT2)\n 8: i_2359/O (LUT6)\n 9: i_2359/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[8]\n : south_data_i_wght_inferred__2/out[8]\n : south_data_i_wght_inferred__2/in0[8]\n : south_data_i_wght_inferred__1/out[8]\n : south_data_i_wght_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[8]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2080 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2080 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2081 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2081 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2104 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2104 /I0 (LUT2)\n 4: i_2426/O (LUT2)\n 5: i_2426/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[9]\n : north_data_i_wght_inferred__2/out[9]\n : north_data_i_wght_inferred__2/in0[9]\n : north_data_i_wght_inferred__1/out[9]\n : north_data_i_wght_inferred__1/in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[9]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1960 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1960 /I0 (LUT2)\n 8: i_2360/O (LUT6)\n 9: i_2360/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[9]\n : south_data_i_wght_inferred__2/out[9]\n : south_data_i_wght_inferred__2/in0[9]\n : south_data_i_wght_inferred__1/out[9]\n : south_data_i_wght_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[9]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2081 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2081 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2082 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2082 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2105 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2105 /I0 (LUT2)\n 4: i_2427/O (LUT2)\n 5: i_2427/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[10]\n : north_data_i_wght_inferred__2/out[10]\n : north_data_i_wght_inferred__2/in0[10]\n : north_data_i_wght_inferred__1/out[10]\n : north_data_i_wght_inferred__1/in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[10]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1961 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1961 /I0 (LUT2)\n 8: i_2361/O (LUT6)\n 9: i_2361/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[10]\n : south_data_i_wght_inferred__2/out[10]\n : south_data_i_wght_inferred__2/in0[10]\n : south_data_i_wght_inferred__1/out[10]\n : south_data_i_wght_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[10]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2082 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2082 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2085 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2085 /I1 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2108 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2108 /I0 (LUT2)\n 4: i_2428/O (LUT2)\n 5: i_2428/I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[13]\n : north_data_i_wght_inferred__2/out[13]\n : north_data_i_wght_inferred__2/in0[13]\n : north_data_i_wght_inferred__1/out[13]\n : north_data_i_wght_inferred__1/in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[13]\n 6: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1964 /O (LUT2)\n 7: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1964 /I0 (LUT2)\n 8: i_2362/O (LUT6)\n 9: i_2362/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[13]\n : south_data_i_wght_inferred__2/out[13]\n : south_data_i_wght_inferred__2/in0[13]\n : south_data_i_wght_inferred__1/out[13]\n : south_data_i_wght_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[13]\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2085 /O (LUT2)\nInferred a: \"set_disable_timing -from I1 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2085 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2096 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2096 /I0 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2088 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2088 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[1]\n : north_data_i_wght_inferred__2/out[1]\n : north_data_i_wght_inferred__2/in0[1]\n : north_data_i_wght_inferred__1/out[1]\n : north_data_i_wght_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[1]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1952 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1952 /I0 (LUT2)\n 6: i_2466/O (LUT5)\n 7: i_2466/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[1]\n : south_data_i_wght_inferred__2/out[1]\n : south_data_i_wght_inferred__2/in0[1]\n : south_data_i_wght_inferred__1/out[1]\n : south_data_i_wght_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[1]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2073 /O (LUT2)\n 9: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2073 /I1 (LUT2)\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2096 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2096 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2098 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2098 /I0 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2089 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2089 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[3]\n : north_data_i_wght_inferred__2/out[3]\n : north_data_i_wght_inferred__2/in0[3]\n : north_data_i_wght_inferred__1/out[3]\n : north_data_i_wght_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[3]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1954 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1954 /I0 (LUT2)\n 6: i_2467/O (LUT5)\n 7: i_2467/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[3]\n : south_data_i_wght_inferred__2/out[3]\n : south_data_i_wght_inferred__2/in0[3]\n : south_data_i_wght_inferred__1/out[3]\n : south_data_i_wght_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[3]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2075 /O (LUT2)\n 9: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2075 /I1 (LUT2)\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2098 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2098 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2102 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2102 /I0 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2090 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2090 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[7]\n : north_data_i_wght_inferred__2/out[7]\n : north_data_i_wght_inferred__2/in0[7]\n : north_data_i_wght_inferred__1/out[7]\n : north_data_i_wght_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[7]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1958 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1958 /I0 (LUT2)\n 6: i_2468/O (LUT5)\n 7: i_2468/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[7]\n : south_data_i_wght_inferred__2/out[7]\n : south_data_i_wght_inferred__2/in0[7]\n : south_data_i_wght_inferred__1/out[7]\n : south_data_i_wght_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[7]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2079 /O (LUT2)\n 9: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2079 /I1 (LUT2)\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2102 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2102 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2106 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2106 /I0 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2091 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2091 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[11]\n : north_data_i_wght_inferred__2/out[11]\n : north_data_i_wght_inferred__2/in0[11]\n : north_data_i_wght_inferred__1/out[11]\n : north_data_i_wght_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[11]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1962 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1962 /I0 (LUT2)\n 6: i_2469/O (LUT5)\n 7: i_2469/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[11]\n : south_data_i_wght_inferred__2/out[11]\n : south_data_i_wght_inferred__2/in0[11]\n : south_data_i_wght_inferred__1/out[11]\n : south_data_i_wght_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[11]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2083 /O (LUT2)\n 9: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2083 /I1 (LUT2)\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2106 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2106 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2107 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2107 /I0 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2092 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2092 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[12]\n : north_data_i_wght_inferred__2/out[12]\n : north_data_i_wght_inferred__2/in0[12]\n : north_data_i_wght_inferred__1/out[12]\n : north_data_i_wght_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[12]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1963 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1963 /I0 (LUT2)\n 6: i_2470/O (LUT5)\n 7: i_2470/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[12]\n : south_data_i_wght_inferred__2/out[12]\n : south_data_i_wght_inferred__2/in0[12]\n : south_data_i_wght_inferred__1/out[12]\n : south_data_i_wght_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[12]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2084 /O (LUT2)\n 9: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2084 /I1 (LUT2)\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2107 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2107 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2109 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2109 /I0 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2093 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2093 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[14]\n : north_data_i_wght_inferred__2/out[14]\n : north_data_i_wght_inferred__2/in0[14]\n : north_data_i_wght_inferred__1/out[14]\n : north_data_i_wght_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[14]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1965 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1965 /I0 (LUT2)\n 6: i_2471/O (LUT5)\n 7: i_2471/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[14]\n : south_data_i_wght_inferred__2/out[14]\n : south_data_i_wght_inferred__2/in0[14]\n : south_data_i_wght_inferred__1/out[14]\n : south_data_i_wght_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[14]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2086 /O (LUT2)\n 9: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2086 /I1 (LUT2)\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2109 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2109 \"\nFound timing loop:\n 0: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2110 /O (LUT2)\n 1: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2110 /I0 (LUT2)\n 2: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2094 /O (LUT2)\n 3: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2094 /I0 (LUT2)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[15]\n : north_data_i_wght_inferred__2/out[15]\n : north_data_i_wght_inferred__2/in0[15]\n : north_data_i_wght_inferred__1/out[15]\n : north_data_i_wght_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[15]\n 4: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1966 /O (LUT2)\n 5: \\HMNoC_cluster_east_0/router_cluster_0/router_wght/i_1966 /I0 (LUT2)\n 6: i_2472/O (LUT5)\n 7: i_2472/I3 (LUT5)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[15]\n : south_data_i_wght_inferred__2/out[15]\n : south_data_i_wght_inferred__2/in0[15]\n : south_data_i_wght_inferred__1/out[15]\n : south_data_i_wght_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[15]\n 8: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2087 /O (LUT2)\n 9: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2087 /I1 (LUT2)\n 10: \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2110 /O (LUT2)\nInferred a: \"set_disable_timing -from I0 -to O \\HMNoC_cluster_east_1/router_cluster_0/router_wght/i_2110 \"\n---------------------------------------------------------------------------------\nFinished Technology Mapping : Time (s): cpu = 00:00:57 ; elapsed = 00:01:05 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\n\nReport RTL Partitions: \n+-+--------------+------------+----------+\n| |RTL Partition |Replication |Instances |\n+-+--------------+------------+----------+\n+-+--------------+------------+----------+\n---------------------------------------------------------------------------------\nStart IO Insertion\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Flattening Before IO Insertion\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Flattening Before IO Insertion\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Final Netlist Cleanup\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Final Netlist Cleanup\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished IO Insertion : Time (s): cpu = 00:00:58 ; elapsed = 00:01:06 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_0/east_data_i_psum_inferred__0_n_1 with 1st driver pin 'i_1694/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_0/east_data_i_psum_inferred__0_n_1 with 2nd driver pin 'i_1678/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_0/east_data_i_psum_inferred__0_n_0 with 1st driver pin 'i_1839/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_0/east_data_i_psum_inferred__0_n_0 with 2nd driver pin 'i_1679/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_15 with 1st driver pin 'i_1664/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_15 with 2nd driver pin 'i_1680/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_14 with 1st driver pin 'i_1665/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_14 with 2nd driver pin 'i_1681/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_13 with 1st driver pin 'i_1666/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_13 with 2nd driver pin 'i_1682/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_12 with 1st driver pin 'i_1667/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_12 with 2nd driver pin 'i_1683/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_11 with 1st driver pin 'i_1668/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_11 with 2nd driver pin 'i_1684/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_10 with 1st driver pin 'i_1669/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_10 with 2nd driver pin 'i_1685/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_9 with 1st driver pin 'i_1670/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_9 with 2nd driver pin 'i_1686/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_8 with 1st driver pin 'i_1671/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_8 with 2nd driver pin 'i_1687/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_7 with 1st driver pin 'i_1672/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_7 with 2nd driver pin 'i_1688/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_6 with 1st driver pin 'i_1673/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_6 with 2nd driver pin 'i_1689/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_5 with 1st driver pin 'i_1674/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_5 with 2nd driver pin 'i_1690/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_4 with 1st driver pin 'i_1675/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_4 with 2nd driver pin 'i_1691/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_3 with 1st driver pin 'i_1676/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_3 with 2nd driver pin 'i_1692/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_2 with 1st driver pin 'i_1677/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\nCRITICAL WARNING: [Synth 8-6859] multi-driven net on pin HMNoC_cluster_west_1/east_data_i_psum_inferred__0_n_2 with 2nd driver pin 'i_1693/O' [D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.srcs/sources_1/new/router.sv:85]\n\nReport Check Netlist: \n+------+------------------+-------+---------+-------+------------------+\n| |Item |Errors |Warnings |Status |Description |\n+------+------------------+-------+---------+-------+------------------+\n|1 |multi_driven_nets | 0| 16|Failed |Multi driven nets |\n+------+------------------+-------+---------+-------+------------------+\n---------------------------------------------------------------------------------\nStart Renaming Generated Instances\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Renaming Generated Instances : Time (s): cpu = 00:00:58 ; elapsed = 00:01:07 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\n\nReport RTL Partitions: \n+-+--------------+------------+----------+\n| |RTL Partition |Replication |Instances |\n+-+--------------+------------+----------+\n+-+--------------+------------+----------+\nFound timing loop:\n 0: west_data_o_psum_inferred_i_15__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_15__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[1]\n : south_data_i_psum_inferred__2/out[1]\n : south_data_i_psum_inferred__2/in0[1]\n : south_data_i_psum_inferred__1/out[1]\n : south_data_i_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[1]\n 2: west_data_o_psum_inferred_i_15__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_15__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[1]\n : south_data_o_psum_inferred__2/out[1]\n : south_data_o_psum_inferred__2/in0[1]\n : south_data_o_psum_inferred__1/out[1]\n : south_data_o_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[1]\n 4: west_data_o_psum_inferred_i_15__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_15__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_15__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_15__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[1]\n : east_data_i_psum_inferred__0/out[1]\n : east_data_i_psum_inferred__0/in0[1]\n : east_data_i_psum_inferred/out[1]\n : east_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[1]\n 2: west_data_o_psum_inferred_i_15__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_15__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[1]\n : west_data_i_psum_inferred__0/out[1]\n : west_data_i_psum_inferred__0/in0[1]\n : west_data_i_psum_inferred/out[1]\n : west_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[1]\n 4: west_data_o_psum_inferred_i_15__2/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_15__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_15__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_15__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[1]\n : south_data_o_psum_inferred__2/out[1]\n : south_data_o_psum_inferred__2/in0[1]\n : south_data_o_psum_inferred__1/out[1]\n : south_data_o_psum_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[1]\n 2: west_data_o_psum_inferred_i_15__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_15__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[1]\n : west_data_i_psum_inferred__0/out[1]\n : west_data_i_psum_inferred__0/in0[1]\n : west_data_i_psum_inferred/out[1]\n : west_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[1]\n 4: west_data_o_psum_inferred_i_15__2/O (LUT6)\n 5: west_data_o_psum_inferred_i_15__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[1]\n : south_data_i_psum_inferred__0/out[1]\n : south_data_i_psum_inferred__0/in0[1]\n : south_data_i_psum_inferred/out[1]\n : south_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[1]\n 6: west_data_o_psum_inferred_i_15/O (LUT6)\n 7: west_data_o_psum_inferred_i_15/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[1]\n : north_data_i_psum_inferred__0/out[1]\n : north_data_i_psum_inferred__0/in0[1]\n : north_data_i_psum_inferred/out[1]\n : north_data_i_psum_inferred/in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[1]\n 8: west_data_o_psum_inferred_i_15__2/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_15__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_15__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_15__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_15__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_15__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_13__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_13__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[3]\n : south_data_i_psum_inferred__2/out[3]\n : south_data_i_psum_inferred__2/in0[3]\n : south_data_i_psum_inferred__1/out[3]\n : south_data_i_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[3]\n 2: west_data_o_psum_inferred_i_13__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_13__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[3]\n : south_data_o_psum_inferred__2/out[3]\n : south_data_o_psum_inferred__2/in0[3]\n : south_data_o_psum_inferred__1/out[3]\n : south_data_o_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[3]\n 4: west_data_o_psum_inferred_i_13__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_13__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_13__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_13__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[3]\n : east_data_i_psum_inferred__0/out[3]\n : east_data_i_psum_inferred__0/in0[3]\n : east_data_i_psum_inferred/out[3]\n : east_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[3]\n 2: west_data_o_psum_inferred_i_13__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_13__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[3]\n : west_data_i_psum_inferred__0/out[3]\n : west_data_i_psum_inferred__0/in0[3]\n : west_data_i_psum_inferred/out[3]\n : west_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[3]\n 4: west_data_o_psum_inferred_i_13__2/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_13__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_13__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_13__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[3]\n : south_data_o_psum_inferred__2/out[3]\n : south_data_o_psum_inferred__2/in0[3]\n : south_data_o_psum_inferred__1/out[3]\n : south_data_o_psum_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[3]\n 2: west_data_o_psum_inferred_i_13__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_13__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[3]\n : west_data_i_psum_inferred__0/out[3]\n : west_data_i_psum_inferred__0/in0[3]\n : west_data_i_psum_inferred/out[3]\n : west_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[3]\n 4: west_data_o_psum_inferred_i_13__2/O (LUT6)\n 5: west_data_o_psum_inferred_i_13__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[3]\n : south_data_i_psum_inferred__0/out[3]\n : south_data_i_psum_inferred__0/in0[3]\n : south_data_i_psum_inferred/out[3]\n : south_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[3]\n 6: west_data_o_psum_inferred_i_13/O (LUT6)\n 7: west_data_o_psum_inferred_i_13/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[3]\n : north_data_i_psum_inferred__0/out[3]\n : north_data_i_psum_inferred__0/in0[3]\n : north_data_i_psum_inferred/out[3]\n : north_data_i_psum_inferred/in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[3]\n 8: west_data_o_psum_inferred_i_13__2/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_13__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_13__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_13__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_13__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_13__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_9__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_9__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[7]\n : south_data_i_psum_inferred__2/out[7]\n : south_data_i_psum_inferred__2/in0[7]\n : south_data_i_psum_inferred__1/out[7]\n : south_data_i_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[7]\n 2: west_data_o_psum_inferred_i_9__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_9__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[7]\n : south_data_o_psum_inferred__2/out[7]\n : south_data_o_psum_inferred__2/in0[7]\n : south_data_o_psum_inferred__1/out[7]\n : south_data_o_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[7]\n 4: west_data_o_psum_inferred_i_9__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_9__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_9__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_9__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[7]\n : east_data_i_psum_inferred__0/out[7]\n : east_data_i_psum_inferred__0/in0[7]\n : east_data_i_psum_inferred/out[7]\n : east_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[7]\n 2: west_data_o_psum_inferred_i_9__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_9__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[7]\n : west_data_i_psum_inferred__0/out[7]\n : west_data_i_psum_inferred__0/in0[7]\n : west_data_i_psum_inferred/out[7]\n : west_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[7]\n 4: west_data_o_psum_inferred_i_9__2/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_9__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_9__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_9__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[7]\n : south_data_o_psum_inferred__2/out[7]\n : south_data_o_psum_inferred__2/in0[7]\n : south_data_o_psum_inferred__1/out[7]\n : south_data_o_psum_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[7]\n 2: west_data_o_psum_inferred_i_9__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_9__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[7]\n : west_data_i_psum_inferred__0/out[7]\n : west_data_i_psum_inferred__0/in0[7]\n : west_data_i_psum_inferred/out[7]\n : west_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[7]\n 4: west_data_o_psum_inferred_i_9__2/O (LUT6)\n 5: west_data_o_psum_inferred_i_9__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[7]\n : south_data_i_psum_inferred__0/out[7]\n : south_data_i_psum_inferred__0/in0[7]\n : south_data_i_psum_inferred/out[7]\n : south_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[7]\n 6: west_data_o_psum_inferred_i_9/O (LUT6)\n 7: west_data_o_psum_inferred_i_9/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[7]\n : north_data_i_psum_inferred__0/out[7]\n : north_data_i_psum_inferred__0/in0[7]\n : north_data_i_psum_inferred/out[7]\n : north_data_i_psum_inferred/in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[7]\n 8: west_data_o_psum_inferred_i_9__2/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_9__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_9__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_9__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_9__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_9__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_5__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_5__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[11]\n : south_data_i_psum_inferred__2/out[11]\n : south_data_i_psum_inferred__2/in0[11]\n : south_data_i_psum_inferred__1/out[11]\n : south_data_i_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[11]\n 2: west_data_o_psum_inferred_i_5__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_5__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[11]\n : south_data_o_psum_inferred__2/out[11]\n : south_data_o_psum_inferred__2/in0[11]\n : south_data_o_psum_inferred__1/out[11]\n : south_data_o_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[11]\n 4: west_data_o_psum_inferred_i_5__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_5__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_5__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_5__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[11]\n : east_data_i_psum_inferred__0/out[11]\n : east_data_i_psum_inferred__0/in0[11]\n : east_data_i_psum_inferred/out[11]\n : east_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[11]\n 2: west_data_o_psum_inferred_i_5__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_5__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[11]\n : west_data_i_psum_inferred__0/out[11]\n : west_data_i_psum_inferred__0/in0[11]\n : west_data_i_psum_inferred/out[11]\n : west_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[11]\n 4: west_data_o_psum_inferred_i_5__2/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_5__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_5__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_5__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[11]\n : south_data_o_psum_inferred__2/out[11]\n : south_data_o_psum_inferred__2/in0[11]\n : south_data_o_psum_inferred__1/out[11]\n : south_data_o_psum_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[11]\n 2: west_data_o_psum_inferred_i_5__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_5__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[11]\n : west_data_i_psum_inferred__0/out[11]\n : west_data_i_psum_inferred__0/in0[11]\n : west_data_i_psum_inferred/out[11]\n : west_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[11]\n 4: west_data_o_psum_inferred_i_5__2/O (LUT6)\n 5: west_data_o_psum_inferred_i_5__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[11]\n : south_data_i_psum_inferred__0/out[11]\n : south_data_i_psum_inferred__0/in0[11]\n : south_data_i_psum_inferred/out[11]\n : south_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[11]\n 6: west_data_o_psum_inferred_i_5/O (LUT6)\n 7: west_data_o_psum_inferred_i_5/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[11]\n : north_data_i_psum_inferred__0/out[11]\n : north_data_i_psum_inferred__0/in0[11]\n : north_data_i_psum_inferred/out[11]\n : north_data_i_psum_inferred/in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[11]\n 8: west_data_o_psum_inferred_i_5__2/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_5__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_5__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_5__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_5__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_5__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_4__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_4__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[12]\n : south_data_i_psum_inferred__2/out[12]\n : south_data_i_psum_inferred__2/in0[12]\n : south_data_i_psum_inferred__1/out[12]\n : south_data_i_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[12]\n 2: west_data_o_psum_inferred_i_4__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_4__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[12]\n : south_data_o_psum_inferred__2/out[12]\n : south_data_o_psum_inferred__2/in0[12]\n : south_data_o_psum_inferred__1/out[12]\n : south_data_o_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[12]\n 4: west_data_o_psum_inferred_i_4__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_4__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_4__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_4__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[12]\n : east_data_i_psum_inferred__0/out[12]\n : east_data_i_psum_inferred__0/in0[12]\n : east_data_i_psum_inferred/out[12]\n : east_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[12]\n 2: west_data_o_psum_inferred_i_4__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_4__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[12]\n : west_data_i_psum_inferred__0/out[12]\n : west_data_i_psum_inferred__0/in0[12]\n : west_data_i_psum_inferred/out[12]\n : west_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[12]\n 4: west_data_o_psum_inferred_i_4__2/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_4__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_4__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_4__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[12]\n : south_data_o_psum_inferred__2/out[12]\n : south_data_o_psum_inferred__2/in0[12]\n : south_data_o_psum_inferred__1/out[12]\n : south_data_o_psum_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[12]\n 2: west_data_o_psum_inferred_i_4__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_4__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[12]\n : west_data_i_psum_inferred__0/out[12]\n : west_data_i_psum_inferred__0/in0[12]\n : west_data_i_psum_inferred/out[12]\n : west_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[12]\n 4: west_data_o_psum_inferred_i_4__2/O (LUT6)\n 5: west_data_o_psum_inferred_i_4__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[12]\n : south_data_i_psum_inferred__0/out[12]\n : south_data_i_psum_inferred__0/in0[12]\n : south_data_i_psum_inferred/out[12]\n : south_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[12]\n 6: west_data_o_psum_inferred_i_4/O (LUT6)\n 7: west_data_o_psum_inferred_i_4/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[12]\n : north_data_i_psum_inferred__0/out[12]\n : north_data_i_psum_inferred__0/in0[12]\n : north_data_i_psum_inferred/out[12]\n : north_data_i_psum_inferred/in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[12]\n 8: west_data_o_psum_inferred_i_4__2/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_4__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_4__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_4__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_4__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_4__2/O (LUT6)\nFound timing loop:\n 0: west_data_o_wght_inferred_i_16__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_16__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[0]\n : north_data_i_wght_inferred__0/out[0]\n : north_data_i_wght_inferred__0/in0[0]\n : north_data_i_wght_inferred/out[0]\n : north_data_i_wght_inferred/in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[0]\n 2: west_data_o_wght_inferred_i_16/O (LUT6)\n 3: west_data_o_wght_inferred_i_16/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[0]\n : south_data_i_wght_inferred__0/out[0]\n : south_data_i_wght_inferred__0/in0[0]\n : south_data_i_wght_inferred/out[0]\n : south_data_i_wght_inferred/in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[0]\n 4: west_data_o_wght_inferred_i_16__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_16__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_15__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_15__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[1]\n : north_data_i_wght_inferred__0/out[1]\n : north_data_i_wght_inferred__0/in0[1]\n : north_data_i_wght_inferred/out[1]\n : north_data_i_wght_inferred/in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[1]\n 2: west_data_o_wght_inferred_i_15/O (LUT6)\n 3: west_data_o_wght_inferred_i_15/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[1]\n : south_data_i_wght_inferred__0/out[1]\n : south_data_i_wght_inferred__0/in0[1]\n : south_data_i_wght_inferred/out[1]\n : south_data_i_wght_inferred/in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[1]\n 4: west_data_o_wght_inferred_i_15__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_15__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_14__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_14__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[2]\n : north_data_i_wght_inferred__0/out[2]\n : north_data_i_wght_inferred__0/in0[2]\n : north_data_i_wght_inferred/out[2]\n : north_data_i_wght_inferred/in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[2]\n 2: west_data_o_wght_inferred_i_14/O (LUT6)\n 3: west_data_o_wght_inferred_i_14/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[2]\n : south_data_i_wght_inferred__0/out[2]\n : south_data_i_wght_inferred__0/in0[2]\n : south_data_i_wght_inferred/out[2]\n : south_data_i_wght_inferred/in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[2]\n 4: west_data_o_wght_inferred_i_14__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_14__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_13__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_13__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[3]\n : north_data_i_wght_inferred__0/out[3]\n : north_data_i_wght_inferred__0/in0[3]\n : north_data_i_wght_inferred/out[3]\n : north_data_i_wght_inferred/in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[3]\n 2: west_data_o_wght_inferred_i_13/O (LUT6)\n 3: west_data_o_wght_inferred_i_13/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[3]\n : south_data_i_wght_inferred__0/out[3]\n : south_data_i_wght_inferred__0/in0[3]\n : south_data_i_wght_inferred/out[3]\n : south_data_i_wght_inferred/in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[3]\n 4: west_data_o_wght_inferred_i_13__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_13__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_12__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_12__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[4]\n : north_data_i_wght_inferred__0/out[4]\n : north_data_i_wght_inferred__0/in0[4]\n : north_data_i_wght_inferred/out[4]\n : north_data_i_wght_inferred/in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[4]\n 2: west_data_o_wght_inferred_i_12/O (LUT6)\n 3: west_data_o_wght_inferred_i_12/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[4]\n : south_data_i_wght_inferred__0/out[4]\n : south_data_i_wght_inferred__0/in0[4]\n : south_data_i_wght_inferred/out[4]\n : south_data_i_wght_inferred/in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[4]\n 4: west_data_o_wght_inferred_i_12__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_12__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_11__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_11__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[5]\n : north_data_i_wght_inferred__0/out[5]\n : north_data_i_wght_inferred__0/in0[5]\n : north_data_i_wght_inferred/out[5]\n : north_data_i_wght_inferred/in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[5]\n 2: west_data_o_wght_inferred_i_11/O (LUT6)\n 3: west_data_o_wght_inferred_i_11/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[5]\n : south_data_i_wght_inferred__0/out[5]\n : south_data_i_wght_inferred__0/in0[5]\n : south_data_i_wght_inferred/out[5]\n : south_data_i_wght_inferred/in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[5]\n 4: west_data_o_wght_inferred_i_11__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_11__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_10__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_10__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[6]\n : north_data_i_wght_inferred__0/out[6]\n : north_data_i_wght_inferred__0/in0[6]\n : north_data_i_wght_inferred/out[6]\n : north_data_i_wght_inferred/in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[6]\n 2: west_data_o_wght_inferred_i_10/O (LUT6)\n 3: west_data_o_wght_inferred_i_10/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[6]\n : south_data_i_wght_inferred__0/out[6]\n : south_data_i_wght_inferred__0/in0[6]\n : south_data_i_wght_inferred/out[6]\n : south_data_i_wght_inferred/in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[6]\n 4: west_data_o_wght_inferred_i_10__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_10__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_9__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_9__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[7]\n : north_data_i_wght_inferred__0/out[7]\n : north_data_i_wght_inferred__0/in0[7]\n : north_data_i_wght_inferred/out[7]\n : north_data_i_wght_inferred/in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[7]\n 2: west_data_o_wght_inferred_i_9/O (LUT6)\n 3: west_data_o_wght_inferred_i_9/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[7]\n : south_data_i_wght_inferred__0/out[7]\n : south_data_i_wght_inferred__0/in0[7]\n : south_data_i_wght_inferred/out[7]\n : south_data_i_wght_inferred/in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[7]\n 4: west_data_o_wght_inferred_i_9__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_9__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_8__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_8__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[8]\n : north_data_i_wght_inferred__0/out[8]\n : north_data_i_wght_inferred__0/in0[8]\n : north_data_i_wght_inferred/out[8]\n : north_data_i_wght_inferred/in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[8]\n 2: west_data_o_wght_inferred_i_8/O (LUT6)\n 3: west_data_o_wght_inferred_i_8/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[8]\n : south_data_i_wght_inferred__0/out[8]\n : south_data_i_wght_inferred__0/in0[8]\n : south_data_i_wght_inferred/out[8]\n : south_data_i_wght_inferred/in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[8]\n 4: west_data_o_wght_inferred_i_8__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_8__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_7__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_7__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[9]\n : north_data_i_wght_inferred__0/out[9]\n : north_data_i_wght_inferred__0/in0[9]\n : north_data_i_wght_inferred/out[9]\n : north_data_i_wght_inferred/in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[9]\n 2: west_data_o_wght_inferred_i_7/O (LUT6)\n 3: west_data_o_wght_inferred_i_7/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[9]\n : south_data_i_wght_inferred__0/out[9]\n : south_data_i_wght_inferred__0/in0[9]\n : south_data_i_wght_inferred/out[9]\n : south_data_i_wght_inferred/in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[9]\n 4: west_data_o_wght_inferred_i_7__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_7__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_6__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_6__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[10]\n : north_data_i_wght_inferred__0/out[10]\n : north_data_i_wght_inferred__0/in0[10]\n : north_data_i_wght_inferred/out[10]\n : north_data_i_wght_inferred/in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[10]\n 2: west_data_o_wght_inferred_i_6/O (LUT6)\n 3: west_data_o_wght_inferred_i_6/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[10]\n : south_data_i_wght_inferred__0/out[10]\n : south_data_i_wght_inferred__0/in0[10]\n : south_data_i_wght_inferred/out[10]\n : south_data_i_wght_inferred/in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[10]\n 4: west_data_o_wght_inferred_i_6__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_6__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_5__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_5__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[11]\n : north_data_i_wght_inferred__0/out[11]\n : north_data_i_wght_inferred__0/in0[11]\n : north_data_i_wght_inferred/out[11]\n : north_data_i_wght_inferred/in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[11]\n 2: west_data_o_wght_inferred_i_5/O (LUT6)\n 3: west_data_o_wght_inferred_i_5/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[11]\n : south_data_i_wght_inferred__0/out[11]\n : south_data_i_wght_inferred__0/in0[11]\n : south_data_i_wght_inferred/out[11]\n : south_data_i_wght_inferred/in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[11]\n 4: west_data_o_wght_inferred_i_5__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_5__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_4__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_4__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[12]\n : north_data_i_wght_inferred__0/out[12]\n : north_data_i_wght_inferred__0/in0[12]\n : north_data_i_wght_inferred/out[12]\n : north_data_i_wght_inferred/in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[12]\n 2: west_data_o_wght_inferred_i_4/O (LUT6)\n 3: west_data_o_wght_inferred_i_4/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[12]\n : south_data_i_wght_inferred__0/out[12]\n : south_data_i_wght_inferred__0/in0[12]\n : south_data_i_wght_inferred/out[12]\n : south_data_i_wght_inferred/in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[12]\n 4: west_data_o_wght_inferred_i_4__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_4__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_3__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_3__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[13]\n : north_data_i_wght_inferred__0/out[13]\n : north_data_i_wght_inferred__0/in0[13]\n : north_data_i_wght_inferred/out[13]\n : north_data_i_wght_inferred/in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[13]\n 2: west_data_o_wght_inferred_i_3/O (LUT6)\n 3: west_data_o_wght_inferred_i_3/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[13]\n : south_data_i_wght_inferred__0/out[13]\n : south_data_i_wght_inferred__0/in0[13]\n : south_data_i_wght_inferred/out[13]\n : south_data_i_wght_inferred/in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[13]\n 4: west_data_o_wght_inferred_i_3__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_3__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_2__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_2__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[14]\n : north_data_i_wght_inferred__0/out[14]\n : north_data_i_wght_inferred__0/in0[14]\n : north_data_i_wght_inferred/out[14]\n : north_data_i_wght_inferred/in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[14]\n 2: west_data_o_wght_inferred_i_2/O (LUT6)\n 3: west_data_o_wght_inferred_i_2/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[14]\n : south_data_i_wght_inferred__0/out[14]\n : south_data_i_wght_inferred__0/in0[14]\n : south_data_i_wght_inferred/out[14]\n : south_data_i_wght_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[14]\n 4: west_data_o_wght_inferred_i_2__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_2__0\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_1__0/O (LUT6)\n 1: west_data_o_wght_inferred_i_1__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_wght_inferred /in0[15]\n : north_data_i_wght_inferred__0/out[15]\n : north_data_i_wght_inferred__0/in0[15]\n : north_data_i_wght_inferred/out[15]\n : north_data_i_wght_inferred/in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_wght_inferred /in0[15]\n 2: west_data_o_wght_inferred_i_1/O (LUT6)\n 3: west_data_o_wght_inferred_i_1/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_wght_inferred /in0[15]\n : south_data_i_wght_inferred__0/out[15]\n : south_data_i_wght_inferred__0/in0[15]\n : south_data_i_wght_inferred/out[15]\n : south_data_i_wght_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_wght_inferred /in0[15]\n 4: west_data_o_wght_inferred_i_1__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_wght_inferred_i_1__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_16__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_16__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[0]\n : west_data_i_iact_inferred__0/out[0]\n : west_data_i_iact_inferred__0/in0[0]\n : west_data_i_iact_inferred/out[0]\n : west_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[0]\n 2: west_data_o_iact_inferred_i_16/O (LUT6)\n 3: west_data_o_iact_inferred_i_16/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[0]\n : east_data_i_iact_inferred__0/out[0]\n : east_data_i_iact_inferred__0/in0[0]\n : east_data_i_iact_inferred/out[0]\n : east_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[0]\n 4: west_data_o_iact_inferred_i_16__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_16__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_16/O (LUT6)\n 1: west_data_o_iact_inferred_i_16/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[0]\n : east_data_i_iact_inferred__0/out[0]\n : east_data_i_iact_inferred__0/in0[0]\n : east_data_i_iact_inferred/out[0]\n : east_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[0]\n 2: west_data_o_iact_inferred_i_16__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_16__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_16\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_16__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_16__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[0]\n : south_data_i_iact_inferred__2/out[0]\n : south_data_i_iact_inferred__2/in0[0]\n : south_data_i_iact_inferred__1/out[0]\n : south_data_i_iact_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[0]\n 2: west_data_o_iact_inferred_i_16__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_16__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[0]\n : north_data_i_iact_inferred__2/out[0]\n : north_data_i_iact_inferred__2/in0[0]\n : north_data_i_iact_inferred__1/out[0]\n : north_data_i_iact_inferred__1/in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[0]\n 4: west_data_o_iact_inferred_i_16__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_16__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_16__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_16__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[0]\n : north_data_i_iact_inferred__0/out[0]\n : north_data_i_iact_inferred__0/in0[0]\n : north_data_i_iact_inferred/out[0]\n : north_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[0]\n 2: west_data_o_iact_inferred_i_16/O (LUT6)\n 3: west_data_o_iact_inferred_i_16/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[0]\n : south_data_i_iact_inferred__0/out[0]\n : south_data_i_iact_inferred__0/in0[0]\n : south_data_i_iact_inferred/out[0]\n : south_data_i_iact_inferred/in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[0]\n 4: west_data_o_iact_inferred_i_16__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_16__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_15__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_15__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[1]\n : north_data_i_iact_inferred__0/out[1]\n : north_data_i_iact_inferred__0/in0[1]\n : north_data_i_iact_inferred/out[1]\n : north_data_i_iact_inferred/in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[1]\n 2: west_data_o_iact_inferred_i_15/O (LUT6)\n 3: west_data_o_iact_inferred_i_15/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[1]\n : south_data_i_iact_inferred__0/out[1]\n : south_data_i_iact_inferred__0/in0[1]\n : south_data_i_iact_inferred/out[1]\n : south_data_i_iact_inferred/in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[1]\n 4: west_data_o_iact_inferred_i_15__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_15__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_15__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_15__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[1]\n : south_data_i_iact_inferred__2/out[1]\n : south_data_i_iact_inferred__2/in0[1]\n : south_data_i_iact_inferred__1/out[1]\n : south_data_i_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[1]\n 2: west_data_o_iact_inferred_i_15__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_15__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[1]\n : north_data_i_iact_inferred__2/out[1]\n : north_data_i_iact_inferred__2/in0[1]\n : north_data_i_iact_inferred__1/out[1]\n : north_data_i_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[1]\n 4: west_data_o_iact_inferred_i_15__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_15__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_15__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_15__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[1]\n : east_data_i_iact_inferred__2/out[1]\n : east_data_i_iact_inferred__2/in0[1]\n : east_data_i_iact_inferred__1/out[1]\n : east_data_i_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[1]\n 2: west_data_o_iact_inferred_i_15__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_15__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[1]\n : north_data_i_iact_inferred__2/out[1]\n : north_data_i_iact_inferred__2/in0[1]\n : north_data_i_iact_inferred__1/out[1]\n : north_data_i_iact_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[1]\n 4: west_data_o_iact_inferred_i_15__1/O (LUT6)\n 5: west_data_o_iact_inferred_i_15__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[1]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[1]\n : west_data_i_iact_inferred__0/out[1]\n : west_data_i_iact_inferred__0/in0[1]\n : west_data_i_iact_inferred/out[1]\n : west_data_i_iact_inferred/in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[1]\n 6: west_data_o_iact_inferred_i_15/O (LUT6)\n 7: west_data_o_iact_inferred_i_15/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[1]\n : south_data_i_iact_inferred__0/out[1]\n : south_data_i_iact_inferred__0/in0[1]\n : south_data_i_iact_inferred/out[1]\n : south_data_i_iact_inferred/in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[1]\n 8: west_data_o_iact_inferred_i_15__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_15__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_15/O (LUT6)\n 1: west_data_o_iact_inferred_i_15/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[1]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[1]\n : south_data_i_iact_inferred__0/out[1]\n : south_data_i_iact_inferred__0/in0[1]\n : south_data_i_iact_inferred/out[1]\n : south_data_i_iact_inferred/in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[1]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[1]\n 2: west_data_o_iact_inferred_i_15__0/O (LUT6)\n 3: west_data_o_iact_inferred_i_15__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_15\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_14__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_14__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[2]\n : west_data_i_iact_inferred__0/out[2]\n : west_data_i_iact_inferred__0/in0[2]\n : west_data_i_iact_inferred/out[2]\n : west_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[2]\n 2: west_data_o_iact_inferred_i_14/O (LUT6)\n 3: west_data_o_iact_inferred_i_14/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[2]\n : east_data_i_iact_inferred__0/out[2]\n : east_data_i_iact_inferred__0/in0[2]\n : east_data_i_iact_inferred/out[2]\n : east_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[2]\n 4: west_data_o_iact_inferred_i_14__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_14__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_14/O (LUT6)\n 1: west_data_o_iact_inferred_i_14/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[2]\n : east_data_i_iact_inferred__0/out[2]\n : east_data_i_iact_inferred__0/in0[2]\n : east_data_i_iact_inferred/out[2]\n : east_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[2]\n 2: west_data_o_iact_inferred_i_14__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_14__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_14\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_14__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_14__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[2]\n : south_data_i_iact_inferred__2/out[2]\n : south_data_i_iact_inferred__2/in0[2]\n : south_data_i_iact_inferred__1/out[2]\n : south_data_i_iact_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[2]\n 2: west_data_o_iact_inferred_i_14__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_14__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[2]\n : north_data_i_iact_inferred__2/out[2]\n : north_data_i_iact_inferred__2/in0[2]\n : north_data_i_iact_inferred__1/out[2]\n : north_data_i_iact_inferred__1/in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[2]\n 4: west_data_o_iact_inferred_i_14__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_14__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_14__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_14__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[2]\n : north_data_i_iact_inferred__0/out[2]\n : north_data_i_iact_inferred__0/in0[2]\n : north_data_i_iact_inferred/out[2]\n : north_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[2]\n 2: west_data_o_iact_inferred_i_14/O (LUT6)\n 3: west_data_o_iact_inferred_i_14/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[2]\n : south_data_i_iact_inferred__0/out[2]\n : south_data_i_iact_inferred__0/in0[2]\n : south_data_i_iact_inferred/out[2]\n : south_data_i_iact_inferred/in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[2]\n 4: west_data_o_iact_inferred_i_14__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_14__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_13__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_13__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[3]\n : north_data_i_iact_inferred__0/out[3]\n : north_data_i_iact_inferred__0/in0[3]\n : north_data_i_iact_inferred/out[3]\n : north_data_i_iact_inferred/in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[3]\n 2: west_data_o_iact_inferred_i_13/O (LUT6)\n 3: west_data_o_iact_inferred_i_13/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[3]\n : south_data_i_iact_inferred__0/out[3]\n : south_data_i_iact_inferred__0/in0[3]\n : south_data_i_iact_inferred/out[3]\n : south_data_i_iact_inferred/in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[3]\n 4: west_data_o_iact_inferred_i_13__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_13__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_13__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_13__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[3]\n : south_data_i_iact_inferred__2/out[3]\n : south_data_i_iact_inferred__2/in0[3]\n : south_data_i_iact_inferred__1/out[3]\n : south_data_i_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[3]\n 2: west_data_o_iact_inferred_i_13__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_13__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[3]\n : north_data_i_iact_inferred__2/out[3]\n : north_data_i_iact_inferred__2/in0[3]\n : north_data_i_iact_inferred__1/out[3]\n : north_data_i_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[3]\n 4: west_data_o_iact_inferred_i_13__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_13__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_13__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_13__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[3]\n : east_data_i_iact_inferred__2/out[3]\n : east_data_i_iact_inferred__2/in0[3]\n : east_data_i_iact_inferred__1/out[3]\n : east_data_i_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[3]\n 2: west_data_o_iact_inferred_i_13__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_13__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[3]\n : north_data_i_iact_inferred__2/out[3]\n : north_data_i_iact_inferred__2/in0[3]\n : north_data_i_iact_inferred__1/out[3]\n : north_data_i_iact_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[3]\n 4: west_data_o_iact_inferred_i_13__1/O (LUT6)\n 5: west_data_o_iact_inferred_i_13__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[3]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[3]\n : west_data_i_iact_inferred__0/out[3]\n : west_data_i_iact_inferred__0/in0[3]\n : west_data_i_iact_inferred/out[3]\n : west_data_i_iact_inferred/in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[3]\n 6: west_data_o_iact_inferred_i_13/O (LUT6)\n 7: west_data_o_iact_inferred_i_13/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[3]\n : south_data_i_iact_inferred__0/out[3]\n : south_data_i_iact_inferred__0/in0[3]\n : south_data_i_iact_inferred/out[3]\n : south_data_i_iact_inferred/in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[3]\n 8: west_data_o_iact_inferred_i_13__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_13__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_13/O (LUT6)\n 1: west_data_o_iact_inferred_i_13/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[3]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[3]\n : south_data_i_iact_inferred__0/out[3]\n : south_data_i_iact_inferred__0/in0[3]\n : south_data_i_iact_inferred/out[3]\n : south_data_i_iact_inferred/in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[3]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[3]\n 2: west_data_o_iact_inferred_i_13__0/O (LUT6)\n 3: west_data_o_iact_inferred_i_13__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_13\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_12__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_12__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[4]\n : west_data_i_iact_inferred__0/out[4]\n : west_data_i_iact_inferred__0/in0[4]\n : west_data_i_iact_inferred/out[4]\n : west_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[4]\n 2: west_data_o_iact_inferred_i_12/O (LUT6)\n 3: west_data_o_iact_inferred_i_12/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[4]\n : east_data_i_iact_inferred__0/out[4]\n : east_data_i_iact_inferred__0/in0[4]\n : east_data_i_iact_inferred/out[4]\n : east_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[4]\n 4: west_data_o_iact_inferred_i_12__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_12__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_12/O (LUT6)\n 1: west_data_o_iact_inferred_i_12/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[4]\n : east_data_i_iact_inferred__0/out[4]\n : east_data_i_iact_inferred__0/in0[4]\n : east_data_i_iact_inferred/out[4]\n : east_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[4]\n 2: west_data_o_iact_inferred_i_12__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_12__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_12\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_12__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_12__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[4]\n : south_data_i_iact_inferred__2/out[4]\n : south_data_i_iact_inferred__2/in0[4]\n : south_data_i_iact_inferred__1/out[4]\n : south_data_i_iact_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[4]\n 2: west_data_o_iact_inferred_i_12__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_12__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[4]\n : north_data_i_iact_inferred__2/out[4]\n : north_data_i_iact_inferred__2/in0[4]\n : north_data_i_iact_inferred__1/out[4]\n : north_data_i_iact_inferred__1/in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[4]\n 4: west_data_o_iact_inferred_i_12__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_12__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_12__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_12__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[4]\n : north_data_i_iact_inferred__0/out[4]\n : north_data_i_iact_inferred__0/in0[4]\n : north_data_i_iact_inferred/out[4]\n : north_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[4]\n 2: west_data_o_iact_inferred_i_12/O (LUT6)\n 3: west_data_o_iact_inferred_i_12/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[4]\n : south_data_i_iact_inferred__0/out[4]\n : south_data_i_iact_inferred__0/in0[4]\n : south_data_i_iact_inferred/out[4]\n : south_data_i_iact_inferred/in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[4]\n 4: west_data_o_iact_inferred_i_12__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_12__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_11__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_11__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[5]\n : west_data_i_iact_inferred__0/out[5]\n : west_data_i_iact_inferred__0/in0[5]\n : west_data_i_iact_inferred/out[5]\n : west_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[5]\n 2: west_data_o_iact_inferred_i_11/O (LUT6)\n 3: west_data_o_iact_inferred_i_11/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[5]\n : east_data_i_iact_inferred__0/out[5]\n : east_data_i_iact_inferred__0/in0[5]\n : east_data_i_iact_inferred/out[5]\n : east_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[5]\n 4: west_data_o_iact_inferred_i_11__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_11__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_11/O (LUT6)\n 1: west_data_o_iact_inferred_i_11/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[5]\n : east_data_i_iact_inferred__0/out[5]\n : east_data_i_iact_inferred__0/in0[5]\n : east_data_i_iact_inferred/out[5]\n : east_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[5]\n 2: west_data_o_iact_inferred_i_11__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_11__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_11\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_11__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_11__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[5]\n : south_data_i_iact_inferred__2/out[5]\n : south_data_i_iact_inferred__2/in0[5]\n : south_data_i_iact_inferred__1/out[5]\n : south_data_i_iact_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[5]\n 2: west_data_o_iact_inferred_i_11__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_11__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[5]\n : north_data_i_iact_inferred__2/out[5]\n : north_data_i_iact_inferred__2/in0[5]\n : north_data_i_iact_inferred__1/out[5]\n : north_data_i_iact_inferred__1/in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[5]\n 4: west_data_o_iact_inferred_i_11__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_11__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_11__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_11__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[5]\n : north_data_i_iact_inferred__0/out[5]\n : north_data_i_iact_inferred__0/in0[5]\n : north_data_i_iact_inferred/out[5]\n : north_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[5]\n 2: west_data_o_iact_inferred_i_11/O (LUT6)\n 3: west_data_o_iact_inferred_i_11/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[5]\n : south_data_i_iact_inferred__0/out[5]\n : south_data_i_iact_inferred__0/in0[5]\n : south_data_i_iact_inferred/out[5]\n : south_data_i_iact_inferred/in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[5]\n 4: west_data_o_iact_inferred_i_11__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_11__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_10__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_10__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[6]\n : west_data_i_iact_inferred__0/out[6]\n : west_data_i_iact_inferred__0/in0[6]\n : west_data_i_iact_inferred/out[6]\n : west_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[6]\n 2: west_data_o_iact_inferred_i_10/O (LUT6)\n 3: west_data_o_iact_inferred_i_10/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[6]\n : east_data_i_iact_inferred__0/out[6]\n : east_data_i_iact_inferred__0/in0[6]\n : east_data_i_iact_inferred/out[6]\n : east_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[6]\n 4: west_data_o_iact_inferred_i_10__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_10__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_10/O (LUT6)\n 1: west_data_o_iact_inferred_i_10/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[6]\n : east_data_i_iact_inferred__0/out[6]\n : east_data_i_iact_inferred__0/in0[6]\n : east_data_i_iact_inferred/out[6]\n : east_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[6]\n 2: west_data_o_iact_inferred_i_10__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_10__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_10\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_10__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_10__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[6]\n : south_data_i_iact_inferred__2/out[6]\n : south_data_i_iact_inferred__2/in0[6]\n : south_data_i_iact_inferred__1/out[6]\n : south_data_i_iact_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[6]\n 2: west_data_o_iact_inferred_i_10__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_10__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[6]\n : north_data_i_iact_inferred__2/out[6]\n : north_data_i_iact_inferred__2/in0[6]\n : north_data_i_iact_inferred__1/out[6]\n : north_data_i_iact_inferred__1/in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[6]\n 4: west_data_o_iact_inferred_i_10__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_10__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_10__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_10__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[6]\n : north_data_i_iact_inferred__0/out[6]\n : north_data_i_iact_inferred__0/in0[6]\n : north_data_i_iact_inferred/out[6]\n : north_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[6]\n 2: west_data_o_iact_inferred_i_10/O (LUT6)\n 3: west_data_o_iact_inferred_i_10/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[6]\n : south_data_i_iact_inferred__0/out[6]\n : south_data_i_iact_inferred__0/in0[6]\n : south_data_i_iact_inferred/out[6]\n : south_data_i_iact_inferred/in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[6]\n 4: west_data_o_iact_inferred_i_10__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_10__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_9__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_9__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[7]\n : north_data_i_iact_inferred__0/out[7]\n : north_data_i_iact_inferred__0/in0[7]\n : north_data_i_iact_inferred/out[7]\n : north_data_i_iact_inferred/in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[7]\n 2: west_data_o_iact_inferred_i_9/O (LUT6)\n 3: west_data_o_iact_inferred_i_9/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[7]\n : south_data_i_iact_inferred__0/out[7]\n : south_data_i_iact_inferred__0/in0[7]\n : south_data_i_iact_inferred/out[7]\n : south_data_i_iact_inferred/in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[7]\n 4: west_data_o_iact_inferred_i_9__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_9__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_9__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_9__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[7]\n : south_data_i_iact_inferred__2/out[7]\n : south_data_i_iact_inferred__2/in0[7]\n : south_data_i_iact_inferred__1/out[7]\n : south_data_i_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[7]\n 2: west_data_o_iact_inferred_i_9__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_9__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[7]\n : north_data_i_iact_inferred__2/out[7]\n : north_data_i_iact_inferred__2/in0[7]\n : north_data_i_iact_inferred__1/out[7]\n : north_data_i_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[7]\n 4: west_data_o_iact_inferred_i_9__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_9__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_9__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_9__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[7]\n : east_data_i_iact_inferred__2/out[7]\n : east_data_i_iact_inferred__2/in0[7]\n : east_data_i_iact_inferred__1/out[7]\n : east_data_i_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[7]\n 2: west_data_o_iact_inferred_i_9__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_9__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[7]\n : north_data_i_iact_inferred__2/out[7]\n : north_data_i_iact_inferred__2/in0[7]\n : north_data_i_iact_inferred__1/out[7]\n : north_data_i_iact_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[7]\n 4: west_data_o_iact_inferred_i_9__1/O (LUT6)\n 5: west_data_o_iact_inferred_i_9__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[7]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[7]\n : west_data_i_iact_inferred__0/out[7]\n : west_data_i_iact_inferred__0/in0[7]\n : west_data_i_iact_inferred/out[7]\n : west_data_i_iact_inferred/in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[7]\n 6: west_data_o_iact_inferred_i_9/O (LUT6)\n 7: west_data_o_iact_inferred_i_9/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[7]\n : south_data_i_iact_inferred__0/out[7]\n : south_data_i_iact_inferred__0/in0[7]\n : south_data_i_iact_inferred/out[7]\n : south_data_i_iact_inferred/in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[7]\n 8: west_data_o_iact_inferred_i_9__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_9__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_9/O (LUT6)\n 1: west_data_o_iact_inferred_i_9/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[7]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[7]\n : south_data_i_iact_inferred__0/out[7]\n : south_data_i_iact_inferred__0/in0[7]\n : south_data_i_iact_inferred/out[7]\n : south_data_i_iact_inferred/in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[7]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[7]\n 2: west_data_o_iact_inferred_i_9__0/O (LUT6)\n 3: west_data_o_iact_inferred_i_9__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_9\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_8__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_8__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[8]\n : west_data_i_iact_inferred__0/out[8]\n : west_data_i_iact_inferred__0/in0[8]\n : west_data_i_iact_inferred/out[8]\n : west_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[8]\n 2: west_data_o_iact_inferred_i_8/O (LUT6)\n 3: west_data_o_iact_inferred_i_8/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[8]\n : east_data_i_iact_inferred__0/out[8]\n : east_data_i_iact_inferred__0/in0[8]\n : east_data_i_iact_inferred/out[8]\n : east_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[8]\n 4: west_data_o_iact_inferred_i_8__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_8__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_8/O (LUT6)\n 1: west_data_o_iact_inferred_i_8/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[8]\n : east_data_i_iact_inferred__0/out[8]\n : east_data_i_iact_inferred__0/in0[8]\n : east_data_i_iact_inferred/out[8]\n : east_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[8]\n 2: west_data_o_iact_inferred_i_8__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_8__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_8\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_8__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_8__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[8]\n : south_data_i_iact_inferred__2/out[8]\n : south_data_i_iact_inferred__2/in0[8]\n : south_data_i_iact_inferred__1/out[8]\n : south_data_i_iact_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[8]\n 2: west_data_o_iact_inferred_i_8__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_8__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[8]\n : north_data_i_iact_inferred__2/out[8]\n : north_data_i_iact_inferred__2/in0[8]\n : north_data_i_iact_inferred__1/out[8]\n : north_data_i_iact_inferred__1/in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[8]\n 4: west_data_o_iact_inferred_i_8__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_8__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_8__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_8__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[8]\n : north_data_i_iact_inferred__0/out[8]\n : north_data_i_iact_inferred__0/in0[8]\n : north_data_i_iact_inferred/out[8]\n : north_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[8]\n 2: west_data_o_iact_inferred_i_8/O (LUT6)\n 3: west_data_o_iact_inferred_i_8/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[8]\n : south_data_i_iact_inferred__0/out[8]\n : south_data_i_iact_inferred__0/in0[8]\n : south_data_i_iact_inferred/out[8]\n : south_data_i_iact_inferred/in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[8]\n 4: west_data_o_iact_inferred_i_8__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_8__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_7__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_7__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[9]\n : west_data_i_iact_inferred__0/out[9]\n : west_data_i_iact_inferred__0/in0[9]\n : west_data_i_iact_inferred/out[9]\n : west_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[9]\n 2: west_data_o_iact_inferred_i_7/O (LUT6)\n 3: west_data_o_iact_inferred_i_7/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[9]\n : east_data_i_iact_inferred__0/out[9]\n : east_data_i_iact_inferred__0/in0[9]\n : east_data_i_iact_inferred/out[9]\n : east_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[9]\n 4: west_data_o_iact_inferred_i_7__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_7__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_7/O (LUT6)\n 1: west_data_o_iact_inferred_i_7/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[9]\n : east_data_i_iact_inferred__0/out[9]\n : east_data_i_iact_inferred__0/in0[9]\n : east_data_i_iact_inferred/out[9]\n : east_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[9]\n 2: west_data_o_iact_inferred_i_7__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_7__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_7\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_7__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_7__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[9]\n : south_data_i_iact_inferred__2/out[9]\n : south_data_i_iact_inferred__2/in0[9]\n : south_data_i_iact_inferred__1/out[9]\n : south_data_i_iact_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[9]\n 2: west_data_o_iact_inferred_i_7__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_7__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[9]\n : north_data_i_iact_inferred__2/out[9]\n : north_data_i_iact_inferred__2/in0[9]\n : north_data_i_iact_inferred__1/out[9]\n : north_data_i_iact_inferred__1/in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[9]\n 4: west_data_o_iact_inferred_i_7__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_7__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_7__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_7__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[9]\n : north_data_i_iact_inferred__0/out[9]\n : north_data_i_iact_inferred__0/in0[9]\n : north_data_i_iact_inferred/out[9]\n : north_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[9]\n 2: west_data_o_iact_inferred_i_7/O (LUT6)\n 3: west_data_o_iact_inferred_i_7/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[9]\n : south_data_i_iact_inferred__0/out[9]\n : south_data_i_iact_inferred__0/in0[9]\n : south_data_i_iact_inferred/out[9]\n : south_data_i_iact_inferred/in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[9]\n 4: west_data_o_iact_inferred_i_7__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_7__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_6__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_6__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[10]\n : west_data_i_iact_inferred__0/out[10]\n : west_data_i_iact_inferred__0/in0[10]\n : west_data_i_iact_inferred/out[10]\n : west_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[10]\n 2: west_data_o_iact_inferred_i_6/O (LUT6)\n 3: west_data_o_iact_inferred_i_6/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[10]\n : east_data_i_iact_inferred__0/out[10]\n : east_data_i_iact_inferred__0/in0[10]\n : east_data_i_iact_inferred/out[10]\n : east_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[10]\n 4: west_data_o_iact_inferred_i_6__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_6__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_6/O (LUT6)\n 1: west_data_o_iact_inferred_i_6/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[10]\n : east_data_i_iact_inferred__0/out[10]\n : east_data_i_iact_inferred__0/in0[10]\n : east_data_i_iact_inferred/out[10]\n : east_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[10]\n 2: west_data_o_iact_inferred_i_6__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_6__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_6\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_6__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_6__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[10]\n : south_data_i_iact_inferred__2/out[10]\n : south_data_i_iact_inferred__2/in0[10]\n : south_data_i_iact_inferred__1/out[10]\n : south_data_i_iact_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[10]\n 2: west_data_o_iact_inferred_i_6__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_6__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[10]\n : north_data_i_iact_inferred__2/out[10]\n : north_data_i_iact_inferred__2/in0[10]\n : north_data_i_iact_inferred__1/out[10]\n : north_data_i_iact_inferred__1/in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[10]\n 4: west_data_o_iact_inferred_i_6__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_6__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_6__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_6__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[10]\n : north_data_i_iact_inferred__0/out[10]\n : north_data_i_iact_inferred__0/in0[10]\n : north_data_i_iact_inferred/out[10]\n : north_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[10]\n 2: west_data_o_iact_inferred_i_6/O (LUT6)\n 3: west_data_o_iact_inferred_i_6/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[10]\n : south_data_i_iact_inferred__0/out[10]\n : south_data_i_iact_inferred__0/in0[10]\n : south_data_i_iact_inferred/out[10]\n : south_data_i_iact_inferred/in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[10]\n 4: west_data_o_iact_inferred_i_6__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_6__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_5__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_5__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[11]\n : north_data_i_iact_inferred__0/out[11]\n : north_data_i_iact_inferred__0/in0[11]\n : north_data_i_iact_inferred/out[11]\n : north_data_i_iact_inferred/in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[11]\n 2: west_data_o_iact_inferred_i_5/O (LUT6)\n 3: west_data_o_iact_inferred_i_5/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[11]\n : south_data_i_iact_inferred__0/out[11]\n : south_data_i_iact_inferred__0/in0[11]\n : south_data_i_iact_inferred/out[11]\n : south_data_i_iact_inferred/in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[11]\n 4: west_data_o_iact_inferred_i_5__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_5__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_5__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_5__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[11]\n : south_data_i_iact_inferred__2/out[11]\n : south_data_i_iact_inferred__2/in0[11]\n : south_data_i_iact_inferred__1/out[11]\n : south_data_i_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[11]\n 2: west_data_o_iact_inferred_i_5__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_5__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[11]\n : north_data_i_iact_inferred__2/out[11]\n : north_data_i_iact_inferred__2/in0[11]\n : north_data_i_iact_inferred__1/out[11]\n : north_data_i_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[11]\n 4: west_data_o_iact_inferred_i_5__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_5__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_5__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_5__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[11]\n : east_data_i_iact_inferred__2/out[11]\n : east_data_i_iact_inferred__2/in0[11]\n : east_data_i_iact_inferred__1/out[11]\n : east_data_i_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[11]\n 2: west_data_o_iact_inferred_i_5__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_5__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[11]\n : north_data_i_iact_inferred__2/out[11]\n : north_data_i_iact_inferred__2/in0[11]\n : north_data_i_iact_inferred__1/out[11]\n : north_data_i_iact_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[11]\n 4: west_data_o_iact_inferred_i_5__1/O (LUT6)\n 5: west_data_o_iact_inferred_i_5__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[11]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[11]\n : west_data_i_iact_inferred__0/out[11]\n : west_data_i_iact_inferred__0/in0[11]\n : west_data_i_iact_inferred/out[11]\n : west_data_i_iact_inferred/in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[11]\n 6: west_data_o_iact_inferred_i_5/O (LUT6)\n 7: west_data_o_iact_inferred_i_5/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[11]\n : south_data_i_iact_inferred__0/out[11]\n : south_data_i_iact_inferred__0/in0[11]\n : south_data_i_iact_inferred/out[11]\n : south_data_i_iact_inferred/in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[11]\n 8: west_data_o_iact_inferred_i_5__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_5__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_5/O (LUT6)\n 1: west_data_o_iact_inferred_i_5/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[11]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[11]\n : south_data_i_iact_inferred__0/out[11]\n : south_data_i_iact_inferred__0/in0[11]\n : south_data_i_iact_inferred/out[11]\n : south_data_i_iact_inferred/in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[11]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[11]\n 2: west_data_o_iact_inferred_i_5__0/O (LUT6)\n 3: west_data_o_iact_inferred_i_5__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_5\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_4__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_4__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[12]\n : north_data_i_iact_inferred__0/out[12]\n : north_data_i_iact_inferred__0/in0[12]\n : north_data_i_iact_inferred/out[12]\n : north_data_i_iact_inferred/in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[12]\n 2: west_data_o_iact_inferred_i_4/O (LUT6)\n 3: west_data_o_iact_inferred_i_4/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[12]\n : south_data_i_iact_inferred__0/out[12]\n : south_data_i_iact_inferred__0/in0[12]\n : south_data_i_iact_inferred/out[12]\n : south_data_i_iact_inferred/in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[12]\n 4: west_data_o_iact_inferred_i_4__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_4__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_4__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_4__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[12]\n : south_data_i_iact_inferred__2/out[12]\n : south_data_i_iact_inferred__2/in0[12]\n : south_data_i_iact_inferred__1/out[12]\n : south_data_i_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[12]\n 2: west_data_o_iact_inferred_i_4__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_4__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[12]\n : north_data_i_iact_inferred__2/out[12]\n : north_data_i_iact_inferred__2/in0[12]\n : north_data_i_iact_inferred__1/out[12]\n : north_data_i_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[12]\n 4: west_data_o_iact_inferred_i_4__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_4__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_4__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_4__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[12]\n : east_data_i_iact_inferred__2/out[12]\n : east_data_i_iact_inferred__2/in0[12]\n : east_data_i_iact_inferred__1/out[12]\n : east_data_i_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[12]\n 2: west_data_o_iact_inferred_i_4__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_4__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[12]\n : north_data_i_iact_inferred__2/out[12]\n : north_data_i_iact_inferred__2/in0[12]\n : north_data_i_iact_inferred__1/out[12]\n : north_data_i_iact_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[12]\n 4: west_data_o_iact_inferred_i_4__1/O (LUT6)\n 5: west_data_o_iact_inferred_i_4__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[12]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[12]\n : west_data_i_iact_inferred__0/out[12]\n : west_data_i_iact_inferred__0/in0[12]\n : west_data_i_iact_inferred/out[12]\n : west_data_i_iact_inferred/in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[12]\n 6: west_data_o_iact_inferred_i_4/O (LUT6)\n 7: west_data_o_iact_inferred_i_4/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[12]\n : south_data_i_iact_inferred__0/out[12]\n : south_data_i_iact_inferred__0/in0[12]\n : south_data_i_iact_inferred/out[12]\n : south_data_i_iact_inferred/in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[12]\n 8: west_data_o_iact_inferred_i_4__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_4__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_4/O (LUT6)\n 1: west_data_o_iact_inferred_i_4/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[12]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[12]\n : south_data_i_iact_inferred__0/out[12]\n : south_data_i_iact_inferred__0/in0[12]\n : south_data_i_iact_inferred/out[12]\n : south_data_i_iact_inferred/in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[12]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[12]\n 2: west_data_o_iact_inferred_i_4__0/O (LUT6)\n 3: west_data_o_iact_inferred_i_4__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_4\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_3__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_3__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[13]\n : west_data_i_iact_inferred__0/out[13]\n : west_data_i_iact_inferred__0/in0[13]\n : west_data_i_iact_inferred/out[13]\n : west_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[13]\n 2: west_data_o_iact_inferred_i_3/O (LUT6)\n 3: west_data_o_iact_inferred_i_3/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[13]\n : east_data_i_iact_inferred__0/out[13]\n : east_data_i_iact_inferred__0/in0[13]\n : east_data_i_iact_inferred/out[13]\n : east_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[13]\n 4: west_data_o_iact_inferred_i_3__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_3__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_3/O (LUT6)\n 1: west_data_o_iact_inferred_i_3/I3 (LUT6)\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_i_iact_inferred /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_iact_inferred /in0[13]\n : east_data_i_iact_inferred__0/out[13]\n : east_data_i_iact_inferred__0/in0[13]\n : east_data_i_iact_inferred/out[13]\n : east_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_iact_inferred /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_iact_inferred /in0[13]\n 2: west_data_o_iact_inferred_i_3__1/O (LUT6)\n 3: west_data_o_iact_inferred_i_3__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_3\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_3__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_3__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[13]\n : south_data_i_iact_inferred__2/out[13]\n : south_data_i_iact_inferred__2/in0[13]\n : south_data_i_iact_inferred__1/out[13]\n : south_data_i_iact_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[13]\n 2: west_data_o_iact_inferred_i_3__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_3__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[13]\n : north_data_i_iact_inferred__2/out[13]\n : north_data_i_iact_inferred__2/in0[13]\n : north_data_i_iact_inferred__1/out[13]\n : north_data_i_iact_inferred__1/in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[13]\n 4: west_data_o_iact_inferred_i_3__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_3__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_3__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_3__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[13]\n : north_data_i_iact_inferred__0/out[13]\n : north_data_i_iact_inferred__0/in0[13]\n : north_data_i_iact_inferred/out[13]\n : north_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[13]\n 2: west_data_o_iact_inferred_i_3/O (LUT6)\n 3: west_data_o_iact_inferred_i_3/I2 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[13]\n : south_data_i_iact_inferred__0/out[13]\n : south_data_i_iact_inferred__0/in0[13]\n : south_data_i_iact_inferred/out[13]\n : south_data_i_iact_inferred/in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[13]\n 4: west_data_o_iact_inferred_i_3__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_3__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_2__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_2__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[14]\n : north_data_i_iact_inferred__0/out[14]\n : north_data_i_iact_inferred__0/in0[14]\n : north_data_i_iact_inferred/out[14]\n : north_data_i_iact_inferred/in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[14]\n 2: west_data_o_iact_inferred_i_2/O (LUT6)\n 3: west_data_o_iact_inferred_i_2/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[14]\n : south_data_i_iact_inferred__0/out[14]\n : south_data_i_iact_inferred__0/in0[14]\n : south_data_i_iact_inferred/out[14]\n : south_data_i_iact_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[14]\n 4: west_data_o_iact_inferred_i_2__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_2__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_2__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_2__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[14]\n : south_data_i_iact_inferred__2/out[14]\n : south_data_i_iact_inferred__2/in0[14]\n : south_data_i_iact_inferred__1/out[14]\n : south_data_i_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[14]\n 2: west_data_o_iact_inferred_i_2__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_2__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[14]\n : north_data_i_iact_inferred__2/out[14]\n : north_data_i_iact_inferred__2/in0[14]\n : north_data_i_iact_inferred__1/out[14]\n : north_data_i_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[14]\n 4: west_data_o_iact_inferred_i_2__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_2__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_2__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_2__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[14]\n : east_data_i_iact_inferred__2/out[14]\n : east_data_i_iact_inferred__2/in0[14]\n : east_data_i_iact_inferred__1/out[14]\n : east_data_i_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[14]\n 2: west_data_o_iact_inferred_i_2__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_2__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[14]\n : north_data_i_iact_inferred__2/out[14]\n : north_data_i_iact_inferred__2/in0[14]\n : north_data_i_iact_inferred__1/out[14]\n : north_data_i_iact_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[14]\n 4: west_data_o_iact_inferred_i_2__1/O (LUT6)\n 5: west_data_o_iact_inferred_i_2__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[14]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[14]\n : west_data_i_iact_inferred__0/out[14]\n : west_data_i_iact_inferred__0/in0[14]\n : west_data_i_iact_inferred/out[14]\n : west_data_i_iact_inferred/in0[14]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[14]\n 6: west_data_o_iact_inferred_i_2/O (LUT6)\n 7: west_data_o_iact_inferred_i_2/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[14]\n : south_data_i_iact_inferred__0/out[14]\n : south_data_i_iact_inferred__0/in0[14]\n : south_data_i_iact_inferred/out[14]\n : south_data_i_iact_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[14]\n 8: west_data_o_iact_inferred_i_2__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_2__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_2/O (LUT6)\n 1: west_data_o_iact_inferred_i_2/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[14]\n : south_data_i_iact_inferred__0/out[14]\n : south_data_i_iact_inferred__0/in0[14]\n : south_data_i_iact_inferred/out[14]\n : south_data_i_iact_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[14]\n 2: west_data_o_iact_inferred_i_2__0/O (LUT6)\n 3: west_data_o_iact_inferred_i_2__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_2\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_1__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_1__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_iact_inferred /in0[15]\n : north_data_i_iact_inferred__0/out[15]\n : north_data_i_iact_inferred__0/in0[15]\n : north_data_i_iact_inferred/out[15]\n : north_data_i_iact_inferred/in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_iact_inferred /in0[15]\n 2: west_data_o_iact_inferred_i_1/O (LUT6)\n 3: west_data_o_iact_inferred_i_1/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[15]\n : south_data_i_iact_inferred__0/out[15]\n : south_data_i_iact_inferred__0/in0[15]\n : south_data_i_iact_inferred/out[15]\n : south_data_i_iact_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[15]\n 4: west_data_o_iact_inferred_i_1__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_iact_inferred_i_1__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_1__1/O (LUT6)\n 1: west_data_o_iact_inferred_i_1__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_iact_inferred /in0[15]\n : south_data_i_iact_inferred__2/out[15]\n : south_data_i_iact_inferred__2/in0[15]\n : south_data_i_iact_inferred__1/out[15]\n : south_data_i_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_iact_inferred /in0[15]\n 2: west_data_o_iact_inferred_i_1__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_1__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[15]\n : north_data_i_iact_inferred__2/out[15]\n : north_data_i_iact_inferred__2/in0[15]\n : north_data_i_iact_inferred__1/out[15]\n : north_data_i_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[15]\n 4: west_data_o_iact_inferred_i_1__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_1__1\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_1__0/O (LUT6)\n 1: west_data_o_iact_inferred_i_1__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/router_cluster_0/east_data_i_iact_inferred /in0[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/east_data_i_iact_inferred /in0[15]\n : east_data_i_iact_inferred__2/out[15]\n : east_data_i_iact_inferred__2/in0[15]\n : east_data_i_iact_inferred__1/out[15]\n : east_data_i_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/west_data_o_iact_inferred /in0[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_iact_inferred /in0[15]\n 2: west_data_o_iact_inferred_i_1__2/O (LUT6)\n 3: west_data_o_iact_inferred_i_1__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_iact_inferred /in0[15]\n : north_data_i_iact_inferred__2/out[15]\n : north_data_i_iact_inferred__2/in0[15]\n : north_data_i_iact_inferred__1/out[15]\n : north_data_i_iact_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_iact_inferred /in0[15]\n 4: west_data_o_iact_inferred_i_1__1/O (LUT6)\n 5: west_data_o_iact_inferred_i_1__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_i_iact_inferred /in0[15]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_east_0/west_data_i_iact_inferred /in0[15]\n : west_data_i_iact_inferred__0/out[15]\n : west_data_i_iact_inferred__0/in0[15]\n : west_data_i_iact_inferred/out[15]\n : west_data_i_iact_inferred/in0[15]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/east_data_o_iact_inferred /in0[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_iact_inferred /in0[15]\n 6: west_data_o_iact_inferred_i_1/O (LUT6)\n 7: west_data_o_iact_inferred_i_1/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[15]\n : south_data_i_iact_inferred__0/out[15]\n : south_data_i_iact_inferred__0/in0[15]\n : south_data_i_iact_inferred/out[15]\n : south_data_i_iact_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[15]\n 8: west_data_o_iact_inferred_i_1__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_iact_inferred_i_1__0\"\nFound timing loop:\n 0: west_data_o_iact_inferred_i_1/O (LUT6)\n 1: west_data_o_iact_inferred_i_1/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_iact_inferred /in0[15]\n : south_data_i_iact_inferred__0/out[15]\n : south_data_i_iact_inferred__0/in0[15]\n : south_data_i_iact_inferred/out[15]\n : south_data_i_iact_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_iact_inferred /in0[15]\n 2: west_data_o_iact_inferred_i_1__0/O (LUT6)\n 3: west_data_o_iact_inferred_i_1__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_iact_inferred_i_1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_16/O (LUT6)\n 1: west_data_o_psum_inferred_i_16/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[0]\n : north_data_i_psum_inferred__0/out[0]\n : north_data_i_psum_inferred__0/in0[0]\n : north_data_i_psum_inferred/out[0]\n : north_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[0]\n 2: west_data_o_psum_inferred_i_16__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_16__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[0]\n : south_data_i_psum_inferred__0/out[0]\n : south_data_i_psum_inferred__0/in0[0]\n : south_data_i_psum_inferred/out[0]\n : south_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[0]\n 4: west_data_o_psum_inferred_i_16/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_16\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_16__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_16__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[0]\n : south_data_i_psum_inferred__0/out[0]\n : south_data_i_psum_inferred__0/in0[0]\n : south_data_i_psum_inferred/out[0]\n : south_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[0]\n 2: west_data_o_psum_inferred_i_16/O (LUT6)\n 3: west_data_o_psum_inferred_i_16/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_16__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_16__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_16__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[0]\n : west_data_i_psum_inferred__0/out[0]\n : west_data_i_psum_inferred__0/in0[0]\n : west_data_i_psum_inferred/out[0]\n : west_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[0]\n 2: west_data_o_psum_inferred_i_16__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_16__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[0]\n : east_data_i_psum_inferred__0/out[0]\n : east_data_i_psum_inferred__0/in0[0]\n : east_data_i_psum_inferred/out[0]\n : east_data_i_psum_inferred/in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[0]\n 4: west_data_o_psum_inferred_i_16__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_16__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_16/O (LUT6)\n 1: west_data_o_psum_inferred_i_16/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[0]\n : east_data_i_psum_inferred__2/out[0]\n : east_data_i_psum_inferred__2/in0[0]\n : east_data_i_psum_inferred__1/out[0]\n : east_data_i_psum_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[0]\n 2: west_data_o_psum_inferred_i_16__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_16__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[0]\n : south_data_o_psum_inferred__2/out[0]\n : south_data_o_psum_inferred__2/in0[0]\n : south_data_o_psum_inferred__1/out[0]\n : south_data_o_psum_inferred__1/in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[0]\n 4: west_data_o_psum_inferred_i_16__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_16__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[0]\n : south_data_i_psum_inferred__2/out[0]\n : south_data_i_psum_inferred__2/in0[0]\n : south_data_i_psum_inferred__1/out[0]\n : south_data_i_psum_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[0]\n 6: west_data_o_psum_inferred_i_16__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_16\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_16__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_16__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[0]\n : south_data_o_psum_inferred__2/out[0]\n : south_data_o_psum_inferred__2/in0[0]\n : south_data_o_psum_inferred__1/out[0]\n : south_data_o_psum_inferred__1/in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[0]\n 2: west_data_o_psum_inferred_i_16__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_16__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[0]\n : south_data_i_psum_inferred__2/out[0]\n : south_data_i_psum_inferred__2/in0[0]\n : south_data_i_psum_inferred__1/out[0]\n : south_data_i_psum_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[0]\n 4: west_data_o_psum_inferred_i_16__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_16__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_14/O (LUT6)\n 1: west_data_o_psum_inferred_i_14/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[2]\n : north_data_i_psum_inferred__0/out[2]\n : north_data_i_psum_inferred__0/in0[2]\n : north_data_i_psum_inferred/out[2]\n : north_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[2]\n 2: west_data_o_psum_inferred_i_14__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_14__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[2]\n : south_data_i_psum_inferred__0/out[2]\n : south_data_i_psum_inferred__0/in0[2]\n : south_data_i_psum_inferred/out[2]\n : south_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[2]\n 4: west_data_o_psum_inferred_i_14/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_14\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_14__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_14__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[2]\n : south_data_i_psum_inferred__0/out[2]\n : south_data_i_psum_inferred__0/in0[2]\n : south_data_i_psum_inferred/out[2]\n : south_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[2]\n 2: west_data_o_psum_inferred_i_14/O (LUT6)\n 3: west_data_o_psum_inferred_i_14/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_14__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_14__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_14__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[2]\n : west_data_i_psum_inferred__0/out[2]\n : west_data_i_psum_inferred__0/in0[2]\n : west_data_i_psum_inferred/out[2]\n : west_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[2]\n 2: west_data_o_psum_inferred_i_14__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_14__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[2]\n : east_data_i_psum_inferred__0/out[2]\n : east_data_i_psum_inferred__0/in0[2]\n : east_data_i_psum_inferred/out[2]\n : east_data_i_psum_inferred/in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[2]\n 4: west_data_o_psum_inferred_i_14__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_14__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_14/O (LUT6)\n 1: west_data_o_psum_inferred_i_14/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[2]\n : east_data_i_psum_inferred__2/out[2]\n : east_data_i_psum_inferred__2/in0[2]\n : east_data_i_psum_inferred__1/out[2]\n : east_data_i_psum_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[2]\n 2: west_data_o_psum_inferred_i_14__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_14__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[2]\n : south_data_o_psum_inferred__2/out[2]\n : south_data_o_psum_inferred__2/in0[2]\n : south_data_o_psum_inferred__1/out[2]\n : south_data_o_psum_inferred__1/in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[2]\n 4: west_data_o_psum_inferred_i_14__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_14__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[2]\n : south_data_i_psum_inferred__2/out[2]\n : south_data_i_psum_inferred__2/in0[2]\n : south_data_i_psum_inferred__1/out[2]\n : south_data_i_psum_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[2]\n 6: west_data_o_psum_inferred_i_14__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_14\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_14__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_14__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[2]\n : south_data_o_psum_inferred__2/out[2]\n : south_data_o_psum_inferred__2/in0[2]\n : south_data_o_psum_inferred__1/out[2]\n : south_data_o_psum_inferred__1/in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[2]\n 2: west_data_o_psum_inferred_i_14__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_14__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[2]\n : south_data_i_psum_inferred__2/out[2]\n : south_data_i_psum_inferred__2/in0[2]\n : south_data_i_psum_inferred__1/out[2]\n : south_data_i_psum_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[2]\n 4: west_data_o_psum_inferred_i_14__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_14__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_12/O (LUT6)\n 1: west_data_o_psum_inferred_i_12/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[4]\n : north_data_i_psum_inferred__0/out[4]\n : north_data_i_psum_inferred__0/in0[4]\n : north_data_i_psum_inferred/out[4]\n : north_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[4]\n 2: west_data_o_psum_inferred_i_12__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_12__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[4]\n : south_data_i_psum_inferred__0/out[4]\n : south_data_i_psum_inferred__0/in0[4]\n : south_data_i_psum_inferred/out[4]\n : south_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[4]\n 4: west_data_o_psum_inferred_i_12/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_12\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_12__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_12__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[4]\n : south_data_i_psum_inferred__0/out[4]\n : south_data_i_psum_inferred__0/in0[4]\n : south_data_i_psum_inferred/out[4]\n : south_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[4]\n 2: west_data_o_psum_inferred_i_12/O (LUT6)\n 3: west_data_o_psum_inferred_i_12/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_12__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_12__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_12__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[4]\n : west_data_i_psum_inferred__0/out[4]\n : west_data_i_psum_inferred__0/in0[4]\n : west_data_i_psum_inferred/out[4]\n : west_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[4]\n 2: west_data_o_psum_inferred_i_12__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_12__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[4]\n : east_data_i_psum_inferred__0/out[4]\n : east_data_i_psum_inferred__0/in0[4]\n : east_data_i_psum_inferred/out[4]\n : east_data_i_psum_inferred/in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[4]\n 4: west_data_o_psum_inferred_i_12__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_12__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_12/O (LUT6)\n 1: west_data_o_psum_inferred_i_12/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[4]\n : east_data_i_psum_inferred__2/out[4]\n : east_data_i_psum_inferred__2/in0[4]\n : east_data_i_psum_inferred__1/out[4]\n : east_data_i_psum_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[4]\n 2: west_data_o_psum_inferred_i_12__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_12__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[4]\n : south_data_o_psum_inferred__2/out[4]\n : south_data_o_psum_inferred__2/in0[4]\n : south_data_o_psum_inferred__1/out[4]\n : south_data_o_psum_inferred__1/in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[4]\n 4: west_data_o_psum_inferred_i_12__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_12__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[4]\n : south_data_i_psum_inferred__2/out[4]\n : south_data_i_psum_inferred__2/in0[4]\n : south_data_i_psum_inferred__1/out[4]\n : south_data_i_psum_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[4]\n 6: west_data_o_psum_inferred_i_12__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_12\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_12__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_12__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[4]\n : south_data_o_psum_inferred__2/out[4]\n : south_data_o_psum_inferred__2/in0[4]\n : south_data_o_psum_inferred__1/out[4]\n : south_data_o_psum_inferred__1/in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[4]\n 2: west_data_o_psum_inferred_i_12__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_12__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[4]\n : south_data_i_psum_inferred__2/out[4]\n : south_data_i_psum_inferred__2/in0[4]\n : south_data_i_psum_inferred__1/out[4]\n : south_data_i_psum_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[4]\n 4: west_data_o_psum_inferred_i_12__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_12__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_11/O (LUT6)\n 1: west_data_o_psum_inferred_i_11/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[5]\n : north_data_i_psum_inferred__0/out[5]\n : north_data_i_psum_inferred__0/in0[5]\n : north_data_i_psum_inferred/out[5]\n : north_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[5]\n 2: west_data_o_psum_inferred_i_11__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_11__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[5]\n : south_data_i_psum_inferred__0/out[5]\n : south_data_i_psum_inferred__0/in0[5]\n : south_data_i_psum_inferred/out[5]\n : south_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[5]\n 4: west_data_o_psum_inferred_i_11/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_11\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_11__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_11__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[5]\n : south_data_i_psum_inferred__0/out[5]\n : south_data_i_psum_inferred__0/in0[5]\n : south_data_i_psum_inferred/out[5]\n : south_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[5]\n 2: west_data_o_psum_inferred_i_11/O (LUT6)\n 3: west_data_o_psum_inferred_i_11/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_11__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_11__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_11__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[5]\n : west_data_i_psum_inferred__0/out[5]\n : west_data_i_psum_inferred__0/in0[5]\n : west_data_i_psum_inferred/out[5]\n : west_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[5]\n 2: west_data_o_psum_inferred_i_11__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_11__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[5]\n : east_data_i_psum_inferred__0/out[5]\n : east_data_i_psum_inferred__0/in0[5]\n : east_data_i_psum_inferred/out[5]\n : east_data_i_psum_inferred/in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[5]\n 4: west_data_o_psum_inferred_i_11__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_11__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_11/O (LUT6)\n 1: west_data_o_psum_inferred_i_11/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[5]\n : east_data_i_psum_inferred__2/out[5]\n : east_data_i_psum_inferred__2/in0[5]\n : east_data_i_psum_inferred__1/out[5]\n : east_data_i_psum_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[5]\n 2: west_data_o_psum_inferred_i_11__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_11__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[5]\n : south_data_o_psum_inferred__2/out[5]\n : south_data_o_psum_inferred__2/in0[5]\n : south_data_o_psum_inferred__1/out[5]\n : south_data_o_psum_inferred__1/in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[5]\n 4: west_data_o_psum_inferred_i_11__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_11__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[5]\n : south_data_i_psum_inferred__2/out[5]\n : south_data_i_psum_inferred__2/in0[5]\n : south_data_i_psum_inferred__1/out[5]\n : south_data_i_psum_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[5]\n 6: west_data_o_psum_inferred_i_11__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_11\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_11__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_11__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[5]\n : south_data_o_psum_inferred__2/out[5]\n : south_data_o_psum_inferred__2/in0[5]\n : south_data_o_psum_inferred__1/out[5]\n : south_data_o_psum_inferred__1/in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[5]\n 2: west_data_o_psum_inferred_i_11__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_11__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[5]\n : south_data_i_psum_inferred__2/out[5]\n : south_data_i_psum_inferred__2/in0[5]\n : south_data_i_psum_inferred__1/out[5]\n : south_data_i_psum_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[5]\n 4: west_data_o_psum_inferred_i_11__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_11__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_10/O (LUT6)\n 1: west_data_o_psum_inferred_i_10/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[6]\n : north_data_i_psum_inferred__0/out[6]\n : north_data_i_psum_inferred__0/in0[6]\n : north_data_i_psum_inferred/out[6]\n : north_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[6]\n 2: west_data_o_psum_inferred_i_10__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_10__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[6]\n : south_data_i_psum_inferred__0/out[6]\n : south_data_i_psum_inferred__0/in0[6]\n : south_data_i_psum_inferred/out[6]\n : south_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[6]\n 4: west_data_o_psum_inferred_i_10/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_10\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_10__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_10__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[6]\n : south_data_i_psum_inferred__0/out[6]\n : south_data_i_psum_inferred__0/in0[6]\n : south_data_i_psum_inferred/out[6]\n : south_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[6]\n 2: west_data_o_psum_inferred_i_10/O (LUT6)\n 3: west_data_o_psum_inferred_i_10/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_10__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_10__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_10__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[6]\n : west_data_i_psum_inferred__0/out[6]\n : west_data_i_psum_inferred__0/in0[6]\n : west_data_i_psum_inferred/out[6]\n : west_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[6]\n 2: west_data_o_psum_inferred_i_10__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_10__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[6]\n : east_data_i_psum_inferred__0/out[6]\n : east_data_i_psum_inferred__0/in0[6]\n : east_data_i_psum_inferred/out[6]\n : east_data_i_psum_inferred/in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[6]\n 4: west_data_o_psum_inferred_i_10__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_10__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_10/O (LUT6)\n 1: west_data_o_psum_inferred_i_10/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[6]\n : east_data_i_psum_inferred__2/out[6]\n : east_data_i_psum_inferred__2/in0[6]\n : east_data_i_psum_inferred__1/out[6]\n : east_data_i_psum_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[6]\n 2: west_data_o_psum_inferred_i_10__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_10__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[6]\n : south_data_o_psum_inferred__2/out[6]\n : south_data_o_psum_inferred__2/in0[6]\n : south_data_o_psum_inferred__1/out[6]\n : south_data_o_psum_inferred__1/in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[6]\n 4: west_data_o_psum_inferred_i_10__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_10__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[6]\n : south_data_i_psum_inferred__2/out[6]\n : south_data_i_psum_inferred__2/in0[6]\n : south_data_i_psum_inferred__1/out[6]\n : south_data_i_psum_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[6]\n 6: west_data_o_psum_inferred_i_10__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_10\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_10__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_10__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[6]\n : south_data_o_psum_inferred__2/out[6]\n : south_data_o_psum_inferred__2/in0[6]\n : south_data_o_psum_inferred__1/out[6]\n : south_data_o_psum_inferred__1/in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[6]\n 2: west_data_o_psum_inferred_i_10__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_10__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[6]\n : south_data_i_psum_inferred__2/out[6]\n : south_data_i_psum_inferred__2/in0[6]\n : south_data_i_psum_inferred__1/out[6]\n : south_data_i_psum_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[6]\n 4: west_data_o_psum_inferred_i_10__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_10__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_8/O (LUT6)\n 1: west_data_o_psum_inferred_i_8/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[8]\n : north_data_i_psum_inferred__0/out[8]\n : north_data_i_psum_inferred__0/in0[8]\n : north_data_i_psum_inferred/out[8]\n : north_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[8]\n 2: west_data_o_psum_inferred_i_8__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_8__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[8]\n : south_data_i_psum_inferred__0/out[8]\n : south_data_i_psum_inferred__0/in0[8]\n : south_data_i_psum_inferred/out[8]\n : south_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[8]\n 4: west_data_o_psum_inferred_i_8/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_8\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_8__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_8__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[8]\n : south_data_i_psum_inferred__0/out[8]\n : south_data_i_psum_inferred__0/in0[8]\n : south_data_i_psum_inferred/out[8]\n : south_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[8]\n 2: west_data_o_psum_inferred_i_8/O (LUT6)\n 3: west_data_o_psum_inferred_i_8/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_8__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_8__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_8__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[8]\n : west_data_i_psum_inferred__0/out[8]\n : west_data_i_psum_inferred__0/in0[8]\n : west_data_i_psum_inferred/out[8]\n : west_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[8]\n 2: west_data_o_psum_inferred_i_8__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_8__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[8]\n : east_data_i_psum_inferred__0/out[8]\n : east_data_i_psum_inferred__0/in0[8]\n : east_data_i_psum_inferred/out[8]\n : east_data_i_psum_inferred/in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[8]\n 4: west_data_o_psum_inferred_i_8__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_8__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_8/O (LUT6)\n 1: west_data_o_psum_inferred_i_8/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[8]\n : east_data_i_psum_inferred__2/out[8]\n : east_data_i_psum_inferred__2/in0[8]\n : east_data_i_psum_inferred__1/out[8]\n : east_data_i_psum_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[8]\n 2: west_data_o_psum_inferred_i_8__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_8__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[8]\n : south_data_o_psum_inferred__2/out[8]\n : south_data_o_psum_inferred__2/in0[8]\n : south_data_o_psum_inferred__1/out[8]\n : south_data_o_psum_inferred__1/in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[8]\n 4: west_data_o_psum_inferred_i_8__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_8__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[8]\n : south_data_i_psum_inferred__2/out[8]\n : south_data_i_psum_inferred__2/in0[8]\n : south_data_i_psum_inferred__1/out[8]\n : south_data_i_psum_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[8]\n 6: west_data_o_psum_inferred_i_8__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_8\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_8__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_8__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[8]\n : south_data_o_psum_inferred__2/out[8]\n : south_data_o_psum_inferred__2/in0[8]\n : south_data_o_psum_inferred__1/out[8]\n : south_data_o_psum_inferred__1/in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[8]\n 2: west_data_o_psum_inferred_i_8__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_8__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[8]\n : south_data_i_psum_inferred__2/out[8]\n : south_data_i_psum_inferred__2/in0[8]\n : south_data_i_psum_inferred__1/out[8]\n : south_data_i_psum_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[8]\n 4: west_data_o_psum_inferred_i_8__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_8__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_7/O (LUT6)\n 1: west_data_o_psum_inferred_i_7/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[9]\n : north_data_i_psum_inferred__0/out[9]\n : north_data_i_psum_inferred__0/in0[9]\n : north_data_i_psum_inferred/out[9]\n : north_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[9]\n 2: west_data_o_psum_inferred_i_7__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_7__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[9]\n : south_data_i_psum_inferred__0/out[9]\n : south_data_i_psum_inferred__0/in0[9]\n : south_data_i_psum_inferred/out[9]\n : south_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[9]\n 4: west_data_o_psum_inferred_i_7/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_7\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_7__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_7__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[9]\n : south_data_i_psum_inferred__0/out[9]\n : south_data_i_psum_inferred__0/in0[9]\n : south_data_i_psum_inferred/out[9]\n : south_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[9]\n 2: west_data_o_psum_inferred_i_7/O (LUT6)\n 3: west_data_o_psum_inferred_i_7/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_7__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_7__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_7__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[9]\n : west_data_i_psum_inferred__0/out[9]\n : west_data_i_psum_inferred__0/in0[9]\n : west_data_i_psum_inferred/out[9]\n : west_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[9]\n 2: west_data_o_psum_inferred_i_7__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_7__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[9]\n : east_data_i_psum_inferred__0/out[9]\n : east_data_i_psum_inferred__0/in0[9]\n : east_data_i_psum_inferred/out[9]\n : east_data_i_psum_inferred/in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[9]\n 4: west_data_o_psum_inferred_i_7__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_7__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_7/O (LUT6)\n 1: west_data_o_psum_inferred_i_7/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[9]\n : east_data_i_psum_inferred__2/out[9]\n : east_data_i_psum_inferred__2/in0[9]\n : east_data_i_psum_inferred__1/out[9]\n : east_data_i_psum_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[9]\n 2: west_data_o_psum_inferred_i_7__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_7__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[9]\n : south_data_o_psum_inferred__2/out[9]\n : south_data_o_psum_inferred__2/in0[9]\n : south_data_o_psum_inferred__1/out[9]\n : south_data_o_psum_inferred__1/in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[9]\n 4: west_data_o_psum_inferred_i_7__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_7__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[9]\n : south_data_i_psum_inferred__2/out[9]\n : south_data_i_psum_inferred__2/in0[9]\n : south_data_i_psum_inferred__1/out[9]\n : south_data_i_psum_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[9]\n 6: west_data_o_psum_inferred_i_7__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_7\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_7__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_7__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[9]\n : south_data_o_psum_inferred__2/out[9]\n : south_data_o_psum_inferred__2/in0[9]\n : south_data_o_psum_inferred__1/out[9]\n : south_data_o_psum_inferred__1/in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[9]\n 2: west_data_o_psum_inferred_i_7__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_7__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[9]\n : south_data_i_psum_inferred__2/out[9]\n : south_data_i_psum_inferred__2/in0[9]\n : south_data_i_psum_inferred__1/out[9]\n : south_data_i_psum_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[9]\n 4: west_data_o_psum_inferred_i_7__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_7__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_6/O (LUT6)\n 1: west_data_o_psum_inferred_i_6/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[10]\n : north_data_i_psum_inferred__0/out[10]\n : north_data_i_psum_inferred__0/in0[10]\n : north_data_i_psum_inferred/out[10]\n : north_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[10]\n 2: west_data_o_psum_inferred_i_6__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_6__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[10]\n : south_data_i_psum_inferred__0/out[10]\n : south_data_i_psum_inferred__0/in0[10]\n : south_data_i_psum_inferred/out[10]\n : south_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[10]\n 4: west_data_o_psum_inferred_i_6/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_6\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_6__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_6__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[10]\n : south_data_i_psum_inferred__0/out[10]\n : south_data_i_psum_inferred__0/in0[10]\n : south_data_i_psum_inferred/out[10]\n : south_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[10]\n 2: west_data_o_psum_inferred_i_6/O (LUT6)\n 3: west_data_o_psum_inferred_i_6/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_6__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_6__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_6__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[10]\n : west_data_i_psum_inferred__0/out[10]\n : west_data_i_psum_inferred__0/in0[10]\n : west_data_i_psum_inferred/out[10]\n : west_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[10]\n 2: west_data_o_psum_inferred_i_6__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_6__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[10]\n : east_data_i_psum_inferred__0/out[10]\n : east_data_i_psum_inferred__0/in0[10]\n : east_data_i_psum_inferred/out[10]\n : east_data_i_psum_inferred/in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[10]\n 4: west_data_o_psum_inferred_i_6__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_6__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_6/O (LUT6)\n 1: west_data_o_psum_inferred_i_6/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[10]\n : east_data_i_psum_inferred__2/out[10]\n : east_data_i_psum_inferred__2/in0[10]\n : east_data_i_psum_inferred__1/out[10]\n : east_data_i_psum_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[10]\n 2: west_data_o_psum_inferred_i_6__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_6__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[10]\n : south_data_o_psum_inferred__2/out[10]\n : south_data_o_psum_inferred__2/in0[10]\n : south_data_o_psum_inferred__1/out[10]\n : south_data_o_psum_inferred__1/in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[10]\n 4: west_data_o_psum_inferred_i_6__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_6__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[10]\n : south_data_i_psum_inferred__2/out[10]\n : south_data_i_psum_inferred__2/in0[10]\n : south_data_i_psum_inferred__1/out[10]\n : south_data_i_psum_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[10]\n 6: west_data_o_psum_inferred_i_6__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_6\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_6__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_6__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[10]\n : south_data_o_psum_inferred__2/out[10]\n : south_data_o_psum_inferred__2/in0[10]\n : south_data_o_psum_inferred__1/out[10]\n : south_data_o_psum_inferred__1/in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[10]\n 2: west_data_o_psum_inferred_i_6__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_6__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[10]\n : south_data_i_psum_inferred__2/out[10]\n : south_data_i_psum_inferred__2/in0[10]\n : south_data_i_psum_inferred__1/out[10]\n : south_data_i_psum_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[10]\n 4: west_data_o_psum_inferred_i_6__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_6__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_3/O (LUT6)\n 1: west_data_o_psum_inferred_i_3/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[13]\n : north_data_i_psum_inferred__0/out[13]\n : north_data_i_psum_inferred__0/in0[13]\n : north_data_i_psum_inferred/out[13]\n : north_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[13]\n 2: west_data_o_psum_inferred_i_3__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_3__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[13]\n : south_data_i_psum_inferred__0/out[13]\n : south_data_i_psum_inferred__0/in0[13]\n : south_data_i_psum_inferred/out[13]\n : south_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[13]\n 4: west_data_o_psum_inferred_i_3/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_3\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_3__2/O (LUT6)\n 1: west_data_o_psum_inferred_i_3__2/I1 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[13]\n : south_data_i_psum_inferred__0/out[13]\n : south_data_i_psum_inferred__0/in0[13]\n : south_data_i_psum_inferred/out[13]\n : south_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[13]\n 2: west_data_o_psum_inferred_i_3/O (LUT6)\n 3: west_data_o_psum_inferred_i_3/O (LUT6)\nInferred a: \"set_disable_timing -from I1 -to O west_data_o_psum_inferred_i_3__2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_3__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_3__0/I3 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[13]\n : west_data_i_psum_inferred__0/out[13]\n : west_data_i_psum_inferred__0/in0[13]\n : west_data_i_psum_inferred/out[13]\n : west_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[13]\n 2: west_data_o_psum_inferred_i_3__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_3__2/I0 (LUT6)\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_0/east_data_i_psum_inferred /in0[13]\n : east_data_i_psum_inferred__0/out[13]\n : east_data_i_psum_inferred__0/in0[13]\n : east_data_i_psum_inferred/out[13]\n : east_data_i_psum_inferred/in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/west_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/router_cluster_0/west_data_o_psum_inferred /in0[13]\n 4: west_data_o_psum_inferred_i_3__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_3__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_3/O (LUT6)\n 1: west_data_o_psum_inferred_i_3/I3 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[13]\n : east_data_i_psum_inferred__2/out[13]\n : east_data_i_psum_inferred__2/in0[13]\n : east_data_i_psum_inferred__1/out[13]\n : east_data_i_psum_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[13]\n 2: west_data_o_psum_inferred_i_3__1/O (LUT6)\n 3: west_data_o_psum_inferred_i_3__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[13]\n : south_data_o_psum_inferred__2/out[13]\n : south_data_o_psum_inferred__2/in0[13]\n : south_data_o_psum_inferred__1/out[13]\n : south_data_o_psum_inferred__1/in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[13]\n 4: west_data_o_psum_inferred_i_3__0/O (LUT6)\n 5: west_data_o_psum_inferred_i_3__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[13]\n : south_data_i_psum_inferred__2/out[13]\n : south_data_i_psum_inferred__2/in0[13]\n : south_data_i_psum_inferred__1/out[13]\n : south_data_i_psum_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[13]\n 6: west_data_o_psum_inferred_i_3__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_3\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_3__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_3__1/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[13]\n : south_data_o_psum_inferred__2/out[13]\n : south_data_o_psum_inferred__2/in0[13]\n : south_data_o_psum_inferred__1/out[13]\n : south_data_o_psum_inferred__1/in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[13]\n 2: west_data_o_psum_inferred_i_3__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_3__0/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[13]\n : south_data_i_psum_inferred__2/out[13]\n : south_data_i_psum_inferred__2/in0[13]\n : south_data_i_psum_inferred__1/out[13]\n : south_data_i_psum_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[13]\n 4: west_data_o_psum_inferred_i_3__1/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_3__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_2__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_2__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[14]\n : north_data_i_psum_inferred__0/out[14]\n : north_data_i_psum_inferred__0/in0[14]\n : north_data_i_psum_inferred/out[14]\n : north_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[14]\n 2: west_data_o_psum_inferred_i_2/O (LUT6)\n 3: west_data_o_psum_inferred_i_2/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[14]\n : south_data_i_psum_inferred__0/out[14]\n : south_data_i_psum_inferred__0/in0[14]\n : south_data_i_psum_inferred/out[14]\n : south_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[14]\n 4: west_data_o_psum_inferred_i_2__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_2__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_2__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_2__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[14]\n : south_data_i_psum_inferred__2/out[14]\n : south_data_i_psum_inferred__2/in0[14]\n : south_data_i_psum_inferred__1/out[14]\n : south_data_i_psum_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[14]\n 2: west_data_o_psum_inferred_i_2__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_2__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[14]\n : south_data_o_psum_inferred__2/out[14]\n : south_data_o_psum_inferred__2/in0[14]\n : south_data_o_psum_inferred__1/out[14]\n : south_data_o_psum_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[14]\n 4: west_data_o_psum_inferred_i_2__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_2__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_2__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_2__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[14]\n : east_data_i_psum_inferred__2/out[14]\n : east_data_i_psum_inferred__2/in0[14]\n : east_data_i_psum_inferred__1/out[14]\n : east_data_i_psum_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[14]\n 2: west_data_o_psum_inferred_i_2__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_2__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[14]\n : south_data_o_psum_inferred__2/out[14]\n : south_data_o_psum_inferred__2/in0[14]\n : south_data_o_psum_inferred__1/out[14]\n : south_data_o_psum_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[14]\n 4: west_data_o_psum_inferred_i_2__1/O (LUT6)\n 5: west_data_o_psum_inferred_i_2__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[14]\n : west_data_i_psum_inferred__0/out[14]\n : west_data_i_psum_inferred__0/in0[14]\n : west_data_i_psum_inferred/out[14]\n : west_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[14]\n 6: west_data_o_psum_inferred_i_2/O (LUT6)\n 7: west_data_o_psum_inferred_i_2/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[14]\n : south_data_i_psum_inferred__0/out[14]\n : south_data_i_psum_inferred__0/in0[14]\n : south_data_i_psum_inferred/out[14]\n : south_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[14]\n 8: west_data_o_psum_inferred_i_2__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_psum_inferred_i_2__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_2/O (LUT6)\n 1: west_data_o_psum_inferred_i_2/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[14]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[14]\n : south_data_i_psum_inferred__0/out[14]\n : south_data_i_psum_inferred__0/in0[14]\n : south_data_i_psum_inferred/out[14]\n : south_data_i_psum_inferred/in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[14]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[14]\n 2: west_data_o_psum_inferred_i_2__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_2__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_2\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_2/O (LUT6)\n 1: west_data_o_psum_inferred_i_2/O (LUT6)\nFound timing loop:\n 0: west_data_o_psum_inferred_i_1__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_1__0/I5 (LUT6)\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_i_psum_inferred /in0[15]\n : north_data_i_psum_inferred__0/out[15]\n : north_data_i_psum_inferred__0/in0[15]\n : north_data_i_psum_inferred/out[15]\n : north_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_o_psum_inferred /in0[15]\n 2: west_data_o_psum_inferred_i_1/O (LUT6)\n 3: west_data_o_psum_inferred_i_1/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[15]\n : south_data_i_psum_inferred__0/out[15]\n : south_data_i_psum_inferred__0/in0[15]\n : south_data_i_psum_inferred/out[15]\n : south_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[15]\n 4: west_data_o_psum_inferred_i_1__0/O (LUT6)\nInferred a: \"set_disable_timing -from I5 -to O west_data_o_psum_inferred_i_1__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_1__1/O (LUT6)\n 1: west_data_o_psum_inferred_i_1__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_psum_inferred /in0[15]\n : south_data_i_psum_inferred__2/out[15]\n : south_data_i_psum_inferred__2/in0[15]\n : south_data_i_psum_inferred__1/out[15]\n : south_data_i_psum_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_psum_inferred /in0[15]\n 2: west_data_o_psum_inferred_i_1__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_1__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[15]\n : south_data_o_psum_inferred__2/out[15]\n : south_data_o_psum_inferred__2/in0[15]\n : south_data_o_psum_inferred__1/out[15]\n : south_data_o_psum_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[15]\n 4: west_data_o_psum_inferred_i_1__1/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_1__1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_1__0/O (LUT6)\n 1: west_data_o_psum_inferred_i_1__0/I2 (LUT6)\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/east_data_i_psum_inferred /in0[15]\n : east_data_i_psum_inferred__2/out[15]\n : east_data_i_psum_inferred__2/in0[15]\n : east_data_i_psum_inferred__1/out[15]\n : east_data_i_psum_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_east_1/west_data_o_psum_inferred /in0[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_east_1/router_cluster_0/west_data_o_psum_inferred /in0[15]\n 2: west_data_o_psum_inferred_i_1__2/O (LUT6)\n 3: west_data_o_psum_inferred_i_1__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_psum_inferred /in0[15]\n : south_data_o_psum_inferred__2/out[15]\n : south_data_o_psum_inferred__2/in0[15]\n : south_data_o_psum_inferred__1/out[15]\n : south_data_o_psum_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_psum_inferred /in0[15]\n 4: west_data_o_psum_inferred_i_1__1/O (LUT6)\n 5: west_data_o_psum_inferred_i_1__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_east_0/west_data_i_psum_inferred /in0[15]\n : west_data_i_psum_inferred__0/out[15]\n : west_data_i_psum_inferred__0/in0[15]\n : west_data_i_psum_inferred/out[15]\n : west_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/east_data_o_psum_inferred /in0[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/router_cluster_0/east_data_o_psum_inferred /in0[15]\n 6: west_data_o_psum_inferred_i_1/O (LUT6)\n 7: west_data_o_psum_inferred_i_1/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[15]\n : south_data_i_psum_inferred__0/out[15]\n : south_data_i_psum_inferred__0/in0[15]\n : south_data_i_psum_inferred/out[15]\n : south_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[15]\n 8: west_data_o_psum_inferred_i_1__0/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_psum_inferred_i_1__0\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_1/O (LUT6)\n 1: west_data_o_psum_inferred_i_1/I3 (LUT6)\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /out[15]\n : \\HMNoC_cluster_west_0/south_data_i_psum_inferred /in0[15]\n : south_data_i_psum_inferred__0/out[15]\n : south_data_i_psum_inferred__0/in0[15]\n : south_data_i_psum_inferred/out[15]\n : south_data_i_psum_inferred/in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred__0 /in0[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /out[15]\n : \\HMNoC_cluster_west_1/north_data_o_psum_inferred /in0[15]\n 2: west_data_o_psum_inferred_i_1__0/O (LUT6)\n 3: west_data_o_psum_inferred_i_1__0/O (LUT6)\nInferred a: \"set_disable_timing -from I3 -to O west_data_o_psum_inferred_i_1\"\nFound timing loop:\n 0: west_data_o_psum_inferred_i_1/O (LUT6)\n 1: west_data_o_psum_inferred_i_1/O (LUT6)\nFound timing loop:\n 0: west_data_o_wght_inferred_i_16__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_16__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[0]\n : south_data_i_wght_inferred__2/out[0]\n : south_data_i_wght_inferred__2/in0[0]\n : south_data_i_wght_inferred__1/out[0]\n : south_data_i_wght_inferred__1/in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[0]\n 2: west_data_o_wght_inferred_i_16__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_16__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[0]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[0]\n : north_data_i_wght_inferred__2/out[0]\n : north_data_i_wght_inferred__2/in0[0]\n : north_data_i_wght_inferred__1/out[0]\n : north_data_i_wght_inferred__1/in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[0]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[0]\n 4: west_data_o_wght_inferred_i_16__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_16__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_14__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_14__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[2]\n : south_data_i_wght_inferred__2/out[2]\n : south_data_i_wght_inferred__2/in0[2]\n : south_data_i_wght_inferred__1/out[2]\n : south_data_i_wght_inferred__1/in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[2]\n 2: west_data_o_wght_inferred_i_14__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_14__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[2]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[2]\n : north_data_i_wght_inferred__2/out[2]\n : north_data_i_wght_inferred__2/in0[2]\n : north_data_i_wght_inferred__1/out[2]\n : north_data_i_wght_inferred__1/in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[2]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[2]\n 4: west_data_o_wght_inferred_i_14__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_14__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_12__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_12__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[4]\n : south_data_i_wght_inferred__2/out[4]\n : south_data_i_wght_inferred__2/in0[4]\n : south_data_i_wght_inferred__1/out[4]\n : south_data_i_wght_inferred__1/in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[4]\n 2: west_data_o_wght_inferred_i_12__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_12__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[4]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[4]\n : north_data_i_wght_inferred__2/out[4]\n : north_data_i_wght_inferred__2/in0[4]\n : north_data_i_wght_inferred__1/out[4]\n : north_data_i_wght_inferred__1/in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[4]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[4]\n 4: west_data_o_wght_inferred_i_12__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_12__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_11__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_11__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[5]\n : south_data_i_wght_inferred__2/out[5]\n : south_data_i_wght_inferred__2/in0[5]\n : south_data_i_wght_inferred__1/out[5]\n : south_data_i_wght_inferred__1/in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[5]\n 2: west_data_o_wght_inferred_i_11__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_11__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[5]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[5]\n : north_data_i_wght_inferred__2/out[5]\n : north_data_i_wght_inferred__2/in0[5]\n : north_data_i_wght_inferred__1/out[5]\n : north_data_i_wght_inferred__1/in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[5]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[5]\n 4: west_data_o_wght_inferred_i_11__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_11__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_10__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_10__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[6]\n : south_data_i_wght_inferred__2/out[6]\n : south_data_i_wght_inferred__2/in0[6]\n : south_data_i_wght_inferred__1/out[6]\n : south_data_i_wght_inferred__1/in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[6]\n 2: west_data_o_wght_inferred_i_10__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_10__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[6]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[6]\n : north_data_i_wght_inferred__2/out[6]\n : north_data_i_wght_inferred__2/in0[6]\n : north_data_i_wght_inferred__1/out[6]\n : north_data_i_wght_inferred__1/in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[6]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[6]\n 4: west_data_o_wght_inferred_i_10__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_10__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_8__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_8__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[8]\n : south_data_i_wght_inferred__2/out[8]\n : south_data_i_wght_inferred__2/in0[8]\n : south_data_i_wght_inferred__1/out[8]\n : south_data_i_wght_inferred__1/in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[8]\n 2: west_data_o_wght_inferred_i_8__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_8__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[8]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[8]\n : north_data_i_wght_inferred__2/out[8]\n : north_data_i_wght_inferred__2/in0[8]\n : north_data_i_wght_inferred__1/out[8]\n : north_data_i_wght_inferred__1/in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[8]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[8]\n 4: west_data_o_wght_inferred_i_8__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_8__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_7__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_7__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[9]\n : south_data_i_wght_inferred__2/out[9]\n : south_data_i_wght_inferred__2/in0[9]\n : south_data_i_wght_inferred__1/out[9]\n : south_data_i_wght_inferred__1/in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[9]\n 2: west_data_o_wght_inferred_i_7__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_7__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[9]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[9]\n : north_data_i_wght_inferred__2/out[9]\n : north_data_i_wght_inferred__2/in0[9]\n : north_data_i_wght_inferred__1/out[9]\n : north_data_i_wght_inferred__1/in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[9]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[9]\n 4: west_data_o_wght_inferred_i_7__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_7__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_6__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_6__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[10]\n : south_data_i_wght_inferred__2/out[10]\n : south_data_i_wght_inferred__2/in0[10]\n : south_data_i_wght_inferred__1/out[10]\n : south_data_i_wght_inferred__1/in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[10]\n 2: west_data_o_wght_inferred_i_6__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_6__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[10]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[10]\n : north_data_i_wght_inferred__2/out[10]\n : north_data_i_wght_inferred__2/in0[10]\n : north_data_i_wght_inferred__1/out[10]\n : north_data_i_wght_inferred__1/in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[10]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[10]\n 4: west_data_o_wght_inferred_i_6__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_6__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_3__1/O (LUT6)\n 1: west_data_o_wght_inferred_i_3__1/I2 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[13]\n : south_data_i_wght_inferred__2/out[13]\n : south_data_i_wght_inferred__2/in0[13]\n : south_data_i_wght_inferred__1/out[13]\n : south_data_i_wght_inferred__1/in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[13]\n 2: west_data_o_wght_inferred_i_3__2/O (LUT6)\n 3: west_data_o_wght_inferred_i_3__2/I5 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[13]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[13]\n : north_data_i_wght_inferred__2/out[13]\n : north_data_i_wght_inferred__2/in0[13]\n : north_data_i_wght_inferred__1/out[13]\n : north_data_i_wght_inferred__1/in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[13]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[13]\n 4: west_data_o_wght_inferred_i_3__1/O (LUT6)\nInferred a: \"set_disable_timing -from I2 -to O west_data_o_wght_inferred_i_3__1\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_15__2/O (LUT6)\n 1: west_data_o_wght_inferred_i_15__2/I0 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[1]\n : north_data_i_wght_inferred__2/out[1]\n : north_data_i_wght_inferred__2/in0[1]\n : north_data_i_wght_inferred__1/out[1]\n : north_data_i_wght_inferred__1/in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[1]\n 2: west_data_o_wght_inferred_i_15__1/O (LUT6)\n 3: west_data_o_wght_inferred_i_15__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[1]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[1]\n : south_data_i_wght_inferred__2/out[1]\n : south_data_i_wght_inferred__2/in0[1]\n : south_data_i_wght_inferred__1/out[1]\n : south_data_i_wght_inferred__1/in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[1]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[1]\n 4: west_data_o_wght_inferred_i_15__2/O (LUT6)\nInferred a: \"set_disable_timing -from I0 -to O west_data_o_wght_inferred_i_15__2\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_13__2/O (LUT6)\n 1: west_data_o_wght_inferred_i_13__2/I0 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[3]\n : north_data_i_wght_inferred__2/out[3]\n : north_data_i_wght_inferred__2/in0[3]\n : north_data_i_wght_inferred__1/out[3]\n : north_data_i_wght_inferred__1/in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[3]\n 2: west_data_o_wght_inferred_i_13__1/O (LUT6)\n 3: west_data_o_wght_inferred_i_13__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[3]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[3]\n : south_data_i_wght_inferred__2/out[3]\n : south_data_i_wght_inferred__2/in0[3]\n : south_data_i_wght_inferred__1/out[3]\n : south_data_i_wght_inferred__1/in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[3]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[3]\n 4: west_data_o_wght_inferred_i_13__2/O (LUT6)\nInferred a: \"set_disable_timing -from I0 -to O west_data_o_wght_inferred_i_13__2\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_9__2/O (LUT6)\n 1: west_data_o_wght_inferred_i_9__2/I0 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[7]\n : north_data_i_wght_inferred__2/out[7]\n : north_data_i_wght_inferred__2/in0[7]\n : north_data_i_wght_inferred__1/out[7]\n : north_data_i_wght_inferred__1/in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[7]\n 2: west_data_o_wght_inferred_i_9__1/O (LUT6)\n 3: west_data_o_wght_inferred_i_9__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[7]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[7]\n : south_data_i_wght_inferred__2/out[7]\n : south_data_i_wght_inferred__2/in0[7]\n : south_data_i_wght_inferred__1/out[7]\n : south_data_i_wght_inferred__1/in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[7]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[7]\n 4: west_data_o_wght_inferred_i_9__2/O (LUT6)\nInferred a: \"set_disable_timing -from I0 -to O west_data_o_wght_inferred_i_9__2\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_5__2/O (LUT6)\n 1: west_data_o_wght_inferred_i_5__2/I0 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[11]\n : north_data_i_wght_inferred__2/out[11]\n : north_data_i_wght_inferred__2/in0[11]\n : north_data_i_wght_inferred__1/out[11]\n : north_data_i_wght_inferred__1/in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[11]\n 2: west_data_o_wght_inferred_i_5__1/O (LUT6)\n 3: west_data_o_wght_inferred_i_5__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[11]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[11]\n : south_data_i_wght_inferred__2/out[11]\n : south_data_i_wght_inferred__2/in0[11]\n : south_data_i_wght_inferred__1/out[11]\n : south_data_i_wght_inferred__1/in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[11]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[11]\n 4: west_data_o_wght_inferred_i_5__2/O (LUT6)\nInferred a: \"set_disable_timing -from I0 -to O west_data_o_wght_inferred_i_5__2\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_4__2/O (LUT6)\n 1: west_data_o_wght_inferred_i_4__2/I0 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[12]\n : north_data_i_wght_inferred__2/out[12]\n : north_data_i_wght_inferred__2/in0[12]\n : north_data_i_wght_inferred__1/out[12]\n : north_data_i_wght_inferred__1/in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[12]\n 2: west_data_o_wght_inferred_i_4__1/O (LUT6)\n 3: west_data_o_wght_inferred_i_4__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[12]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[12]\n : south_data_i_wght_inferred__2/out[12]\n : south_data_i_wght_inferred__2/in0[12]\n : south_data_i_wght_inferred__1/out[12]\n : south_data_i_wght_inferred__1/in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[12]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[12]\n 4: west_data_o_wght_inferred_i_4__2/O (LUT6)\nInferred a: \"set_disable_timing -from I0 -to O west_data_o_wght_inferred_i_4__2\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_2__2/O (LUT6)\n 1: west_data_o_wght_inferred_i_2__2/I0 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[14]\n : north_data_i_wght_inferred__2/out[14]\n : north_data_i_wght_inferred__2/in0[14]\n : north_data_i_wght_inferred__1/out[14]\n : north_data_i_wght_inferred__1/in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[14]\n 2: west_data_o_wght_inferred_i_2__1/O (LUT6)\n 3: west_data_o_wght_inferred_i_2__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[14]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[14]\n : south_data_i_wght_inferred__2/out[14]\n : south_data_i_wght_inferred__2/in0[14]\n : south_data_i_wght_inferred__1/out[14]\n : south_data_i_wght_inferred__1/in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[14]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[14]\n 4: west_data_o_wght_inferred_i_2__2/O (LUT6)\nInferred a: \"set_disable_timing -from I0 -to O west_data_o_wght_inferred_i_2__2\"\nFound timing loop:\n 0: west_data_o_wght_inferred_i_1__2/O (LUT6)\n 1: west_data_o_wght_inferred_i_1__2/I0 (LUT6)\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_i_wght_inferred /in0[15]\n : north_data_i_wght_inferred__2/out[15]\n : north_data_i_wght_inferred__2/in0[15]\n : north_data_i_wght_inferred__1/out[15]\n : north_data_i_wght_inferred__1/in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_o_wght_inferred /in0[15]\n 2: west_data_o_wght_inferred_i_1__1/O (LUT6)\n 3: west_data_o_wght_inferred_i_1__1/I3 (LUT6)\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /out[15]\n : \\HMNoC_cluster_east_0/south_data_i_wght_inferred /in0[15]\n : south_data_i_wght_inferred__2/out[15]\n : south_data_i_wght_inferred__2/in0[15]\n : south_data_i_wght_inferred__1/out[15]\n : south_data_i_wght_inferred__1/in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred__0 /in0[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /out[15]\n : \\HMNoC_cluster_east_1/north_data_o_wght_inferred /in0[15]\n 4: west_data_o_wght_inferred_i_1__2/O (LUT6)\nInferred a: \"set_disable_timing -from I0 -to O west_data_o_wght_inferred_i_1__2\"\n---------------------------------------------------------------------------------\nStart Rebuilding User Hierarchy\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Rebuilding User Hierarchy : Time (s): cpu = 00:00:59 ; elapsed = 00:01:08 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Renaming Generated Ports\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Renaming Generated Ports : Time (s): cpu = 00:00:59 ; elapsed = 00:01:08 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Handling Custom Attributes\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Handling Custom Attributes : Time (s): cpu = 00:00:59 ; elapsed = 00:01:08 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Renaming Generated Nets\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nFinished Renaming Generated Nets : Time (s): cpu = 00:00:59 ; elapsed = 00:01:08 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\n---------------------------------------------------------------------------------\nStart Writing Synthesis Report\n---------------------------------------------------------------------------------\n\nReport BlackBoxes: \n+-+--------------+----------+\n| |BlackBox name |Instances |\n+-+--------------+----------+\n+-+--------------+----------+\n\nReport Cell Usage: \n+------+----------------+------+\n| |Cell |Count |\n+------+----------------+------+\n|1 |BUFG | 1|\n|2 |CARRY8 | 6|\n|3 |DSP_ALU | 9|\n|4 |DSP_A_B_DATA | 9|\n|5 |DSP_C_DATA | 9|\n|6 |DSP_MULTIPLIER | 9|\n|7 |DSP_M_DATA | 9|\n|8 |DSP_OUTPUT | 9|\n|9 |DSP_PREADD | 9|\n|10 |DSP_PREADD_DATA | 9|\n|11 |LUT1 | 1042|\n|12 |LUT2 | 111|\n|13 |LUT3 | 169|\n|14 |LUT4 | 315|\n|15 |LUT5 | 280|\n|16 |LUT6 | 1055|\n|17 |MUXF7 | 84|\n|18 |RAM64M8 | 196|\n|19 |RAM64X1D | 196|\n|20 |FDRE | 746|\n|21 |FDSE | 24|\n|22 |IBUF | 108|\n|23 |OBUF | 66|\n+------+----------------+------+\n\nReport Instance Areas: \n+------+----------------------------------------+-----------------------------------------------+------+\n| |Instance |Module |Cells |\n+------+----------------------------------------+-----------------------------------------------+------+\n|1 |top | | 4471|\n|2 | HMNoC_cluster_east_0 |HMNoC_cluster_east__hierPathDup__1 | 266|\n|3 | GLB_cluster_0 |GLB_cluster | 36|\n|4 | \\glb_iact_gen[0].glb_iact_inst |glb_iact_23 | 9|\n|5 | \\glb_wght_gen[0].glb_weight_inst |glb_weight_24 | 20|\n|6 | pe_cluster_0 |PE_cluster | 0|\n|7 | router_cluster_0 |router_cluster | 50|\n|8 | HMNoC_cluster_east_1 |HMNoC_cluster_east | 240|\n|9 | GLB_cluster_0 |GLB_cluster__hierPathDup__2 | 36|\n|10 | \\glb_iact_gen[0].glb_iact_inst |glb_iact_21 | 1|\n|11 | \\glb_wght_gen[0].glb_weight_inst |glb_weight_22 | 20|\n|12 | pe_cluster_0 |PE_cluster__hierPathDup__2 | 0|\n|13 | router_cluster_0 |router_cluster__hierPathDup__2 | 51|\n|14 | router_iact |router_20 | 1|\n|15 | HMNoC_cluster_west_0 |HMNoC_cluster_west | 3164|\n|16 | GLB_cluster_0 |GLB_cluster__hierPathDup__1 | 315|\n|17 | \\glb_iact_gen[0].glb_iact_inst |glb_iact_18 | 105|\n|18 | \\glb_psum_gen[0].glb_psum_inst |glb_psum | 105|\n|19 | \\glb_wght_gen[0].glb_weight_inst |glb_weight_19 | 105|\n|20 | pe_cluster_0 |PE_cluster__hierPathDup__1 | 2677|\n|21 | \\gen_X[0].gen_Y[0].pe |PE | 320|\n|22 | mac_0 |MAC_16 | 60|\n|23 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel | 8|\n|24 | spad_pe0 |SPad_17 | 105|\n|25 | \\gen_X[0].gen_Y[1].pe |PE__parameterized0 | 280|\n|26 | mac_0 |MAC_14 | 30|\n|27 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__1 | 8|\n|28 | spad_pe0 |SPad_15 | 105|\n|29 | \\gen_X[0].gen_Y[2].pe |PE__parameterized1 | 283|\n|30 | mac_0 |MAC_12 | 29|\n|31 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__2 | 8|\n|32 | spad_pe0 |SPad_13 | 105|\n|33 | \\gen_X[1].gen_Y[0].pe |PE__parameterized2 | 305|\n|34 | mac_0 |MAC_10 | 60|\n|35 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__3 | 8|\n|36 | spad_pe0 |SPad_11 | 105|\n|37 | \\gen_X[1].gen_Y[1].pe |PE__parameterized3 | 284|\n|38 | mac_0 |MAC_8 | 30|\n|39 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__4 | 8|\n|40 | spad_pe0 |SPad_9 | 105|\n|41 | \\gen_X[1].gen_Y[2].pe |PE__parameterized4 | 284|\n|42 | mac_0 |MAC_6 | 29|\n|43 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__5 | 8|\n|44 | spad_pe0 |SPad_7 | 105|\n|45 | \\gen_X[2].gen_Y[0].pe |PE__parameterized5 | 308|\n|46 | mac_0 |MAC_4 | 60|\n|47 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__6 | 8|\n|48 | spad_pe0 |SPad_5 | 105|\n|49 | \\gen_X[2].gen_Y[1].pe |PE__parameterized6 | 284|\n|50 | mac_0 |MAC_2 | 30|\n|51 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__7 | 8|\n|52 | spad_pe0 |SPad_3 | 105|\n|53 | \\gen_X[2].gen_Y[2].pe |PE__parameterized7 | 281|\n|54 | mac_0 |MAC | 29|\n|55 | out_reg |\\gen_X[0].gen_Y[0].pe/mac_0/out_reg_funnel__8 | 8|\n|56 | spad_pe0 |SPad | 105|\n|57 | router_cluster_0 |router_cluster__hierPathDup__1 | 56|\n|58 | router_iact |router | 1|\n|59 | router_psum |router_0 | 4|\n|60 | router_wght |router_1 | 3|\n|61 | HMNoC_cluster_west_1 |HMNoC_cluster_west__hierPathDup__1 | 269|\n|62 | GLB_cluster_0 |GLB_cluster__hierPathDup__1__hierPathDup__1 | 32|\n|63 | \\glb_iact_gen[0].glb_iact_inst |glb_iact | 9|\n|64 | \\glb_wght_gen[0].glb_weight_inst |glb_weight | 9|\n|65 | pe_cluster_0 |PE_cluster__hierPathDup__3 | 0|\n|66 | router_cluster_0 |router_cluster__hierPathDup__1__hierPathDup__1 | 50|\n+------+----------------------------------------+-----------------------------------------------+------+\n---------------------------------------------------------------------------------\nFinished Writing Synthesis Report : Time (s): cpu = 00:00:59 ; elapsed = 00:01:08 . Memory (MB): peak = 2126.836 ; gain = 1865.652\n---------------------------------------------------------------------------------\nSynthesis finished with 0 errors, 431 critical warnings and 134 warnings.\nSynthesis Optimization Runtime : Time (s): cpu = 00:00:45 ; elapsed = 00:00:55 . Memory (MB): peak = 2126.836 ; gain = 754.430\nSynthesis Optimization Complete : Time (s): cpu = 00:00:59 ; elapsed = 00:01:08 . Memory (MB): peak = 2126.836 ; gain = 1865.652\nINFO: [Project 1-571] Translating synthesized netlist\nINFO: [Netlist 29-17] Analyzing 600 Unisim elements for replacement\nINFO: [Netlist 29-28] Unisim Transformation completed in 1 CPU seconds\nINFO: [Project 1-570] Preparing netlist for logic optimization\nINFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).\nNetlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.003 . Memory (MB): peak = 2133.340 ; gain = 0.000\nINFO: [Project 1-111] Unisim Transformation Summary:\n A total of 510 instances were transformed.\n BUFG => BUFGCE: 1 instances\n DSP48E2 => DSP48E2 (DSP_ALU, DSP_A_B_DATA, DSP_C_DATA, DSP_MULTIPLIER, DSP_M_DATA, DSP_OUTPUT, DSP_PREADD_DATA, DSP_PREADD): 9 instances\n IBUF => IBUF (IBUFCTRL, INBUF): 108 instances\n RAM64M8 => RAM64M8 (RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E, RAMD64E): 196 instances\n RAM64X1D => RAM64X1D (RAMD64E, RAMD64E): 196 instances\n\nINFO: [Common 17-83] Releasing license: Synthesis\n302 Infos, 266 Warnings, 195 Critical Warnings and 0 Errors encountered.\nsynth_design completed successfully\nsynth_design: Time (s): cpu = 00:01:03 ; elapsed = 00:01:14 . Memory (MB): peak = 2133.340 ; gain = 1879.988\nNetlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.002 . Memory (MB): peak = 2133.340 ; gain = 0.000\nWARNING: [Constraints 18-5210] No constraints selected for write.\nResolution: This message can indicate that there are no constraints for the design, or it can indicate that the used_in flags are set such that the constraints are ignored. This later case is used when running synth_design to not write synthesis constraints to the resulting checkpoint. Instead, project constraints are read when the synthesized design is opened.\nINFO: [Common 17-1381] The checkpoint 'D:/Fall 19/CSE 240D/Project/Vivado/src/HMNoC/HMNoC.runs/synth_1/HMNoC_top.dcp' has been generated.\nINFO: [runtcl-4] Executing : report_utilization -file HMNoC_top_utilization_synth.rpt -pb HMNoC_top_utilization_synth.pb\nINFO: [Common 17-206] Exiting Vivado at Fri Dec 13 11:08:05 2019...\n" }, { "path": "synth/HMNoC_top_utilization_synth.rpt", "content": "Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.\n-------------------------------------------------------------------------------------------------------------\n| Tool Version : Vivado v.2018.3 (win64) Build 2405991 Thu Dec 6 23:38:27 MST 2018\n| Date : Fri Dec 13 11:08:05 2019\n| Host : Karthi running 64-bit major release (build 9200)\n| Command : report_utilization -file HMNoC_top_utilization_synth.rpt -pb HMNoC_top_utilization_synth.pb\n| Design : HMNoC_top\n| Device : xczu7evffvf1517-1LV\n| Design State : Synthesized\n-------------------------------------------------------------------------------------------------------------\n\nUtilization Design Information\n\nTable of Contents\n-----------------\n1. CLB Logic\n1.1 Summary of Registers by Type\n2. BLOCKRAM\n3. ARITHMETIC\n4. I/O\n5. CLOCK\n6. ADVANCED\n7. CONFIGURATION\n8. Primitives\n9. Black Boxes\n10. Instantiated Netlists\n\n1. CLB Logic\n------------\n\n+----------------------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------------------+------+-------+-----------+-------+\n| CLB LUTs* | 4679 | 0 | 230400 | 2.03 |\n| LUT as Logic | 2719 | 0 | 230400 | 1.18 |\n| LUT as Memory | 1960 | 0 | 101760 | 1.93 |\n| LUT as Distributed RAM | 1960 | 0 | | |\n| LUT as Shift Register | 0 | 0 | | |\n| CLB Registers | 770 | 0 | 460800 | 0.17 |\n| Register as Flip Flop | 770 | 0 | 460800 | 0.17 |\n| Register as Latch | 0 | 0 | 460800 | 0.00 |\n| CARRY8 | 6 | 0 | 28800 | 0.02 |\n| F7 Muxes | 84 | 0 | 115200 | 0.07 |\n| F8 Muxes | 0 | 0 | 57600 | 0.00 |\n| F9 Muxes | 0 | 0 | 28800 | 0.00 |\n+----------------------------+------+-------+-----------+-------+\n* Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count.\n\n\n1.1 Summary of Registers by Type\n--------------------------------\n\n+-------+--------------+-------------+--------------+\n| Total | Clock Enable | Synchronous | Asynchronous |\n+-------+--------------+-------------+--------------+\n| 0 | _ | - | - |\n| 0 | _ | - | Set |\n| 0 | _ | - | Reset |\n| 0 | _ | Set | - |\n| 0 | _ | Reset | - |\n| 0 | Yes | - | - |\n| 0 | Yes | - | Set |\n| 0 | Yes | - | Reset |\n| 24 | Yes | Set | - |\n| 746 | Yes | Reset | - |\n+-------+--------------+-------------+--------------+\n\n\n2. BLOCKRAM\n-----------\n\n+----------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------+------+-------+-----------+-------+\n| Block RAM Tile | 0 | 0 | 312 | 0.00 |\n| RAMB36/FIFO* | 0 | 0 | 312 | 0.00 |\n| RAMB18 | 0 | 0 | 624 | 0.00 |\n| URAM | 0 | 0 | 96 | 0.00 |\n+----------------+------+-------+-----------+-------+\n* Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E2 or one FIFO18E2. However, if a FIFO18E2 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E2\n\n\n3. ARITHMETIC\n-------------\n\n+----------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------+------+-------+-----------+-------+\n| DSPs | 9 | 0 | 1728 | 0.52 |\n| DSP48E2 only | 9 | | | |\n+----------------+------+-------+-----------+-------+\n\n\n4. I/O\n------\n\n+------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+------------+------+-------+-----------+-------+\n| Bonded IOB | 174 | 0 | 464 | 37.50 |\n+------------+------+-------+-----------+-------+\n\n\n5. CLOCK\n--------\n\n+----------------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+----------------------+------+-------+-----------+-------+\n| GLOBAL CLOCK BUFFERs | 1 | 0 | 544 | 0.18 |\n| BUFGCE | 1 | 0 | 208 | 0.48 |\n| BUFGCE_DIV | 0 | 0 | 32 | 0.00 |\n| BUFG_GT | 0 | 0 | 144 | 0.00 |\n| BUFG_PS | 0 | 0 | 96 | 0.00 |\n| BUFGCTRL* | 0 | 0 | 64 | 0.00 |\n| PLL | 0 | 0 | 16 | 0.00 |\n| MMCM | 0 | 0 | 8 | 0.00 |\n+----------------------+------+-------+-----------+-------+\n* Note: Each used BUFGCTRL counts as two global buffer resources. This table does not include global clocking resources, only buffer cell usage. See the Clock Utilization Report (report_clock_utilization) for detailed accounting of global clocking resource availability.\n\n\n6. ADVANCED\n-----------\n\n+-----------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+-----------------+------+-------+-----------+-------+\n| GTHE4_CHANNEL | 0 | 0 | 24 | 0.00 |\n| GTHE4_COMMON | 0 | 0 | 6 | 0.00 |\n| OBUFDS_GTE4 | 0 | 0 | 12 | 0.00 |\n| OBUFDS_GTE4_ADV | 0 | 0 | 12 | 0.00 |\n| PCIE40E4 | 0 | 0 | 2 | 0.00 |\n| PS8 | 0 | 0 | 1 | 0.00 |\n| SYSMONE4 | 0 | 0 | 1 | 0.00 |\n| VCU | 0 | 0 | 1 | 0.00 |\n+-----------------+------+-------+-----------+-------+\n\n\n7. CONFIGURATION\n----------------\n\n+-------------+------+-------+-----------+-------+\n| Site Type | Used | Fixed | Available | Util% |\n+-------------+------+-------+-----------+-------+\n| BSCANE2 | 0 | 0 | 4 | 0.00 |\n| DNA_PORTE2 | 0 | 0 | 1 | 0.00 |\n| EFUSE_USR | 0 | 0 | 1 | 0.00 |\n| FRAME_ECCE4 | 0 | 0 | 1 | 0.00 |\n| ICAPE3 | 0 | 0 | 2 | 0.00 |\n| MASTER_JTAG | 0 | 0 | 1 | 0.00 |\n| STARTUPE3 | 0 | 0 | 1 | 0.00 |\n+-------------+------+-------+-----------+-------+\n\n\n8. Primitives\n-------------\n\n+----------+------+---------------------+\n| Ref Name | Used | Functional Category |\n+----------+------+---------------------+\n| RAMD64E | 1960 | CLB |\n| LUT6 | 1055 | CLB |\n| LUT1 | 1042 | CLB |\n| FDRE | 746 | Register |\n| LUT4 | 315 | CLB |\n| LUT5 | 280 | CLB |\n| LUT3 | 169 | CLB |\n| LUT2 | 111 | CLB |\n| INBUF | 108 | I/O |\n| IBUFCTRL | 108 | Others |\n| MUXF7 | 84 | CLB |\n| OBUF | 66 | I/O |\n| FDSE | 24 | Register |\n| DSP48E2 | 9 | Arithmetic |\n| CARRY8 | 6 | CLB |\n| BUFGCE | 1 | Clock |\n+----------+------+---------------------+\n\n\n9. Black Boxes\n--------------\n\n+----------+------+\n| Ref Name | Used |\n+----------+------+\n\n\n10. Instantiated Netlists\n-------------------------\n\n+----------+------+\n| Ref Name | Used |\n+----------+------+\n\n\n" }, { "path": "synth/constraints_1.xdc", "content": "create_clock -period 3.500 -name clk -waveform {0.000 1.750} -add clk\n\n\n\n\n\n" }, { "path": "testbench/GLB_cluster_tb.sv", "content": "`timescale 1ns / 1ps\n//////////////////////////////////////////////////////////////////////////////////\n// Company: \n// Engineer: \n// \n// Create Date: 12/01/2019 01:54:30 PM\n// Design Name: \n// Module Name: GLB_cluster_tb\n// Project Name: \n// Target Devices: \n// Tool Versions: \n// Description: \n// \n// Dependencies: \n// \n// Revision:\n// Revision 0.01 - File Created\n// Additional Comments:\n// \n//////////////////////////////////////////////////////////////////////////////////\n\n\nmodule GLB_cluster_tb();\n\n parameter DATA_BITWIDTH = 16;\n\tparameter ADDR_BITWIDTH = 10;\n parameter NUM_GLB_IACT = 1;\n parameter NUM_GLB_PSUM = 1;\n\tparameter NUM_GLB_WGHT = 1;\n\t\n logic clk;\n logic reset;\n\n logic read_req_iact[NUM_GLB_IACT-1:0];\n\tlogic read_req_psum[NUM_GLB_PSUM-1:0];\n\tlogic read_req_wght[NUM_GLB_WGHT-1:0];\n\t\n logic write_en_iact[NUM_GLB_IACT-1:0];\n\tlogic write_en_psum[NUM_GLB_PSUM-1:0];\n\tlogic write_en_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [ADDR_BITWIDTH-1 : 0] r_addr_iact[NUM_GLB_IACT-1:0];\n logic [ADDR_BITWIDTH-1 : 0] r_addr_psum[NUM_GLB_PSUM-1:0];\n\tlogic [ADDR_BITWIDTH-1 : 0] r_addr_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [ADDR_BITWIDTH-1 : 0] w_addr_iact[NUM_GLB_IACT-1:0];\n logic [ADDR_BITWIDTH-1 : 0] w_addr_psum[NUM_GLB_PSUM-1:0];\n\tlogic [ADDR_BITWIDTH-1 : 0] w_addr_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [DATA_BITWIDTH-1 : 0] w_data_iact[NUM_GLB_IACT-1:0];\n logic [DATA_BITWIDTH-1 : 0] w_data_psum[NUM_GLB_PSUM-1:0];\n\tlogic [DATA_BITWIDTH-1 : 0] w_data_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [DATA_BITWIDTH-1 : 0] r_data_iact[NUM_GLB_IACT-1:0];\n logic [DATA_BITWIDTH-1 : 0] r_data_psum[NUM_GLB_PSUM-1:0];\n logic [DATA_BITWIDTH-1 : 0] r_data_wght[NUM_GLB_WGHT-1:0];\n\n\tGLB_cluster \n\t\t\t#(\t.DATA_BITWIDTH(DATA_BITWIDTH),\n\t\t\t\t.ADDR_BITWIDTH(ADDR_BITWIDTH),\n\t\t\t\t.NUM_GLB_IACT(NUM_GLB_IACT),\n\t\t\t\t.NUM_GLB_PSUM(NUM_GLB_PSUM),\n\t\t\t\t.NUM_GLB_WGHT(NUM_GLB_WGHT)\n\t\t\t)\n\tGLB_cluster_0\n\t\t\t(\n\t\t\t\t.clk(clk), \n\t\t\t\t.reset(reset),\n\t\t\t\t\n\t\t\t\t.read_req_iact(read_req_iact),\n\t\t\t\t.read_req_psum(read_req_psum),\n\t\t\t\t.read_req_wght(read_req_wght),\n\t\t\t\t\n\t\t\t\t.write_en_iact(write_en_iact),\n\t\t\t\t.write_en_psum(write_en_psum),\n\t\t\t\t.write_en_wght(write_en_wght),\n\t\t\t\t\n\t\t\t\t.r_addr_iact(r_addr_iact),\n\t\t\t .r_addr_psum(r_addr_psum),\n\t\t\t\t.r_addr_wght(r_addr_wght),\n\n\t\t\t .w_addr_iact(w_addr_iact),\n\t\t\t .w_addr_psum(w_addr_psum),\n\t\t\t\t.w_addr_wght(w_addr_wght),\n\n\t\t\t .w_data_iact(w_data_iact),\n\t\t\t .w_data_psum(w_data_psum),\n\t\t\t\t.w_data_wght(w_data_wght),\n\n\t\t\t .r_data_iact(r_data_iact),\n\t\t\t .r_data_psum(r_data_psum),\n\t\t\t\t.r_data_wght(r_data_wght)\n\t\t\t);\n\t\t\t\n\t\t\t\n\talways begin\n\t\tclk = 0; #10;\n\t\tclk = 1; #10;\n\tend\n\n\t\n\tinitial begin\n\t\treset = 1; #30;\n\t\treset = 0;\n\t\n\t\twrite_en_iact[0] = 1;\n\t\twrite_en_psum[0] = 1;\n\t\twrite_en_wght[0] = 1;\n\t\t\n\t\tfor(int i=0; i<16; i++) begin\n\t\t\tw_addr_iact[0] = i;\n\t\t\tw_data_iact[0] = i*2;\n\n\t\t\tw_addr_psum[0] = i;\n\t\t\tw_data_psum[0] = i;\n\t\t\t\n\t\t\tw_addr_wght[0] = i;\n\t\t\tw_data_wght[0] = i*3;\n\t\t\t\n\t\t\t#20;\n\t\tend\n\t\t\n\t\twrite_en_iact[0] = 0;\n\t\twrite_en_psum[0] = 0;\n\t\twrite_en_wght[0] = 0;\n\t\t\n\t\tfor(int i=0; i<2; i++) begin\n\t\t\tw_addr_iact[0] = i;\n\t\t\tw_data_iact[0] = i*200;\n\n\t\t\tw_addr_psum[0] = i;\n\t\t\tw_data_psum[0] = i*200;\n\t\t\t\n\t\t\tw_addr_wght[0] = i;\n\t\t\tw_data_wght[0] = i*200;\t\t\t\n\t\t\t\n\t\t\t#20;\n\t\tend\n\t\n\t#100;\n\t\n\t\tread_req_iact[0] = 1;\n\t\tread_req_psum[0] = 1;\n\t\tread_req_wght[0] = 1;\n\t\t\n\t\tfor(int i=0; i<16; i++ ) begin\n\t\t\tr_addr_iact[0] = i;\n\n\t\t\tr_addr_psum[0] = i;\n\t\t\t\n\t\t\tr_addr_wght[0] = i;\n\t\t\t#20;\n\t\tend\n\t\n\t\tread_req_iact[0] = 0;\n\t\tread_req_psum[0] = 0;\n\t\tread_req_wght[0] = 0;\n\t\t\n\t\tfor(int i=0; i<2; i++) begin\n\t\t\tr_addr_iact[0] = i;\n\n\t\t\tr_addr_psum[0] = i;\n\t\t\t\n\t\t\tr_addr_wght[0] = i;\n\t\t\t\n\t\t\t#20;\n\t\tend\n\t\t\n\tend\n\t \nendmodule" }, { "path": "testbench/HMNoC_1_tb.sv", "content": "`timescale 1ns / 1ps\n//////////////////////////////////////////////////////////////////////////////////\n// Company: \n// Engineer: \n// \n// Create Date: 12/01/2019 04:37:46 PM\n// Design Name: \n// Module Name: HMNoC_1_tb\n// Project Name: \n// Target Devices: \n// Tool Versions: \n// Description: \n// \n// Dependencies: \n// \n// Revision:\n// Revision 0.01 - File Created\n// Additional Comments:\n// \n//////////////////////////////////////////////////////////////////////////////////\n\n\nmodule HMNoC_1_tb();\n\n\tparameter DATA_BITWIDTH = 16;\n\tparameter ADDR_BITWIDTH = 10;\n\t\n\t// GLB Cluster parameters. This TestBench uses only 1 of each\n parameter NUM_GLB_IACT = 1;\n parameter NUM_GLB_PSUM = 1;\n\tparameter NUM_GLB_WGHT = 1;\n\t\n\t\n logic clk;\n logic reset;\n\n\t//logic for GLB cluster\n logic read_req_iact[NUM_GLB_IACT-1:0];\n\tlogic read_req_psum[NUM_GLB_PSUM-1:0];\n\tlogic read_req_wght[NUM_GLB_WGHT-1:0];\n\t\n logic write_en_iact[NUM_GLB_IACT-1:0];\n\tlogic write_en_psum[NUM_GLB_PSUM-1:0];\n\tlogic write_en_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [ADDR_BITWIDTH-1 : 0] r_addr_iact[NUM_GLB_IACT-1:0];\n logic [ADDR_BITWIDTH-1 : 0] r_addr_psum[NUM_GLB_PSUM-1:0];\n\tlogic [ADDR_BITWIDTH-1 : 0] r_addr_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [ADDR_BITWIDTH-1 : 0] w_addr_iact[NUM_GLB_IACT-1:0];\n logic [ADDR_BITWIDTH-1 : 0] w_addr_psum[NUM_GLB_PSUM-1:0];\n\tlogic [ADDR_BITWIDTH-1 : 0] w_addr_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [DATA_BITWIDTH-1 : 0] w_data_iact[NUM_GLB_IACT-1:0];\n logic [DATA_BITWIDTH-1 : 0] w_data_psum[NUM_GLB_PSUM-1:0];\n\tlogic [DATA_BITWIDTH-1 : 0] w_data_wght[NUM_GLB_WGHT-1:0];\n\t\n logic [DATA_BITWIDTH-1 : 0] r_data_iact[NUM_GLB_IACT-1:0];\n logic [DATA_BITWIDTH-1 : 0] r_data_psum[NUM_GLB_PSUM-1:0];\n logic [DATA_BITWIDTH-1 : 0] r_data_wght[NUM_GLB_WGHT-1:0];\n\n\t\n\t//GLB cluster initialization\n\tGLB_cluster \n\t\t\t#(\t.DATA_BITWIDTH(DATA_BITWIDTH),\n\t\t\t\t.ADDR_BITWIDTH(ADDR_BITWIDTH),\n\t\t\t\t.NUM_GLB_IACT(NUM_GLB_IACT),\n\t\t\t\t.NUM_GLB_PSUM(NUM_GLB_PSUM),\n\t\t\t\t.NUM_GLB_WGHT(NUM_GLB_WGHT)\n\t\t\t)\n\tGLB_cluster_0\n\t\t\t(\n\t\t\t\t.clk(clk), \n\t\t\t\t.reset(reset),\n\t\t\t\t\n\t\t\t\t.read_req_iact(read_req_iact),\n\t\t\t\t.read_req_psum(read_req_psum),\n\t\t\t\t.read_req_wght(read_req_wght),\n\t\t\t\t\n\t\t\t\t.write_en_iact(write_en_iact),\n\t\t\t\t.write_en_psum(write_en_psum),\n\t\t\t\t.write_en_wght(write_en_wght),\n\t\t\t\t\n\t\t\t\t.r_addr_iact(r_addr_iact),\n\t\t\t .r_addr_psum(r_addr_psum),\n\t\t\t\t.r_addr_wght(r_addr_wght),\n\n\t\t\t .w_addr_iact(w_addr_iact),\n\t\t\t .w_addr_psum(w_addr_psum),\n\t\t\t\t.w_addr_wght(w_addr_wght),\n\n\t\t\t .w_data_iact(w_data_iact),\n\t\t\t .w_data_psum(w_data_psum),\n\t\t\t\t.w_data_wght(w_data_wght),\n\n\t\t\t .r_data_iact(r_data_iact),\n\t\t\t .r_data_psum(r_data_psum),\n\t\t\t\t.r_data_wght(r_data_wght)\n\t\t\t);\n\n\t\t\t\n\t// Router Instantiation\n\t\t\t\n\tinteger clk_prd = 10;\n\t\n\talways begin\n\t\tclk = 0; #(clk_prd/2);\n\t\tclk = 1; #(clk_prd/2);\n\t\t//0.1GHz\n\tend\n\t\n\tinteger kernel_1,act_1;\n\tinteger w_addr = 0;\n\tint args;\n\t\n\tinitial begin\n\t\treset = 1; #30;\n\t\treset = 0;\n\t\t\n\n\t\t//Write weights to weight glb\n\t\twrite_en_wght[0] = 1;\n\t\tkernel_1 = $fopen(\"kernel_3x3.txt\",\"r\");\t\t\n\t\twhile(!$feof(kernel_1))begin\n\t\t\tw_addr_wght[0] = w_addr;\n\t\t\targs = $fscanf(kernel_1,\"%d\\n\",w_data_wght[0]);\n\t\t\t$display(\"Writing value %0d to address %0d in weight glb\",w_data_wght[0],w_addr);\n\t\t\tw_addr++;\n\t\t\t#(clk_prd);\n\t\tend\n\t\twrite_en_wght[0] = 0;\n\t\t$fclose(kernel_1); \n\t\t\n\t\t\n\t\t//Write activations to weight glb\n\t\twrite_en_iact[0] = 1;\n\t\tw_addr = 0;\n\t\tact_1 = $fopen(\"act_5x5.txt\",\"r\");\n\t\twhile(!$feof(act_1))begin\n\t\t\tw_addr_iact[0] = w_addr;\n\t\t\targs = $fscanf(act_1,\"%d\\n\",w_data_iact[0]);\n\t\t\t$display(\"Writing value %0d to address %0d in iact glb\",w_data_iact[0],w_addr);\n\t\t\tw_addr++;\n\t\t\t#(clk_prd);\n\t\tend\n\t\twrite_en_iact[0] = 0;\n\t\t$fclose(act_1); \n\t\t\n\t\t\n//\t\twrite_en_wght[0] = 0;\n\t\n\tend\n\t\nendmodule\n" }, { "path": "testbench/HMNoC_cluster_west_tb.sv", "content": "`timescale 1ns / 1ps\n//////////////////////////////////////////////////////////////////////////////////\n// Company: \n// Engineer: \n// \n// Create Date: 12/10/2019 01:41:06 PM\n// Design Name: \n// Module Name: HMNoC_cluster_west_tb\n// Project Name: \n// Target Devices: \n// Tool Versions: \n// Description: \n// \n// Dependencies: \n// \n// Revision:\n// Revision 0.01 - File Created\n// Additional Comments:\n// \n//////////////////////////////////////////////////////////////////////////////////\n\n\nmodule HMNoC_cluster_west_tb();\n\n\t\tparameter DATA_BITWIDTH = 16;\n\t\tparameter ADDR_BITWIDTH = 10;\n\t\t\n\t\tparameter DATA_WIDTH = 16;\n\t\tparameter ADDR_WIDTH = 9;\n\t\t\n\t\t// GLB Cluster parameters. This TestBench uses only 1 of each\n\t\tparameter NUM_GLB_IACT = 1;\n\t\tparameter NUM_GLB_PSUM = 1;\n\t\tparameter NUM_GLB_WGHT = 1;\n\t\t\n\t\tparameter ADDR_BITWIDTH_GLB = 10;\n\t\tparameter ADDR_BITWIDTH_SPAD = 9;\n\t\t\n\t\tparameter NUM_ROUTER_PSUM = 1;\n\t\tparameter NUM_ROUTER_IACT = 1;\n\t\tparameter NUM_ROUTER_WGHT = 1;\n\t\t\t\t\n\t\tparameter int kernel_size = 3;\n\t\tparameter int act_size = 5;\n\t\t\n\t\tparameter int X_dim = 3;\n\t\tparameter int Y_dim = 3;\n\t\t\n\t\tparameter W_READ_ADDR = 0; \n\t\tparameter A_READ_ADDR = 0;\n\t\t\n\t\tparameter W_LOAD_ADDR = 0; \n\t\tparameter A_LOAD_ADDR = 0;\n\t\t\n\t\tparameter PSUM_READ_ADDR = 0;\n\t\tparameter PSUM_LOAD_ADDR = 0;\n\n\t\t\n\t\t// Logic\n\t\tlogic clk;\n\t\tlogic reset;\n\t\t\n\t\t//PE Cluster Interface\n\t\tlogic start;\n\t\tlogic load_done;\n\t\t\n\t\tlogic load_en_wght;\n\t\tlogic load_en_act;\n\t\t\n logic [DATA_WIDTH-1:0] pe_out[X_dim-1:0];\n\t\tlogic compute_done;\n\t\t\n\t\t\n\t\t\n\t\t//GLB Cluster Interface\n\n\t\tlogic write_en_iact;\n\t\tlogic write_en_wght;\n\t\t\n\t\tlogic [DATA_WIDTH-1:0] w_data_iact;\n\t\tlogic [ADDR_WIDTH-1:0] w_addr_iact;\n\t\t\n\t\tlogic [DATA_WIDTH-1:0] w_data_wght;\n\t\tlogic [ADDR_WIDTH-1:0] w_addr_wght;\n\t\t\n\t\tlogic [DATA_WIDTH-1:0] r_data_psum;\n\t\tlogic [ADDR_WIDTH-1:0] r_addr_psum;\n\t\t\n\t\tlogic [ADDR_WIDTH-1:0] w_addr_psum;\n\t\t\n\t\tlogic read_req_iact;\n\t\tlogic read_req_psum;\n\t\tlogic read_req_wght;\n\t\t\n\t\tlogic [ADDR_WIDTH-1:0] r_addr_iact;\n\t\tlogic [ADDR_WIDTH-1:0] r_addr_wght;\n\t\t\n\t\t\n\t\t\n\t\t//WGHT Router Ports\n\t\tlogic [3:0] router_mode_wght;\n\t\t\n\t\t//Interface with North\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] north_data_i_wght;\n\t\tlogic north_enable_i_wght;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] north_data_o_wght;\n\t\tlogic north_enable_o_wght;\n\t\t\n\t\t\n\t\t//Interface with South\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] south_data_i_wght;\n\t\tlogic south_enable_i_wght;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] south_data_o_wght;\n\t\tlogic south_enable_o_wght;\n\t\t\n\t\t\n\t\t//Interface with West\n\t\t//Source ports\n//\t\tlogic [DATA_WIDTH-1:0] west_data_i_wght;\n\t\tlogic west_enable_i_wght;\n\t\t\n\t\t//Destination ports\n//\t\tlogic logic [DATA_WIDTH-1:0] west_data_o_wght;\n\t\tlogic west_enable_o_wght;\n\t\t\n\t\t\n\t\t//Interface with East - Devices\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] east_data_i_wght;\n\t\tlogic east_enable_i_wght;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] east_data_o_wght;\n\t\tlogic east_enable_o_wght;\n\t\t\n\t//IACT Router Ports\n\t\tlogic [3:0] router_mode_iact;\n\t\t\n\t\t//Interface with North\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] north_data_i_iact;\n\t\tlogic north_enable_i_iact;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] north_data_o_iact;\n\t\tlogic north_enable_o_iact;\n\t\t\n\t\t\n\t\t//Interface with South\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] south_data_i_iact;\n\t\tlogic south_enable_i_iact;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] south_data_o_iact;\n\t\tlogic south_enable_o_iact;\n\t\t\n\t\t\n\t\t//Interface with West\n\t\t//Source ports\n//\t\tlogic [DATA_WIDTH-1:0] west_data_i_iact;\n\t\tlogic west_enable_i_iact;\n\t\t\n\t\t//Destination ports\n//\t\tlogic logic [DATA_WIDTH-1:0] west_data_o_iact;\n\t\tlogic west_enable_o_iact;\n\t\t\n\t\t\n\t\t//Interface with East - Devices\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] east_data_i_iact;\n\t\tlogic east_enable_i_iact;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] east_data_o_iact;\n\t\tlogic east_enable_o_iact;\n\t\t\n\t\n\t//PSUM Router Ports\n\t\tlogic [3:0] router_mode_psum;\n\t\t\n\t\t//Interface with North\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] north_data_i_psum;\n\t\tlogic north_enable_i_psum;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] north_data_o_psum;\n\t\tlogic north_enable_o_psum;\n\t\t\n\t\t\n\t\t//Interface with South\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] south_data_i_psum;\n\t\tlogic south_enable_i_psum;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] south_data_o_psum;\n\t\tlogic south_enable_o_psum;\n\t\t\n\t\t\n\t\t//Interface with West\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] west_data_i_psum;\n\t\tlogic west_enable_i_psum;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] west_data_o_psum;\n\t\tlogic west_enable_o_psum;\n\t\t\n\t\t//Interface with East - Devices\n\t\t//Source ports\n\t\tlogic [DATA_WIDTH-1:0] east_data_i_psum;\n\t\tlogic east_enable_i_psum;\n\t\t\n\t\t//Destination ports\n\t\tlogic [DATA_WIDTH-1:0] east_data_o_psum;\n\t\tlogic east_enable_o_psum;\n\t\t\n\t\t\n\t\t\n\t//Instantiation\n\tHMNoC_cluster_west \n\t\t#(\n\t\t\t.DATA_BITWIDTH(DATA_BITWIDTH),\n\t\t\t.ADDR_BITWIDTH(ADDR_BITWIDTH),\n\t\t\t\n\t\t\t.DATA_WIDTH(DATA_WIDTH),\n\t\t\t.ADDR_WIDTH(ADDR_WIDTH),\n\t\t\t\n\t\t\t.NUM_GLB_IACT(NUM_GLB_IACT),\n\t\t\t.NUM_GLB_PSUM(NUM_GLB_PSUM),\n\t\t\t.NUM_GLB_WGHT(NUM_GLB_WGHT),\n\n\t\t\t.kernel_size(kernel_size),\n\t\t\t.act_size(act_size),\n\t\t\t\n\t\t\t.X_dim(X_dim),\n\t\t\t.Y_dim(Y_dim)\n\t\t)\n\tHMNoC_cluster_west_0 \n\t\t(\n\t\t\t.clk(clk), //TestBench/Controller\n\t\t\t.reset(reset), //TestBench/Controller\n\t\t\t\n\t\t\t//Signals for reading from GLB\n\t\t\t.read_req_iact(read_req_iact),\n\t\t\t.read_req_psum(read_req_psum), //Read by testbench/controller\n\t\t\t.read_req_wght(read_req_wght),\n\t\t\t\n//\t\t\t.r_data_iact(router_cluster_0.r_data_glb_iact),\n\t\t\t.r_data_psum(r_data_psum), //Read by testbench/controller\n//\t\t\t.r_data_wght(router_cluster_0.r_data_glb_wght),\n\t\t\t\n\t\t\t.r_addr_iact(r_addr_iact),\n\t\t\t.r_addr_psum(r_addr_psum), //testbench for reading final psums\n\t\t\t.r_addr_wght(r_addr_wght),\n\n\t\t\t//Signals for writing to GLB\n\t\t\t.w_addr_iact(w_addr_iact), //testbench for writing\n\t\t\t.w_addr_psum(w_addr_psum),\n\t\t\t.w_addr_wght(w_addr_wght), //testbench for writing\n\n\t\t\t.w_data_iact(w_data_iact), //testbench for writing\n//\t\t\t.w_data_psum(router_cluster_0.w_data_glb_psum),\n\t\t\t.w_data_wght(w_data_wght), //testbench for writing\n\n\t\t\t.write_en_iact(write_en_iact), //testbench for writing\n//\t\t\t.write_en_psum(router_cluster_0.write_en_glb_psum),\n\t\t\t.write_en_wght(write_en_wght), //testbench for writing\n\t\t\t\t\n\t\t\t\t\n\t\n\t\t\t//Ports for WGHT router\n\t\t\t.router_mode_wght(router_mode_wght), //TB*\n\t\t\t\n\t\t\t//Interface with North\n\t\t\t//Source ports\n\t\t\t.north_data_i_wght(north_data_i_wght),\n\t\t\t.north_enable_i_wght(north_enable_i_wght),\n\t\t\t\n\t\t\t//Destination ports\n\t\t\t.north_data_o_wght(north_data_o_wght),\n\t\t\t.north_enable_o_wght(north_enable_o_wght),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with South\n\t\t\t//Source ports\n\t\t\t.south_data_i_wght(south_data_i_wght),\n\t\t\t.south_enable_i_wght(south_enable_i_wght),\n\t\t\t\n\t\t\t//Destination ports\n\t\t\t.south_data_o_wght(south_data_o_wght),\n\t\t\t.south_enable_o_wght(south_enable_o_wght),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with West\n\t\t\t//Source ports\n//\t\t\t.west_data_i_wght(GLB_cluster_0.r_data_wght), //GLB_cluster\n\t\t\t.west_enable_i_wght(west_enable_i_wght),\n\t\t\t\n\t\t\t//Destination ports\n//\t\t\t.west_data_o_wght(pe_cluster_0.filt_in), //PE_cluster\n\t\t\t.west_enable_o_wght(west_enable_o_wght),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with East - Devices\n\t\t\t//Source ports\n\t\t\t.east_data_i_wght(east_data_i_wght),\n\t\t\t.east_enable_i_wght(east_enable_i_wght),\n\t \n\t\t\t//Destination ports\n\t .east_data_o_wght(east_data_o_wght),\n .east_enable_o_wght(east_enable_o_wght),\n\t\t\t\n\t\t////////////////////////////////////////////\n\t\t\t\n\t\t//Ports for IACT router\n\t\t\t.router_mode_iact(router_mode_iact), //TB*\n\t\t\t\n\t\t\t//Interface with North\n\t\t\t//Source ports\n\t\t\t.north_data_i_iact(north_data_i_iact),\n\t\t\t.north_enable_i_iact(north_enable_i_iact),\n\t\t\t\n\t\t\t//Destination ports\n\t\t\t.north_data_o_iact(north_data_o_iact),\n\t\t\t.north_enable_o_iact(north_enable_o_iact),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with South\n\t\t\t//Source ports\n\t\t\t.south_data_i_iact(south_data_i_iact),\n\t\t\t.south_enable_i_iact(south_enable_i_iact),\n\t\t\t\n\t\t\t//Destination ports\n\t\t\t.south_data_o_iact(south_data_o_iact),\n\t\t\t.south_enable_o_iact(south_enable_o_iact),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with West\n\t\t\t//Source ports\n//\t\t\t.west_data_i_iact(GLB_cluster_0.r_data_iact), //GLB_cluster\n\t\t\t.west_enable_i_iact(west_enable_i_iact),\n\t\t\t\n\t\t\t//Destination ports\n//\t\t\t.west_data_o_iact(pe_cluster_0.act_in), //PE_cluster\n\t\t\t.west_enable_o_iact(west_enable_o_iact),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with East - Devices\n\t\t\t//Source ports\n\t\t\t.east_data_i_iact(east_data_i_iact),\n\t\t\t.east_enable_i_iact(east_enable_i_iact),\n\t \n\t\t\t//Destination ports\n\t .east_data_o_iact(east_data_o_iact),\n .east_enable_o_iact(east_enable_o_iact),\n\t\t\t\n\t\t\t\n\t\t////////////////////////////////////////////\n\t\t\t\n\t\t//Ports for PSUM router\n\t\t\t.router_mode_psum(router_mode_psum),\n\t\t\t\n\t\t\t//Interface with North\n\t\t\t//Source ports\n\t\t\t.north_data_i_psum(north_data_i_psum),\n\t\t\t.north_enable_i_psum(north_enable_i_psum),\n\t\t\t\n\t\t\t//Destination ports\n\t\t\t.north_data_o_psum(north_data_o_psum),\n\t\t\t.north_enable_o_psum(north_enable_o_psum),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with South\n\t\t\t//Source ports\n\t\t\t.south_data_i_psum(south_data_i_psum),\n\t\t\t.south_enable_i_psum(south_enable_i_psum),\n\t\t\t\n\t\t\t//Destination ports\n\t\t\t.south_data_o_psum(south_data_o_psum),\n\t\t\t.south_enable_o_psum(south_enable_o_psum),\n\t\t\t\n\t\t\t\n\t\t\t//Interface with West\n\t\t\t//Source ports\n\t\t\t.west_data_i_psum(west_data_i_psum), //PE_cluster\n\t\t\t.west_enable_i_psum(west_enable_i_psum),\n\t\t\t\n\t\t\t//Destination ports\n//\t\t\t.west_data_o_psum(GLB_cluster_0.w_data_psum), //GLB_cluster\n//\t\t\t.west_enable_o_psum(GLB_cluster_0.write_en_psum), //GLB_cluster\n\t\t\t\n\t\t\t\n\t\t\t//Interface with East - Devices\n\t\t\t//Source ports\n\t\t\t.east_data_i_psum(east_data_i_psum),\n\t\t\t.east_enable_i_psum(east_enable_i_psum),\n\t \n\t\t\t//Destination ports\n\t .east_data_o_psum(east_data_o_psum),\n .east_enable_o_psum(east_enable_o_psum),\n\t\t\t\n\t\t\t\n\t\t\t\n\t\t\t//PE Cluster\n\t\t\t.load_en_wght(load_en_wght),\n\t\t\t.load_en_act(load_en_act),\n\t\t\t.start(start),\n\t\t\t.pe_out(pe_out),\n\t\t\t.compute_done(compute_done),\n\t\t\t.load_done(load_done)\n\t\t);\n\t\t\n\t\n\t\t//Logic for Direction\n\tenum logic [3:0] {ALL=0, NORTH=1, SOUTH=2, WEST=3, EAST=4,\n\t\t\t\t\t\tEASTNORTH=5, EASTSOUTH=6, EASTWEST=7,\n\t\t\t\t\t\tWESTNORTH=8, WESTSOUTH=9, WESTEAST=10} direction;\n\t\t\t\t\t\t\n\tinteger clk_prd = 10;\n\t\n\talways begin\n\t\tclk = 0; #(clk_prd/2);\n\t\tclk = 1; #(clk_prd/2);\n\t\t//0.1GHz\n\tend\n\t\n\tinteger kernel_1,act_1,psum_1;\n\tinteger w_addr = 0;\n\tint args;\n\t\n\tlogic [DATA_WIDTH-1:0] cluster_out_1[0:8];\n\t\n\tinitial begin\n\t\treset = 1; #30;\n\t\treset = 0;\n\t\tstart = 0;\n\t\t\n\t\t//Write weights to weight glb\n/* \t\twrite_en_wght = 1;\n\t\tkernel_1 = $fopen(\"kernel_3x3.txt\",\"r\");\t\t\n\t\twhile(!$feof(kernel_1))begin\n\t\t\tw_addr_wght = w_addr;\n\t\t\targs = $fscanf(kernel_1,\"%d\\n\",w_data_wght);\n\t\t\t$display(\"Writing value %0d to address %0d in weight glb\",w_data_wght,w_addr);\n\t\t\tw_addr++;\n\t\t\t#(clk_prd);\n\t\tend\n\t\twrite_en_wght = 0;\n\t\t$fclose(kernel_1); \n\t\t\n\t\t\n\t\t//Write activations to weight glb\n\t\twrite_en_iact = 1;\n\t\tw_addr = 0;\n\t\tact_1 = $fopen(\"act_5x5.txt\",\"r\");\n\t\twhile(!$feof(act_1))begin\n\t\t\tw_addr_iact = w_addr;\n\t\t\targs = $fscanf(act_1,\"%d\\n\",w_data_iact);\n\t\t\t$display(\"Writing value %0d to address %0d in iact glb\",w_data_iact,w_addr);\n\t\t\tw_addr++;\n\t\t\t#(clk_prd);\n\t\tend\n\t\twrite_en_iact = 0;\n\t\t$fclose(act_1); */\n\t\t\n\t\t//Write weights to weight glb\n \t\twrite_en_wght = 1;\t\t\n\t\tfor(int i=0; i