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Repository: machyve/xhyve
Branch: master
Commit: dfbe09b9db0e
Files: 163
Total size: 1.6 MB

Directory structure:
gitextract_y7jzlog7/

├── .gitignore
├── LICENSE
├── Makefile
├── README.md
├── config.mk
├── include/
│   └── xhyve/
│       ├── acpi.h
│       ├── ahci.h
│       ├── atkbdc.h
│       ├── bhyvegc.h
│       ├── block_if.h
│       ├── bootrom.h
│       ├── console.h
│       ├── dbgport.h
│       ├── firmware/
│       │   ├── fbsd.h
│       │   └── kexec.h
│       ├── inout.h
│       ├── ioapic.h
│       ├── lock.h
│       ├── mem.h
│       ├── mevent.h
│       ├── mptbl.h
│       ├── pci_emul.h
│       ├── pci_irq.h
│       ├── pci_lpc.h
│       ├── ps2kbd.h
│       ├── ps2mouse.h
│       ├── rfb.h
│       ├── rtc.h
│       ├── smbiostbl.h
│       ├── sockstream.h
│       ├── support/
│       │   ├── acpi_hpet.h
│       │   ├── apicreg.h
│       │   ├── ata.h
│       │   ├── atomic.h
│       │   ├── bitset.h
│       │   ├── cpuset.h
│       │   ├── e1000_defines.h
│       │   ├── e1000_regs.h
│       │   ├── i8253reg.h
│       │   ├── i8259.h
│       │   ├── linker_set.h
│       │   ├── misc.h
│       │   ├── mptable.h
│       │   ├── ns16550.h
│       │   ├── pcireg.h
│       │   ├── psl.h
│       │   ├── rtc.h
│       │   ├── segments.h
│       │   ├── specialreg.h
│       │   ├── timerreg.h
│       │   ├── tree.h
│       │   └── uuid.h
│       ├── uart_emul.h
│       ├── vga.h
│       ├── virtio.h
│       ├── vmm/
│       │   ├── intel/
│       │   │   ├── vmcs.h
│       │   │   ├── vmx.h
│       │   │   ├── vmx_controls.h
│       │   │   └── vmx_msr.h
│       │   ├── io/
│       │   │   ├── vatpic.h
│       │   │   ├── vatpit.h
│       │   │   ├── vhpet.h
│       │   │   ├── vioapic.h
│       │   │   ├── vlapic.h
│       │   │   ├── vlapic_priv.h
│       │   │   ├── vpmtmr.h
│       │   │   └── vrtc.h
│       │   ├── vmm.h
│       │   ├── vmm_api.h
│       │   ├── vmm_callout.h
│       │   ├── vmm_common.h
│       │   ├── vmm_host.h
│       │   ├── vmm_instruction_emul.h
│       │   ├── vmm_ioport.h
│       │   ├── vmm_ktr.h
│       │   ├── vmm_lapic.h
│       │   ├── vmm_mem.h
│       │   ├── vmm_stat.h
│       │   ├── vmm_util.h
│       │   └── x86.h
│       ├── xhyve.h
│       └── xmsr.h
├── src/
│   ├── acpi.c
│   ├── acpitbl.c
│   ├── atkbdc.c
│   ├── bhyvegc.c
│   ├── block_if.c
│   ├── bootrom.c
│   ├── console.c
│   ├── consport.c
│   ├── dbgport.c
│   ├── dsdt.asl
│   ├── firmware/
│   │   ├── fbsd.c
│   │   └── kexec.c
│   ├── inout.c
│   ├── ioapic.c
│   ├── mem.c
│   ├── mevent.c
│   ├── mevent_test.c
│   ├── mptbl.c
│   ├── pci_ahci.c
│   ├── pci_e82545.c
│   ├── pci_emul.c
│   ├── pci_fbuf.c
│   ├── pci_hostbridge.c
│   ├── pci_irq.c
│   ├── pci_lpc.c
│   ├── pci_uart.c
│   ├── pci_virtio_block.c
│   ├── pci_virtio_net_tap.c
│   ├── pci_virtio_net_vmnet.c
│   ├── pci_virtio_rnd.c
│   ├── pm.c
│   ├── post.c
│   ├── ps2kbd.c
│   ├── ps2mouse.c
│   ├── rfb.c
│   ├── rtc.c
│   ├── smbiostbl.c
│   ├── sockstream.c
│   ├── task_switch.c
│   ├── uart_emul.c
│   ├── vga.c
│   ├── virtio.c
│   ├── vmm/
│   │   ├── intel/
│   │   │   ├── vmcs.c
│   │   │   ├── vmx.c
│   │   │   └── vmx_msr.c
│   │   ├── io/
│   │   │   ├── vatpic.c
│   │   │   ├── vatpit.c
│   │   │   ├── vhpet.c
│   │   │   ├── vioapic.c
│   │   │   ├── vlapic.c
│   │   │   ├── vpmtmr.c
│   │   │   └── vrtc.c
│   │   ├── vmm.c
│   │   ├── vmm_api.c
│   │   ├── vmm_callout.c
│   │   ├── vmm_host.c
│   │   ├── vmm_instruction_emul.c
│   │   ├── vmm_ioport.c
│   │   ├── vmm_lapic.c
│   │   ├── vmm_mem.c
│   │   ├── vmm_stat.c
│   │   ├── vmm_util.c
│   │   └── x86.c
│   ├── xhyve-Info.plist
│   ├── xhyve-entitlements.plist
│   ├── xhyve.c
│   └── xmsr.c
├── test/
│   ├── tinycore.txt
│   ├── userboot.txt
│   └── vmlinuz
├── xcconfigs/
│   ├── common.xcconfig
│   ├── common_asan.xcconfig
│   ├── common_debug.xcconfig
│   └── xhyve.xcconfig
├── xcscripts/
│   └── version.sh
├── xhyve.1
├── xhyve.xcodeproj/
│   ├── .gitignore
│   └── project.pbxproj
├── xhyverun-freebsd.sh
├── xhyverun-tinycorelinux.sh
└── xhyverun-windows.sh

================================================
FILE CONTENTS
================================================

================================================
FILE: .gitignore
================================================
build
DerivedData
.DS_Store
*~
*.rej
*.orig
cscope.*
tags
TAGS


================================================
FILE: LICENSE
================================================
Copyright (c) 2015-2018 xhyve developers
Additional copyrights are declared on individual source files

All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

1. Redistributions of source code must retain the above copyright notice, this
   list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
   this list of conditions and the following disclaimer in the documentation
   and/or other materials provided with the distribution.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

The views and conclusions contained in the software and documentation are those
of the authors and should not be interpreted as representing official policies,
either expressed or implied, of the xhyve project.


================================================
FILE: Makefile
================================================
GIT_VERSION := $(shell git describe --abbrev=6 --dirty --always --tags)

ifeq ($V, 1)
	VERBOSE =
else
	VERBOSE = @
endif

include config.mk

VMM_SRC := \
	src/vmm/x86.c \
	src/vmm/vmm.c \
	src/vmm/vmm_host.c \
	src/vmm/vmm_mem.c \
	src/vmm/vmm_lapic.c \
	src/vmm/vmm_instruction_emul.c \
	src/vmm/vmm_ioport.c \
	src/vmm/vmm_callout.c \
	src/vmm/vmm_stat.c \
	src/vmm/vmm_util.c \
	src/vmm/vmm_api.c \
	src/vmm/intel/vmx.c \
	src/vmm/intel/vmx_msr.c \
	src/vmm/intel/vmcs.c \
	src/vmm/io/vatpic.c \
	src/vmm/io/vatpit.c \
	src/vmm/io/vhpet.c \
	src/vmm/io/vioapic.c \
	src/vmm/io/vlapic.c \
	src/vmm/io/vpmtmr.c \
	src/vmm/io/vrtc.c

XHYVE_SRC := \
	src/acpitbl.c \
	src/atkbdc.c \
	src/bhyvegc.c \
	src/block_if.c \
	src/bootrom.c \
	src/console.c \
	src/consport.c \
	src/dbgport.c \
	src/inout.c \
	src/ioapic.c \
	src/mem.c \
	src/mevent.c \
	src/mptbl.c \
	src/pci_ahci.c \
	src/pci_e82545.c \
	src/pci_emul.c \
	src/pci_fbuf.c \
	src/pci_hostbridge.c \
	src/pci_irq.c \
	src/pci_lpc.c \
	src/pci_uart.c \
	src/pci_virtio_block.c \
	src/pci_virtio_net_tap.c \
	src/pci_virtio_net_vmnet.c \
	src/pci_virtio_rnd.c \
	src/pm.c \
	src/post.c \
	src/ps2kbd.c \
	src/ps2mouse.c \
	src/rtc.c \
	src/rfb.c \
	src/smbiostbl.c \
	src/sockstream.c \
	src/task_switch.c \
	src/uart_emul.c \
	src/xhyve.c \
	src/vga.c \
	src/virtio.c \
	src/xmsr.c

FIRMWARE_SRC := \
	src/firmware/kexec.c \
	src/firmware/fbsd.c

SRC := \
	$(VMM_SRC) \
	$(XHYVE_SRC) \
	$(FIRMWARE_SRC)

OBJ := $(SRC:src/%.c=build/%.o)
DEP := $(OBJ:%.o=%.d)
INC := -Iinclude

CFLAGS += -DVERSION=\"$(GIT_VERSION)\"

TARGET = build/xhyve

all: $(TARGET) | build

.PHONY: clean all
.SUFFIXES:

-include $(DEP)

build:
	@mkdir -p build

build/%.o: src/%.c
	@echo cc $<
	@mkdir -p $(dir $@)
	$(VERBOSE) $(ENV) $(CC) $(CFLAGS) $(INC) $(DEF) -MMD -MT $@ -MF build/$*.d -o $@ -c $<

$(TARGET).sym: $(OBJ)
	@echo ld $(notdir $@)
	$(VERBOSE) $(ENV) $(LD) $(LDFLAGS) -Xlinker $(TARGET).lto.o -o $@ $(OBJ)
	@echo dsym $(notdir $(TARGET).dSYM)
	$(VERBOSE) $(ENV) $(DSYM) $@ -o $(TARGET).dSYM

$(TARGET): $(TARGET).sym
	@echo strip $(notdir $@)
	$(VERBOSE) $(ENV) $(STRIP) $(TARGET).sym -o $@

clean:
	@rm -rf build


================================================
FILE: README.md
================================================
# [xhyve.xyz](http://www.xhyve.xyz)

![](./xhyve_logo.png)
<!-- https://thenounproject.com/term/squirrel/57718/ -->

About
-----

The *xhyve hypervisor* is a port of [bhyve](http://www.bhyve.org) to macOS. It is built on top of [Hypervisor.framework](https://developer.apple.com/library/mac/documentation/DriversKernelHardware/Reference/Hypervisor/index.html) in OS X 10.10 Yosemite and higher, runs entirely in userspace, and has no other dependencies. It can run FreeBSD, some Linux distributions, and Windows 10 and may gain support for other guest operating systems in the future.

License: [BSD-2-Clause](LICENSE)

Introduction: [http://www.pagetable.com/?p=831](http://www.pagetable.com/?p=831)

Requirements
------------

* OS X 10.10.3 Yosemite or later
* a 2010 or later Mac (i.e. a CPU that supports EPT: `sysctl kern.hv_support` = 1)

Installation
------------

If you have homebrew, then simply:

    $ brew update
    $ brew install --HEAD xhyve

The `--HEAD` in the brew command ensures that you always get the latest changes, even if the homebrew database is not yet updated. If for any reason you don't want that simply do `brew install xhyve` .

If you have MacPorts, then simply:

    $ sudo port selfupdate
    $ sudo port install xhyve

MacPorts is up to date with the GitHub ref listed in the port info

    $ port info xhyve
    xhyve @20170117 (emulators)
    ...

Otherwise:

Building
--------
    $ git clone https://github.com/machyve/xhyve.git
    $ cd xhyve
    $ xcodebuild

The resulting binary will be in build/Release/xhyve

Usage
-----

    $ xhyve -h

See below for steps to boot various OSs

What is *bhyve*?
--------------

*bhyve* is the FreeBSD hypervisor, roughly analogous to KVM + QEMU on Linux. It has a focus on simplicity.

It exposes the following peripherals to virtual machines:

  - Local x(2)APIC
  - IO-APIC
  - 8259A PIC
  - 8253/8254 PIT
  - HPET
  - PM Timer
  - RTC
  - PS/2 Keyboard and Mouse (via VNC)
  - PCI
    - host bridge
    - passthrough
    - UART
    - AHCI (i.e. HDD and CD)
    - VirtIO block device
    - VirtIO networking
    - VirtIO RNG
    - Intel e1000 (aka e82545)
    - VGA/Framebuffer (exposed with a minimal VNC server)
    - XHCI USB support with one device defined - a tablet for Windows guest support

*bhyve* architecture
------------------
                                                           Linux
               I/O        VM control       FreeBSD        NetBSD
                                                          OpenBSD
             |     A        |     A           |              |
             V     |        V     |           V              V
         +-------------++-------------++-------------++-------------+
         |             ||             ||             ||             |
         |    bhyve    ||  bhyvectl   ||  bhyveload  || grub2-bhyve |
         |             ||             ||             ||             |
         |             ||             ||             ||             |
         +-------------++-------------++-------------++-------------+
         +----------------------------------------------------------+
         |                        libvmmapi                         |
         +----------------------------------------------------------+
                                       A
                                       |                         user
         ------------------------------┼------------------------------
                                       | ioctl         FreeBSD kernel
                                       V
                         +----------------------------+
                         |        VMX/SVM host        |
                         |       VMX/SVM guest        |
                         |   VMX/SVM nested paging    |
                         |           Timers           |
                         |         Interrupts         |
                         +----------------------------+
                          vmm.ko


**vmm.ko**

The *bhyve* FreeBSD kernel module. Manages VM and vCPU objects, the guest physical address space and handles guest interaction with PIC, PIT, HPET, PM Timer, x(2)APIC and I/O-APIC. Contains a minimal x86 emulator to decode guest MMIO. Executes the two innermost vCPU runloops (VMX/SVM and interrupts/timers/paging). Has backends for Intel VMX and AMD SVM. Provides an ioctl and mmap API to userspace.

**libvmmapi**

Thin abstraction layer between the vmm.ko ioctl interface and the userspace C API.

**bhyve**

The userspace *bhyve* component (kind of a very light-weight QEMU) that executes virtual machines. Runs the guest I/O vCPU runloops. Manages ACPI, PCI and all non in-kernel devices. Interacts with vmm.ko through libvmmapi.

**bhyvectl**

Somewhat superfluous utility to introspect and manage the life cycle of virtual machines. Virtual machines and vCPUs can exist as kernel objects independently of a *bhyve* host process. Typically used to delete VM objects after use. Odd architectural choice.

**bhyveload**

Userspace port of the FreeBSD bootloader. This is a cumbersome workaround to bootstrap a FreeBSD guest operating system without using firmware. It creates a VM object, loads the FreeBSD kernel into guest memory, sets up the initial vCPU state and then exits. Only then a VM can be executed by *bhyve*.

**grub2-bhyve**

Performs the same function as bhyveload but is a userspace port of [GRUB2](http://github.com/grehan-freebsd/grub2-bhyve). It is used to bootstrap guest operating systems other than FreeBSD, i.e. Linux, OpenBSD and NetBSD.


*xhyve* architecture
------------------
        +----------------------------------------------------------+
        | xhyve                                                    |
        |                                                          |
        |                            I/O                           |
        |                                                          |
        |                                                          |
        |                                                          |
        |+--------------------------------------------------------+|
        ||  vmm                   VMX guest                       ||
        ||                          Timers                        ||
        ||                        Interrupts                      ||
        |+--------------------------------------------------------+|
        +----------------------------------------------------------+
        +----------------------------------------------------------+
        |                   Hypervisor.framework                   |
        +----------------------------------------------------------+
                                      A
                                      |                         user
        ------------------------------┼------------------------------
                                      |syscall            xnu kernel
                                      V
        
                                   VMX host
                               VMX nested paging


*xhyve* shares most of the code with *bhyve* but is architecturally very different. Hypervisor.framework provides an interface to the VMX VMCS guest state and a safe subset of the VMCS control fields, thus making userspace hypervisors without any additional kernel extensions possible. The VMX host state and all aspects of nested paging are handled by the macOS kernel, you can manage the guest physical address space simply through mapping of regions of your own address space.

*xhyve* is equivalent to the *bhyve* process but gains a subset of a userspace port of the vmm kernel module. SVM, PCI passthrough and the VMX host and EPT aspects are dropped. The vmm component provides a libvmmapi compatible interface to *xhyve*. Hypervisor.framework seems to enforce a strict 1:1 relationship between a host process/VM and host thread/vCPU, that means VMs and vCPUs can only be interacted with by the processes and threads that created them. Therefore, unlike *bhyve*, *xhyve* needs to adhere to a single process model. Multiple virtual machines can be created by launching multiple instances of *xhyve*. *xhyve* retains most of the *bhyve* command line interface.

*bhyvectl*, *bhyveload* and *grub2-bhyve* are incompatible with a single process model and are dropped. *xhyve* supports the Linux [kexec protocol](http://www.kernel.org/doc/Documentation/x86/boot.txt), a very simple and straightforward way to bootstrap a Linux kernel. It takes a bzImage and optionally initrd image and kernel parameter string as input.

*xhyve* can now boot an OS via EFI. The BSD-licensed TianoCore EFI built for *bhyve* can be used to boot Windows and other OSs.

Networking
----------
If you want the same IP address across VM reboots, assign a UUID to a particular VM:

    $ xhyve [-U uuid]

**Optional:**

If you need more advanced networking and already have a configured [TAP](http://tuntaposx.sourceforge.net) device you can use it with:

	virtio-tap,tapX

instead of:

    virtio-net

Where *X* is your tap device, i.e. */dev/tapX*.

Booting TinyCoreLinux
---------------------

Everything needed to boot TinyCoreLinux is included with *xhyve*.

**Steps:**

- From Terminal, launch the `xhyverun-tinycorelinux.sh` script in your xhyve directory.

Booting FreeBSD (via userboot)
------------------------------
**Requirements:**

- A FreeBSD iso image. This can be downloaded from FreeBSD.org

**Steps:**

- Build *xhyve* with `make` (type `make` in Terminal from your *xhyve* directory) - this will build an unsigned copy of *xhyve*
- `mkfile 5g FreeBSD.dmg` - Create a blank image to install to
- Use your favorite text editor to edit the xhyverun-freebsd.sh script and properly set the paths to the iso and disk image
- Run the script from Terminal with sudo: `sudo ./xhyverun-freebsd.sh` and enter your admin password

**Known Issues:**
- This will only work with an unsigned build of *xhyve* - See *Codesigning/Entitlements* in **Issues**


Booting Windows (via EFI)
-------------------------

Now that *xhyve* has support for a framebuffer, EFI and the e1000 NIC, *xhyve* can now run Windows in a VM. 

**Requirements:**

- A Windows 10 iso image. This can be downloaded from Microsoft: [Windows 10 iso](https://www.microsoft.com/en-us/software-download/windows10ISO)
- A license key for Windows.
- The *bhyve* EFI - this can be downloaded **in FreeBSD** via `pkg install bhyve-firmware` - the EFI will be named "BHYVE_UEFI.fd" and installed into `/usr/local/share/uefi-firmware`. Copy that file to macOS.
- A VNC client - these vary greatly in speed and willingness to connect to the fairly minimal VNC server built into the framebuffer code.

**Steps:**

- `mkfile 20g Windows.dmg` - Create a blank image to install to
- Use your favorite text editor to edit the `xhyverun-windows.sh` script and properly set the paths to the iso, disk image and BHYVE_UEFI.fd
- From Terminal, launch the modified `xhyverun-windows.sh` script in your xhyve directory.
- Connect the VNC client to 127.0.0.1:29000

**Known Issues:**

- Windows does not recognize more than one CPU and the CPU device is missing from Device Manager
- The e1000 emulation works, but is incomplete - network statistics don't appear in Task Manager or Resource Monitor
- Mouse positioning in VNC is wacky - this is due to the nature of how mouse deltas are passed to the VM and what Windows does to them afterwards. Once Windows is installed, one can enable remote connection and connect with Microsoft Remote Desktop instead of the VNC client.

Issues
------

### Virtual Box
If you are, or were, running any version of VirtualBox, prior to 4.3.30 or 5.0, and attempt to run *xhyve*, your system will immediately crash as a kernel panic is triggered. This is due to a VirtualBox bug (that got fixed in newest VirtualBox versions) as VirtualBox wasn't playing nice with OSX's Hypervisor.framework used by *xhyve*.

To get around this you either have to update to newest VirtualBox 4.3 or 5.0 or, if you for some reason are unable to update, to reboot your Mac after using VirtualBox and before attempting to use *xhyve*. (see issues [#5](https://github.com/mist64/xhyve/issues/5) and [#9](https://github.com/mist64/xhyve/issues/9) for the full context)

### Code signing/Entitlements
macOS limits access to the networking API (vmnet) to builds that are code signed and have the appropriate entitlement. The code signing/entitlement requirement can be bypassed by running *xhyve* as root (via `sudo`). A code signed build cannot run FreeBSD via the `userboot.so` bootloader as that requires loading and executing code that is outside the code signature (even as root). Building *xhyve* via `xcodebuild` signs the build. Building *xhyve* via `make` does not.

TODO
----

- vmm:
  - enable APIC access page to speed up APIC emulation (**performance**)
  - enable x2APIC MSRs (even faster) (**performance**)
  - vmm_callout:
      - is a quick'n'dirty implementation of the FreeBSD kernel callout mechanism
      - seems to be racy
      - fix races or perhaps replace with something better
      - use per vCPU timer event thread (**performance**)?
      - use hardware VMX preemption timer instead of `pthread_cond_wait` (**performance**)
  - some 32-bit guests are broken (support PAE paging in VMCS)
  - PCID guest support (**performance**)
- block_if:
  - macOS does not support `preadv`/`pwritev`, we need to serialize reads and writes for the time being until we find a better solution. (**performance**)
  - support block devices other than plain files
- virtio_net:
  - unify TAP and vmnet backends
  - vmnet: send/receive more than a single packet at a time (**performance**)
- virtio_rnd:
  - is untested
- e1000
  - is untested beyond basically working with Windows
  - fix missing statistics (see Booting Windows)
  - add support for TAP
  - tune performance (**performance**)
- framebuffer
  - is untested beyond basically working with Windows
  - VNC: add support for more modern connections (ssh) to improve security and compatibility with more clients
  - add an option to share the framebuffer with a client UI app (specifics need defining) (**performance**)
- UEFI
  - is untested beyond basically working with Windows
  - Needs testing against various OSs
  - figure out why Windows doesn't properly see more than one CPU (might also involve ACPI)
- XHCI
  - Move XHCI support and the tablet device to *xhyve*
- remove explicit state transitions:
  - since only the owning task/thread can modify the VM/vCPUs a lot of the synchronization might be unnecessary (**performance**)
- performance, performance and performance
- remove vestigial code, cleanup


================================================
FILE: config.mk
================================================
###############################################################################
# Config                                                                      #
#                                                                             #
# [XHYVE_CONFIG_ASSERT] VMM asserts (disable for release builds?)             #
# [XHYVE_CONFIG_TRACE]  VMM event tracer                                      #
# [XHYVE_CONFIG_STATS]  VMM event profiler                                    #
###############################################################################

DEFINES := \
  -DXHYVE_CONFIG_ASSERT

###############################################################################
# Toolchain                                                                   #
###############################################################################

CC := clang
AS := clang
LD := clang
STRIP := strip
DSYM := dsymutil

ENV := \
  LANG=en_US.US-ASCII

###############################################################################
# CFLAGS                                                                      #
###############################################################################

CFLAGS_OPT := \
  -Os \
  -flto \
  -fstrict-aliasing

CFLAGS_WARN := \
  -Weverything \
  -Werror \
  -Wno-unknown-warning-option \
  -Wno-reserved-id-macro \
  -pedantic

CFLAGS_DIAG := \
  -fmessage-length=152 \
  -fdiagnostics-show-note-include-stack \
  -fmacro-backtrace-limit=0 \
  -fcolor-diagnostics

CFLAGS_DBG := \
  -g

CFLAGS := \
  -arch x86_64 \
  -x c \
  -std=c11 \
  -fno-common \
  -fvisibility=hidden \
  $(DEFINES) \
  $(CFLAGS_OPT) \
  $(CFLAGS_WARN) \
  $(CFLAGS_DIAG) \
  $(CFLAGS_DBG)

###############################################################################
# LDFLAGS                                                                     #
###############################################################################

LDFLAGS_DBG := \
  -Xlinker -object_path_lto

LDFLAGS := \
  -arch x86_64 \
  -framework Hypervisor \
  -framework vmnet \
  -lz \
  $(LDFLAGS_DBG)


================================================
FILE: include/xhyve/acpi.h
================================================
/*-
 * Copyright (c) 2012 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <stdint.h>

/* if set, create AML instead of ASL and calling out to iasl */
#define ACPITBL_AML 1

#define SCI_INT 9

#define SMI_CMD 0xb2
#define BHYVE_ACPI_ENABLE 0xa0
#define BHYVE_ACPI_DISABLE 0xa1

#define PM1A_EVT_ADDR 0x400
#define PM1A_EVT_ADDR2 0x402
#define PM1A_CNT_ADDR 0x404

#define IO_PMTMR 0x408 /* 4-byte i/o port for the timer */

int acpi_build(int ncpu);
void dsdt_line(const char *fmt, ...);
void dsdt_fixed_ioport(uint16_t iobase, uint16_t length);
void dsdt_fixed_irq(uint8_t irq);
void dsdt_fixed_mem32(uint32_t base, uint32_t length);
void dsdt_indent(int levels);
void dsdt_unindent(int levels);
void dsdt_fixup(int bus, uint16_t iobase, uint16_t iolimit, uint32_t membase32,
	uint32_t memlimit32, uint64_t membase64, uint64_t memlimit64);
void sci_init(void);


================================================
FILE: include/xhyve/ahci.h
================================================
/*-
 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
 * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer,
 *    without modification, immediately at the beginning of the file.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

/* ATA register defines */
#define ATA_DATA                        0       /* (RW) data */

#define ATA_FEATURE                     1       /* (W) feature */
#define         ATA_F_DMA               0x01    /* enable DMA */
#define         ATA_F_OVL               0x02    /* enable overlap */

#define ATA_COUNT                       2       /* (W) sector count */

#define ATA_SECTOR                      3       /* (RW) sector # */
#define ATA_CYL_LSB                     4       /* (RW) cylinder# LSB */
#define ATA_CYL_MSB                     5       /* (RW) cylinder# MSB */
#define ATA_DRIVE                       6       /* (W) Sector/Drive/Head */
#define         ATA_D_LBA               0x40    /* use LBA addressing */
#define         ATA_D_IBM               0xa0    /* 512 byte sectors, ECC */

#define ATA_COMMAND                     7       /* (W) command */

#define ATA_ERROR                       8       /* (R) error */
#define         ATA_E_ILI               0x01    /* illegal length */
#define         ATA_E_NM                0x02    /* no media */
#define         ATA_E_ABORT             0x04    /* command aborted */
#define         ATA_E_MCR               0x08    /* media change request */
#define         ATA_E_IDNF              0x10    /* ID not found */
#define         ATA_E_MC                0x20    /* media changed */
#define         ATA_E_UNC               0x40    /* uncorrectable data */
#define         ATA_E_ICRC              0x80    /* UDMA crc error */
#define		ATA_E_ATAPI_SENSE_MASK	0xf0	/* ATAPI sense key mask */

#define ATA_IREASON                     9       /* (R) interrupt reason */
#define         ATA_I_CMD               0x01    /* cmd (1) | data (0) */
#define         ATA_I_IN                0x02    /* read (1) | write (0) */
#define         ATA_I_RELEASE           0x04    /* released bus (1) */
#define         ATA_I_TAGMASK           0xf8    /* tag mask */

#define ATA_STATUS                      10      /* (R) status */
#define ATA_ALTSTAT                     11      /* (R) alternate status */
#define         ATA_S_ERROR             0x01    /* error */
#define         ATA_S_INDEX             0x02    /* index */
#define         ATA_S_CORR              0x04    /* data corrected */
#define         ATA_S_DRQ               0x08    /* data request */
#define         ATA_S_DSC               0x10    /* drive seek completed */
#define         ATA_S_SERVICE           0x10    /* drive needs service */
#define         ATA_S_DWF               0x20    /* drive write fault */
#define         ATA_S_DMA               0x20    /* DMA ready */
#define         ATA_S_READY             0x40    /* drive ready */
#define         ATA_S_BUSY              0x80    /* busy */

#define ATA_CONTROL                     12      /* (W) control */
#define         ATA_A_IDS               0x02    /* disable interrupts */
#define         ATA_A_RESET             0x04    /* RESET controller */
#define         ATA_A_4BIT              0x08    /* 4 head bits */
#define         ATA_A_HOB               0x80    /* High Order Byte enable */

/* SATA register defines */
#define ATA_SSTATUS                     13
#define         ATA_SS_DET_MASK         0x0000000f
#define         ATA_SS_DET_NO_DEVICE    0x00000000
#define         ATA_SS_DET_DEV_PRESENT  0x00000001
#define         ATA_SS_DET_PHY_ONLINE   0x00000003
#define         ATA_SS_DET_PHY_OFFLINE  0x00000004

#define         ATA_SS_SPD_MASK         0x000000f0
#define         ATA_SS_SPD_NO_SPEED     0x00000000
#define         ATA_SS_SPD_GEN1         0x00000010
#define         ATA_SS_SPD_GEN2         0x00000020
#define         ATA_SS_SPD_GEN3         0x00000030

#define         ATA_SS_IPM_MASK         0x00000f00
#define         ATA_SS_IPM_NO_DEVICE    0x00000000
#define         ATA_SS_IPM_ACTIVE       0x00000100
#define         ATA_SS_IPM_PARTIAL      0x00000200
#define         ATA_SS_IPM_SLUMBER      0x00000600
#define         ATA_SS_IPM_DEVSLEEP     0x00000800

#define ATA_SERROR                      14
#define         ATA_SE_DATA_CORRECTED   0x00000001
#define         ATA_SE_COMM_CORRECTED   0x00000002
#define         ATA_SE_DATA_ERR         0x00000100
#define         ATA_SE_COMM_ERR         0x00000200
#define         ATA_SE_PROT_ERR         0x00000400
#define         ATA_SE_HOST_ERR         0x00000800
#define         ATA_SE_PHY_CHANGED      0x00010000
#define         ATA_SE_PHY_IERROR       0x00020000
#define         ATA_SE_COMM_WAKE        0x00040000
#define         ATA_SE_DECODE_ERR       0x00080000
#define         ATA_SE_PARITY_ERR       0x00100000
#define         ATA_SE_CRC_ERR          0x00200000
#define         ATA_SE_HANDSHAKE_ERR    0x00400000
#define         ATA_SE_LINKSEQ_ERR      0x00800000
#define         ATA_SE_TRANSPORT_ERR    0x01000000
#define         ATA_SE_UNKNOWN_FIS      0x02000000
#define         ATA_SE_EXCHANGED        0x04000000

#define ATA_SCONTROL                    15
#define         ATA_SC_DET_MASK         0x0000000f
#define         ATA_SC_DET_IDLE         0x00000000
#define         ATA_SC_DET_RESET        0x00000001
#define         ATA_SC_DET_DISABLE      0x00000004

#define         ATA_SC_SPD_MASK         0x000000f0
#define         ATA_SC_SPD_NO_SPEED     0x00000000
#define         ATA_SC_SPD_SPEED_GEN1   0x00000010
#define         ATA_SC_SPD_SPEED_GEN2   0x00000020
#define         ATA_SC_SPD_SPEED_GEN3   0x00000030

#define         ATA_SC_IPM_MASK         0x00000f00
#define         ATA_SC_IPM_NONE         0x00000000
#define         ATA_SC_IPM_DIS_PARTIAL  0x00000100
#define         ATA_SC_IPM_DIS_SLUMBER  0x00000200
#define         ATA_SC_IPM_DIS_DEVSLEEP 0x00000400

#define ATA_SACTIVE                     16

#define AHCI_MAX_PORTS			32
#define AHCI_MAX_SLOTS			32
#define AHCI_MAX_IRQS			16

/* SATA AHCI v1.0 register defines */
#define AHCI_CAP                    0x00
#define		AHCI_CAP_NPMASK	0x0000001f
#define		AHCI_CAP_SXS	0x00000020
#define		AHCI_CAP_EMS	0x00000040
#define		AHCI_CAP_CCCS	0x00000080
#define		AHCI_CAP_NCS	0x00001F00
#define		AHCI_CAP_NCS_SHIFT	8
#define		AHCI_CAP_PSC	0x00002000
#define		AHCI_CAP_SSC	0x00004000
#define		AHCI_CAP_PMD	0x00008000
#define		AHCI_CAP_FBSS	0x00010000
#define		AHCI_CAP_SPM	0x00020000
#define		AHCI_CAP_SAM	0x00080000
#define		AHCI_CAP_ISS	0x00F00000
#define		AHCI_CAP_ISS_SHIFT	20
#define		AHCI_CAP_SCLO	0x01000000
#define		AHCI_CAP_SAL	0x02000000
#define		AHCI_CAP_SALP	0x04000000
#define		AHCI_CAP_SSS	0x08000000
#define		AHCI_CAP_SMPS	0x10000000
#define		AHCI_CAP_SSNTF	0x20000000
#define		AHCI_CAP_SNCQ	0x40000000
#define		AHCI_CAP_64BIT	0x80000000

#define AHCI_GHC                    0x04
#define         AHCI_GHC_AE         0x80000000
#define         AHCI_GHC_MRSM       0x00000004
#define         AHCI_GHC_IE         0x00000002
#define         AHCI_GHC_HR         0x00000001

#define AHCI_IS                     0x08
#define AHCI_PI                     0x0c
#define AHCI_VS                     0x10

#define AHCI_CCCC                   0x14
#define		AHCI_CCCC_TV_MASK	0xffff0000
#define		AHCI_CCCC_TV_SHIFT	16
#define		AHCI_CCCC_CC_MASK	0x0000ff00
#define		AHCI_CCCC_CC_SHIFT	8
#define		AHCI_CCCC_INT_MASK	0x000000f8
#define		AHCI_CCCC_INT_SHIFT	3
#define		AHCI_CCCC_EN		0x00000001
#define AHCI_CCCP                   0x18

#define AHCI_EM_LOC                 0x1C
#define AHCI_EM_CTL                 0x20
#define 	AHCI_EM_MR              0x00000001
#define 	AHCI_EM_TM              0x00000100
#define 	AHCI_EM_RST             0x00000200
#define 	AHCI_EM_LED             0x00010000
#define 	AHCI_EM_SAFTE           0x00020000
#define 	AHCI_EM_SES2            0x00040000
#define 	AHCI_EM_SGPIO           0x00080000
#define 	AHCI_EM_SMB             0x01000000
#define 	AHCI_EM_XMT             0x02000000
#define 	AHCI_EM_ALHD            0x04000000
#define 	AHCI_EM_PM              0x08000000

#define AHCI_CAP2                   0x24
#define		AHCI_CAP2_BOH	0x00000001
#define		AHCI_CAP2_NVMP	0x00000002
#define		AHCI_CAP2_APST	0x00000004
#define		AHCI_CAP2_SDS	0x00000008
#define		AHCI_CAP2_SADM	0x00000010
#define		AHCI_CAP2_DESO	0x00000020

#define AHCI_OFFSET                 0x100
#define AHCI_STEP                   0x80

#define AHCI_P_CLB                  0x00
#define AHCI_P_CLBU                 0x04
#define AHCI_P_FB                   0x08
#define AHCI_P_FBU                  0x0c
#define AHCI_P_IS                   0x10
#define AHCI_P_IE                   0x14
#define         AHCI_P_IX_DHR       0x00000001
#define         AHCI_P_IX_PS        0x00000002
#define         AHCI_P_IX_DS        0x00000004
#define         AHCI_P_IX_SDB       0x00000008
#define         AHCI_P_IX_UF        0x00000010
#define         AHCI_P_IX_DP        0x00000020
#define         AHCI_P_IX_PC        0x00000040
#define         AHCI_P_IX_MP        0x00000080

#define         AHCI_P_IX_PRC       0x00400000
#define         AHCI_P_IX_IPM       0x00800000
#define         AHCI_P_IX_OF        0x01000000
#define         AHCI_P_IX_INF       0x04000000
#define         AHCI_P_IX_IF        0x08000000
#define         AHCI_P_IX_HBD       0x10000000
#define         AHCI_P_IX_HBF       0x20000000
#define         AHCI_P_IX_TFE       0x40000000
#define         AHCI_P_IX_CPD       0x80000000

#define AHCI_P_CMD                  0x18
#define         AHCI_P_CMD_ST       0x00000001
#define         AHCI_P_CMD_SUD      0x00000002
#define         AHCI_P_CMD_POD      0x00000004
#define         AHCI_P_CMD_CLO      0x00000008
#define         AHCI_P_CMD_FRE      0x00000010
#define         AHCI_P_CMD_CCS_MASK 0x00001f00
#define         AHCI_P_CMD_CCS_SHIFT 8
#define         AHCI_P_CMD_ISS      0x00002000
#define         AHCI_P_CMD_FR       0x00004000
#define         AHCI_P_CMD_CR       0x00008000
#define         AHCI_P_CMD_CPS      0x00010000
#define         AHCI_P_CMD_PMA      0x00020000
#define         AHCI_P_CMD_HPCP     0x00040000
#define         AHCI_P_CMD_MPSP     0x00080000
#define         AHCI_P_CMD_CPD      0x00100000
#define         AHCI_P_CMD_ESP      0x00200000
#define         AHCI_P_CMD_FBSCP    0x00400000
#define         AHCI_P_CMD_APSTE    0x00800000
#define         AHCI_P_CMD_ATAPI    0x01000000
#define         AHCI_P_CMD_DLAE     0x02000000
#define         AHCI_P_CMD_ALPE     0x04000000
#define         AHCI_P_CMD_ASP      0x08000000
#define         AHCI_P_CMD_ICC_MASK 0xf0000000
#define         AHCI_P_CMD_NOOP     0x00000000
#define         AHCI_P_CMD_ACTIVE   0x10000000
#define         AHCI_P_CMD_PARTIAL  0x20000000
#define         AHCI_P_CMD_SLUMBER  0x60000000
#define         AHCI_P_CMD_DEVSLEEP 0x80000000

#define AHCI_P_TFD                  0x20
#define AHCI_P_SIG                  0x24
#define AHCI_P_SSTS                 0x28
#define AHCI_P_SCTL                 0x2c
#define AHCI_P_SERR                 0x30
#define AHCI_P_SACT                 0x34
#define AHCI_P_CI                   0x38
#define AHCI_P_SNTF                 0x3C
#define AHCI_P_FBS                  0x40
#define 	AHCI_P_FBS_EN       0x00000001
#define 	AHCI_P_FBS_DEC      0x00000002
#define 	AHCI_P_FBS_SDE      0x00000004
#define 	AHCI_P_FBS_DEV      0x00000f00
#define 	AHCI_P_FBS_DEV_SHIFT 8
#define 	AHCI_P_FBS_ADO      0x0000f000
#define 	AHCI_P_FBS_ADO_SHIFT 12
#define 	AHCI_P_FBS_DWE      0x000f0000
#define 	AHCI_P_FBS_DWE_SHIFT 16
#define AHCI_P_DEVSLP               0x44
#define 	AHCI_P_DEVSLP_ADSE  0x00000001
#define 	AHCI_P_DEVSLP_DSP   0x00000002
#define 	AHCI_P_DEVSLP_DETO  0x000003fc
#define 	AHCI_P_DEVSLP_DETO_SHIFT 2
#define 	AHCI_P_DEVSLP_MDAT  0x00007c00
#define 	AHCI_P_DEVSLP_MDAT_SHIFT 10
#define 	AHCI_P_DEVSLP_DITO  0x01ff8000
#define 	AHCI_P_DEVSLP_DITO_SHIFT 15
#define 	AHCI_P_DEVSLP_DM    0x0e000000
#define 	AHCI_P_DEVSLP_DM_SHIFT 25

/* Just to be sure, if building as module. */
#if MAXPHYS < 512 * 1024
#undef MAXPHYS
#define MAXPHYS 512 * 1024
#endif
/* Pessimistic prognosis on number of required S/G entries */
#define AHCI_SG_ENTRIES (roundup(btoc(MAXPHYS) + 1, 8))
/* Command list. 32 commands. First, 1Kbyte aligned. */
#define AHCI_CL_OFFSET 0
#define AHCI_CL_SIZE 32
/* Command tables. Up to 32 commands, Each, 128byte aligned. */
#define AHCI_CT_OFFSET (AHCI_CL_OFFSET + AHCI_CL_SIZE * AHCI_MAX_SLOTS)
#define AHCI_CT_SIZE (128 + AHCI_SG_ENTRIES * 16)
/* Total main work area. */
#define AHCI_WORK_SIZE (AHCI_CT_OFFSET + AHCI_CT_SIZE * ch->numslots)


================================================
FILE: include/xhyve/atkbdc.h
================================================
/*-
 * Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _ATKBDC_H_
#define _ATKBDC_H_

struct atkbdc_softc;
struct vmctx;

void atkbdc_init(void);
void atkbdc_event(struct atkbdc_softc *sc, int iskbd);

#endif /* _ATKBDC_H_ */


================================================
FILE: include/xhyve/bhyvegc.h
================================================
/*-
 * Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _BHYVEGC_H_
#define	_BHYVEGC_H_

struct bhyvegc;

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"

struct bhyvegc_image {
	int		vgamode;
	uint16_t    width;
	uint16_t	height;
	uint32_t	*data;
};

#pragma clang diagnostic pop

struct bhyvegc *bhyvegc_init(uint16_t width, uint16_t height, void *fbaddr);
void bhyvegc_set_fbaddr(struct bhyvegc *gc, void *fbaddr);
void bhyvegc_resize(struct bhyvegc *gc, uint16_t width, uint16_t height);
struct bhyvegc_image *bhyvegc_get_image(struct bhyvegc *gc);

#endif /* _BHYVEGC_H_ */


================================================
FILE: include/xhyve/block_if.h
================================================
/*-
 * Copyright (c) 2013  Peter Grehan <grehan@freebsd.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

/*
 * The block API to be used by bhyve block-device emulations. The routines
 * are thread safe, with no assumptions about the context of the completion
 * callback - it may occur in the caller's context, or asynchronously in
 * another thread.
 */

#pragma once

#include <sys/uio.h>
#include <sys/unistd.h>

#define BLOCKIF_IOV_MAX 33 /* not practical to be IOV_MAX */

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"
struct blockif_req {
	struct iovec br_iov[BLOCKIF_IOV_MAX];
	int br_iovcnt;
	off_t br_offset;
	ssize_t br_resid;
	void (*br_callback)(struct blockif_req *req, int err);
	void *br_param;
};
#pragma clang diagnostic pop

struct blockif_ctxt;
struct blockif_ctxt *blockif_open(const char *optstr, const char *ident);
off_t blockif_size(struct blockif_ctxt *bc);
void blockif_chs(struct blockif_ctxt *bc, uint16_t *c, uint8_t *h, uint8_t *s);
int blockif_sectsz(struct blockif_ctxt *bc);
void blockif_psectsz(struct blockif_ctxt *bc, int *size, int *off);
int blockif_queuesz(struct blockif_ctxt *bc);
int blockif_is_ro(struct blockif_ctxt *bc);
int blockif_candelete(struct blockif_ctxt *bc);
int blockif_read(struct blockif_ctxt *bc, struct blockif_req *breq);
int blockif_write(struct blockif_ctxt *bc, struct blockif_req *breq);
int blockif_flush(struct blockif_ctxt *bc, struct blockif_req *breq);
int blockif_delete(struct blockif_ctxt *bc, struct blockif_req *breq);
int blockif_cancel(struct blockif_ctxt *bc, struct blockif_req *breq);
int blockif_close(struct blockif_ctxt *bc);


================================================
FILE: include/xhyve/bootrom.h
================================================
/*-
 * Copyright (c) 2015 Neel Natu <neel@freebsd.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef	_BOOTROM_H_
#define	_BOOTROM_H_

int	bootrom_init(const char *romfile);

#endif


================================================
FILE: include/xhyve/console.h
================================================
/*-
 * Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _CONSOLE_H_
#define	_CONSOLE_H_

struct bhyvegc;

typedef void (*fb_render_func_t)(struct bhyvegc *gc, void *arg);
typedef void (*kbd_event_func_t)(int down, uint32_t keysym, void *arg);
typedef void (*ptr_event_func_t)(uint8_t mask, int x, int y, void *arg);

void	console_init(uint16_t w, uint16_t h, void *fbaddr);

void	console_set_fbaddr(void *fbaddr);

struct bhyvegc_image *console_get_image(void);

void	console_fb_register(fb_render_func_t render_cb, void *arg);
void	console_refresh(void);

void	console_kbd_register(kbd_event_func_t event_cb, void *arg, int pri);
void	console_key_event(int down, uint32_t keysym);

void	console_ptr_register(ptr_event_func_t event_cb, void *arg, int pri);
void	console_ptr_event(uint8_t button, int x, int y);

#endif /* _CONSOLE_H_ */


================================================
FILE: include/xhyve/dbgport.h
================================================
/*-
 * Copyright (c) 2011 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

void init_dbgport(int port);


================================================
FILE: include/xhyve/firmware/fbsd.h
================================================
#pragma once

#include <stdint.h>

/*
 * USERBOOT interface versions
 */
#define USERBOOT_VERSION_1 1
#define USERBOOT_VERSION_2 2
#define USERBOOT_VERSION_3 3

/*
 * Exit codes from the loader
 */
#define USERBOOT_EXIT_QUIT 1
#define USERBOOT_EXIT_REBOOT 2

struct loader_callbacks {
	/* Console i/o */

	/* Wait until a key is pressed on the console and then return it */
	int (*getc)(void *arg);
	/* Write the character ch to the console */
	void (*putc)(void *arg, int ch);
	/* Return non-zero if a key can be read from the console */
	int (*poll)(void *arg);

	/* Host filesystem i/o */

	/* Open a file in the host filesystem */
	int (*open)(void *arg, const char *filename, void **h_return);
	/* Close a file */
	int	(*close)(void *arg, void *h);
	/* Return non-zero if the file is a directory */
	int (*isdir)(void *arg, void *h);
	/* Read size bytes from a file. The number of bytes remaining in dst after
	 * reading is returned in *resid_return
	 */
	int (*read)(void *arg, void *h, void *dst, size_t size,
		size_t *resid_return);
	/* Read an entry from a directory. The entry's inode number is returned in
	 * fileno_return, its type in *type_return and the name length in
	 * *namelen_return. The name itself is copied to the buffer name which must
	 * be at least PATH_MAX in size.
	 */
	int (*readdir)(void *arg, void *h, uint32_t *fileno_return,
		uint8_t *type_return, size_t *namelen_return, char *name);
	/* Seek to a location within an open file */
	int (*seek)(void *arg, void *h, uint64_t offset, int whence);
	/* Return some stat(2) related information about the file */
	int (*stat)(void *arg, void *h, int *mode_return, int *uid_return,
		int *gid_return, uint64_t *size_return);

	/* Disk image i/o */

	/* Read from a disk image at the given offset */
	int	(*diskread)(void *arg, int unit, uint64_t offset, void *dst,
		size_t size, size_t *resid_return);

	/* Guest virtual machine i/o */

	/* Copy to the guest address space */
	int (*copyin)(void *arg, const void *from, uint64_t to, size_t size);
	/* Copy from the guest address space */
	int (*copyout)(void *arg, uint64_t from, void *to, size_t size);
	/* Set a guest register value */
	void (*setreg)(void *arg, int, uint64_t);
	/* Set a guest MSR value */
	void (*setmsr)(void *arg, u_int, uint64_t);
	/* Set a guest CR value */
	void (*setcr)(void *arg, int, uint64_t);
	/* Set the guest GDT address */
	void (*setgdt)(void *arg, uint64_t, size_t);
	/* Transfer control to the guest at the given address */
	void (*exec)(void *arg, uint64_t pc);

	/* Misc */

	/* Sleep for usec microseconds */
	void (*delay)(void *arg, int usec);
	/* Exit with the given exit code */
	void (*exit)(void);
	/* Return guest physical memory map details */
	void (*getmem)(void *arg, uint64_t *lowmem, uint64_t *highmem);
	/* ioctl interface to the disk device */
	int (*diskioctl)(void *arg, int unit, u_long cmd, void *data);
	/*
	 * Returns an environment variable in the form "name=value".
	 *
	 * If there are no more variables that need to be set in the
	 * loader environment then return NULL.
	 *
	 * 'num' is used as a handle for the callback to identify which
	 * environment variable to return next. It will begin at 0 and
	 * each invocation will add 1 to the previous value of 'num'.
	 */
	const char * (*getenv)(void *arg, int num);
};

void fbsd_init(char *userboot_path, char *bootvolume_path, char *kernelenv,
	char *cons);
uint64_t fbsd_load(void);


================================================
FILE: include/xhyve/firmware/kexec.h
================================================
#pragma once

#include <stdint.h>

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
struct setup_header {
	uint8_t setup_sects; /* The size of the setup in sectors */
	uint16_t root_flags; /* If set, the root is mounted readonly */
	uint32_t syssize; /* The size of the 32-bit code in 16-byte paras */
	uint16_t ram_size; /* DO NOT USE - for bootsect.S use only */
	uint16_t vid_mode; /* Video mode control */
	uint16_t root_dev; /* Default root device number */
	uint16_t boot_flag; /* 0xAA55 magic number */
	uint16_t jump; /* Jump instruction */
	uint32_t header; /* Magic signature "HdrS" */
	uint16_t version; /* Boot protocol version supported */
	uint32_t realmode_swtch; /* Boot loader hook (see below) */
	uint16_t start_sys_seg; /* The load-low segment (0x1000) (obsolete) */
	uint16_t kernel_version; /* Pointer to kernel version string */
	uint8_t type_of_loader; /* Boot loader identifier */
	uint8_t loadflags; /* Boot protocol option flags */
	uint16_t setup_move_size; /* Move to high memory size (used with hooks) */
	uint32_t code32_start; /* Boot loader hook (see below) */
	uint32_t ramdisk_image; /* initrd load address (set by boot loader) */
	uint32_t ramdisk_size; /* initrd size (set by boot loader) */
	uint32_t bootsect_kludge; /* DO NOT USE - for bootsect.S use only */
	uint16_t heap_end_ptr; /* Free memory after setup end */
	uint8_t ext_loader_ver; /* Extended boot loader version */
	uint8_t ext_loader_type; /* Extended boot loader ID */
	uint32_t cmd_line_ptr; /* 32-bit pointer to the kernel command line */
	uint32_t initrd_addr_max; /* Highest legal initrd address */
	uint32_t kernel_alignment; /* Physical addr alignment required for kernel */
	uint8_t relocatable_kernel; /* Whether kernel is relocatable or not */
	uint8_t min_alignment; /* Minimum alignment, as a power of two */
	uint16_t xloadflags; /* Boot protocol option flags */
	uint32_t cmdline_size; /* Maximum size of the kernel command line */
	uint32_t hardware_subarch; /* Hardware subarchitecture */
	uint64_t hardware_subarch_data; /* Subarchitecture-specific data */
	uint32_t payload_offset; /* Offset of kernel payload */
	uint32_t payload_length; /* Length of kernel payload */
	uint64_t setup_data; /* 64bit pointer to linked list of struct setup_data */
	uint64_t pref_address; /* Preferred loading address */
	uint32_t init_size; /* Linear memory required during initialization */
	uint32_t handover_offset; /* Offset of handover entry point */
} __attribute__((packed));

struct zero_page {
	uint8_t screen_info[64];
	uint8_t apm_bios_info[20];
	uint8_t _0[4];
	uint64_t tboot_addr;
	uint8_t ist_info[16];
	uint8_t _1[16];
	uint8_t hd0_info[16];
	uint8_t hd1_info[16];
	uint8_t sys_desc_table[16];
	uint8_t olpc_ofw_header[16];
	uint32_t ext_ramdisk_image;
	uint32_t ext_ramdisk_size;
	uint32_t ext_cmd_line_ptr;
	uint8_t _2[116];
	uint8_t edid_info[128];
	uint8_t efi_info[32];
	uint32_t alt_mem_k;
	uint32_t scratch;
	uint8_t e820_entries;
	uint8_t eddbuf_entries;
	uint8_t edd_mbr_sig_buf_entries;
	uint8_t kbd_status;
	uint8_t _3[3];
	uint8_t sentinel;
	uint8_t _4[1];
	struct setup_header setup_header;
	uint8_t _5[(0x290 - 0x1f1 - sizeof(struct setup_header))];
	uint32_t edd_mbr_sig_buffer[16];
	struct {
		uint64_t addr;
		uint64_t size;
		uint32_t type;
	} __attribute__((packed)) e820_map[128];
	uint8_t _6[48];
	uint8_t eddbuf[492];
	uint8_t _7[276];
} __attribute__((packed));
#pragma clang diagnostic pop

void kexec_init(char *kernel_path, char *initrd_path, char *cmdline);
uint64_t kexec(void);


================================================
FILE: include/xhyve/inout.h
================================================
/*-
 * Copyright (c) 2011 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <stdint.h>
#include <xhyve/support/linker_set.h>

struct vm_exit;

/*
 * inout emulation handlers return 0 on success and -1 on failure.
 */
typedef int (*inout_func_t)(int vcpu, int in, int port,
	int bytes, uint32_t *eax, void *arg);

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"
struct inout_port {
	const char *name;
	int port;
	int size;
	int flags;
	inout_func_t handler;
	void *arg;
};
#pragma clang diagnostic pop

#define IOPORT_F_IN 0x1
#define IOPORT_F_OUT 0x2
#define IOPORT_F_INOUT (IOPORT_F_IN | IOPORT_F_OUT)

/*
 * The following flags are used internally and must not be used by
 * device models.
 */
#define IOPORT_F_DEFAULT 0x80000000 /* claimed by default handler */

#define	INOUT_PORT(name, port, flags, handler) \
	static struct inout_port __CONCAT(__inout_port, port) = { \
		#name, \
		(port), \
		1, \
		(flags), \
		(handler), \
		0 \
	}; \
	DATA_SET(inout_port_set, __CONCAT(__inout_port, port))

void init_inout(void);
int emulate_inout(int vcpu, struct vm_exit *vmexit, int strict);
int register_inout(struct inout_port *iop);
int unregister_inout(struct inout_port *iop);
void init_bvmcons(void);


================================================
FILE: include/xhyve/ioapic.h
================================================
/*-
 * Copyright (c) 2014 Hudson River Trading LLC
 * Written by: John H. Baldwin <jhb@FreeBSD.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

struct pci_devinst;

/*
 * Allocate a PCI IRQ from the I/O APIC.
 */
void ioapic_init(void);
int ioapic_pci_alloc_irq(struct pci_devinst *pi);


================================================
FILE: include/xhyve/lock.h
================================================
/*-
 * Copyright (c) 2016 xhyve developers
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#include <Availability.h>

#if defined(__MAC_OS_X_VERSION_MIN_REQUIRED) && __MAC_OS_X_VERSION_MIN_REQUIRED >= 101200 /* __MAC_10_12 */
	#include <os/lock.h>
	#define xhyve_lock_t os_unfair_lock
	#define XHYVE_LOCK_INIT(V, LOCK) (V)->LOCK = OS_UNFAIR_LOCK_INIT;
	#define XHYVE_LOCK(V, LOCK) os_unfair_lock_lock(&(V)->LOCK)
	#define XHYVE_UNLOCK(V, LOCK) os_unfair_lock_unlock(&(V)->LOCK)
#else
	#include <libkern/OSAtomic.h>
	#define xhyve_lock_t OSSpinLock
	#define XHYVE_LOCK_INIT(V, LOCK) (V)->LOCK = OS_SPINLOCK_INIT;
	#define XHYVE_LOCK(V, LOCK) OSSpinLockLock(&(V)->LOCK)
	#define XHYVE_UNLOCK(V, LOCK) OSSpinLockUnlock(&(V)->LOCK)
#endif


================================================
FILE: include/xhyve/mem.h
================================================
/*-
 * Copyright (c) 2012 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <stdint.h>
#include <xhyve/support/linker_set.h>

typedef int (*mem_func_t)(int vcpu, int dir, uint64_t addr, int size,
	uint64_t *val, void *arg1, long arg2);

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"
struct mem_range {
	const char *name;
	int flags;
	mem_func_t handler;
	void *arg1;
	long arg2;
	uint64_t base;
	uint64_t size;
};
#pragma clang diagnostic pop

#define MEM_F_READ 0x1
#define MEM_F_WRITE 0x2
#define MEM_F_RW 0x3
#define MEM_F_IMMUTABLE 0x4 /* mem_range cannot be unregistered */

void init_mem(void);
int emulate_mem(int vcpu, uint64_t paddr, struct vie *vie,
	struct vm_guest_paging *paging);

int register_mem(struct mem_range *memp);
int register_mem_fallback(struct mem_range *memp);
int unregister_mem(struct mem_range *memp);


================================================
FILE: include/xhyve/mevent.h
================================================
/*-
 * Copyright (c) 2011 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

enum ev_type {
	EVF_READ,
	EVF_WRITE,
	EVF_TIMER,
	EVF_SIGNAL
};

struct mevent;

struct mevent *mevent_add(int fd, enum ev_type type,
	void (*func)(int, enum ev_type, void *), void *param);
int mevent_enable(struct mevent *evp);
int mevent_disable(struct mevent *evp);
int mevent_delete(struct mevent *evp);
int mevent_delete_close(struct mevent *evp);

void mevent_dispatch(void);


================================================
FILE: include/xhyve/mptbl.h
================================================
/*-
 * Copyright (c) 2012 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

int mptable_build(int ncpu);
void mptable_add_oemtbl(void *tbl, int tblsz);


================================================
FILE: include/xhyve/pci_emul.h
================================================
/*-
 * Copyright (c) 2011 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <stdint.h>
#include <pthread.h>
#include <assert.h>
#include <xhyve/support/misc.h>
#include <xhyve/support/pcireg.h>
#include <xhyve/support/linker_set.h>

#define PCI_BARMAX PCIR_MAX_BAR_0 /* BAR registers in a Type 0 header */

struct pci_devinst;
struct memory_region;

struct pci_devemu {
	/* name of device emulation */
	char *pe_emu;
	/* instance creation */
	int (*pe_init)(struct pci_devinst *, char *opts);
	/* ACPI DSDT enumeration */
	void (*pe_write_dsdt)(struct pci_devinst *);
	/* config space read/write callbacks */
	int	(*pe_cfgwrite)(int vcpu, struct pci_devinst *pi,
		int offset, int bytes, uint32_t val);
	int	(*pe_cfgread)(int vcpu, struct pci_devinst *pi, int offset, int bytes,
		uint32_t *retval);
	/* BAR read/write callbacks */
	void (*pe_barwrite)(int vcpu, struct pci_devinst *pi, int baridx,
		uint64_t offset, int size, uint64_t value);
	uint64_t (*pe_barread)(int vcpu, struct pci_devinst *pi, int baridx,
		uint64_t offset, int size);
};

#define PCI_EMUL_SET(x) DATA_SET(pci_devemu_set, x)

enum pcibar_type {
	PCIBAR_NONE,
	PCIBAR_IO,
	PCIBAR_MEM32,
	PCIBAR_MEM64,
	PCIBAR_MEMHI64
};

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"
struct pcibar {
	enum pcibar_type type; /* io or memory */
	uint64_t size;
	uint64_t addr;
};
#pragma clang diagnostic pop

#define PI_NAMESZ 40

struct msix_table_entry {
	uint64_t addr;
	uint32_t msg_data;
	uint32_t vector_control;
};

/* 
 * In case the structure is modified to hold extra information, use a define
 * for the size that should be emulated.
 */
#define MSIX_TABLE_ENTRY_SIZE 16
#define MAX_MSIX_TABLE_ENTRIES 2048
#define PBA_SIZE(msgnum) (roundup2((msgnum), 64) / 8)

enum lintr_stat {
	IDLE,
	ASSERTED,
	PENDING
};

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"
struct pci_devinst {
	struct pci_devemu *pi_d;
	uint8_t pi_bus, pi_slot, pi_func;
	char pi_name[PI_NAMESZ];
	int pi_bar_getsize;
	int pi_prevcap;
	int pi_capend;

	struct {
		int8_t pin;
		enum lintr_stat state;
		int pirq_pin;
		int ioapic_irq;
		pthread_mutex_t lock;
	} pi_lintr;

	struct {
		int enabled;
		uint64_t addr;
		uint64_t msg_data;
		int maxmsgnum;
	} pi_msi;

	struct {
		int enabled;
		int table_bar;
		int pba_bar;
		uint32_t table_offset;
		int table_count;
		uint32_t pba_offset;
		int pba_size;
		int function_mask;
		struct msix_table_entry *table; /* allocated at runtime */
	} pi_msix;

	void *pi_arg; /* devemu-private data */

	u_char pi_cfgdata[PCI_REGMAX + 1];
	struct pcibar pi_bar[PCI_BARMAX + 1];
};
#pragma clang diagnostic pop

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
struct msicap {
	uint8_t capid;
	uint8_t nextptr;
	uint16_t msgctrl;
	uint32_t addrlo;
	uint32_t addrhi;
	uint16_t msgdata;
} __packed;

struct msixcap {
	uint8_t capid;
	uint8_t nextptr;
	uint16_t msgctrl;
	uint32_t table_info; /* bar index and offset within it */
	uint32_t pba_info; /* bar index and offset within it */
} __packed;

struct pciecap {
	uint8_t capid;
	uint8_t nextptr;
	uint16_t pcie_capabilities;

	uint32_t dev_capabilities; /* all devices */
	uint16_t dev_control;
	uint16_t dev_status;

	uint32_t link_capabilities; /* devices with links */
	uint16_t link_control;
	uint16_t link_status;

	uint32_t slot_capabilities; /* ports with slots */
	uint16_t slot_control;
	uint16_t slot_status;

	uint16_t root_control; /* root ports */
	uint16_t root_capabilities;
	uint32_t root_status;

	uint32_t dev_capabilities2; /* all devices */
	uint16_t dev_control2;
	uint16_t dev_status2;

	uint32_t link_capabilities2; /* devices with links */
	uint16_t link_control2;
	uint16_t link_status2;

	uint32_t slot_capabilities2; /* ports with slots */
	uint16_t slot_control2;
	uint16_t slot_status2;
} __packed;
#pragma clang diagnostic pop

typedef void (*pci_lintr_cb)(int b, int s, int pin, int pirq_pin,
	int ioapic_irq, void *arg);

int init_pci(void);
void msicap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
	int bytes, uint32_t val);
void msixcap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
	int bytes, uint32_t val);
void pci_callback(void);
int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx,
	enum pcibar_type type, uint64_t size);
int pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx,
	uint64_t hostbase, enum pcibar_type type, uint64_t size);
int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum);
int pci_emul_add_pciecap(struct pci_devinst *pi, int pcie_device_type);
void pci_generate_msi(struct pci_devinst *pi, int msgnum);
void pci_generate_msix(struct pci_devinst *pi, int msgnum);
void pci_lintr_assert(struct pci_devinst *pi);
void pci_lintr_deassert(struct pci_devinst *pi);
void pci_lintr_request(struct pci_devinst *pi);
int pci_msi_enabled(struct pci_devinst *pi);
int pci_msix_enabled(struct pci_devinst *pi);
int pci_msix_table_bar(struct pci_devinst *pi);
int pci_msix_pba_bar(struct pci_devinst *pi);
int pci_msi_msgnum(struct pci_devinst *pi);
int pci_parse_slot(char *opt);
void pci_populate_msicap(struct msicap *cap, int msgs, int nextptr);
int pci_emul_add_msixcap(struct pci_devinst *pi, int msgnum, int barnum);
int pci_emul_msix_twrite(struct pci_devinst *pi, uint64_t offset, int size,
	uint64_t value);
uint64_t pci_emul_msix_tread(struct pci_devinst *pi, uint64_t offset, int size);
int pci_count_lintr(int bus);
void pci_walk_lintr(int bus, pci_lintr_cb cb, void *arg);
void pci_write_dsdt(void);
uint64_t pci_ecfg_base(void);
int pci_bus_configured(int bus);

static __inline void 
pci_set_cfgdata8(struct pci_devinst *pi, int offset, uint8_t val)
{
	assert(offset <= PCI_REGMAX);
	*(uint8_t *)(((uintptr_t) &pi->pi_cfgdata) + ((unsigned) offset)) = val;
}

static __inline void 
pci_set_cfgdata16(struct pci_devinst *pi, int offset, uint16_t val)
{
	assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0);
	*(uint16_t *)(((uintptr_t) &pi->pi_cfgdata) + ((unsigned) offset)) = val;
}

static __inline void 
pci_set_cfgdata32(struct pci_devinst *pi, int offset, uint32_t val)
{
	assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0);
	*(uint32_t *)(((uintptr_t) &pi->pi_cfgdata) + ((unsigned) offset)) = val;
}

static __inline uint8_t
pci_get_cfgdata8(struct pci_devinst *pi, int offset)
{
	assert(offset <= PCI_REGMAX);
	return (*(uint8_t *)(((uintptr_t) &pi->pi_cfgdata) + ((unsigned) offset)));
}

static __inline uint16_t
pci_get_cfgdata16(struct pci_devinst *pi, int offset)
{
	assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0);
	return (*(uint16_t *)(((uintptr_t) &pi->pi_cfgdata) + ((unsigned) offset)));
}

static __inline uint32_t
pci_get_cfgdata32(struct pci_devinst *pi, int offset)
{
	assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0);
	return (*(uint32_t *)(((uintptr_t) &pi->pi_cfgdata) + ((unsigned) offset)));
}


================================================
FILE: include/xhyve/pci_irq.h
================================================
/*-
 * Copyright (c) 2014 Hudson River Trading LLC
 * Written by: John H. Baldwin <jhb@FreeBSD.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

struct pci_devinst;

void pci_irq_assert(struct pci_devinst *pi);
void pci_irq_deassert(struct pci_devinst *pi);
void pci_irq_init(void);
void pci_irq_reserve(int irq);
void pci_irq_use(int irq);
int pirq_alloc_pin(struct pci_devinst *pi);
int pirq_irq(int pin);
uint8_t pirq_read(int pin);
void pirq_write(int pin, uint8_t val);


================================================
FILE: include/xhyve/pci_lpc.h
================================================
/*-
 * Copyright (c) 2013 Neel Natu <neel@freebsd.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <stdint.h>
#include <xhyve/support/linker_set.h>

typedef void (*lpc_write_dsdt_t)(void);

struct lpc_dsdt {
	lpc_write_dsdt_t handler;
};

#define	LPC_DSDT(handler) \
	static struct lpc_dsdt __CONCAT(__lpc_dsdt, handler) = { \
		(handler), \
	}; \
	DATA_SET(lpc_dsdt_set, __CONCAT(__lpc_dsdt, handler))

enum lpc_sysres_type {
	LPC_SYSRES_IO,
	LPC_SYSRES_MEM
};

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"
struct lpc_sysres {
	enum lpc_sysres_type type;
	uint32_t base;
	uint32_t length;
};
#pragma clang diagnostic pop

#define	LPC_SYSRES(type, base, length) \
	static struct lpc_sysres __CONCAT(__lpc_sysres, base) = {\
		(type), \
		(base), \
		(length) \
	}; \
	DATA_SET(lpc_sysres_set, __CONCAT(__lpc_sysres, base))

#define SYSRES_IO(base, length) LPC_SYSRES(LPC_SYSRES_IO, base, length)
#define SYSRES_MEM(base, length) LPC_SYSRES(LPC_SYSRES_MEM, base, length)

int lpc_device_parse(const char *opt);
char *lpc_pirq_name(int pin);
void lpc_pirq_routed(void);
const char *lpc_bootrom(void);


================================================
FILE: include/xhyve/ps2kbd.h
================================================
/*-
 * Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _PS2KBD_H_
#define	_PS2KBD_H_

struct atkbdc_softc;

struct ps2kbd_softc *ps2kbd_init(struct atkbdc_softc *sc);

int ps2kbd_read(struct ps2kbd_softc *sc, uint8_t *val);
void ps2kbd_write(struct ps2kbd_softc *sc, uint8_t val);

#endif /* _PS2KBD_H_ */


================================================
FILE: include/xhyve/ps2mouse.h
================================================
/*-
 * Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _PS2MOUSE_H_
#define	_PS2MOUSE_H_

struct atkbdc_softc;

struct ps2mouse_softc *ps2mouse_init(struct atkbdc_softc *sc);

int ps2mouse_read(struct ps2mouse_softc *sc, uint8_t *val);
void ps2mouse_write(struct ps2mouse_softc *sc, uint8_t val, int insert);
void ps2mouse_toggle(struct ps2mouse_softc *sc, int enable);
int ps2mouse_fifocnt(struct ps2mouse_softc *sc);

#endif /* _PS2MOUSE_H_ */


================================================
FILE: include/xhyve/rfb.h
================================================
/*-
 * Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _RFB_H_
#define	_RFB_H_

#define	RFB_PORT	5900

int	rfb_init(char *hostname, int port, int wait, char *password);

#endif /* _RFB_H_ */


================================================
FILE: include/xhyve/rtc.h
================================================
/*
 * Copyright (c) 2013  Peter Grehan <grehan@freebsd.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

void rtc_init(int use_localtime);



================================================
FILE: include/xhyve/smbiostbl.h
================================================
/*-
 * Copyright (c) 2014 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

int smbios_build(void);


================================================
FILE: include/xhyve/sockstream.h
================================================
/*-
 * Copyright (c) 2015 Nahanni Systems, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#include <sys/types.h>
#include <unistd.h>

ssize_t stream_read(int fd, void *buf, ssize_t nbytes);
ssize_t stream_write(int fd, const void *buf, ssize_t nbytes);


================================================
FILE: include/xhyve/support/acpi_hpet.h
================================================
/*-
 * Copyright (c) 2005 Poul-Henning Kamp
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#define HPET_MEM_WIDTH		0x400	/* Expected memory region size */

/* General registers */
#define HPET_CAPABILITIES	0x0	/* General capabilities and ID */
#define	HPET_CAP_VENDOR_ID	0xffff0000
#define	HPET_CAP_LEG_RT		0x00008000
#define	HPET_CAP_COUNT_SIZE	0x00002000 /* 1 = 64-bit, 0 = 32-bit */
#define	HPET_CAP_NUM_TIM	0x00001f00
#define	HPET_CAP_REV_ID		0x000000ff
#define HPET_PERIOD		0x4	/* Period (1/hz) of timer */
#define HPET_CONFIG		0x10	/* General configuration register */
#define	HPET_CNF_LEG_RT		0x00000002
#define	HPET_CNF_ENABLE		0x00000001
#define	HPET_ISR		0x20	/* General interrupt status register */
#define HPET_MAIN_COUNTER	0xf0	/* Main counter register */

/* Timer registers */
#define	HPET_TIMER_CAP_CNF(x)	((x) * 0x20 + 0x100)
#define	HPET_TCAP_INT_ROUTE	0xffffffff00000000
#define	HPET_TCAP_FSB_INT_DEL	0x00008000
#define	HPET_TCNF_FSB_EN	0x00004000
#define	HPET_TCNF_INT_ROUTE	0x00003e00
#define	HPET_TCNF_32MODE	0x00000100
#define	HPET_TCNF_VAL_SET	0x00000040
#define	HPET_TCAP_SIZE		0x00000020 /* 1 = 64-bit, 0 = 32-bit */
#define	HPET_TCAP_PER_INT	0x00000010 /* Supports periodic interrupts */
#define	HPET_TCNF_TYPE		0x00000008 /* 1 = periodic, 0 = one-shot */
#define	HPET_TCNF_INT_ENB	0x00000004
#define	HPET_TCNF_INT_TYPE	0x00000002 /* 1 = level triggered, 0 = edge */
#define	HPET_TIMER_COMPARATOR(x) ((x) * 0x20 + 0x108)
#define	HPET_TIMER_FSB_VAL(x)	((x) * 0x20 + 0x110)
#define	HPET_TIMER_FSB_ADDR(x)	((x) * 0x20 + 0x114)

#define	HPET_MIN_CYCLES		128	/* Period considered reliable. */


================================================
FILE: include/xhyve/support/apicreg.h
================================================
/*-
 * Copyright (c) 1996, by Peter Wemm and Steve Passe
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. The name of the developer may NOT be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <stdint.h>

/*
 * Local && I/O APIC definitions.
 */

/*
 * Pentium P54C+ Built-in APIC
 * (Advanced programmable Interrupt Controller)
 * 
 * Base Address of Built-in APIC in memory location
 * is 0xfee00000.
 * 
 * Map of APIC Registers:
 * 
 * Offset (hex)    Description                     Read/Write state
 * 000             Reserved
 * 010             Reserved
 * 020 ID          Local APIC ID                   R/W
 * 030 VER         Local APIC Version              R
 * 040             Reserved
 * 050             Reserved
 * 060             Reserved
 * 070             Reserved
 * 080             Task Priority Register          R/W
 * 090             Arbitration Priority Register   R
 * 0A0             Processor Priority Register     R
 * 0B0             EOI Register                    W
 * 0C0 RRR         Remote read                     R
 * 0D0             Logical Destination             R/W
 * 0E0             Destination Format Register     0..27 R;  28..31 R/W
 * 0F0 SVR         Spurious Interrupt Vector Reg.  0..3  R;  4..9   R/W
 * 100             ISR  000-031                    R
 * 110             ISR  032-063                    R
 * 120             ISR  064-095                    R
 * 130             ISR  095-128                    R
 * 140             ISR  128-159                    R
 * 150             ISR  160-191                    R
 * 160             ISR  192-223                    R
 * 170             ISR  224-255                    R
 * 180             TMR  000-031                    R
 * 190             TMR  032-063                    R
 * 1A0             TMR  064-095                    R
 * 1B0             TMR  095-128                    R
 * 1C0             TMR  128-159                    R
 * 1D0             TMR  160-191                    R
 * 1E0             TMR  192-223                    R
 * 1F0             TMR  224-255                    R
 * 200             IRR  000-031                    R
 * 210             IRR  032-063                    R
 * 220             IRR  064-095                    R
 * 230             IRR  095-128                    R
 * 240             IRR  128-159                    R
 * 250             IRR  160-191                    R
 * 260             IRR  192-223                    R
 * 270             IRR  224-255                    R
 * 280             Error Status Register           R
 * 290             Reserved
 * 2A0             Reserved
 * 2B0             Reserved
 * 2C0             Reserved
 * 2D0             Reserved
 * 2E0             Reserved
 * 2F0             Local Vector Table (CMCI)       R/W
 * 300 ICR_LOW     Interrupt Command Reg. (0-31)   R/W
 * 310 ICR_HI      Interrupt Command Reg. (32-63)  R/W
 * 320             Local Vector Table (Timer)      R/W
 * 330             Local Vector Table (Thermal)    R/W (PIV+)
 * 340             Local Vector Table (Performance) R/W (P6+)
 * 350 LVT1        Local Vector Table (LINT0)      R/W
 * 360 LVT2        Local Vector Table (LINT1)      R/W
 * 370 LVT3        Local Vector Table (ERROR)      R/W
 * 380             Initial Count Reg. for Timer    R/W
 * 390             Current Count of Timer          R
 * 3A0             Reserved
 * 3B0             Reserved
 * 3C0             Reserved
 * 3D0             Reserved
 * 3E0             Timer Divide Configuration Reg. R/W
 * 3F0             Reserved
 */


/******************************************************************************
 * global defines, etc.
 */


/******************************************************************************
 * LOCAL APIC structure
 */

#define PAD3	int : 32; int : 32; int : 32
#define PAD4	int : 32; int : 32; int : 32; int : 32

struct LAPIC {
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	uint32_t id;		PAD3;
	uint32_t version;	PAD3;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	uint32_t tpr;		PAD3;
	uint32_t apr;		PAD3;
	uint32_t ppr;		PAD3;
	uint32_t eoi;		PAD3;
	/* reserved */		PAD4;
	uint32_t ldr;		PAD3;
	uint32_t dfr;		PAD3;
	uint32_t svr;		PAD3;
	uint32_t isr0;		PAD3;
	uint32_t isr1;		PAD3;
	uint32_t isr2;		PAD3;
	uint32_t isr3;		PAD3;
	uint32_t isr4;		PAD3;
	uint32_t isr5;		PAD3;
	uint32_t isr6;		PAD3;
	uint32_t isr7;		PAD3;
	uint32_t tmr0;		PAD3;
	uint32_t tmr1;		PAD3;
	uint32_t tmr2;		PAD3;
	uint32_t tmr3;		PAD3;
	uint32_t tmr4;		PAD3;
	uint32_t tmr5;		PAD3;
	uint32_t tmr6;		PAD3;
	uint32_t tmr7;		PAD3;
	uint32_t irr0;		PAD3;
	uint32_t irr1;		PAD3;
	uint32_t irr2;		PAD3;
	uint32_t irr3;		PAD3;
	uint32_t irr4;		PAD3;
	uint32_t irr5;		PAD3;
	uint32_t irr6;		PAD3;
	uint32_t irr7;		PAD3;
	uint32_t esr;		PAD3;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	uint32_t lvt_cmci;	PAD3;
	uint32_t icr_lo;	PAD3;
	uint32_t icr_hi;	PAD3;
	uint32_t lvt_timer;	PAD3;
	uint32_t lvt_thermal;	PAD3;
	uint32_t lvt_pcint;	PAD3;
	uint32_t lvt_lint0;	PAD3;
	uint32_t lvt_lint1;	PAD3;
	uint32_t lvt_error;	PAD3;
	uint32_t icr_timer;	PAD3;
	uint32_t ccr_timer;	PAD3;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	/* reserved */		PAD4;
	uint32_t dcr_timer;	PAD3;
	/* reserved */		PAD4;
};

typedef struct LAPIC lapic_t;

enum LAPIC_REGISTERS {
	LAPIC_ID	= 0x2,
	LAPIC_VERSION	= 0x3,
	LAPIC_TPR	= 0x8,
	LAPIC_APR	= 0x9,
	LAPIC_PPR	= 0xa,
	LAPIC_EOI	= 0xb,
	LAPIC_LDR	= 0xd,
	LAPIC_DFR	= 0xe, /* Not in x2APIC */
	LAPIC_SVR	= 0xf,
	LAPIC_ISR0	= 0x10,
	LAPIC_ISR1	= 0x11,
	LAPIC_ISR2	= 0x12,
	LAPIC_ISR3	= 0x13,
	LAPIC_ISR4	= 0x14,
	LAPIC_ISR5	= 0x15,
	LAPIC_ISR6	= 0x16,
	LAPIC_ISR7	= 0x17,
	LAPIC_TMR0	= 0x18,
	LAPIC_TMR1	= 0x19,
	LAPIC_TMR2	= 0x1a,
	LAPIC_TMR3	= 0x1b,
	LAPIC_TMR4	= 0x1c,
	LAPIC_TMR5	= 0x1d,
	LAPIC_TMR6	= 0x1e,
	LAPIC_TMR7	= 0x1f,
	LAPIC_IRR0	= 0x20,
	LAPIC_IRR1	= 0x21,
	LAPIC_IRR2	= 0x22,
	LAPIC_IRR3	= 0x23,
	LAPIC_IRR4	= 0x24,
	LAPIC_IRR5	= 0x25,
	LAPIC_IRR6	= 0x26,
	LAPIC_IRR7	= 0x27,
	LAPIC_ESR	= 0x28,
	LAPIC_LVT_CMCI	= 0x2f,
	LAPIC_ICR_LO	= 0x30,
	LAPIC_ICR_HI	= 0x31, /* Not in x2APIC */
	LAPIC_LVT_TIMER	= 0x32,
	LAPIC_LVT_THERMAL = 0x33,
	LAPIC_LVT_PCINT	= 0x34,
	LAPIC_LVT_LINT0	= 0x35,
	LAPIC_LVT_LINT1	= 0x36,
	LAPIC_LVT_ERROR	= 0x37,
	LAPIC_ICR_TIMER	= 0x38,
	LAPIC_CCR_TIMER	= 0x39,
	LAPIC_DCR_TIMER	= 0x3e,
	LAPIC_SELF_IPI	= 0x3f, /* Only in x2APIC */
};

/*
 * The LAPIC_SELF_IPI register only exists in x2APIC mode.  The
 * formula below is applicable only to reserve the memory region,
 * i.e. for xAPIC mode, where LAPIC_SELF_IPI finely serves as the
 * address past end of the region.
 */
#define	LAPIC_MEM_REGION (LAPIC_SELF_IPI * 0x10)

#define	LAPIC_MEM_MUL	0x10

/******************************************************************************
 * I/O APIC structure
 */

struct IOAPIC {
	uint32_t ioregsel;	PAD3;
	uint32_t iowin;	PAD3;
};

typedef struct IOAPIC ioapic_t;

#undef PAD4
#undef PAD3


/******************************************************************************
 * various code 'logical' values
 */

/******************************************************************************
 * LOCAL APIC defines
 */

/* default physical locations of LOCAL (CPU) APICs */
#define DEFAULT_APIC_BASE	0xfee00000

/* constants relating to APIC ID registers */
#define APIC_ID_MASK		0xff000000
#define	APIC_ID_SHIFT		24
#define	APIC_ID_CLUSTER		0xf0
#define	APIC_ID_CLUSTER_ID	0x0f
#define	APIC_MAX_CLUSTER	0xe
#define	APIC_MAX_INTRACLUSTER_ID 3
#define	APIC_ID_CLUSTER_SHIFT	4

/* fields in VER */
#define APIC_VER_VERSION	0x000000ff
#define APIC_VER_MAXLVT		0x00ff0000
#define MAXLVTSHIFT		16
#define APIC_VER_EOI_SUPPRESSION 0x01000000

/* fields in LDR */
#define	APIC_LDR_RESERVED	0x00ffffff

/* fields in DFR */
#define	APIC_DFR_RESERVED	0x0fffffff
#define	APIC_DFR_MODEL_MASK	0xf0000000
#define	APIC_DFR_MODEL_FLAT	0xf0000000
#define	APIC_DFR_MODEL_CLUSTER	0x00000000

/* fields in SVR */
#define APIC_SVR_VECTOR		0x000000ff
#define APIC_SVR_VEC_PROG	0x000000f0
#define APIC_SVR_VEC_FIX	0x0000000f
#define APIC_SVR_ENABLE		0x00000100
# define APIC_SVR_SWDIS		0x00000000
# define APIC_SVR_SWEN		0x00000100
#define APIC_SVR_FOCUS		0x00000200
# define APIC_SVR_FEN		0x00000000
# define APIC_SVR_FDIS		0x00000200
#define APIC_SVR_EOI_SUPPRESSION 0x00001000

/* fields in TPR */
#define APIC_TPR_PRIO		0x000000ff
# define APIC_TPR_INT		0x000000f0
# define APIC_TPR_SUB		0x0000000f

/* fields in ESR */
#define	APIC_ESR_SEND_CS_ERROR		0x00000001
#define	APIC_ESR_RECEIVE_CS_ERROR	0x00000002
#define	APIC_ESR_SEND_ACCEPT		0x00000004
#define	APIC_ESR_RECEIVE_ACCEPT		0x00000008
#define	APIC_ESR_SEND_ILLEGAL_VECTOR	0x00000020
#define	APIC_ESR_RECEIVE_ILLEGAL_VECTOR	0x00000040
#define	APIC_ESR_ILLEGAL_REGISTER	0x00000080

/* fields in ICR_LOW */
#define APIC_VECTOR_MASK	0x000000ff

#define APIC_DELMODE_MASK	0x00000700
# define APIC_DELMODE_FIXED	0x00000000
# define APIC_DELMODE_LOWPRIO	0x00000100
# define APIC_DELMODE_SMI	0x00000200
# define APIC_DELMODE_RR	0x00000300
# define APIC_DELMODE_NMI	0x00000400
# define APIC_DELMODE_INIT	0x00000500
# define APIC_DELMODE_STARTUP	0x00000600
# define APIC_DELMODE_RESV	0x00000700

#define APIC_DESTMODE_MASK	0x00000800
# define APIC_DESTMODE_PHY	0x00000000
# define APIC_DESTMODE_LOG	0x00000800

#define APIC_DELSTAT_MASK	0x00001000
# define APIC_DELSTAT_IDLE	0x00000000
# define APIC_DELSTAT_PEND	0x00001000

#define APIC_RESV1_MASK		0x00002000

#define APIC_LEVEL_MASK		0x00004000
# define APIC_LEVEL_DEASSERT	0x00000000
# define APIC_LEVEL_ASSERT	0x00004000

#define APIC_TRIGMOD_MASK	0x00008000
# define APIC_TRIGMOD_EDGE	0x00000000
# define APIC_TRIGMOD_LEVEL	0x00008000

#define APIC_RRSTAT_MASK	0x00030000
# define APIC_RRSTAT_INVALID	0x00000000
# define APIC_RRSTAT_INPROG	0x00010000
# define APIC_RRSTAT_VALID	0x00020000
# define APIC_RRSTAT_RESV	0x00030000

#define APIC_DEST_MASK		0x000c0000
# define APIC_DEST_DESTFLD	0x00000000
# define APIC_DEST_SELF		0x00040000
# define APIC_DEST_ALLISELF	0x00080000
# define APIC_DEST_ALLESELF	0x000c0000

#define APIC_RESV2_MASK		0xfff00000

#define	APIC_ICRLO_RESV_MASK	(APIC_RESV1_MASK | APIC_RESV2_MASK)

/* fields in LVT1/2 */
#define APIC_LVT_VECTOR		0x000000ff
#define APIC_LVT_DM		0x00000700
# define APIC_LVT_DM_FIXED	0x00000000
# define APIC_LVT_DM_SMI	0x00000200
# define APIC_LVT_DM_NMI	0x00000400
# define APIC_LVT_DM_INIT	0x00000500
# define APIC_LVT_DM_EXTINT	0x00000700
#define APIC_LVT_DS		0x00001000
#define APIC_LVT_IIPP		0x00002000
#define APIC_LVT_IIPP_INTALO	0x00002000
#define APIC_LVT_IIPP_INTAHI	0x00000000
#define APIC_LVT_RIRR		0x00004000
#define APIC_LVT_TM		0x00008000
#define APIC_LVT_M		0x00010000


/* fields in LVT Timer */
#define APIC_LVTT_VECTOR	0x000000ff
#define APIC_LVTT_DS		0x00001000
#define APIC_LVTT_M		0x00010000
#define APIC_LVTT_TM		0x00020000
# define APIC_LVTT_TM_ONE_SHOT	0x00000000
# define APIC_LVTT_TM_PERIODIC	0x00020000


/* APIC timer current count */
#define	APIC_TIMER_MAX_COUNT	0xffffffff

/* fields in TDCR */
#define APIC_TDCR_2		0x00
#define APIC_TDCR_4		0x01
#define APIC_TDCR_8		0x02
#define APIC_TDCR_16		0x03
#define APIC_TDCR_32		0x08
#define APIC_TDCR_64		0x09
#define APIC_TDCR_128		0x0a
#define APIC_TDCR_1		0x0b

/* LVT table indices */
#define	APIC_LVT_LINT0		0
#define	APIC_LVT_LINT1		1
#define	APIC_LVT_TIMER		2
#define	APIC_LVT_ERROR		3
#define	APIC_LVT_PMC		4
#define	APIC_LVT_THERMAL	5
#define	APIC_LVT_CMCI		6
#define	APIC_LVT_MAX		APIC_LVT_CMCI

/******************************************************************************
 * I/O APIC defines
 */

/* default physical locations of an IO APIC */
#define DEFAULT_IO_APIC_BASE	0xfec00000

/* window register offset */
#define IOAPIC_WINDOW		0x10
#define IOAPIC_EOIR		0x40

/* indexes into IO APIC */
#define IOAPIC_ID		0x00
#define IOAPIC_VER		0x01
#define IOAPIC_ARB		0x02
#define IOAPIC_REDTBL		0x10
#define IOAPIC_REDTBL0		IOAPIC_REDTBL
#define IOAPIC_REDTBL1		(IOAPIC_REDTBL+0x02)
#define IOAPIC_REDTBL2		(IOAPIC_REDTBL+0x04)
#define IOAPIC_REDTBL3		(IOAPIC_REDTBL+0x06)
#define IOAPIC_REDTBL4		(IOAPIC_REDTBL+0x08)
#define IOAPIC_REDTBL5		(IOAPIC_REDTBL+0x0a)
#define IOAPIC_REDTBL6		(IOAPIC_REDTBL+0x0c)
#define IOAPIC_REDTBL7		(IOAPIC_REDTBL+0x0e)
#define IOAPIC_REDTBL8		(IOAPIC_REDTBL+0x10)
#define IOAPIC_REDTBL9		(IOAPIC_REDTBL+0x12)
#define IOAPIC_REDTBL10		(IOAPIC_REDTBL+0x14)
#define IOAPIC_REDTBL11		(IOAPIC_REDTBL+0x16)
#define IOAPIC_REDTBL12		(IOAPIC_REDTBL+0x18)
#define IOAPIC_REDTBL13		(IOAPIC_REDTBL+0x1a)
#define IOAPIC_REDTBL14		(IOAPIC_REDTBL+0x1c)
#define IOAPIC_REDTBL15		(IOAPIC_REDTBL+0x1e)
#define IOAPIC_REDTBL16		(IOAPIC_REDTBL+0x20)
#define IOAPIC_REDTBL17		(IOAPIC_REDTBL+0x22)
#define IOAPIC_REDTBL18		(IOAPIC_REDTBL+0x24)
#define IOAPIC_REDTBL19		(IOAPIC_REDTBL+0x26)
#define IOAPIC_REDTBL20		(IOAPIC_REDTBL+0x28)
#define IOAPIC_REDTBL21		(IOAPIC_REDTBL+0x2a)
#define IOAPIC_REDTBL22		(IOAPIC_REDTBL+0x2c)
#define IOAPIC_REDTBL23		(IOAPIC_REDTBL+0x2e)

/* fields in VER */
#define IOART_VER_VERSION	0x000000ff
#define IOART_VER_MAXREDIR	0x00ff0000
#define MAXREDIRSHIFT		16

/*
 * fields in the IO APIC's redirection table entries
 */
#define IOART_DEST	APIC_ID_MASK	/* broadcast addr: all APICs */

#define IOART_RESV	0x00fe0000	/* reserved */

#define IOART_INTMASK	0x00010000	/* R/W: INTerrupt mask */
# define IOART_INTMCLR	0x00000000	/*       clear, allow INTs */
# define IOART_INTMSET	0x00010000	/*       set, inhibit INTs */

#define IOART_TRGRMOD	0x00008000	/* R/W: trigger mode */
# define IOART_TRGREDG	0x00000000	/*       edge */
# define IOART_TRGRLVL	0x00008000	/*       level */

#define IOART_REM_IRR	0x00004000	/* RO: remote IRR */

#define IOART_INTPOL	0x00002000	/* R/W: INT input pin polarity */
# define IOART_INTAHI	0x00000000	/*      active high */
# define IOART_INTALO	0x00002000	/*      active low */

#define IOART_DELIVS	0x00001000	/* RO: delivery status */

#define IOART_DESTMOD	0x00000800	/* R/W: destination mode */
# define IOART_DESTPHY	0x00000000	/*      physical */
# define IOART_DESTLOG	0x00000800	/*      logical */

#define IOART_DELMOD	0x00000700	/* R/W: delivery mode */
# define IOART_DELFIXED	0x00000000	/*       fixed */
# define IOART_DELLOPRI	0x00000100	/*       lowest priority */
# define IOART_DELSMI	0x00000200	/*       System Management INT */
# define IOART_DELRSV1	0x00000300	/*       reserved */
# define IOART_DELNMI	0x00000400	/*       NMI signal */
# define IOART_DELINIT	0x00000500	/*       INIT signal */
# define IOART_DELRSV2	0x00000600	/*       reserved */
# define IOART_DELEXINT	0x00000700	/*       External INTerrupt */

#define IOART_INTVEC	0x000000ff	/* R/W: INTerrupt vector field */


================================================
FILE: include/xhyve/support/ata.h
================================================
/*-
 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer,
 *    without modification, immediately at the beginning of the file.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <xhyve/support/misc.h>

#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpadded"
#pragma clang diagnostic ignored "-Wpacked"

/* ATA/ATAPI device parameters */
struct ata_params {
/*000*/ u_int16_t       config;         /* configuration info */
#define ATA_PROTO_MASK                  0x8003
#define ATA_PROTO_ATAPI                 0x8000
#define ATA_PROTO_ATAPI_12              0x8000
#define ATA_PROTO_ATAPI_16              0x8001
#define ATA_PROTO_CFA                   0x848a
#define ATA_ATAPI_TYPE_MASK             0x1f00
#define ATA_ATAPI_TYPE_DIRECT           0x0000  /* disk/floppy */
#define ATA_ATAPI_TYPE_TAPE             0x0100  /* streaming tape */
#define ATA_ATAPI_TYPE_CDROM            0x0500  /* CD-ROM device */
#define ATA_ATAPI_TYPE_OPTICAL          0x0700  /* optical disk */
#define ATA_DRQ_MASK                    0x0060
#define ATA_DRQ_SLOW                    0x0000  /* cpu 3 ms delay */
#define ATA_DRQ_INTR                    0x0020  /* interrupt 10 ms delay */
#define ATA_DRQ_FAST                    0x0040  /* accel 50 us delay */
#define ATA_RESP_INCOMPLETE             0x0004

/*001*/ u_int16_t       cylinders;              /* # of cylinders */
/*002*/ u_int16_t       specconf;		/* specific configuration */
/*003*/ u_int16_t       heads;                  /* # heads */
	u_int16_t       obsolete4;
	u_int16_t       obsolete5;
/*006*/ u_int16_t       sectors;                /* # sectors/track */
/*007*/ u_int16_t       vendor7[3];
/*010*/ u_int8_t        serial[20];             /* serial number */
/*020*/ u_int16_t       retired20;
	u_int16_t       retired21;
	u_int16_t       obsolete22;
/*023*/ u_int8_t        revision[8];            /* firmware revision */
/*027*/ u_int8_t        model[40];              /* model name */
/*047*/ u_int16_t       sectors_intr;           /* sectors per interrupt */
/*048*/ u_int16_t       usedmovsd;              /* double word read/write? */
/*049*/ u_int16_t       capabilities1;
#define ATA_SUPPORT_DMA                 0x0100
#define ATA_SUPPORT_LBA                 0x0200
#define ATA_SUPPORT_IORDY               0x0400
#define ATA_SUPPORT_IORDYDIS            0x0800
#define ATA_SUPPORT_OVERLAP             0x4000

/*050*/ u_int16_t       capabilities2;
/*051*/ u_int16_t       retired_piomode;        /* PIO modes 0-2 */
#define ATA_RETIRED_PIO_MASK            0x0300

/*052*/ u_int16_t       retired_dmamode;        /* DMA modes */
#define ATA_RETIRED_DMA_MASK            0x0003

/*053*/ u_int16_t       atavalid;               /* fields valid */
#define ATA_FLAG_54_58                  0x0001  /* words 54-58 valid */
#define ATA_FLAG_64_70                  0x0002  /* words 64-70 valid */
#define ATA_FLAG_88                     0x0004  /* word 88 valid */

/*054*/ u_int16_t       current_cylinders;
/*055*/ u_int16_t       current_heads;
/*056*/ u_int16_t       current_sectors;
/*057*/ u_int16_t       current_size_1;
/*058*/ u_int16_t       current_size_2;
/*059*/ u_int16_t       multi;
#define ATA_MULTI_VALID                 0x0100

/*060*/ u_int16_t       lba_size_1;
	u_int16_t       lba_size_2;
	u_int16_t       obsolete62;
/*063*/ u_int16_t       mwdmamodes;             /* multiword DMA modes */
/*064*/ u_int16_t       apiomodes;              /* advanced PIO modes */

/*065*/ u_int16_t       mwdmamin;               /* min. M/W DMA time/word ns */
/*066*/ u_int16_t       mwdmarec;               /* rec. M/W DMA time ns */
/*067*/ u_int16_t       pioblind;               /* min. PIO cycle w/o flow */
/*068*/ u_int16_t       pioiordy;               /* min. PIO cycle IORDY flow */
/*069*/ u_int16_t       support3;
#define ATA_SUPPORT_RZAT                0x0020
#define ATA_SUPPORT_DRAT                0x4000
	u_int16_t       reserved70;
/*071*/ u_int16_t       rlsovlap;               /* rel time (us) for overlap */
/*072*/ u_int16_t       rlsservice;             /* rel time (us) for service */
	u_int16_t       reserved73;
	u_int16_t       reserved74;
/*075*/ u_int16_t       queue;
#define ATA_QUEUE_LEN(x)                ((x) & 0x001f)

/*76*/  u_int16_t       satacapabilities;
#define ATA_SATA_GEN1                   0x0002
#define ATA_SATA_GEN2                   0x0004
#define ATA_SATA_GEN3                   0x0008
#define ATA_SUPPORT_NCQ                 0x0100
#define ATA_SUPPORT_IFPWRMNGTRCV        0x0200
#define ATA_SUPPORT_PHYEVENTCNT         0x0400
#define ATA_SUPPORT_NCQ_UNLOAD          0x0800
#define ATA_SUPPORT_NCQ_PRIO            0x1000
#define ATA_SUPPORT_HAPST               0x2000
#define ATA_SUPPORT_DAPST               0x4000
#define ATA_SUPPORT_READLOGDMAEXT       0x8000

/*77*/  u_int16_t       satacapabilities2;
#define ATA_SATA_CURR_GEN_MASK          0x0006
#define ATA_SUPPORT_NCQ_STREAM          0x0010
#define ATA_SUPPORT_NCQ_QMANAGEMENT     0x0020
#define ATA_SUPPORT_RCVSND_FPDMA_QUEUED 0x0040
/*78*/  u_int16_t       satasupport;
#define ATA_SUPPORT_NONZERO             0x0002
#define ATA_SUPPORT_AUTOACTIVATE        0x0004
#define ATA_SUPPORT_IFPWRMNGT           0x0008
#define ATA_SUPPORT_INORDERDATA         0x0010
#define ATA_SUPPORT_ASYNCNOTIF          0x0020
#define ATA_SUPPORT_SOFTSETPRESERVE     0x0040
/*79*/  u_int16_t       sataenabled;
#define ATA_ENABLED_DAPST               0x0080

/*080*/ u_int16_t       version_major;
/*081*/ u_int16_t       version_minor;

	struct {
/*082/085*/ u_int16_t   command1;
#define ATA_SUPPORT_SMART               0x0001
#define ATA_SUPPORT_SECURITY            0x0002
#define ATA_SUPPORT_REMOVABLE           0x0004
#define ATA_SUPPORT_POWERMGT            0x0008
#define ATA_SUPPORT_PACKET              0x0010
#define ATA_SUPPORT_WRITECACHE          0x0020
#define ATA_SUPPORT_LOOKAHEAD           0x0040
#define ATA_SUPPORT_RELEASEIRQ          0x0080
#define ATA_SUPPORT_SERVICEIRQ          0x0100
#define ATA_SUPPORT_RESET               0x0200
#define ATA_SUPPORT_PROTECTED           0x0400
#define ATA_SUPPORT_WRITEBUFFER         0x1000
#define ATA_SUPPORT_READBUFFER          0x2000
#define ATA_SUPPORT_NOP                 0x4000

/*083/086*/ u_int16_t   command2;
#define ATA_SUPPORT_MICROCODE           0x0001
#define ATA_SUPPORT_QUEUED              0x0002
#define ATA_SUPPORT_CFA                 0x0004
#define ATA_SUPPORT_APM                 0x0008
#define ATA_SUPPORT_NOTIFY              0x0010
#define ATA_SUPPORT_STANDBY             0x0020
#define ATA_SUPPORT_SPINUP              0x0040
#define ATA_SUPPORT_MAXSECURITY         0x0100
#define ATA_SUPPORT_AUTOACOUSTIC        0x0200
#define ATA_SUPPORT_ADDRESS48           0x0400
#define ATA_SUPPORT_OVERLAY             0x0800
#define ATA_SUPPORT_FLUSHCACHE          0x1000
#define ATA_SUPPORT_FLUSHCACHE48        0x2000

/*084/087*/ u_int16_t   extension;
#define ATA_SUPPORT_SMARTLOG		0x0001
#define ATA_SUPPORT_SMARTTEST		0x0002
#define ATA_SUPPORT_MEDIASN		0x0004
#define ATA_SUPPORT_MEDIAPASS		0x0008
#define ATA_SUPPORT_STREAMING		0x0010
#define ATA_SUPPORT_GENLOG		0x0020
#define ATA_SUPPORT_WRITEDMAFUAEXT	0x0040
#define ATA_SUPPORT_WRITEDMAQFUAEXT	0x0080
#define ATA_SUPPORT_64BITWWN		0x0100
#define ATA_SUPPORT_UNLOAD		0x2000
	} __packed support, enabled;

/*088*/ u_int16_t       udmamodes;              /* UltraDMA modes */
/*089*/ u_int16_t       erase_time;             /* time req'd in 2min units */
/*090*/ u_int16_t       enhanced_erase_time;    /* time req'd in 2min units */
/*091*/ u_int16_t       apm_value;
/*092*/ u_int16_t       master_passwd_revision; /* password revision code */
/*093*/ u_int16_t       hwres;
#define ATA_CABLE_ID                    0x2000

/*094*/ u_int16_t       acoustic;
#define ATA_ACOUSTIC_CURRENT(x)         ((x) & 0x00ff)
#define ATA_ACOUSTIC_VENDOR(x)          (((x) & 0xff00) >> 8)

/*095*/ u_int16_t       stream_min_req_size;
/*096*/ u_int16_t       stream_transfer_time;
/*097*/ u_int16_t       stream_access_latency;
/*098*/ u_int32_t       stream_granularity;
/*100*/ u_int16_t       lba_size48_1;
	u_int16_t       lba_size48_2;
	u_int16_t       lba_size48_3;
	u_int16_t       lba_size48_4;
	u_int16_t       reserved104;
/*105*/	u_int16_t       max_dsm_blocks;
/*106*/	u_int16_t       pss;
#define ATA_PSS_LSPPS			0x000F
#define ATA_PSS_LSSABOVE512		0x1000
#define ATA_PSS_MULTLS			0x2000
#define ATA_PSS_VALID_MASK		0xC000
#define ATA_PSS_VALID_VALUE		0x4000
/*107*/ u_int16_t       isd;
/*108*/ u_int16_t       wwn[4];
	u_int16_t       reserved112[5];
/*117*/ u_int16_t       lss_1;
/*118*/ u_int16_t       lss_2;
/*119*/ u_int16_t       support2;
#define ATA_SUPPORT_WRITEREADVERIFY	0x0002
#define ATA_SUPPORT_WRITEUNCORREXT	0x0004
#define ATA_SUPPORT_RWLOGDMAEXT		0x0008
#define ATA_SUPPORT_MICROCODE3		0x0010
#define ATA_SUPPORT_FREEFALL		0x0020
/*120*/ u_int16_t       enabled2;
	u_int16_t       reserved121[6];
/*127*/ u_int16_t       removable_status;
/*128*/ u_int16_t       security_status;
#define ATA_SECURITY_LEVEL		0x0100	/* 0: high, 1: maximum */
#define ATA_SECURITY_ENH_SUPP		0x0020	/* enhanced erase supported */
#define ATA_SECURITY_COUNT_EXP		0x0010	/* count expired */
#define ATA_SECURITY_FROZEN		0x0008	/* security config is frozen */
#define ATA_SECURITY_LOCKED		0x0004	/* drive is locked */
#define ATA_SECURITY_ENABLED		0x0002	/* ATA Security is enabled */
#define ATA_SECURITY_SUPPORTED		0x0001	/* ATA Security is supported */

	u_int16_t       reserved129[31];
/*160*/ u_int16_t       cfa_powermode1;
	u_int16_t       reserved161;
/*162*/ u_int16_t       cfa_kms_support;
/*163*/ u_int16_t       cfa_trueide_modes;
/*164*/ u_int16_t       cfa_memory_modes;
	u_int16_t       reserved165[4];
/*169*/	u_int16_t       support_dsm;
#define ATA_SUPPORT_DSM_TRIM		0x0001
	u_int16_t       reserved170[6];
/*176*/ u_int8_t        media_serial[60];
/*206*/ u_int16_t       sct;
	u_int16_t       reserved206[2];
/*209*/ u_int16_t       lsalign;
/*210*/ u_int16_t       wrv_sectors_m3_1;
	u_int16_t       wrv_sectors_m3_2;
/*212*/ u_int16_t       wrv_sectors_m2_1;
	u_int16_t       wrv_sectors_m2_2;
/*214*/ u_int16_t       nv_cache_caps;
/*215*/ u_int16_t       nv_cache_size_1;
	u_int16_t       nv_cache_size_2;
/*217*/ u_int16_t       media_rotation_rate;
#define ATA_RATE_NOT_REPORTED		0x0000
#define ATA_RATE_NON_ROTATING		0x0001
	u_int16_t       reserved218;
/*219*/ u_int16_t       nv_cache_opt;
/*220*/ u_int16_t       wrv_mode;
	u_int16_t       reserved221;
/*222*/ u_int16_t       transport_major;
/*223*/ u_int16_t       transport_minor;
	u_int16_t       reserved224[31];
/*255*/ u_int16_t       integrity;
} __packed;

/* ATA Dataset Management */
#define ATA_DSM_BLK_SIZE	512
#define ATA_DSM_BLK_RANGES	64
#define ATA_DSM_RANGE_SIZE	8
#define ATA_DSM_RANGE_MAX	65535

/*
 * ATA Device Register
 *
 * bit 7 Obsolete (was 1 in early ATA specs)
 * bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS 
 * bit 5 Obsolete (was 1 in early ATA specs)
 * bit 4 1 = Slave Drive, 0 = Master Drive
 * bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number
*/

#define ATA_DEV_MASTER		0x00
#define ATA_DEV_SLAVE		0x10
#define ATA_DEV_LBA		0x40

/* ATA limits */
#define ATA_MAX_28BIT_LBA	268435455UL

/* ATA Status Register */
#define ATA_STATUS_ERROR	0x01
#define ATA_STATUS_DEVICE_FAULT	0x20

/* ATA Error Register */
#define ATA_ERROR_ABORT		0x04
#define ATA_ERROR_ID_NOT_FOUND	0x10

/* ATA HPA Features */
#define ATA_HPA_FEAT_MAX_ADDR	0x00
#define ATA_HPA_FEAT_SET_PWD	0x01
#define ATA_HPA_FEAT_LOCK	0x02
#define ATA_HPA_FEAT_UNLOCK	0x03
#define ATA_HPA_FEAT_FREEZE	0x04

/* ATA transfer modes */
#define ATA_MODE_MASK           0x0f
#define ATA_DMA_MASK            0xf0
#define ATA_PIO                 0x00
#define ATA_PIO0                0x08
#define ATA_PIO1                0x09
#define ATA_PIO2                0x0a
#define ATA_PIO3                0x0b
#define ATA_PIO4                0x0c
#define ATA_PIO_MAX             0x0f
#define ATA_DMA                 0x10
#define ATA_WDMA0               0x20
#define ATA_WDMA1               0x21
#define ATA_WDMA2               0x22
#define ATA_UDMA0               0x40
#define ATA_UDMA1               0x41
#define ATA_UDMA2               0x42
#define ATA_UDMA3               0x43
#define ATA_UDMA4               0x44
#define ATA_UDMA5               0x45
#define ATA_UDMA6               0x46
#define ATA_SA150               0x47
#define ATA_SA300               0x48
#define ATA_DMA_MAX             0x4f


/* ATA commands */
#define ATA_NOP                         0x00    /* NOP */
#define         ATA_NF_FLUSHQUEUE       0x00    /* flush queued cmd's */
#define         ATA_NF_AUTOPOLL         0x01    /* start autopoll function */
#define ATA_DATA_SET_MANAGEMENT		0x06
#define 	ATA_DSM_TRIM		0x01
#define ATA_DEVICE_RESET                0x08    /* reset device */
#define ATA_READ                        0x20    /* read */
#define ATA_READ48                      0x24    /* read 48bit LBA */
#define ATA_READ_DMA48                  0x25    /* read DMA 48bit LBA */
#define ATA_READ_DMA_QUEUED48           0x26    /* read DMA QUEUED 48bit LBA */
#define ATA_READ_NATIVE_MAX_ADDRESS48   0x27    /* read native max addr 48bit */
#define ATA_READ_MUL48                  0x29    /* read multi 48bit LBA */
#define ATA_READ_STREAM_DMA48           0x2a    /* read DMA stream 48bit LBA */
#define ATA_READ_LOG_EXT                0x2f    /* read log ext - PIO Data-In */
#define ATA_READ_STREAM48               0x2b    /* read stream 48bit LBA */
#define ATA_WRITE                       0x30    /* write */
#define ATA_WRITE48                     0x34    /* write 48bit LBA */
#define ATA_WRITE_DMA48                 0x35    /* write DMA 48bit LBA */
#define ATA_WRITE_DMA_QUEUED48          0x36    /* write DMA QUEUED 48bit LBA*/
#define ATA_SET_MAX_ADDRESS48           0x37    /* set max address 48bit */
#define ATA_WRITE_MUL48                 0x39    /* write multi 48bit LBA */
#define ATA_WRITE_STREAM_DMA48          0x3a
#define ATA_WRITE_STREAM48              0x3b
#define ATA_WRITE_DMA_FUA48             0x3d
#define ATA_WRITE_DMA_QUEUED_FUA48      0x3e
#define ATA_WRITE_LOG_EXT               0x3f
#define ATA_READ_VERIFY                 0x40
#define ATA_READ_VERIFY48               0x42
#define ATA_READ_LOG_DMA_EXT            0x47    /* read log DMA ext - PIO Data-In */
#define ATA_READ_FPDMA_QUEUED           0x60    /* read DMA NCQ */
#define ATA_WRITE_FPDMA_QUEUED          0x61    /* write DMA NCQ */
#define ATA_NCQ_NON_DATA		0x63	/* NCQ non-data command */
#define ATA_SEND_FPDMA_QUEUED           0x64    /* send DMA NCQ */
#define		ATA_SFPDMA_DSM		0x00	/* Data set management */
#define			ATA_SFPDMA_DSM_TRIM	0x01	/* Set trim bit in auxilary */
#define		ATA_SFPDMA_HYBRID_EVICT	0x01	/* Hybrid Evict */
#define		ATA_SFPDMA_WLDMA	0x02	/* Write Log DMA EXT */
#define ATA_RECV_FPDMA_QUEUED           0x65    /* recieve DMA NCQ */
#define ATA_SEP_ATTN                    0x67    /* SEP request */
#define ATA_SEEK                        0x70    /* seek */
#define ATA_PACKET_CMD                  0xa0    /* packet command */
#define ATA_ATAPI_IDENTIFY              0xa1    /* get ATAPI params*/
#define ATA_SERVICE                     0xa2    /* service command */
#define ATA_SMART_CMD                   0xb0    /* SMART command */
#define ATA_CFA_ERASE                   0xc0    /* CFA erase */
#define ATA_READ_MUL                    0xc4    /* read multi */
#define ATA_WRITE_MUL                   0xc5    /* write multi */
#define ATA_SET_MULTI                   0xc6    /* set multi size */
#define ATA_READ_DMA_QUEUED             0xc7    /* read DMA QUEUED */
#define ATA_READ_DMA                    0xc8    /* read DMA */
#define ATA_WRITE_DMA                   0xca    /* write DMA */
#define ATA_WRITE_DMA_QUEUED            0xcc    /* write DMA QUEUED */
#define ATA_WRITE_MUL_FUA48             0xce
#define ATA_STANDBY_IMMEDIATE           0xe0    /* standby immediate */
#define ATA_IDLE_IMMEDIATE              0xe1    /* idle immediate */
#define ATA_STANDBY_CMD                 0xe2    /* standby */
#define ATA_IDLE_CMD                    0xe3    /* idle */
#define ATA_READ_BUFFER                 0xe4    /* read buffer */
#define ATA_READ_PM                     0xe4    /* read portmultiplier */
#define ATA_SLEEP                       0xe6    /* sleep */
#define ATA_FLUSHCACHE                  0xe7    /* flush cache to disk */
#define ATA_WRITE_PM                    0xe8    /* write portmultiplier */
#define ATA_FLUSHCACHE48                0xea    /* flush cache to disk */
#define ATA_ATA_IDENTIFY                0xec    /* get ATA params */
#define ATA_SETFEATURES                 0xef    /* features command */
#define         ATA_SF_SETXFER          0x03    /* set transfer mode */
#define         ATA_SF_ENAB_WCACHE      0x02    /* enable write cache */
#define         ATA_SF_DIS_WCACHE       0x82    /* disable write cache */
#define         ATA_SF_ENAB_PUIS        0x06    /* enable PUIS */
#define         ATA_SF_DIS_PUIS         0x86    /* disable PUIS */
#define         ATA_SF_PUIS_SPINUP      0x07    /* PUIS spin-up */
#define         ATA_SF_ENAB_RCACHE      0xaa    /* enable readahead cache */
#define         ATA_SF_DIS_RCACHE       0x55    /* disable readahead cache */
#define         ATA_SF_ENAB_RELIRQ      0x5d    /* enable release interrupt */
#define         ATA_SF_DIS_RELIRQ       0xdd    /* disable release interrupt */
#define         ATA_SF_ENAB_SRVIRQ      0x5e    /* enable service interrupt */
#define         ATA_SF_DIS_SRVIRQ       0xde    /* disable service interrupt */
#define ATA_SECURITY_SET_PASSWORD       0xf1    /* set drive password */
#define ATA_SECURITY_UNLOCK             0xf2    /* unlock drive using passwd */
#define ATA_SECURITY_ERASE_PREPARE      0xf3    /* prepare to erase drive */
#define ATA_SECURITY_ERASE_UNIT         0xf4    /* erase all blocks on drive */
#define ATA_SECURITY_FREEZE_LOCK        0xf5    /* freeze security config */
#define ATA_SECURITY_DISABLE_PASSWORD   0xf6    /* disable drive password */
#define ATA_READ_NATIVE_MAX_ADDRESS     0xf8    /* read native max address */
#define ATA_SET_MAX_ADDRESS             0xf9    /* set max address */


/* ATAPI commands */
#define ATAPI_TEST_UNIT_READY           0x00    /* check if device is ready */
#define ATAPI_REZERO                    0x01    /* rewind */
#define ATAPI_REQUEST_SENSE             0x03    /* get sense data */
#define ATAPI_FORMAT                    0x04    /* format unit */
#define ATAPI_READ                      0x08    /* read data */
#define ATAPI_WRITE                     0x0a    /* write data */
#define ATAPI_WEOF                      0x10    /* write filemark */
#define         ATAPI_WF_WRITE          0x01
#define ATAPI_SPACE                     0x11    /* space command */
#define         ATAPI_SP_FM             0x01
#define         ATAPI_SP_EOD            0x03
#define ATAPI_INQUIRY			0x12	/* get inquiry data */
#define ATAPI_MODE_SELECT               0x15    /* mode select */
#define ATAPI_ERASE                     0x19    /* erase */
#define ATAPI_MODE_SENSE                0x1a    /* mode sense */
#define ATAPI_START_STOP                0x1b    /* start/stop unit */
#define         ATAPI_SS_LOAD           0x01
#define         ATAPI_SS_RETENSION      0x02
#define         ATAPI_SS_EJECT          0x04
#define ATAPI_PREVENT_ALLOW             0x1e    /* media removal */
#define ATAPI_READ_FORMAT_CAPACITIES    0x23    /* get format capacities */
#define ATAPI_READ_CAPACITY             0x25    /* get volume capacity */
#define ATAPI_READ_BIG                  0x28    /* read data */
#define ATAPI_WRITE_BIG                 0x2a    /* write data */
#define ATAPI_LOCATE                    0x2b    /* locate to position */
#define ATAPI_READ_POSITION             0x34    /* read position */
#define ATAPI_SYNCHRONIZE_CACHE         0x35    /* flush buf, close channel */
#define ATAPI_WRITE_BUFFER              0x3b    /* write device buffer */
#define ATAPI_READ_BUFFER               0x3c    /* read device buffer */
#define ATAPI_READ_SUBCHANNEL           0x42    /* get subchannel info */
#define ATAPI_READ_TOC                  0x43    /* get table of contents */
#define ATAPI_PLAY_10                   0x45    /* play by lba */
#define ATAPI_PLAY_MSF                  0x47    /* play by MSF address */
#define ATAPI_PLAY_TRACK                0x48    /* play by track number */
#define ATAPI_PAUSE                     0x4b    /* pause audio operation */
#define ATAPI_READ_DISK_INFO            0x51    /* get disk info structure */
#define ATAPI_READ_TRACK_INFO           0x52    /* get track info structure */
#define ATAPI_RESERVE_TRACK             0x53    /* reserve track */
#define ATAPI_SEND_OPC_INFO             0x54    /* send OPC structurek */
#define ATAPI_MODE_SELECT_BIG           0x55    /* set device parameters */
#define ATAPI_REPAIR_TRACK              0x58    /* repair track */
#define ATAPI_READ_MASTER_CUE           0x59    /* read master CUE info */
#define ATAPI_MODE_SENSE_BIG            0x5a    /* get device parameters */
#define ATAPI_CLOSE_TRACK               0x5b    /* close track/session */
#define ATAPI_READ_BUFFER_CAPACITY      0x5c    /* get buffer capicity */
#define ATAPI_SEND_CUE_SHEET            0x5d    /* send CUE sheet */
#define ATAPI_SERVICE_ACTION_IN         0x96	/* get service data */
#define ATAPI_BLANK                     0xa1    /* blank the media */
#define ATAPI_SEND_KEY                  0xa3    /* send DVD key structure */
#define ATAPI_REPORT_KEY                0xa4    /* get DVD key structure */
#define ATAPI_PLAY_12                   0xa5    /* play by lba */
#define ATAPI_LOAD_UNLOAD               0xa6    /* changer control command */
#define ATAPI_READ_STRUCTURE            0xad    /* get DVD structure */
#define ATAPI_PLAY_CD                   0xb4    /* universal play command */
#define ATAPI_SET_SPEED                 0xbb    /* set drive speed */
#define ATAPI_MECH_STATUS               0xbd    /* get changer status */
#define ATAPI_READ_CD                   0xbe    /* read data */
#define ATAPI_POLL_DSC                  0xff    /* poll DSC status bit */


struct ata_ioc_devices {
    int                 channel;
    char                name[2][32];
    struct ata_params   params[2];
};

/* pr channel ATA ioctl calls */
#define IOCATAGMAXCHANNEL       _IOR('a',  1, int)
#define IOCATAREINIT            _IOW('a',  2, int)
#define IOCATAATTACH            _IOW('a',  3, int)
#define IOCATADETACH            _IOW('a',  4, int)
#define IOCATADEVICES           _IOWR('a',  5, struct ata_ioc_devices)

/* ATAPI request sense structure */
struct atapi_sense {
    u_int8_t	error;				/* current or deferred errors */
#define	ATA_SENSE_VALID			0x80

    u_int8_t	segment;			/* segment number */
    u_int8_t	key;				/* sense key */
#define ATA_SENSE_KEY_MASK		0x0f    /* sense key mask */
#define ATA_SENSE_NO_SENSE		0x00    /* no specific sense key info */
#define ATA_SENSE_RECOVERED_ERROR 	0x01    /* command OK, data recovered */
#define ATA_SENSE_NOT_READY		0x02    /* no access to drive */
#define ATA_SENSE_MEDIUM_ERROR		0x03    /* non-recovered data error */
#define ATA_SENSE_HARDWARE_ERROR	0x04    /* non-recoverable HW failure */
#define ATA_SENSE_ILLEGAL_REQUEST	0x05    /* invalid command param(s) */
#define ATA_SENSE_UNIT_ATTENTION	0x06    /* media changed */
#define ATA_SENSE_DATA_PROTECT		0x07    /* write protect */
#define ATA_SENSE_BLANK_CHECK		0x08    /* blank check */
#define ATA_SENSE_VENDOR_SPECIFIC	0x09    /* vendor specific skey */
#define ATA_SENSE_COPY_ABORTED		0x0a    /* copy aborted */
#define ATA_SENSE_ABORTED_COMMAND	0x0b    /* command aborted, try again */
#define ATA_SENSE_EQUAL			0x0c    /* equal */
#define ATA_SENSE_VOLUME_OVERFLOW	0x0d    /* volume overflow */
#define ATA_SENSE_MISCOMPARE		0x0e    /* data dont match the medium */
#define ATA_SENSE_RESERVED		0x0f
#define	ATA_SENSE_ILI			0x20;
#define	ATA_SENSE_EOM			0x40;
#define	ATA_SENSE_FILEMARK		0x80;

    u_int32_t   cmd_info;		/* cmd information */
    u_int8_t	sense_length;		/* additional sense len (n-7) */
    u_int32_t   cmd_specific_info;	/* additional cmd spec info */
    u_int8_t    asc;			/* additional sense code */
    u_int8_t    ascq;			/* additional sense code qual */
    u_int8_t    replaceable_unit_code;	/* replaceable unit code */
    u_int8_t	specific;		/* sense key specific */
#define	ATA_SENSE_SPEC_VALID	0x80
#define	ATA_SENSE_SPEC_MASK	0x7f
	
    u_int8_t	specific1;		/* sense key specific */
    u_int8_t	specific2;		/* sense key specific */
} __packed;

struct ata_ioc_request {
    union {
	struct {
	    u_int8_t            command;
	    u_int8_t            feature;
	    u_int64_t           lba;
	    u_int16_t           count;
	} ata;
	struct {
	    char                ccb[16];
	    struct atapi_sense	sense;
	} atapi;
    } u;
    caddr_t             data;
    int                 count;
    int                 flags;
#define ATA_CMD_CONTROL                 0x01
#define ATA_CMD_READ                    0x02
#define ATA_CMD_WRITE                   0x04
#define ATA_CMD_ATAPI                   0x08

    int                 timeout;
    int                 error;
};

struct ata_security_password {
	u_int16_t		ctrl;
#define ATA_SECURITY_PASSWORD_USER	0x0000
#define ATA_SECURITY_PASSWORD_MASTER	0x0001
#define ATA_SECURITY_ERASE_NORMAL	0x0000
#define ATA_SECURITY_ERASE_ENHANCED	0x0002
#define ATA_SECURITY_LEVEL_HIGH		0x0000
#define ATA_SECURITY_LEVEL_MAXIMUM	0x0100

	u_int8_t		password[32];
	u_int16_t		revision;
	u_int16_t		reserved[238];
};

/* pr device ATA ioctl calls */
#define IOCATAREQUEST           _IOWR('a', 100, struct ata_ioc_request)
#define IOCATAGPARM             _IOR('a', 101, struct ata_params)
#define IOCATAGMODE             _IOR('a', 102, int)
#define IOCATASMODE             _IOW('a', 103, int)

#define IOCATAGSPINDOWN		_IOR('a', 104, int)
#define IOCATASSPINDOWN		_IOW('a', 105, int)


struct ata_ioc_raid_config {
	    int                 lun;
	    int                 type;
#define AR_JBOD                         0x0001
#define AR_SPAN                         0x0002
#define AR_RAID0                        0x0004
#define AR_RAID1                        0x0008
#define AR_RAID01                       0x0010
#define AR_RAID3                        0x0020
#define AR_RAID4                        0x0040
#define AR_RAID5                        0x0080

	    int                 interleave;
	    int                 status;
#define AR_READY                        1
#define AR_DEGRADED                     2
#define AR_REBUILDING                   4

	    int                 progress;
	    int                 total_disks;
	    int                 disks[16];
};

struct ata_ioc_raid_status {
	    int                 lun;
	    int                 type;
	    int                 interleave;
	    int                 status;
	    int                 progress;
	    int                 total_disks;
	    struct {
		    int		state;
#define AR_DISK_ONLINE			0x01
#define AR_DISK_PRESENT			0x02
#define AR_DISK_SPARE			0x04
		    int		lun;
	    } disks[16];
};

/* ATA RAID ioctl calls */
#define IOCATARAIDCREATE        _IOWR('a', 200, struct ata_ioc_raid_config)
#define IOCATARAIDDELETE        _IOW('a', 201, int)
#define IOCATARAIDSTATUS        _IOWR('a', 202, struct ata_ioc_raid_status)
#define IOCATARAIDADDSPARE      _IOW('a', 203, struct ata_ioc_raid_config)
#define IOCATARAIDREBUILD       _IOW('a', 204, int)

#pragma clang diagnostic pop


================================================
FILE: include/xhyve/support/atomic.h
================================================
/*-
 * Copyright (c) 1998 Doug Rabson
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <stdint.h>
#include <xhyve/support/misc.h>

#define	__compiler_membar()	__asm __volatile(" " : : : "memory")

#define	mb()	__asm __volatile("mfence;" : : : "memory")
#define	wmb()	__asm __volatile("sfence;" : : : "memory")
#define	rmb()	__asm __volatile("lfence;" : : : "memory")

/*
 * Various simple operations on memory, each of which is atomic in the
 * presence of interrupts and multiple processors.
 *
 * atomic_set_char(P, V)	(*(u_char *)(P) |= (V))
 * atomic_clear_char(P, V)	(*(u_char *)(P) &= ~(V))
 * atomic_add_char(P, V)	(*(u_char *)(P) += (V))
 * atomic_subtract_char(P, V)	(*(u_char *)(P) -= (V))
 *
 * atomic_set_short(P, V)	(*(u_short *)(P) |= (V))
 * atomic_clear_short(P, V)	(*(u_short *)(P) &= ~(V))
 * atomic_add_short(P, V)	(*(u_short *)(P) += (V))
 * atomic_subtract_short(P, V)	(*(u_short *)(P) -= (V))
 *
 * atomic_set_int(P, V)		(*(u_int *)(P) |= (V))
 * atomic_clear_int(P, V)	(*(u_int *)(P) &= ~(V))
 * atomic_add_int(P, V)		(*(u_int *)(P) += (V))
 * atomic_subtract_int(P, V)	(*(u_int *)(P) -= (V))
 * atomic_swap_int(P, V)	(return (*(u_int *)(P)); *(u_int *)(P) = (V);)
 * atomic_readandclear_int(P)	(return (*(u_int *)(P)); *(u_int *)(P) = 0;)
 *
 * atomic_set_long(P, V)	(*(u_long *)(P) |= (V))
 * atomic_clear_long(P, V)	(*(u_long *)(P) &= ~(V))
 * atomic_add_long(P, V)	(*(u_long *)(P) += (V))
 * atomic_subtract_long(P, V)	(*(u_long *)(P) -= (V))
 * atomic_swap_long(P, V)	(return (*(u_long *)(P)); *(u_long *)(P) = (V);)
 * atomic_readandclear_long(P)	(return (*(u_long *)(P)); *(u_long *)(P) = 0;)
 */

#define	MPLOCKED	"lock ; "

/*
 * The assembly is volatilized to avoid code chunk removal by the compiler.
 * GCC aggressively reorders operations and memory clobbering is necessary
 * in order to avoid that for memory barriers.
 */
#define	ATOMIC_ASM(NAME, TYPE, OP, CONS, V)		\
static __inline void					\
atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
{							\
	__asm __volatile(MPLOCKED OP			\
	: "+m" (*p)					\
	: CONS (V)					\
	: "cc");					\
}							\
							\
static __inline void					\
atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
{							\
	__asm __volatile(MPLOCKED OP			\
	: "+m" (*p)					\
	: CONS (V)					\
	: "memory", "cc");				\
}							\
struct __hack

/*
 * Atomic compare and set, used by the mutex functions
 *
 * if (*dst == expect) *dst = src (all 32 bit words)
 *
 * Returns 0 on failure, non-zero on success
 */

static __inline int
atomic_cmpset_int(volatile u_int *dst, u_int expect, u_int src)
{
	u_char res;

	__asm __volatile(
	"	" MPLOCKED "		"
	"	cmpxchgl %3,%1 ;	"
	"       sete	%0 ;		"
	"# atomic_cmpset_int"
	: "=q" (res),			/* 0 */
	  "+m" (*dst),			/* 1 */
	  "+a" (expect)			/* 2 */
	: "r" (src)			/* 3 */
	: "memory", "cc");
	return (res);
}

static __inline int
atomic_cmpset_long(volatile u_long *dst, u_long expect, u_long src)
{
	u_char res;

	__asm __volatile(
	"	" MPLOCKED "		"
	"	cmpxchgq %3,%1 ;	"
	"       sete	%0 ;		"
	"# atomic_cmpset_long"
	: "=q" (res),			/* 0 */
	  "+m" (*dst),			/* 1 */
	  "+a" (expect)			/* 2 */
	: "r" (src)			/* 3 */
	: "memory", "cc");
	return (res);
}

/*
 * Atomically add the value of v to the integer pointed to by p and return
 * the previous value of *p.
 */
static __inline u_int
atomic_fetchadd_int(volatile u_int *p, u_int v)
{

	__asm __volatile(
	"	" MPLOCKED "		"
	"	xaddl	%0,%1 ;		"
	"# atomic_fetchadd_int"
	: "+r" (v),			/* 0 */
	  "+m" (*p)			/* 1 */
	: : "cc");
	return (v);
}

/*
 * Atomically add the value of v to the long integer pointed to by p and return
 * the previous value of *p.
 */
static __inline u_long
atomic_fetchadd_long(volatile u_long *p, u_long v)
{

	__asm __volatile(
	"	" MPLOCKED "		"
	"	xaddq	%0,%1 ;		"
	"# atomic_fetchadd_long"
	: "+r" (v),			/* 0 */
	  "+m" (*p)			/* 1 */
	: : "cc");
	return (v);
}

static __inline int
atomic_testandset_int(volatile u_int *p, u_int v)
{
	u_char res;

	__asm __volatile(
	"	" MPLOCKED "		"
	"	btsl	%2,%1 ;		"
	"	setc	%0 ;		"
	"# atomic_testandset_int"
	: "=q" (res),			/* 0 */
	  "+m" (*p)			/* 1 */
	: "Ir" (v & 0x1f)		/* 2 */
	: "cc");
	return (res);
}

static __inline int
atomic_testandset_long(volatile u_long *p, u_int v)
{
	u_char res;

	__asm __volatile(
	"	" MPLOCKED "		"
	"	btsq	%2,%1 ;		"
	"	setc	%0 ;		"
	"# atomic_testandset_long"
	: "=q" (res),			/* 0 */
	  "+m" (*p)			/* 1 */
	: "Jr" ((u_long)(v & 0x3f))	/* 2 */
	: "cc");
	return (res);
}

/*
 * We assume that a = b will do atomic loads and stores.  Due to the
 * IA32 memory model, a simple store guarantees release semantics.
 *
 * However, loads may pass stores, so for atomic_load_acq we have to
 * ensure a Store/Load barrier to do the load in SMP kernels.  We use
 * "lock cmpxchg" as recommended by the AMD Software Optimization
 * Guide, and not mfence.  For UP kernels, however, the cache of the
 * single processor is always consistent, so we only need to take care
 * of the compiler.
 */
#define	ATOMIC_STORE(TYPE)				\
static __inline void					\
atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
{							\
	__compiler_membar();				\
	*p = v;						\
}							\
struct __hack

#define	ATOMIC_LOAD(TYPE, LOP)				\
static __inline u_##TYPE				\
atomic_load_acq_##TYPE(volatile u_##TYPE *p)		\
{							\
	u_##TYPE res;					\
							\
	__asm __volatile(MPLOCKED LOP			\
	: "=a" (res),			/* 0 */		\
	  "+m" (*p)			/* 1 */		\
	: : "memory", "cc");				\
	return (res);					\
}							\
struct __hack

ATOMIC_ASM(set,	     char,  "orb %b1,%0",  "iq",  v);
ATOMIC_ASM(clear,    char,  "andb %b1,%0", "iq", ~v);
ATOMIC_ASM(add,	     char,  "addb %b1,%0", "iq",  v);
ATOMIC_ASM(subtract, char,  "subb %b1,%0", "iq",  v);

ATOMIC_ASM(set,	     short, "orw %w1,%0",  "ir",  v);
ATOMIC_ASM(clear,    short, "andw %w1,%0", "ir", ~v);
ATOMIC_ASM(add,	     short, "addw %w1,%0", "ir",  v);
ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir",  v);

ATOMIC_ASM(set,	     int,   "orl %1,%0",   "ir",  v);
ATOMIC_ASM(clear,    int,   "andl %1,%0",  "ir", ~v);
ATOMIC_ASM(add,	     int,   "addl %1,%0",  "ir",  v);
ATOMIC_ASM(subtract, int,   "subl %1,%0",  "ir",  v);

ATOMIC_ASM(set,	     long,  "orq %1,%0",   "ir",  v);
ATOMIC_ASM(clear,    long,  "andq %1,%0",  "ir", ~v);
ATOMIC_ASM(add,	     long,  "addq %1,%0",  "ir",  v);
ATOMIC_ASM(subtract, long,  "subq %1,%0",  "ir",  v);

ATOMIC_LOAD(char,  "cmpxchgb %b0,%1");
ATOMIC_LOAD(short, "cmpxchgw %w0,%1");
ATOMIC_LOAD(int,   "cmpxchgl %0,%1");
ATOMIC_LOAD(long,  "cmpxchgq %0,%1");

ATOMIC_STORE(char);
ATOMIC_STORE(short);
ATOMIC_STORE(int);
ATOMIC_STORE(long);

#undef ATOMIC_ASM
#undef ATOMIC_LOAD
#undef ATOMIC_STORE

/* Read the current value and store a new value in the destination. */

static __inline u_int
atomic_swap_int(volatile u_int *p, u_int v)
{

	__asm __volatile(
	"	xchgl	%1,%0 ;		"
	"# atomic_swap_int"
	: "+r" (v),			/* 0 */
	  "+m" (*p));			/* 1 */
	return (v);
}

static __inline u_long
atomic_swap_long(volatile u_long *p, u_long v)
{

	__asm __volatile(
	"	xchgq	%1,%0 ;		"
	"# atomic_swap_long"
	: "+r" (v),			/* 0 */
	  "+m" (*p));			/* 1 */
	return (v);
}

#define	atomic_set_acq_char		atomic_set_barr_char
#define	atomic_set_rel_char		atomic_set_barr_char
#define	atomic_clear_acq_char		atomic_clear_barr_char
#define	atomic_clear_rel_char		atomic_clear_barr_char
#define	atomic_add_acq_char		atomic_add_barr_char
#define	atomic_add_rel_char		atomic_add_barr_char
#define	atomic_subtract_acq_char	atomic_subtract_barr_char
#define	atomic_subtract_rel_char	atomic_subtract_barr_char

#define	atomic_set_acq_short		atomic_set_barr_short
#define	atomic_set_rel_short		atomic_set_barr_short
#define	atomic_clear_acq_short		atomic_clear_barr_short
#define	atomic_clear_rel_short		atomic_clear_barr_short
#define	atomic_add_acq_short		atomic_add_barr_short
#define	atomic_add_rel_short		atomic_add_barr_short
#define	atomic_subtract_acq_short	atomic_subtract_barr_short
#define	atomic_subtract_rel_short	atomic_subtract_barr_short

#define	atomic_set_acq_int		atomic_set_barr_int
#define	atomic_set_rel_int		atomic_set_barr_int
#define	atomic_clear_acq_int		atomic_clear_barr_int
#define	atomic_clear_rel_int		atomic_clear_barr_int
#define	atomic_add_acq_int		atomic_add_barr_int
#define	atomic_add_rel_int		atomic_add_barr_int
#define	atomic_subtract_acq_int		atomic_subtract_barr_int
#define	atomic_subtract_rel_int		atomic_subtract_barr_int
#define	atomic_cmpset_acq_int		atomic_cmpset_int
#define	atomic_cmpset_rel_int		atomic_cmpset_int

#define	atomic_set_acq_long		atomic_set_barr_long
#define	atomic_set_rel_long		atomic_set_barr_long
#define	atomic_clear_acq_long		atomic_clear_barr_long
#define	atomic_clear_rel_long		atomic_clear_barr_long
#define	atomic_add_acq_long		atomic_add_barr_long
#define	atomic_add_rel_long		atomic_add_barr_long
#define	atomic_subtract_acq_long	atomic_subtract_barr_long
#define	atomic_subtract_rel_long	atomic_subtract_barr_long
#define	atomic_cmpset_acq_long		atomic_cmpset_long
#define	atomic_cmpset_rel_long		atomic_cmpset_long

#define	atomic_readandclear_int(p)	atomic_swap_int(p, 0)
#define	atomic_readandclear_long(p)	atomic_swap_long(p, 0)

/* Operations on 8-bit bytes. */
#define	atomic_set_8		atomic_set_char
#define	atomic_set_acq_8	atomic_set_acq_char
#define	atomic_set_rel_8	atomic_set_rel_char
#define	atomic_clear_8		atomic_clear_char
#define	atomic_clear_acq_8	atomic_clear_acq_char
#define	atomic_clear_rel_8	atomic_clear_rel_char
#define	atomic_add_8		atomic_add_char
#define	atomic_add_acq_8	atomic_add_acq_char
#define	atomic_add_rel_8	atomic_add_rel_char
#define	atomic_subtract_8	atomic_subtract_char
#define	atomic_subtract_acq_8	atomic_subtract_acq_char
#define	atomic_subtract_rel_8	atomic_subtract_rel_char
#define	atomic_load_acq_8	atomic_load_acq_char
#define	atomic_store_rel_8	atomic_store_rel_char

/* Operations on 16-bit words. */
#define	atomic_set_16		atomic_set_short
#define	atomic_set_acq_16	atomic_set_acq_short
#define	atomic_set_rel_16	atomic_set_rel_short
#define	atomic_clear_16		atomic_clear_short
#define	atomic_clear_acq_16	atomic_clear_acq_short
#define	atomic_clear_rel_16	atomic_clear_rel_short
#define	atomic_add_16		atomic_add_short
#define	atomic_add_acq_16	atomic_add_acq_short
#define	atomic_add_rel_16	atomic_add_rel_short
#define	atomic_subtract_16	atomic_subtract_short
#define	atomic_subtract_acq_16	atomic_subtract_acq_short
#define	atomic_subtract_rel_16	atomic_subtract_rel_short
#define	atomic_load_acq_16	atomic_load_acq_short
#define	atomic_store_rel_16	atomic_store_rel_short

/* Operations on 32-bit double words. */
#define	atomic_set_32		atomic_set_int
#define	atomic_set_acq_32	atomic_set_acq_int
#define	atomic_set_rel_32	atomic_set_rel_int
#define	atomic_clear_32		atomic_clear_int
#define	atomic_clear_acq_32	atomic_clear_acq_int
#define	atomic_clear_rel_32	atomic_clear_rel_int
#define	atomic_add_32		atomic_add_int
#define	atomic_add_acq_32	atomic_add_acq_int
#define	atomic_add_rel_32	atomic_add_rel_int
#define	atomic_subtract_32	atomic_subtract_int
#define	atomic_subtract_acq_32	atomic_subtract_acq_int
#define	atomic_subtract_rel_32	atomic_subtract_rel_int
#define	atomic_load_acq_32	atomic_load_acq_int
#define	atomic_store_rel_32	atomic_store_rel_int
#define	atomic_cmpset_32	atomic_cmpset_int
#define	atomic_cmpset_acq_32	atomic_cmpset_acq_int
#define	atomic_cmpset_rel_32	atomic_cmpset_rel_int
#define	atomic_swap_32		atomic_swap_int
#define	atomic_readandclear_32	atomic_readandclear_int
#define	atomic_fetchadd_32	atomic_fetchadd_int
#define	atomic_testandset_32	atomic_testandset_int

/* Operations on 64-bit quad words. */
#define	atomic_set_64		atomic_set_long
#define	atomic_set_acq_64	atomic_set_acq_long
#define	atomic_set_rel_64	atomic_set_rel_long
#define	atomic_clear_64		atomic_clear_long
#define	atomic_clear_acq_64	atomic_clear_acq_long
#define	atomic_clear_rel_64	atomic_clear_rel_long
#define	atomic_add_64		atomic_add_long
#define	atomic_add_acq_64	atomic_add_acq_long
#define	atomic_add_rel_64	atomic_add_rel_long
#define	atomic_subtract_64	atomic_subtract_long
#define	atomic_subtract_acq_64	atomic_subtract_acq_long
#define	atomic_subtract_rel_64	atomic_subtract_rel_long
#define	atomic_load_acq_64	atomic_load_acq_long
#define	atomic_store_rel_64	atomic_store_rel_long
#define	atomic_cmpset_64	atomic_cmpset_long
#define	atomic_cmpset_acq_64	atomic_cmpset_acq_long
#define	atomic_cmpset_rel_64	atomic_cmpset_rel_long
#define	atomic_swap_64		atomic_swap_long
#define	atomic_readandclear_64	atomic_readandclear_long
#define	atomic_testandset_64	atomic_testandset_long

/* Operations on pointers. */
#define	atomic_set_ptr		atomic_set_long
#define	atomic_set_acq_ptr	atomic_set_acq_long
#define	atomic_set_rel_ptr	atomic_set_rel_long
#define	atomic_clear_ptr	atomic_clear_long
#define	atomic_clear_acq_ptr	atomic_clear_acq_long
#define	atomic_clear_rel_ptr	atomic_clear_rel_long
#define	atomic_add_ptr		atomic_add_long
#define	atomic_add_acq_ptr	atomic_add_acq_long
#define	atomic_add_rel_ptr	atomic_add_rel_long
#define	atomic_subtract_ptr	atomic_subtract_long
#define	atomic_subtract_acq_ptr	atomic_subtract_acq_long
#define	atomic_subtract_rel_ptr	atomic_subtract_rel_long
#define	atomic_load_acq_ptr	atomic_load_acq_long
#define	atomic_store_rel_ptr	atomic_store_rel_long
#define	atomic_cmpset_ptr	atomic_cmpset_long
#define	atomic_cmpset_acq_ptr	atomic_cmpset_acq_long
#define	atomic_cmpset_rel_ptr	atomic_cmpset_rel_long
#define	atomic_swap_ptr		atomic_swap_long
#define	atomic_readandclear_ptr	atomic_readandclear_long


================================================
FILE: include/xhyve/support/bitset.h
================================================
/*-
 * Copyright (c) 2008, Jeffrey Roberson <jeff@freebsd.org>
 * All rights reserved.
 *
 * Copyright (c) 2008 Nokia Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice unmodified, this list of conditions, and the following
 *    disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <strings.h>
#include <sys/types.h>

/*
 * Macros addressing word and bit within it, tuned to make compiler
 * optimize cases when SETSIZE fits into single machine word.
 */
#define	_BITSET_BITS		(sizeof(long) * NBBY)

#define	__bitset_words(_s)	(howmany(_s, _BITSET_BITS))

#define	__bitset_mask(_s, n)						\
	(1L << ((__bitset_words((_s)) == 1) ?				\
	    (size_t)(n) : ((n) % _BITSET_BITS)))

#define	__bitset_word(_s, n)						\
	((__bitset_words((_s)) == 1) ? 0 : ((n) / _BITSET_BITS))

#define	BITSET_DEFINE(t, _s)						\
struct t {								\
        long    __bits[__bitset_words((_s))];				\
}

#define	BITSET_T_INITIALIZER(x)						\
	{ .__bits = { x } }

#define	BITSET_FSET(n)							\
	[ 0 ... ((n) - 1) ] = (-1L)

#define	BIT_CLR(_s, n, p)						\
	((p)->__bits[__bitset_word(_s, n)] &= ~__bitset_mask((_s), (n)))

#define	BIT_COPY(_s, f, t)	(void)(*(t) = *(f))

#define	BIT_ISSET(_s, n, p)						\
	((((p)->__bits[__bitset_word(_s, n)] & __bitset_mask((_s), (n))) != 0))

#define	BIT_SET(_s, n, p)						\
	((p)->__bits[__bitset_word(_s, n)] |= __bitset_mask((_s), (n)))

#define	BIT_ZERO(_s, p) do {						\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		(p)->__bits[__i] = 0L;					\
} while (0)

#define	BIT_FILL(_s, p) do {						\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		(p)->__bits[__i] = -1L;					\
} while (0)

#define	BIT_SETOF(_s, n, p) do {					\
	BIT_ZERO(_s, p);						\
	(p)->__bits[__bitset_word(_s, n)] = __bitset_mask((_s), (n));	\
} while (0)

/* Is p empty. */
#define	BIT_EMPTY(_s, p) __extension__ ({				\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		if ((p)->__bits[__i])					\
			break;						\
	__i == __bitset_words((_s));					\
})

/* Is p full set. */
#define	BIT_ISFULLSET(_s, p) __extension__ ({				\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		if ((p)->__bits[__i] != (long)-1)			\
			break;						\
	__i == __bitset_words((_s));					\
})

/* Is c a subset of p. */
#define	BIT_SUBSET(_s, p, c) __extension__ ({				\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		if (((c)->__bits[__i] &					\
		    (p)->__bits[__i]) !=				\
		    (c)->__bits[__i])					\
			break;						\
	__i == __bitset_words((_s));					\
})

/* Are there any common bits between b & c? */
#define	BIT_OVERLAP(_s, p, c) __extension__ ({				\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		if (((c)->__bits[__i] &					\
		    (p)->__bits[__i]) != 0)				\
			break;						\
	__i != __bitset_words((_s));					\
})

/* Compare two sets, returns 0 if equal 1 otherwise. */
#define	BIT_CMP(_s, p, c) __extension__ ({				\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		if (((c)->__bits[__i] !=				\
		    (p)->__bits[__i]))					\
			break;						\
	__i != __bitset_words((_s));					\
})

#define	BIT_OR(_s, d, s) do {						\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		(d)->__bits[__i] |= (s)->__bits[__i];			\
} while (0)

#define	BIT_AND(_s, d, s) do {						\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		(d)->__bits[__i] &= (s)->__bits[__i];			\
} while (0)

#define	BIT_NAND(_s, d, s) do {						\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		(d)->__bits[__i] &= ~(s)->__bits[__i];			\
} while (0)

#define	BIT_CLR_ATOMIC(_s, n, p) \
	atomic_clear_long(((volatile u_long *) \
		&(p)->__bits[__bitset_word(_s, n)]), __bitset_mask((_s), n))

#define	BIT_SET_ATOMIC(_s, n, p) \
	atomic_set_long(((volatile u_long *) &(p)->__bits[__bitset_word(_s, n)]), \
	    __bitset_mask((_s), n))

#define	BIT_SET_ATOMIC_ACQ(_s, n, p)					\
	atomic_set_acq_long(&(p)->__bits[__bitset_word(_s, n)],		\
	    __bitset_mask((_s), n))

/* Convenience functions catering special cases. */
#define	BIT_AND_ATOMIC(_s, d, s) do {					\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		atomic_clear_long(&(d)->__bits[__i],			\
		    ~(s)->__bits[__i]);					\
} while (0)

#define	BIT_OR_ATOMIC(_s, d, s) do {					\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		atomic_set_long(&(d)->__bits[__i],			\
		    (s)->__bits[__i]);					\
} while (0)

#define	BIT_COPY_STORE_REL(_s, f, t) do {				\
	size_t __i;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		atomic_store_rel_long(&(t)->__bits[__i],		\
		    (f)->__bits[__i]);					\
} while (0)

#define	BIT_FFS(_s, p) __extension__ ({					\
	size_t __i;							\
	int __bit;							\
									\
	__bit = 0;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++) {		\
		if ((p)->__bits[__i] != 0) {				\
			__bit = ffsl((p)->__bits[__i]);			\
			__bit += __i * _BITSET_BITS;			\
			break;						\
		}							\
	}								\
	__bit;								\
})

#define	BIT_COUNT(_s, p) __extension__ ({				\
	size_t __i;							\
	int __count;							\
									\
	__count = 0;							\
	for (__i = 0; __i < __bitset_words((_s)); __i++)		\
		__count += __bitcountl((p)->__bits[__i]);		\
	__count;							\
})


================================================
FILE: include/xhyve/support/cpuset.h
================================================
/*-
 * Copyright (c) 2008,	Jeffrey Roberson <jeff@freebsd.org>
 * All rights reserved.
 *
 * Copyright (c) 2008 Nokia Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice unmodified, this list of conditions, and the following
 *    disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#pragma once

#include <xhyve/support/bitset.h>

#define	CPU_MAXSIZE	32

#ifndef	CPU_SETSIZE
#define	CPU_SETSIZE	CPU_MAXSIZE
#endif

// #define	_NCPUBITS	_BITSET_BITS
// #define	_NCPUWORDS	__bitset_words(CPU_SETSIZE)

BITSET_DEFINE(_cpuset, CPU_SETSIZE);
typedef struct _cpuset cpuset_t;

// #define	CPUSET_FSET		BITSET_FSET(_NCPUWORDS)
// #define	CPUSET_T_INITIALIZER	BITSET_T_INITIALIZER

// #define	CPUSETBUFSIZ	((2 + sizeof(long) * 2) * _NCPUWORDS)

#define	CPU_CLR(n, p)			BIT_CLR(CPU_SETSIZE, n, p)
// #define	CPU_COPY(f, t)			BIT_COPY(CPU_SETSIZE, f, t)
#define	CPU_ISSET(n, p)			BIT_ISSET(CPU_SETSIZE, n, p)
#define	CPU_SET(n, p)			BIT_SET(CPU_SETSIZE, n, p)
#define	CPU_ZERO(p) 			BIT_ZERO(CPU_SETSIZE, p)
// #define	CPU_FILL(p) 			BIT_FILL(CPU_SETSIZE, p)
#define	CPU_SETOF(n, p)			BIT_SETOF(CPU_SETSIZE, n, p)
#define	CPU_EMPTY(p)			BIT_EMPTY(CPU_SETSIZE, p)
// #define	CPU_ISFULLSET(p)		BIT_ISFULLSET(CPU_SETSIZE, p)
// #define	CPU_SUBSET(p, c)		BIT_SUBSET(CPU_SETSIZE, p, c)
// #define	CPU_OVERLAP(p, c)		BIT_OVERLAP(CPU_SETSIZE, p, c)
#define	CPU_CMP(p, c)			BIT_CMP(CPU_SETSIZE, p, c)
// #define	CPU_OR(d, s)			BIT_OR(CPU_SETSIZE, d, s)
#define	CPU_AND(d, s)			BIT_AND(CPU_SETSIZE, d, s)
// #define	CPU_NAND(d, s)			BIT_NAND(CPU_SETSIZE, d, s)
#define	CPU_CLR_ATOMIC(n, p)		BIT_CLR_ATOMIC(CPU_SETSIZE, n, p)
#define	CPU_SET_ATOMIC(n, p)		BIT_SET_ATOMIC(CPU_SETSIZE, n, p)
// #define	CPU_SET_ATOMIC_ACQ(n, p)	BIT_SET_ATOMIC_ACQ(CPU_SETSIZE, n, p)
// #define	CPU_AND_ATOMIC(n, p)		BIT_AND_ATOMIC(CPU_SETSIZE, n, p)
// #define	CPU_OR_ATOMIC(d, s)		BIT_OR_ATOMIC(CPU_SETSIZE, d, s)
// #define	CPU_COPY_STORE_REL(f, t)	BIT_COPY_STORE_REL(CPU_SETSIZE, f, t)
#define	CPU_FFS(p)			BIT_FFS(CPU_SETSIZE, p)
// #define	CPU_COUNT(p)			BIT_COUNT(CPU_SETSIZE, p)

// /*
//  * Valid cpulevel_t values.
//  */
// #define	CPU_LEVEL_ROOT		1	/* All system cpus. */
// #define	CPU_LEVEL_CPUSET	2	/* Available cpus for which. */
// #define	CPU_LEVEL_WHICH		3	/* Actual mask/id for which. */

// /*
//  * Valid cpuwhich_t values.
//  */
// #define	CPU_WHICH_TID		1	/* Specifies a thread id. */
// #define	CPU_WHICH_PID		2	/* Specifies a process id. */
// #define	CPU_WHICH_CPUSET	3	/* Specifies a set id. */
// #define	CPU_WHICH_IRQ		4	/* Specifies an irq #. */
// #define	CPU_WHICH_JAIL		5	/* Specifies a jail id. */
// #define	CPU_WHICH_DOMAIN	6	/* Specifies a NUMA domain id. */

// /*
//  * Reserved cpuset identifiers.
//  */
// #define	CPUSET_INVALID	-1
// #define	CPUSET_DEFAULT	0

// #ifdef _KERNEL
// LIST_HEAD(setlist, cpuset);

// /*
//  * cpusets encapsulate cpu binding information for one or more threads.
//  *
//  * 	a - Accessed with atomics.
//  *	s - Set at creation, never modified.  Only a ref required to read.
//  *	c - Locked internally by a cpuset lock.
//  *
//  * The bitmask is only modified while holding the cpuset lock.  It may be
//  * read while only a reference is held but the consumer must be prepared
//  * to deal with inconsistent results.
//  */
// struct cpuset {
// 	cpuset_t		cs_mask;	/* bitmask of valid cpus. */
// 	volatile u_int		cs_ref;		/* (a) Reference count. */
// 	int			cs_flags;	/* (s) Flags from below. */
// 	cpusetid_t		cs_id;		/* (s) Id or INVALID. */
// 	struct cpuset		*cs_parent;	/* (s) Pointer to our parent. */
// 	LIST_ENTRY(cpuset)	cs_link;	/* (c) All identified sets. */
// 	LIST_ENTRY(cpuset)	cs_siblings;	/* (c) Sibling set link. */
// 	struct setlist		cs_children;	/* (c) List of children. */
// };

// #define CPU_SET_ROOT    0x0001  /* Set is a root set. */
// #define CPU_SET_RDONLY  0x0002  /* No modification allowed. */

// extern cpuset_t *cpuset_root;
// struct prison;
// struct proc;

// struct cpuset *cpuset_thread0(void);
// struct cpuset *cpuset_ref(struct cpuset *);
// void	cpuset_rel(struct cpuset *);
// int	cpuset_setthread(lwpid_t id, cpuset_t *);
// int	cpuset_setithread(lwpid_t id, int cpu);
// int	cpuset_create_root(struct prison *, struct cpuset **);
// int	cpuset_setproc_update_set(struct proc *, struct cpuset *);
// char	*cpusetobj_strprint(char *, const cpuset_t *);
// int	cpusetobj_strscan(cpuset_t *, const char *);

// #else
// __BEGIN_DECLS
// int	cpuset(cpusetid_t *);
// int	cpuset_setid(cpuwhich_t, id_t, cpusetid_t);
// int	cpuset_getid(cpulevel_t, cpuwhich_t, id_t, cpusetid_t *);
// int	cpuset_getaffinity(cpulevel_t, cpuwhich_t, id_t, size_t, cpuset_t *);
// int	cpuset_setaffinity(cpulevel_t, cpuwhich_t, id_t, size_t, const cpuset_t *);
// __END_DECLS
// #endif


================================================
FILE: include/xhyve/support/e1000_defines.h
================================================
/******************************************************************************
  SPDX-License-Identifier: BSD-3-Clause

  Copyright (c) 2001-2015, Intel Corporation
  All rights reserved.

  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:

   1. Redistributions of source code must retain the above copyright notice,
      this list of conditions and the following disclaimer.

   2. Redistributions in binary form must reproduce the above copyright
      notice, this list of conditions and the following disclaimer in the
      documentation and/or other materials provided with the distribution.

   3. Neither the name of the Intel Corporation nor the names of its
      contributors may be used to endorse or promote products derived from
      this software without specific prior written permission.

  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  POSSIBILITY OF SUCH DAMAGE.

******************************************************************************/
/*$FreeBSD$*/

#ifndef _E1000_DEFINES_H_
#define _E1000_DEFINES_H_

/* Number of Transmit and Receive Descriptors must be a multiple of 8 */
#define REQ_TX_DESCRIPTOR_MULTIPLE  8
#define REQ_RX_DESCRIPTOR_MULTIPLE  8

/* Definitions for power management and wakeup registers */
/* Wake Up Control */
#define E1000_WUC_APME		0x00000001 /* APM Enable */
#define E1000_WUC_PME_EN	0x00000002 /* PME Enable */
#define E1000_WUC_PME_STATUS	0x00000004 /* PME Status */
#define E1000_WUC_APMPME	0x00000008 /* Assert PME on APM Wakeup */
#define E1000_WUC_PHY_WAKE	0x00000100 /* if PHY supports wakeup */

/* Wake Up Filter Control */
#define E1000_WUFC_LNKC	0x00000001 /* Link Status Change Wakeup Enable */
#define E1000_WUFC_MAG	0x00000002 /* Magic Packet Wakeup Enable */
#define E1000_WUFC_EX	0x00000004 /* Directed Exact Wakeup Enable */
#define E1000_WUFC_MC	0x00000008 /* Directed Multicast Wakeup Enable */
#define E1000_WUFC_BC	0x00000010 /* Broadcast Wakeup Enable */
#define E1000_WUFC_ARP	0x00000020 /* ARP Request Packet Wakeup Enable */
#define E1000_WUFC_IPV4	0x00000040 /* Directed IPv4 Packet Wakeup Enable */
#define E1000_WUFC_FLX0		0x00010000 /* Flexible Filter 0 Enable */

/* Wake Up Status */
#define E1000_WUS_LNKC		E1000_WUFC_LNKC
#define E1000_WUS_MAG		E1000_WUFC_MAG
#define E1000_WUS_EX		E1000_WUFC_EX
#define E1000_WUS_MC		E1000_WUFC_MC
#define E1000_WUS_BC		E1000_WUFC_BC

/* Extended Device Control */
#define E1000_CTRL_EXT_LPCD		0x00000004 /* LCD Power Cycle Done */
#define E1000_CTRL_EXT_SDP4_DATA	0x00000010 /* SW Definable Pin 4 data */
#define E1000_CTRL_EXT_SDP6_DATA	0x00000040 /* SW Definable Pin 6 data */
#define E1000_CTRL_EXT_SDP3_DATA	0x00000080 /* SW Definable Pin 3 data */
/* SDP 4/5 (bits 8,9) are reserved in >= 82575 */
#define E1000_CTRL_EXT_SDP4_DIR	0x00000100 /* Direction of SDP4 0=in 1=out */
#define E1000_CTRL_EXT_SDP6_DIR	0x00000400 /* Direction of SDP6 0=in 1=out */
#define E1000_CTRL_EXT_SDP3_DIR	0x00000800 /* Direction of SDP3 0=in 1=out */
#define E1000_CTRL_EXT_FORCE_SMBUS	0x00000800 /* Force SMBus mode */
#define E1000_CTRL_EXT_EE_RST	0x00002000 /* Reinitialize from EEPROM */
/* Physical Func Reset Done Indication */
#define E1000_CTRL_EXT_PFRSTD	0x00004000
#define E1000_CTRL_EXT_SDLPE	0X00040000  /* SerDes Low Power Enable */
#define E1000_CTRL_EXT_SPD_BYPS	0x00008000 /* Speed Select Bypass */
#define E1000_CTRL_EXT_RO_DIS	0x00020000 /* Relaxed Ordering disable */
#define E1000_CTRL_EXT_DMA_DYN_CLK_EN	0x00080000 /* DMA Dynamic Clk Gating */
#define E1000_CTRL_EXT_LINK_MODE_MASK	0x00C00000
/* Offset of the link mode field in Ctrl Ext register */
#define E1000_CTRL_EXT_LINK_MODE_OFFSET	22
#define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX	0x00400000
#define E1000_CTRL_EXT_LINK_MODE_GMII	0x00000000
#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES	0x00C00000
#define E1000_CTRL_EXT_LINK_MODE_SGMII	0x00800000
#define E1000_CTRL_EXT_EIAME		0x01000000
#define E1000_CTRL_EXT_IRCA		0x00000001
#define E1000_CTRL_EXT_DRV_LOAD		0x10000000 /* Drv loaded bit for FW */
#define E1000_CTRL_EXT_IAME		0x08000000 /* Int ACK Auto-mask */
#define E1000_CTRL_EXT_PBA_CLR		0x80000000 /* PBA Clear */
#define E1000_CTRL_EXT_LSECCK		0x00001000
#define E1000_CTRL_EXT_PHYPDEN		0x00100000
#define E1000_I2CCMD_REG_ADDR_SHIFT	16
#define E1000_I2CCMD_PHY_ADDR_SHIFT	24
#define E1000_I2CCMD_OPCODE_READ	0x08000000
#define E1000_I2CCMD_OPCODE_WRITE	0x00000000
#define E1000_I2CCMD_READY		0x20000000
#define E1000_I2CCMD_ERROR		0x80000000
#define E1000_I2CCMD_SFP_DATA_ADDR(a)	(0x0000 + (a))
#define E1000_I2CCMD_SFP_DIAG_ADDR(a)	(0x0100 + (a))
#define E1000_MAX_SGMII_PHY_REG_ADDR	255
#define E1000_I2CCMD_PHY_TIMEOUT	200
#define E1000_IVAR_VALID	0x80
#define E1000_GPIE_NSICR	0x00000001
#define E1000_GPIE_MSIX_MODE	0x00000010
#define E1000_GPIE_EIAME	0x40000000
#define E1000_GPIE_PBA		0x80000000

/* Receive Descriptor bit definitions */
#define E1000_RXD_STAT_DD	0x01    /* Descriptor Done */
#define E1000_RXD_STAT_EOP	0x02    /* End of Packet */
#define E1000_RXD_STAT_IXSM	0x04    /* Ignore checksum */
#define E1000_RXD_STAT_VP	0x08    /* IEEE VLAN Packet */
#define E1000_RXD_STAT_UDPCS	0x10    /* UDP xsum calculated */
#define E1000_RXD_STAT_TCPCS	0x20    /* TCP xsum calculated */
#define E1000_RXD_STAT_IPCS	0x40    /* IP xsum calculated */
#define E1000_RXD_STAT_PIF	0x80    /* passed in-exact filter */
#define E1000_RXD_STAT_IPIDV	0x200   /* IP identification valid */
#define E1000_RXD_STAT_UDPV	0x400   /* Valid UDP checksum */
#define E1000_RXD_STAT_DYNINT	0x800   /* Pkt caused INT via DYNINT */
#define E1000_RXD_ERR_CE	0x01    /* CRC Error */
#define E1000_RXD_ERR_SE	0x02    /* Symbol Error */
#define E1000_RXD_ERR_SEQ	0x04    /* Sequence Error */
#define E1000_RXD_ERR_CXE	0x10    /* Carrier Extension Error */
#define E1000_RXD_ERR_TCPE	0x20    /* TCP/UDP Checksum Error */
#define E1000_RXD_ERR_IPE	0x40    /* IP Checksum Error */
#define E1000_RXD_ERR_RXE	0x80    /* Rx Data Error */
#define E1000_RXD_SPC_VLAN_MASK	0x0FFF  /* VLAN ID is in lower 12 bits */

#define E1000_RXDEXT_STATERR_TST	0x00000100 /* Time Stamp taken */
#define E1000_RXDEXT_STATERR_LB		0x00040000
#define E1000_RXDEXT_STATERR_CE		0x01000000
#define E1000_RXDEXT_STATERR_SE		0x02000000
#define E1000_RXDEXT_STATERR_SEQ	0x04000000
#define E1000_RXDEXT_STATERR_CXE	0x10000000
#define E1000_RXDEXT_STATERR_TCPE	0x20000000
#define E1000_RXDEXT_STATERR_IPE	0x40000000
#define E1000_RXDEXT_STATERR_RXE	0x80000000

/* mask to determine if packets should be dropped due to frame errors */
#define E1000_RXD_ERR_FRAME_ERR_MASK ( \
	E1000_RXD_ERR_CE  |		\
	E1000_RXD_ERR_SE  |		\
	E1000_RXD_ERR_SEQ |		\
	E1000_RXD_ERR_CXE |		\
	E1000_RXD_ERR_RXE)

/* Same mask, but for extended and packet split descriptors */
#define E1000_RXDEXT_ERR_FRAME_ERR_MASK ( \
	E1000_RXDEXT_STATERR_CE  |	\
	E1000_RXDEXT_STATERR_SE  |	\
	E1000_RXDEXT_STATERR_SEQ |	\
	E1000_RXDEXT_STATERR_CXE |	\
	E1000_RXDEXT_STATERR_RXE)

#define E1000_MRQC_RSS_ENABLE_2Q		0x00000001
#define E1000_MRQC_RSS_FIELD_MASK		0xFFFF0000
#define E1000_MRQC_RSS_FIELD_IPV4_TCP		0x00010000
#define E1000_MRQC_RSS_FIELD_IPV4		0x00020000
#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX	0x00040000
#define E1000_MRQC_RSS_FIELD_IPV6_EX		0x00080000
#define E1000_MRQC_RSS_FIELD_IPV6		0x00100000
#define E1000_MRQC_RSS_FIELD_IPV6_TCP		0x00200000

#define E1000_RXDPS_HDRSTAT_HDRSP		0x00008000

/* Management Control */
#define E1000_MANC_SMBUS_EN	0x00000001 /* SMBus Enabled - RO */
#define E1000_MANC_ASF_EN	0x00000002 /* ASF Enabled - RO */
#define E1000_MANC_ARP_EN	0x00002000 /* Enable ARP Request Filtering */
#define E1000_MANC_RCV_TCO_EN	0x00020000 /* Receive TCO Packets Enabled */
#define E1000_MANC_BLK_PHY_RST_ON_IDE	0x00040000 /* Block phy resets */
/* Enable MAC address filtering */
#define E1000_MANC_EN_MAC_ADDR_FILTER	0x00100000
/* Enable MNG packets to host memory */
#define E1000_MANC_EN_MNG2HOST		0x00200000

#define E1000_MANC2H_PORT_623		0x00000020 /* Port 0x26f */
#define E1000_MANC2H_PORT_664		0x00000040 /* Port 0x298 */
#define E1000_MDEF_PORT_623		0x00000800 /* Port 0x26f */
#define E1000_MDEF_PORT_664		0x00000400 /* Port 0x298 */

/* Receive Control */
#define E1000_RCTL_RST		0x00000001 /* Software reset */
#define E1000_RCTL_EN		0x00000002 /* enable */
#define E1000_RCTL_SBP		0x00000004 /* store bad packet */
#define E1000_RCTL_UPE		0x00000008 /* unicast promisc enable */
#define E1000_RCTL_MPE		0x00000010 /* multicast promisc enable */
#define E1000_RCTL_LPE		0x00000020 /* long packet enable */
#define E1000_RCTL_LBM_NO	0x00000000 /* no loopback mode */
#define E1000_RCTL_LBM_MAC	0x00000040 /* MAC loopback mode */
#define E1000_RCTL_LBM_TCVR	0x000000C0 /* tcvr loopback mode */
#define E1000_RCTL_DTYP_PS	0x00000400 /* Packet Split descriptor */
#define E1000_RCTL_RDMTS_HALF	0x00000000 /* Rx desc min thresh size */
#define E1000_RCTL_RDMTS_HEX	0x00010000
#define E1000_RCTL_RDMTS1_HEX	E1000_RCTL_RDMTS_HEX
#define E1000_RCTL_MO_SHIFT	12 /* multicast offset shift */
#define E1000_RCTL_MO_3		0x00003000 /* multicast offset 15:4 */
#define E1000_RCTL_BAM		0x00008000 /* broadcast enable */
/* these buffer sizes are valid if E1000_RCTL_BSEX is 0 */
#define E1000_RCTL_SZ_2048	0x00000000 /* Rx buffer size 2048 */
#define E1000_RCTL_SZ_1024	0x00010000 /* Rx buffer size 1024 */
#define E1000_RCTL_SZ_512	0x00020000 /* Rx buffer size 512 */
#define E1000_RCTL_SZ_256	0x00030000 /* Rx buffer size 256 */
/* these buffer sizes are valid if E1000_RCTL_BSEX is 1 */
#define E1000_RCTL_SZ_16384	0x00010000 /* Rx buffer size 16384 */
#define E1000_RCTL_SZ_8192	0x00020000 /* Rx buffer size 8192 */
#define E1000_RCTL_SZ_4096	0x00030000 /* Rx buffer size 4096 */
#define E1000_RCTL_VFE		0x00040000 /* vlan filter enable */
#define E1000_RCTL_CFIEN	0x00080000 /* canonical form enable */
#define E1000_RCTL_CFI		0x00100000 /* canonical form indicator */
#define E1000_RCTL_DPF		0x00400000 /* discard pause frames */
#define E1000_RCTL_PMCF		0x00800000 /* pass MAC control frames */
#define E1000_RCTL_BSEX		0x02000000 /* Buffer size extension */
#define E1000_RCTL_SECRC	0x04000000 /* Strip Ethernet CRC */

/* Use byte values for the following shift parameters
 * Usage:
 *     psrctl |= (((ROUNDUP(value0, 128) >> E1000_PSRCTL_BSIZE0_SHIFT) &
 *		  E1000_PSRCTL_BSIZE0_MASK) |
 *		((ROUNDUP(value1, 1024) >> E1000_PSRCTL_BSIZE1_SHIFT) &
 *		  E1000_PSRCTL_BSIZE1_MASK) |
 *		((ROUNDUP(value2, 1024) << E1000_PSRCTL_BSIZE2_SHIFT) &
 *		  E1000_PSRCTL_BSIZE2_MASK) |
 *		((ROUNDUP(value3, 1024) << E1000_PSRCTL_BSIZE3_SHIFT) |;
 *		  E1000_PSRCTL_BSIZE3_MASK))
 * where value0 = [128..16256],  default=256
 *       value1 = [1024..64512], default=4096
 *       value2 = [0..64512],    default=4096
 *       value3 = [0..64512],    default=0
 */

#define E1000_PSRCTL_BSIZE0_MASK	0x0000007F
#define E1000_PSRCTL_BSIZE1_MASK	0x00003F00
#define E1000_PSRCTL_BSIZE2_MASK	0x003F0000
#define E1000_PSRCTL_BSIZE3_MASK	0x3F000000

#define E1000_PSRCTL_BSIZE0_SHIFT	7    /* Shift _right_ 7 */
#define E1000_PSRCTL_BSIZE1_SHIFT	2    /* Shift _right_ 2 */
#define E1000_PSRCTL_BSIZE2_SHIFT	6    /* Shift _left_ 6 */
#define E1000_PSRCTL_BSIZE3_SHIFT	14   /* Shift _left_ 14 */

/* SWFW_SYNC Definitions */
#define E1000_SWFW_EEP_SM	0x01
#define E1000_SWFW_PHY0_SM	0x02
#define E1000_SWFW_PHY1_SM	0x04
#define E1000_SWFW_CSR_SM	0x08
#define E1000_SWFW_PHY2_SM	0x20
#define E1000_SWFW_PHY3_SM	0x40
#define E1000_SWFW_SW_MNG_SM	0x400

/* Device Control */
#define E1000_CTRL_FD		0x00000001  /* Full duplex.0=half; 1=full */
#define E1000_CTRL_PRIOR	0x00000004  /* Priority on PCI. 0=rx,1=fair */
#define E1000_CTRL_GIO_MASTER_DISABLE 0x00000004 /*Blocks new Master reqs */
#define E1000_CTRL_LRST		0x00000008  /* Link reset. 0=normal,1=reset */
#define E1000_CTRL_ASDE		0x00000020  /* Auto-speed detect enable */
#define E1000_CTRL_SLU		0x00000040  /* Set link up (Force Link) */
#define E1000_CTRL_ILOS		0x00000080  /* Invert Loss-Of Signal */
#define E1000_CTRL_SPD_SEL	0x00000300  /* Speed Select Mask */
#define E1000_CTRL_SPD_10	0x00000000  /* Force 10Mb */
#define E1000_CTRL_SPD_100	0x00000100  /* Force 100Mb */
#define E1000_CTRL_SPD_1000	0x00000200  /* Force 1Gb */
#define E1000_CTRL_FRCSPD	0x00000800  /* Force Speed */
#define E1000_CTRL_FRCDPX	0x00001000  /* Force Duplex */
#define E1000_CTRL_LANPHYPC_OVERRIDE	0x00010000 /* SW control of LANPHYPC */
#define E1000_CTRL_LANPHYPC_VALUE	0x00020000 /* SW value of LANPHYPC */
#define E1000_CTRL_MEHE		0x00080000 /* Memory Error Handling Enable */
#define E1000_CTRL_SWDPIN0	0x00040000 /* SWDPIN 0 value */
#define E1000_CTRL_SWDPIN1	0x00080000 /* SWDPIN 1 value */
#define E1000_CTRL_SWDPIN2	0x00100000 /* SWDPIN 2 value */
#define E1000_CTRL_ADVD3WUC	0x00100000 /* D3 WUC */
#define E1000_CTRL_EN_PHY_PWR_MGMT	0x00200000 /* PHY PM enable */
#define E1000_CTRL_SWDPIN3	0x00200000 /* SWDPIN 3 value */
#define E1000_CTRL_SWDPIO0	0x00400000 /* SWDPIN 0 Input or output */
#define E1000_CTRL_SWDPIO2	0x01000000 /* SWDPIN 2 input or output */
#define E1000_CTRL_SWDPIO3	0x02000000 /* SWDPIN 3 input or output */
#define E1000_CTRL_RST		0x04000000 /* Global reset */
#define E1000_CTRL_RFCE		0x08000000 /* Receive Flow Control enable */
#define E1000_CTRL_TFCE		0x10000000 /* Transmit flow control enable */
#define E1000_CTRL_VME		0x40000000 /* IEEE VLAN mode enable */
#define E1000_CTRL_PHY_RST	0x80000000 /* PHY Reset */
#define E1000_CTRL_I2C_ENA	0x02000000 /* I2C enable */

#define E1000_CTRL_MDIO_DIR		E1000_CTRL_SWDPIO2
#define E1000_CTRL_MDIO			E1000_CTRL_SWDPIN2
#define E1000_CTRL_MDC_DIR		E1000_CTRL_SWDPIO3
#define E1000_CTRL_MDC			E1000_CTRL_SWDPIN3

#define E1000_CONNSW_ENRGSRC		0x4
#define E1000_CONNSW_PHYSD		0x400
#define E1000_CONNSW_PHY_PDN		0x800
#define E1000_CONNSW_SERDESD		0x200
#define E1000_CONNSW_AUTOSENSE_CONF	0x2
#define E1000_CONNSW_AUTOSENSE_EN	0x1
#define E1000_PCS_CFG_PCS_EN		8
#define E1000_PCS_LCTL_FLV_LINK_UP	1
#define E1000_PCS_LCTL_FSV_10		0
#define E1000_PCS_LCTL_FSV_100		2
#define E1000_PCS_LCTL_FSV_1000		4
#define E1000_PCS_LCTL_FDV_FULL		8
#define E1000_PCS_LCTL_FSD		0x10
#define E1000_PCS_LCTL_FORCE_LINK	0x20
#define E1000_PCS_LCTL_FORCE_FCTRL	0x80
#define E1000_PCS_LCTL_AN_ENABLE	0x10000
#define E1000_PCS_LCTL_AN_RESTART	0x20000
#define E1000_PCS_LCTL_AN_TIMEOUT	0x40000
#define E1000_ENABLE_SERDES_LOOPBACK	0x0410

#define E1000_PCS_LSTS_LINK_OK		1
#define E1000_PCS_LSTS_SPEED_100	2
#define E1000_PCS_LSTS_SPEED_1000	4
#define E1000_PCS_LSTS_DUPLEX_FULL	8
#define E1000_PCS_LSTS_SYNK_OK		0x10
#define E1000_PCS_LSTS_AN_COMPLETE	0x10000

/* Device Status */
#define E1000_STATUS_FD			0x00000001 /* Duplex 0=half 1=full */
#define E1000_STATUS_LU			0x00000002 /* Link up.0=no,1=link */
#define E1000_STATUS_FUNC_MASK		0x0000000C /* PCI Function Mask */
#define E1000_STATUS_FUNC_SHIFT		2
#define E1000_STATUS_FUNC_1		0x00000004 /* Function 1 */
#define E1000_STATUS_TXOFF		0x00000010 /* transmission paused */
#define E1000_STATUS_SPEED_MASK	0x000000C0
#define E1000_STATUS_SPEED_10		0x00000000 /* Speed 10Mb/s */
#define E1000_STATUS_SPEED_100		0x00000040 /* Speed 100Mb/s */
#define E1000_STATUS_SPEED_1000		0x00000080 /* Speed 1000Mb/s */
#define E1000_STATUS_LAN_INIT_DONE	0x00000200 /* Lan Init Compltn by NVM */
#define E1000_STATUS_PHYRA		0x00000400 /* PHY Reset Asserted */
#define E1000_STATUS_GIO_MASTER_ENABLE	0x00080000 /* Master request status */
#define E1000_STATUS_PCI66		0x00000800 /* In 66Mhz slot */
#define E1000_STATUS_BUS64		0x00001000 /* In 64 bit slot */
#define E1000_STATUS_2P5_SKU		0x00001000 /* Val of 2.5GBE SKU strap */
#define E1000_STATUS_2P5_SKU_OVER	0x00002000 /* Val of 2.5GBE SKU Over */
#define E1000_STATUS_PCIX_MODE		0x00002000 /* PCI-X mode */
#define E1000_STATUS_PCIX_SPEED		0x0000C000 /* PCI-X bus speed */

/* Constants used to interpret the masked PCI-X bus speed. */
#define E1000_STATUS_PCIX_SPEED_66	0x00000000 /* PCI-X bus spd 50-66MHz */
#define E1000_STATUS_PCIX_SPEED_100	0x00004000 /* PCI-X bus spd 66-100MHz */
#define E1000_STATUS_PCIX_SPEED_133	0x00008000 /* PCI-X bus spd 100-133MHz*/

#define SPEED_10	10
#define SPEED_100	100
#define SPEED_1000	1000
#define SPEED_2500	2500
#define HALF_DUPLEX	1
#define FULL_DUPLEX	2

#define PHY_FORCE_TIME	20

#define ADVERTISE_10_HALF		0x0001
#define ADVERTISE_10_FULL		0x0002
#define ADVERTISE_100_HALF		0x0004
#define ADVERTISE_100_FULL		0x0008
#define ADVERTISE_1000_HALF		0x0010 /* Not used, just FYI */
#define ADVERTISE_1000_FULL		0x0020

/* 1000/H is not supported, nor spec-compliant. */
#define E1000_ALL_SPEED_DUPLEX	( \
	ADVERTISE_10_HALF | ADVERTISE_10_FULL | ADVERTISE_100_HALF | \
	ADVERTISE_100_FULL | ADVERTISE_1000_FULL)
#define E1000_ALL_NOT_GIG	( \
	ADVERTISE_10_HALF | ADVERTISE_10_FULL | ADVERTISE_100_HALF | \
	ADVERTISE_100_FULL)
#define E1000_ALL_100_SPEED	(ADVERTISE_100_HALF | ADVERTISE_100_FULL)
#define E1000_ALL_10_SPEED	(ADVERTISE_10_HALF | ADVERTISE_10_FULL)
#define E1000_ALL_HALF_DUPLEX	(ADVERTISE_10_HALF | ADVERTISE_100_HALF)

#define AUTONEG_ADVERTISE_SPEED_DEFAULT		E1000_ALL_SPEED_DUPLEX

/* LED Control */
#define E1000_PHY_LED0_MODE_MASK	0x00000007
#define E1000_PHY_LED0_IVRT		0x00000008
#define E1000_PHY_LED0_MASK		0x0000001F

#define E1000_LEDCTL_LED0_MODE_MASK	0x0000000F
#define E1000_LEDCTL_LED0_MODE_SHIFT	0
#define E1000_LEDCTL_LED0_IVRT		0x00000040
#define E1000_LEDCTL_LED0_BLINK		0x00000080

#define E1000_LEDCTL_MODE_LINK_UP	0x2
#define E1000_LEDCTL_MODE_LED_ON	0xE
#define E1000_LEDCTL_MODE_LED_OFF	0xF

/* Transmit Descriptor bit definitions */
#define E1000_TXD_DTYP_D	0x00100000 /* Data Descriptor */
#define E1000_TXD_DTYP_C	0x00000000 /* Context Descriptor */
#define E1000_TXD_POPTS_IXSM	0x01       /* Insert IP checksum */
#define E1000_TXD_POPTS_TXSM	0x02       /* Insert TCP/UDP checksum */
#define E1000_TXD_CMD_EOP	0x01000000 /* End of Packet */
#define E1000_TXD_CMD_IFCS	0x02000000 /* Insert FCS (Ethernet CRC) */
#define E1000_TXD_CMD_IC	0x04000000 /* Insert Checksum */
#define E1000_TXD_CMD_RS	0x08000000 /* Report Status */
#define E1000_TXD_CMD_RPS	0x10000000 /* Report Packet Sent */
#define E1000_TXD_CMD_DEXT	0x20000000 /* Desc extension (0 = legacy) */
#define E1000_TXD_CMD_VLE	0x40000000 /* Add VLAN tag */
#define E1000_TXD_CMD_IDE	0x80000000 /* Enable Tidv register */
#define E1000_TXD_STAT_DD	0x00000001 /* Descriptor Done */
#define E1000_TXD_STAT_EC	0x00000002 /* Excess Collisions */
#define E1000_TXD_STAT_LC	0x00000004 /* Late Collisions */
#define E1000_TXD_STAT_TU	0x00000008 /* Transmit underrun */
#define E1000_TXD_CMD_TCP	0x01000000 /* TCP packet */
#define E1000_TXD_CMD_IP	0x02000000 /* IP packet */
#define E1000_TXD_CMD_TSE	0x04000000 /* TCP Seg enable */
#define E1000_TXD_STAT_TC	0x00000004 /* Tx Underrun */
#define E1000_TXD_EXTCMD_TSTAMP	0x00000010 /* IEEE1588 Timestamp packet */

/* Transmit Control */
#define E1000_TCTL_EN		0x00000002 /* enable Tx */
#define E1000_TCTL_PSP		0x00000008 /* pad short packets */
#define E1000_TCTL_CT		0x00000ff0 /* collision threshold */
#define E1000_TCTL_COLD		0x003ff000 /* collision distance */
#define E1000_TCTL_RTLC		0x01000000 /* Re-transmit on late collision */
#define E1000_TCTL_MULR		0x10000000 /* Multiple request support */

/* Transmit Arbitration Count */
#define E1000_TARC0_ENABLE	0x00000400 /* Enable Tx Queue 0 */

/* SerDes Control */
#define E1000_SCTL_DISABLE_SERDES_LOOPBACK	0x0400
#define E1000_SCTL_ENABLE_SERDES_LOOPBACK	0x0410

/* Receive Checksum Control */
#define E1000_RXCSUM_IPOFL	0x00000100 /* IPv4 checksum offload */
#define E1000_RXCSUM_TUOFL	0x00000200 /* TCP / UDP checksum offload */
#define E1000_RXCSUM_CRCOFL	0x00000800 /* CRC32 offload enable */
#define E1000_RXCSUM_IPPCSE	0x00001000 /* IP payload checksum enable */
#define E1000_RXCSUM_PCSD	0x00002000 /* packet checksum disabled */

/* Header split receive */
#define E1000_RFCTL_NFSW_DIS		0x00000040
#define E1000_RFCTL_NFSR_DIS		0x00000080
#define E1000_RFCTL_ACK_DIS		0x00001000
#define E1000_RFCTL_EXTEN		0x00008000
#define E1000_RFCTL_IPV6_EX_DIS		0x00010000
#define E1000_RFCTL_NEW_IPV6_EXT_DIS	0x00020000
#define E1000_RFCTL_LEF			0x00040000

/* Collision related configuration parameters */
#define E1000_COLLISION_THRESHOLD	15
#define E1000_CT_SHIFT			4
#define E1000_COLLISION_DISTANCE	63
#define E1000_COLD_SHIFT		12

/* Default values for the transmit IPG register */
#define DEFAULT_82542_TIPG_IPGT		10
#define DEFAULT_82543_TIPG_IPGT_FIBER	9
#define DEFAULT_82543_TIPG_IPGT_COPPER	8

#define E1000_TIPG_IPGT_MASK		0x000003FF

#define DEFAULT_82542_TIPG_IPGR1	2
#define DEFAULT_82543_TIPG_IPGR1	8
#define E1000_TIPG_IPGR1_SHIFT		10

#define DEFAULT_82542_TIPG_IPGR2	10
#define DEFAULT_82543_TIPG_IPGR2	6
#define DEFAULT_80003ES2LAN_TIPG_IPGR2	7
#define E1000_TIPG_IPGR2_SHIFT		20

/* Ethertype field values */
#define ETHERNET_IEEE_VLAN_TYPE		0x8100  /* 802.3ac packet */

#define ETHERNET_FCS_SIZE		4
#define MAX_JUMBO_FRAME_SIZE		0x3F00
/* The datasheet maximum supported RX size is 9.5KB (9728 bytes) */
#define MAX_RX_JUMBO_FRAME_SIZE		0x2600
#define E1000_TX_PTR_GAP		0x1F

/* Extended Configuration Control and Size */
#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP	0x00000020
#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE	0x00000001
#define E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE	0x00000008
#define E1000_EXTCNF_CTRL_SWFLAG		0x00000020
#define E1000_EXTCNF_CTRL_GATE_PHY_CFG		0x00000080
#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK	0x00FF0000
#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT	16
#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK	0x0FFF0000
#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT	16

#define E1000_PHY_CTRL_D0A_LPLU			0x00000002
#define E1000_PHY_CTRL_NOND0A_LPLU		0x00000004
#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE	0x00000008
#define E1000_PHY_CTRL_GBE_DISABLE		0x00000040

#define E1000_KABGTXD_BGSQLBIAS			0x00050000

/* Low Power IDLE Control */
#define E1000_LPIC_LPIET_SHIFT		24	/* Low Power Idle Entry Time */

/* PBA constants */
#define E1000_PBA_8K		0x0008    /* 8KB */
#define E1000_PBA_10K		0x000A    /* 10KB */
#define E1000_PBA_12K		0x000C    /* 12KB */
#define E1000_PBA_14K		0x000E    /* 14KB */
#define E1000_PBA_16K		0x0010    /* 16KB */
#define E1000_PBA_18K		0x0012
#define E1000_PBA_20K		0x0014
#define E1000_PBA_22K		0x0016
#define E1000_PBA_24K		0x0018
#define E1000_PBA_26K		0x001A
#define E1000_PBA_30K		0x001E
#define E1000_PBA_32K		0x0020
#define E1000_PBA_34K		0x0022
#define E1000_PBA_35K		0x0023
#define E1000_PBA_38K		0x0026
#define E1000_PBA_40K		0x0028
#define E1000_PBA_48K		0x0030    /* 48KB */
#define E1000_PBA_64K		0x0040    /* 64KB */

#define E1000_PBA_RXA_MASK	0xFFFF

#define E1000_PBS_16K		E1000_PBA_16K

/* Uncorrectable/correctable ECC Error counts and enable bits */
#define E1000_PBECCSTS_CORR_ERR_CNT_MASK	0x000000FF
#define E1000_PBECCSTS_UNCORR_ERR_CNT_MASK	0x0000FF00
#define E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT	8
#define E1000_PBECCSTS_ECC_ENABLE		0x00010000

#define IFS_MAX			80
#define IFS_MIN			40
#define IFS_RATIO		4
#define IFS_STEP		10
#define MIN_NUM_XMITS		1000

/* SW Semaphore Register */
#define E1000_SWSM_SMBI		0x00000001 /* Driver Semaphore bit */
#define E1000_SWSM_SWESMBI	0x00000002 /* FW Semaphore bit */
#define E1000_SWSM_DRV_LOAD	0x00000008 /* Driver Loaded Bit */

#define E1000_SWSM2_LOCK	0x00000002 /* Secondary driver semaphore bit */

/* Interrupt Cause Read */
#define E1000_ICR_TXDW		0x00000001 /* Transmit desc written back */
#define E1000_ICR_TXQE		0x00000002 /* Transmit Queue empty */
#define E1000_ICR_LSC		0x00000004 /* Link Status Change */
#define E1000_ICR_RXSEQ		0x00000008 /* Rx sequence error */
#define E1000_ICR_RXDMT0	0x00000010 /* Rx desc min. threshold (0) */
#define E1000_ICR_RXO		0x00000040 /* Rx overrun */
#define E1000_ICR_RXT0		0x00000080 /* Rx timer intr (ring 0) */
#define E1000_ICR_VMMB		0x00000100 /* VM MB event */
#define E1000_ICR_RXCFG		0x00000400 /* Rx /c/ ordered set */
#define E1000_ICR_GPI_EN0	0x00000800 /* GP Int 0 */
#define E1000_ICR_GPI_EN1	0x00001000 /* GP Int 1 */
#define E1000_ICR_GPI_EN2	0x00002000 /* GP Int 2 */
#define E1000_ICR_GPI_EN3	0x00004000 /* GP Int 3 */
#define E1000_ICR_TXD_LOW	0x00008000
#define E1000_ICR_MNG		0x00040000 /* Manageability event */
#define E1000_ICR_ECCER		0x00400000 /* Uncorrectable ECC Error */
#define E1000_ICR_TS		0x00080000 /* Time Sync Interrupt */
#define E1000_ICR_DRSTA		0x40000000 /* Device Reset Asserted */
/* If this bit asserted, the driver should claim the interrupt */
#define E1000_ICR_INT_ASSERTED	0x80000000
#define E1000_ICR_DOUTSYNC	0x10000000 /* NIC DMA out of sync */
#define E1000_ICR_RXQ0		0x00100000 /* Rx Queue 0 Interrupt */
#define E1000_ICR_RXQ1		0x00200000 /* Rx Queue 1 Interrupt */
#define E1000_ICR_TXQ0		0x00400000 /* Tx Queue 0 Interrupt */
#define E1000_ICR_TXQ1		0x00800000 /* Tx Queue 1 Interrupt */
#define E1000_ICR_OTHER		0x01000000 /* Other Interrupts */
#define E1000_ICR_FER		0x00400000 /* Fatal Error */

#define E1000_ICR_THS		0x00800000 /* ICR.THS: Thermal Sensor Event*/
#define E1000_ICR_MDDET		0x10000000 /* Malicious Driver Detect */

#define E1000_ITR_MASK		0x000FFFFF /* ITR value bitfield */
#define E1000_ITR_MULT		256 /* ITR mulitplier in nsec */

/* PBA ECC Register */
#define E1000_PBA_ECC_COUNTER_MASK	0xFFF00000 /* ECC counter mask */
#define E1000_PBA_ECC_COUNTER_SHIFT	20 /* ECC counter shift value */
#define E1000_PBA_ECC_CORR_EN	0x00000001 /* Enable ECC error correction */
#define E1000_PBA_ECC_STAT_CLR	0x00000002 /* Clear ECC error counter */
#define E1000_PBA_ECC_INT_EN	0x00000004 /* Enable ICR bit 5 on ECC error */

/* Extended Interrupt Cause Read */
#define E1000_EICR_RX_QUEUE0	0x00000001 /* Rx Queue 0 Interrupt */
#define E1000_EICR_RX_QUEUE1	0x00000002 /* Rx Queue 1 Interrupt */
#define E1000_EICR_RX_QUEUE2	0x00000004 /* Rx Queue 2 Interrupt */
#define E1000_EICR_RX_QUEUE3	0x00000008 /* Rx Queue 3 Interrupt */
#define E1000_EICR_TX_QUEUE0	0x00000100 /* Tx Queue 0 Interrupt */
#define E1000_EICR_TX_QUEUE1	0x00000200 /* Tx Queue 1 Interrupt */
#define E1000_EICR_TX_QUEUE2	0x00000400 /* Tx Queue 2 Interrupt */
#define E1000_EICR_TX_QUEUE3	0x00000800 /* Tx Queue 3 Interrupt */
#define E1000_EICR_TCP_TIMER	0x40000000 /* TCP Timer */
#define E1000_EICR_OTHER	0x80000000 /* Interrupt Cause Active */
/* TCP Timer */
#define E1000_TCPTIMER_KS	0x00000100 /* KickStart */
#define E1000_TCPTIMER_COUNT_ENABLE	0x00000200 /* Count Enable */
#define E1000_TCPTIMER_COUNT_FINISH	0x00000400 /* Count finish */
#define E1000_TCPTIMER_LOOP	0x00000800 /* Loop */

/* This defines the bits that are set in the Interrupt Mask
 * Set/Read Register.  Each bit is documented below:
 *   o RXT0   = Receiver Timer Interrupt (ring 0)
 *   o TXDW   = Transmit Descriptor Written Back
 *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
 *   o RXSEQ  = Receive Sequence Error
 *   o LSC    = Link Status Change
 */
#define IMS_ENABLE_MASK ( \
	E1000_IMS_RXT0   |    \
	E1000_IMS_TXDW   |    \
	E1000_IMS_RXDMT0 |    \
	E1000_IMS_RXSEQ  |    \
	E1000_IMS_LSC)

/* Interrupt Mask Set */
#define E1000_IMS_TXDW		E1000_ICR_TXDW    /* Tx desc written back */
#define E1000_IMS_TXQE		E1000_ICR_TXQE    /* Transmit Queue empty */
#define E1000_IMS_LSC		E1000_ICR_LSC     /* Link Status Change */
#define E1000_IMS_VMMB		E1000_ICR_VMMB    /* Mail box activity */
#define E1000_IMS_RXSEQ		E1000_ICR_RXSEQ   /* Rx sequence error */
#define E1000_IMS_RXDMT0	E1000_ICR_RXDMT0  /* Rx desc min. threshold */
#define E1000_IMS_RXO		E1000_ICR_RXO     /* Rx overrun */
#define E1000_IMS_RXT0		E1000_ICR_RXT0    /* Rx timer intr */
#define E1000_IMS_TXD_LOW	E1000_ICR_TXD_LOW
#define E1000_IMS_ECCER		E1000_ICR_ECCER   /* Uncorrectable ECC Error */
#define E1000_IMS_TS		E1000_ICR_TS      /* Time Sync Interrupt */
#define E1000_IMS_DRSTA		E1000_ICR_DRSTA   /* Device Reset Asserted */
#define E1000_IMS_DOUTSYNC	E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
#define E1000_IMS_RXQ0		E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */
#define E1000_IMS_RXQ1		E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */
#define E1000_IMS_TXQ0		E1000_ICR_TXQ0 /* Tx Queue 0 Interrupt */
#define E1000_IMS_TXQ1		E1000_ICR_TXQ1 /* Tx Queue 1 Interrupt */
#define E1000_IMS_OTHER		E1000_ICR_OTHER /* Other Interrupts */
#define E1000_IMS_FER		E1000_ICR_FER /* Fatal Error */

#define E1000_IMS_THS		E1000_ICR_THS /* ICR.TS: Thermal Sensor Event*/
#define E1000_IMS_MDDET		E1000_ICR_MDDET /* Malicious Driver Detect */
/* Extended Interrupt Mask Set */
#define E1000_EIMS_RX_QUEUE0	E1000_EICR_RX_QUEUE0 /* Rx Queue 0 Interrupt */
#define E1000_EIMS_RX_QUEUE1	E1000_EICR_RX_QUEUE1 /* Rx Queue 1 Interrupt */
#define E1000_EIMS_RX_QUEUE2	E1000_EICR_RX_QUEUE2 /* Rx Queue 2 Interrupt */
#define E1000_EIMS_RX_QUEUE3	E1000_EICR_RX_QUEUE3 /* Rx Queue 3 Interrupt */
#define E1000_EIMS_TX_QUEUE0	E1000_EICR_TX_QUEUE0 /* Tx Queue 0 Interrupt */
#define E1000_EIMS_TX_QUEUE1	E1000_EICR_TX_QUEUE1 /* Tx Queue 1 Interrupt */
#define E1000_EIMS_TX_QUEUE2	E1000_EICR_TX_QUEUE2 /* Tx Queue 2 Interrupt */
#define E1000_EIMS_TX_QUEUE3	E1000_EICR_TX_QUEUE3 /* Tx Queue 3 Interrupt */
#define E1000_EIMS_TCP_TIMER	E1000_EICR_TCP_TIMER /* TCP Timer */
#define E1000_EIMS_OTHER	E1000_EICR_OTHER   /* Interrupt Cause Active */

/* Interrupt Cause Set */
#define E1000_ICS_LSC		E1000_ICR_LSC       /* Link Status Change */
#define E1000_ICS_RXSEQ		E1000_ICR_RXSEQ     /* Rx sequence error */
#define E1000_ICS_RXDMT0	E1000_ICR_RXDMT0    /* Rx desc min. threshold */

/* Extended Interrupt Cause Set */
#define E1000_EICS_RX_QUEUE0	E1000_EICR_RX_QUEUE0 /* Rx Queue 0 Interrupt */
#define E1000_EICS_RX_QUEUE1	E1000_EICR_RX_QUEUE1 /* Rx Queue 1 Interrupt */
#define E1000_EICS_RX_QUEUE2	E1000_EICR_RX_QUEUE2 /* Rx Queue 2 Interrupt */
#define E1000_EICS_RX_QUEUE3	E1000_EICR_RX_QUEUE3 /* Rx Queue 3 Interrupt */
#define E1000_EICS_TX_QUEUE0	E1000_EICR_TX_QUEUE0 /* Tx Queue 0 Interrupt */
#define E1000_EICS_TX_QUEUE1	E1000_EICR_TX_QUEUE1 /* Tx Queue 1 Interrupt */
#define E1000_EICS_TX_QUEUE2	E1000_EICR_TX_QUEUE2 /* Tx Queue 2 Interrupt */
#define E1000_EICS_TX_QUEUE3	E1000_EICR_TX_QUEUE3 /* Tx Queue 3 Interrupt */
#define E1000_EICS_TCP_TIMER	E1000_EICR_TCP_TIMER /* TCP Timer */
#define E1000_EICS_OTHER	E1000_EICR_OTHER   /* Interrupt Cause Active */

#define E1000_EITR_ITR_INT_MASK	0x0000FFFF
/* E1000_EITR_CNT_IGNR is only for 82576 and newer */
#define E1000_EITR_CNT_IGNR	0x80000000 /* Don't reset counters on write */
#define E1000_EITR_INTERVAL 0x00007FFC

/* Transmit Descriptor Control */
#define E1000_TXDCTL_PTHRESH	0x0000003F /* TXDCTL Prefetch Threshold */
#define E1000_TXDCTL_HTHRESH	0x00003F00 /* TXDCTL Host Threshold */
#define E1000_TXDCTL_WTHRESH	0x003F0000 /* TXDCTL Writeback Threshold */
#define E1000_TXDCTL_GRAN	0x01000000 /* TXDCTL Granularity */
#define E1000_TXDCTL_FULL_TX_DESC_WB	0x01010000 /* GRAN=1, WTHRESH=1 */
#define E1000_TXDCTL_MAX_TX_DESC_PREFETCH 0x0100001F /* GRAN=1, PTHRESH=31 */
/* Enable the counting of descriptors still to be processed. */
#define E1000_TXDCTL_COUNT_DESC	0x00400000

/* Flow Control Constants */
#define FLOW_CONTROL_ADDRESS_LOW	0x00C28001
#define FLOW_CONTROL_ADDRESS_HIGH	0x00000100
#define FLOW_CONTROL_TYPE		0x8808

/* 802.1q VLAN Packet Size */
#define VLAN_TAG_SIZE			4    /* 80
Download .txt
gitextract_y7jzlog7/

├── .gitignore
├── LICENSE
├── Makefile
├── README.md
├── config.mk
├── include/
│   └── xhyve/
│       ├── acpi.h
│       ├── ahci.h
│       ├── atkbdc.h
│       ├── bhyvegc.h
│       ├── block_if.h
│       ├── bootrom.h
│       ├── console.h
│       ├── dbgport.h
│       ├── firmware/
│       │   ├── fbsd.h
│       │   └── kexec.h
│       ├── inout.h
│       ├── ioapic.h
│       ├── lock.h
│       ├── mem.h
│       ├── mevent.h
│       ├── mptbl.h
│       ├── pci_emul.h
│       ├── pci_irq.h
│       ├── pci_lpc.h
│       ├── ps2kbd.h
│       ├── ps2mouse.h
│       ├── rfb.h
│       ├── rtc.h
│       ├── smbiostbl.h
│       ├── sockstream.h
│       ├── support/
│       │   ├── acpi_hpet.h
│       │   ├── apicreg.h
│       │   ├── ata.h
│       │   ├── atomic.h
│       │   ├── bitset.h
│       │   ├── cpuset.h
│       │   ├── e1000_defines.h
│       │   ├── e1000_regs.h
│       │   ├── i8253reg.h
│       │   ├── i8259.h
│       │   ├── linker_set.h
│       │   ├── misc.h
│       │   ├── mptable.h
│       │   ├── ns16550.h
│       │   ├── pcireg.h
│       │   ├── psl.h
│       │   ├── rtc.h
│       │   ├── segments.h
│       │   ├── specialreg.h
│       │   ├── timerreg.h
│       │   ├── tree.h
│       │   └── uuid.h
│       ├── uart_emul.h
│       ├── vga.h
│       ├── virtio.h
│       ├── vmm/
│       │   ├── intel/
│       │   │   ├── vmcs.h
│       │   │   ├── vmx.h
│       │   │   ├── vmx_controls.h
│       │   │   └── vmx_msr.h
│       │   ├── io/
│       │   │   ├── vatpic.h
│       │   │   ├── vatpit.h
│       │   │   ├── vhpet.h
│       │   │   ├── vioapic.h
│       │   │   ├── vlapic.h
│       │   │   ├── vlapic_priv.h
│       │   │   ├── vpmtmr.h
│       │   │   └── vrtc.h
│       │   ├── vmm.h
│       │   ├── vmm_api.h
│       │   ├── vmm_callout.h
│       │   ├── vmm_common.h
│       │   ├── vmm_host.h
│       │   ├── vmm_instruction_emul.h
│       │   ├── vmm_ioport.h
│       │   ├── vmm_ktr.h
│       │   ├── vmm_lapic.h
│       │   ├── vmm_mem.h
│       │   ├── vmm_stat.h
│       │   ├── vmm_util.h
│       │   └── x86.h
│       ├── xhyve.h
│       └── xmsr.h
├── src/
│   ├── acpi.c
│   ├── acpitbl.c
│   ├── atkbdc.c
│   ├── bhyvegc.c
│   ├── block_if.c
│   ├── bootrom.c
│   ├── console.c
│   ├── consport.c
│   ├── dbgport.c
│   ├── dsdt.asl
│   ├── firmware/
│   │   ├── fbsd.c
│   │   └── kexec.c
│   ├── inout.c
│   ├── ioapic.c
│   ├── mem.c
│   ├── mevent.c
│   ├── mevent_test.c
│   ├── mptbl.c
│   ├── pci_ahci.c
│   ├── pci_e82545.c
│   ├── pci_emul.c
│   ├── pci_fbuf.c
│   ├── pci_hostbridge.c
│   ├── pci_irq.c
│   ├── pci_lpc.c
│   ├── pci_uart.c
│   ├── pci_virtio_block.c
│   ├── pci_virtio_net_tap.c
│   ├── pci_virtio_net_vmnet.c
│   ├── pci_virtio_rnd.c
│   ├── pm.c
│   ├── post.c
│   ├── ps2kbd.c
│   ├── ps2mouse.c
│   ├── rfb.c
│   ├── rtc.c
│   ├── smbiostbl.c
│   ├── sockstream.c
│   ├── task_switch.c
│   ├── uart_emul.c
│   ├── vga.c
│   ├── virtio.c
│   ├── vmm/
│   │   ├── intel/
│   │   │   ├── vmcs.c
│   │   │   ├── vmx.c
│   │   │   └── vmx_msr.c
│   │   ├── io/
│   │   │   ├── vatpic.c
│   │   │   ├── vatpit.c
│   │   │   ├── vhpet.c
│   │   │   ├── vioapic.c
│   │   │   ├── vlapic.c
│   │   │   ├── vpmtmr.c
│   │   │   └── vrtc.c
│   │   ├── vmm.c
│   │   ├── vmm_api.c
│   │   ├── vmm_callout.c
│   │   ├── vmm_host.c
│   │   ├── vmm_instruction_emul.c
│   │   ├── vmm_ioport.c
│   │   ├── vmm_lapic.c
│   │   ├── vmm_mem.c
│   │   ├── vmm_stat.c
│   │   ├── vmm_util.c
│   │   └── x86.c
│   ├── xhyve-Info.plist
│   ├── xhyve-entitlements.plist
│   ├── xhyve.c
│   └── xmsr.c
├── test/
│   ├── tinycore.txt
│   ├── userboot.txt
│   └── vmlinuz
├── xcconfigs/
│   ├── common.xcconfig
│   ├── common_asan.xcconfig
│   ├── common_debug.xcconfig
│   └── xhyve.xcconfig
├── xcscripts/
│   └── version.sh
├── xhyve.1
├── xhyve.xcodeproj/
│   ├── .gitignore
│   └── project.pbxproj
├── xhyverun-freebsd.sh
├── xhyverun-tinycorelinux.sh
└── xhyverun-windows.sh
Download .txt
SYMBOL INDEX (1912 symbols across 116 files)

FILE: include/xhyve/atkbdc.h
  type atkbdc_softc (line 32) | struct atkbdc_softc
  type vmctx (line 33) | struct vmctx
  type atkbdc_softc (line 36) | struct atkbdc_softc

FILE: include/xhyve/bhyvegc.h
  type bhyvegc (line 32) | struct bhyvegc
  type bhyvegc_image (line 37) | struct bhyvegc_image {
  type bhyvegc (line 46) | struct bhyvegc
  type bhyvegc (line 47) | struct bhyvegc
  type bhyvegc (line 48) | struct bhyvegc
  type bhyvegc_image (line 49) | struct bhyvegc_image
  type bhyvegc (line 49) | struct bhyvegc

FILE: include/xhyve/block_if.h
  type blockif_req (line 45) | struct blockif_req {
  type blockif_ctxt (line 55) | struct blockif_ctxt
  type blockif_ctxt (line 56) | struct blockif_ctxt
  type blockif_ctxt (line 57) | struct blockif_ctxt
  type blockif_ctxt (line 58) | struct blockif_ctxt
  type blockif_ctxt (line 59) | struct blockif_ctxt
  type blockif_ctxt (line 60) | struct blockif_ctxt
  type blockif_ctxt (line 61) | struct blockif_ctxt
  type blockif_ctxt (line 62) | struct blockif_ctxt
  type blockif_ctxt (line 63) | struct blockif_ctxt
  type blockif_ctxt (line 64) | struct blockif_ctxt
  type blockif_req (line 64) | struct blockif_req
  type blockif_ctxt (line 65) | struct blockif_ctxt
  type blockif_req (line 65) | struct blockif_req
  type blockif_ctxt (line 66) | struct blockif_ctxt
  type blockif_req (line 66) | struct blockif_req
  type blockif_ctxt (line 67) | struct blockif_ctxt
  type blockif_req (line 67) | struct blockif_req
  type blockif_ctxt (line 68) | struct blockif_ctxt
  type blockif_req (line 68) | struct blockif_req
  type blockif_ctxt (line 69) | struct blockif_ctxt

FILE: include/xhyve/console.h
  type bhyvegc (line 32) | struct bhyvegc
  type bhyvegc (line 34) | struct bhyvegc
  type bhyvegc_image (line 42) | struct bhyvegc_image

FILE: include/xhyve/firmware/fbsd.h
  type loader_callbacks (line 18) | struct loader_callbacks {

FILE: include/xhyve/firmware/kexec.h
  type setup_header (line 7) | struct setup_header {
  type zero_page (line 48) | struct zero_page {

FILE: include/xhyve/inout.h
  type vm_exit (line 34) | struct vm_exit
  type inout_port (line 44) | struct inout_port {
  type vm_exit (line 76) | struct vm_exit
  type inout_port (line 77) | struct inout_port
  type inout_port (line 78) | struct inout_port

FILE: include/xhyve/ioapic.h
  type pci_devinst (line 32) | struct pci_devinst
  type pci_devinst (line 38) | struct pci_devinst

FILE: include/xhyve/mem.h
  type mem_range (line 39) | struct mem_range {
  type vie (line 56) | struct vie
  type vm_guest_paging (line 57) | struct vm_guest_paging
  type mem_range (line 59) | struct mem_range
  type mem_range (line 60) | struct mem_range
  type mem_range (line 61) | struct mem_range

FILE: include/xhyve/mevent.h
  type ev_type (line 31) | enum ev_type {
  type mevent (line 38) | struct mevent
  type mevent (line 40) | struct mevent
  type ev_type (line 40) | enum ev_type
  type ev_type (line 41) | enum ev_type
  type mevent (line 42) | struct mevent
  type mevent (line 43) | struct mevent
  type mevent (line 44) | struct mevent
  type mevent (line 45) | struct mevent

FILE: include/xhyve/pci_emul.h
  type pci_devinst (line 40) | struct pci_devinst
  type memory_region (line 41) | struct memory_region
  type pci_devemu (line 43) | struct pci_devemu {
  type pcibar_type (line 64) | enum pcibar_type {
  type pcibar (line 74) | struct pcibar {
  type msix_table_entry (line 83) | struct msix_table_entry {
  type lintr_stat (line 97) | enum lintr_stat {
  type pci_devinst (line 105) | struct pci_devinst {
  type msicap (line 149) | struct msicap {
  type msixcap (line 158) | struct msixcap {
  type pciecap (line 166) | struct pciecap {
  type pci_devinst (line 205) | struct pci_devinst
  type pci_devinst (line 207) | struct pci_devinst
  type pci_devinst (line 210) | struct pci_devinst
  type pcibar_type (line 211) | enum pcibar_type
  type pci_devinst (line 212) | struct pci_devinst
  type pcibar_type (line 213) | enum pcibar_type
  type pci_devinst (line 214) | struct pci_devinst
  type pci_devinst (line 215) | struct pci_devinst
  type pci_devinst (line 216) | struct pci_devinst
  type pci_devinst (line 217) | struct pci_devinst
  type pci_devinst (line 218) | struct pci_devinst
  type pci_devinst (line 219) | struct pci_devinst
  type pci_devinst (line 220) | struct pci_devinst
  type pci_devinst (line 221) | struct pci_devinst
  type pci_devinst (line 222) | struct pci_devinst
  type pci_devinst (line 223) | struct pci_devinst
  type pci_devinst (line 224) | struct pci_devinst
  type pci_devinst (line 225) | struct pci_devinst
  type msicap (line 227) | struct msicap
  type pci_devinst (line 228) | struct pci_devinst
  type pci_devinst (line 229) | struct pci_devinst
  type pci_devinst (line 231) | struct pci_devinst
  function pci_set_cfgdata8 (line 238) | static __inline void
  function pci_set_cfgdata16 (line 245) | static __inline void
  function pci_set_cfgdata32 (line 252) | static __inline void
  function pci_get_cfgdata8 (line 259) | static __inline uint8_t
  function pci_get_cfgdata16 (line 266) | static __inline uint16_t
  function pci_get_cfgdata32 (line 273) | static __inline uint32_t

FILE: include/xhyve/pci_irq.h
  type pci_devinst (line 32) | struct pci_devinst
  type pci_devinst (line 34) | struct pci_devinst
  type pci_devinst (line 35) | struct pci_devinst
  type pci_devinst (line 39) | struct pci_devinst

FILE: include/xhyve/pci_lpc.h
  type lpc_dsdt (line 36) | struct lpc_dsdt {
  type lpc_sysres_type (line 46) | enum lpc_sysres_type {
  type lpc_sysres (line 53) | struct lpc_sysres {

FILE: include/xhyve/ps2kbd.h
  type atkbdc_softc (line 32) | struct atkbdc_softc
  type ps2kbd_softc (line 34) | struct ps2kbd_softc
  type atkbdc_softc (line 34) | struct atkbdc_softc
  type ps2kbd_softc (line 36) | struct ps2kbd_softc
  type ps2kbd_softc (line 37) | struct ps2kbd_softc

FILE: include/xhyve/ps2mouse.h
  type atkbdc_softc (line 32) | struct atkbdc_softc
  type ps2mouse_softc (line 34) | struct ps2mouse_softc
  type atkbdc_softc (line 34) | struct atkbdc_softc
  type ps2mouse_softc (line 36) | struct ps2mouse_softc
  type ps2mouse_softc (line 37) | struct ps2mouse_softc
  type ps2mouse_softc (line 38) | struct ps2mouse_softc
  type ps2mouse_softc (line 39) | struct ps2mouse_softc

FILE: include/xhyve/support/apicreg.h
  type LAPIC (line 125) | struct LAPIC {
  type lapic_t (line 192) | typedef struct LAPIC lapic_t;
  type LAPIC_REGISTERS (line 194) | enum LAPIC_REGISTERS {
  type IOAPIC (line 258) | struct IOAPIC {
  type ioapic_t (line 263) | typedef struct IOAPIC ioapic_t;

FILE: include/xhyve/support/ata.h
  type ata_params (line 38) | struct ata_params {
  type ata_ioc_devices (line 493) | struct ata_ioc_devices {
  type atapi_sense (line 507) | struct atapi_sense {
  type ata_ioc_request (line 548) | struct ata_ioc_request {
  type ata_security_password (line 573) | struct ata_security_password {
  type ata_ioc_raid_config (line 597) | struct ata_ioc_raid_config {
  type ata_ioc_raid_status (line 620) | struct ata_ioc_raid_status {

FILE: include/xhyve/support/atomic.h
  function atomic_cmpset_int (line 104) | static __inline int
  function atomic_cmpset_long (line 122) | static __inline int
  function u_int (line 144) | static __inline u_int
  function u_long (line 162) | static __inline u_long
  function atomic_testandset_int (line 176) | static __inline int
  function atomic_testandset_long (line 193) | static __inline int
  function u_int (line 280) | static __inline u_int
  function u_long (line 292) | static __inline u_long

FILE: include/xhyve/support/cpuset.h
  type cpuset_t (line 46) | typedef struct _cpuset cpuset_t;

FILE: include/xhyve/support/misc.h
  type u_char (line 49) | typedef	unsigned char u_char;
  type u_short (line 50) | typedef	unsigned short u_short;
  type u_int (line 51) | typedef	unsigned int u_int;
  type u_long (line 52) | typedef	unsigned long u_long;
  function cpuid_count (line 54) | static inline void cpuid_count(uint32_t ax, uint32_t cx, uint32_t *p) {
  function do_cpuid (line 60) | static inline void do_cpuid(unsigned ax, unsigned *p) {
  function read_uint16_unaligned (line 76) | static inline uint16_t read_uint16_unaligned(void *pointer) {
  function write_uint16_unaligned (line 81) | static inline void write_uint16_unaligned(void *pointer, uint16_t data) {
  function read_uint32_unaligned (line 86) | static inline uint32_t read_uint32_unaligned(void *pointer) {
  function write_uint32_unaligned (line 91) | static inline void write_uint32_unaligned(void *pointer, uint32_t data) {
  function read_uint64_unaligned (line 96) | static inline uint64_t read_uint64_unaligned(void *pointer) {
  function write_uint64_unaligned (line 101) | static inline void write_uint64_unaligned(void *pointer, uint64_t data) {

FILE: include/xhyve/support/mptable.h
  type busTypes (line 33) | enum busTypes {
  type MPFPS (line 50) | struct MPFPS {
  type MPCTH (line 67) | struct MPCTH {
  type PROCENTRY (line 91) | struct PROCENTRY {
  type BUSENTRY (line 105) | struct BUSENTRY {
  type IOAPICENTRY (line 111) | struct IOAPICENTRY {
  type INTENTRY (line 121) | struct INTENTRY {
  type EXTENTRY (line 147) | struct EXTENTRY {
  type SASENTRY (line 156) | struct SASENTRY {
  type BHDENTRY (line 169) | struct BHDENTRY {
  type CBASMENTRY (line 180) | struct CBASMENTRY {

FILE: include/xhyve/support/segments.h
  type segment_descriptor (line 64) | struct segment_descriptor {
  type user_segment_descriptor (line 78) | struct user_segment_descriptor {

FILE: include/xhyve/support/tree.h
  type type (line 77) | struct type
  type type (line 126) | struct type
  type name (line 127) | struct name
  type type (line 127) | struct type
  type type (line 137) | struct type
  type name (line 138) | struct name
  type type (line 138) | struct type
  type type (line 151) | struct type
  type name (line 152) | struct name
  function _SPLAY_MINMAX (line 245) | void name##_SPLAY_MINMAX(struct name *head, int __comp) \
  type type (line 320) | struct type
  type type (line 321) | struct type
  type name (line 602) | struct name
  type type (line 604) | struct type
  type type (line 605) | struct type
  type name (line 633) | struct name
  type type (line 635) | struct type
  type name (line 651) | struct name
  type type (line 653) | struct type
  type type (line 654) | struct type
  type type (line 672) | struct type
  type type (line 694) | struct type
  type name (line 715) | struct name
  type type (line 717) | struct type
  type type (line 718) | struct type

FILE: include/xhyve/support/uuid.h
  type uuid (line 40) | struct uuid {
  type uuid_internal_t (line 50) | typedef struct uuid uuid_internal_t;
  function uuid_create_nil (line 69) | static inline void
  function uuid_enc_le (line 78) | static inline void
  function uuid_from_string (line 103) | static inline void

FILE: include/xhyve/uart_emul.h
  type uart_softc (line 33) | struct uart_softc
  type uart_softc (line 36) | struct uart_softc
  type uart_softc (line 40) | struct uart_softc
  type uart_softc (line 41) | struct uart_softc
  type uart_softc (line 42) | struct uart_softc

FILE: include/xhyve/vga.h
  type bhyvegc (line 160) | struct bhyvegc

FILE: include/xhyve/virtio.h
  type virtio_desc (line 133) | struct virtio_desc { /* AKA vring_desc */
  type virtio_used (line 140) | struct virtio_used { /* AKA vring_used_elem */
  type vring_avail (line 147) | struct vring_avail {
  type vring_used (line 155) | struct vring_used {
  function vring_size (line 272) | static inline size_t
  type pci_devinst (line 288) | struct pci_devinst
  type vqueue_info (line 289) | struct vqueue_info
  type virtio_softc (line 328) | struct virtio_softc {
  type virtio_consts (line 353) | struct virtio_consts {
  type vqueue_info (line 393) | struct vqueue_info {
  function vq_ring_ready (line 431) | static inline int
  function vq_has_descs (line 441) | static inline int
  function vq_interrupt (line 452) | static inline void
  type iovec (line 466) | struct iovec
  type virtio_softc (line 467) | struct virtio_softc
  type virtio_consts (line 467) | struct virtio_consts
  type pci_devinst (line 468) | struct pci_devinst
  type vqueue_info (line 468) | struct vqueue_info
  type virtio_softc (line 469) | struct virtio_softc
  type virtio_softc (line 470) | struct virtio_softc
  type virtio_softc (line 471) | struct virtio_softc
  type vqueue_info (line 472) | struct vqueue_info
  type iovec (line 472) | struct iovec
  type vqueue_info (line 474) | struct vqueue_info
  type vqueue_info (line 475) | struct vqueue_info
  type vqueue_info (line 476) | struct vqueue_info
  type pci_devinst (line 477) | struct pci_devinst
  type pci_devinst (line 479) | struct pci_devinst

FILE: include/xhyve/vmm/intel/vmcs.h
  type seg_desc (line 38) | struct seg_desc
  type seg_desc (line 39) | struct seg_desc
  function vmcs_read (line 41) | static __inline uint64_t
  function vmcs_write (line 50) | static __inline void

FILE: include/xhyve/vmm/intel/vmx.h
  type vmxcap (line 37) | struct vmxcap {
  type vmxstate (line 45) | struct vmxstate {
  type apic_page (line 53) | struct apic_page {
  type apic_page (line 56) | struct apic_page
  type pir_desc (line 59) | struct pir_desc {
  type pir_desc (line 64) | struct pir_desc
  type vmx (line 78) | struct vmx {

FILE: include/xhyve/vmm/intel/vmx_msr.h
  type vmx (line 37) | struct vmx
  type vmx (line 40) | struct vmx
  type vmx (line 41) | struct vmx
  type vmx (line 42) | struct vmx

FILE: include/xhyve/vmm/io/vatpic.h
  type vatpic (line 43) | struct vatpic
  type vm (line 43) | struct vm
  type vatpic (line 44) | struct vatpic
  type vm (line 46) | struct vm
  type vm (line 48) | struct vm
  type vm (line 50) | struct vm
  type vm (line 53) | struct vm
  type vm (line 54) | struct vm
  type vm (line 55) | struct vm
  type vm (line 56) | struct vm
  type vm_intr_trigger (line 56) | enum vm_intr_trigger
  type vm (line 58) | struct vm
  type vm (line 59) | struct vm

FILE: include/xhyve/vmm/io/vatpit.h
  type vm (line 39) | struct vm
  type vatpit (line 40) | struct vatpit
  type vatpit (line 42) | struct vatpit
  type vm (line 42) | struct vm
  type vatpit (line 43) | struct vatpit
  type vm (line 45) | struct vm
  type vm (line 47) | struct vm

FILE: include/xhyve/vmm/io/vhpet.h
  type vm (line 37) | struct vm
  type vhpet (line 38) | struct vhpet
  type vhpet (line 40) | struct vhpet
  type vm (line 40) | struct vm
  type vhpet (line 41) | struct vhpet

FILE: include/xhyve/vmm/io/vioapic.h
  type vm (line 37) | struct vm
  type vioapic (line 38) | struct vioapic
  type vioapic (line 40) | struct vioapic
  type vm (line 40) | struct vm
  type vioapic (line 41) | struct vioapic
  type vm (line 43) | struct vm
  type vm (line 44) | struct vm
  type vm (line 45) | struct vm
  type vm (line 52) | struct vm
  type vm (line 53) | struct vm

FILE: include/xhyve/vmm/io/vlapic.h
  type vm (line 35) | struct vm
  type vlapic (line 37) | struct vlapic
  type vlapic (line 39) | struct vlapic
  type vlapic (line 52) | struct vlapic
  type vlapic (line 60) | struct vlapic
  type vlapic (line 65) | struct vlapic
  type vlapic (line 72) | struct vlapic
  type vlapic (line 74) | struct vlapic
  type vlapic (line 75) | struct vlapic
  type vlapic (line 76) | struct vlapic
  type vlapic (line 78) | struct vlapic
  type vlapic (line 79) | struct vlapic
  type vm (line 80) | struct vm
  type x2apic_state (line 80) | enum x2apic_state
  type vlapic (line 81) | struct vlapic
  type vm (line 83) | struct vm
  type vlapic (line 87) | struct vlapic
  type vlapic (line 94) | struct vlapic
  type vlapic (line 97) | struct vlapic
  type vlapic (line 98) | struct vlapic
  type vlapic (line 101) | struct vlapic
  type vlapic (line 102) | struct vlapic
  type vlapic (line 103) | struct vlapic
  type vlapic (line 104) | struct vlapic
  type vlapic (line 105) | struct vlapic
  type vlapic (line 106) | struct vlapic
  type vlapic (line 107) | struct vlapic
  type vlapic (line 108) | struct vlapic
  type vlapic (line 109) | struct vlapic
  type vlapic (line 110) | struct vlapic

FILE: include/xhyve/vmm/io/vlapic_priv.h
  type vlapic (line 142) | struct vlapic
  type vlapic_ops (line 144) | struct vlapic_ops {
  type vlapic (line 155) | struct vlapic {
  type vlapic (line 188) | struct vlapic
  type vlapic (line 189) | struct vlapic

FILE: include/xhyve/vmm/io/vpmtmr.h
  type vm (line 35) | struct vm
  type vpmtmr (line 36) | struct vpmtmr
  type vpmtmr (line 38) | struct vpmtmr
  type vm (line 38) | struct vm
  type vpmtmr (line 39) | struct vpmtmr
  type vm (line 41) | struct vm

FILE: include/xhyve/vmm/io/vrtc.h
  type vm (line 37) | struct vm
  type vrtc (line 38) | struct vrtc
  type vrtc (line 40) | struct vrtc
  type vm (line 40) | struct vm
  type vrtc (line 41) | struct vrtc
  type vrtc (line 42) | struct vrtc
  type vm (line 44) | struct vm
  type vm (line 45) | struct vm
  type vm (line 46) | struct vm
  type vm (line 47) | struct vm
  type vm (line 49) | struct vm
  type vm (line 51) | struct vm

FILE: include/xhyve/vmm/vmm.h
  type vm (line 51) | struct vm
  type vm_exception (line 52) | struct vm_exception
  type vm_memory_segment (line 53) | struct vm_memory_segment
  type seg_desc (line 54) | struct seg_desc
  type vm_exit (line 55) | struct vm_exit
  type vm_run (line 56) | struct vm_run
  type vhpet (line 57) | struct vhpet
  type vioapic (line 58) | struct vioapic
  type vlapic (line 59) | struct vlapic
  type vmspace (line 60) | struct vmspace
  type vm_object (line 61) | struct vm_object
  type vm_guest_paging (line 62) | struct vm_guest_paging
  type pmap (line 63) | struct pmap
  type vm (line 67) | struct vm
  type seg_desc (line 78) | struct seg_desc
  type seg_desc (line 80) | struct seg_desc
  type vlapic (line 83) | struct vlapic
  type vlapic (line 84) | struct vlapic
  type vmm_ops (line 87) | struct vmm_ops {
  type vmm_ops (line 106) | struct vmm_ops
  type vm (line 110) | struct vm
  type vm (line 111) | struct vm
  type vm (line 112) | struct vm
  type vm (line 113) | struct vm
  type vm (line 114) | struct vm
  type vm (line 115) | struct vm
  type vm (line 116) | struct vm
  type vm (line 117) | struct vm
  type vm (line 118) | struct vm
  type vm_memory_segment (line 119) | struct vm_memory_segment
  type vm (line 120) | struct vm
  type vm (line 122) | struct vm
  type vm (line 123) | struct vm
  type vm (line 124) | struct vm
  type vm (line 125) | struct vm
  type seg_desc (line 126) | struct seg_desc
  type vm (line 127) | struct vm
  type seg_desc (line 127) | struct seg_desc
  type vm (line 128) | struct vm
  type vm_exit (line 128) | struct vm_exit
  type vm (line 129) | struct vm
  type vm_suspend_how (line 129) | enum vm_suspend_how
  type vm (line 130) | struct vm
  type vm (line 131) | struct vm
  type vm (line 132) | struct vm
  type vm (line 133) | struct vm
  type vm (line 134) | struct vm
  type vm (line 135) | struct vm
  type vlapic (line 136) | struct vlapic
  type vm (line 136) | struct vm
  type vioapic (line 137) | struct vioapic
  type vm (line 137) | struct vm
  type vhpet (line 138) | struct vhpet
  type vm (line 138) | struct vm
  type vm (line 139) | struct vm
  type vm (line 140) | struct vm
  type vm (line 141) | struct vm
  type x2apic_state (line 141) | enum x2apic_state
  type vm (line 142) | struct vm
  type x2apic_state (line 142) | enum x2apic_state
  type vm (line 143) | struct vm
  type vm (line 144) | struct vm
  type vm_exit (line 145) | struct vm_exit
  type vm (line 145) | struct vm
  type vm (line 146) | struct vm
  type vm (line 147) | struct vm
  type vm (line 163) | struct vm
  type vm (line 164) | struct vm
  type vm (line 166) | struct vm
  type vm (line 167) | struct vm
  function vcpu_rendezvous_pending (line 169) | static __inline int
  function vcpu_suspended (line 176) | static __inline int
  type vcpu_state (line 183) | enum vcpu_state {
  type vm (line 190) | struct vm
  type vcpu_state (line 190) | enum vcpu_state
  type vcpu_state (line 192) | enum vcpu_state
  type vm (line 192) | struct vm
  function vcpu_is_running (line 194) | static int __inline
  type vm (line 200) | struct vm
  type vm (line 201) | struct vm
  type vatpic (line 202) | struct vatpic
  type vm (line 202) | struct vm
  type vatpit (line 203) | struct vatpit
  type vm (line 203) | struct vm
  type vpmtmr (line 204) | struct vpmtmr
  type vm (line 204) | struct vm
  type vrtc (line 205) | struct vrtc
  type vm (line 205) | struct vm
  type vm (line 218) | struct vm
  type vm (line 234) | struct vm
  type vm (line 244) | struct vm
  type vm (line 246) | struct vm
  type vm_reg_name (line 248) | enum vm_reg_name
  type vm_copyinfo (line 250) | struct vm_copyinfo {
  type vm (line 270) | struct vm
  type vm_guest_paging (line 270) | struct vm_guest_paging
  type vm_copyinfo (line 271) | struct vm_copyinfo
  type vm (line 273) | struct vm
  type vm_copyinfo (line 273) | struct vm_copyinfo
  type vm (line 275) | struct vm
  type vm_copyinfo (line 275) | struct vm_copyinfo
  type vm (line 277) | struct vm
  type vm_copyinfo (line 278) | struct vm_copyinfo
  function vm_inject_ud (line 286) | static __inline void
  function vm_inject_gp (line 292) | static __inline void
  function vm_inject_ac (line 298) | static __inline void
  function vm_inject_ss (line 304) | static __inline void

FILE: include/xhyve/vmm/vmm_api.h
  type iovec (line 36) | struct iovec
  type vm_mmap_style (line 42) | enum vm_mmap_style {
  type vm_mmap_style (line 53) | enum vm_mmap_style
  type vm_guest_paging (line 57) | struct vm_guest_paging
  type seg_desc (line 68) | struct seg_desc
  type vm_exit (line 71) | struct vm_exit
  type vm_suspend_how (line 72) | enum vm_suspend_how
  type vm_intr_trigger (line 87) | enum vm_intr_trigger
  type vm_cap_type (line 91) | enum vm_cap_type
  type vm_cap_type (line 92) | enum vm_cap_type
  type timeval (line 95) | struct timeval
  type x2apic_state (line 97) | enum x2apic_state
  type x2apic_state (line 98) | enum x2apic_state
  type vm_guest_paging (line 100) | struct vm_guest_paging
  type iovec (line 101) | struct iovec
  type iovec (line 102) | struct iovec
  type iovec (line 103) | struct iovec
  type vie (line 113) | struct vie
  type vm_guest_paging (line 114) | struct vm_guest_paging

FILE: include/xhyve/vmm/vmm_callout.h
  type bintime (line 25) | struct bintime {
  type sbintime_t (line 30) | typedef int64_t sbintime_t;
  function sbintime_t (line 32) | static inline sbintime_t bttosbt(const struct bintime bt) {
  function bintime_mul (line 36) | static inline void bintime_mul(struct bintime *bt, unsigned int x) {
  function bintime_add (line 46) | static inline void bintime_add(struct bintime *_bt, const struct bintime...
  function bintime_sub (line 57) | static inline void bintime_sub(struct bintime *_bt, const struct bintime...
  type bintime (line 75) | struct bintime
  type timeval (line 76) | struct timeval
  function sbintime_t (line 78) | static inline sbintime_t sbinuptime(void) {
  type callout (line 85) | struct callout {
  type callout (line 105) | struct callout
  type callout (line 106) | struct callout
  type callout (line 110) | struct callout

FILE: include/xhyve/vmm/vmm_common.h
  type vm_suspend_how (line 38) | enum vm_suspend_how {
  type vm_cap_type (line 47) | enum vm_cap_type {
  type vm_intr_trigger (line 54) | enum vm_intr_trigger {
  type x2apic_state (line 59) | enum x2apic_state {
  type vm_cpu_mode (line 65) | enum vm_cpu_mode {
  type vm_paging_mode (line 72) | enum vm_paging_mode {
  type seg_desc (line 79) | struct seg_desc {
  type vm_guest_paging (line 92) | struct vm_guest_paging {
  type vm_reg_name (line 99) | enum vm_reg_name {
  type vm_exitcode (line 142) | enum vm_exitcode {
  type vm_inout (line 165) | struct vm_inout {
  type vm_inout_str (line 174) | struct vm_inout_str {
  type vie_op (line 186) | struct vie_op {
  type vie (line 193) | struct vie {
  type task_switch_reason (line 226) | enum task_switch_reason {
  type vm_task_switch (line 233) | struct vm_task_switch {
  type vm_exit (line 242) | struct vm_exit {
  type vm_memory_segment (line 302) | struct vm_memory_segment {
  type vm_cpu_mode (line 315) | enum vm_cpu_mode
  type vm_reg_name (line 315) | enum vm_reg_name
  type seg_desc (line 316) | struct seg_desc

FILE: include/xhyve/vmm/vmm_host.h
  type xsave_limits (line 35) | struct xsave_limits {
  type xsave_limits (line 44) | struct xsave_limits

FILE: include/xhyve/vmm/vmm_instruction_emul.h
  type vie (line 45) | struct vie
  type vm_guest_paging (line 46) | struct vm_guest_paging
  type vm_reg_name (line 49) | enum vm_reg_name
  type vm_cpu_mode (line 53) | enum vm_cpu_mode
  type vm (line 60) | struct vm
  type vm_guest_paging (line 61) | struct vm_guest_paging
  type vie (line 62) | struct vie
  type vm (line 73) | struct vm
  type vm_guest_paging (line 73) | struct vm_guest_paging
  type vie (line 76) | struct vie
  type vm (line 90) | struct vm
  type vm_cpu_mode (line 91) | enum vm_cpu_mode
  type vie (line 91) | struct vie

FILE: include/xhyve/vmm/vmm_ioport.h
  type vm (line 34) | struct vm
  type vm_exit (line 35) | struct vm_exit
  type vm (line 37) | struct vm
  type vm (line 40) | struct vm
  type vm_exit (line 40) | struct vm_exit

FILE: include/xhyve/vmm/vmm_ktr.h
  type vm (line 40) | struct vm
  type vm (line 41) | struct vm

FILE: include/xhyve/vmm/vmm_lapic.h
  type vm (line 35) | struct vm
  type vm (line 38) | struct vm
  type vm (line 40) | struct vm
  type vm (line 52) | struct vm
  function lapic_intr_level (line 56) | static __inline int
  function lapic_intr_edge (line 63) | static __inline int
  type vm (line 74) | struct vm
  type vm (line 76) | struct vm

FILE: include/xhyve/vmm/vmm_mem.h
  type vmspace (line 34) | struct vmspace

FILE: include/xhyve/vmm/vmm_stat.h
  type vm (line 37) | struct vm
  type vmm_stat_scope (line 41) | enum vmm_stat_scope {
  type vmm_stat_type (line 47) | struct vmm_stat_type
  type vm (line 48) | struct vm
  type vmm_stat_type (line 49) | struct vmm_stat_type
  type vmm_stat_type (line 53) | struct vmm_stat_type {
  type vm (line 95) | struct vm
  function vmm_stat_array_incr (line 98) | static void __inline
  function vmm_stat_array_set (line 118) | static void __inline
  function vmm_stat_incr (line 138) | static void __inline
  function vmm_stat_set (line 152) | static void __inline

FILE: include/xhyve/vmm/vmm_util.h
  type trapframe (line 31) | struct trapframe
  type trapframe (line 33) | struct trapframe

FILE: include/xhyve/vmm/x86.h
  type vm (line 63) | struct vm

FILE: include/xhyve/xhyve.h
  function vm_inject_ud (line 51) | static __inline void
  function vm_inject_gp (line 57) | static __inline void
  function vm_inject_ac (line 63) | static __inline void
  function vm_inject_ss (line 69) | static __inline void

FILE: src/acpi.c
  type basl_fio (line 109) | struct basl_fio {
  function basl_fwrite_rsdp (line 122) | static int
  function basl_fwrite_rsdt (line 152) | static int
  function basl_fwrite_xsdt (line 192) | static int
  function basl_fwrite_madt (line 232) | static int
  function basl_fwrite_fadt (line 322) | static int
  function basl_fwrite_hpet (line 543) | static int
  function basl_fwrite_mcfg (line 592) | static int
  function basl_fwrite_facs (line 625) | static int
  function dsdt_line (line 663) | void
  function dsdt_indent (line 690) | void
  function dsdt_unindent (line 698) | void
  function dsdt_fixed_ioport (line 706) | void
  function dsdt_fixed_irq (line 718) | void
  function dsdt_fixed_mem32 (line 726) | void
  function basl_fwrite_dsdt (line 736) | static int
  function basl_open (line 788) | static int
  function basl_close (line 816) | static void
  function basl_start (line 825) | static int
  function basl_end (line 841) | static void
  function basl_load (line 848) | static int
  function basl_compile (line 869) | static int
  function basl_make_templates (line 914) | static int
  function acpi_build (line 977) | int

FILE: src/acpitbl.c
  function dsdt_line (line 83) | void
  function dsdt_fixed_ioport (line 88) | void
  function dsdt_fixed_irq (line 93) | void
  function dsdt_fixed_mem32 (line 98) | void
  function dsdt_indent (line 103) | void
  function dsdt_unindent (line 108) | void dsdt_unindent(UNUSED int levels)
  function acpitbl_checksum (line 112) | static uint8_t
  function acpitbl_write8 (line 124) | static void
  function acpitbl_write16 (line 129) | static void
  function acpitbl_write32 (line 134) | static void
  function acpitbl_write64 (line 139) | static void
  function acpitbl_build_rdsp (line 144) | static void
  function acpitbl_build_rsdt (line 178) | static void
  function acpitbl_build_xsdt (line 218) | static void
  function acpitbl_build_madt (line 260) | static void
  function acpitbl_build_fadt (line 364) | static void
  function acpitbl_build_hpet (line 570) | static void
  function acpitbl_build_mcfg (line 615) | static void
  function acpitbl_build_facs (line 655) | static void
  function dsdt_fixup (line 689) | void dsdt_fixup(int bus, uint16_t iobase, uint16_t iolimit, uint32_t mem...
  function acpitbl_build_dsdt (line 708) | static void
  function acpi_build (line 1049) | int

FILE: src/atkbdc.c
  type kbd_dev (line 112) | struct kbd_dev {
  type aux_dev (line 121) | struct aux_dev {
  type atkbdc_softc (line 126) | struct atkbdc_softc {
  function atkbdc_assert_kbd_intr (line 145) | static void
  function atkbdc_assert_aux_intr (line 154) | static void
  function atkbdc_kbd_queue_data (line 163) | static int
  function atkbdc_kbd_read (line 179) | static void
  function atkbdc_aux_poll (line 244) | static void
  function atkbdc_kbd_poll (line 254) | static void
  function atkbdc_poll (line 260) | static void
  function atkbdc_dequeue_data (line 267) | static void
  function atkbdc_data_handler (line 301) | static int
  function atkbdc_sts_ctl_handler (line 387) | static int
  function atkbdc_event (line 494) | void
  function atkbdc_init (line 506) | void
  function atkbdc_dsdt (line 549) | static void

FILE: src/bhyvegc.c
  type bhyvegc (line 14) | struct bhyvegc {
  type bhyvegc (line 21) | struct bhyvegc
  type bhyvegc (line 24) | struct bhyvegc
  type bhyvegc_image (line 25) | struct bhyvegc_image
  type bhyvegc (line 27) | struct bhyvegc
  type bhyvegc_image (line 29) | struct bhyvegc_image
  function bhyvegc_set_fbaddr (line 45) | void
  function bhyvegc_resize (line 54) | void
  type bhyvegc_image (line 71) | struct bhyvegc_image
  type bhyvegc (line 72) | struct bhyvegc

FILE: src/block_if.c
  type blockop (line 63) | enum blockop {
  type blockstat (line 70) | enum blockstat {
  type blockif_elem (line 80) | struct blockif_elem {
  type blockif_ctxt (line 89) | struct blockif_ctxt {
  type blockif_sig_elem (line 113) | struct blockif_sig_elem {
  type blockif_sig_elem (line 120) | struct blockif_sig_elem
  function _preadv (line 124) | static ssize_t
  function _pwritev (line 134) | static ssize_t
  function blockif_enqueue (line 144) | static int
  function blockif_dequeue (line 188) | static int
  function blockif_complete (line 208) | static void
  function blockif_proc (line 227) | static void
  type blockif_ctxt (line 351) | struct blockif_ctxt
  type blockif_elem (line 352) | struct blockif_elem
  function blockif_sigcont_handler (line 384) | static void
  function blockif_init (line 410) | static void
  type blockif_ctxt (line 417) | struct blockif_ctxt
  type blockif_ctxt (line 422) | struct blockif_ctxt
  type stat (line 423) | struct stat
  type blockif_ctxt (line 561) | struct blockif_ctxt
  function blockif_request (line 598) | static int
  function blockif_read (line 628) | int
  function blockif_write (line 635) | int
  function blockif_flush (line 642) | int
  function blockif_delete (line 649) | int
  function blockif_cancel (line 656) | int
  function blockif_close (line 732) | int
  function blockif_chs (line 768) | void
  function off_t (line 816) | off_t
  function blockif_sectsz (line 823) | int
  function blockif_psectsz (line 830) | void
  function blockif_queuesz (line 838) | int
  function blockif_is_ro (line 845) | int
  function blockif_candelete (line 852) | int

FILE: src/bootrom.c
  function bootrom_init (line 48) | int

FILE: src/console.c
  type bhyvegc (line 40) | struct bhyvegc
  function console_init (line 56) | void
  function console_set_fbaddr (line 62) | void
  type bhyvegc_image (line 68) | struct bhyvegc_image
  type bhyvegc_image (line 71) | struct bhyvegc_image
  function console_fb_register (line 78) | void
  function console_refresh (line 85) | void
  function console_kbd_register (line 92) | void
  function console_ptr_register (line 102) | void
  function console_key_event (line 112) | void
  function console_ptr_event (line 119) | void

FILE: src/consport.c
  type termios (line 46) | struct termios
  function ttyclose (line 48) | static void
  function ttyopen (line 54) | static void
  function tty_char_available (line 65) | static bool
  function ttyread (line 83) | static int
  function ttywrite (line 96) | static void
  function console_handler (line 102) | static int
  type inout_port (line 140) | struct inout_port
  function init_bvmcons (line 149) | void

FILE: src/dbgport.c
  type sockaddr_in (line 51) | struct sockaddr_in
  function dbg_handler (line 53) | static int
  type inout_port (line 105) | struct inout_port
  function init_dbgport (line 116) | void

FILE: src/firmware/fbsd.c
  type termios (line 107) | struct termios
  type loader_callbacks (line 115) | struct loader_callbacks
  type segment_descriptor (line 119) | struct segment_descriptor
  function fbsd_set_regs_i386 (line 133) | static int
  function fbsd_set_regs (line 266) | static int
  function cb_putc (line 398) | static void
  function cb_getc (line 406) | static int
  function cb_poll (line 416) | static int
  type cb_file (line 432) | struct cb_file {
  function cb_open (line 443) | static int
  function cb_diskread (line 579) | static int
  function cb_diskioctl (line 597) | static int
  function cb_copyin (line 626) | static int
  function cb_copyout (line 641) | static int
  function cb_setreg (line 656) | static void
  function cb_setmsr (line 684) | static void
  function cb_setcr (line 711) | static void
  function cb_setgdt (line 746) | static void
  function cb_exec (line 762) | __attribute__ ((noreturn)) static void
  function cb_delay (line 788) | static void
  function cb_exit (line 794) | __attribute__ ((noreturn)) static void
  function cb_getmem (line 802) | static void
  type env (line 809) | struct env {
  function addenv (line 816) | static void
  type env (line 830) | struct env
  type loader_callbacks (line 842) | struct loader_callbacks
  function altcons_open (line 881) | static int
  function disk_open (line 912) | static int
  function fbsd_init (line 932) | void
  function fbsd_load (line 942) | uint64_t

FILE: src/firmware/kexec.c
  function kexec_load_kernel (line 59) | static int
  function kexec_load_ramdisk (line 174) | static int
  function kexec_init (line 230) | void
  function kexec (line 237) | uint64_t

FILE: src/inout.c
  function default_inout (line 60) | static int
  function register_default_iohandler (line 81) | static void
  function update_register (line 98) | static int
  function emulate_inout (line 126) | int
  function init_inout (line 257) | void
  function register_inout (line 280) | int
  function unregister_inout (line 308) | int

FILE: src/ioapic.c
  function ioapic_init (line 45) | void
  function ioapic_pci_alloc_irq (line 62) | int

FILE: src/mem.c
  type mmio_rb_range (line 48) | struct mmio_rb_range {
  type mmio_rb_tree (line 56) | struct mmio_rb_tree
  type mmio_rb_range (line 66) | struct mmio_rb_range
  function mmio_rb_range_compare (line 70) | static int
  function mmio_rb_lookup (line 80) | static int
  function mmio_rb_add (line 98) | static int
  function mmio_rb_dump (line 119) | static void
  function mem_read (line 135) | static int
  function mem_write (line 147) | static int
  function emulate_mem (line 159) | int
  function register_mem_int (line 214) | static int
  function register_mem (line 240) | int
  function register_mem_fallback (line 247) | int
  function unregister_mem (line 254) | int
  function init_mem (line 284) | void

FILE: src/mevent.c
  type mevent (line 63) | struct mevent {
  function mevent_qlock (line 79) | static void
  function mevent_qunlock (line 85) | static void
  function mevent_pipe_read (line 91) | static void
  function mevent_notify (line 106) | static void
  function mevent_kq_filter (line 120) | static int
  function mevent_kq_flags (line 142) | static int
  function mevent_kq_fflags (line 168) | static int
  function mevent_build (line 175) | static int
  function mevent_handle (line 224) | static void
  type mevent (line 239) | struct mevent
  type ev_type (line 240) | enum ev_type
  type ev_type (line 241) | enum ev_type
  type mevent (line 243) | struct mevent
  type mevent (line 273) | struct mevent
  function mevent_update (line 298) | static int
  function mevent_enable (line 332) | int
  function mevent_disable (line 339) | int
  function mevent_delete_event (line 346) | static int
  function mevent_delete (line 371) | int
  function mevent_delete_close (line 378) | int
  function mevent_set_name (line 385) | static void
  function mevent_dispatch (line 390) | __attribute__ ((noreturn)) void

FILE: src/mevent_test.c
  type mevent (line 54) | struct mevent
  function rdtsc (line 65) | static __inline uint64_t rdtsc(void)
  function timer_print (line 74) | static void
  function timer_callback (line 102) | static void
  type esync (line 120) | struct esync {
  function echoer_callback (line 125) | static void
  type esync (line 138) | struct esync
  type mevent (line 139) | struct mevent
  function acceptor_callback (line 191) | static void
  type sockaddr_in (line 202) | struct sockaddr_in
  type sockaddr (line 218) | struct sockaddr
  function main (line 257) | int

FILE: src/mptbl.c
  function mpt_compute_checksum (line 88) | static uint8_t
  function mpt_build_mpfp (line 101) | static void
  function mpt_build_mpch (line 112) | static void
  function mpt_build_proc_entries (line 124) | static void
  function mpt_build_localint_entries (line 143) | static void
  function mpt_build_bus_entries (line 167) | static void
  function mpt_build_ioapic_entries (line 183) | static void
  function mpt_count_ioint_entries (line 195) | static int
  function mpt_generate_pci_int (line 211) | static void
  function mpt_build_ioint_entries (line 235) | static void
  function mptable_add_oemtbl (line 289) | void
  function mptable_build (line 297) | int

FILE: src/pci_ahci.c
  type sata_fis_type (line 64) | enum sata_fis_type {
  type ahci_ioreq (line 124) | struct ahci_ioreq {
  type ahci_port (line 137) | struct ahci_port {
  type ahci_cmd_hdr (line 181) | struct ahci_cmd_hdr {
  type ahci_prdt_entry (line 189) | struct ahci_prdt_entry {
  type pci_ahci_softc (line 196) | struct pci_ahci_softc {
  type ahci_port (line 217) | struct ahci_port
  function lba_to_msf (line 219) | static inline void lba_to_msf(uint8_t *buf, int lba)
  function ahci_generate_intr (line 231) | static void
  function ahci_write_fis (line 272) | static void
  function ahci_write_fis_piosetup (line 315) | static void
  function ahci_write_fis_sdb (line 325) | static void
  function ahci_write_fis_d2h (line 352) | static void
  function ahci_write_fis_d2h_ncq (line 385) | static void
  function ahci_write_reset_fis_d2h (line 400) | static void
  function ahci_check_stopped (line 417) | static void
  function ahci_port_stop (line 436) | static void
  function ahci_port_reset (line 488) | static void
  function ahci_reset (line 516) | static void
  function ata_string (line 540) | static void
  function atapi_string (line 553) | static void
  function ahci_build_iov (line 569) | static void
  function ahci_handle_rw (line 623) | static void
  function ahci_handle_flush (line 709) | static void
  function read_prdt (line 743) | static inline void
  function ahci_handle_dsm_trim (line 771) | static void
  function write_prdt (line 849) | static inline void
  function ahci_checksum (line 878) | static void
  function ahci_handle_read_log (line 889) | static void
  function handle_identify (line 913) | static void
  function handle_atapi_identify (line 1018) | static void
  function atapi_inquiry (line 1067) | static void
  function be16enc (line 1115) | static __inline void
  function be16dec (line 1124) | static __inline uint16_t
  function be32enc (line 1132) | static __inline void
  function be32dec (line 1143) | static __inline uint32_t
  function atapi_read_capacity (line 1153) | static void
  function atapi_read_toc (line 1167) | static void
  function atapi_report_luns (line 1348) | static void
  function atapi_read (line 1361) | static void
  function atapi_request_sense (line 1415) | static void
  function atapi_start_stop_unit (line 1436) | static void
  function atapi_mode_sense (line 1462) | static void
  function atapi_get_event_status_notification (line 1540) | static void
  function handle_packet_cmd (line 1575) | static void
  function ahci_handle_cmd (line 1640) | static void
  function ahci_handle_slot (line 1774) | static void
  function ahci_handle_port (line 1823) | static void
  function ata_ioreq_cb (line 1851) | static void
  function atapi_ioreq_cb (line 1925) | static void
  function pci_ahci_ioreq_init (line 1988) | static void
  function pci_ahci_port_write (line 2015) | static void
  function pci_ahci_host_write (line 2118) | static void
  function pci_ahci_write (line 2148) | static void
  function pci_ahci_host_read (line 2169) | static uint64_t
  function pci_ahci_port_read (line 2201) | static uint64_t
  function pci_ahci_read (line 2242) | static uint64_t
  function pci_ahci_init (line 2274) | static int
  function pci_ahci_hd_init (line 2373) | static int
  function pci_ahci_atapi_init (line 2379) | static int
  type pci_devemu (line 2388) | struct pci_devemu
  type pci_devemu (line 2396) | struct pci_devemu

FILE: src/pci_e82545.c
  type e1000_rx_desc (line 130) | struct e1000_rx_desc {
  type e1000_tx_desc (line 146) | struct e1000_tx_desc {
  type e1000_context_desc (line 167) | struct e1000_context_desc {
  type e1000_data_desc (line 196) | struct e1000_data_desc {
  type e1000_tx_desc (line 217) | struct e1000_tx_desc
  type e1000_context_desc (line 218) | struct e1000_context_desc
  type e1000_data_desc (line 219) | struct e1000_data_desc
  type ck_info (line 223) | struct ck_info {
  type eth_uni (line 244) | struct  eth_uni {
  type e82545_softc (line 250) | struct e82545_softc {
  type e82545_softc (line 360) | struct e82545_softc
  type e82545_softc (line 361) | struct e82545_softc
  type e82545_softc (line 362) | struct e82545_softc
  type e82545_softc (line 363) | struct e82545_softc
  type e82545_softc (line 364) | struct e82545_softc
  type e82545_softc (line 365) | struct e82545_softc
  type e82545_softc (line 366) | struct e82545_softc
  type vmnet_state (line 371) | struct vmnet_state {
  function drop_privileges (line 385) | static int drop_privileges(void) {
  function vmn_create (line 407) | static int
  function vmn_read (line 501) | static ssize_t
  function vmn_write (line 533) | static void
  function e82545_init_eeprom (line 559) | static void
  function e82545_write_mdi (line 588) | static void
  function e82545_read_mdi (line 595) | static uint32_t
  function e82545_eecd_strobe (line 622) | static void
  function e82545_itr_callback (line 735) | static void
  function e82545_icr_assert (line 754) | static void
  function e82545_ims_change (line 785) | static void
  function e82545_icr_deassert (line 813) | static void
  function e82545_intr_write (line 831) | static void
  function e82545_intr_read (line 862) | static uint32_t
  function e82545_devctl (line 896) | static void
  function e82545_rx_update_rdba (line 909) | static void
  function e82545_rx_ctl (line 921) | static void
  function e82545_tx_update_tdba (line 957) | static void
  function e82545_tx_ctl (line 968) | static void
  function e82545_bufsz (line 992) | static int
  function e82545_tap_callback (line 1011) | static void
  function e82545_carry (line 1141) | static uint16_t
  function e82545_buf_checksum (line 1151) | static uint16_t
  function e82545_iov_checksum (line 1173) | static uint16_t
  function e82545_txdesc_type (line 1205) | static int
  function e82545_transmit_checksum (line 1218) | static void
  function e82545_transmit_backend (line 1231) | static void
  function e82545_transmit_done (line 1240) | static void
  function e82545_transmit (line 1255) | static int
  function e82545_tx_run (line 1560) | static void
  type e82545_softc (line 1601) | struct e82545_softc
  function e82545_tx_start (line 1625) | static void
  function e82545_tx_enable (line 1633) | static void
  function e82545_tx_disable (line 1640) | static void
  function e82545_rx_enable (line 1649) | static void
  function e82545_rx_disable (line 1656) | static void
  function e82545_write_ra (line 1665) | static void
  function e82545_read_ra (line 1691) | static uint32_t
  function e82545_write_register (line 1720) | static void
  function e82545_read_register (line 1932) | static uint32_t
  function e82545_write (line 2205) | static void
  function e82545_read (line 2255) | static uint64_t
  function e82545_reset (line 2311) | static void
  function e82545_init (line 2399) | static int
  type pci_devemu (line 2460) | struct pci_devemu

FILE: src/pci_emul.c
  type funcinfo (line 61) | struct funcinfo {
  type intxinfo (line 67) | struct intxinfo {
  type slotinfo (line 73) | struct slotinfo {
  type businfo (line 78) | struct businfo {
  type businfo (line 86) | struct businfo
  type pci_devemu (line 106) | struct pci_devemu
  type pci_devinst (line 107) | struct pci_devinst
  type pci_devinst (line 108) | struct pci_devinst
  function CFGWRITE (line 112) | static __inline void
  function CFGREAD (line 124) | static __inline uint32_t
  function pci_parse_slot_usage (line 155) | static void
  function pci_parse_slot (line 161) | int
  function pci_valid_pba_offset (line 233) | static int
  function pci_emul_msix_twrite (line 247) | int
  function pci_emul_msix_tread (line 283) | uint64_t
  function pci_msix_table_bar (line 327) | int
  function pci_msix_pba_bar (line 337) | int
  function pci_emul_io_handler (line 347) | static int
  function pci_emul_mem_handler (line 374) | static int
  function pci_emul_alloc_resource (line 412) | static int
  function pci_emul_alloc_bar (line 430) | int
  function modify_bar_registration (line 442) | static void
  function unregister_bar (line 486) | static void
  function register_bar (line 493) | static void
  function porten (line 501) | static int
  function memen (line 512) | static int
  function update_bar_address (line 528) | static void
  function pci_emul_alloc_pbar (line 562) | int
  function pci_emul_add_capability (line 662) | static int
  type pci_devemu (line 701) | struct pci_devemu
  type pci_devemu (line 704) | struct pci_devemu
  function pci_emul_init (line 716) | static int
  function pci_populate_msicap (line 752) | void
  function pci_emul_add_msicap (line 769) | int
  function pci_populate_msixcap (line 779) | static void
  function pci_msix_table_init (line 806) | static void
  function pci_emul_add_msixcap (line 822) | int
  function msixcap_cfgwrite (line 855) | void
  function msicap_cfgwrite (line 880) | void
  function pciecap_cfgwrite (line 919) | static void
  function pci_emul_add_pciecap (line 929) | int
  function pci_emul_capwrite (line 955) | static void
  function pci_emul_iscap (line 1009) | static int
  function pci_emul_fallback_handler (line 1022) | static int
  function pci_emul_ecfg_handler (line 1037) | static int
  function pci_ecfg_base (line 1054) | uint64_t
  function init_pci (line 1064) | int
  function pci_apic_prt_entry (line 1183) | static void
  function pci_pirq_prt_entry (line 1197) | static void
  function pci_bus_write_dsdt (line 1221) | static void
  function pci_bus_write_dsdt (line 1246) | static void
  function pci_write_dsdt (line 1397) | void
  function pci_write_dsdt (line 1407) | void
  function pci_bus_configured (line 1428) | int
  function pci_msi_enabled (line 1435) | int
  function pci_msi_maxmsgnum (line 1441) | static int
  function pci_msix_enabled (line 1450) | int
  function pci_generate_msix (line 1457) | void
  function pci_generate_msi (line 1478) | void
  function pci_lintr_permitted (line 1488) | static bool
  function pci_lintr_request (line 1498) | void
  function pci_lintr_route (line 1527) | static void
  function pci_lintr_assert (line 1561) | void
  function pci_lintr_deassert (line 1578) | void
  function pci_lintr_update (line 1593) | static void
  function pci_count_lintr (line 1608) | int
  function pci_walk_lintr (line 1627) | void
  function pci_emul_is_mfdev (line 1653) | static int
  function pci_emul_hdrtype_fixup (line 1676) | static void
  function pci_emul_cmdsts_write (line 1701) | static void
  function pci_cfgrw (line 1765) | static void
  function pci_emul_cfgaddr (line 1905) | static int
  function pci_emul_cfgdata (line 1937) | static int
  type pci_emul_dsoftc (line 1969) | struct pci_emul_dsoftc {
  function pci_emul_dinit (line 1976) | static int
  function pci_emul_diow (line 2005) | static void
  function pci_emul_dior (line 2074) | static uint64_t
  type pci_devemu (line 2133) | struct pci_devemu

FILE: src/pci_fbuf.c
  type pci_fbuf_softc (line 91) | struct pci_fbuf_softc {
  type pci_fbuf_softc (line 120) | struct pci_fbuf_softc
  function pci_fbuf_usage (line 124) | static void
  function pci_fbuf_write (line 132) | static void
  function pci_fbuf_read (line 187) | static uint64_t
  function pci_fbuf_parse_opts (line 234) | static int
  function pci_fbuf_render (line 314) | static void
  function pci_fbuf_init (line 338) | static int
  type pci_devemu (line 423) | struct pci_devemu

FILE: src/pci_hostbridge.c
  function pci_hostbridge_init (line 33) | static int
  function pci_amd_hostbridge_init (line 48) | static int
  type pci_devemu (line 58) | struct pci_devemu
  type pci_devemu (line 64) | struct pci_devemu

FILE: src/pci_irq.c
  type pirq (line 61) | struct pirq {
  function pirq_valid_irq (line 77) | static bool
  function pirq_read (line 85) | uint8_t
  function pirq_write (line 92) | void
  function pci_irq_reserve (line 110) | void
  function pci_irq_use (line 119) | void
  function pci_irq_init (line 128) | void
  function pci_irq_assert (line 147) | void
  function pci_irq_deassert (line 167) | void
  function pirq_alloc_pin (line 188) | int
  function pirq_irq (line 232) | int
  function pirq_dsdt (line 241) | static void

FILE: src/pci_lpc.c
  type pci_devinst (line 58) | struct pci_devinst
  type lpc_uart_softc (line 66) | struct lpc_uart_softc {
  function lpc_device_parse (line 83) | int
  function lpc_uart_intr_assert (line 122) | static void
  function lpc_uart_intr_deassert (line 132) | static void
  function lpc_uart_io_handler (line 141) | static int
  function lpc_init (line 173) | static int
  function pci_lpc_write_dsdt (line 222) | static void
  function pci_lpc_sysres_dsdt (line 284) | static void
  function pci_lpc_uart_dsdt (line 315) | static void
  function pci_lpc_cfgwrite (line 342) | static int
  function pci_lpc_write (line 363) | static void
  function pci_lpc_read (line 369) | static uint64_t
  function pci_lpc_init (line 379) | static int
  function lpc_pirq_routed (line 426) | void
  type pci_devemu (line 440) | struct pci_devemu

FILE: src/pci_uart.c
  function pci_uart_intr_assert (line 45) | static void
  function pci_uart_intr_deassert (line 53) | static void
  function pci_uart_write (line 61) | static void
  function pci_uart_read (line 72) | static uint64_t
  function pci_uart_init (line 85) | static int
  type pci_devemu (line 113) | struct pci_devemu

FILE: src/pci_virtio_block.c
  type vtblk_config (line 84) | struct vtblk_config {
  type virtio_blk_hdr (line 106) | struct virtio_blk_hdr {
  type pci_vtblk_ioreq (line 128) | struct pci_vtblk_ioreq {
  type pci_vtblk_softc (line 138) | struct pci_vtblk_softc {
  type vqueue_info (line 151) | struct vqueue_info
  type virtio_consts (line 155) | struct virtio_consts
  type vtblk_config (line 158) | struct vtblk_config
  function pci_vtblk_reset (line 167) | static void
  function pci_vtblk_done_locked (line 180) | static void
  function pci_vtblk_done (line 204) | static void
  function pci_vtblk_proc (line 214) | static void
  function pci_vtblk_notify (line 302) | static void
  function pci_vtblk_init (line 311) | static int
  function pci_vtblk_cfgwrite (line 404) | static int
  function pci_vtblk_cfgread (line 412) | static int
  type pci_devemu (line 424) | struct pci_devemu

FILE: src/pci_virtio_net_tap.c
  type virtio_net_config (line 96) | struct virtio_net_config {
  type virtio_net_rxhdr (line 112) | struct virtio_net_rxhdr {
  type pci_vtnet_softc (line 136) | struct pci_vtnet_softc {
  type virtio_consts (line 163) | struct virtio_consts
  type virtio_net_config (line 166) | struct virtio_net_config
  function pci_vtnet_txwait (line 178) | static void
  function pci_vtnet_rxwait (line 194) | static void
  function pci_vtnet_reset (line 207) | static void
  function pci_vtnet_tap_tx (line 236) | static void
  type iovec (line 267) | struct iovec
  type iovec (line 268) | struct iovec
  type iovec (line 270) | struct iovec
  function pci_vtnet_tap_rx (line 289) | static void
  function pci_vtnet_tap_callback (line 379) | static void
  type pci_vtnet_softc (line 396) | struct pci_vtnet_softc
  function pci_vtnet_ping_rxq (line 423) | static void
  function pci_vtnet_proctx (line 437) | static void
  function pci_vtnet_ping_txq (line 466) | static void
  type pci_vtnet_softc (line 491) | struct pci_vtnet_softc
  type vqueue_info (line 492) | struct vqueue_info
  function pci_vtnet_ping_ctlq (line 540) | static void
  function pci_vtnet_parsemac (line 548) | static int
  function pci_vtnet_init (line 572) | static int
  function pci_vtnet_cfgwrite (line 718) | static int
  function pci_vtnet_cfgread (line 739) | static int
  function pci_vtnet_neg_features (line 750) | static void
  type pci_devemu (line 764) | struct pci_devemu

FILE: src/pci_virtio_net_vmnet.c
  type virtio_net_config (line 114) | struct virtio_net_config {
  type virtio_net_rxhdr (line 130) | struct virtio_net_rxhdr {
  type pci_vtnet_softc (line 153) | struct pci_vtnet_softc {
  type virtio_consts (line 178) | struct virtio_consts
  type virtio_net_config (line 181) | struct virtio_net_config
  type vmnet_state (line 190) | struct vmnet_state {
  type pci_vtnet_softc (line 199) | struct pci_vtnet_softc
  function drop_privileges (line 206) | static int drop_privileges(void) {
  function vmn_create (line 228) | static int
  function vmn_read (line 324) | static ssize_t
  function vmn_write (line 356) | static void
  function pci_vtnet_txwait (line 385) | static void
  function pci_vtnet_rxwait (line 401) | static void
  function pci_vtnet_reset (line 414) | static void
  function pci_vtnet_tap_tx (line 443) | static void
  type iovec (line 474) | struct iovec
  type iovec (line 475) | struct iovec
  type iovec (line 477) | struct iovec
  function pci_vtnet_tap_rx (line 496) | static void
  function pci_vtnet_tap_callback (line 589) | static void
  function pci_vtnet_ping_rxq (line 600) | static void
  function pci_vtnet_proctx (line 614) | static void
  function pci_vtnet_ping_txq (line 643) | static void
  type pci_vtnet_softc (line 668) | struct pci_vtnet_softc
  type vqueue_info (line 669) | struct vqueue_info
  function pci_vtnet_ping_ctlq (line 717) | static void
  function pci_vtnet_init (line 724) | static int
  function pci_vtnet_cfgwrite (line 807) | static int
  function pci_vtnet_cfgread (line 828) | static int
  function pci_vtnet_neg_features (line 839) | static void
  type pci_devemu (line 853) | struct pci_devemu

FILE: src/pci_virtio_rnd.c
  type pci_vtrnd_softc (line 64) | struct pci_vtrnd_softc {
  type vqueue_info (line 74) | struct vqueue_info
  type virtio_consts (line 76) | struct virtio_consts
  function pci_vtrnd_reset (line 89) | static void
  function pci_vtrnd_notify (line 101) | static void
  function pci_vtrnd_init (line 135) | static int
  type pci_devemu (line 184) | struct pci_devemu

FILE: src/pm.c
  type mevent (line 43) | struct mevent
  function reset_handler (line 52) | static int
  function sci_assert (line 82) | static void
  function sci_deassert (line 91) | static void
  function sci_update (line 122) | static void
  function pm1_status_handler (line 145) | static int
  function pm1_enable_handler (line 169) | static int
  function power_button_handler (line 195) | static void
  function pm1_control_handler (line 220) | static int
  function smi_cmd_handler (line 260) | static int
  function sci_init (line 293) | void

FILE: src/post.c
  function post_data_handler (line 36) | static int

FILE: src/ps2kbd.c
  type fifo (line 58) | struct fifo {
  type ps2kbd_softc (line 69) | struct ps2kbd_softc {
  function fifo_init (line 81) | static void
  function fifo_reset (line 90) | static void
  function fifo_put (line 100) | static void
  function fifo_get (line 113) | static int
  function ps2kbd_read (line 129) | int
  function ps2kbd_write (line 141) | void
  function ps2kbd_keysym_queue (line 213) | static void
  function ps2kbd_event (line 448) | static void
  type ps2kbd_softc (line 467) | struct ps2kbd_softc
  type atkbdc_softc (line 468) | struct atkbdc_softc
  type ps2kbd_softc (line 470) | struct ps2kbd_softc
  type ps2kbd_softc (line 472) | struct ps2kbd_softc

FILE: src/ps2mouse.c
  type fifo (line 91) | struct fifo {
  type ps2mouse_softc (line 102) | struct ps2mouse_softc {
  function fifo_init (line 120) | static void
  function fifo_reset (line 129) | static void
  function fifo_put (line 139) | static void
  function fifo_get (line 152) | static int
  function movement_reset (line 168) | static void
  function movement_update (line 175) | static void
  function movement_get (line 184) | static void
  function ps2mouse_reset (line 232) | static void
  function ps2mouse_read (line 247) | int
  function ps2mouse_fifocnt (line 259) | int
  function ps2mouse_toggle (line 265) | void
  function ps2mouse_write (line 280) | void
  function ps2mouse_event (line 373) | static void
  type ps2mouse_softc (line 403) | struct ps2mouse_softc
  type atkbdc_softc (line 404) | struct atkbdc_softc
  type ps2mouse_softc (line 406) | struct ps2mouse_softc
  type ps2mouse_softc (line 408) | struct ps2mouse_softc

FILE: src/rfb.c
  type rfb_softc (line 75) | struct rfb_softc {
  type rfb_pixfmt (line 106) | struct rfb_pixfmt {
  type rfb_srvr_info (line 120) | struct rfb_srvr_info {
  type rfb_pixfmt_msg (line 127) | struct rfb_pixfmt_msg {
  type rfb_enc_msg (line 144) | struct rfb_enc_msg {
  type rfb_updt_msg (line 150) | struct rfb_updt_msg {
  type rfb_key_msg (line 159) | struct rfb_key_msg {
  type rfb_ptr_msg (line 166) | struct rfb_ptr_msg {
  type rfb_srvr_updt_msg (line 173) | struct rfb_srvr_updt_msg {
  type rfb_srvr_rect_hdr (line 179) | struct rfb_srvr_rect_hdr {
  type rfb_cuttext_msg (line 187) | struct rfb_cuttext_msg {
  function rfb_send_server_init_msg (line 194) | static void
  function rfb_send_resize_update_msg (line 219) | static void
  function rfb_recv_set_pixfmt_msg (line 240) | static void
  function rfb_recv_set_encodings_msg (line 249) | static void
  function fast_crc32 (line 279) | static __inline uint32_t
  function rfb_send_rect (line 297) | static long
  function rfb_send_all (line 389) | static long
  function rfb_send_screen (line 466) | static long
  function rfb_recv_update_msg (line 629) | static void
  function rfb_recv_key_msg (line 659) | static void
  function rfb_recv_ptr_msg (line 669) | static void
  function rfb_recv_cuttext_msg (line 679) | static void
  function timeval_delta (line 695) | static int64_t
  type rfb_softc (line 707) | struct rfb_softc
  type timeval (line 709) | struct timeval
  type timeval (line 710) | struct timeval
  function be32enc (line 750) | static void
  function rfb_handle (line 760) | static void
  type rfb_softc (line 927) | struct rfb_softc
  function sse42_supported (line 963) | static int
  function rfb_init (line 975) | int

FILE: src/rtc.c
  function time_t (line 51) | static time_t
  function rtc_init (line 65) | void
  function rtc_dsdt (line 98) | static void

FILE: src/smbiostbl.c
  type smbios_structure (line 64) | struct smbios_structure {
  type smbios_structure (line 70) | struct smbios_structure
  type smbios_template_entry (line 74) | struct smbios_template_entry {
  type smbios_entry_point (line 88) | struct smbios_entry_point {
  type smbios_table_type0 (line 120) | struct smbios_table_type0 {
  type smbios_table_type1 (line 140) | struct smbios_table_type1 {
  type smbios_table_type3 (line 161) | struct smbios_table_type3 {
  type smbios_table_type4 (line 193) | struct smbios_table_type4 {
  type smbios_table_type16 (line 229) | struct smbios_table_type16 {
  type smbios_table_type17 (line 249) | struct smbios_table_type17 {
  type smbios_table_type19 (line 278) | struct smbios_table_type19 {
  type smbios_table_type32 (line 293) | struct smbios_table_type32 {
  type smbios_table_type127 (line 302) | struct smbios_table_type127 {
  type smbios_table_type0 (line 308) | struct smbios_table_type0
  type smbios_table_type0 (line 309) | struct smbios_table_type0
  type smbios_table_type1 (line 331) | struct smbios_table_type1
  type smbios_table_type1 (line 332) | struct smbios_table_type1
  type smbios_structure (line 343) | struct smbios_structure
  type smbios_table_type3 (line 357) | struct smbios_table_type3
  type smbios_table_type3 (line 358) | struct smbios_table_type3
  type smbios_table_type4 (line 384) | struct smbios_table_type4
  type smbios_table_type4 (line 385) | struct smbios_table_type4
  type smbios_structure (line 421) | struct smbios_structure
  type smbios_table_type16 (line 425) | struct smbios_table_type16
  type smbios_table_type16 (line 426) | struct smbios_table_type16
  type smbios_structure (line 436) | struct smbios_structure
  type smbios_table_type17 (line 440) | struct smbios_table_type17
  type smbios_table_type17 (line 441) | struct smbios_table_type17
  type smbios_structure (line 476) | struct smbios_structure
  type smbios_table_type19 (line 480) | struct smbios_table_type19
  type smbios_table_type19 (line 481) | struct smbios_table_type19
  type smbios_structure (line 490) | struct smbios_structure
  type smbios_table_type32 (line 494) | struct smbios_table_type32
  type smbios_table_type32 (line 495) | struct smbios_table_type32
  type smbios_table_type127 (line 500) | struct smbios_table_type127
  type smbios_table_type127 (line 501) | struct smbios_table_type127
  type smbios_structure (line 504) | struct smbios_structure
  type smbios_template_entry (line 508) | struct smbios_template_entry
  type smbios_structure (line 509) | struct smbios_structure
  type smbios_structure (line 512) | struct smbios_structure
  type smbios_structure (line 515) | struct smbios_structure
  type smbios_structure (line 518) | struct smbios_structure
  type smbios_structure (line 521) | struct smbios_structure
  type smbios_structure (line 524) | struct smbios_structure
  type smbios_structure (line 527) | struct smbios_structure
  type smbios_structure (line 530) | struct smbios_structure
  type smbios_structure (line 533) | struct smbios_structure
  function smbios_generic_initializer (line 542) | static int
  function smbios_type1_initializer (line 580) | static int
  function smbios_type4_initializer (line 632) | static int
  function smbios_type16_initializer (line 664) | static int
  function smbios_type17_initializer (line 681) | static int
  function smbios_type19_initializer (line 725) | static int
  function smbios_ep_initializer (line 752) | static void
  function smbios_ep_finalizer (line 769) | static void
  function smbios_build (line 793) | int

FILE: src/sockstream.c
  function stream_read (line 40) | ssize_t
  function stream_write (line 64) | ssize_t

FILE: src/task_switch.c
  type tss32 (line 47) | struct tss32 {
  type tss32 (line 87) | struct tss32
  function GETREG (line 93) | static uint64_t
  function SETREG (line 104) | static void
  function usd_to_seg_desc (line 113) | static struct seg_desc
  function sel_exception (line 144) | static void
  function desc_table_limit_check (line 166) | static int
  function desc_table_rw (line 196) | static int
  function desc_table_read (line 224) | static int
  function desc_table_write (line 231) | static int
  function read_tss_descriptor (line 245) | static int
  function code_desc (line 270) | static bool
  function stack_desc (line 277) | static bool
  function data_desc (line 284) | static bool
  function ldt_desc (line 291) | static bool
  type user_segment_descriptor (line 298) | struct user_segment_descriptor
  function validate_seg_desc (line 302) | static int
  function tss32_save (line 428) | static void
  function update_seg_desc (line 461) | static void
  function tss32_restore (line 473) | static int
  function push_errcode (line 617) | static int
  type vm_exit (line 698) | struct vm_exit
  function vmexit_task_switch (line 700) | int

FILE: src/uart_emul.c
  type termios (line 67) | struct termios
  type fifo (line 82) | struct fifo {
  type ttyfd (line 90) | struct ttyfd {
  type uart_softc (line 97) | struct uart_softc {
  type ev_type (line 123) | enum ev_type
  function ttyclose (line 125) | static void
  function ttyopen (line 132) | static void
  function ttyread (line 149) | static int
  function ttywrite (line 160) | static void
  function rxfifo_reset (line 167) | static void
  function rxfifo_available (line 198) | static int
  function rxfifo_putchar (line 207) | static int
  function rxfifo_getchar (line 233) | static int
  function rxfifo_numchars (line 258) | static int
  function uart_opentty (line 266) | static void
  function uart_intr_reason (line 283) | static int
  function uart_reset (line 299) | static void
  function uart_toggle_intr (line 315) | static void
  function uart_drain (line 328) | static void
  function uart_write (line 359) | void
  function uart_read (line 490) | uint8_t
  function uart_legacy_alloc (line 577) | int
  type uart_softc (line 594) | struct uart_softc
  type uart_softc (line 598) | struct uart_softc
  type uart_softc (line 600) | struct uart_softc
  function uart_tty_backend (line 613) | static int
  function uart_set_backend (line 631) | int

FILE: src/vga.c
  type vga_softc (line 51) | struct vga_softc {
  function vga_in_reset (line 176) | static bool
  function vga_check_size (line 185) | static void
  function vga_get_pixel (line 215) | static uint32_t
  function vga_render_graphics (line 244) | static void
  function vga_get_text_pixel (line 259) | static uint32_t
  function vga_render_text (line 309) | static void
  function vga_render (line 324) | void
  function vga_mem_rd_handler (line 344) | static uint64_t
  function vga_mem_wr_handler (line 404) | static void
  function vga_mem_handler (line 658) | static int
  function vga_port_in_handler (line 719) | static int
  function vga_port_out_handler (line 947) | static int
  function vga_port_handler (line 1221) | static int
  type inout_port (line 1276) | struct inout_port
  type vga_softc (line 1277) | struct vga_softc
  type vga_softc (line 1280) | struct vga_softc
  type inout_port (line 1282) | struct inout_port

FILE: src/virtio.c
  function vi_softc_linkup (line 54) | void
  function vi_reset_dev (line 83) | void
  function vi_set_io_bar (line 109) | void
  function vi_intr_init (line 129) | int
  function vi_vq_init (line 159) | static void
  function _vq_record (line 197) | static inline void
  function vq_getchain (line 249) | int
  function vq_retchain (line 375) | void
  function vq_relchain (line 389) | void
  function vq_endchains (line 431) | void
  type config_reg (line 472) | struct config_reg {
  type config_reg (line 491) | struct config_reg
  type config_reg (line 494) | struct config_reg
  function vi_pci_read (line 517) | uint64_t
  function vi_pci_write (line 637) | void

FILE: src/vmm/intel/vmcs.c
  function vmcs_fix_regval (line 35) | static uint64_t
  function vmcs_field_encoding (line 52) | static uint32_t
  function vmcs_seg_desc_encoding (line 102) | static int
  function vmcs_getreg (line 164) | int
  function vmcs_setreg (line 189) | int
  function vmcs_setdesc (line 209) | int
  function vmcs_getdesc (line 228) | int

FILE: src/vmm/intel/vmx.c
  type seg_desc (line 148) | struct seg_desc
  function reg_read (line 151) | static __inline uint64_t
  function reg_write (line 159) | static __inline void
  function hvdump (line 164) | static void hvdump(int vcpu) {
  function u_long (line 449) | u_long
  function u_long (line 455) | u_long
  function vmx_cleanup (line 461) | static int
  function vmx_init (line 467) | static int
  function vmx_setup_cr_shadow (line 521) | static int
  type vm (line 554) | struct vm
  type vmx (line 556) | struct vmx
  type vmx (line 558) | struct vmx
  type vmx (line 560) | struct vmx
  function vmx_vcpu_init (line 566) | static int
  function vmx_handle_cpuid (line 695) | static int
  function vmx_run_trace (line 716) | static __inline void
  function vmx_exit_trace (line 727) | static __inline void
  function vmx_set_int_window_exiting (line 749) | static void __inline
  function vmx_clear_int_window_exiting (line 759) | static void __inline
  function vmx_set_nmi_window_exiting (line 769) | static void __inline
  function vmx_clear_nmi_window_exiting (line 780) | static void __inline
  function vmx_inject_nmi (line 791) | static void
  function vmx_inject_interrupts (line 817) | static void
  function vmx_restore_nmi_blocking (line 1009) | static void
  function vmx_clear_nmi_blocking (line 1020) | static void
  function vmx_assert_nmi_blocking (line 1031) | static void
  function vmx_emulate_xsetbv (line 1041) | static int
  function vmx_get_guest_reg (line 1114) | static uint64_t
  function vmx_set_guest_reg (line 1155) | static void
  function vmx_emulate_cr0_access (line 1212) | static int
  function vmx_emulate_cr4_access (line 1277) | static int
  function vmx_emulate_cr8_access (line 1297) | static int
  function vmx_cpl (line 1325) | static int
  function vmx_cpu_mode (line 1334) | static enum vm_cpu_mode
  function vmx_paging_mode (line 1352) | static enum vm_paging_mode
  function inout_str_index (line 1366) | static uint64_t
  function inout_str_count (line 1379) | static uint64_t
  function inout_str_addrsize (line 1394) | static int
  function inout_str_seginfo (line 1412) | static void
  function vmx_paging_info (line 1429) | static void
  function vmexit_inst_emul (line 1438) | static void
  function ept_fault_type (line 1469) | static int
  function ept_emulation_fault (line 1484) | static bool
  function apic_access_virtualization (line 1512) | static __inline int
  function x2apic_virtualization (line 1521) | static __inline int
  function vmx_handle_apic_write (line 1530) | static int
  function apic_access_fault (line 1603) | static bool
  function vmx_handle_apic_access (line 1614) | static int
  function vmx_task_switch_reason (line 1701) | static enum task_switch_reason
  function emulate_wrmsr (line 1721) | static int
  function emulate_rdmsr (line 1734) | static int
  function vmx_exit_process (line 1756) | static int
  function vmx_run (line 2169) | static int
  function vmx_vm_cleanup (line 2251) | static void
  function vmx_vcpu_cleanup (line 2261) | static void
  function vmx_get_intr_shadow (line 2267) | static int
  function vmx_modify_intr_shadow (line 2278) | static int
  function vmx_shadow_reg (line 2304) | static int
  function vmx_getreg (line 2367) | static int
  function vmx_setreg (line 2384) | static int
  function vmx_getdesc (line 2439) | static int
  function vmx_setdesc (line 2445) | static int
  function vmx_getcap (line 2451) | static int
  function vmx_setcap (line 2485) | static int
  type vlapic_vtx (line 2561) | struct vlapic_vtx {
  type vlapic (line 2733) | struct vlapic
  type vmx (line 2736) | struct vmx
  type vlapic (line 2737) | struct vlapic
  type vlapic_vtx (line 2738) | struct vlapic_vtx
  type vlapic_vtx (line 2742) | struct vlapic_vtx
  type vlapic (line 2744) | struct vlapic
  type LAPIC (line 2747) | struct LAPIC
  type vlapic_vtx (line 2749) | struct vlapic_vtx
  function vmx_vlapic_cleanup (line 2757) | static void
  function vmx_vcpu_interrupt (line 2764) | static void
  type vmm_ops (line 2773) | struct vmm_ops

FILE: src/vmm/intel/vmx_msr.c
  function vmx_ctl_allows_one_setting (line 42) | static bool
  function vmx_ctl_allows_zero_setting (line 51) | static bool
  function vmx_set_ctlreg (line 60) | int vmx_set_ctlreg(int vcpu_id, uint32_t field,
  function pat_valid (line 121) | static bool
  function vmx_msr_init (line 140) | void
  function vmx_msr_guest_init (line 205) | void
  function vmx_rdmsr (line 234) | int
  function vmx_wrmsr (line 287) | int

FILE: src/vmm/io/vatpic.c
  type irqstate (line 45) | enum irqstate {
  type atpic (line 53) | struct atpic {
  type vatpic (line 71) | struct vatpic {
  type vatpic (line 102) | struct vatpic
  function master_atpic (line 104) | static __inline bool
  function vatpic_get_highest_isrpin (line 114) | static __inline int
  function vatpic_get_highest_irrpin (line 138) | static __inline int
  function vatpic_notify_intr (line 183) | static void
  function vatpic_icw1 (line 256) | static int
  function vatpic_icw2 (line 286) | static int
  function vatpic_icw3 (line 298) | static int
  function vatpic_icw4 (line 308) | static int
  function vatpic_ocw1 (line 336) | static int
  function vatpic_ocw2 (line 346) | static int
  function vatpic_ocw3 (line 378) | static int
  function vatpic_set_pinstate (line 401) | static void
  function vatpic_set_irqstate (line 443) | static int
  function vatpic_assert_irq (line 476) | int
  function vatpic_deassert_irq (line 482) | int
  function vatpic_pulse_irq (line 488) | int
  function vatpic_set_irq_trigger (line 494) | int
  function vatpic_pending_intr (line 531) | void
  function vatpic_pin_accepted (line 563) | static void
  function vatpic_intr_accepted (line 579) | void
  function vatpic_read (line 607) | static int
  function vatpic_write (line 644) | static int
  function vatpic_master_handler (line 691) | int
  function vatpic_slave_handler (line 711) | int
  function vatpic_elc_handler (line 731) | int
  type vatpic (line 773) | struct vatpic
  type vm (line 774) | struct vm
  type vatpic (line 776) | struct vatpic
  type vatpic (line 778) | struct vatpic
  type vatpic (line 780) | struct vatpic
  function vatpic_cleanup (line 788) | void

FILE: src/vmm/io/vatpit.c
  type vatpit_callout_arg (line 65) | struct vatpit_callout_arg {
  type channel (line 70) | struct channel {
  type vatpit (line 86) | struct vatpit {
  type vatpit (line 94) | struct vatpit
  function vatpit_get_out (line 96) | static int
  function vatpit_callout_handler (line 118) | static void
  function pit_timer_start_cntr0 (line 154) | static void
  function pit_update_counter (line 181) | static uint16_t
  function pit_readback1 (line 218) | static int
  function pit_readback (line 249) | static int
  function vatpit_update_mode (line 269) | static int
  function vatpit_handler (line 309) | int
  function vatpit_nmisc_handler (line 393) | int
  type vatpit (line 414) | struct vatpit
  type vm (line 415) | struct vm
  type vatpit (line 417) | struct vatpit
  type bintime (line 418) | struct bintime
  type vatpit_callout_arg (line 419) | struct vatpit_callout_arg
  type vatpit (line 422) | struct vatpit
  type vatpit (line 424) | struct vatpit
  function vatpit_cleanup (line 442) | void

FILE: src/vmm/io/vhpet.c
  type vhpet_callout_arg (line 60) | struct vhpet_callout_arg {
  type vhpet (line 65) | struct vhpet {
  type vhpet (line 88) | struct vhpet
  function vhpet_capabilities (line 91) | static uint64_t
  function vhpet_counter_enabled (line 106) | static __inline bool
  function vhpet_timer_msi_enabled (line 113) | static __inline bool
  function vhpet_timer_ioapic_pin (line 124) | static __inline int
  function vhpet_counter (line 137) | static uint32_t
  function vhpet_timer_clear_isr (line 163) | static void
  function vhpet_periodic_timer (line 176) | static __inline bool
  function vhpet_timer_interrupt_enabled (line 183) | static __inline bool
  function vhpet_timer_edge_trig (line 190) | static __inline bool
  function vhpet_timer_interrupt (line 203) | static void
  function vhpet_adjust_compval (line 240) | static void
  function vhpet_handler (line 266) | static void
  function vhpet_stop_timer (line 304) | static void
  function vhpet_start_timer (line 325) | static void
  function vhpet_start_counting (line 348) | static void
  function vhpet_stop_counting (line 364) | static void
  function update_register (line 374) | static __inline void
  function vhpet_timer_update_config (line 382) | static void
  function vhpet_mmio_write (line 459) | int
  function vhpet_mmio_read (line 610) | int
  type vhpet (line 693) | struct vhpet
  type vm (line 694) | struct vm
  type vhpet (line 697) | struct vhpet
  type vhpet_callout_arg (line 699) | struct vhpet_callout_arg
  type bintime (line 700) | struct bintime
  type vhpet (line 702) | struct vhpet
  type vhpet (line 704) | struct vhpet
  function vhpet_cleanup (line 737) | void
  function vhpet_getcap (line 748) | int

FILE: src/vmm/io/vioapic.c
  type vioapic (line 50) | struct vioapic {
  function vioapic_send_intr (line 89) | static void
  function vioapic_set_pinstate (line 118) | static void
  type irqstate (line 155) | enum irqstate {
  function vioapic_set_irqstate (line 161) | static int
  function vioapic_assert_irq (line 189) | int
  function vioapic_deassert_irq (line 196) | int
  function vioapic_pulse_irq (line 203) | int
  function vioapic_update_tmr (line 214) | static void
  function vioapic_read (line 254) | static uint32_t
  function vioapic_write (line 286) | static void
  function vioapic_mmio_rw (line 358) | static int
  function vioapic_mmio_read (line 396) | int
  function vioapic_mmio_write (line 409) | int
  function vioapic_process_eoi (line 421) | void
  type vioapic (line 453) | struct vioapic
  type vm (line 454) | struct vm
  type vioapic (line 457) | struct vioapic
  type vioapic (line 459) | struct vioapic
  type vioapic (line 461) | struct vioapic
  function vioapic_cleanup (line 473) | void
  function vioapic_pincount (line 479) | int

FILE: src/vmm/io/vlapic.c
  function vlapic_get_id (line 71) | static __inline uint32_t
  function x2apic_ldr (line 81) | static uint32_t
  function vlapic_dfr_write_handler (line 93) | void
  function vlapic_ldr_write_handler (line 118) | void
  function vlapic_id_write_handler (line 136) | void
  function vlapic_timer_divisor (line 149) | static int
  function vlapic_dump_lvt (line 175) | static inline void
  function vlapic_get_ccr (line 184) | static uint32_t
  function vlapic_dcr_write_handler (line 216) | void
  function vlapic_esr_write_handler (line 242) | void
  function vlapic_set_intr_ready (line 252) | int
  type vlapic (line 300) | struct vlapic
  type LAPIC (line 302) | struct LAPIC
  function lvt_off_to_idx (line 321) | static __inline int
  function vlapic_get_lvt (line 358) | static __inline uint32_t
  function vlapic_lvt_write_handler (line 369) | void
  function vlapic_mask_lvts (line 403) | static void
  function vlapic_fire_lvt (line 430) | static int
  function dump_isrvec_stk (line 464) | static void
  function vlapic_update_ppr (line 483) | static void
  function vlapic_process_eoi (line 550) | static void
  function vlapic_get_lvt_field (line 586) | static __inline int
  function vlapic_periodic_timer (line 593) | static __inline int
  function vlapic_set_error (line 605) | void
  function vlapic_fire_timer (line 625) | static void
  function vlapic_fire_cmci (line 641) | void
  function vlapic_trigger_lvt (line 655) | int
  function vlapic_callout_handler (line 713) | static void
  function vlapic_icrtmr_write_handler (line 777) | void
  function vlapic_calcdest (line 812) | static void
  function vlapic_set_tpr (line 909) | static void
  function vlapic_get_tpr (line 922) | static uint8_t
  function vlapic_set_cr8 (line 930) | void
  function vlapic_get_cr8 (line 944) | uint64_t
  function vlapic_icrlo_write_handler (line 953) | int
  function vlapic_self_ipi_handler (line 1069) | void
  function vlapic_pending_intr (line 1083) | int
  function vlapic_intr_accepted (line 1113) | void
  function vlapic_svr_write_handler (line 1152) | void
  function vlapic_read (line 1188) | int
  function vlapic_write (line 1335) | int
  function vlapic_reset (line 1469) | static void
  function vlapic_init (line 1496) | void
  function vlapic_cleanup (line 1523) | void
  function vlapic_get_apicbase (line 1530) | uint64_t
  function vlapic_set_apicbase (line 1537) | int
  function vlapic_set_x2apic_state (line 1550) | void
  function vlapic_deliver_intr (line 1585) | void
  function vlapic_post_intr (line 1619) | void
  function vlapic_enabled (line 1638) | bool
  function vlapic_set_tmr (line 1650) | static void
  function vlapic_reset_tmr (line 1670) | void
  function vlapic_set_tmr_level (line 1681) | void

FILE: src/vmm/io/vpmtmr.c
  type vpmtmr (line 47) | struct vpmtmr {
  type vpmtmr (line 54) | struct vpmtmr
  type vpmtmr (line 57) | struct vpmtmr
  type bintime (line 58) | struct bintime
  type vpmtmr (line 60) | struct vpmtmr
  type vpmtmr (line 62) | struct vpmtmr
  function vpmtmr_cleanup (line 72) | void
  function vpmtmr_handler (line 79) | int

FILE: src/vmm/io/vrtc.c
  type rtcdev (line 60) | struct rtcdev {
  type rtcdev (line 79) | struct rtcdev
  type rtcdev (line 80) | struct rtcdev
  type vrtc (line 84) | struct vrtc {
  type clocktime (line 94) | struct clocktime {
  type vrtc (line 124) | struct vrtc
  function leapyear (line 141) | static __inline int
  function clock_ct_to_ts (line 157) | static int
  function clock_ts_to_ct (line 192) | static void
  function divider_enabled (line 227) | static __inline bool
  function update_enabled (line 236) | static __inline bool
  function time_t (line 257) | static time_t
  function rtcset (line 277) | static __inline uint8_t
  function secs_to_rtc (line 287) | static void
  function rtcget (line 368) | static int
  function time_t (line 388) | static time_t
  function vrtc_time_update (line 504) | static int
  function sbintime_t (line 581) | static sbintime_t
  function vrtc_callout_reset (line 624) | static void
  function vrtc_callout_handler (line 639) | static void
  function vrtc_callout_check (line 678) | static __inline void
  function vrtc_set_reg_c (line 689) | static void
  function vrtc_set_reg_b (line 725) | static int
  function vrtc_set_reg_a (line 799) | static void
  function vrtc_set_time (line 843) | int
  function time_t (line 864) | time_t
  function vrtc_nvram_write (line 879) | int
  function vrtc_nvram_read (line 908) | int
  function vrtc_addr_handler (line 940) | int
  function vrtc_data_handler (line 963) | int
  function vrtc_reset (line 1061) | void
  type vrtc (line 1076) | struct vrtc
  type vm (line 1077) | struct vm
  type vrtc (line 1079) | struct vrtc
  type rtcdev (line 1080) | struct rtcdev
  type vrtc (line 1083) | struct vrtc
  type vrtc (line 1085) | struct vrtc
  function vrtc_cleanup (line 1118) | void

FILE: src/vmm/vmm.c
  type vlapic (line 60) | struct vlapic
  type vcpu (line 71) | struct vcpu {
  type mem_seg (line 97) | struct mem_seg {
  type vm (line 111) | struct vm {
  type vmm_ops (line 137) | struct vmm_ops
  function vcpu_cleanup (line 182) | static void
  function vcpu_init (line 193) | static void
  function vcpu_create (line 223) | int vcpu_create(struct vm *vm, int vcpu) {
  function vcpu_destroy (line 230) | void vcpu_destroy(struct vm *vm, int vcpu) {
  function vcpu_trace_exceptions (line 237) | int
  type vm_exit (line 243) | struct vm_exit
  type vm (line 244) | struct vm
  type vcpu (line 246) | struct vcpu
  function vmm_init (line 256) | int
  function vmm_cleanup (line 278) | int
  function vm_init (line 290) | static void
  function vm_create (line 320) | int
  function vm_free_mem_seg (line 341) | static void
  function vm_cleanup (line 351) | static void
  function vm_destroy (line 382) | void
  function vm_reinit (line 389) | int
  function vm_mem_allocated (line 414) | bool
  function vm_malloc (line 430) | int
  type vm (line 484) | struct vm
  function vm_gpabase2memseg (line 495) | int
  function vm_get_memobj (line 511) | int
  function vm_get_register (line 537) | int
  function vm_set_register (line 550) | int
  function is_descriptor_table (line 573) | static bool
  function is_segment_register (line 585) | static bool
  function vm_get_seg_desc (line 603) | int
  function vm_set_seg_desc (line 616) | int
  function vcpu_set_state_locked (line 631) | static int
  function vcpu_require_state (line 687) | static void
  function vcpu_require_state_locked (line 696) | static void
  function vm_set_rendezvous_func (line 705) | static void
  function vm_handle_rendezvous (line 727) | static void
  function vm_handle_hlt (line 764) | static int
  function vm_handle_inst_emul (line 850) | static int
  function vm_handle_suspend (line 931) | static int
  function vm_suspend (line 992) | int
  function vm_exit_suspended (line 1019) | void
  function vm_exit_rendezvous (line 1034) | void
  type vm (line 1048) | struct vm
  function vm_run (line 1050) | int
  function vm_restart_instruction (line 1132) | int
  function vm_exit_intinfo (line 1175) | int
  type exc_class (line 1203) | enum exc_class {
  function exception_class (line 1211) | static enum exc_class
  function nested_fault (line 1257) | static int
  function vcpu_exception_intinfo (line 1299) | static uint64_t
  function vm_entry_intinfo (line 1315) | int
  function vm_get_intinfo (line 1357) | int
  function vm_inject_exception (line 1371) | int
  function vm_inject_fault (line 1421) | void
  function vm_inject_pf (line 1436) | void
  function vm_inject_nmi (line 1454) | int
  function vm_nmi_pending (line 1469) | int
  function vm_nmi_clear (line 1482) | void
  function vm_inject_extint (line 1501) | int
  function vm_extint_pending (line 1516) | int
  function vm_extint_clear (line 1529) | void
  function vm_get_capability (line 1546) | int
  function vm_set_capability (line 1558) | int
  type vlapic (line 1570) | struct vlapic
  type vm (line 1571) | struct vm
  type vioapic (line 1576) | struct vioapic
  type vm (line 1577) | struct vm
  type vhpet (line 1583) | struct vhpet
  type vm (line 1584) | struct vm
  function vcpu_set_state (line 1590) | int
  function vcpu_get_state (line 1608) | enum vcpu_state
  function vm_activate_cpu (line 1626) | int
  function cpuset_t (line 1641) | cpuset_t
  function cpuset_t (line 1648) | cpuset_t
  type vm (line 1656) | struct vm
  function vm_get_x2apic_state (line 1662) | int
  function vm_set_x2apic_state (line 1673) | int
  function vcpu_notify_event (line 1696) | void
  function vm_apicid2vcpuid (line 1729) | int
  function vm_smp_rendezvous (line 1738) | void
  type vatpic (line 1782) | struct vatpic
  type vm (line 1783) | struct vm
  type vatpit (line 1788) | struct vatpit
  type vm (line 1789) | struct vm
  type vpmtmr (line 1794) | struct vpmtmr
  type vm (line 1795) | struct vm
  type vrtc (line 1801) | struct vrtc
  type vm (line 1802) | struct vm
  function vm_segment_name (line 1808) | enum vm_reg_name
  function vm_copy_teardown (line 1825) | void
  function vm_copy_setup (line 1832) | int
  function vm_copyin (line 1876) | void
  function vm_copyout (line 1893) | void

FILE: src/vmm/vmm_api.c
  type vm (line 48) | struct vm
  type vm_mmap_style (line 51) | enum vm_mmap_style
  function vcpu_freeze (line 57) | static void
  function vcpu_freeze_all (line 69) | static void
  function xh_vm_create (line 84) | int
  function xh_vm_destroy (line 105) | void
  function xh_vcpu_create (line 117) | int
  function xh_vcpu_destroy (line 124) | void
  function xh_vm_get_memory_seg (line 131) | int
  function setup_memory_segment (line 147) | static int
  function xh_vm_setup_memory (line 166) | int
  function xh_setup_bootrom_memory (line 203) | int
  function xh_setup_video_memory (line 217) | int
  function xh_vm_gla2gpa (line 249) | int
  function xh_vm_get_lowmem_limit (line 262) | uint32_t
  function xh_vm_set_lowmem_limit (line 268) | void
  function xh_vm_set_memflags (line 274) | void
  function xh_vm_get_lowmem_size (line 280) | size_t
  function xh_vm_get_highmem_size (line 286) | size_t
  function xh_vm_set_desc (line 292) | int
  function xh_vm_get_desc (line 309) | int
  function xh_vm_get_seg_desc (line 328) | int
  function xh_vm_set_register (line 339) | int
  function xh_vm_get_register (line 351) | int
  function xh_vm_run (line 363) | int
  function xh_vm_suspend (line 375) | int
  function xh_vm_reinit (line 381) | int
  function xh_vm_apicid2vcpu (line 393) | int
  function xh_vm_inject_exception (line 399) | int
  function xh_vm_lapic_irq (line 413) | int
  function xh_vm_lapic_local_irq (line 419) | int
  function xh_vm_lapic_msi (line 425) | int
  function xh_vm_ioapic_assert_irq (line 431) | int
  function xh_vm_ioapic_deassert_irq (line 437) | int
  function xh_vm_ioapic_pulse_irq (line 443) | int
  function xh_vm_ioapic_pincount (line 449) | int
  function xh_vm_isa_assert_irq (line 456) | int
  function xh_vm_isa_deassert_irq (line 470) | int
  function xh_vm_isa_pulse_irq (line 483) | int
  function xh_vm_isa_set_irq_trigger (line 496) | int
  function xh_vm_inject_nmi (line 502) | int
  function xh_vm_capability_name2type (line 521) | int
  function xh_vm_get_capability (line 549) | int
  function xh_vm_set_capability (line 561) | int
  function xh_vm_get_intinfo (line 573) | int
  function xh_vm_set_intinfo (line 585) | int
  type timeval (line 598) | struct timeval
  type timeval (line 601) | struct timeval
  function xh_vm_get_x2apic_state (line 633) | int
  function xh_vm_set_x2apic_state (line 639) | int
  function xh_vm_get_hpet_capabilities (line 651) | int
  function xh_vm_copy_setup (line 657) | int
  function xh_vm_copyin (line 699) | void
  function xh_vm_copyout (line 718) | void
  function xh_vm_rtc_write (line 737) | int
  function xh_vm_rtc_read (line 743) | int
  function xh_vm_rtc_settime (line 749) | int
  function xh_vm_rtc_gettime (line 755) | int
  function xh_vcpu_reset (line 762) | int
  function xh_vm_active_cpus (line 808) | int
  function xh_vm_suspended_cpus (line 815) | int
  function xh_vm_activate_cpu (line 822) | int
  function xh_vm_restart_instruction (line 834) | int
  function xh_vm_emulate_instruction (line 846) | int

FILE: src/vmm/vmm_callout.c
  function nanos_to_mat (line 44) | static inline uint64_t nanos_to_mat(uint64_t nanos) {
  function mat_to_nanos (line 48) | static inline uint64_t mat_to_nanos(uint64_t abs) {
  function sbt_to_nanos (line 52) | static inline uint64_t sbt_to_nanos(sbintime_t sbt) {
  function sbt_to_mat (line 61) | static inline uint64_t sbt_to_mat(sbintime_t sbt) {
  function binuptime (line 65) | void binuptime(struct bintime *bt) {
  function getmicrotime (line 74) | void getmicrotime(struct timeval *tv) {
  function dispatcher (line 84) | static void dispatcher(void* data) {
  function callout_init (line 119) | void callout_init(struct callout *c, int mpsafe) {
  function callout_stop_safe (line 132) | int callout_stop_safe(struct callout *c, int drain) {
  function callout_reset_sbt (line 168) | int callout_reset_sbt(struct callout *c, sbintime_t sbt, sbintime_t prec...
  function callout_system_init (line 199) | void callout_system_init(void) {

FILE: src/vmm/vmm_host.c
  type xsave_limits (line 37) | struct xsave_limits
  function vmm_host_state_init (line 39) | void
  type xsave_limits (line 56) | struct xsave_limits

FILE: src/vmm/vmm_instruction_emul.c
  type vie_op (line 81) | struct vie_op
  type vie_op (line 101) | struct vie_op
  type vm_reg_name (line 223) | enum vm_reg_name
  function vie_read_register (line 249) | static int
  function vie_calc_bytereg (line 259) | static void
  function vie_read_bytereg (line 285) | static int
  function vie_write_bytereg (line 306) | static int
  function vie_update_register (line 332) | int
  function u_long (line 382) | static u_long
  function u_long (line 417) | static u_long
  function emulate_mov (line 433) | static int
  function emulate_movx (line 548) | static int
  function get_gla (line 637) | static int
  function emulate_movs (line 690) | static int
  function emulate_stos (line 870) | static int
  function emulate_and (line 933) | static int
  function emulate_or (line 1022) | static int
  function emulate_cmp (line 1085) | static int
  function emulate_test (line 1166) | static int
  function emulate_sub (line 1215) | static int
  function emulate_stack_op (line 1274) | static int
  function emulate_push (line 1372) | static int
  function emulate_pop (line 1393) | static int
  function emulate_group1 (line 1414) | static int
  function emulate_bittest (line 1442) | static int
  function vmm_emulate_instruction (line 1484) | int
  function vie_alignment_check (line 1556) | int
  function vie_canonical_check (line 1569) | int
  function vie_size2mask (line 1588) | uint64_t
  function vie_calculate_gla (line 1596) | int
  function vie_init (line 1706) | void
  function pf_error_code (line 1724) | static int
  function vm_gla2gpa (line 1743) | int
  function vmm_fetch_instruction (line 1935) | int
  function vie_peek (line 1957) | static int
  function vie_advance (line 1968) | static void
  function segment_override (line 1975) | static bool
  function decode_prefixes (line 2004) | static int
  function decode_two_byte_opcode (line 2073) | static int
  function decode_opcode (line 2090) | static int
  function decode_modrm (line 2111) | static int
  function decode_sib (line 2194) | static int
  function decode_displacement (line 2258) | static int
  function decode_immediate (line 2292) | static int
  function decode_moffset (line 2346) | static int
  function verify_inst_length (line 2381) | static int
  function verify_gla (line 2395) | static int
  function vmm_decode_instruction (line 2446) | int

FILE: src/vmm/vmm_ioport.c
  type vm_exit (line 62) | struct vm_exit
  function emulate_inout_port (line 98) | static int
  function emulate_inout_str (line 146) | static int
  function vm_handle_inout (line 153) | int

FILE: src/vmm/vmm_lapic.c
  function lapic_set_intr (line 48) | int
  function lapic_set_local_intr (line 69) | int
  function lapic_intr_msi (line 96) | int
  function x2apic_msr (line 134) | static bool
  function u_int (line 143) | static u_int
  function lapic_msr (line 150) | bool
  function lapic_rdmsr (line 160) | int
  function lapic_wrmsr (line 180) | int
  function lapic_mmio_write (line 199) | int
  function lapic_mmio_read (line 221) | int

FILE: src/vmm/vmm_mem.c
  function vmm_mem_init (line 37) | int
  function vmm_mem_free (line 67) | void

FILE: src/vmm/vmm_stat.c
  type vmm_stat_type (line 45) | struct vmm_stat_type
  function vmm_stat_register (line 49) | void
  function vmm_stat_copy (line 69) | int
  function vmm_stat_init (line 101) | void
  function vmm_stat_free (line 108) | void
  function vmm_stat_desc_copy (line 114) | int

FILE: src/vmm/vmm_util.c
  type trapframe (line 34) | struct trapframe {
  function dump_trapframe (line 68) | void

FILE: src/vmm/x86.c
  function log2 (line 57) | static __inline int
  function x86_emulate_cpuid (line 64) | int

FILE: src/xhyve.c
  type vm_exit (line 77) | struct vm_exit
  type vm_exit (line 78) | struct vm_exit
  type vm_exit (line 103) | struct vm_exit
  type bhyvestats (line 105) | struct bhyvestats {
  type mt_vmm_info (line 118) | struct mt_vmm_info {
  function usage (line 126) | __attribute__ ((noreturn)) static void
  function show_version (line 160) | __attribute__ ((noreturn)) static void
  function xh_vm_inject_fault (line 171) | void
  function fbsdrun_vmexit_on_pause (line 190) | int
  function fbsdrun_vmexit_on_hlt (line 196) | int
  function fbsdrun_virtio_msix (line 202) | int
  function spinup_ap_realmode (line 208) | static void
  type mt_vmm_info (line 243) | struct mt_vmm_info
  function vcpu_add (line 281) | void
  function vcpu_delete (line 309) | static int
  function vmexit_handle_notify (line 321) | static int
  function vmexit_inout (line 328) | static int
  function vmexit_rdmsr (line 361) | static int
  function vmexit_wrmsr (line 390) | static int
  function vmexit_spinup_ap (line 407) | static int
  function vmexit_vmx (line 418) | static int
  function vmexit_bogus (line 434) | static int
  function vmexit_hlt (line 444) | static int
  function vmexit_pause (line 457) | static int
  function vmexit_mtrap (line 465) | static int
  function vmexit_inst_emul (line 475) | static int
  function vmexit_suspend (line 508) | static int
  function vcpu_set_capabilities (line 559) | void
  function vcpu_loop (line 601) | static void
  function num_vcpus_allowed (line 642) | static int
  function expand_number (line 648) | static int
  function parse_memsize (line 705) | static int
  function firmware_parse (line 729) | static int
  function remove_pidfile (line 786) | static void
  function setup_pidfile (line 799) | static int
  function main (line 841) | int

FILE: src/xmsr.c
  function emulate_wrmsr (line 39) | int
  function emulate_rdmsr (line 57) | int
  function init_msr (line 86) | int
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    "path": "src/sockstream.c",
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    "path": "src/task_switch.c",
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    "path": "src/vga.c",
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    "preview": "/*-\n * Copyright (c) 2013  Chris Torek <torek @ torek net>\n * Copyright (c) 2015 xhyve developers\n * All rights reserved"
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    "path": "src/vmm/intel/vmcs.c",
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    "path": "src/vmm/intel/vmx_msr.c",
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    "path": "src/vmm/io/vatpic.c",
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  },
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    "path": "src/vmm/io/vhpet.c",
    "chars": 19765,
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    "path": "src/vmm/io/vioapic.c",
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    "path": "src/vmm/io/vlapic.c",
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  },
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    "path": "src/vmm/io/vpmtmr.c",
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    "path": "src/vmm/io/vrtc.c",
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    "path": "src/vmm/vmm_instruction_emul.c",
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  },
  {
    "path": "test/tinycore.txt",
    "chars": 329,
    "preview": "These are binaries from\n    http://tinycorelinux.net\nwith the following patch applied:\n\nmkdir initrd\n( cd initrd ; zcat "
  },
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  },
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    "preview": "ARCHS = x86_64;\n\nCODE_SIGN_ENTITLEMENTS = src/xhyve-entitlements.plist\nOTHER_CODE_SIGN_FLAGS = -o library\n\nPRODUCT_BUNDL"
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  },
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    "path": "xhyverun-tinycorelinux.sh",
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    "preview": "#!/bin/sh\n\nPATH=\"build/Release:build:$PATH\"\n\nxhyve \\\n    -A \\\n    -m 1G \\\n    -s 0:0,hostbridge \\\n    -s 31,lpc \\\n    -l"
  },
  {
    "path": "xhyverun-windows.sh",
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    "preview": "#!/bin/sh\n\nBOOTVOLUME=\"<path of Windows iso>\"\nIMG=\"<path of disk image for Windows>\"\nFIRMWARE=\"<path of BHYVE_UEFI.fd>\"\n"
  }
]

// ... and 1 more files (download for full content)

About this extraction

This page contains the full source code of the machyve/xhyve GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 163 files (1.6 MB), approximately 564.8k tokens, and a symbol index with 1912 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.

Extracted by GitExtract — free GitHub repo to text converter for AI. Built by Nikandr Surkov.

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