[
  {
    "path": ".gitignore",
    "content": "test/ROMs/\ntest/tmp/\n\n# Byte-compiled / optimized / DLL files\n__pycache__/\n*.py[cod]\n*$py.class\n\n# C extensions\n*.so\n\n# Distribution / packaging\n.Python\nbuild/\ndevelop-eggs/\ndist/\ndownloads/\neggs/\n.eggs/\nlib/\nlib64/\nparts/\nsdist/\nvar/\nwheels/\n*.egg-info/\n.installed.cfg\n*.egg\nMANIFEST\n\n# PyInstaller\n#  Usually these files are written by a python script from a template\n#  before PyInstaller builds the exe, so as to inject date/other infos into it.\n*.manifest\n*.spec\n\n# Installer logs\npip-log.txt\npip-delete-this-directory.txt\n\n# Unit test / coverage reports\nhtmlcov/\n.tox/\n.coverage\n.coverage.*\n.cache\nnosetests.xml\ncoverage.xml\n*.cover\n.hypothesis/\n.pytest_cache/\n\n# Translations\n*.mo\n*.pot\n\n# Django stuff:\n*.log\nlocal_settings.py\ndb.sqlite3\n\n# Flask stuff:\ninstance/\n.webassets-cache\n\n# Scrapy stuff:\n.scrapy\n\n# Sphinx documentation\ndocs/_build/\n\n# PyBuilder\ntarget/\n\n# Jupyter Notebook\n.ipynb_checkpoints\n\n# pyenv\n.python-version\n\n# celery beat schedule file\ncelerybeat-schedule\n\n# SageMath parsed files\n*.sage.py\n\n# Environments\n.env\n.venv\nenv/\nvenv/\nENV/\nenv.bak/\nvenv.bak/\n\n# Spyder project settings\n.spyderproject\n.spyproject\n\n# Rope project settings\n.ropeproject\n\n# mkdocs documentation\n/site\n\n# mypy\n.mypy_cache/\n"
  },
  {
    "path": "LICENSE",
    "content": "                    GNU GENERAL PUBLIC LICENSE\n                       Version 3, 29 June 2007\n\n Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>\n Everyone is permitted to copy and distribute verbatim copies\n of this license document, but changing it is not allowed.\n\n                            Preamble\n\n  The GNU General Public License is a free, copyleft license for\nsoftware and other kinds of works.\n\n  The licenses for most software and other practical works are designed\nto take away your freedom to share and change the works.  By contrast,\nthe GNU General Public License is intended to guarantee your freedom to\nshare and change all versions of a program--to make sure it remains free\nsoftware for all its users.  We, the Free Software Foundation, use the\nGNU General Public License for most of our software; it applies also to\nany other work released this way by its authors.  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But this requirement does not apply\nif neither you nor any third party retains the ability to install\nmodified object code on the User Product (for example, the work has\nbeen installed in ROM).\n\n  The requirement to provide Installation Information does not include a\nrequirement to continue to provide support service, warranty, or updates\nfor a work that has been modified or installed by the recipient, or for\nthe User Product in which it has been modified or installed.  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If additional permissions\napply only to part of the Program, that part may be used separately\nunder those permissions, but the entire Program remains governed by\nthis License without regard to the additional permissions.\n\n  When you convey a copy of a covered work, you may at your option\nremove any additional permissions from that copy, or from any part of\nit.  (Additional permissions may be written to require their own\nremoval in certain cases when you modify the work.)  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If the Program as you\nreceived it, or any part of it, contains a notice stating that it is\ngoverned by this License along with a term that is a further\nrestriction, you may remove that term.  If a license document contains\na further restriction but permits relicensing or conveying under this\nLicense, you may add to a covered work material governed by the terms\nof that license document, provided that the further restriction does\nnot survive such relicensing or conveying.\n\n  If you add terms to a covered work in accord with this section, you\nmust place, in the relevant source files, a statement of the\nadditional terms that apply to those files, or a notice indicating\nwhere to find the applicable terms.\n\n  Additional terms, permissive or non-permissive, may be stated in the\nform of a separately written license, or stated as exceptions;\nthe above requirements apply either way.\n\n  8. Termination.\n\n  You may not propagate or modify a covered work except as expressly\nprovided under this License.  Any attempt otherwise to propagate or\nmodify it is void, and will automatically terminate your rights under\nthis License (including any patent licenses granted under the third\nparagraph of section 11).\n\n  However, if you cease all violation of this License, then your\nlicense from a particular copyright holder is reinstated (a)\nprovisionally, unless and until the copyright holder explicitly and\nfinally terminates your license, and (b) permanently, if the copyright\nholder fails to notify you of the violation by some reasonable means\nprior to 60 days after the cessation.\n\n  Moreover, your license from a particular copyright holder is\nreinstated permanently if the copyright holder notifies you of the\nviolation by some reasonable means, this is the first time you have\nreceived notice of violation of this License (for any work) from that\ncopyright holder, and you cure the violation prior to 30 days after\nyour receipt of the notice.\n\n  Termination of your rights under this section does not terminate the\nlicenses of parties who have received copies or rights from you under\nthis License.  If your rights have been terminated and not permanently\nreinstated, you do not qualify to receive new licenses for the same\nmaterial under section 10.\n\n  9. Acceptance Not Required for Having Copies.\n\n  You are not required to accept this License in order to receive or\nrun a copy of the Program.  Ancillary propagation of a covered work\noccurring solely as a consequence of using peer-to-peer transmission\nto receive a copy likewise does not require acceptance.  However,\nnothing other than this License grants you permission to propagate or\nmodify any covered work.  These actions infringe copyright if you do\nnot accept this License.  Therefore, by modifying or propagating a\ncovered work, you indicate your acceptance of this License to do so.\n\n  10. Automatic Licensing of Downstream Recipients.\n\n  Each time you convey a covered work, the recipient automatically\nreceives a license from the original licensors, to run, modify and\npropagate that work, subject to this License.  You are not responsible\nfor enforcing compliance by third parties with this License.\n\n  An \"entity transaction\" is a transaction transferring control of an\norganization, or substantially all assets of one, or subdividing an\norganization, or merging organizations.  If propagation of a covered\nwork results from an entity transaction, each party to that\ntransaction who receives a copy of the work also receives whatever\nlicenses to the work the party's predecessor in interest had or could\ngive under the previous paragraph, plus a right to possession of the\nCorresponding Source of the work from the predecessor in interest, if\nthe predecessor has it or can get it with reasonable efforts.\n\n  You may not impose any further restrictions on the exercise of the\nrights granted or affirmed under this License.  For example, you may\nnot impose a license fee, royalty, or other charge for exercise of\nrights granted under this License, and you may not initiate litigation\n(including a cross-claim or counterclaim in a lawsuit) alleging that\nany patent claim is infringed by making, using, selling, offering for\nsale, or importing the Program or any portion of it.\n\n  11. Patents.\n\n  A \"contributor\" is a copyright holder who authorizes use under this\nLicense of the Program or a work on which the Program is based.  The\nwork thus licensed is called the contributor's \"contributor version\".\n\n  A contributor's \"essential patent claims\" are all patent claims\nowned or controlled by the contributor, whether already acquired or\nhereafter acquired, that would be infringed by some manner, permitted\nby this License, of making, using, or selling its contributor version,\nbut do not include claims that would be infringed only as a\nconsequence of further modification of the contributor version.  For\npurposes of this definition, \"control\" includes the right to grant\npatent sublicenses in a manner consistent with the requirements of\nthis License.\n\n  Each contributor grants you a non-exclusive, worldwide, royalty-free\npatent license under the contributor's essential patent claims, to\nmake, use, sell, offer for sale, import and otherwise run, modify and\npropagate the contents of its contributor version.\n\n  In the following three paragraphs, a \"patent license\" is any express\nagreement or commitment, however denominated, not to enforce a patent\n(such as an express permission to practice a patent or covenant not to\nsue for patent infringement).  To \"grant\" such a patent license to a\nparty means to make such an agreement or commitment not to enforce a\npatent against the party.\n\n  If you convey a covered work, knowingly relying on a patent license,\nand the Corresponding Source of the work is not available for anyone\nto copy, free of charge and under the terms of this License, through a\npublicly available network server or other readily accessible means,\nthen you must either (1) cause the Corresponding Source to be so\navailable, or (2) arrange to deprive yourself of the benefit of the\npatent license for this particular work, or (3) arrange, in a manner\nconsistent with the requirements of this License, to extend the patent\nlicense to downstream recipients.  \"Knowingly relying\" means you have\nactual knowledge that, but for the patent license, your conveying the\ncovered work in a country, or your recipient's use of the covered work\nin a country, would infringe one or more identifiable patents in that\ncountry that you have reason to believe are valid.\n\n  If, pursuant to or in connection with a single transaction or\narrangement, you convey, or propagate by procuring conveyance of, a\ncovered work, and grant a patent license to some of the parties\nreceiving the covered work authorizing them to use, propagate, modify\nor convey a specific copy of the covered work, then the patent license\nyou grant is automatically extended to all recipients of the covered\nwork and works based on it.\n\n  A patent license is \"discriminatory\" if it does not include within\nthe scope of its coverage, prohibits the exercise of, or is\nconditioned on the non-exercise of one or more of the rights that are\nspecifically granted under this License.  You may not convey a covered\nwork if you are a party to an arrangement with a third party that is\nin the business of distributing software, under which you make payment\nto the third party based on the extent of your activity of conveying\nthe work, and under which the third party grants, to any of the\nparties who would receive the covered work from you, a discriminatory\npatent license (a) in connection with copies of the covered work\nconveyed by you (or copies made from those copies), or (b) primarily\nfor and in connection with specific products or compilations that\ncontain the covered work, unless you entered into that arrangement,\nor that patent license was granted, prior to 28 March 2007.\n\n  Nothing in this License shall be construed as excluding or limiting\nany implied license or other defenses to infringement that may\notherwise be available to you under applicable patent law.\n\n  12. No Surrender of Others' Freedom.\n\n  If conditions are imposed on you (whether by court order, agreement or\notherwise) that contradict the conditions of this License, they do not\nexcuse you from the conditions of this License.  If you cannot convey a\ncovered work so as to satisfy simultaneously your obligations under this\nLicense and any other pertinent obligations, then as a consequence you may\nnot convey it at all.  For example, if you agree to terms that obligate you\nto collect a royalty for further conveying from those to whom you convey\nthe Program, the only way you could satisfy both those terms and this\nLicense would be to refrain entirely from conveying the Program.\n\n  13. Use with the GNU Affero General Public License.\n\n  Notwithstanding any other provision of this License, you have\npermission to link or combine any covered work with a work licensed\nunder version 3 of the GNU Affero General Public License into a single\ncombined work, and to convey the resulting work.  The terms of this\nLicense will continue to apply to the part which is the covered work,\nbut the special requirements of the GNU Affero General Public License,\nsection 13, concerning interaction through a network will apply to the\ncombination as such.\n\n  14. Revised Versions of this License.\n\n  The Free Software Foundation may publish revised and/or new versions of\nthe GNU General Public License from time to time.  Such new versions will\nbe similar in spirit to the present version, but may differ in detail to\naddress new problems or concerns.\n\n  Each version is given a distinguishing version number.  If the\nProgram specifies that a certain numbered version of the GNU General\nPublic License \"or any later version\" applies to it, you have the\noption of following the terms and conditions either of that numbered\nversion or of any later version published by the Free Software\nFoundation.  If the Program does not specify a version number of the\nGNU General Public License, you may choose any version ever published\nby the Free Software Foundation.\n\n  If the Program specifies that a proxy can decide which future\nversions of the GNU General Public License can be used, that proxy's\npublic statement of acceptance of a version permanently authorizes you\nto choose that version for the Program.\n\n  Later license versions may give you additional or different\npermissions.  However, no additional obligations are imposed on any\nauthor or copyright holder as a result of your choosing to follow a\nlater version.\n\n  15. Disclaimer of Warranty.\n\n  THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY\nAPPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT\nHOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM \"AS IS\" WITHOUT WARRANTY\nOF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,\nTHE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\nPURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM\nIS WITH YOU.  SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF\nALL NECESSARY SERVICING, REPAIR OR CORRECTION.\n\n  16. Limitation of Liability.\n\n  IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING\nWILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS\nTHE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY\nGENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE\nUSE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF\nDATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD\nPARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),\nEVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF\nSUCH DAMAGES.\n\n  17. Interpretation of Sections 15 and 16.\n\n  If the disclaimer of warranty and limitation of liability provided\nabove cannot be given local legal effect according to their terms,\nreviewing courts shall apply local law that most closely approximates\nan absolute waiver of all civil liability in connection with the\nProgram, unless a warranty or assumption of liability accompanies a\ncopy of the Program in return for a fee.\n\n                     END OF TERMS AND CONDITIONS\n\n            How to Apply These Terms to Your New Programs\n\n  If you develop a new program, and you want it to be of the greatest\npossible use to the public, the best way to achieve this is to make it\nfree software which everyone can redistribute and change under these terms.\n\n  To do so, attach the following notices to the program.  It is safest\nto attach them to the start of each source file to most effectively\nstate the exclusion of warranty; and each file should have at least\nthe \"copyright\" line and a pointer to where the full notice is found.\n\n    <one line to give the program's name and a brief idea of what it does.>\n    Copyright (C) <year>  <name of author>\n\n    This program is free software: you can redistribute it and/or modify\n    it under the terms of the GNU General Public License as published by\n    the Free Software Foundation, either version 3 of the License, or\n    (at your option) any later version.\n\n    This program is distributed in the hope that it will be useful,\n    but WITHOUT ANY WARRANTY; without even the implied warranty of\n    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n    GNU General Public License for more details.\n\n    You should have received a copy of the GNU General Public License\n    along with this program.  If not, see <https://www.gnu.org/licenses/>.\n\nAlso add information on how to contact you by electronic and paper mail.\n\n  If the program does terminal interaction, make it output a short\nnotice like this when it starts in an interactive mode:\n\n    <program>  Copyright (C) <year>  <name of author>\n    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.\n    This is free software, and you are welcome to redistribute it\n    under certain conditions; type `show c' for details.\n\nThe hypothetical commands `show w' and `show c' should show the appropriate\nparts of the General Public License.  Of course, your program's commands\nmight be different; for a GUI interface, you would use an \"about box\".\n\n  You should also get your employer (if you work as a programmer) or school,\nif any, to sign a \"copyright disclaimer\" for the program, if necessary.\nFor more information on this, and how to apply and follow the GNU GPL, see\n<https://www.gnu.org/licenses/>.\n\n  The GNU General Public License does not permit incorporating your program\ninto proprietary programs.  If your program is a subroutine library, you\nmay consider it more useful to permit linking proprietary applications with\nthe library.  If this is what you want to do, use the GNU Lesser General\nPublic License instead of this License.  But first, please read\n<https://www.gnu.org/licenses/why-not-lgpl.html>.\n"
  },
  {
    "path": "README.md",
    "content": "## UPP\n\nUPP: Uplift Power Play\n\nA tool for parsing, dumping and modifying data in Radeon PowerPlay tables\n\n### Introduction\n\nUPP is able to parse and modify binary data structures of PowerPlay tables\ncommonly found on certain AMD Radeon GPUs. Drivers on recent AMD GPUs\nallow PowerPlay tables to be dynamically modified on runtime, which may be\nknown as \"soft\" PowerPlay table. On Linux, the PowerPlay table is by default\nfound at: `/sys/class/drm/card0/device/pp_table`.\n\nThis tool does very minimal interpretation of actual PowerPlay table values.\nBy design, it is mostly up to the user to do such thing.\n\nAlternatively, one can use this tool to get PowerPlay data by:\n\n* Extracting PowerPlay table from Video ROM image (see extract command)\n* Importing \"Soft PowerPlay\" table from Windows registry, directly from\n  offline Windows/System32/config/SYSTEM file on disk, so it would work\n  from Linux distro that has access to mounted Windows partition\n  (path to SYSTEM registry file is specified with `--from-registry` option)\n* Importing \"Soft PowerPlay\" table from \"More Powe Tool\" MPT file\n  (path to MPT file is specified with `--from-mpt option`)\n\nThis tool currently supports parsing and modifying PowerPlay tables found\non the following AMD GPU families:\n\n* Polaris\n* Vega\n* Radeon VII\n* Navi 10\n* Arcturus (MI100)\n* Navi 12 (PRO V520)\n* Navi 14\n* Navi 21 (Sienna Cichlid)\n* Navi 22 (Navy Flounder)\n* Navi 23 (Dimgrey Cavefish)\n* Navi 3x\n* Navi 4x\n\nNotes:\n* iGPUs found in many recent AMD APUs are using completely different\n  PowerPlay control methods, this tool does not support them.\n* The amdgpu kernel driver does not fully implement modifying the PowerPlay\n  tables on runtime for Navi 3x and Navi 4x cards.\n* The amdgpu kernel driver does the incomplete PowerPlay table data dump\n  to the `/sys/class/drm/cardX/device/pp_table` file, for Navi 3x AND 4x.\n  The pp_table file is truncated to first 4095 bytes. Likely a driver bug.\n\n**WARNING**: Authors of this tool are in no way responsible for any damage\nthat may happen to your expansive graphics card if you choose to modify\ncard voltages, power limits, or any other PowerPlay parameters. Always\nremember that you are doing it entirely on your own risk!\n\nIf you have bugs to report or features to request please create an issue on:\nhttps://github.com/sibradzic/upp\n\n### Requirements\n\nPython 3.7+, click library. Optionally, for reading \"soft\" PowerPlay table\nfrom Windows registry: python-registry. Should work on Windows as well\n(testers wanted).\n\n### Installation\n\nEither get it with pip:\n\n    pip install upp\n\nor use it as is directly from the source tree:\n\n    cd src\n    python3 -m upp.upp --help\n\n### Usage\n\nAt its current form this is a CLI only tool. Getting help:\n\n    upp --help\n\nor\n\n    upp <command> --help\n\nUpp will only work by specifying a command which tells it what to do to one's\nRadeon PowerPlay table data. Currently available commands are:\n\n* **dump** - Dumps all PowerPlay data to console\n* **extract** - Extracts PowerPlay data from full VBIOS ROM image\n* **inject** - Injects PowerPlay data from file into VBIOS ROM image\n* **get** - Retrieves current value of one or multiple PowerPlay parameter(s)\n* **set** - Sets value to one or multiple PowerPlay parameters\n* **undump** - Sets all PowerPlay parameters to pp file or registry\n* **version** - Shows UPP version\n\nSo, an usage pattern would be like this:\n\n    upp [OPTIONS] COMMAND [ARGS]...\n\nSome generic options applicable to all commands may be used, but please note\nthat they have to be specified *before* an actual command:\n\n    -p, --pp-file <filename>        Input/output PP table binary file.\n    -f, --from-registry <filename>  Import PP_PhmSoftPowerPlayTable from Windows\n                                    registry (overrides -p / --pp-file option).\n    -m, --from-mpt <filename>       Import PowerPlay Table from More Power Tool\n                                    (overrides --pp-file and --from-registry optios).\n    -d, --debug / --no-debug        Debug mode.\n    -h, --help                      Show this message and exit.\n\n#### Dumping all data:\n\nThe **dump** command de-serializes PowerPlay binary data into a human-readable\ntext output. For example:\n\n    upp dump\n\nIn standard mode all data will be dumped to console, where data tree hierarchy\nis indicated by indentation. In raw mode a table showing all hex and binary\ndata, as well as variable names and values, will be dumped.\n\n#### Extracting PowerPlay table from Video ROM image:\n\nUse **extract** command for this. The source video ROM binary must be specified\nwith `-r/--video-rom` parameter, and extracted PowerPlay table will be saved\ninto file specified with generic `-p/--pp-file` option. For example:\n\n    upp --pp-file=extracted.pp_table extract -r VIDEO.rom\n\nDefault output file name will be an original ROM file name with an\nadditional .pp_table extension.\n\n#### Injecting PowerPlay data from file into VBIOS ROM image:\n\nUse **inject** command for this. The input video ROM binary must be specified\nwith `-i/--input-rom` parameter, and the output ROM can be specified with an\noptional `-o/--output-rom parameter`. For example:\n\n    upp -p modded.pp_table inject -i original.rom -o modded.rom\n\n**WARNING**: Modified vROM image is probably not going to work if flashed as is\nto your card, due to ROM signature checks on recent Radeon cards. Authors of\nthis tool are in no way responsible for any damage that may happen to your\nexpansive graphics card if you choose to flash the modified video ROM, you are\ndoing it entirely on your own risk.\n\n#### Getting PowerPlay table parameter value(s):\n\nThe **get** command retrieves current value of one or multiple PowerPlay table\nparameter value(s). The parameter variable path must be specified in `/<param>`\nnotation, for example:\n\n    upp get smc_pptable/FreqTableGfx/1 smc_pptable/FreqTableGfx/2\n    1850\n    1400\n\nThe order of the output values will match the order of the parameter variable\npaths specified.\n\n#### Setting PowerPlay table parameter value(s):\n\nThe **set** command sets value to one or multiple PowerPlay table\nparameter(s). The parameter path and value must be specified in\n`/<param>=<value>` notation, for example:\n\n    upp -p /tmp/custom-pp_table set --write  \\\n      smc_pptable/SocketPowerLimitAc/0=100   \\\n      smc_pptable/SocketPowerLimitDc/0=100   \\\n      smc_pptable/FanStartTemp=100           \\\n      smc_pptable/FreqTableGfx/1=1550\n\nIt is possible to set parameters from a configuration file with one\n\"/<param>=<value>\" per line using -c/--from-conf instead of directly\npassing parameters from command line\n\n    upp set --from-conf=card0.conf\n\nNote the `--write` parameter, which has to be specified to actually commit\nchanges to the PowerPlay table file.\n\n#### Undumps all PowerPlay parameters:\n\nThe **undump** command sets all values from previously dumped PowerPlay table parameter(s) back to pp_table or registry. It allows you to make changes in dumped text file and write back all changes at once. Basically it's a convenient way to set multiple values. For example:\n\n    # extract pp_table from vbios\n    upp --pp-file=vbios.pp_table extract -r vbios.rom\n    # dump powerplay table to text file\n    upp --pp-file=vbios.pp_table dump > vbios.pp_table.dump\n    # make changes in vbios.pp_table.dump\n    # undump all changes back into pp_table\n    upp --pp-file=vbios.pp_table undump -d vbios.pp_table.dump -w\n\nNote the `--write` parameter, which has to be specified to actually commit\nchanges to the PowerPlay table file.\n\n#### Getting upp version\n\n    upp version\n\n#### Running as sudo\n\nNote that if you need to run upp deployed with **pip** in `--user` mode with\nsudo, you'll need to add some parameters to sudo command to make user env\navailable to super-user. For example:\n\n    sudo -E env \"PATH=$PATH\" upp --help\n\n"
  },
  {
    "path": "setup.py",
    "content": "import setuptools\n\nwith open('README.md', 'r') as fh:\n    long_description = fh.read()\n\nsetuptools.setup(\n    name='upp',\n    version='0.2.4',\n    author='Samir Ibradžić',\n    description='Uplift Power Play',\n    long_description=long_description,\n    long_description_content_type='text/markdown',\n    url='https://github.com/sibradzic/upp',\n    package_dir={'': 'src'},\n    packages=['upp', 'upp/atom_gen'],\n    classifiers=[\n        'Programming Language :: Python :: 3',\n        'Programming Language :: Python :: 3.7',\n        'Programming Language :: Python :: 3.8',\n        'Programming Language :: Python :: 3.9',\n        'Programming Language :: Python :: 3.10',\n        'Programming Language :: Python :: 3.11',\n        'Programming Language :: Python :: 3.12',\n        'License :: OSI Approved :: GNU General Public License v3 (GPLv3)',\n        'Operating System :: OS Independent',\n    ],\n    python_requires='>=3.7, <4',\n    install_requires=[\n        'click',\n        'setuptools'\n    ],\n    entry_points={\n        'console_scripts': [\n            'upp=upp.upp:main',\n        ],\n    },\n)\n"
  },
  {
    "path": "src/upp/__init__.py",
    "content": ""
  },
  {
    "path": "src/upp/atom_gen/README.md",
    "content": "\n# How to generate Python readable ATOM C structures from Linux kernel code\n\n## Versions\n\nGenerated against kernel commit 80e54e849 (v6.14-rc6) (Sun Mar 9 13:45:25 2025 -1000)\nGenerated against drm-next kernel commit 5da39dce1 tag drm-xe-next-fixes-2025-03-12\n\nclang version 19.1.7\nctypeslib2 2.4.0\n\n\n## Python Requirements\n\n    sudo apt install clang\n    pip3 install --user clang==19.1.7 ctypeslib2==2.4.0\n\nor\n\n    pacman -S clang\n    pipx install --preinstall clang==19.1.7 ctypeslib2\n\n\n## Get a particular Linux kernel release\n\n    git clone --depth=1 git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git\n    pushd linux\n    # git fetch origin v6.14-rc6 --tags\n    # git checkout v6.14-rc6\n    # git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git\n    # git fetch --tags linux-next\n    git remote add drm-next https://anongit.freedesktop.org/git/drm/drm.git\n    git fetch --tags drm-next\n    git checkout drm-next\n    popd\n\n\n## Some Linux header hacks, clang2py can't deal with __counted_by()\n\n    sed -i 's| __counted_by(.*);|; //\\0|' linux/drivers/gpu/drm/amd/include/pptable.h\n    sed -i 's| __counted_by(.*);|; //\\0|' linux/drivers/gpu/drm/amd/include/atomfirmware.h\n    sed -i 's| __counted_by(.*);|; //\\0|' linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h\n    sed -i 's|#include \"hwmgr.h\"|//\\0|'   linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h\n\n\n## atombios.py\n\n    clang2py -k 's' --clang-args=\"\\\n        --include stdint.h \\\n        --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n        \" \\\n      -s struct__ATOM_COMMON_TABLE_HEADER -s struct__ATOM_MASTER_DATA_TABLE \\\n      -s struct__ATOM_ROM_HEADER -s struct__ATOM_ROM_HEADER_V2_1 \\\n      linux/drivers/gpu/drm/amd/include/atombios.h > atombios.py\n\n\n## pptable_v1_0.py (Polaris/Tonga)\n\n\n    clang2py -k 'mst' \\\n      --clang-args=\"\\\n        --include stdint.h \\\n        --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n        --include linux/drivers/gpu/drm/amd/include/atombios.h\n        \" \\\n       linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h > pptable_v1_0.py\n\n\n## vega10_pptable.py (Vega10 aka Vega 56/64)\n\n    clang2py -k 'mste' \\\n      --clang-args=\"--include stdint.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atomfirmware.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atombios.h\" \\\n       linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h > vega10_pptable.py\n\n\n## vega20_pptable.py (Vega20 aka Radeon7)\n\n    clang2py -k 'mste' \\\n      --clang-args=\"--include stdint.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atomfirmware.h \\\n                    --include linux/drivers/gpu/drm/amd/pm/powerplay/inc/smu11_driver_if.h \" \\\n       linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_pptable.h > vega20_pptable.py\n\n\n##  smu_v11_0_navi10.py (Navi10/14)\n\n    clang2py -k 'mste' \\\n      --clang-args=\"--include stdint.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atomfirmware.h \\\n                    --include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h \" \\\n       linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h > smu_v11_0_navi10.py\n\n\n##  smu_v11_0_arcturus.py (MI100)\n\n    clang2py -k 'mste' \\\n      --clang-args=\"--include stdint.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atomfirmware.h \\\n                    --include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h \" \\\n       linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h > smu_v11_0_arcturus.py\n\n\n##  smu_v11_0_navi20.py (Navi2x)\n\n    clang2py -k 'mste' \\\n      --clang-args=\"--include stdint.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atomfirmware.h \\\n                    --include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h \" \\\n       linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_7_pptable.h > smu_v11_0_7_navi20.py\n\n\n##  smu_v13_0 (Navi 3x)\n\n    clang2py -k 'mste' \\\n      --clang-args=\"--include stdint.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atomfirmware.h \\\n                    --include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h \" \\\n       linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0_7_pptable.h > smu_v13_0_7_navi30.py\n\n\n##  smu_v14_0 (Navi 4x)\n\n    clang2py -k 'mste' \\\n      --clang-args=\"--include stdint.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atom-types.h \\\n                    --include linux/drivers/gpu/drm/amd/include/atomfirmware.h \\\n                    --include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h \" \\\n       linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h > smu_v14_0_2_navi40.py\n\n\n## Linux source cleanup\n\n    pushd linux\n    git checkout \\\n      drivers/gpu/drm/amd/include/pptable.h      \\\n      drivers/gpu/drm/amd/include/atomfirmware.h \\\n      drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h\n    popd\n\n"
  },
  {
    "path": "src/upp/atom_gen/__init__.py",
    "content": ""
  },
  {
    "path": "src/upp/atom_gen/atombios.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\nclass struct__ATOM_COMMON_TABLE_HEADER(Structure):\n    pass\n\nstruct__ATOM_COMMON_TABLE_HEADER._pack_ = 1 # source:False\nstruct__ATOM_COMMON_TABLE_HEADER._fields_ = [\n    ('usStructureSize', ctypes.c_uint16),\n    ('ucTableFormatRevision', ctypes.c_ubyte),\n    ('ucTableContentRevision', ctypes.c_ubyte),\n]\n\nclass struct__ATOM_ROM_HEADER(Structure):\n    pass\n\nATOM_COMMON_TABLE_HEADER = struct__ATOM_COMMON_TABLE_HEADER\nstruct__ATOM_ROM_HEADER._pack_ = 1 # source:False\nstruct__ATOM_ROM_HEADER._fields_ = [\n    ('sHeader', ATOM_COMMON_TABLE_HEADER),\n    ('uaFirmWareSignature', ctypes.c_ubyte * 4),\n    ('usBiosRuntimeSegmentAddress', ctypes.c_uint16),\n    ('usProtectedModeInfoOffset', ctypes.c_uint16),\n    ('usConfigFilenameOffset', ctypes.c_uint16),\n    ('usCRC_BlockOffset', ctypes.c_uint16),\n    ('usBIOS_BootupMessageOffset', ctypes.c_uint16),\n    ('usInt10Offset', ctypes.c_uint16),\n    ('usPciBusDevInitCode', ctypes.c_uint16),\n    ('usIoBaseAddress', ctypes.c_uint16),\n    ('usSubsystemVendorID', ctypes.c_uint16),\n    ('usSubsystemID', ctypes.c_uint16),\n    ('usPCI_InfoOffset', ctypes.c_uint16),\n    ('usMasterCommandTableOffset', ctypes.c_uint16),\n    ('usMasterDataTableOffset', ctypes.c_uint16),\n    ('ucExtendedFunctionCode', ctypes.c_ubyte),\n    ('ucReserved', ctypes.c_ubyte),\n]\n\nclass struct__ATOM_ROM_HEADER_V2_1(Structure):\n    pass\n\nstruct__ATOM_ROM_HEADER_V2_1._pack_ = 1 # source:False\nstruct__ATOM_ROM_HEADER_V2_1._fields_ = [\n    ('sHeader', ATOM_COMMON_TABLE_HEADER),\n    ('uaFirmWareSignature', ctypes.c_ubyte * 4),\n    ('usBiosRuntimeSegmentAddress', ctypes.c_uint16),\n    ('usProtectedModeInfoOffset', ctypes.c_uint16),\n    ('usConfigFilenameOffset', ctypes.c_uint16),\n    ('usCRC_BlockOffset', ctypes.c_uint16),\n    ('usBIOS_BootupMessageOffset', ctypes.c_uint16),\n    ('usInt10Offset', ctypes.c_uint16),\n    ('usPciBusDevInitCode', ctypes.c_uint16),\n    ('usIoBaseAddress', ctypes.c_uint16),\n    ('usSubsystemVendorID', ctypes.c_uint16),\n    ('usSubsystemID', ctypes.c_uint16),\n    ('usPCI_InfoOffset', ctypes.c_uint16),\n    ('usMasterCommandTableOffset', ctypes.c_uint16),\n    ('usMasterDataTableOffset', ctypes.c_uint16),\n    ('ucExtendedFunctionCode', ctypes.c_ubyte),\n    ('ucReserved', ctypes.c_ubyte),\n    ('ulPSPDirTableOffset', ctypes.c_uint32),\n]\n\nclass struct__ATOM_MASTER_DATA_TABLE(Structure):\n    pass\n\nclass struct__ATOM_MASTER_LIST_OF_DATA_TABLES(Structure):\n    pass\n\nstruct__ATOM_MASTER_LIST_OF_DATA_TABLES._pack_ = 1 # source:False\nstruct__ATOM_MASTER_LIST_OF_DATA_TABLES._fields_ = [\n    ('UtilityPipeLine', ctypes.c_uint16),\n    ('MultimediaCapabilityInfo', ctypes.c_uint16),\n    ('MultimediaConfigInfo', ctypes.c_uint16),\n    ('StandardVESA_Timing', ctypes.c_uint16),\n    ('FirmwareInfo', ctypes.c_uint16),\n    ('PaletteData', ctypes.c_uint16),\n    ('LCD_Info', ctypes.c_uint16),\n    ('DIGTransmitterInfo', ctypes.c_uint16),\n    ('SMU_Info', ctypes.c_uint16),\n    ('SupportedDevicesInfo', ctypes.c_uint16),\n    ('GPIO_I2C_Info', ctypes.c_uint16),\n    ('VRAM_UsageByFirmware', ctypes.c_uint16),\n    ('GPIO_Pin_LUT', ctypes.c_uint16),\n    ('VESA_ToInternalModeLUT', ctypes.c_uint16),\n    ('GFX_Info', ctypes.c_uint16),\n    ('PowerPlayInfo', ctypes.c_uint16),\n    ('GPUVirtualizationInfo', ctypes.c_uint16),\n    ('SaveRestoreInfo', ctypes.c_uint16),\n    ('PPLL_SS_Info', ctypes.c_uint16),\n    ('OemInfo', ctypes.c_uint16),\n    ('XTMDS_Info', ctypes.c_uint16),\n    ('MclkSS_Info', ctypes.c_uint16),\n    ('Object_Header', ctypes.c_uint16),\n    ('IndirectIOAccess', ctypes.c_uint16),\n    ('MC_InitParameter', ctypes.c_uint16),\n    ('ASIC_VDDC_Info', ctypes.c_uint16),\n    ('ASIC_InternalSS_Info', ctypes.c_uint16),\n    ('TV_VideoMode', ctypes.c_uint16),\n    ('VRAM_Info', ctypes.c_uint16),\n    ('MemoryTrainingInfo', ctypes.c_uint16),\n    ('IntegratedSystemInfo', ctypes.c_uint16),\n    ('ASIC_ProfilingInfo', ctypes.c_uint16),\n    ('VoltageObjectInfo', ctypes.c_uint16),\n    ('PowerSourceInfo', ctypes.c_uint16),\n    ('ServiceInfo', ctypes.c_uint16),\n]\n\nATOM_MASTER_LIST_OF_DATA_TABLES = struct__ATOM_MASTER_LIST_OF_DATA_TABLES\nstruct__ATOM_MASTER_DATA_TABLE._pack_ = 1 # source:False\nstruct__ATOM_MASTER_DATA_TABLE._fields_ = [\n    ('sHeader', ATOM_COMMON_TABLE_HEADER),\n    ('ListOfDataTables', ATOM_MASTER_LIST_OF_DATA_TABLES),\n]\n\n__all__ = \\\n    ['ATOM_COMMON_TABLE_HEADER', 'ATOM_MASTER_LIST_OF_DATA_TABLES',\n    'struct__ATOM_COMMON_TABLE_HEADER',\n    'struct__ATOM_MASTER_DATA_TABLE',\n    'struct__ATOM_MASTER_LIST_OF_DATA_TABLES',\n    'struct__ATOM_ROM_HEADER', 'struct__ATOM_ROM_HEADER_V2_1']\n"
  },
  {
    "path": "src/upp/atom_gen/pptable_v1_0.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atombios.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\nTONGA_PPTABLE_H = True # macro\nATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK = 0x0f # macro\nATOM_TONGA_PP_FANPARAMETERS_NOFAN = 0x80 # macro\nATOM_TONGA_PP_THERMALCONTROLLER_NONE = 0 # macro\nATOM_TONGA_PP_THERMALCONTROLLER_LM96163 = 17 # macro\nATOM_TONGA_PP_THERMALCONTROLLER_TONGA = 21 # macro\nATOM_TONGA_PP_THERMALCONTROLLER_FIJI = 22 # macro\nATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL = 0x89 # macro\nATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL = 0x8D # macro\nATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL = 0x1 # macro\nATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY = 0x2 # macro\nATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x4 # macro\nATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND = 0x8 # macro\n____RETIRE16____ = 0x10 # macro\nATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC = 0x20 # macro\n____RETIRE64____ = 0x40 # macro\n____RETIRE128____ = 0x80 # macro\n____RETIRE256____ = 0x100 # macro\n____RETIRE512____ = 0x200 # macro\n____RETIRE1024____ = 0x400 # macro\n____RETIRE2048____ = 0x800 # macro\nATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL = 0x1000 # macro\n____RETIRE2000____ = 0x2000 # macro\n____RETIRE4000____ = 0x4000 # macro\nATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL = 0x8000 # macro\n____RETIRE10000____ = 0x10000 # macro\nATOM_TONGA_PP_PLATFORM_CAP_BACO = 0x20000 # macro\nATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 = 0x100000 # macro\nATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL = 0x1000000 # macro\nATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE = 0x2000000 # macro\nATOM_PPLIB_CLASSIFICATION_UI_MASK = 0x0007 # macro\nATOM_PPLIB_CLASSIFICATION_UI_SHIFT = 0 # macro\nATOM_PPLIB_CLASSIFICATION_UI_NONE = 0 # macro\nATOM_PPLIB_CLASSIFICATION_UI_BATTERY = 1 # macro\nATOM_PPLIB_CLASSIFICATION_UI_BALANCED = 3 # macro\nATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE = 5 # macro\nATOM_PPLIB_CLASSIFICATION_BOOT = 0x0008 # macro\nATOM_PPLIB_CLASSIFICATION_THERMAL = 0x0010 # macro\nATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE = 0x0020 # macro\nATOM_PPLIB_CLASSIFICATION_REST = 0x0040 # macro\nATOM_PPLIB_CLASSIFICATION_FORCED = 0x0080 # macro\nATOM_PPLIB_CLASSIFICATION_ACPI = 0x1000 # macro\nATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 = 0x0001 # macro\nATOM_Tonga_DISALLOW_ON_DC = 0x00004000 # macro\nATOM_Tonga_ENABLE_VARIBRIGHT = 0x00008000 # macro\nATOM_Tonga_TABLE_REVISION_TONGA = 7 # macro\nATOM_PPM_A_A = 1 # macro\nATOM_PPM_A_I = 2 # macro\nclass struct__ATOM_Tonga_POWERPLAYTABLE(Structure):\n    pass\n\nclass struct__ATOM_COMMON_TABLE_HEADER(Structure):\n    pass\n\nstruct__ATOM_COMMON_TABLE_HEADER._pack_ = 1 # source:False\nstruct__ATOM_COMMON_TABLE_HEADER._fields_ = [\n    ('usStructureSize', ctypes.c_uint16),\n    ('ucTableFormatRevision', ctypes.c_ubyte),\n    ('ucTableContentRevision', ctypes.c_ubyte),\n]\n\nstruct__ATOM_Tonga_POWERPLAYTABLE._pack_ = 1 # source:False\nstruct__ATOM_Tonga_POWERPLAYTABLE._fields_ = [\n    ('sHeader', struct__ATOM_COMMON_TABLE_HEADER),\n    ('ucTableRevision', ctypes.c_ubyte),\n    ('usTableSize', ctypes.c_uint16),\n    ('ulGoldenPPID', ctypes.c_uint32),\n    ('ulGoldenRevision', ctypes.c_uint32),\n    ('usFormatID', ctypes.c_uint16),\n    ('usVoltageTime', ctypes.c_uint16),\n    ('ulPlatformCaps', ctypes.c_uint32),\n    ('ulMaxODEngineClock', ctypes.c_uint32),\n    ('ulMaxODMemoryClock', ctypes.c_uint32),\n    ('usPowerControlLimit', ctypes.c_uint16),\n    ('usUlvVoltageOffset', ctypes.c_uint16),\n    ('usStateArrayOffset', ctypes.c_uint16),\n    ('usFanTableOffset', ctypes.c_uint16),\n    ('usThermalControllerOffset', ctypes.c_uint16),\n    ('usReserv', ctypes.c_uint16),\n    ('usMclkDependencyTableOffset', ctypes.c_uint16),\n    ('usSclkDependencyTableOffset', ctypes.c_uint16),\n    ('usVddcLookupTableOffset', ctypes.c_uint16),\n    ('usVddgfxLookupTableOffset', ctypes.c_uint16),\n    ('usMMDependencyTableOffset', ctypes.c_uint16),\n    ('usVCEStateTableOffset', ctypes.c_uint16),\n    ('usPPMTableOffset', ctypes.c_uint16),\n    ('usPowerTuneTableOffset', ctypes.c_uint16),\n    ('usHardLimitTableOffset', ctypes.c_uint16),\n    ('usPCIETableOffset', ctypes.c_uint16),\n    ('usGPIOTableOffset', ctypes.c_uint16),\n    ('usReserved', ctypes.c_uint16 * 6),\n]\n\nATOM_Tonga_POWERPLAYTABLE = struct__ATOM_Tonga_POWERPLAYTABLE\nclass struct__ATOM_Tonga_State(Structure):\n    pass\n\nstruct__ATOM_Tonga_State._pack_ = 1 # source:False\nstruct__ATOM_Tonga_State._fields_ = [\n    ('ucEngineClockIndexHigh', ctypes.c_ubyte),\n    ('ucEngineClockIndexLow', ctypes.c_ubyte),\n    ('ucMemoryClockIndexHigh', ctypes.c_ubyte),\n    ('ucMemoryClockIndexLow', ctypes.c_ubyte),\n    ('ucPCIEGenLow', ctypes.c_ubyte),\n    ('ucPCIEGenHigh', ctypes.c_ubyte),\n    ('ucPCIELaneLow', ctypes.c_ubyte),\n    ('ucPCIELaneHigh', ctypes.c_ubyte),\n    ('usClassification', ctypes.c_uint16),\n    ('ulCapsAndSettings', ctypes.c_uint32),\n    ('usClassification2', ctypes.c_uint16),\n    ('ucUnused', ctypes.c_ubyte * 4),\n]\n\nATOM_Tonga_State = struct__ATOM_Tonga_State\nclass struct__ATOM_Tonga_State_Array(Structure):\n    pass\n\nstruct__ATOM_Tonga_State_Array._pack_ = 1 # source:False\nstruct__ATOM_Tonga_State_Array._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_State * 0),\n]\n\nATOM_Tonga_State_Array = struct__ATOM_Tonga_State_Array\nclass struct__ATOM_Tonga_MCLK_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Tonga_MCLK_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Tonga_MCLK_Dependency_Record._fields_ = [\n    ('ucVddcInd', ctypes.c_ubyte),\n    ('usVddci', ctypes.c_uint16),\n    ('usVddgfxOffset', ctypes.c_uint16),\n    ('usMvdd', ctypes.c_uint16),\n    ('ulMclk', ctypes.c_uint32),\n    ('usReserved', ctypes.c_uint16),\n]\n\nATOM_Tonga_MCLK_Dependency_Record = struct__ATOM_Tonga_MCLK_Dependency_Record\nclass struct__ATOM_Tonga_MCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_MCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_MCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_MCLK_Dependency_Record * 0),\n]\n\nATOM_Tonga_MCLK_Dependency_Table = struct__ATOM_Tonga_MCLK_Dependency_Table\nclass struct__ATOM_Tonga_SCLK_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Tonga_SCLK_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Tonga_SCLK_Dependency_Record._fields_ = [\n    ('ucVddInd', ctypes.c_ubyte),\n    ('usVddcOffset', ctypes.c_uint16),\n    ('ulSclk', ctypes.c_uint32),\n    ('usEdcCurrent', ctypes.c_uint16),\n    ('ucReliabilityTemperature', ctypes.c_ubyte),\n    ('ucCKSVOffsetandDisable', ctypes.c_ubyte),\n]\n\nATOM_Tonga_SCLK_Dependency_Record = struct__ATOM_Tonga_SCLK_Dependency_Record\nclass struct__ATOM_Tonga_SCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_SCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_SCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_SCLK_Dependency_Record * 0),\n]\n\nATOM_Tonga_SCLK_Dependency_Table = struct__ATOM_Tonga_SCLK_Dependency_Table\nclass struct__ATOM_Polaris_SCLK_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Polaris_SCLK_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Polaris_SCLK_Dependency_Record._fields_ = [\n    ('ucVddInd', ctypes.c_ubyte),\n    ('usVddcOffset', ctypes.c_uint16),\n    ('ulSclk', ctypes.c_uint32),\n    ('usEdcCurrent', ctypes.c_uint16),\n    ('ucReliabilityTemperature', ctypes.c_ubyte),\n    ('ucCKSVOffsetandDisable', ctypes.c_ubyte),\n    ('ulSclkOffset', ctypes.c_uint32),\n]\n\nATOM_Polaris_SCLK_Dependency_Record = struct__ATOM_Polaris_SCLK_Dependency_Record\nclass struct__ATOM_Polaris_SCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Polaris_SCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Polaris_SCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Polaris_SCLK_Dependency_Record * 0),\n]\n\nATOM_Polaris_SCLK_Dependency_Table = struct__ATOM_Polaris_SCLK_Dependency_Table\nclass struct__ATOM_Tonga_PCIE_Record(Structure):\n    pass\n\nstruct__ATOM_Tonga_PCIE_Record._pack_ = 1 # source:False\nstruct__ATOM_Tonga_PCIE_Record._fields_ = [\n    ('ucPCIEGenSpeed', ctypes.c_ubyte),\n    ('usPCIELaneWidth', ctypes.c_ubyte),\n    ('ucReserved', ctypes.c_ubyte * 2),\n]\n\nATOM_Tonga_PCIE_Record = struct__ATOM_Tonga_PCIE_Record\nclass struct__ATOM_Tonga_PCIE_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_PCIE_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_PCIE_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_PCIE_Record * 0),\n]\n\nATOM_Tonga_PCIE_Table = struct__ATOM_Tonga_PCIE_Table\nclass struct__ATOM_Polaris10_PCIE_Record(Structure):\n    pass\n\nstruct__ATOM_Polaris10_PCIE_Record._pack_ = 1 # source:False\nstruct__ATOM_Polaris10_PCIE_Record._fields_ = [\n    ('ucPCIEGenSpeed', ctypes.c_ubyte),\n    ('usPCIELaneWidth', ctypes.c_ubyte),\n    ('ucReserved', ctypes.c_ubyte * 2),\n    ('ulPCIE_Sclk', ctypes.c_uint32),\n]\n\nATOM_Polaris10_PCIE_Record = struct__ATOM_Polaris10_PCIE_Record\nclass struct__ATOM_Polaris10_PCIE_Table(Structure):\n    pass\n\nstruct__ATOM_Polaris10_PCIE_Table._pack_ = 1 # source:False\nstruct__ATOM_Polaris10_PCIE_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Polaris10_PCIE_Record * 0),\n]\n\nATOM_Polaris10_PCIE_Table = struct__ATOM_Polaris10_PCIE_Table\nclass struct__ATOM_Tonga_MM_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Tonga_MM_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Tonga_MM_Dependency_Record._fields_ = [\n    ('ucVddcInd', ctypes.c_ubyte),\n    ('usVddgfxOffset', ctypes.c_uint16),\n    ('ulDClk', ctypes.c_uint32),\n    ('ulVClk', ctypes.c_uint32),\n    ('ulEClk', ctypes.c_uint32),\n    ('ulAClk', ctypes.c_uint32),\n    ('ulSAMUClk', ctypes.c_uint32),\n]\n\nATOM_Tonga_MM_Dependency_Record = struct__ATOM_Tonga_MM_Dependency_Record\nclass struct__ATOM_Tonga_MM_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_MM_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_MM_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_MM_Dependency_Record * 0),\n]\n\nATOM_Tonga_MM_Dependency_Table = struct__ATOM_Tonga_MM_Dependency_Table\nclass struct__ATOM_Tonga_Voltage_Lookup_Record(Structure):\n    pass\n\nstruct__ATOM_Tonga_Voltage_Lookup_Record._pack_ = 1 # source:False\nstruct__ATOM_Tonga_Voltage_Lookup_Record._fields_ = [\n    ('usVdd', ctypes.c_uint16),\n    ('usCACLow', ctypes.c_uint16),\n    ('usCACMid', ctypes.c_uint16),\n    ('usCACHigh', ctypes.c_uint16),\n]\n\nATOM_Tonga_Voltage_Lookup_Record = struct__ATOM_Tonga_Voltage_Lookup_Record\nclass struct__ATOM_Tonga_Voltage_Lookup_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_Voltage_Lookup_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_Voltage_Lookup_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_Voltage_Lookup_Record * 0),\n]\n\nATOM_Tonga_Voltage_Lookup_Table = struct__ATOM_Tonga_Voltage_Lookup_Table\nclass struct__ATOM_Tonga_Fan_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_Fan_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_Fan_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucTHyst', ctypes.c_ubyte),\n    ('usTMin', ctypes.c_uint16),\n    ('usTMed', ctypes.c_uint16),\n    ('usTHigh', ctypes.c_uint16),\n    ('usPWMMin', ctypes.c_uint16),\n    ('usPWMMed', ctypes.c_uint16),\n    ('usPWMHigh', ctypes.c_uint16),\n    ('usTMax', ctypes.c_uint16),\n    ('ucFanControlMode', ctypes.c_ubyte),\n    ('usFanPWMMax', ctypes.c_uint16),\n    ('usFanOutputSensitivity', ctypes.c_uint16),\n    ('usFanRPMMax', ctypes.c_uint16),\n    ('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),\n    ('ucTargetTemperature', ctypes.c_ubyte),\n    ('ucMinimumPWMLimit', ctypes.c_ubyte),\n    ('usReserved', ctypes.c_uint16),\n]\n\nATOM_Tonga_Fan_Table = struct__ATOM_Tonga_Fan_Table\nclass struct__ATOM_Fiji_Fan_Table(Structure):\n    pass\n\nstruct__ATOM_Fiji_Fan_Table._pack_ = 1 # source:False\nstruct__ATOM_Fiji_Fan_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucTHyst', ctypes.c_ubyte),\n    ('usTMin', ctypes.c_uint16),\n    ('usTMed', ctypes.c_uint16),\n    ('usTHigh', ctypes.c_uint16),\n    ('usPWMMin', ctypes.c_uint16),\n    ('usPWMMed', ctypes.c_uint16),\n    ('usPWMHigh', ctypes.c_uint16),\n    ('usTMax', ctypes.c_uint16),\n    ('ucFanControlMode', ctypes.c_ubyte),\n    ('usFanPWMMax', ctypes.c_uint16),\n    ('usFanOutputSensitivity', ctypes.c_uint16),\n    ('usFanRPMMax', ctypes.c_uint16),\n    ('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),\n    ('ucTargetTemperature', ctypes.c_ubyte),\n    ('ucMinimumPWMLimit', ctypes.c_ubyte),\n    ('usFanGainEdge', ctypes.c_uint16),\n    ('usFanGainHotspot', ctypes.c_uint16),\n    ('usFanGainLiquid', ctypes.c_uint16),\n    ('usFanGainVrVddc', ctypes.c_uint16),\n    ('usFanGainVrMvdd', ctypes.c_uint16),\n    ('usFanGainPlx', ctypes.c_uint16),\n    ('usFanGainHbm', ctypes.c_uint16),\n    ('usReserved', ctypes.c_uint16),\n]\n\nATOM_Fiji_Fan_Table = struct__ATOM_Fiji_Fan_Table\nclass struct__ATOM_Polaris_Fan_Table(Structure):\n    pass\n\nstruct__ATOM_Polaris_Fan_Table._pack_ = 1 # source:False\nstruct__ATOM_Polaris_Fan_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucTHyst', ctypes.c_ubyte),\n    ('usTMin', ctypes.c_uint16),\n    ('usTMed', ctypes.c_uint16),\n    ('usTHigh', ctypes.c_uint16),\n    ('usPWMMin', ctypes.c_uint16),\n    ('usPWMMed', ctypes.c_uint16),\n    ('usPWMHigh', ctypes.c_uint16),\n    ('usTMax', ctypes.c_uint16),\n    ('ucFanControlMode', ctypes.c_ubyte),\n    ('usFanPWMMax', ctypes.c_uint16),\n    ('usFanOutputSensitivity', ctypes.c_uint16),\n    ('usFanRPMMax', ctypes.c_uint16),\n    ('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),\n    ('ucTargetTemperature', ctypes.c_ubyte),\n    ('ucMinimumPWMLimit', ctypes.c_ubyte),\n    ('usFanGainEdge', ctypes.c_uint16),\n    ('usFanGainHotspot', ctypes.c_uint16),\n    ('usFanGainLiquid', ctypes.c_uint16),\n    ('usFanGainVrVddc', ctypes.c_uint16),\n    ('usFanGainVrMvdd', ctypes.c_uint16),\n    ('usFanGainPlx', ctypes.c_uint16),\n    ('usFanGainHbm', ctypes.c_uint16),\n    ('ucEnableZeroRPM', ctypes.c_ubyte),\n    ('ucFanStopTemperature', ctypes.c_ubyte),\n    ('ucFanStartTemperature', ctypes.c_ubyte),\n    ('usReserved', ctypes.c_uint16),\n]\n\nATOM_Polaris_Fan_Table = struct__ATOM_Polaris_Fan_Table\nclass struct__ATOM_Tonga_Thermal_Controller(Structure):\n    pass\n\nstruct__ATOM_Tonga_Thermal_Controller._pack_ = 1 # source:False\nstruct__ATOM_Tonga_Thermal_Controller._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucType', ctypes.c_ubyte),\n    ('ucI2cLine', ctypes.c_ubyte),\n    ('ucI2cAddress', ctypes.c_ubyte),\n    ('ucFanParameters', ctypes.c_ubyte),\n    ('ucFanMinRPM', ctypes.c_ubyte),\n    ('ucFanMaxRPM', ctypes.c_ubyte),\n    ('ucReserved', ctypes.c_ubyte),\n    ('ucFlags', ctypes.c_ubyte),\n]\n\nATOM_Tonga_Thermal_Controller = struct__ATOM_Tonga_Thermal_Controller\nclass struct__ATOM_Tonga_VCE_State_Record(Structure):\n    pass\n\nstruct__ATOM_Tonga_VCE_State_Record._pack_ = 1 # source:False\nstruct__ATOM_Tonga_VCE_State_Record._fields_ = [\n    ('ucVCEClockIndex', ctypes.c_ubyte),\n    ('ucFlag', ctypes.c_ubyte),\n    ('ucSCLKIndex', ctypes.c_ubyte),\n    ('ucMCLKIndex', ctypes.c_ubyte),\n]\n\nATOM_Tonga_VCE_State_Record = struct__ATOM_Tonga_VCE_State_Record\nclass struct__ATOM_Tonga_VCE_State_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_VCE_State_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_VCE_State_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_VCE_State_Record * 0),\n]\n\nATOM_Tonga_VCE_State_Table = struct__ATOM_Tonga_VCE_State_Table\nclass struct__ATOM_Tonga_PowerTune_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_PowerTune_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_PowerTune_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usTDP', ctypes.c_uint16),\n    ('usConfigurableTDP', ctypes.c_uint16),\n    ('usTDC', ctypes.c_uint16),\n    ('usBatteryPowerLimit', ctypes.c_uint16),\n    ('usSmallPowerLimit', ctypes.c_uint16),\n    ('usLowCACLeakage', ctypes.c_uint16),\n    ('usHighCACLeakage', ctypes.c_uint16),\n    ('usMaximumPowerDeliveryLimit', ctypes.c_uint16),\n    ('usTjMax', ctypes.c_uint16),\n    ('usPowerTuneDataSetID', ctypes.c_uint16),\n    ('usEDCLimit', ctypes.c_uint16),\n    ('usSoftwareShutdownTemp', ctypes.c_uint16),\n    ('usClockStretchAmount', ctypes.c_uint16),\n    ('usReserve', ctypes.c_uint16 * 2),\n]\n\nATOM_Tonga_PowerTune_Table = struct__ATOM_Tonga_PowerTune_Table\nclass struct__ATOM_Fiji_PowerTune_Table(Structure):\n    pass\n\nstruct__ATOM_Fiji_PowerTune_Table._pack_ = 1 # source:False\nstruct__ATOM_Fiji_PowerTune_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usTDP', ctypes.c_uint16),\n    ('usConfigurableTDP', ctypes.c_uint16),\n    ('usTDC', ctypes.c_uint16),\n    ('usBatteryPowerLimit', ctypes.c_uint16),\n    ('usSmallPowerLimit', ctypes.c_uint16),\n    ('usLowCACLeakage', ctypes.c_uint16),\n    ('usHighCACLeakage', ctypes.c_uint16),\n    ('usMaximumPowerDeliveryLimit', ctypes.c_uint16),\n    ('usTjMax', ctypes.c_uint16),\n    ('usPowerTuneDataSetID', ctypes.c_uint16),\n    ('usEDCLimit', ctypes.c_uint16),\n    ('usSoftwareShutdownTemp', ctypes.c_uint16),\n    ('usClockStretchAmount', ctypes.c_uint16),\n    ('usTemperatureLimitHotspot', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid1', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid2', ctypes.c_uint16),\n    ('usTemperatureLimitVrVddc', ctypes.c_uint16),\n    ('usTemperatureLimitVrMvdd', ctypes.c_uint16),\n    ('usTemperatureLimitPlx', ctypes.c_uint16),\n    ('ucLiquid1_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid2_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid_I2C_Line', ctypes.c_ubyte),\n    ('ucVr_I2C_address', ctypes.c_ubyte),\n    ('ucVr_I2C_Line', ctypes.c_ubyte),\n    ('ucPlx_I2C_address', ctypes.c_ubyte),\n    ('ucPlx_I2C_Line', ctypes.c_ubyte),\n    ('usReserved', ctypes.c_uint16),\n]\n\nATOM_Fiji_PowerTune_Table = struct__ATOM_Fiji_PowerTune_Table\nclass struct__ATOM_Polaris_PowerTune_Table(Structure):\n    pass\n\nstruct__ATOM_Polaris_PowerTune_Table._pack_ = 1 # source:False\nstruct__ATOM_Polaris_PowerTune_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usTDP', ctypes.c_uint16),\n    ('usConfigurableTDP', ctypes.c_uint16),\n    ('usTDC', ctypes.c_uint16),\n    ('usBatteryPowerLimit', ctypes.c_uint16),\n    ('usSmallPowerLimit', ctypes.c_uint16),\n    ('usLowCACLeakage', ctypes.c_uint16),\n    ('usHighCACLeakage', ctypes.c_uint16),\n    ('usMaximumPowerDeliveryLimit', ctypes.c_uint16),\n    ('usTjMax', ctypes.c_uint16),\n    ('usPowerTuneDataSetID', ctypes.c_uint16),\n    ('usEDCLimit', ctypes.c_uint16),\n    ('usSoftwareShutdownTemp', ctypes.c_uint16),\n    ('usClockStretchAmount', ctypes.c_uint16),\n    ('usTemperatureLimitHotspot', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid1', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid2', ctypes.c_uint16),\n    ('usTemperatureLimitVrVddc', ctypes.c_uint16),\n    ('usTemperatureLimitVrMvdd', ctypes.c_uint16),\n    ('usTemperatureLimitPlx', ctypes.c_uint16),\n    ('ucLiquid1_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid2_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid_I2C_Line', ctypes.c_ubyte),\n    ('ucVr_I2C_address', ctypes.c_ubyte),\n    ('ucVr_I2C_Line', ctypes.c_ubyte),\n    ('ucPlx_I2C_address', ctypes.c_ubyte),\n    ('ucPlx_I2C_Line', ctypes.c_ubyte),\n    ('usBoostPowerLimit', ctypes.c_uint16),\n    ('ucCKS_LDO_REFSEL', ctypes.c_ubyte),\n    ('ucHotSpotOnly', ctypes.c_ubyte),\n    ('ucReserve', ctypes.c_ubyte),\n    ('usReserve', ctypes.c_uint16),\n]\n\nATOM_Polaris_PowerTune_Table = struct__ATOM_Polaris_PowerTune_Table\nclass struct__ATOM_Tonga_PPM_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_PPM_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_PPM_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucPpmDesign', ctypes.c_ubyte),\n    ('usCpuCoreNumber', ctypes.c_uint16),\n    ('ulPlatformTDP', ctypes.c_uint32),\n    ('ulSmallACPlatformTDP', ctypes.c_uint32),\n    ('ulPlatformTDC', ctypes.c_uint32),\n    ('ulSmallACPlatformTDC', ctypes.c_uint32),\n    ('ulApuTDP', ctypes.c_uint32),\n    ('ulDGpuTDP', ctypes.c_uint32),\n    ('ulDGpuUlvPower', ctypes.c_uint32),\n    ('ulTjmax', ctypes.c_uint32),\n]\n\nATOM_Tonga_PPM_Table = struct__ATOM_Tonga_PPM_Table\nclass struct__ATOM_Tonga_Hard_Limit_Record(Structure):\n    pass\n\nstruct__ATOM_Tonga_Hard_Limit_Record._pack_ = 1 # source:False\nstruct__ATOM_Tonga_Hard_Limit_Record._fields_ = [\n    ('ulSCLKLimit', ctypes.c_uint32),\n    ('ulMCLKLimit', ctypes.c_uint32),\n    ('usVddcLimit', ctypes.c_uint16),\n    ('usVddciLimit', ctypes.c_uint16),\n    ('usVddgfxLimit', ctypes.c_uint16),\n]\n\nATOM_Tonga_Hard_Limit_Record = struct__ATOM_Tonga_Hard_Limit_Record\nclass struct__ATOM_Tonga_Hard_Limit_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_Hard_Limit_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_Hard_Limit_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Tonga_Hard_Limit_Record * 0),\n]\n\nATOM_Tonga_Hard_Limit_Table = struct__ATOM_Tonga_Hard_Limit_Table\nclass struct__ATOM_Tonga_GPIO_Table(Structure):\n    pass\n\nstruct__ATOM_Tonga_GPIO_Table._pack_ = 1 # source:False\nstruct__ATOM_Tonga_GPIO_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucVRHotTriggeredSclkDpmIndex', ctypes.c_ubyte),\n    ('ucReserve', ctypes.c_ubyte * 5),\n]\n\nATOM_Tonga_GPIO_Table = struct__ATOM_Tonga_GPIO_Table\nclass struct__PPTable_Generic_SubTable_Header(Structure):\n    pass\n\nstruct__PPTable_Generic_SubTable_Header._pack_ = 1 # source:False\nstruct__PPTable_Generic_SubTable_Header._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n]\n\nPPTable_Generic_SubTable_Header = struct__PPTable_Generic_SubTable_Header\n__all__ = \\\n    ['ATOM_Fiji_Fan_Table', 'ATOM_Fiji_PowerTune_Table',\n    'ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2',\n    'ATOM_PPLIB_CLASSIFICATION_ACPI',\n    'ATOM_PPLIB_CLASSIFICATION_BOOT',\n    'ATOM_PPLIB_CLASSIFICATION_FORCED',\n    'ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE',\n    'ATOM_PPLIB_CLASSIFICATION_REST',\n    'ATOM_PPLIB_CLASSIFICATION_THERMAL',\n    'ATOM_PPLIB_CLASSIFICATION_UI_BALANCED',\n    'ATOM_PPLIB_CLASSIFICATION_UI_BATTERY',\n    'ATOM_PPLIB_CLASSIFICATION_UI_MASK',\n    'ATOM_PPLIB_CLASSIFICATION_UI_NONE',\n    'ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE',\n    'ATOM_PPLIB_CLASSIFICATION_UI_SHIFT', 'ATOM_PPM_A_A',\n    'ATOM_PPM_A_I', 'ATOM_Polaris10_PCIE_Record',\n    'ATOM_Polaris10_PCIE_Table', 'ATOM_Polaris_Fan_Table',\n    'ATOM_Polaris_PowerTune_Table',\n    'ATOM_Polaris_SCLK_Dependency_Record',\n    'ATOM_Polaris_SCLK_Dependency_Table',\n    'ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE',\n    'ATOM_TONGA_PP_FANPARAMETERS_NOFAN',\n    'ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK',\n    'ATOM_TONGA_PP_PLATFORM_CAP_BACO',\n    'ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND',\n    'ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC',\n    'ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL',\n    'ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17',\n    'ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY',\n    'ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL',\n    'ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL',\n    'ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL',\n    'ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL',\n    'ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL',\n    'ATOM_TONGA_PP_THERMALCONTROLLER_FIJI',\n    'ATOM_TONGA_PP_THERMALCONTROLLER_LM96163',\n    'ATOM_TONGA_PP_THERMALCONTROLLER_NONE',\n    'ATOM_TONGA_PP_THERMALCONTROLLER_TONGA',\n    'ATOM_Tonga_DISALLOW_ON_DC', 'ATOM_Tonga_ENABLE_VARIBRIGHT',\n    'ATOM_Tonga_Fan_Table', 'ATOM_Tonga_GPIO_Table',\n    'ATOM_Tonga_Hard_Limit_Record', 'ATOM_Tonga_Hard_Limit_Table',\n    'ATOM_Tonga_MCLK_Dependency_Record',\n    'ATOM_Tonga_MCLK_Dependency_Table',\n    'ATOM_Tonga_MM_Dependency_Record',\n    'ATOM_Tonga_MM_Dependency_Table', 'ATOM_Tonga_PCIE_Record',\n    'ATOM_Tonga_PCIE_Table', 'ATOM_Tonga_POWERPLAYTABLE',\n    'ATOM_Tonga_PPM_Table', 'ATOM_Tonga_PowerTune_Table',\n    'ATOM_Tonga_SCLK_Dependency_Record',\n    'ATOM_Tonga_SCLK_Dependency_Table', 'ATOM_Tonga_State',\n    'ATOM_Tonga_State_Array', 'ATOM_Tonga_TABLE_REVISION_TONGA',\n    'ATOM_Tonga_Thermal_Controller', 'ATOM_Tonga_VCE_State_Record',\n    'ATOM_Tonga_VCE_State_Table', 'ATOM_Tonga_Voltage_Lookup_Record',\n    'ATOM_Tonga_Voltage_Lookup_Table',\n    'PPTable_Generic_SubTable_Header', 'TONGA_PPTABLE_H',\n    '____RETIRE10000____', '____RETIRE1024____', '____RETIRE128____',\n    '____RETIRE16____', '____RETIRE2000____', '____RETIRE2048____',\n    '____RETIRE256____', '____RETIRE4000____', '____RETIRE512____',\n    '____RETIRE64____', 'struct__ATOM_COMMON_TABLE_HEADER',\n    'struct__ATOM_Fiji_Fan_Table',\n    'struct__ATOM_Fiji_PowerTune_Table',\n    'struct__ATOM_Polaris10_PCIE_Record',\n    'struct__ATOM_Polaris10_PCIE_Table',\n    'struct__ATOM_Polaris_Fan_Table',\n    'struct__ATOM_Polaris_PowerTune_Table',\n    'struct__ATOM_Polaris_SCLK_Dependency_Record',\n    'struct__ATOM_Polaris_SCLK_Dependency_Table',\n    'struct__ATOM_Tonga_Fan_Table', 'struct__ATOM_Tonga_GPIO_Table',\n    'struct__ATOM_Tonga_Hard_Limit_Record',\n    'struct__ATOM_Tonga_Hard_Limit_Table',\n    'struct__ATOM_Tonga_MCLK_Dependency_Record',\n    'struct__ATOM_Tonga_MCLK_Dependency_Table',\n    'struct__ATOM_Tonga_MM_Dependency_Record',\n    'struct__ATOM_Tonga_MM_Dependency_Table',\n    'struct__ATOM_Tonga_PCIE_Record', 'struct__ATOM_Tonga_PCIE_Table',\n    'struct__ATOM_Tonga_POWERPLAYTABLE',\n    'struct__ATOM_Tonga_PPM_Table',\n    'struct__ATOM_Tonga_PowerTune_Table',\n    'struct__ATOM_Tonga_SCLK_Dependency_Record',\n    'struct__ATOM_Tonga_SCLK_Dependency_Table',\n    'struct__ATOM_Tonga_State', 'struct__ATOM_Tonga_State_Array',\n    'struct__ATOM_Tonga_Thermal_Controller',\n    'struct__ATOM_Tonga_VCE_State_Record',\n    'struct__ATOM_Tonga_VCE_State_Table',\n    'struct__ATOM_Tonga_Voltage_Lookup_Record',\n    'struct__ATOM_Tonga_Voltage_Lookup_Table',\n    'struct__PPTable_Generic_SubTable_Header']\n"
  },
  {
    "path": "src/upp/atom_gen/smu_v11_0_7_navi20.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\nSMU_11_0_7_PPTABLE_H = True # macro\nSMU_11_0_7_TABLE_FORMAT_REVISION = 15 # macro\nSMU_11_0_7_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro\nSMU_11_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro\nSMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro\nSMU_11_0_7_PP_PLATFORM_CAP_BACO = 0x8 # macro\nSMU_11_0_7_PP_PLATFORM_CAP_MACO = 0x10 # macro\nSMU_11_0_7_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro\nSMU_11_0_7_PP_THERMALCONTROLLER_NONE = 0 # macro\nSMU_11_0_7_PP_THERMALCONTROLLER_SIENNA_CICHLID = 28 # macro\nSMU_11_0_7_PP_OVERDRIVE_VERSION = 0x81 # macro\nSMU_11_0_7_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro\nSMU_11_0_7_MAX_ODFEATURE = 32 # macro\nSMU_11_0_7_MAX_ODSETTING = 64 # macro\nSMU_11_0_7_MAX_PMSETTING = 32 # macro\nSMU_11_0_7_MAX_PPCLOCK = 16 # macro\n\n# values for enumeration 'SMU_11_0_7_ODFEATURE_CAP'\nSMU_11_0_7_ODFEATURE_CAP__enumvalues = {\n    0: 'SMU_11_0_7_ODCAP_GFXCLK_LIMITS',\n    1: 'SMU_11_0_7_ODCAP_GFXCLK_CURVE',\n    2: 'SMU_11_0_7_ODCAP_UCLK_LIMITS',\n    3: 'SMU_11_0_7_ODCAP_POWER_LIMIT',\n    4: 'SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',\n    5: 'SMU_11_0_7_ODCAP_FAN_SPEED_MIN',\n    6: 'SMU_11_0_7_ODCAP_TEMPERATURE_FAN',\n    7: 'SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM',\n    8: 'SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE',\n    9: 'SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',\n    10: 'SMU_11_0_7_ODCAP_AUTO_UV_ENGINE',\n    11: 'SMU_11_0_7_ODCAP_AUTO_OC_ENGINE',\n    12: 'SMU_11_0_7_ODCAP_AUTO_OC_MEMORY',\n    13: 'SMU_11_0_7_ODCAP_FAN_CURVE',\n    14: 'SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',\n    15: 'SMU_11_0_7_ODCAP_POWER_MODE',\n    16: 'SMU_11_0_7_ODCAP_COUNT',\n}\nSMU_11_0_7_ODCAP_GFXCLK_LIMITS = 0\nSMU_11_0_7_ODCAP_GFXCLK_CURVE = 1\nSMU_11_0_7_ODCAP_UCLK_LIMITS = 2\nSMU_11_0_7_ODCAP_POWER_LIMIT = 3\nSMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT = 4\nSMU_11_0_7_ODCAP_FAN_SPEED_MIN = 5\nSMU_11_0_7_ODCAP_TEMPERATURE_FAN = 6\nSMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM = 7\nSMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE = 8\nSMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL = 9\nSMU_11_0_7_ODCAP_AUTO_UV_ENGINE = 10\nSMU_11_0_7_ODCAP_AUTO_OC_ENGINE = 11\nSMU_11_0_7_ODCAP_AUTO_OC_MEMORY = 12\nSMU_11_0_7_ODCAP_FAN_CURVE = 13\nSMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 14\nSMU_11_0_7_ODCAP_POWER_MODE = 15\nSMU_11_0_7_ODCAP_COUNT = 16\nSMU_11_0_7_ODFEATURE_CAP = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_11_0_7_ODFEATURE_ID'\nSMU_11_0_7_ODFEATURE_ID__enumvalues = {\n    1: 'SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS',\n    2: 'SMU_11_0_7_ODFEATURE_GFXCLK_CURVE',\n    4: 'SMU_11_0_7_ODFEATURE_UCLK_LIMITS',\n    8: 'SMU_11_0_7_ODFEATURE_POWER_LIMIT',\n    16: 'SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    32: 'SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN',\n    64: 'SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN',\n    128: 'SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM',\n    256: 'SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE',\n    512: 'SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    1024: 'SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE',\n    2048: 'SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE',\n    4096: 'SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY',\n    8192: 'SMU_11_0_7_ODFEATURE_FAN_CURVE',\n    16384: 'SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',\n    32768: 'SMU_11_0_7_ODFEATURE_POWER_MODE',\n    16: 'SMU_11_0_7_ODFEATURE_COUNT',\n}\nSMU_11_0_7_ODFEATURE_GFXCLK_LIMITS = 1\nSMU_11_0_7_ODFEATURE_GFXCLK_CURVE = 2\nSMU_11_0_7_ODFEATURE_UCLK_LIMITS = 4\nSMU_11_0_7_ODFEATURE_POWER_LIMIT = 8\nSMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16\nSMU_11_0_7_ODFEATURE_FAN_SPEED_MIN = 32\nSMU_11_0_7_ODFEATURE_TEMPERATURE_FAN = 64\nSMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM = 128\nSMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE = 256\nSMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512\nSMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE = 1024\nSMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE = 2048\nSMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY = 4096\nSMU_11_0_7_ODFEATURE_FAN_CURVE = 8192\nSMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 16384\nSMU_11_0_7_ODFEATURE_POWER_MODE = 32768\nSMU_11_0_7_ODFEATURE_COUNT = 16\nSMU_11_0_7_ODFEATURE_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_11_0_7_ODSETTING_ID'\nSMU_11_0_7_ODSETTING_ID__enumvalues = {\n    0: 'SMU_11_0_7_ODSETTING_GFXCLKFMAX',\n    1: 'SMU_11_0_7_ODSETTING_GFXCLKFMIN',\n    2: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A',\n    3: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B',\n    4: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C',\n    5: 'SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN',\n    6: 'SMU_11_0_7_ODSETTING_UCLKFMIN',\n    7: 'SMU_11_0_7_ODSETTING_UCLKFMAX',\n    8: 'SMU_11_0_7_ODSETTING_POWERPERCENTAGE',\n    9: 'SMU_11_0_7_ODSETTING_FANRPMMIN',\n    10: 'SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT',\n    11: 'SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE',\n    12: 'SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX',\n    13: 'SMU_11_0_7_ODSETTING_ACTIMING',\n    14: 'SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    15: 'SMU_11_0_7_ODSETTING_AUTOUVENGINE',\n    16: 'SMU_11_0_7_ODSETTING_AUTOOCENGINE',\n    17: 'SMU_11_0_7_ODSETTING_AUTOOCMEMORY',\n    18: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',\n    19: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1',\n    20: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',\n    21: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2',\n    22: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',\n    23: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3',\n    24: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',\n    25: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4',\n    26: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',\n    27: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5',\n    28: 'SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',\n    29: 'SMU_11_0_7_ODSETTING_POWER_MODE',\n    30: 'SMU_11_0_7_ODSETTING_COUNT',\n}\nSMU_11_0_7_ODSETTING_GFXCLKFMAX = 0\nSMU_11_0_7_ODSETTING_GFXCLKFMIN = 1\nSMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A = 2\nSMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B = 3\nSMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C = 4\nSMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN = 5\nSMU_11_0_7_ODSETTING_UCLKFMIN = 6\nSMU_11_0_7_ODSETTING_UCLKFMAX = 7\nSMU_11_0_7_ODSETTING_POWERPERCENTAGE = 8\nSMU_11_0_7_ODSETTING_FANRPMMIN = 9\nSMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT = 10\nSMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE = 11\nSMU_11_0_7_ODSETTING_OPERATINGTEMPMAX = 12\nSMU_11_0_7_ODSETTING_ACTIMING = 13\nSMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL = 14\nSMU_11_0_7_ODSETTING_AUTOUVENGINE = 15\nSMU_11_0_7_ODSETTING_AUTOOCENGINE = 16\nSMU_11_0_7_ODSETTING_AUTOOCMEMORY = 17\nSMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1 = 18\nSMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1 = 19\nSMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2 = 20\nSMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2 = 21\nSMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3 = 22\nSMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3 = 23\nSMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4 = 24\nSMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4 = 25\nSMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5 = 26\nSMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5 = 27\nSMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 28\nSMU_11_0_7_ODSETTING_POWER_MODE = 29\nSMU_11_0_7_ODSETTING_COUNT = 30\nSMU_11_0_7_ODSETTING_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_11_0_7_PWRMODE_SETTING'\nSMU_11_0_7_PWRMODE_SETTING__enumvalues = {\n    0: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET',\n    1: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE',\n    2: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO',\n    3: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE',\n    4: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',\n    5: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',\n    6: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',\n    7: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',\n}\nSMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET = 0\nSMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE = 1\nSMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO = 2\nSMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE = 3\nSMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET = 4\nSMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5\nSMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO = 6\nSMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE = 7\nSMU_11_0_7_PWRMODE_SETTING = ctypes.c_uint32 # enum\nclass struct_smu_11_0_7_overdrive_table(Structure):\n    pass\n\nstruct_smu_11_0_7_overdrive_table._pack_ = 1 # source:False\nstruct_smu_11_0_7_overdrive_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('feature_count', ctypes.c_uint32),\n    ('setting_count', ctypes.c_uint32),\n    ('cap', ctypes.c_ubyte * 32),\n    ('max', ctypes.c_uint32 * 64),\n    ('min', ctypes.c_uint32 * 64),\n    ('pm_setting', ctypes.c_int16 * 32),\n]\n\n\n# values for enumeration 'SMU_11_0_7_PPCLOCK_ID'\nSMU_11_0_7_PPCLOCK_ID__enumvalues = {\n    0: 'SMU_11_0_7_PPCLOCK_GFXCLK',\n    1: 'SMU_11_0_7_PPCLOCK_SOCCLK',\n    2: 'SMU_11_0_7_PPCLOCK_UCLK',\n    3: 'SMU_11_0_7_PPCLOCK_FCLK',\n    4: 'SMU_11_0_7_PPCLOCK_DCLK_0',\n    5: 'SMU_11_0_7_PPCLOCK_VCLK_0',\n    6: 'SMU_11_0_7_PPCLOCK_DCLK_1',\n    7: 'SMU_11_0_7_PPCLOCK_VCLK_1',\n    8: 'SMU_11_0_7_PPCLOCK_DCEFCLK',\n    9: 'SMU_11_0_7_PPCLOCK_DISPCLK',\n    10: 'SMU_11_0_7_PPCLOCK_PIXCLK',\n    11: 'SMU_11_0_7_PPCLOCK_PHYCLK',\n    12: 'SMU_11_0_7_PPCLOCK_DTBCLK',\n    13: 'SMU_11_0_7_PPCLOCK_COUNT',\n}\nSMU_11_0_7_PPCLOCK_GFXCLK = 0\nSMU_11_0_7_PPCLOCK_SOCCLK = 1\nSMU_11_0_7_PPCLOCK_UCLK = 2\nSMU_11_0_7_PPCLOCK_FCLK = 3\nSMU_11_0_7_PPCLOCK_DCLK_0 = 4\nSMU_11_0_7_PPCLOCK_VCLK_0 = 5\nSMU_11_0_7_PPCLOCK_DCLK_1 = 6\nSMU_11_0_7_PPCLOCK_VCLK_1 = 7\nSMU_11_0_7_PPCLOCK_DCEFCLK = 8\nSMU_11_0_7_PPCLOCK_DISPCLK = 9\nSMU_11_0_7_PPCLOCK_PIXCLK = 10\nSMU_11_0_7_PPCLOCK_PHYCLK = 11\nSMU_11_0_7_PPCLOCK_DTBCLK = 12\nSMU_11_0_7_PPCLOCK_COUNT = 13\nSMU_11_0_7_PPCLOCK_ID = ctypes.c_uint32 # enum\nclass struct_smu_11_0_7_power_saving_clock_table(Structure):\n    pass\n\nstruct_smu_11_0_7_power_saving_clock_table._pack_ = 1 # source:False\nstruct_smu_11_0_7_power_saving_clock_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('count', ctypes.c_uint32),\n    ('max', ctypes.c_uint32 * 16),\n    ('min', ctypes.c_uint32 * 16),\n]\n\nclass struct_smu_11_0_7_powerplay_table(Structure):\n    pass\n\nclass struct_atom_common_table_header(Structure):\n    pass\n\nstruct_atom_common_table_header._pack_ = 1 # source:False\nstruct_atom_common_table_header._fields_ = [\n    ('structuresize', ctypes.c_uint16),\n    ('format_revision', ctypes.c_ubyte),\n    ('content_revision', ctypes.c_ubyte),\n]\n\nclass struct_PPTable_t(Structure):\n    pass\n\nclass struct_DpmDescriptor_t(Structure):\n    pass\n\nclass struct_LinearInt_t(Structure):\n    pass\n\nstruct_LinearInt_t._pack_ = 1 # source:False\nstruct_LinearInt_t._fields_ = [\n    ('m', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n]\n\nclass struct_QuadraticInt_t(Structure):\n    pass\n\nstruct_QuadraticInt_t._pack_ = 1 # source:False\nstruct_QuadraticInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nstruct_DpmDescriptor_t._pack_ = 1 # source:False\nstruct_DpmDescriptor_t._fields_ = [\n    ('VoltageMode', ctypes.c_ubyte),\n    ('SnapToDiscrete', ctypes.c_ubyte),\n    ('NumDiscreteLevels', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte),\n    ('ConversionToAvfsClk', struct_LinearInt_t),\n    ('SsCurve', struct_QuadraticInt_t),\n    ('SsFmin', ctypes.c_uint16),\n    ('Padding16', ctypes.c_uint16),\n]\n\nclass struct_DroopInt_t(Structure):\n    pass\n\nstruct_DroopInt_t._pack_ = 1 # source:False\nstruct_DroopInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_UclkDpmChangeRange_t(Structure):\n    pass\n\nstruct_UclkDpmChangeRange_t._pack_ = 1 # source:False\nstruct_UclkDpmChangeRange_t._fields_ = [\n    ('Fmin', ctypes.c_uint16),\n    ('Fmax', ctypes.c_uint16),\n]\n\nclass struct_PiecewiseLinearDroopInt_t(Structure):\n    pass\n\nstruct_PiecewiseLinearDroopInt_t._pack_ = 1 # source:False\nstruct_PiecewiseLinearDroopInt_t._fields_ = [\n    ('Fset', ctypes.c_uint32 * 5),\n    ('Vdroop', ctypes.c_uint32 * 5),\n]\n\nclass struct_I2cControllerConfig_t(Structure):\n    pass\n\nstruct_I2cControllerConfig_t._pack_ = 1 # source:False\nstruct_I2cControllerConfig_t._fields_ = [\n    ('Enabled', ctypes.c_ubyte),\n    ('Speed', ctypes.c_ubyte),\n    ('SlaveAddress', ctypes.c_ubyte),\n    ('ControllerPort', ctypes.c_ubyte),\n    ('ControllerName', ctypes.c_ubyte),\n    ('ThermalThrotter', ctypes.c_ubyte),\n    ('I2cProtocol', ctypes.c_ubyte),\n    ('PaddingConfig', ctypes.c_ubyte),\n]\n\nstruct_PPTable_t._pack_ = 1 # source:False\nstruct_PPTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('FeaturesToRun', ctypes.c_uint32 * 2),\n    ('SocketPowerLimitAc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitDc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),\n    ('TdcLimit', ctypes.c_uint16 * 2),\n    ('TdcLimitTau', ctypes.c_uint16 * 2),\n    ('TemperatureLimit', ctypes.c_uint16 * 10),\n    ('FitLimit', ctypes.c_uint32),\n    ('TotalPowerConfig', ctypes.c_ubyte),\n    ('TotalPowerPadding', ctypes.c_ubyte * 3),\n    ('ApccPlusResidencyLimit', ctypes.c_uint32),\n    ('SmnclkDpmFreq', ctypes.c_uint16 * 2),\n    ('SmnclkDpmVoltage', ctypes.c_uint16 * 2),\n    ('PaddingAPCC', ctypes.c_uint32),\n    ('PerPartDroopVsetGfxDfll', ctypes.c_uint16 * 5),\n    ('PaddingPerPartDroop', ctypes.c_uint16),\n    ('ThrottlerControlMask', ctypes.c_uint32),\n    ('FwDStateMask', ctypes.c_uint32),\n    ('UlvVoltageOffsetSoc', ctypes.c_uint16),\n    ('UlvVoltageOffsetGfx', ctypes.c_uint16),\n    ('MinVoltageUlvGfx', ctypes.c_uint16),\n    ('MinVoltageUlvSoc', ctypes.c_uint16),\n    ('SocLIVmin', ctypes.c_uint16),\n    ('PaddingLIVmin', ctypes.c_uint16),\n    ('GceaLinkMgrIdleThreshold', ctypes.c_ubyte),\n    ('paddingRlcUlvParams', ctypes.c_ubyte * 3),\n    ('MinVoltageGfx', ctypes.c_uint16),\n    ('MinVoltageSoc', ctypes.c_uint16),\n    ('MaxVoltageGfx', ctypes.c_uint16),\n    ('MaxVoltageSoc', ctypes.c_uint16),\n    ('LoadLineResistanceGfx', ctypes.c_uint16),\n    ('LoadLineResistanceSoc', ctypes.c_uint16),\n    ('VDDGFX_TVmin', ctypes.c_uint16),\n    ('VDDSOC_TVmin', ctypes.c_uint16),\n    ('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),\n    ('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),\n    ('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),\n    ('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),\n    ('VDDGFX_TVminHystersis', ctypes.c_uint16),\n    ('VDDSOC_TVminHystersis', ctypes.c_uint16),\n    ('DpmDescriptor', struct_DpmDescriptor_t * 13),\n    ('FreqTableGfx', ctypes.c_uint16 * 16),\n    ('FreqTableVclk', ctypes.c_uint16 * 8),\n    ('FreqTableDclk', ctypes.c_uint16 * 8),\n    ('FreqTableSocclk', ctypes.c_uint16 * 8),\n    ('FreqTableUclk', ctypes.c_uint16 * 4),\n    ('FreqTableDcefclk', ctypes.c_uint16 * 8),\n    ('FreqTableDispclk', ctypes.c_uint16 * 8),\n    ('FreqTablePixclk', ctypes.c_uint16 * 8),\n    ('FreqTablePhyclk', ctypes.c_uint16 * 8),\n    ('FreqTableDtbclk', ctypes.c_uint16 * 8),\n    ('FreqTableFclk', ctypes.c_uint16 * 8),\n    ('Paddingclks', ctypes.c_uint32),\n    ('PerPartDroopModelGfxDfll', struct_DroopInt_t * 5),\n    ('DcModeMaxFreq', ctypes.c_uint32 * 13),\n    ('FreqTableUclkDiv', ctypes.c_ubyte * 4),\n    ('FclkBoostFreq', ctypes.c_uint16),\n    ('FclkParamPadding', ctypes.c_uint16),\n    ('Mp0clkFreq', ctypes.c_uint16 * 2),\n    ('Mp0DpmVoltage', ctypes.c_uint16 * 2),\n    ('MemVddciVoltage', ctypes.c_uint16 * 4),\n    ('MemMvddVoltage', ctypes.c_uint16 * 4),\n    ('GfxclkFgfxoffEntry', ctypes.c_uint16),\n    ('GfxclkFinit', ctypes.c_uint16),\n    ('GfxclkFidle', ctypes.c_uint16),\n    ('GfxclkSource', ctypes.c_ubyte),\n    ('GfxclkPadding', ctypes.c_ubyte),\n    ('GfxGpoSubFeatureMask', ctypes.c_ubyte),\n    ('GfxGpoEnabledWorkPolicyMask', ctypes.c_ubyte),\n    ('GfxGpoDisabledWorkPolicyMask', ctypes.c_ubyte),\n    ('GfxGpoPadding', ctypes.c_ubyte * 1),\n    ('GfxGpoVotingAllow', ctypes.c_uint32),\n    ('GfxGpoPadding32', ctypes.c_uint32 * 4),\n    ('GfxDcsFopt', ctypes.c_uint16),\n    ('GfxDcsFclkFopt', ctypes.c_uint16),\n    ('GfxDcsUclkFopt', ctypes.c_uint16),\n    ('DcsGfxOffVoltage', ctypes.c_uint16),\n    ('DcsMinGfxOffTime', ctypes.c_uint16),\n    ('DcsMaxGfxOffTime', ctypes.c_uint16),\n    ('DcsMinCreditAccum', ctypes.c_uint32),\n    ('DcsExitHysteresis', ctypes.c_uint16),\n    ('DcsTimeout', ctypes.c_uint16),\n    ('DcsParamPadding', ctypes.c_uint32 * 5),\n    ('FlopsPerByteTable', ctypes.c_uint16 * 16),\n    ('LowestUclkReservedForUlv', ctypes.c_ubyte),\n    ('PaddingMem', ctypes.c_ubyte * 3),\n    ('UclkDpmPstates', ctypes.c_ubyte * 4),\n    ('UclkDpmSrcFreqRange', struct_UclkDpmChangeRange_t),\n    ('UclkDpmTargFreqRange', struct_UclkDpmChangeRange_t),\n    ('UclkDpmMidstepFreq', ctypes.c_uint16),\n    ('UclkMidstepPadding', ctypes.c_uint16),\n    ('PcieGenSpeed', ctypes.c_ubyte * 2),\n    ('PcieLaneCount', ctypes.c_ubyte * 2),\n    ('LclkFreq', ctypes.c_uint16 * 2),\n    ('FanStopTemp', ctypes.c_uint16),\n    ('FanStartTemp', ctypes.c_uint16),\n    ('FanGain', ctypes.c_uint16 * 10),\n    ('FanPwmMin', ctypes.c_uint16),\n    ('FanAcousticLimitRpm', ctypes.c_uint16),\n    ('FanThrottlingRpm', ctypes.c_uint16),\n    ('FanMaximumRpm', ctypes.c_uint16),\n    ('MGpuFanBoostLimitRpm', ctypes.c_uint16),\n    ('FanTargetTemperature', ctypes.c_uint16),\n    ('FanTargetGfxclk', ctypes.c_uint16),\n    ('FanPadding16', ctypes.c_uint16),\n    ('FanTempInputSelect', ctypes.c_ubyte),\n    ('FanPadding', ctypes.c_ubyte),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('FanTachEdgePerRev', ctypes.c_ubyte),\n    ('FuzzyFan_ErrorSetDelta', ctypes.c_int16),\n    ('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),\n    ('FuzzyFan_PwmSetDelta', ctypes.c_int16),\n    ('FuzzyFan_Reserved', ctypes.c_uint16),\n    ('OverrideAvfsGb', ctypes.c_ubyte * 2),\n    ('dBtcGbGfxDfllModelSelect', ctypes.c_ubyte),\n    ('Padding8_Avfs', ctypes.c_ubyte),\n    ('qAvfsGb', struct_QuadraticInt_t * 2),\n    ('dBtcGbGfxPll', struct_DroopInt_t),\n    ('dBtcGbGfxDfll', struct_DroopInt_t),\n    ('dBtcGbSoc', struct_DroopInt_t),\n    ('qAgingGb', struct_LinearInt_t * 2),\n    ('PiecewiseLinearDroopIntGfxDfll', struct_PiecewiseLinearDroopInt_t),\n    ('qStaticVoltageOffset', struct_QuadraticInt_t * 2),\n    ('DcTol', ctypes.c_uint16 * 2),\n    ('DcBtcEnabled', ctypes.c_ubyte * 2),\n    ('Padding8_GfxBtc', ctypes.c_ubyte * 2),\n    ('DcBtcMin', ctypes.c_uint16 * 2),\n    ('DcBtcMax', ctypes.c_uint16 * 2),\n    ('DcBtcGb', ctypes.c_uint16 * 2),\n    ('XgmiDpmPstates', ctypes.c_ubyte * 2),\n    ('XgmiDpmSpare', ctypes.c_ubyte * 2),\n    ('DebugOverrides', ctypes.c_uint32),\n    ('ReservedEquation0', struct_QuadraticInt_t),\n    ('ReservedEquation1', struct_QuadraticInt_t),\n    ('ReservedEquation2', struct_QuadraticInt_t),\n    ('ReservedEquation3', struct_QuadraticInt_t),\n    ('CustomerVariant', ctypes.c_ubyte),\n    ('VcBtcEnabled', ctypes.c_ubyte),\n    ('VcBtcVminT0', ctypes.c_uint16),\n    ('VcBtcFixedVminAgingOffset', ctypes.c_uint16),\n    ('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16),\n    ('VcBtcPsmA', ctypes.c_uint32),\n    ('VcBtcPsmB', ctypes.c_uint32),\n    ('VcBtcVminA', ctypes.c_uint32),\n    ('VcBtcVminB', ctypes.c_uint32),\n    ('LedGpio', ctypes.c_uint16),\n    ('GfxPowerStagesGpio', ctypes.c_uint16),\n    ('SkuReserved', ctypes.c_uint32 * 8),\n    ('GamingClk', ctypes.c_uint32 * 6),\n    ('I2cControllers', struct_I2cControllerConfig_t * 16),\n    ('GpioScl', ctypes.c_ubyte),\n    ('GpioSda', ctypes.c_ubyte),\n    ('FchUsbPdSlaveAddr', ctypes.c_ubyte),\n    ('I2cSpare', ctypes.c_ubyte * 1),\n    ('VddGfxVrMapping', ctypes.c_ubyte),\n    ('VddSocVrMapping', ctypes.c_ubyte),\n    ('VddMem0VrMapping', ctypes.c_ubyte),\n    ('VddMem1VrMapping', ctypes.c_ubyte),\n    ('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('SocUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('VddciUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('MvddUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('GfxMaxCurrent', ctypes.c_uint16),\n    ('GfxOffset', ctypes.c_byte),\n    ('Padding_TelemetryGfx', ctypes.c_ubyte),\n    ('SocMaxCurrent', ctypes.c_uint16),\n    ('SocOffset', ctypes.c_byte),\n    ('Padding_TelemetrySoc', ctypes.c_ubyte),\n    ('Mem0MaxCurrent', ctypes.c_uint16),\n    ('Mem0Offset', ctypes.c_byte),\n    ('Padding_TelemetryMem0', ctypes.c_ubyte),\n    ('Mem1MaxCurrent', ctypes.c_uint16),\n    ('Mem1Offset', ctypes.c_byte),\n    ('Padding_TelemetryMem1', ctypes.c_ubyte),\n    ('MvddRatio', ctypes.c_uint32),\n    ('AcDcGpio', ctypes.c_ubyte),\n    ('AcDcPolarity', ctypes.c_ubyte),\n    ('VR0HotGpio', ctypes.c_ubyte),\n    ('VR0HotPolarity', ctypes.c_ubyte),\n    ('VR1HotGpio', ctypes.c_ubyte),\n    ('VR1HotPolarity', ctypes.c_ubyte),\n    ('GthrGpio', ctypes.c_ubyte),\n    ('GthrPolarity', ctypes.c_ubyte),\n    ('LedPin0', ctypes.c_ubyte),\n    ('LedPin1', ctypes.c_ubyte),\n    ('LedPin2', ctypes.c_ubyte),\n    ('LedEnableMask', ctypes.c_ubyte),\n    ('LedPcie', ctypes.c_ubyte),\n    ('LedError', ctypes.c_ubyte),\n    ('LedSpare1', ctypes.c_ubyte * 2),\n    ('PllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('PllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('PllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('DfllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('DfllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('DfllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('UclkSpreadPadding', ctypes.c_uint16),\n    ('UclkSpreadFreq', ctypes.c_uint16),\n    ('FclkSpreadEnabled', ctypes.c_ubyte),\n    ('FclkSpreadPercent', ctypes.c_ubyte),\n    ('FclkSpreadFreq', ctypes.c_uint16),\n    ('MemoryChannelEnabled', ctypes.c_uint32),\n    ('DramBitWidth', ctypes.c_ubyte),\n    ('PaddingMem1', ctypes.c_ubyte * 3),\n    ('TotalBoardPower', ctypes.c_uint16),\n    ('BoardPowerPadding', ctypes.c_uint16),\n    ('XgmiLinkSpeed', ctypes.c_ubyte * 4),\n    ('XgmiLinkWidth', ctypes.c_ubyte * 4),\n    ('XgmiFclkFreq', ctypes.c_uint16 * 4),\n    ('XgmiSocVoltage', ctypes.c_uint16 * 4),\n    ('HsrEnabled', ctypes.c_ubyte),\n    ('VddqOffEnabled', ctypes.c_ubyte),\n    ('PaddingUmcFlags', ctypes.c_ubyte * 2),\n    ('UclkSpreadPercent', ctypes.c_ubyte * 16),\n    ('BoardReserved', ctypes.c_uint32 * 11),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nstruct_smu_11_0_7_powerplay_table._pack_ = 1 # source:False\nstruct_smu_11_0_7_powerplay_table._fields_ = [\n    ('header', struct_atom_common_table_header),\n    ('table_revision', ctypes.c_ubyte),\n    ('table_size', ctypes.c_uint16),\n    ('golden_pp_id', ctypes.c_uint32),\n    ('golden_revision', ctypes.c_uint32),\n    ('format_id', ctypes.c_uint16),\n    ('platform_caps', ctypes.c_uint32),\n    ('thermal_controller_type', ctypes.c_ubyte),\n    ('small_power_limit1', ctypes.c_uint16),\n    ('small_power_limit2', ctypes.c_uint16),\n    ('boost_power_limit', ctypes.c_uint16),\n    ('software_shutdown_temp', ctypes.c_uint16),\n    ('reserve', ctypes.c_uint16 * 8),\n    ('power_saving_clock', struct_smu_11_0_7_power_saving_clock_table),\n    ('overdrive_table', struct_smu_11_0_7_overdrive_table),\n    ('smc_pptable', struct_PPTable_t),\n]\n\n__all__ = \\\n    ['SMU_11_0_7_MAX_ODFEATURE', 'SMU_11_0_7_MAX_ODSETTING',\n    'SMU_11_0_7_MAX_PMSETTING', 'SMU_11_0_7_MAX_PPCLOCK',\n    'SMU_11_0_7_ODCAP_AUTO_OC_ENGINE',\n    'SMU_11_0_7_ODCAP_AUTO_OC_MEMORY',\n    'SMU_11_0_7_ODCAP_AUTO_UV_ENGINE', 'SMU_11_0_7_ODCAP_COUNT',\n    'SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_7_ODCAP_FAN_CURVE', 'SMU_11_0_7_ODCAP_FAN_SPEED_MIN',\n    'SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_7_ODCAP_GFXCLK_CURVE', 'SMU_11_0_7_ODCAP_GFXCLK_LIMITS',\n    'SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE',\n    'SMU_11_0_7_ODCAP_POWER_LIMIT', 'SMU_11_0_7_ODCAP_POWER_MODE',\n    'SMU_11_0_7_ODCAP_TEMPERATURE_FAN',\n    'SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM',\n    'SMU_11_0_7_ODCAP_UCLK_LIMITS',\n    'SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE',\n    'SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY',\n    'SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_7_ODFEATURE_CAP',\n    'SMU_11_0_7_ODFEATURE_COUNT',\n    'SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_7_ODFEATURE_FAN_CURVE',\n    'SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN',\n    'SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_7_ODFEATURE_GFXCLK_CURVE',\n    'SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_7_ODFEATURE_ID',\n    'SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE',\n    'SMU_11_0_7_ODFEATURE_POWER_LIMIT',\n    'SMU_11_0_7_ODFEATURE_POWER_MODE',\n    'SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN',\n    'SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM',\n    'SMU_11_0_7_ODFEATURE_UCLK_LIMITS',\n    'SMU_11_0_7_ODSETTING_ACTIMING',\n    'SMU_11_0_7_ODSETTING_AUTOOCENGINE',\n    'SMU_11_0_7_ODSETTING_AUTOOCMEMORY',\n    'SMU_11_0_7_ODSETTING_AUTOUVENGINE',\n    'SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_7_ODSETTING_COUNT',\n    'SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN',\n    'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A',\n    'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B',\n    'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C',\n    'SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT',\n    'SMU_11_0_7_ODSETTING_FANRPMMIN',\n    'SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',\n    'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',\n    'SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_7_ODSETTING_GFXCLKFMAX',\n    'SMU_11_0_7_ODSETTING_GFXCLKFMIN', 'SMU_11_0_7_ODSETTING_ID',\n    'SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX',\n    'SMU_11_0_7_ODSETTING_POWERPERCENTAGE',\n    'SMU_11_0_7_ODSETTING_POWER_MODE',\n    'SMU_11_0_7_ODSETTING_UCLKFMAX', 'SMU_11_0_7_ODSETTING_UCLKFMIN',\n    'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',\n    'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',\n    'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',\n    'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',\n    'SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE',\n    'SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET',\n    'SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE',\n    'SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO',\n    'SMU_11_0_7_PPCLOCK_COUNT', 'SMU_11_0_7_PPCLOCK_DCEFCLK',\n    'SMU_11_0_7_PPCLOCK_DCLK_0', 'SMU_11_0_7_PPCLOCK_DCLK_1',\n    'SMU_11_0_7_PPCLOCK_DISPCLK', 'SMU_11_0_7_PPCLOCK_DTBCLK',\n    'SMU_11_0_7_PPCLOCK_FCLK', 'SMU_11_0_7_PPCLOCK_GFXCLK',\n    'SMU_11_0_7_PPCLOCK_ID', 'SMU_11_0_7_PPCLOCK_PHYCLK',\n    'SMU_11_0_7_PPCLOCK_PIXCLK', 'SMU_11_0_7_PPCLOCK_SOCCLK',\n    'SMU_11_0_7_PPCLOCK_UCLK', 'SMU_11_0_7_PPCLOCK_VCLK_0',\n    'SMU_11_0_7_PPCLOCK_VCLK_1', 'SMU_11_0_7_PPTABLE_H',\n    'SMU_11_0_7_PP_OVERDRIVE_VERSION',\n    'SMU_11_0_7_PP_PLATFORM_CAP_BACO',\n    'SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC',\n    'SMU_11_0_7_PP_PLATFORM_CAP_MACO',\n    'SMU_11_0_7_PP_PLATFORM_CAP_POWERPLAY',\n    'SMU_11_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'SMU_11_0_7_PP_PLATFORM_CAP_SHADOWPSTATE',\n    'SMU_11_0_7_PP_POWERSAVINGCLOCK_VERSION',\n    'SMU_11_0_7_PP_THERMALCONTROLLER_NONE',\n    'SMU_11_0_7_PP_THERMALCONTROLLER_SIENNA_CICHLID',\n    'SMU_11_0_7_PWRMODE_SETTING', 'SMU_11_0_7_TABLE_FORMAT_REVISION',\n    'SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',\n    'struct_DpmDescriptor_t', 'struct_DroopInt_t',\n    'struct_I2cControllerConfig_t', 'struct_LinearInt_t',\n    'struct_PPTable_t', 'struct_PiecewiseLinearDroopInt_t',\n    'struct_QuadraticInt_t', 'struct_UclkDpmChangeRange_t',\n    'struct_atom_common_table_header',\n    'struct_smu_11_0_7_overdrive_table',\n    'struct_smu_11_0_7_power_saving_clock_table',\n    'struct_smu_11_0_7_powerplay_table']\n"
  },
  {
    "path": "src/upp/atom_gen/smu_v11_0_arcturus.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\nSMU_11_0_PPTABLE_H = True # macro\nSMU_11_0_TABLE_FORMAT_REVISION = 12 # macro\nSMU_11_0_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro\nSMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro\nSMU_11_0_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro\nSMU_11_0_PP_PLATFORM_CAP_BACO = 0x8 # macro\nSMU_11_0_PP_PLATFORM_CAP_MACO = 0x10 # macro\nSMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro\nSMU_11_0_PP_THERMALCONTROLLER_NONE = 0 # macro\nSMU_11_0_PP_OVERDRIVE_VERSION = 0x0800 # macro\nSMU_11_0_PP_POWERSAVINGCLOCK_VERSION = 0x0100 # macro\nSMU_11_0_MAX_ODFEATURE = 32 # macro\nSMU_11_0_MAX_ODSETTING = 32 # macro\nSMU_11_0_MAX_PPCLOCK = 16 # macro\n\n# values for enumeration 'SMU_11_0_ODFEATURE_CAP'\nSMU_11_0_ODFEATURE_CAP__enumvalues = {\n    0: 'SMU_11_0_ODCAP_GFXCLK_LIMITS',\n    1: 'SMU_11_0_ODCAP_GFXCLK_CURVE',\n    2: 'SMU_11_0_ODCAP_UCLK_MAX',\n    3: 'SMU_11_0_ODCAP_POWER_LIMIT',\n    4: 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',\n    5: 'SMU_11_0_ODCAP_FAN_SPEED_MIN',\n    6: 'SMU_11_0_ODCAP_TEMPERATURE_FAN',\n    7: 'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM',\n    8: 'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE',\n    9: 'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',\n    10: 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',\n    11: 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',\n    12: 'SMU_11_0_ODCAP_AUTO_OC_MEMORY',\n    13: 'SMU_11_0_ODCAP_FAN_CURVE',\n    14: 'SMU_11_0_ODCAP_COUNT',\n}\nSMU_11_0_ODCAP_GFXCLK_LIMITS = 0\nSMU_11_0_ODCAP_GFXCLK_CURVE = 1\nSMU_11_0_ODCAP_UCLK_MAX = 2\nSMU_11_0_ODCAP_POWER_LIMIT = 3\nSMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT = 4\nSMU_11_0_ODCAP_FAN_SPEED_MIN = 5\nSMU_11_0_ODCAP_TEMPERATURE_FAN = 6\nSMU_11_0_ODCAP_TEMPERATURE_SYSTEM = 7\nSMU_11_0_ODCAP_MEMORY_TIMING_TUNE = 8\nSMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL = 9\nSMU_11_0_ODCAP_AUTO_UV_ENGINE = 10\nSMU_11_0_ODCAP_AUTO_OC_ENGINE = 11\nSMU_11_0_ODCAP_AUTO_OC_MEMORY = 12\nSMU_11_0_ODCAP_FAN_CURVE = 13\nSMU_11_0_ODCAP_COUNT = 14\nSMU_11_0_ODFEATURE_CAP = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_11_0_ODFEATURE_ID'\nSMU_11_0_ODFEATURE_ID__enumvalues = {\n    1: 'SMU_11_0_ODFEATURE_GFXCLK_LIMITS',\n    2: 'SMU_11_0_ODFEATURE_GFXCLK_CURVE',\n    4: 'SMU_11_0_ODFEATURE_UCLK_MAX',\n    8: 'SMU_11_0_ODFEATURE_POWER_LIMIT',\n    16: 'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    32: 'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',\n    64: 'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',\n    128: 'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',\n    256: 'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',\n    512: 'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    1024: 'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE',\n    2048: 'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',\n    4096: 'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',\n    8192: 'SMU_11_0_ODFEATURE_FAN_CURVE',\n    14: 'SMU_11_0_ODFEATURE_COUNT',\n}\nSMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1\nSMU_11_0_ODFEATURE_GFXCLK_CURVE = 2\nSMU_11_0_ODFEATURE_UCLK_MAX = 4\nSMU_11_0_ODFEATURE_POWER_LIMIT = 8\nSMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16\nSMU_11_0_ODFEATURE_FAN_SPEED_MIN = 32\nSMU_11_0_ODFEATURE_TEMPERATURE_FAN = 64\nSMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 128\nSMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 256\nSMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512\nSMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1024\nSMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 2048\nSMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 4096\nSMU_11_0_ODFEATURE_FAN_CURVE = 8192\nSMU_11_0_ODFEATURE_COUNT = 14\nSMU_11_0_ODFEATURE_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_11_0_ODSETTING_ID'\nSMU_11_0_ODSETTING_ID__enumvalues = {\n    0: 'SMU_11_0_ODSETTING_GFXCLKFMAX',\n    1: 'SMU_11_0_ODSETTING_GFXCLKFMIN',\n    2: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',\n    3: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',\n    4: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',\n    5: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',\n    6: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',\n    7: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',\n    8: 'SMU_11_0_ODSETTING_UCLKFMAX',\n    9: 'SMU_11_0_ODSETTING_POWERPERCENTAGE',\n    10: 'SMU_11_0_ODSETTING_FANRPMMIN',\n    11: 'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',\n    12: 'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',\n    13: 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',\n    14: 'SMU_11_0_ODSETTING_ACTIMING',\n    15: 'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    16: 'SMU_11_0_ODSETTING_AUTOUVENGINE',\n    17: 'SMU_11_0_ODSETTING_AUTOOCENGINE',\n    18: 'SMU_11_0_ODSETTING_AUTOOCMEMORY',\n    19: 'SMU_11_0_ODSETTING_COUNT',\n}\nSMU_11_0_ODSETTING_GFXCLKFMAX = 0\nSMU_11_0_ODSETTING_GFXCLKFMIN = 1\nSMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1 = 2\nSMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1 = 3\nSMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2 = 4\nSMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2 = 5\nSMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3 = 6\nSMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3 = 7\nSMU_11_0_ODSETTING_UCLKFMAX = 8\nSMU_11_0_ODSETTING_POWERPERCENTAGE = 9\nSMU_11_0_ODSETTING_FANRPMMIN = 10\nSMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT = 11\nSMU_11_0_ODSETTING_FANTARGETTEMPERATURE = 12\nSMU_11_0_ODSETTING_OPERATINGTEMPMAX = 13\nSMU_11_0_ODSETTING_ACTIMING = 14\nSMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL = 15\nSMU_11_0_ODSETTING_AUTOUVENGINE = 16\nSMU_11_0_ODSETTING_AUTOOCENGINE = 17\nSMU_11_0_ODSETTING_AUTOOCMEMORY = 18\nSMU_11_0_ODSETTING_COUNT = 19\nSMU_11_0_ODSETTING_ID = ctypes.c_uint32 # enum\nclass struct_smu_11_0_overdrive_table(Structure):\n    pass\n\nstruct_smu_11_0_overdrive_table._pack_ = 1 # source:False\nstruct_smu_11_0_overdrive_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('feature_count', ctypes.c_uint32),\n    ('setting_count', ctypes.c_uint32),\n    ('cap', ctypes.c_ubyte * 32),\n    ('max', ctypes.c_uint32 * 32),\n    ('min', ctypes.c_uint32 * 32),\n]\n\n\n# values for enumeration 'SMU_11_0_PPCLOCK_ID'\nSMU_11_0_PPCLOCK_ID__enumvalues = {\n    0: 'SMU_11_0_PPCLOCK_GFXCLK',\n    1: 'SMU_11_0_PPCLOCK_VCLK',\n    2: 'SMU_11_0_PPCLOCK_DCLK',\n    3: 'SMU_11_0_PPCLOCK_ECLK',\n    4: 'SMU_11_0_PPCLOCK_SOCCLK',\n    5: 'SMU_11_0_PPCLOCK_UCLK',\n    6: 'SMU_11_0_PPCLOCK_DCEFCLK',\n    7: 'SMU_11_0_PPCLOCK_DISPCLK',\n    8: 'SMU_11_0_PPCLOCK_PIXCLK',\n    9: 'SMU_11_0_PPCLOCK_PHYCLK',\n    10: 'SMU_11_0_PPCLOCK_COUNT',\n}\nSMU_11_0_PPCLOCK_GFXCLK = 0\nSMU_11_0_PPCLOCK_VCLK = 1\nSMU_11_0_PPCLOCK_DCLK = 2\nSMU_11_0_PPCLOCK_ECLK = 3\nSMU_11_0_PPCLOCK_SOCCLK = 4\nSMU_11_0_PPCLOCK_UCLK = 5\nSMU_11_0_PPCLOCK_DCEFCLK = 6\nSMU_11_0_PPCLOCK_DISPCLK = 7\nSMU_11_0_PPCLOCK_PIXCLK = 8\nSMU_11_0_PPCLOCK_PHYCLK = 9\nSMU_11_0_PPCLOCK_COUNT = 10\nSMU_11_0_PPCLOCK_ID = ctypes.c_uint32 # enum\nclass struct_smu_11_0_power_saving_clock_table(Structure):\n    pass\n\nstruct_smu_11_0_power_saving_clock_table._pack_ = 1 # source:False\nstruct_smu_11_0_power_saving_clock_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('count', ctypes.c_uint32),\n    ('max', ctypes.c_uint32 * 16),\n    ('min', ctypes.c_uint32 * 16),\n]\n\nclass struct_smu_11_0_powerplay_table(Structure):\n    pass\n\nclass struct_atom_common_table_header(Structure):\n    pass\n\nstruct_atom_common_table_header._pack_ = 1 # source:False\nstruct_atom_common_table_header._fields_ = [\n    ('structuresize', ctypes.c_uint16),\n    ('format_revision', ctypes.c_ubyte),\n    ('content_revision', ctypes.c_ubyte),\n]\n\nclass struct_PPTable_t(Structure):\n    pass\n\nclass struct_DpmDescriptor_t(Structure):\n    pass\n\nclass struct_LinearInt_t(Structure):\n    pass\n\nstruct_LinearInt_t._pack_ = 1 # source:False\nstruct_LinearInt_t._fields_ = [\n    ('m', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n]\n\nclass struct_QuadraticInt_t(Structure):\n    pass\n\nstruct_QuadraticInt_t._pack_ = 1 # source:False\nstruct_QuadraticInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nstruct_DpmDescriptor_t._pack_ = 1 # source:False\nstruct_DpmDescriptor_t._fields_ = [\n    ('VoltageMode', ctypes.c_ubyte),\n    ('SnapToDiscrete', ctypes.c_ubyte),\n    ('NumDiscreteLevels', ctypes.c_ubyte),\n    ('padding', ctypes.c_ubyte),\n    ('ConversionToAvfsClk', struct_LinearInt_t),\n    ('SsCurve', struct_QuadraticInt_t),\n    ('SsFmin', ctypes.c_uint16),\n    ('Padding16', ctypes.c_uint16),\n]\n\nclass struct_DroopInt_t(Structure):\n    pass\n\nstruct_DroopInt_t._pack_ = 1 # source:False\nstruct_DroopInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_I2cControllerConfig_t(Structure):\n    pass\n\nstruct_I2cControllerConfig_t._pack_ = 1 # source:False\nstruct_I2cControllerConfig_t._fields_ = [\n    ('Enabled', ctypes.c_ubyte),\n    ('Speed', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 2),\n    ('SlaveAddress', ctypes.c_uint32),\n    ('ControllerPort', ctypes.c_ubyte),\n    ('ControllerName', ctypes.c_ubyte),\n    ('ThermalThrotter', ctypes.c_ubyte),\n    ('I2cProtocol', ctypes.c_ubyte),\n]\n\nstruct_PPTable_t._pack_ = 1 # source:False\nstruct_PPTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('FeaturesToRun', ctypes.c_uint32 * 2),\n    ('SocketPowerLimitAc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),\n    ('TdcLimitSoc', ctypes.c_uint16),\n    ('TdcLimitSocTau', ctypes.c_uint16),\n    ('TdcLimitGfx', ctypes.c_uint16),\n    ('TdcLimitGfxTau', ctypes.c_uint16),\n    ('TedgeLimit', ctypes.c_uint16),\n    ('ThotspotLimit', ctypes.c_uint16),\n    ('TmemLimit', ctypes.c_uint16),\n    ('Tvr_gfxLimit', ctypes.c_uint16),\n    ('Tvr_memLimit', ctypes.c_uint16),\n    ('Tvr_socLimit', ctypes.c_uint16),\n    ('FitLimit', ctypes.c_uint32),\n    ('PpmPowerLimit', ctypes.c_uint16),\n    ('PpmTemperatureThreshold', ctypes.c_uint16),\n    ('ThrottlerControlMask', ctypes.c_uint32),\n    ('UlvVoltageOffsetGfx', ctypes.c_uint16),\n    ('UlvPadding', ctypes.c_uint16),\n    ('UlvGfxclkBypass', ctypes.c_ubyte),\n    ('Padding234', ctypes.c_ubyte * 3),\n    ('MinVoltageGfx', ctypes.c_uint16),\n    ('MinVoltageSoc', ctypes.c_uint16),\n    ('MaxVoltageGfx', ctypes.c_uint16),\n    ('MaxVoltageSoc', ctypes.c_uint16),\n    ('LoadLineResistanceGfx', ctypes.c_uint16),\n    ('LoadLineResistanceSoc', ctypes.c_uint16),\n    ('DpmDescriptor', struct_DpmDescriptor_t * 6),\n    ('FreqTableGfx', ctypes.c_uint16 * 16),\n    ('FreqTableVclk', ctypes.c_uint16 * 8),\n    ('FreqTableDclk', ctypes.c_uint16 * 8),\n    ('FreqTableSocclk', ctypes.c_uint16 * 8),\n    ('FreqTableUclk', ctypes.c_uint16 * 4),\n    ('FreqTableFclk', ctypes.c_uint16 * 8),\n    ('Paddingclks', ctypes.c_uint32 * 16),\n    ('Mp0clkFreq', ctypes.c_uint16 * 2),\n    ('Mp0DpmVoltage', ctypes.c_uint16 * 2),\n    ('GfxclkFidle', ctypes.c_uint16),\n    ('GfxclkSlewRate', ctypes.c_uint16),\n    ('Padding567', ctypes.c_ubyte * 4),\n    ('GfxclkDsMaxFreq', ctypes.c_uint16),\n    ('GfxclkSource', ctypes.c_ubyte),\n    ('Padding456', ctypes.c_ubyte),\n    ('EnableTdpm', ctypes.c_uint16),\n    ('TdpmHighHystTemperature', ctypes.c_uint16),\n    ('TdpmLowHystTemperature', ctypes.c_uint16),\n    ('GfxclkFreqHighTempLimit', ctypes.c_uint16),\n    ('FanStopTemp', ctypes.c_uint16),\n    ('FanStartTemp', ctypes.c_uint16),\n    ('FanGainEdge', ctypes.c_uint16),\n    ('FanGainHotspot', ctypes.c_uint16),\n    ('FanGainVrGfx', ctypes.c_uint16),\n    ('FanGainVrSoc', ctypes.c_uint16),\n    ('FanGainVrMem', ctypes.c_uint16),\n    ('FanGainHbm', ctypes.c_uint16),\n    ('FanPwmMin', ctypes.c_uint16),\n    ('FanAcousticLimitRpm', ctypes.c_uint16),\n    ('FanThrottlingRpm', ctypes.c_uint16),\n    ('FanMaximumRpm', ctypes.c_uint16),\n    ('FanTargetTemperature', ctypes.c_uint16),\n    ('FanTargetGfxclk', ctypes.c_uint16),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('FanTachEdgePerRev', ctypes.c_ubyte),\n    ('FanTempInputSelect', ctypes.c_ubyte),\n    ('padding8_Fan', ctypes.c_ubyte),\n    ('FuzzyFan_ErrorSetDelta', ctypes.c_int16),\n    ('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),\n    ('FuzzyFan_PwmSetDelta', ctypes.c_int16),\n    ('FuzzyFan_Reserved', ctypes.c_uint16),\n    ('OverrideAvfsGb', ctypes.c_ubyte * 2),\n    ('Padding8_Avfs', ctypes.c_ubyte * 2),\n    ('qAvfsGb', struct_QuadraticInt_t * 2),\n    ('dBtcGbGfxPll', struct_DroopInt_t),\n    ('dBtcGbGfxAfll', struct_DroopInt_t),\n    ('dBtcGbSoc', struct_DroopInt_t),\n    ('qAgingGb', struct_LinearInt_t * 2),\n    ('qStaticVoltageOffset', struct_QuadraticInt_t * 2),\n    ('DcTol', ctypes.c_uint16 * 2),\n    ('DcBtcEnabled', ctypes.c_ubyte * 2),\n    ('Padding8_GfxBtc', ctypes.c_ubyte * 2),\n    ('DcBtcMin', ctypes.c_uint16 * 2),\n    ('DcBtcMax', ctypes.c_uint16 * 2),\n    ('DcBtcGb', ctypes.c_uint16 * 2),\n    ('XgmiDpmPstates', ctypes.c_ubyte * 2),\n    ('XgmiDpmSpare', ctypes.c_ubyte * 2),\n    ('VDDGFX_TVmin', ctypes.c_uint16),\n    ('VDDSOC_TVmin', ctypes.c_uint16),\n    ('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),\n    ('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),\n    ('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),\n    ('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),\n    ('VDDGFX_TVminHystersis', ctypes.c_uint16),\n    ('VDDSOC_TVminHystersis', ctypes.c_uint16),\n    ('DebugOverrides', ctypes.c_uint32),\n    ('ReservedEquation0', struct_QuadraticInt_t),\n    ('ReservedEquation1', struct_QuadraticInt_t),\n    ('ReservedEquation2', struct_QuadraticInt_t),\n    ('ReservedEquation3', struct_QuadraticInt_t),\n    ('MinVoltageUlvGfx', ctypes.c_uint16),\n    ('PaddingUlv', ctypes.c_uint16),\n    ('TotalPowerConfig', ctypes.c_ubyte),\n    ('TotalPowerSpare1', ctypes.c_ubyte),\n    ('TotalPowerSpare2', ctypes.c_uint16),\n    ('PccThresholdLow', ctypes.c_uint16),\n    ('PccThresholdHigh', ctypes.c_uint16),\n    ('PaddingAPCC', ctypes.c_uint32 * 6),\n    ('BasePerformanceCardPower', ctypes.c_uint16),\n    ('MaxPerformanceCardPower', ctypes.c_uint16),\n    ('BasePerformanceFrequencyCap', ctypes.c_uint16),\n    ('MaxPerformanceFrequencyCap', ctypes.c_uint16),\n    ('VDDGFX_VminLow', ctypes.c_uint16),\n    ('VDDGFX_TVminLow', ctypes.c_uint16),\n    ('VDDGFX_VminLow_HiTemp', ctypes.c_uint16),\n    ('VDDGFX_VminLow_LoTemp', ctypes.c_uint16),\n    ('Reserved', ctypes.c_uint32 * 7),\n    ('MaxVoltageStepGfx', ctypes.c_uint16),\n    ('MaxVoltageStepSoc', ctypes.c_uint16),\n    ('VddGfxVrMapping', ctypes.c_ubyte),\n    ('VddSocVrMapping', ctypes.c_ubyte),\n    ('VddMemVrMapping', ctypes.c_ubyte),\n    ('BoardVrMapping', ctypes.c_ubyte),\n    ('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('ExternalSensorPresent', ctypes.c_ubyte),\n    ('Padding8_V', ctypes.c_ubyte * 2),\n    ('GfxMaxCurrent', ctypes.c_uint16),\n    ('GfxOffset', ctypes.c_byte),\n    ('Padding_TelemetryGfx', ctypes.c_ubyte),\n    ('SocMaxCurrent', ctypes.c_uint16),\n    ('SocOffset', ctypes.c_byte),\n    ('Padding_TelemetrySoc', ctypes.c_ubyte),\n    ('MemMaxCurrent', ctypes.c_uint16),\n    ('MemOffset', ctypes.c_byte),\n    ('Padding_TelemetryMem', ctypes.c_ubyte),\n    ('BoardMaxCurrent', ctypes.c_uint16),\n    ('BoardOffset', ctypes.c_byte),\n    ('Padding_TelemetryBoardInput', ctypes.c_ubyte),\n    ('VR0HotGpio', ctypes.c_ubyte),\n    ('VR0HotPolarity', ctypes.c_ubyte),\n    ('VR1HotGpio', ctypes.c_ubyte),\n    ('VR1HotPolarity', ctypes.c_ubyte),\n    ('PllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('PllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('PllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('UclkSpreadEnabled', ctypes.c_ubyte),\n    ('UclkSpreadPercent', ctypes.c_ubyte),\n    ('UclkSpreadFreq', ctypes.c_uint16),\n    ('FclkSpreadEnabled', ctypes.c_ubyte),\n    ('FclkSpreadPercent', ctypes.c_ubyte),\n    ('FclkSpreadFreq', ctypes.c_uint16),\n    ('FllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('FllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('FllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('I2cControllers', struct_I2cControllerConfig_t * 8),\n    ('MemoryChannelEnabled', ctypes.c_uint32),\n    ('DramBitWidth', ctypes.c_ubyte),\n    ('PaddingMem', ctypes.c_ubyte * 3),\n    ('TotalBoardPower', ctypes.c_uint16),\n    ('BoardPadding', ctypes.c_uint16),\n    ('XgmiLinkSpeed', ctypes.c_ubyte * 4),\n    ('XgmiLinkWidth', ctypes.c_ubyte * 4),\n    ('XgmiFclkFreq', ctypes.c_uint16 * 4),\n    ('XgmiSocVoltage', ctypes.c_uint16 * 4),\n    ('GpioI2cScl', ctypes.c_ubyte),\n    ('GpioI2cSda', ctypes.c_ubyte),\n    ('GpioPadding', ctypes.c_uint16),\n    ('BoardVoltageCoeffA', ctypes.c_uint32),\n    ('BoardVoltageCoeffB', ctypes.c_uint32),\n    ('BoardReserved', ctypes.c_uint32 * 7),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nstruct_smu_11_0_powerplay_table._pack_ = 1 # source:False\nstruct_smu_11_0_powerplay_table._fields_ = [\n    ('header', struct_atom_common_table_header),\n    ('table_revision', ctypes.c_ubyte),\n    ('table_size', ctypes.c_uint16),\n    ('golden_pp_id', ctypes.c_uint32),\n    ('golden_revision', ctypes.c_uint32),\n    ('format_id', ctypes.c_uint16),\n    ('platform_caps', ctypes.c_uint32),\n    ('thermal_controller_type', ctypes.c_ubyte),\n    ('small_power_limit1', ctypes.c_uint16),\n    ('small_power_limit2', ctypes.c_uint16),\n    ('boost_power_limit', ctypes.c_uint16),\n    ('od_turbo_power_limit', ctypes.c_uint16),\n    ('od_power_save_power_limit', ctypes.c_uint16),\n    ('software_shutdown_temp', ctypes.c_uint16),\n    ('reserve', ctypes.c_uint16 * 6),\n    ('power_saving_clock', struct_smu_11_0_power_saving_clock_table),\n    ('overdrive_table', struct_smu_11_0_overdrive_table),\n    ('smc_pptable', struct_PPTable_t),\n]\n\n__all__ = \\\n    ['SMU_11_0_MAX_ODFEATURE', 'SMU_11_0_MAX_ODSETTING',\n    'SMU_11_0_MAX_PPCLOCK', 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',\n    'SMU_11_0_ODCAP_AUTO_OC_MEMORY', 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',\n    'SMU_11_0_ODCAP_COUNT', 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_ODCAP_FAN_CURVE', 'SMU_11_0_ODCAP_FAN_SPEED_MIN',\n    'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_ODCAP_GFXCLK_CURVE', 'SMU_11_0_ODCAP_GFXCLK_LIMITS',\n    'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE', 'SMU_11_0_ODCAP_POWER_LIMIT',\n    'SMU_11_0_ODCAP_TEMPERATURE_FAN',\n    'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM', 'SMU_11_0_ODCAP_UCLK_MAX',\n    'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',\n    'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',\n    'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_ODFEATURE_CAP',\n    'SMU_11_0_ODFEATURE_COUNT',\n    'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_ODFEATURE_FAN_CURVE',\n    'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',\n    'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_ODFEATURE_GFXCLK_CURVE',\n    'SMU_11_0_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_ODFEATURE_ID',\n    'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',\n    'SMU_11_0_ODFEATURE_POWER_LIMIT',\n    'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',\n    'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',\n    'SMU_11_0_ODFEATURE_UCLK_MAX', 'SMU_11_0_ODSETTING_ACTIMING',\n    'SMU_11_0_ODSETTING_AUTOOCENGINE',\n    'SMU_11_0_ODSETTING_AUTOOCMEMORY',\n    'SMU_11_0_ODSETTING_AUTOUVENGINE', 'SMU_11_0_ODSETTING_COUNT',\n    'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',\n    'SMU_11_0_ODSETTING_FANRPMMIN',\n    'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',\n    'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_ODSETTING_GFXCLKFMAX', 'SMU_11_0_ODSETTING_GFXCLKFMIN',\n    'SMU_11_0_ODSETTING_ID', 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',\n    'SMU_11_0_ODSETTING_POWERPERCENTAGE',\n    'SMU_11_0_ODSETTING_UCLKFMAX',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',\n    'SMU_11_0_PPCLOCK_COUNT', 'SMU_11_0_PPCLOCK_DCEFCLK',\n    'SMU_11_0_PPCLOCK_DCLK', 'SMU_11_0_PPCLOCK_DISPCLK',\n    'SMU_11_0_PPCLOCK_ECLK', 'SMU_11_0_PPCLOCK_GFXCLK',\n    'SMU_11_0_PPCLOCK_ID', 'SMU_11_0_PPCLOCK_PHYCLK',\n    'SMU_11_0_PPCLOCK_PIXCLK', 'SMU_11_0_PPCLOCK_SOCCLK',\n    'SMU_11_0_PPCLOCK_UCLK', 'SMU_11_0_PPCLOCK_VCLK',\n    'SMU_11_0_PPTABLE_H', 'SMU_11_0_PP_OVERDRIVE_VERSION',\n    'SMU_11_0_PP_PLATFORM_CAP_BACO',\n    'SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC',\n    'SMU_11_0_PP_PLATFORM_CAP_MACO',\n    'SMU_11_0_PP_PLATFORM_CAP_POWERPLAY',\n    'SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE',\n    'SMU_11_0_PP_POWERSAVINGCLOCK_VERSION',\n    'SMU_11_0_PP_THERMALCONTROLLER_NONE',\n    'SMU_11_0_TABLE_FORMAT_REVISION', 'struct_DpmDescriptor_t',\n    'struct_DroopInt_t', 'struct_I2cControllerConfig_t',\n    'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',\n    'struct_atom_common_table_header',\n    'struct_smu_11_0_overdrive_table',\n    'struct_smu_11_0_power_saving_clock_table',\n    'struct_smu_11_0_powerplay_table']\n"
  },
  {
    "path": "src/upp/atom_gen/smu_v11_0_navi10.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\nSMU_11_0_PPTABLE_H = True # macro\nSMU_11_0_TABLE_FORMAT_REVISION = 12 # macro\nSMU_11_0_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro\nSMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro\nSMU_11_0_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro\nSMU_11_0_PP_PLATFORM_CAP_BACO = 0x8 # macro\nSMU_11_0_PP_PLATFORM_CAP_MACO = 0x10 # macro\nSMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro\nSMU_11_0_PP_THERMALCONTROLLER_NONE = 0 # macro\nSMU_11_0_PP_OVERDRIVE_VERSION = 0x0800 # macro\nSMU_11_0_PP_POWERSAVINGCLOCK_VERSION = 0x0100 # macro\nSMU_11_0_MAX_ODFEATURE = 32 # macro\nSMU_11_0_MAX_ODSETTING = 32 # macro\nSMU_11_0_MAX_PPCLOCK = 16 # macro\n\n# values for enumeration 'SMU_11_0_ODFEATURE_CAP'\nSMU_11_0_ODFEATURE_CAP__enumvalues = {\n    0: 'SMU_11_0_ODCAP_GFXCLK_LIMITS',\n    1: 'SMU_11_0_ODCAP_GFXCLK_CURVE',\n    2: 'SMU_11_0_ODCAP_UCLK_MAX',\n    3: 'SMU_11_0_ODCAP_POWER_LIMIT',\n    4: 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',\n    5: 'SMU_11_0_ODCAP_FAN_SPEED_MIN',\n    6: 'SMU_11_0_ODCAP_TEMPERATURE_FAN',\n    7: 'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM',\n    8: 'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE',\n    9: 'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',\n    10: 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',\n    11: 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',\n    12: 'SMU_11_0_ODCAP_AUTO_OC_MEMORY',\n    13: 'SMU_11_0_ODCAP_FAN_CURVE',\n    14: 'SMU_11_0_ODCAP_COUNT',\n}\nSMU_11_0_ODCAP_GFXCLK_LIMITS = 0\nSMU_11_0_ODCAP_GFXCLK_CURVE = 1\nSMU_11_0_ODCAP_UCLK_MAX = 2\nSMU_11_0_ODCAP_POWER_LIMIT = 3\nSMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT = 4\nSMU_11_0_ODCAP_FAN_SPEED_MIN = 5\nSMU_11_0_ODCAP_TEMPERATURE_FAN = 6\nSMU_11_0_ODCAP_TEMPERATURE_SYSTEM = 7\nSMU_11_0_ODCAP_MEMORY_TIMING_TUNE = 8\nSMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL = 9\nSMU_11_0_ODCAP_AUTO_UV_ENGINE = 10\nSMU_11_0_ODCAP_AUTO_OC_ENGINE = 11\nSMU_11_0_ODCAP_AUTO_OC_MEMORY = 12\nSMU_11_0_ODCAP_FAN_CURVE = 13\nSMU_11_0_ODCAP_COUNT = 14\nSMU_11_0_ODFEATURE_CAP = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_11_0_ODFEATURE_ID'\nSMU_11_0_ODFEATURE_ID__enumvalues = {\n    1: 'SMU_11_0_ODFEATURE_GFXCLK_LIMITS',\n    2: 'SMU_11_0_ODFEATURE_GFXCLK_CURVE',\n    4: 'SMU_11_0_ODFEATURE_UCLK_MAX',\n    8: 'SMU_11_0_ODFEATURE_POWER_LIMIT',\n    16: 'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    32: 'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',\n    64: 'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',\n    128: 'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',\n    256: 'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',\n    512: 'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    1024: 'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE',\n    2048: 'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',\n    4096: 'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',\n    8192: 'SMU_11_0_ODFEATURE_FAN_CURVE',\n    14: 'SMU_11_0_ODFEATURE_COUNT',\n}\nSMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1\nSMU_11_0_ODFEATURE_GFXCLK_CURVE = 2\nSMU_11_0_ODFEATURE_UCLK_MAX = 4\nSMU_11_0_ODFEATURE_POWER_LIMIT = 8\nSMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16\nSMU_11_0_ODFEATURE_FAN_SPEED_MIN = 32\nSMU_11_0_ODFEATURE_TEMPERATURE_FAN = 64\nSMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 128\nSMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 256\nSMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512\nSMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1024\nSMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 2048\nSMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 4096\nSMU_11_0_ODFEATURE_FAN_CURVE = 8192\nSMU_11_0_ODFEATURE_COUNT = 14\nSMU_11_0_ODFEATURE_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_11_0_ODSETTING_ID'\nSMU_11_0_ODSETTING_ID__enumvalues = {\n    0: 'SMU_11_0_ODSETTING_GFXCLKFMAX',\n    1: 'SMU_11_0_ODSETTING_GFXCLKFMIN',\n    2: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',\n    3: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',\n    4: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',\n    5: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',\n    6: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',\n    7: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',\n    8: 'SMU_11_0_ODSETTING_UCLKFMAX',\n    9: 'SMU_11_0_ODSETTING_POWERPERCENTAGE',\n    10: 'SMU_11_0_ODSETTING_FANRPMMIN',\n    11: 'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',\n    12: 'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',\n    13: 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',\n    14: 'SMU_11_0_ODSETTING_ACTIMING',\n    15: 'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    16: 'SMU_11_0_ODSETTING_AUTOUVENGINE',\n    17: 'SMU_11_0_ODSETTING_AUTOOCENGINE',\n    18: 'SMU_11_0_ODSETTING_AUTOOCMEMORY',\n    19: 'SMU_11_0_ODSETTING_COUNT',\n}\nSMU_11_0_ODSETTING_GFXCLKFMAX = 0\nSMU_11_0_ODSETTING_GFXCLKFMIN = 1\nSMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1 = 2\nSMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1 = 3\nSMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2 = 4\nSMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2 = 5\nSMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3 = 6\nSMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3 = 7\nSMU_11_0_ODSETTING_UCLKFMAX = 8\nSMU_11_0_ODSETTING_POWERPERCENTAGE = 9\nSMU_11_0_ODSETTING_FANRPMMIN = 10\nSMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT = 11\nSMU_11_0_ODSETTING_FANTARGETTEMPERATURE = 12\nSMU_11_0_ODSETTING_OPERATINGTEMPMAX = 13\nSMU_11_0_ODSETTING_ACTIMING = 14\nSMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL = 15\nSMU_11_0_ODSETTING_AUTOUVENGINE = 16\nSMU_11_0_ODSETTING_AUTOOCENGINE = 17\nSMU_11_0_ODSETTING_AUTOOCMEMORY = 18\nSMU_11_0_ODSETTING_COUNT = 19\nSMU_11_0_ODSETTING_ID = ctypes.c_uint32 # enum\nclass struct_smu_11_0_overdrive_table(Structure):\n    pass\n\nstruct_smu_11_0_overdrive_table._pack_ = 1 # source:False\nstruct_smu_11_0_overdrive_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('feature_count', ctypes.c_uint32),\n    ('setting_count', ctypes.c_uint32),\n    ('cap', ctypes.c_ubyte * 32),\n    ('max', ctypes.c_uint32 * 32),\n    ('min', ctypes.c_uint32 * 32),\n]\n\n\n# values for enumeration 'SMU_11_0_PPCLOCK_ID'\nSMU_11_0_PPCLOCK_ID__enumvalues = {\n    0: 'SMU_11_0_PPCLOCK_GFXCLK',\n    1: 'SMU_11_0_PPCLOCK_VCLK',\n    2: 'SMU_11_0_PPCLOCK_DCLK',\n    3: 'SMU_11_0_PPCLOCK_ECLK',\n    4: 'SMU_11_0_PPCLOCK_SOCCLK',\n    5: 'SMU_11_0_PPCLOCK_UCLK',\n    6: 'SMU_11_0_PPCLOCK_DCEFCLK',\n    7: 'SMU_11_0_PPCLOCK_DISPCLK',\n    8: 'SMU_11_0_PPCLOCK_PIXCLK',\n    9: 'SMU_11_0_PPCLOCK_PHYCLK',\n    10: 'SMU_11_0_PPCLOCK_COUNT',\n}\nSMU_11_0_PPCLOCK_GFXCLK = 0\nSMU_11_0_PPCLOCK_VCLK = 1\nSMU_11_0_PPCLOCK_DCLK = 2\nSMU_11_0_PPCLOCK_ECLK = 3\nSMU_11_0_PPCLOCK_SOCCLK = 4\nSMU_11_0_PPCLOCK_UCLK = 5\nSMU_11_0_PPCLOCK_DCEFCLK = 6\nSMU_11_0_PPCLOCK_DISPCLK = 7\nSMU_11_0_PPCLOCK_PIXCLK = 8\nSMU_11_0_PPCLOCK_PHYCLK = 9\nSMU_11_0_PPCLOCK_COUNT = 10\nSMU_11_0_PPCLOCK_ID = ctypes.c_uint32 # enum\nclass struct_smu_11_0_power_saving_clock_table(Structure):\n    pass\n\nstruct_smu_11_0_power_saving_clock_table._pack_ = 1 # source:False\nstruct_smu_11_0_power_saving_clock_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('count', ctypes.c_uint32),\n    ('max', ctypes.c_uint32 * 16),\n    ('min', ctypes.c_uint32 * 16),\n]\n\nclass struct_smu_11_0_powerplay_table(Structure):\n    pass\n\nclass struct_atom_common_table_header(Structure):\n    pass\n\nstruct_atom_common_table_header._pack_ = 1 # source:False\nstruct_atom_common_table_header._fields_ = [\n    ('structuresize', ctypes.c_uint16),\n    ('format_revision', ctypes.c_ubyte),\n    ('content_revision', ctypes.c_ubyte),\n]\n\nclass struct_PPTable_t(Structure):\n    pass\n\nclass struct_DpmDescriptor_t(Structure):\n    pass\n\nclass struct_LinearInt_t(Structure):\n    pass\n\nstruct_LinearInt_t._pack_ = 1 # source:False\nstruct_LinearInt_t._fields_ = [\n    ('m', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n]\n\nclass struct_QuadraticInt_t(Structure):\n    pass\n\nstruct_QuadraticInt_t._pack_ = 1 # source:False\nstruct_QuadraticInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nstruct_DpmDescriptor_t._pack_ = 1 # source:False\nstruct_DpmDescriptor_t._fields_ = [\n    ('VoltageMode', ctypes.c_ubyte),\n    ('SnapToDiscrete', ctypes.c_ubyte),\n    ('NumDiscreteLevels', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte),\n    ('ConversionToAvfsClk', struct_LinearInt_t),\n    ('SsCurve', struct_QuadraticInt_t),\n]\n\nclass struct_DroopInt_t(Structure):\n    pass\n\nstruct_DroopInt_t._pack_ = 1 # source:False\nstruct_DroopInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_I2cControllerConfig_t(Structure):\n    pass\n\nstruct_I2cControllerConfig_t._pack_ = 1 # source:False\nstruct_I2cControllerConfig_t._fields_ = [\n    ('Enabled', ctypes.c_ubyte),\n    ('Speed', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 2),\n    ('SlaveAddress', ctypes.c_uint32),\n    ('ControllerPort', ctypes.c_ubyte),\n    ('ControllerName', ctypes.c_ubyte),\n    ('ThermalThrotter', ctypes.c_ubyte),\n    ('I2cProtocol', ctypes.c_ubyte),\n]\n\nstruct_PPTable_t._pack_ = 1 # source:False\nstruct_PPTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('FeaturesToRun', ctypes.c_uint32 * 2),\n    ('SocketPowerLimitAc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitDc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),\n    ('TdcLimitSoc', ctypes.c_uint16),\n    ('TdcLimitSocTau', ctypes.c_uint16),\n    ('TdcLimitGfx', ctypes.c_uint16),\n    ('TdcLimitGfxTau', ctypes.c_uint16),\n    ('TedgeLimit', ctypes.c_uint16),\n    ('ThotspotLimit', ctypes.c_uint16),\n    ('TmemLimit', ctypes.c_uint16),\n    ('Tvr_gfxLimit', ctypes.c_uint16),\n    ('Tvr_mem0Limit', ctypes.c_uint16),\n    ('Tvr_mem1Limit', ctypes.c_uint16),\n    ('Tvr_socLimit', ctypes.c_uint16),\n    ('Tliquid0Limit', ctypes.c_uint16),\n    ('Tliquid1Limit', ctypes.c_uint16),\n    ('TplxLimit', ctypes.c_uint16),\n    ('FitLimit', ctypes.c_uint32),\n    ('PpmPowerLimit', ctypes.c_uint16),\n    ('PpmTemperatureThreshold', ctypes.c_uint16),\n    ('ThrottlerControlMask', ctypes.c_uint32),\n    ('FwDStateMask', ctypes.c_uint32),\n    ('UlvVoltageOffsetSoc', ctypes.c_uint16),\n    ('UlvVoltageOffsetGfx', ctypes.c_uint16),\n    ('GceaLinkMgrIdleThreshold', ctypes.c_ubyte),\n    ('paddingRlcUlvParams', ctypes.c_ubyte * 3),\n    ('UlvSmnclkDid', ctypes.c_ubyte),\n    ('UlvMp1clkDid', ctypes.c_ubyte),\n    ('UlvGfxclkBypass', ctypes.c_ubyte),\n    ('Padding234', ctypes.c_ubyte),\n    ('MinVoltageUlvGfx', ctypes.c_uint16),\n    ('MinVoltageUlvSoc', ctypes.c_uint16),\n    ('MinVoltageGfx', ctypes.c_uint16),\n    ('MinVoltageSoc', ctypes.c_uint16),\n    ('MaxVoltageGfx', ctypes.c_uint16),\n    ('MaxVoltageSoc', ctypes.c_uint16),\n    ('LoadLineResistanceGfx', ctypes.c_uint16),\n    ('LoadLineResistanceSoc', ctypes.c_uint16),\n    ('DpmDescriptor', struct_DpmDescriptor_t * 9),\n    ('FreqTableGfx', ctypes.c_uint16 * 16),\n    ('FreqTableVclk', ctypes.c_uint16 * 8),\n    ('FreqTableDclk', ctypes.c_uint16 * 8),\n    ('FreqTableSocclk', ctypes.c_uint16 * 8),\n    ('FreqTableUclk', ctypes.c_uint16 * 4),\n    ('FreqTableDcefclk', ctypes.c_uint16 * 8),\n    ('FreqTableDispclk', ctypes.c_uint16 * 8),\n    ('FreqTablePixclk', ctypes.c_uint16 * 8),\n    ('FreqTablePhyclk', ctypes.c_uint16 * 8),\n    ('Paddingclks', ctypes.c_uint32 * 16),\n    ('DcModeMaxFreq', ctypes.c_uint16 * 9),\n    ('Padding8_Clks', ctypes.c_uint16),\n    ('FreqTableUclkDiv', ctypes.c_ubyte * 4),\n    ('Mp0clkFreq', ctypes.c_uint16 * 2),\n    ('Mp0DpmVoltage', ctypes.c_uint16 * 2),\n    ('MemVddciVoltage', ctypes.c_uint16 * 4),\n    ('MemMvddVoltage', ctypes.c_uint16 * 4),\n    ('GfxclkFgfxoffEntry', ctypes.c_uint16),\n    ('GfxclkFinit', ctypes.c_uint16),\n    ('GfxclkFidle', ctypes.c_uint16),\n    ('GfxclkSlewRate', ctypes.c_uint16),\n    ('GfxclkFopt', ctypes.c_uint16),\n    ('Padding567', ctypes.c_ubyte * 2),\n    ('GfxclkDsMaxFreq', ctypes.c_uint16),\n    ('GfxclkSource', ctypes.c_ubyte),\n    ('Padding456', ctypes.c_ubyte),\n    ('LowestUclkReservedForUlv', ctypes.c_ubyte),\n    ('paddingUclk', ctypes.c_ubyte * 3),\n    ('MemoryType', ctypes.c_ubyte),\n    ('MemoryChannels', ctypes.c_ubyte),\n    ('PaddingMem', ctypes.c_ubyte * 2),\n    ('PcieGenSpeed', ctypes.c_ubyte * 2),\n    ('PcieLaneCount', ctypes.c_ubyte * 2),\n    ('LclkFreq', ctypes.c_uint16 * 2),\n    ('EnableTdpm', ctypes.c_uint16),\n    ('TdpmHighHystTemperature', ctypes.c_uint16),\n    ('TdpmLowHystTemperature', ctypes.c_uint16),\n    ('GfxclkFreqHighTempLimit', ctypes.c_uint16),\n    ('FanStopTemp', ctypes.c_uint16),\n    ('FanStartTemp', ctypes.c_uint16),\n    ('FanGainEdge', ctypes.c_uint16),\n    ('FanGainHotspot', ctypes.c_uint16),\n    ('FanGainLiquid0', ctypes.c_uint16),\n    ('FanGainLiquid1', ctypes.c_uint16),\n    ('FanGainVrGfx', ctypes.c_uint16),\n    ('FanGainVrSoc', ctypes.c_uint16),\n    ('FanGainVrMem0', ctypes.c_uint16),\n    ('FanGainVrMem1', ctypes.c_uint16),\n    ('FanGainPlx', ctypes.c_uint16),\n    ('FanGainMem', ctypes.c_uint16),\n    ('FanPwmMin', ctypes.c_uint16),\n    ('FanAcousticLimitRpm', ctypes.c_uint16),\n    ('FanThrottlingRpm', ctypes.c_uint16),\n    ('FanMaximumRpm', ctypes.c_uint16),\n    ('FanTargetTemperature', ctypes.c_uint16),\n    ('FanTargetGfxclk', ctypes.c_uint16),\n    ('FanTempInputSelect', ctypes.c_ubyte),\n    ('FanPadding', ctypes.c_ubyte),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('FanTachEdgePerRev', ctypes.c_ubyte),\n    ('FuzzyFan_ErrorSetDelta', ctypes.c_int16),\n    ('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),\n    ('FuzzyFan_PwmSetDelta', ctypes.c_int16),\n    ('FuzzyFan_Reserved', ctypes.c_uint16),\n    ('OverrideAvfsGb', ctypes.c_ubyte * 2),\n    ('Padding8_Avfs', ctypes.c_ubyte * 2),\n    ('qAvfsGb', struct_QuadraticInt_t * 2),\n    ('dBtcGbGfxPll', struct_DroopInt_t),\n    ('dBtcGbGfxDfll', struct_DroopInt_t),\n    ('dBtcGbSoc', struct_DroopInt_t),\n    ('qAgingGb', struct_LinearInt_t * 2),\n    ('qStaticVoltageOffset', struct_QuadraticInt_t * 2),\n    ('DcTol', ctypes.c_uint16 * 2),\n    ('DcBtcEnabled', ctypes.c_ubyte * 2),\n    ('Padding8_GfxBtc', ctypes.c_ubyte * 2),\n    ('DcBtcMin', ctypes.c_uint16 * 2),\n    ('DcBtcMax', ctypes.c_uint16 * 2),\n    ('DebugOverrides', ctypes.c_uint32),\n    ('ReservedEquation0', struct_QuadraticInt_t),\n    ('ReservedEquation1', struct_QuadraticInt_t),\n    ('ReservedEquation2', struct_QuadraticInt_t),\n    ('ReservedEquation3', struct_QuadraticInt_t),\n    ('TotalPowerConfig', ctypes.c_ubyte),\n    ('TotalPowerSpare1', ctypes.c_ubyte),\n    ('TotalPowerSpare2', ctypes.c_uint16),\n    ('PccThresholdLow', ctypes.c_uint16),\n    ('PccThresholdHigh', ctypes.c_uint16),\n    ('MGpuFanBoostLimitRpm', ctypes.c_uint32),\n    ('PaddingAPCC', ctypes.c_uint32 * 5),\n    ('VDDGFX_TVmin', ctypes.c_uint16),\n    ('VDDSOC_TVmin', ctypes.c_uint16),\n    ('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),\n    ('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),\n    ('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),\n    ('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),\n    ('VDDGFX_TVminHystersis', ctypes.c_uint16),\n    ('VDDSOC_TVminHystersis', ctypes.c_uint16),\n    ('BtcConfig', ctypes.c_uint32),\n    ('SsFmin', ctypes.c_uint16 * 10),\n    ('DcBtcGb', ctypes.c_uint16 * 2),\n    ('Reserved', ctypes.c_uint32 * 8),\n    ('I2cControllers', struct_I2cControllerConfig_t * 8),\n    ('MaxVoltageStepGfx', ctypes.c_uint16),\n    ('MaxVoltageStepSoc', ctypes.c_uint16),\n    ('VddGfxVrMapping', ctypes.c_ubyte),\n    ('VddSocVrMapping', ctypes.c_ubyte),\n    ('VddMem0VrMapping', ctypes.c_ubyte),\n    ('VddMem1VrMapping', ctypes.c_ubyte),\n    ('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('SocUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('ExternalSensorPresent', ctypes.c_ubyte),\n    ('Padding8_V', ctypes.c_ubyte),\n    ('GfxMaxCurrent', ctypes.c_uint16),\n    ('GfxOffset', ctypes.c_byte),\n    ('Padding_TelemetryGfx', ctypes.c_ubyte),\n    ('SocMaxCurrent', ctypes.c_uint16),\n    ('SocOffset', ctypes.c_byte),\n    ('Padding_TelemetrySoc', ctypes.c_ubyte),\n    ('Mem0MaxCurrent', ctypes.c_uint16),\n    ('Mem0Offset', ctypes.c_byte),\n    ('Padding_TelemetryMem0', ctypes.c_ubyte),\n    ('Mem1MaxCurrent', ctypes.c_uint16),\n    ('Mem1Offset', ctypes.c_byte),\n    ('Padding_TelemetryMem1', ctypes.c_ubyte),\n    ('AcDcGpio', ctypes.c_ubyte),\n    ('AcDcPolarity', ctypes.c_ubyte),\n    ('VR0HotGpio', ctypes.c_ubyte),\n    ('VR0HotPolarity', ctypes.c_ubyte),\n    ('VR1HotGpio', ctypes.c_ubyte),\n    ('VR1HotPolarity', ctypes.c_ubyte),\n    ('GthrGpio', ctypes.c_ubyte),\n    ('GthrPolarity', ctypes.c_ubyte),\n    ('LedPin0', ctypes.c_ubyte),\n    ('LedPin1', ctypes.c_ubyte),\n    ('LedPin2', ctypes.c_ubyte),\n    ('padding8_4', ctypes.c_ubyte),\n    ('PllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('PllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('PllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('DfllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('DfllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('DfllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('UclkSpreadEnabled', ctypes.c_ubyte),\n    ('UclkSpreadPercent', ctypes.c_ubyte),\n    ('UclkSpreadFreq', ctypes.c_uint16),\n    ('SoclkSpreadEnabled', ctypes.c_ubyte),\n    ('SocclkSpreadPercent', ctypes.c_ubyte),\n    ('SocclkSpreadFreq', ctypes.c_uint16),\n    ('TotalBoardPower', ctypes.c_uint16),\n    ('BoardPadding', ctypes.c_uint16),\n    ('MvddRatio', ctypes.c_uint32),\n    ('RenesesLoadLineEnabled', ctypes.c_ubyte),\n    ('GfxLoadlineResistance', ctypes.c_ubyte),\n    ('SocLoadlineResistance', ctypes.c_ubyte),\n    ('Padding8_Loadline', ctypes.c_ubyte),\n    ('BoardReserved', ctypes.c_uint32 * 8),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nstruct_smu_11_0_powerplay_table._pack_ = 1 # source:False\nstruct_smu_11_0_powerplay_table._fields_ = [\n    ('header', struct_atom_common_table_header),\n    ('table_revision', ctypes.c_ubyte),\n    ('table_size', ctypes.c_uint16),\n    ('golden_pp_id', ctypes.c_uint32),\n    ('golden_revision', ctypes.c_uint32),\n    ('format_id', ctypes.c_uint16),\n    ('platform_caps', ctypes.c_uint32),\n    ('thermal_controller_type', ctypes.c_ubyte),\n    ('small_power_limit1', ctypes.c_uint16),\n    ('small_power_limit2', ctypes.c_uint16),\n    ('boost_power_limit', ctypes.c_uint16),\n    ('od_turbo_power_limit', ctypes.c_uint16),\n    ('od_power_save_power_limit', ctypes.c_uint16),\n    ('software_shutdown_temp', ctypes.c_uint16),\n    ('reserve', ctypes.c_uint16 * 6),\n    ('power_saving_clock', struct_smu_11_0_power_saving_clock_table),\n    ('overdrive_table', struct_smu_11_0_overdrive_table),\n    ('smc_pptable', struct_PPTable_t),\n]\n\n__all__ = \\\n    ['SMU_11_0_MAX_ODFEATURE', 'SMU_11_0_MAX_ODSETTING',\n    'SMU_11_0_MAX_PPCLOCK', 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',\n    'SMU_11_0_ODCAP_AUTO_OC_MEMORY', 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',\n    'SMU_11_0_ODCAP_COUNT', 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_ODCAP_FAN_CURVE', 'SMU_11_0_ODCAP_FAN_SPEED_MIN',\n    'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_ODCAP_GFXCLK_CURVE', 'SMU_11_0_ODCAP_GFXCLK_LIMITS',\n    'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE', 'SMU_11_0_ODCAP_POWER_LIMIT',\n    'SMU_11_0_ODCAP_TEMPERATURE_FAN',\n    'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM', 'SMU_11_0_ODCAP_UCLK_MAX',\n    'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',\n    'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',\n    'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_ODFEATURE_CAP',\n    'SMU_11_0_ODFEATURE_COUNT',\n    'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    'SMU_11_0_ODFEATURE_FAN_CURVE',\n    'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',\n    'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_ODFEATURE_GFXCLK_CURVE',\n    'SMU_11_0_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_ODFEATURE_ID',\n    'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',\n    'SMU_11_0_ODFEATURE_POWER_LIMIT',\n    'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',\n    'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',\n    'SMU_11_0_ODFEATURE_UCLK_MAX', 'SMU_11_0_ODSETTING_ACTIMING',\n    'SMU_11_0_ODSETTING_AUTOOCENGINE',\n    'SMU_11_0_ODSETTING_AUTOOCMEMORY',\n    'SMU_11_0_ODSETTING_AUTOUVENGINE', 'SMU_11_0_ODSETTING_COUNT',\n    'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',\n    'SMU_11_0_ODSETTING_FANRPMMIN',\n    'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',\n    'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    'SMU_11_0_ODSETTING_GFXCLKFMAX', 'SMU_11_0_ODSETTING_GFXCLKFMIN',\n    'SMU_11_0_ODSETTING_ID', 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',\n    'SMU_11_0_ODSETTING_POWERPERCENTAGE',\n    'SMU_11_0_ODSETTING_UCLKFMAX',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',\n    'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',\n    'SMU_11_0_PPCLOCK_COUNT', 'SMU_11_0_PPCLOCK_DCEFCLK',\n    'SMU_11_0_PPCLOCK_DCLK', 'SMU_11_0_PPCLOCK_DISPCLK',\n    'SMU_11_0_PPCLOCK_ECLK', 'SMU_11_0_PPCLOCK_GFXCLK',\n    'SMU_11_0_PPCLOCK_ID', 'SMU_11_0_PPCLOCK_PHYCLK',\n    'SMU_11_0_PPCLOCK_PIXCLK', 'SMU_11_0_PPCLOCK_SOCCLK',\n    'SMU_11_0_PPCLOCK_UCLK', 'SMU_11_0_PPCLOCK_VCLK',\n    'SMU_11_0_PPTABLE_H', 'SMU_11_0_PP_OVERDRIVE_VERSION',\n    'SMU_11_0_PP_PLATFORM_CAP_BACO',\n    'SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC',\n    'SMU_11_0_PP_PLATFORM_CAP_MACO',\n    'SMU_11_0_PP_PLATFORM_CAP_POWERPLAY',\n    'SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE',\n    'SMU_11_0_PP_POWERSAVINGCLOCK_VERSION',\n    'SMU_11_0_PP_THERMALCONTROLLER_NONE',\n    'SMU_11_0_TABLE_FORMAT_REVISION', 'struct_DpmDescriptor_t',\n    'struct_DroopInt_t', 'struct_I2cControllerConfig_t',\n    'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',\n    'struct_atom_common_table_header',\n    'struct_smu_11_0_overdrive_table',\n    'struct_smu_11_0_power_saving_clock_table',\n    'struct_smu_11_0_powerplay_table']\n"
  },
  {
    "path": "src/upp/atom_gen/smu_v13_0_7_navi30.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\nSMU_13_0_7_PPTABLE_H = True # macro\nSMU_13_0_7_TABLE_FORMAT_REVISION = 15 # macro\nSMU_13_0_7_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro\nSMU_13_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro\nSMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro\nSMU_13_0_7_PP_PLATFORM_CAP_BACO = 0x8 # macro\nSMU_13_0_7_PP_PLATFORM_CAP_MACO = 0x10 # macro\nSMU_13_0_7_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro\nSMU_13_0_7_PP_THERMALCONTROLLER_NONE = 0 # macro\nSMU_13_0_7_PP_THERMALCONTROLLER_NAVI21 = 28 # macro\nSMU_13_0_7_PP_OVERDRIVE_VERSION = 0x83 # macro\nSMU_13_0_7_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro\nSMU_13_0_7_MAX_ODFEATURE = 32 # macro\nSMU_13_0_7_MAX_ODSETTING = 64 # macro\nSMU_13_0_7_MAX_PMSETTING = 32 # macro\nSMU_13_0_7_MAX_PPCLOCK = 16 # macro\n\n# values for enumeration 'SMU_13_0_7_ODFEATURE_CAP'\nSMU_13_0_7_ODFEATURE_CAP__enumvalues = {\n    0: 'SMU_13_0_7_ODCAP_GFXCLK_LIMITS',\n    1: 'SMU_13_0_7_ODCAP_UCLK_LIMITS',\n    2: 'SMU_13_0_7_ODCAP_POWER_LIMIT',\n    3: 'SMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',\n    4: 'SMU_13_0_7_ODCAP_FAN_SPEED_MIN',\n    5: 'SMU_13_0_7_ODCAP_TEMPERATURE_FAN',\n    6: 'SMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM',\n    7: 'SMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE',\n    8: 'SMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',\n    9: 'SMU_13_0_7_ODCAP_AUTO_UV_ENGINE',\n    10: 'SMU_13_0_7_ODCAP_AUTO_OC_ENGINE',\n    11: 'SMU_13_0_7_ODCAP_AUTO_OC_MEMORY',\n    12: 'SMU_13_0_7_ODCAP_FAN_CURVE',\n    13: 'SMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',\n    14: 'SMU_13_0_7_ODCAP_POWER_MODE',\n    15: 'SMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET',\n    16: 'SMU_13_0_7_ODCAP_COUNT',\n}\nSMU_13_0_7_ODCAP_GFXCLK_LIMITS = 0\nSMU_13_0_7_ODCAP_UCLK_LIMITS = 1\nSMU_13_0_7_ODCAP_POWER_LIMIT = 2\nSMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT = 3\nSMU_13_0_7_ODCAP_FAN_SPEED_MIN = 4\nSMU_13_0_7_ODCAP_TEMPERATURE_FAN = 5\nSMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM = 6\nSMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE = 7\nSMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL = 8\nSMU_13_0_7_ODCAP_AUTO_UV_ENGINE = 9\nSMU_13_0_7_ODCAP_AUTO_OC_ENGINE = 10\nSMU_13_0_7_ODCAP_AUTO_OC_MEMORY = 11\nSMU_13_0_7_ODCAP_FAN_CURVE = 12\nSMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 13\nSMU_13_0_7_ODCAP_POWER_MODE = 14\nSMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET = 15\nSMU_13_0_7_ODCAP_COUNT = 16\nSMU_13_0_7_ODFEATURE_CAP = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_13_0_7_ODFEATURE_ID'\nSMU_13_0_7_ODFEATURE_ID__enumvalues = {\n    1: 'SMU_13_0_7_ODFEATURE_GFXCLK_LIMITS',\n    2: 'SMU_13_0_7_ODFEATURE_UCLK_LIMITS',\n    4: 'SMU_13_0_7_ODFEATURE_POWER_LIMIT',\n    8: 'SMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    16: 'SMU_13_0_7_ODFEATURE_FAN_SPEED_MIN',\n    32: 'SMU_13_0_7_ODFEATURE_TEMPERATURE_FAN',\n    64: 'SMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM',\n    128: 'SMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE',\n    256: 'SMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    512: 'SMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE',\n    1024: 'SMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE',\n    2048: 'SMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY',\n    4096: 'SMU_13_0_7_ODFEATURE_FAN_CURVE',\n    8192: 'SMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',\n    16384: 'SMU_13_0_7_ODFEATURE_POWER_MODE',\n    32768: 'SMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET',\n    16: 'SMU_13_0_7_ODFEATURE_COUNT',\n}\nSMU_13_0_7_ODFEATURE_GFXCLK_LIMITS = 1\nSMU_13_0_7_ODFEATURE_UCLK_LIMITS = 2\nSMU_13_0_7_ODFEATURE_POWER_LIMIT = 4\nSMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT = 8\nSMU_13_0_7_ODFEATURE_FAN_SPEED_MIN = 16\nSMU_13_0_7_ODFEATURE_TEMPERATURE_FAN = 32\nSMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM = 64\nSMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE = 128\nSMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL = 256\nSMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE = 512\nSMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE = 1024\nSMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY = 2048\nSMU_13_0_7_ODFEATURE_FAN_CURVE = 4096\nSMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 8192\nSMU_13_0_7_ODFEATURE_POWER_MODE = 16384\nSMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET = 32768\nSMU_13_0_7_ODFEATURE_COUNT = 16\nSMU_13_0_7_ODFEATURE_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_13_0_7_ODSETTING_ID'\nSMU_13_0_7_ODSETTING_ID__enumvalues = {\n    0: 'SMU_13_0_7_ODSETTING_GFXCLKFMAX',\n    1: 'SMU_13_0_7_ODSETTING_GFXCLKFMIN',\n    2: 'SMU_13_0_7_ODSETTING_UCLKFMIN',\n    3: 'SMU_13_0_7_ODSETTING_UCLKFMAX',\n    4: 'SMU_13_0_7_ODSETTING_POWERPERCENTAGE',\n    5: 'SMU_13_0_7_ODSETTING_FANRPMMIN',\n    6: 'SMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT',\n    7: 'SMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE',\n    8: 'SMU_13_0_7_ODSETTING_OPERATINGTEMPMAX',\n    9: 'SMU_13_0_7_ODSETTING_ACTIMING',\n    10: 'SMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    11: 'SMU_13_0_7_ODSETTING_AUTOUVENGINE',\n    12: 'SMU_13_0_7_ODSETTING_AUTOOCENGINE',\n    13: 'SMU_13_0_7_ODSETTING_AUTOOCMEMORY',\n    14: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',\n    15: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1',\n    16: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',\n    17: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2',\n    18: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',\n    19: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3',\n    20: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',\n    21: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4',\n    22: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',\n    23: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5',\n    24: 'SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',\n    25: 'SMU_13_0_7_ODSETTING_POWER_MODE',\n    26: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1',\n    27: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2',\n    28: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3',\n    29: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4',\n    30: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5',\n    31: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6',\n    32: 'SMU_13_0_7_ODSETTING_COUNT',\n}\nSMU_13_0_7_ODSETTING_GFXCLKFMAX = 0\nSMU_13_0_7_ODSETTING_GFXCLKFMIN = 1\nSMU_13_0_7_ODSETTING_UCLKFMIN = 2\nSMU_13_0_7_ODSETTING_UCLKFMAX = 3\nSMU_13_0_7_ODSETTING_POWERPERCENTAGE = 4\nSMU_13_0_7_ODSETTING_FANRPMMIN = 5\nSMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT = 6\nSMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE = 7\nSMU_13_0_7_ODSETTING_OPERATINGTEMPMAX = 8\nSMU_13_0_7_ODSETTING_ACTIMING = 9\nSMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL = 10\nSMU_13_0_7_ODSETTING_AUTOUVENGINE = 11\nSMU_13_0_7_ODSETTING_AUTOOCENGINE = 12\nSMU_13_0_7_ODSETTING_AUTOOCMEMORY = 13\nSMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1 = 14\nSMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1 = 15\nSMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2 = 16\nSMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2 = 17\nSMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3 = 18\nSMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3 = 19\nSMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4 = 20\nSMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4 = 21\nSMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5 = 22\nSMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5 = 23\nSMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 24\nSMU_13_0_7_ODSETTING_POWER_MODE = 25\nSMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1 = 26\nSMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2 = 27\nSMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3 = 28\nSMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4 = 29\nSMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5 = 30\nSMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6 = 31\nSMU_13_0_7_ODSETTING_COUNT = 32\nSMU_13_0_7_ODSETTING_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_13_0_7_PWRMODE_SETTING'\nSMU_13_0_7_PWRMODE_SETTING__enumvalues = {\n    0: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET',\n    1: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE',\n    2: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO',\n    3: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE',\n    4: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',\n    5: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',\n    6: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',\n    7: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',\n    8: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',\n    9: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',\n    10: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',\n    11: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',\n    12: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',\n    13: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',\n    14: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',\n    15: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',\n}\nSMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET = 0\nSMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE = 1\nSMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO = 2\nSMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE = 3\nSMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET = 4\nSMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5\nSMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO = 6\nSMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE = 7\nSMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET = 8\nSMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE = 9\nSMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO = 10\nSMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE = 11\nSMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET = 12\nSMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE = 13\nSMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO = 14\nSMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE = 15\nSMU_13_0_7_PWRMODE_SETTING = ctypes.c_uint32 # enum\nclass struct_smu_13_0_7_overdrive_table(Structure):\n    pass\n\nstruct_smu_13_0_7_overdrive_table._pack_ = 1 # source:False\nstruct_smu_13_0_7_overdrive_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('feature_count', ctypes.c_uint32),\n    ('setting_count', ctypes.c_uint32),\n    ('cap', ctypes.c_ubyte * 32),\n    ('max', ctypes.c_uint32 * 64),\n    ('min', ctypes.c_uint32 * 64),\n    ('pm_setting', ctypes.c_int16 * 32),\n]\n\n\n# values for enumeration 'SMU_13_0_7_PPCLOCK_ID'\nSMU_13_0_7_PPCLOCK_ID__enumvalues = {\n    0: 'SMU_13_0_7_PPCLOCK_GFXCLK',\n    1: 'SMU_13_0_7_PPCLOCK_SOCCLK',\n    2: 'SMU_13_0_7_PPCLOCK_UCLK',\n    3: 'SMU_13_0_7_PPCLOCK_FCLK',\n    4: 'SMU_13_0_7_PPCLOCK_DCLK_0',\n    5: 'SMU_13_0_7_PPCLOCK_VCLK_0',\n    6: 'SMU_13_0_7_PPCLOCK_DCLK_1',\n    7: 'SMU_13_0_7_PPCLOCK_VCLK_1',\n    8: 'SMU_13_0_7_PPCLOCK_DCEFCLK',\n    9: 'SMU_13_0_7_PPCLOCK_DISPCLK',\n    10: 'SMU_13_0_7_PPCLOCK_PIXCLK',\n    11: 'SMU_13_0_7_PPCLOCK_PHYCLK',\n    12: 'SMU_13_0_7_PPCLOCK_DTBCLK',\n    13: 'SMU_13_0_7_PPCLOCK_COUNT',\n}\nSMU_13_0_7_PPCLOCK_GFXCLK = 0\nSMU_13_0_7_PPCLOCK_SOCCLK = 1\nSMU_13_0_7_PPCLOCK_UCLK = 2\nSMU_13_0_7_PPCLOCK_FCLK = 3\nSMU_13_0_7_PPCLOCK_DCLK_0 = 4\nSMU_13_0_7_PPCLOCK_VCLK_0 = 5\nSMU_13_0_7_PPCLOCK_DCLK_1 = 6\nSMU_13_0_7_PPCLOCK_VCLK_1 = 7\nSMU_13_0_7_PPCLOCK_DCEFCLK = 8\nSMU_13_0_7_PPCLOCK_DISPCLK = 9\nSMU_13_0_7_PPCLOCK_PIXCLK = 10\nSMU_13_0_7_PPCLOCK_PHYCLK = 11\nSMU_13_0_7_PPCLOCK_DTBCLK = 12\nSMU_13_0_7_PPCLOCK_COUNT = 13\nSMU_13_0_7_PPCLOCK_ID = ctypes.c_uint32 # enum\nclass struct_smu_13_0_7_powerplay_table(Structure):\n    pass\n\nclass struct_atom_common_table_header(Structure):\n    pass\n\nstruct_atom_common_table_header._pack_ = 1 # source:False\nstruct_atom_common_table_header._fields_ = [\n    ('structuresize', ctypes.c_uint16),\n    ('format_revision', ctypes.c_ubyte),\n    ('content_revision', ctypes.c_ubyte),\n]\n\nclass struct_PPTable_t(Structure):\n    pass\n\nclass struct_SkuTable_t(Structure):\n    pass\n\nclass struct_QuadraticInt_t(Structure):\n    pass\n\nstruct_QuadraticInt_t._pack_ = 1 # source:False\nstruct_QuadraticInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_DpmDescriptor_t(Structure):\n    pass\n\nclass struct_LinearInt_t(Structure):\n    pass\n\nstruct_LinearInt_t._pack_ = 1 # source:False\nstruct_LinearInt_t._fields_ = [\n    ('m', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n]\n\nstruct_DpmDescriptor_t._pack_ = 1 # source:False\nstruct_DpmDescriptor_t._fields_ = [\n    ('Padding', ctypes.c_ubyte),\n    ('SnapToDiscrete', ctypes.c_ubyte),\n    ('NumDiscreteLevels', ctypes.c_ubyte),\n    ('CalculateFopt', ctypes.c_ubyte),\n    ('ConversionToAvfsClk', struct_LinearInt_t),\n    ('Padding3', ctypes.c_uint32 * 3),\n    ('Padding4', ctypes.c_uint16),\n    ('FoptimalDc', ctypes.c_uint16),\n    ('FoptimalAc', ctypes.c_uint16),\n    ('Padding2', ctypes.c_uint16),\n]\n\nclass struct_AvfsDcBtcParams_t(Structure):\n    pass\n\nstruct_AvfsDcBtcParams_t._pack_ = 1 # source:False\nstruct_AvfsDcBtcParams_t._fields_ = [\n    ('DcBtcEnabled', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 3),\n    ('DcTol', ctypes.c_uint16),\n    ('DcBtcGb', ctypes.c_uint16),\n    ('DcBtcMin', ctypes.c_uint16),\n    ('DcBtcMax', ctypes.c_uint16),\n    ('DcBtcGbScalar', struct_LinearInt_t),\n]\n\nclass struct_AvfsFuseOverride_t(Structure):\n    pass\n\nstruct_AvfsFuseOverride_t._pack_ = 1 # source:False\nstruct_AvfsFuseOverride_t._fields_ = [\n    ('AvfsTemp', ctypes.c_uint16 * 2),\n    ('VftFMin', ctypes.c_uint16),\n    ('VInversion', ctypes.c_uint16),\n    ('qVft', struct_QuadraticInt_t * 2),\n    ('qAvfsGb', struct_QuadraticInt_t),\n    ('qAvfsGb2', struct_QuadraticInt_t),\n]\n\nclass struct_DroopInt_t(Structure):\n    pass\n\nstruct_DroopInt_t._pack_ = 1 # source:False\nstruct_DroopInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_BootValues_t(Structure):\n    pass\n\nstruct_BootValues_t._pack_ = 1 # source:False\nstruct_BootValues_t._fields_ = [\n    ('InitGfxclk_bypass', ctypes.c_uint16),\n    ('InitSocclk', ctypes.c_uint16),\n    ('InitMp0clk', ctypes.c_uint16),\n    ('InitMpioclk', ctypes.c_uint16),\n    ('InitSmnclk', ctypes.c_uint16),\n    ('InitUcpclk', ctypes.c_uint16),\n    ('InitCsrclk', ctypes.c_uint16),\n    ('InitDprefclk', ctypes.c_uint16),\n    ('InitDcfclk', ctypes.c_uint16),\n    ('InitDtbclk', ctypes.c_uint16),\n    ('InitDclk', ctypes.c_uint16),\n    ('InitVclk', ctypes.c_uint16),\n    ('InitUsbdfsclk', ctypes.c_uint16),\n    ('InitMp1clk', ctypes.c_uint16),\n    ('InitLclk', ctypes.c_uint16),\n    ('InitBaco400clk_bypass', ctypes.c_uint16),\n    ('InitBaco1200clk_bypass', ctypes.c_uint16),\n    ('InitBaco700clk_bypass', ctypes.c_uint16),\n    ('InitFclk', ctypes.c_uint16),\n    ('InitGfxclk_clkb', ctypes.c_uint16),\n    ('InitUclkDPMState', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 3),\n    ('InitVcoFreqPll0', ctypes.c_uint32),\n    ('InitVcoFreqPll1', ctypes.c_uint32),\n    ('InitVcoFreqPll2', ctypes.c_uint32),\n    ('InitVcoFreqPll3', ctypes.c_uint32),\n    ('InitVcoFreqPll4', ctypes.c_uint32),\n    ('InitVcoFreqPll5', ctypes.c_uint32),\n    ('InitVcoFreqPll6', ctypes.c_uint32),\n    ('InitGfx', ctypes.c_uint16),\n    ('InitSoc', ctypes.c_uint16),\n    ('InitU', ctypes.c_uint16),\n    ('Padding2', ctypes.c_uint16),\n    ('Spare', ctypes.c_uint32 * 8),\n]\n\nclass struct_DriverReportedClocks_t(Structure):\n    pass\n\nstruct_DriverReportedClocks_t._pack_ = 1 # source:False\nstruct_DriverReportedClocks_t._fields_ = [\n    ('BaseClockAc', ctypes.c_uint16),\n    ('GameClockAc', ctypes.c_uint16),\n    ('BoostClockAc', ctypes.c_uint16),\n    ('BaseClockDc', ctypes.c_uint16),\n    ('GameClockDc', ctypes.c_uint16),\n    ('BoostClockDc', ctypes.c_uint16),\n    ('Reserved', ctypes.c_uint32 * 4),\n]\n\nclass struct_MsgLimits_t(Structure):\n    pass\n\nstruct_MsgLimits_t._pack_ = 1 # source:False\nstruct_MsgLimits_t._fields_ = [\n    ('Power', ctypes.c_uint16 * 2 * 4),\n    ('Tdc', ctypes.c_uint16 * 3),\n    ('Temperature', ctypes.c_uint16 * 13),\n    ('PwmLimitMin', ctypes.c_ubyte),\n    ('PwmLimitMax', ctypes.c_ubyte),\n    ('FanTargetTemperature', ctypes.c_ubyte),\n    ('Spare1', ctypes.c_ubyte * 1),\n    ('AcousticTargetRpmThresholdMin', ctypes.c_uint16),\n    ('AcousticTargetRpmThresholdMax', ctypes.c_uint16),\n    ('AcousticLimitRpmThresholdMin', ctypes.c_uint16),\n    ('AcousticLimitRpmThresholdMax', ctypes.c_uint16),\n    ('PccLimitMin', ctypes.c_uint16),\n    ('PccLimitMax', ctypes.c_uint16),\n    ('FanStopTempMin', ctypes.c_uint16),\n    ('FanStopTempMax', ctypes.c_uint16),\n    ('FanStartTempMin', ctypes.c_uint16),\n    ('FanStartTempMax', ctypes.c_uint16),\n    ('PowerMinPpt0', ctypes.c_uint16 * 2),\n    ('Spare', ctypes.c_uint32 * 11),\n]\n\nclass struct_OverDriveLimits_t(Structure):\n    pass\n\nstruct_OverDriveLimits_t._pack_ = 1 # source:False\nstruct_OverDriveLimits_t._fields_ = [\n    ('FeatureCtrlMask', ctypes.c_uint32),\n    ('VoltageOffsetPerZoneBoundary', ctypes.c_int16),\n    ('Reserved1', ctypes.c_uint16),\n    ('Reserved2', ctypes.c_uint16),\n    ('GfxclkFmin', ctypes.c_int16),\n    ('GfxclkFmax', ctypes.c_int16),\n    ('UclkFmin', ctypes.c_uint16),\n    ('UclkFmax', ctypes.c_uint16),\n    ('Ppt', ctypes.c_int16),\n    ('Tdc', ctypes.c_int16),\n    ('FanLinearPwmPoints', ctypes.c_ubyte),\n    ('FanLinearTempPoints', ctypes.c_ubyte),\n    ('FanMinimumPwm', ctypes.c_uint16),\n    ('AcousticTargetRpmThreshold', ctypes.c_uint16),\n    ('AcousticLimitRpmThreshold', ctypes.c_uint16),\n    ('FanTargetTemperature', ctypes.c_uint16),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('FanZeroRpmStopTemp', ctypes.c_ubyte),\n    ('FanMode', ctypes.c_ubyte),\n    ('MaxOpTemp', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 4),\n    ('Spare', ctypes.c_uint32 * 12),\n]\n\nstruct_SkuTable_t._pack_ = 1 # source:False\nstruct_SkuTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('FeaturesToRun', ctypes.c_uint32 * 2),\n    ('TotalPowerConfig', ctypes.c_ubyte),\n    ('CustomerVariant', ctypes.c_ubyte),\n    ('MemoryTemperatureTypeMask', ctypes.c_ubyte),\n    ('SmartShiftVersion', ctypes.c_ubyte),\n    ('SocketPowerLimitAc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitDc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitSmartShift2', ctypes.c_uint16),\n    ('EnableLegacyPptLimit', ctypes.c_ubyte),\n    ('UseInputTelemetry', ctypes.c_ubyte),\n    ('SmartShiftMinReportedPptinDcs', ctypes.c_ubyte),\n    ('PaddingPpt', ctypes.c_ubyte * 1),\n    ('VrTdcLimit', ctypes.c_uint16 * 3),\n    ('PlatformTdcLimit', ctypes.c_uint16 * 3),\n    ('TemperatureLimit', ctypes.c_uint16 * 13),\n    ('HwCtfTempLimit', ctypes.c_uint16),\n    ('PaddingInfra', ctypes.c_uint16),\n    ('FitControllerFailureRateLimit', ctypes.c_uint32),\n    ('FitControllerGfxDutyCycle', ctypes.c_uint32),\n    ('FitControllerSocDutyCycle', ctypes.c_uint32),\n    ('FitControllerSocOffset', ctypes.c_uint32),\n    ('GfxApccPlusResidencyLimit', ctypes.c_uint32),\n    ('ThrottlerControlMask', ctypes.c_uint32),\n    ('FwDStateMask', ctypes.c_uint32),\n    ('UlvVoltageOffset', ctypes.c_uint16 * 2),\n    ('UlvVoltageOffsetU', ctypes.c_uint16),\n    ('DeepUlvVoltageOffsetSoc', ctypes.c_uint16),\n    ('DefaultMaxVoltage', ctypes.c_uint16 * 2),\n    ('BoostMaxVoltage', ctypes.c_uint16 * 2),\n    ('VminTempHystersis', ctypes.c_int16 * 2),\n    ('VminTempThreshold', ctypes.c_int16 * 2),\n    ('Vmin_Hot_T0', ctypes.c_uint16 * 2),\n    ('Vmin_Cold_T0', ctypes.c_uint16 * 2),\n    ('Vmin_Hot_Eol', ctypes.c_uint16 * 2),\n    ('Vmin_Cold_Eol', ctypes.c_uint16 * 2),\n    ('Vmin_Aging_Offset', ctypes.c_uint16 * 2),\n    ('Spare_Vmin_Plat_Offset_Hot', ctypes.c_uint16 * 2),\n    ('Spare_Vmin_Plat_Offset_Cold', ctypes.c_uint16 * 2),\n    ('VcBtcFixedVminAgingOffset', ctypes.c_uint16 * 2),\n    ('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16 * 2),\n    ('VcBtcPsmA', ctypes.c_uint32 * 2),\n    ('VcBtcPsmB', ctypes.c_uint32 * 2),\n    ('VcBtcVminA', ctypes.c_uint32 * 2),\n    ('VcBtcVminB', ctypes.c_uint32 * 2),\n    ('PerPartVminEnabled', ctypes.c_ubyte * 2),\n    ('VcBtcEnabled', ctypes.c_ubyte * 2),\n    ('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),\n    ('Vmin_droop', struct_QuadraticInt_t),\n    ('SpareVmin', ctypes.c_uint32 * 9),\n    ('DpmDescriptor', struct_DpmDescriptor_t * 13),\n    ('FreqTableGfx', ctypes.c_uint16 * 16),\n    ('FreqTableVclk', ctypes.c_uint16 * 8),\n    ('FreqTableDclk', ctypes.c_uint16 * 8),\n    ('FreqTableSocclk', ctypes.c_uint16 * 8),\n    ('FreqTableUclk', ctypes.c_uint16 * 4),\n    ('FreqTableDispclk', ctypes.c_uint16 * 8),\n    ('FreqTableDppClk', ctypes.c_uint16 * 8),\n    ('FreqTableDprefclk', ctypes.c_uint16 * 8),\n    ('FreqTableDcfclk', ctypes.c_uint16 * 8),\n    ('FreqTableDtbclk', ctypes.c_uint16 * 8),\n    ('FreqTableFclk', ctypes.c_uint16 * 8),\n    ('DcModeMaxFreq', ctypes.c_uint32 * 13),\n    ('Mp0clkFreq', ctypes.c_uint16 * 2),\n    ('Mp0DpmVoltage', ctypes.c_uint16 * 2),\n    ('GfxclkSpare', ctypes.c_ubyte * 2),\n    ('GfxclkFreqCap', ctypes.c_uint16),\n    ('GfxclkFgfxoffEntry', ctypes.c_uint16),\n    ('GfxclkFgfxoffExitImu', ctypes.c_uint16),\n    ('GfxclkFgfxoffExitRlc', ctypes.c_uint16),\n    ('GfxclkThrottleClock', ctypes.c_uint16),\n    ('EnableGfxPowerStagesGpio', ctypes.c_ubyte),\n    ('GfxIdlePadding', ctypes.c_ubyte),\n    ('SmsRepairWRCKClkDivEn', ctypes.c_ubyte),\n    ('SmsRepairWRCKClkDivVal', ctypes.c_ubyte),\n    ('GfxOffEntryEarlyMGCGEn', ctypes.c_ubyte),\n    ('GfxOffEntryForceCGCGEn', ctypes.c_ubyte),\n    ('GfxOffEntryForceCGCGDelayEn', ctypes.c_ubyte),\n    ('GfxOffEntryForceCGCGDelayVal', ctypes.c_ubyte),\n    ('GfxclkFreqGfxUlv', ctypes.c_uint16),\n    ('GfxIdlePadding2', ctypes.c_ubyte * 2),\n    ('GfxOffEntryHysteresis', ctypes.c_uint32),\n    ('GfxoffSpare', ctypes.c_uint32 * 15),\n    ('DfllBtcMasterScalerM', ctypes.c_uint32),\n    ('DfllBtcMasterScalerB', ctypes.c_int32),\n    ('DfllBtcSlaveScalerM', ctypes.c_uint32),\n    ('DfllBtcSlaveScalerB', ctypes.c_int32),\n    ('DfllPccAsWaitCtrl', ctypes.c_uint32),\n    ('DfllPccAsStepCtrl', ctypes.c_uint32),\n    ('GfxGpoSpare', ctypes.c_uint32 * 10),\n    ('DcsGfxOffVoltage', ctypes.c_uint16),\n    ('PaddingDcs', ctypes.c_uint16),\n    ('DcsMinGfxOffTime', ctypes.c_uint16),\n    ('DcsMaxGfxOffTime', ctypes.c_uint16),\n    ('DcsMinCreditAccum', ctypes.c_uint32),\n    ('DcsExitHysteresis', ctypes.c_uint16),\n    ('DcsTimeout', ctypes.c_uint16),\n    ('DcsSpare', ctypes.c_uint32 * 14),\n    ('ShadowFreqTableUclk', ctypes.c_uint16 * 4),\n    ('UseStrobeModeOptimizations', ctypes.c_ubyte),\n    ('PaddingMem', ctypes.c_ubyte * 3),\n    ('UclkDpmPstates', ctypes.c_ubyte * 4),\n    ('FreqTableUclkDiv', ctypes.c_ubyte * 4),\n    ('MemVmempVoltage', ctypes.c_uint16 * 4),\n    ('MemVddioVoltage', ctypes.c_uint16 * 4),\n    ('FclkDpmUPstates', ctypes.c_ubyte * 8),\n    ('FclkDpmVddU', ctypes.c_uint16 * 8),\n    ('FclkDpmUSpeed', ctypes.c_uint16 * 8),\n    ('FclkDpmDisallowPstateFreq', ctypes.c_uint16),\n    ('PaddingFclk', ctypes.c_uint16),\n    ('PcieGenSpeed', ctypes.c_ubyte * 3),\n    ('PcieLaneCount', ctypes.c_ubyte * 3),\n    ('LclkFreq', ctypes.c_uint16 * 3),\n    ('FanStopTemp', ctypes.c_uint16 * 13),\n    ('FanStartTemp', ctypes.c_uint16 * 13),\n    ('FanGain', ctypes.c_uint16 * 13),\n    ('FanGainPadding', ctypes.c_uint16),\n    ('FanPwmMin', ctypes.c_uint16),\n    ('AcousticTargetRpmThreshold', ctypes.c_uint16),\n    ('AcousticLimitRpmThreshold', ctypes.c_uint16),\n    ('FanMaximumRpm', ctypes.c_uint16),\n    ('MGpuAcousticLimitRpmThreshold', ctypes.c_uint16),\n    ('FanTargetGfxclk', ctypes.c_uint16),\n    ('TempInputSelectMask', ctypes.c_uint32),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('FanTachEdgePerRev', ctypes.c_ubyte),\n    ('FanTargetTemperature', ctypes.c_uint16 * 13),\n    ('FuzzyFan_ErrorSetDelta', ctypes.c_int16),\n    ('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),\n    ('FuzzyFan_PwmSetDelta', ctypes.c_int16),\n    ('FuzzyFan_Reserved', ctypes.c_uint16),\n    ('FwCtfLimit', ctypes.c_uint16 * 13),\n    ('IntakeTempEnableRPM', ctypes.c_uint16),\n    ('IntakeTempOffsetTemp', ctypes.c_int16),\n    ('IntakeTempReleaseTemp', ctypes.c_uint16),\n    ('IntakeTempHighIntakeAcousticLimit', ctypes.c_uint16),\n    ('IntakeTempAcouticLimitReleaseRate', ctypes.c_uint16),\n    ('FanAbnormalTempLimitOffset', ctypes.c_int16),\n    ('FanStalledTriggerRpm', ctypes.c_uint16),\n    ('FanAbnormalTriggerRpmCoeff', ctypes.c_uint16),\n    ('FanAbnormalDetectionEnable', ctypes.c_uint16),\n    ('FanIntakeSensorSupport', ctypes.c_ubyte),\n    ('FanIntakePadding', ctypes.c_ubyte * 3),\n    ('FanSpare', ctypes.c_uint32 * 13),\n    ('OverrideGfxAvfsFuses', ctypes.c_ubyte),\n    ('GfxAvfsPadding', ctypes.c_ubyte * 3),\n    ('L2HwRtAvfsFuses', ctypes.c_uint32 * 32),\n    ('SeHwRtAvfsFuses', ctypes.c_uint32 * 32),\n    ('CommonRtAvfs', ctypes.c_uint32 * 13),\n    ('L2FwRtAvfsFuses', ctypes.c_uint32 * 19),\n    ('SeFwRtAvfsFuses', ctypes.c_uint32 * 19),\n    ('Droop_PWL_F', ctypes.c_uint32 * 5),\n    ('Droop_PWL_a', ctypes.c_uint32 * 5),\n    ('Droop_PWL_b', ctypes.c_uint32 * 5),\n    ('Droop_PWL_c', ctypes.c_uint32 * 5),\n    ('Static_PWL_Offset', ctypes.c_uint32 * 5),\n    ('dGbV_dT_vmin', ctypes.c_uint32),\n    ('dGbV_dT_vmax', ctypes.c_uint32),\n    ('V2F_vmin_range_low', ctypes.c_uint32),\n    ('V2F_vmin_range_high', ctypes.c_uint32),\n    ('V2F_vmax_range_low', ctypes.c_uint32),\n    ('V2F_vmax_range_high', ctypes.c_uint32),\n    ('DcBtcGfxParams', struct_AvfsDcBtcParams_t),\n    ('GfxAvfsSpare', ctypes.c_uint32 * 32),\n    ('OverrideSocAvfsFuses', ctypes.c_ubyte),\n    ('MinSocAvfsRevision', ctypes.c_ubyte),\n    ('SocAvfsPadding', ctypes.c_ubyte * 2),\n    ('SocAvfsFuseOverride', struct_AvfsFuseOverride_t * 3),\n    ('dBtcGbSoc', struct_DroopInt_t * 3),\n    ('qAgingGb', struct_LinearInt_t * 3),\n    ('qStaticVoltageOffset', struct_QuadraticInt_t * 3),\n    ('DcBtcSocParams', struct_AvfsDcBtcParams_t * 3),\n    ('SocAvfsSpare', ctypes.c_uint32 * 32),\n    ('BootValues', struct_BootValues_t),\n    ('DriverReportedClocks', struct_DriverReportedClocks_t),\n    ('MsgLimits', struct_MsgLimits_t),\n    ('OverDriveLimitsMin', struct_OverDriveLimits_t),\n    ('OverDriveLimitsBasicMax', struct_OverDriveLimits_t),\n    ('OverDriveLimitsAdvancedMax', struct_OverDriveLimits_t),\n    ('DebugOverrides', ctypes.c_uint32),\n    ('TotalBoardPowerSupport', ctypes.c_ubyte),\n    ('TotalBoardPowerPadding', ctypes.c_ubyte * 3),\n    ('TotalIdleBoardPowerM', ctypes.c_int16),\n    ('TotalIdleBoardPowerB', ctypes.c_int16),\n    ('TotalBoardPowerM', ctypes.c_int16),\n    ('TotalBoardPowerB', ctypes.c_int16),\n    ('qFeffCoeffGameClock', struct_QuadraticInt_t * 2),\n    ('qFeffCoeffBaseClock', struct_QuadraticInt_t * 2),\n    ('qFeffCoeffBoostClock', struct_QuadraticInt_t * 2),\n    ('Spare', ctypes.c_uint32 * 43),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nclass struct_BoardTable_t(Structure):\n    pass\n\nclass struct_I2cControllerConfig_t(Structure):\n    pass\n\nstruct_I2cControllerConfig_t._pack_ = 1 # source:False\nstruct_I2cControllerConfig_t._fields_ = [\n    ('Enabled', ctypes.c_ubyte),\n    ('Speed', ctypes.c_ubyte),\n    ('SlaveAddress', ctypes.c_ubyte),\n    ('ControllerPort', ctypes.c_ubyte),\n    ('ControllerName', ctypes.c_ubyte),\n    ('ThermalThrotter', ctypes.c_ubyte),\n    ('I2cProtocol', ctypes.c_ubyte),\n    ('PaddingConfig', ctypes.c_ubyte),\n]\n\nclass struct_SviTelemetryScale_t(Structure):\n    pass\n\nstruct_SviTelemetryScale_t._pack_ = 1 # source:False\nstruct_SviTelemetryScale_t._fields_ = [\n    ('Offset', ctypes.c_byte),\n    ('Padding', ctypes.c_ubyte),\n    ('MaxCurrent', ctypes.c_uint16),\n]\n\nstruct_BoardTable_t._pack_ = 1 # source:False\nstruct_BoardTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('I2cControllers', struct_I2cControllerConfig_t * 8),\n    ('VddGfxVrMapping', ctypes.c_ubyte),\n    ('VddSocVrMapping', ctypes.c_ubyte),\n    ('VddMem0VrMapping', ctypes.c_ubyte),\n    ('VddMem1VrMapping', ctypes.c_ubyte),\n    ('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('SocUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('VmempUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('VddioUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('SlaveAddrMapping', ctypes.c_ubyte * 5),\n    ('VrPsiSupport', ctypes.c_ubyte * 5),\n    ('PaddingPsi', ctypes.c_ubyte * 5),\n    ('EnablePsi6', ctypes.c_ubyte * 5),\n    ('SviTelemetryScale', struct_SviTelemetryScale_t * 5),\n    ('VoltageTelemetryRatio', ctypes.c_uint32 * 5),\n    ('DownSlewRateVr', ctypes.c_ubyte * 5),\n    ('LedOffGpio', ctypes.c_ubyte),\n    ('FanOffGpio', ctypes.c_ubyte),\n    ('GfxVrPowerStageOffGpio', ctypes.c_ubyte),\n    ('AcDcGpio', ctypes.c_ubyte),\n    ('AcDcPolarity', ctypes.c_ubyte),\n    ('VR0HotGpio', ctypes.c_ubyte),\n    ('VR0HotPolarity', ctypes.c_ubyte),\n    ('GthrGpio', ctypes.c_ubyte),\n    ('GthrPolarity', ctypes.c_ubyte),\n    ('LedPin0', ctypes.c_ubyte),\n    ('LedPin1', ctypes.c_ubyte),\n    ('LedPin2', ctypes.c_ubyte),\n    ('LedEnableMask', ctypes.c_ubyte),\n    ('LedPcie', ctypes.c_ubyte),\n    ('LedError', ctypes.c_ubyte),\n    ('UclkTrainingModeSpreadPercent', ctypes.c_ubyte),\n    ('UclkSpreadPadding', ctypes.c_ubyte),\n    ('UclkSpreadFreq', ctypes.c_uint16),\n    ('UclkSpreadPercent', ctypes.c_ubyte * 16),\n    ('FclkSpreadPadding', ctypes.c_ubyte),\n    ('FclkSpreadPercent', ctypes.c_ubyte),\n    ('FclkSpreadFreq', ctypes.c_uint16),\n    ('DramWidth', ctypes.c_ubyte),\n    ('PaddingMem1', ctypes.c_ubyte * 7),\n    ('HsrEnabled', ctypes.c_ubyte),\n    ('VddqOffEnabled', ctypes.c_ubyte),\n    ('PaddingUmcFlags', ctypes.c_ubyte * 2),\n    ('PostVoltageSetBacoDelay', ctypes.c_uint32),\n    ('BacoEntryDelay', ctypes.c_uint32),\n    ('FuseWritePowerMuxPresent', ctypes.c_ubyte),\n    ('FuseWritePadding', ctypes.c_ubyte * 3),\n    ('BoardSpare', ctypes.c_uint32 * 63),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nstruct_PPTable_t._pack_ = 1 # source:False\nstruct_PPTable_t._fields_ = [\n    ('SkuTable', struct_SkuTable_t),\n    ('BoardTable', struct_BoardTable_t),\n]\n\nstruct_smu_13_0_7_powerplay_table._pack_ = 1 # source:False\nstruct_smu_13_0_7_powerplay_table._fields_ = [\n    ('header', struct_atom_common_table_header),\n    ('table_revision', ctypes.c_ubyte),\n    ('padding', ctypes.c_ubyte),\n    ('table_size', ctypes.c_uint16),\n    ('golden_pp_id', ctypes.c_uint32),\n    ('golden_revision', ctypes.c_uint32),\n    ('format_id', ctypes.c_uint16),\n    ('platform_caps', ctypes.c_uint32),\n    ('thermal_controller_type', ctypes.c_ubyte),\n    ('small_power_limit1', ctypes.c_uint16),\n    ('small_power_limit2', ctypes.c_uint16),\n    ('boost_power_limit', ctypes.c_uint16),\n    ('software_shutdown_temp', ctypes.c_uint16),\n    ('reserve', ctypes.c_uint32 * 45),\n    ('overdrive_table', struct_smu_13_0_7_overdrive_table),\n    ('padding1', ctypes.c_ubyte),\n    ('smc_pptable', struct_PPTable_t),\n]\n\n__all__ = \\\n    ['SMU_13_0_7_MAX_ODFEATURE', 'SMU_13_0_7_MAX_ODSETTING',\n    'SMU_13_0_7_MAX_PMSETTING', 'SMU_13_0_7_MAX_PPCLOCK',\n    'SMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_13_0_7_ODCAP_AUTO_OC_ENGINE',\n    'SMU_13_0_7_ODCAP_AUTO_OC_MEMORY',\n    'SMU_13_0_7_ODCAP_AUTO_UV_ENGINE', 'SMU_13_0_7_ODCAP_COUNT',\n    'SMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',\n    'SMU_13_0_7_ODCAP_FAN_CURVE', 'SMU_13_0_7_ODCAP_FAN_SPEED_MIN',\n    'SMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',\n    'SMU_13_0_7_ODCAP_GFXCLK_LIMITS',\n    'SMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE',\n    'SMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET',\n    'SMU_13_0_7_ODCAP_POWER_LIMIT', 'SMU_13_0_7_ODCAP_POWER_MODE',\n    'SMU_13_0_7_ODCAP_TEMPERATURE_FAN',\n    'SMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM',\n    'SMU_13_0_7_ODCAP_UCLK_LIMITS',\n    'SMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE',\n    'SMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY',\n    'SMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE', 'SMU_13_0_7_ODFEATURE_CAP',\n    'SMU_13_0_7_ODFEATURE_COUNT',\n    'SMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    'SMU_13_0_7_ODFEATURE_FAN_CURVE',\n    'SMU_13_0_7_ODFEATURE_FAN_SPEED_MIN',\n    'SMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    'SMU_13_0_7_ODFEATURE_GFXCLK_LIMITS', 'SMU_13_0_7_ODFEATURE_ID',\n    'SMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE',\n    'SMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET',\n    'SMU_13_0_7_ODFEATURE_POWER_LIMIT',\n    'SMU_13_0_7_ODFEATURE_POWER_MODE',\n    'SMU_13_0_7_ODFEATURE_TEMPERATURE_FAN',\n    'SMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM',\n    'SMU_13_0_7_ODFEATURE_UCLK_LIMITS',\n    'SMU_13_0_7_ODSETTING_ACTIMING',\n    'SMU_13_0_7_ODSETTING_AUTOOCENGINE',\n    'SMU_13_0_7_ODSETTING_AUTOOCMEMORY',\n    'SMU_13_0_7_ODSETTING_AUTOUVENGINE',\n    'SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_13_0_7_ODSETTING_COUNT',\n    'SMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT',\n    'SMU_13_0_7_ODSETTING_FANRPMMIN',\n    'SMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',\n    'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',\n    'SMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',\n    'SMU_13_0_7_ODSETTING_GFXCLKFMAX',\n    'SMU_13_0_7_ODSETTING_GFXCLKFMIN', 'SMU_13_0_7_ODSETTING_ID',\n    'SMU_13_0_7_ODSETTING_OPERATINGTEMPMAX',\n    'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1',\n    'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2',\n    'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3',\n    'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4',\n    'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5',\n    'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6',\n    'SMU_13_0_7_ODSETTING_POWERPERCENTAGE',\n    'SMU_13_0_7_ODSETTING_POWER_MODE',\n    'SMU_13_0_7_ODSETTING_UCLKFMAX', 'SMU_13_0_7_ODSETTING_UCLKFMIN',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',\n    'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',\n    'SMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE',\n    'SMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET',\n    'SMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE',\n    'SMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO',\n    'SMU_13_0_7_PPCLOCK_COUNT', 'SMU_13_0_7_PPCLOCK_DCEFCLK',\n    'SMU_13_0_7_PPCLOCK_DCLK_0', 'SMU_13_0_7_PPCLOCK_DCLK_1',\n    'SMU_13_0_7_PPCLOCK_DISPCLK', 'SMU_13_0_7_PPCLOCK_DTBCLK',\n    'SMU_13_0_7_PPCLOCK_FCLK', 'SMU_13_0_7_PPCLOCK_GFXCLK',\n    'SMU_13_0_7_PPCLOCK_ID', 'SMU_13_0_7_PPCLOCK_PHYCLK',\n    'SMU_13_0_7_PPCLOCK_PIXCLK', 'SMU_13_0_7_PPCLOCK_SOCCLK',\n    'SMU_13_0_7_PPCLOCK_UCLK', 'SMU_13_0_7_PPCLOCK_VCLK_0',\n    'SMU_13_0_7_PPCLOCK_VCLK_1', 'SMU_13_0_7_PPTABLE_H',\n    'SMU_13_0_7_PP_OVERDRIVE_VERSION',\n    'SMU_13_0_7_PP_PLATFORM_CAP_BACO',\n    'SMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC',\n    'SMU_13_0_7_PP_PLATFORM_CAP_MACO',\n    'SMU_13_0_7_PP_PLATFORM_CAP_POWERPLAY',\n    'SMU_13_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'SMU_13_0_7_PP_PLATFORM_CAP_SHADOWPSTATE',\n    'SMU_13_0_7_PP_POWERSAVINGCLOCK_VERSION',\n    'SMU_13_0_7_PP_THERMALCONTROLLER_NAVI21',\n    'SMU_13_0_7_PP_THERMALCONTROLLER_NONE',\n    'SMU_13_0_7_PWRMODE_SETTING', 'SMU_13_0_7_TABLE_FORMAT_REVISION',\n    'struct_AvfsDcBtcParams_t', 'struct_AvfsFuseOverride_t',\n    'struct_BoardTable_t', 'struct_BootValues_t',\n    'struct_DpmDescriptor_t', 'struct_DriverReportedClocks_t',\n    'struct_DroopInt_t', 'struct_I2cControllerConfig_t',\n    'struct_LinearInt_t', 'struct_MsgLimits_t',\n    'struct_OverDriveLimits_t', 'struct_PPTable_t',\n    'struct_QuadraticInt_t', 'struct_SkuTable_t',\n    'struct_SviTelemetryScale_t', 'struct_atom_common_table_header',\n    'struct_smu_13_0_7_overdrive_table',\n    'struct_smu_13_0_7_powerplay_table']\n"
  },
  {
    "path": "src/upp/atom_gen/smu_v14_0_2_navi40.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\nSMU_14_0_2_PPTABLE_H = True # macro\nSMU_14_0_2_TABLE_FORMAT_REVISION = 23 # macro\nSMU_14_0_2_CUSTOM_TABLE_FORMAT_REVISION = 1 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_BACO = 0x8 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_MACO = 0x10 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_LEDSUPPORTED = 0x40 # macro\nSMU_14_0_2_PP_PLATFORM_CAP_MOBILEOVERDRIVE = 0x80 # macro\nSMU_14_0_2_PP_THERMALCONTROLLER_NONE = 0 # macro\nSMU_14_0_2_PP_OVERDRIVE_VERSION = 0x1 # macro\nSMU_14_0_2_PP_CUSTOM_OVERDRIVE_VERSION = 0x1 # macro\nSMU_14_0_2_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro\nSMU_14_0_2_MAX_ODFEATURE = 32 # macro\nSMU_14_0_2_MAX_ODSETTING = 64 # macro\nSMU_14_0_2_MAX_PMSETTING = 32 # macro\n\n# values for enumeration 'SMU_14_0_2_OD_SW_FEATURE_CAP'\nSMU_14_0_2_OD_SW_FEATURE_CAP__enumvalues = {\n    0: 'SMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',\n    1: 'SMU_14_0_2_ODCAP_POWER_MODE',\n    2: 'SMU_14_0_2_ODCAP_AUTO_UV_ENGINE',\n    3: 'SMU_14_0_2_ODCAP_AUTO_OC_ENGINE',\n    4: 'SMU_14_0_2_ODCAP_AUTO_OC_MEMORY',\n    5: 'SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE',\n    6: 'SMU_14_0_2_ODCAP_MANUAL_AC_TIMING',\n    7: 'SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER',\n    8: 'SMU_14_0_2_ODCAP_AUTO_SOC_UV',\n    9: 'SMU_14_0_2_ODCAP_COUNT',\n}\nSMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 0\nSMU_14_0_2_ODCAP_POWER_MODE = 1\nSMU_14_0_2_ODCAP_AUTO_UV_ENGINE = 2\nSMU_14_0_2_ODCAP_AUTO_OC_ENGINE = 3\nSMU_14_0_2_ODCAP_AUTO_OC_MEMORY = 4\nSMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE = 5\nSMU_14_0_2_ODCAP_MANUAL_AC_TIMING = 6\nSMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER = 7\nSMU_14_0_2_ODCAP_AUTO_SOC_UV = 8\nSMU_14_0_2_ODCAP_COUNT = 9\nSMU_14_0_2_OD_SW_FEATURE_CAP = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_14_0_2_OD_SW_FEATURE_ID'\nSMU_14_0_2_OD_SW_FEATURE_ID__enumvalues = {\n    1: 'SMU_14_0_2_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',\n    2: 'SMU_14_0_2_ODFEATURE_POWER_MODE',\n    4: 'SMU_14_0_2_ODFEATURE_AUTO_UV_ENGINE',\n    8: 'SMU_14_0_2_ODFEATURE_AUTO_OC_ENGINE',\n    16: 'SMU_14_0_2_ODFEATURE_AUTO_OC_MEMORY',\n    32: 'SMU_14_0_2_ODFEATURE_MEMORY_TIMING_TUNE',\n    64: 'SMU_14_0_2_ODFEATURE_MANUAL_AC_TIMING',\n    128: 'SMU_14_0_2_ODFEATURE_AUTO_VF_CURVE_OPTIMIZER',\n    256: 'SMU_14_0_2_ODFEATURE_AUTO_SOC_UV',\n}\nSMU_14_0_2_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 1\nSMU_14_0_2_ODFEATURE_POWER_MODE = 2\nSMU_14_0_2_ODFEATURE_AUTO_UV_ENGINE = 4\nSMU_14_0_2_ODFEATURE_AUTO_OC_ENGINE = 8\nSMU_14_0_2_ODFEATURE_AUTO_OC_MEMORY = 16\nSMU_14_0_2_ODFEATURE_MEMORY_TIMING_TUNE = 32\nSMU_14_0_2_ODFEATURE_MANUAL_AC_TIMING = 64\nSMU_14_0_2_ODFEATURE_AUTO_VF_CURVE_OPTIMIZER = 128\nSMU_14_0_2_ODFEATURE_AUTO_SOC_UV = 256\nSMU_14_0_2_OD_SW_FEATURE_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_14_0_2_OD_SW_FEATURE_SETTING_ID'\nSMU_14_0_2_OD_SW_FEATURE_SETTING_ID__enumvalues = {\n    0: 'SMU_14_0_2_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',\n    1: 'SMU_14_0_2_ODSETTING_POWER_MODE',\n    2: 'SMU_14_0_2_ODSETTING_AUTOUVENGINE',\n    3: 'SMU_14_0_2_ODSETTING_AUTOOCENGINE',\n    4: 'SMU_14_0_2_ODSETTING_AUTOOCMEMORY',\n    5: 'SMU_14_0_2_ODSETTING_ACTIMING',\n    6: 'SMU_14_0_2_ODSETTING_MANUAL_AC_TIMING',\n    7: 'SMU_14_0_2_ODSETTING_AUTO_VF_CURVE_OPTIMIZER',\n    8: 'SMU_14_0_2_ODSETTING_AUTO_SOC_UV',\n    9: 'SMU_14_0_2_ODSETTING_COUNT',\n}\nSMU_14_0_2_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 0\nSMU_14_0_2_ODSETTING_POWER_MODE = 1\nSMU_14_0_2_ODSETTING_AUTOUVENGINE = 2\nSMU_14_0_2_ODSETTING_AUTOOCENGINE = 3\nSMU_14_0_2_ODSETTING_AUTOOCMEMORY = 4\nSMU_14_0_2_ODSETTING_ACTIMING = 5\nSMU_14_0_2_ODSETTING_MANUAL_AC_TIMING = 6\nSMU_14_0_2_ODSETTING_AUTO_VF_CURVE_OPTIMIZER = 7\nSMU_14_0_2_ODSETTING_AUTO_SOC_UV = 8\nSMU_14_0_2_ODSETTING_COUNT = 9\nSMU_14_0_2_OD_SW_FEATURE_SETTING_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_14_0_2_PWRMODE_SETTING'\nSMU_14_0_2_PWRMODE_SETTING__enumvalues = {\n    0: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_QUIET',\n    1: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_BALANCE',\n    2: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_TURBO',\n    3: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_RAGE',\n    4: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_QUIET',\n    5: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_BALANCE',\n    6: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_TURBO',\n    7: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_RAGE',\n    8: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',\n    9: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',\n    10: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',\n    11: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',\n    12: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',\n    13: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',\n    14: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',\n    15: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',\n    16: 'SMU_14_0_2_PMSETTING_COUNT',\n}\nSMU_14_0_2_PMSETTING_POWER_LIMIT_QUIET = 0\nSMU_14_0_2_PMSETTING_POWER_LIMIT_BALANCE = 1\nSMU_14_0_2_PMSETTING_POWER_LIMIT_TURBO = 2\nSMU_14_0_2_PMSETTING_POWER_LIMIT_RAGE = 3\nSMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_QUIET = 4\nSMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5\nSMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_TURBO = 6\nSMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_RAGE = 7\nSMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET = 8\nSMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE = 9\nSMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO = 10\nSMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE = 11\nSMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET = 12\nSMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE = 13\nSMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO = 14\nSMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE = 15\nSMU_14_0_2_PMSETTING_COUNT = 16\nSMU_14_0_2_PWRMODE_SETTING = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_14_0_2_overdrive_table_id'\nSMU_14_0_2_overdrive_table_id__enumvalues = {\n    0: 'SMU_14_0_2_OVERDRIVE_TABLE_BASIC',\n    1: 'SMU_14_0_2_OVERDRIVE_TABLE_ADVANCED',\n    2: 'SMU_14_0_2_OVERDRIVE_TABLE_COUNT',\n}\nSMU_14_0_2_OVERDRIVE_TABLE_BASIC = 0\nSMU_14_0_2_OVERDRIVE_TABLE_ADVANCED = 1\nSMU_14_0_2_OVERDRIVE_TABLE_COUNT = 2\nSMU_14_0_2_overdrive_table_id = ctypes.c_uint32 # enum\nclass struct_smu_14_0_2_overdrive_table(Structure):\n    pass\n\nstruct_smu_14_0_2_overdrive_table._pack_ = 1 # source:False\nstruct_smu_14_0_2_overdrive_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('cap', ctypes.c_ubyte * 32 * 2),\n    ('max', ctypes.c_int32 * 64 * 2),\n    ('min', ctypes.c_int32 * 64 * 2),\n    ('pm_setting', ctypes.c_int16 * 32),\n]\n\n\n# values for enumeration 'smu_14_0_3_pptable_source'\nsmu_14_0_3_pptable_source__enumvalues = {\n    0: 'PPTABLE_SOURCE_IFWI',\n    1: 'PPTABLE_SOURCE_DRIVER_HARDCODED',\n    2: 'PPTABLE_SOURCE_PPGEN_REGISTRY',\n    2: 'PPTABLE_SOURCE_MAX',\n}\nPPTABLE_SOURCE_IFWI = 0\nPPTABLE_SOURCE_DRIVER_HARDCODED = 1\nPPTABLE_SOURCE_PPGEN_REGISTRY = 2\nPPTABLE_SOURCE_MAX = 2\nsmu_14_0_3_pptable_source = ctypes.c_uint32 # enum\nclass struct_smu_14_0_2_powerplay_table(Structure):\n    pass\n\nclass struct_atom_common_table_header(Structure):\n    pass\n\nstruct_atom_common_table_header._pack_ = 1 # source:False\nstruct_atom_common_table_header._fields_ = [\n    ('structuresize', ctypes.c_uint16),\n    ('format_revision', ctypes.c_ubyte),\n    ('content_revision', ctypes.c_ubyte),\n]\n\nclass struct_PPTable_t(Structure):\n    pass\n\nclass struct_PFE_Settings_t(Structure):\n    pass\n\nstruct_PFE_Settings_t._pack_ = 1 # source:False\nstruct_PFE_Settings_t._fields_ = [\n    ('Version', ctypes.c_ubyte),\n    ('Spare8', ctypes.c_ubyte * 3),\n    ('FeaturesToRun', ctypes.c_uint32 * 2),\n    ('FwDStateMask', ctypes.c_uint32),\n    ('DebugOverrides', ctypes.c_uint32),\n    ('Spare', ctypes.c_uint32 * 2),\n]\n\nclass struct_SkuTable_t(Structure):\n    pass\n\nclass struct_QuadraticInt_t(Structure):\n    pass\n\nstruct_QuadraticInt_t._pack_ = 1 # source:False\nstruct_QuadraticInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_DpmDescriptor_t(Structure):\n    pass\n\nclass struct_LinearInt_t(Structure):\n    pass\n\nstruct_LinearInt_t._pack_ = 1 # source:False\nstruct_LinearInt_t._fields_ = [\n    ('m', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n]\n\nstruct_DpmDescriptor_t._pack_ = 1 # source:False\nstruct_DpmDescriptor_t._fields_ = [\n    ('Padding', ctypes.c_ubyte),\n    ('SnapToDiscrete', ctypes.c_ubyte),\n    ('NumDiscreteLevels', ctypes.c_ubyte),\n    ('CalculateFopt', ctypes.c_ubyte),\n    ('ConversionToAvfsClk', struct_LinearInt_t),\n    ('Padding3', ctypes.c_uint32 * 3),\n    ('Padding4', ctypes.c_uint16),\n    ('FoptimalDc', ctypes.c_uint16),\n    ('FoptimalAc', ctypes.c_uint16),\n    ('Padding2', ctypes.c_uint16),\n]\n\nclass struct_AvfsDcBtcParams_t(Structure):\n    pass\n\nstruct_AvfsDcBtcParams_t._pack_ = 1 # source:False\nstruct_AvfsDcBtcParams_t._fields_ = [\n    ('DcBtcEnabled', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 3),\n    ('DcTol', ctypes.c_uint16),\n    ('DcBtcGb', ctypes.c_uint16),\n    ('DcBtcMin', ctypes.c_uint16),\n    ('DcBtcMax', ctypes.c_uint16),\n    ('DcBtcGbScalar', struct_LinearInt_t),\n]\n\nclass struct_AvfsFuseOverride_t(Structure):\n    pass\n\nstruct_AvfsFuseOverride_t._pack_ = 1 # source:False\nstruct_AvfsFuseOverride_t._fields_ = [\n    ('AvfsTemp', ctypes.c_uint16 * 2),\n    ('VftFMin', ctypes.c_uint16),\n    ('VInversion', ctypes.c_uint16),\n    ('qVft', struct_QuadraticInt_t * 2),\n    ('qAvfsGb', struct_QuadraticInt_t),\n    ('qAvfsGb2', struct_QuadraticInt_t),\n]\n\nclass struct_DroopInt_t(Structure):\n    pass\n\nstruct_DroopInt_t._pack_ = 1 # source:False\nstruct_DroopInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_BootValues_t(Structure):\n    pass\n\nstruct_BootValues_t._pack_ = 1 # source:False\nstruct_BootValues_t._fields_ = [\n    ('InitImuClk', ctypes.c_uint16),\n    ('InitSocclk', ctypes.c_uint16),\n    ('InitMpioclk', ctypes.c_uint16),\n    ('InitSmnclk', ctypes.c_uint16),\n    ('InitDispClk', ctypes.c_uint16),\n    ('InitDppClk', ctypes.c_uint16),\n    ('InitDprefclk', ctypes.c_uint16),\n    ('InitDcfclk', ctypes.c_uint16),\n    ('InitDtbclk', ctypes.c_uint16),\n    ('InitDbguSocClk', ctypes.c_uint16),\n    ('InitGfxclk_bypass', ctypes.c_uint16),\n    ('InitMp1clk', ctypes.c_uint16),\n    ('InitLclk', ctypes.c_uint16),\n    ('InitDbguBacoClk', ctypes.c_uint16),\n    ('InitBaco400clk', ctypes.c_uint16),\n    ('InitBaco1200clk_bypass', ctypes.c_uint16),\n    ('InitBaco700clk_bypass', ctypes.c_uint16),\n    ('InitBaco500clk', ctypes.c_uint16),\n    ('InitDclk0', ctypes.c_uint16),\n    ('InitVclk0', ctypes.c_uint16),\n    ('InitFclk', ctypes.c_uint16),\n    ('Padding1', ctypes.c_uint16),\n    ('InitUclkLevel', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 3),\n    ('InitVcoFreqPll0', ctypes.c_uint32),\n    ('InitVcoFreqPll1', ctypes.c_uint32),\n    ('InitVcoFreqPll2', ctypes.c_uint32),\n    ('InitVcoFreqPll3', ctypes.c_uint32),\n    ('InitVcoFreqPll4', ctypes.c_uint32),\n    ('InitVcoFreqPll5', ctypes.c_uint32),\n    ('InitVcoFreqPll6', ctypes.c_uint32),\n    ('InitVcoFreqPll7', ctypes.c_uint32),\n    ('InitVcoFreqPll8', ctypes.c_uint32),\n    ('InitGfx', ctypes.c_uint16),\n    ('InitSoc', ctypes.c_uint16),\n    ('InitVddIoMem', ctypes.c_uint16),\n    ('InitVddCiMem', ctypes.c_uint16),\n    ('Spare', ctypes.c_uint32 * 8),\n]\n\nclass struct_DriverReportedClocks_t(Structure):\n    pass\n\nstruct_DriverReportedClocks_t._pack_ = 1 # source:False\nstruct_DriverReportedClocks_t._fields_ = [\n    ('BaseClockAc', ctypes.c_uint16),\n    ('GameClockAc', ctypes.c_uint16),\n    ('BoostClockAc', ctypes.c_uint16),\n    ('BaseClockDc', ctypes.c_uint16),\n    ('GameClockDc', ctypes.c_uint16),\n    ('BoostClockDc', ctypes.c_uint16),\n    ('MaxReportedClock', ctypes.c_uint16),\n    ('Padding', ctypes.c_uint16),\n    ('Reserved', ctypes.c_uint32 * 3),\n]\n\nclass struct_MsgLimits_t(Structure):\n    pass\n\nstruct_MsgLimits_t._pack_ = 1 # source:False\nstruct_MsgLimits_t._fields_ = [\n    ('Power', ctypes.c_uint16 * 2 * 4),\n    ('Tdc', ctypes.c_uint16 * 2),\n    ('Temperature', ctypes.c_uint16 * 12),\n    ('PwmLimitMin', ctypes.c_ubyte),\n    ('PwmLimitMax', ctypes.c_ubyte),\n    ('FanTargetTemperature', ctypes.c_ubyte),\n    ('Spare1', ctypes.c_ubyte * 1),\n    ('AcousticTargetRpmThresholdMin', ctypes.c_uint16),\n    ('AcousticTargetRpmThresholdMax', ctypes.c_uint16),\n    ('AcousticLimitRpmThresholdMin', ctypes.c_uint16),\n    ('AcousticLimitRpmThresholdMax', ctypes.c_uint16),\n    ('PccLimitMin', ctypes.c_uint16),\n    ('PccLimitMax', ctypes.c_uint16),\n    ('FanStopTempMin', ctypes.c_uint16),\n    ('FanStopTempMax', ctypes.c_uint16),\n    ('FanStartTempMin', ctypes.c_uint16),\n    ('FanStartTempMax', ctypes.c_uint16),\n    ('PowerMinPpt0', ctypes.c_uint16 * 2),\n    ('Spare', ctypes.c_uint32 * 11),\n]\n\nclass struct_OverDriveLimits_t(Structure):\n    pass\n\nstruct_OverDriveLimits_t._pack_ = 1 # source:False\nstruct_OverDriveLimits_t._fields_ = [\n    ('FeatureCtrlMask', ctypes.c_uint32),\n    ('VoltageOffsetPerZoneBoundary', ctypes.c_int16 * 6),\n    ('VddGfxVmax', ctypes.c_uint16),\n    ('VddSocVmax', ctypes.c_uint16),\n    ('GfxclkFoffset', ctypes.c_int16),\n    ('Padding', ctypes.c_uint16),\n    ('UclkFmin', ctypes.c_uint16),\n    ('UclkFmax', ctypes.c_uint16),\n    ('FclkFmin', ctypes.c_uint16),\n    ('FclkFmax', ctypes.c_uint16),\n    ('Ppt', ctypes.c_int16),\n    ('Tdc', ctypes.c_int16),\n    ('FanLinearPwmPoints', ctypes.c_ubyte * 6),\n    ('FanLinearTempPoints', ctypes.c_ubyte * 6),\n    ('FanMinimumPwm', ctypes.c_uint16),\n    ('AcousticTargetRpmThreshold', ctypes.c_uint16),\n    ('AcousticLimitRpmThreshold', ctypes.c_uint16),\n    ('FanTargetTemperature', ctypes.c_uint16),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('MaxOpTemp', ctypes.c_ubyte),\n    ('Padding1', ctypes.c_ubyte * 2),\n    ('GfxVoltageFullCtrlMode', ctypes.c_uint16),\n    ('SocVoltageFullCtrlMode', ctypes.c_uint16),\n    ('GfxclkFullCtrlMode', ctypes.c_uint16),\n    ('UclkFullCtrlMode', ctypes.c_uint16),\n    ('FclkFullCtrlMode', ctypes.c_uint16),\n    ('GfxEdc', ctypes.c_int16),\n    ('GfxPccLimitControl', ctypes.c_int16),\n    ('Padding2', ctypes.c_int16),\n    ('Spare', ctypes.c_uint32 * 5),\n]\n\nstruct_SkuTable_t._pack_ = 1 # source:False\nstruct_SkuTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('TotalPowerConfig', ctypes.c_ubyte),\n    ('CustomerVariant', ctypes.c_ubyte),\n    ('MemoryTemperatureTypeMask', ctypes.c_ubyte),\n    ('SmartShiftVersion', ctypes.c_ubyte),\n    ('SocketPowerLimitSpare', ctypes.c_ubyte * 10),\n    ('EnableLegacyPptLimit', ctypes.c_ubyte),\n    ('UseInputTelemetry', ctypes.c_ubyte),\n    ('SmartShiftMinReportedPptinDcs', ctypes.c_ubyte),\n    ('PaddingPpt', ctypes.c_ubyte * 7),\n    ('HwCtfTempLimit', ctypes.c_uint16),\n    ('PaddingInfra', ctypes.c_uint16),\n    ('FitControllerFailureRateLimit', ctypes.c_uint32),\n    ('FitControllerGfxDutyCycle', ctypes.c_uint32),\n    ('FitControllerSocDutyCycle', ctypes.c_uint32),\n    ('FitControllerSocOffset', ctypes.c_uint32),\n    ('GfxApccPlusResidencyLimit', ctypes.c_uint32),\n    ('ThrottlerControlMask', ctypes.c_uint32),\n    ('UlvVoltageOffset', ctypes.c_uint16 * 2),\n    ('Padding', ctypes.c_ubyte * 2),\n    ('DeepUlvVoltageOffsetSoc', ctypes.c_uint16),\n    ('DefaultMaxVoltage', ctypes.c_uint16 * 2),\n    ('BoostMaxVoltage', ctypes.c_uint16 * 2),\n    ('VminTempHystersis', ctypes.c_int16 * 2),\n    ('VminTempThreshold', ctypes.c_int16 * 2),\n    ('Vmin_Hot_T0', ctypes.c_uint16 * 2),\n    ('Vmin_Cold_T0', ctypes.c_uint16 * 2),\n    ('Vmin_Hot_Eol', ctypes.c_uint16 * 2),\n    ('Vmin_Cold_Eol', ctypes.c_uint16 * 2),\n    ('Vmin_Aging_Offset', ctypes.c_uint16 * 2),\n    ('Spare_Vmin_Plat_Offset_Hot', ctypes.c_uint16 * 2),\n    ('Spare_Vmin_Plat_Offset_Cold', ctypes.c_uint16 * 2),\n    ('VcBtcFixedVminAgingOffset', ctypes.c_uint16 * 2),\n    ('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16 * 2),\n    ('VcBtcPsmA', ctypes.c_uint32 * 2),\n    ('VcBtcPsmB', ctypes.c_uint32 * 2),\n    ('VcBtcVminA', ctypes.c_uint32 * 2),\n    ('VcBtcVminB', ctypes.c_uint32 * 2),\n    ('PerPartVminEnabled', ctypes.c_ubyte * 2),\n    ('VcBtcEnabled', ctypes.c_ubyte * 2),\n    ('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),\n    ('Gfx_Vmin_droop', struct_QuadraticInt_t),\n    ('Soc_Vmin_droop', struct_QuadraticInt_t),\n    ('SpareVmin', ctypes.c_uint32 * 6),\n    ('DpmDescriptor', struct_DpmDescriptor_t * 11),\n    ('FreqTableGfx', ctypes.c_uint16 * 16),\n    ('FreqTableVclk', ctypes.c_uint16 * 8),\n    ('FreqTableDclk', ctypes.c_uint16 * 8),\n    ('FreqTableSocclk', ctypes.c_uint16 * 8),\n    ('FreqTableUclk', ctypes.c_uint16 * 6),\n    ('FreqTableShadowUclk', ctypes.c_uint16 * 6),\n    ('FreqTableDispclk', ctypes.c_uint16 * 8),\n    ('FreqTableDppClk', ctypes.c_uint16 * 8),\n    ('FreqTableDprefclk', ctypes.c_uint16 * 8),\n    ('FreqTableDcfclk', ctypes.c_uint16 * 8),\n    ('FreqTableDtbclk', ctypes.c_uint16 * 8),\n    ('FreqTableFclk', ctypes.c_uint16 * 8),\n    ('DcModeMaxFreq', ctypes.c_uint32 * 11),\n    ('GfxclkAibFmax', ctypes.c_uint16),\n    ('GfxDpmPadding', ctypes.c_uint16),\n    ('GfxclkFgfxoffEntry', ctypes.c_uint16),\n    ('GfxclkFgfxoffExitImu', ctypes.c_uint16),\n    ('GfxclkFgfxoffExitRlc', ctypes.c_uint16),\n    ('GfxclkThrottleClock', ctypes.c_uint16),\n    ('EnableGfxPowerStagesGpio', ctypes.c_ubyte),\n    ('GfxIdlePadding', ctypes.c_ubyte),\n    ('SmsRepairWRCKClkDivEn', ctypes.c_ubyte),\n    ('SmsRepairWRCKClkDivVal', ctypes.c_ubyte),\n    ('GfxOffEntryEarlyMGCGEn', ctypes.c_ubyte),\n    ('GfxOffEntryForceCGCGEn', ctypes.c_ubyte),\n    ('GfxOffEntryForceCGCGDelayEn', ctypes.c_ubyte),\n    ('GfxOffEntryForceCGCGDelayVal', ctypes.c_ubyte),\n    ('GfxclkFreqGfxUlv', ctypes.c_uint16),\n    ('GfxIdlePadding2', ctypes.c_ubyte * 2),\n    ('GfxOffEntryHysteresis', ctypes.c_uint32),\n    ('GfxoffSpare', ctypes.c_uint32 * 15),\n    ('DfllMstrOscConfigA', ctypes.c_uint16),\n    ('DfllSlvOscConfigA', ctypes.c_uint16),\n    ('DfllBtcMasterScalerM', ctypes.c_uint32),\n    ('DfllBtcMasterScalerB', ctypes.c_int32),\n    ('DfllBtcSlaveScalerM', ctypes.c_uint32),\n    ('DfllBtcSlaveScalerB', ctypes.c_int32),\n    ('DfllPccAsWaitCtrl', ctypes.c_uint32),\n    ('DfllPccAsStepCtrl', ctypes.c_uint32),\n    ('GfxDfllSpare', ctypes.c_uint32 * 9),\n    ('DvoPsmDownThresholdVoltage', ctypes.c_uint32),\n    ('DvoPsmUpThresholdVoltage', ctypes.c_uint32),\n    ('DvoFmaxLowScaler', ctypes.c_uint32),\n    ('PaddingDcs', ctypes.c_uint32),\n    ('DcsMinGfxOffTime', ctypes.c_uint16),\n    ('DcsMaxGfxOffTime', ctypes.c_uint16),\n    ('DcsMinCreditAccum', ctypes.c_uint32),\n    ('DcsExitHysteresis', ctypes.c_uint16),\n    ('DcsTimeout', ctypes.c_uint16),\n    ('DcsPfGfxFopt', ctypes.c_uint32),\n    ('DcsPfUclkFopt', ctypes.c_uint32),\n    ('FoptEnabled', ctypes.c_ubyte),\n    ('DcsSpare2', ctypes.c_ubyte * 3),\n    ('DcsFoptM', ctypes.c_uint32),\n    ('DcsFoptB', ctypes.c_uint32),\n    ('DcsSpare', ctypes.c_uint32 * 9),\n    ('UseStrobeModeOptimizations', ctypes.c_ubyte),\n    ('PaddingMem', ctypes.c_ubyte * 3),\n    ('UclkDpmPstates', ctypes.c_ubyte * 6),\n    ('UclkDpmShadowPstates', ctypes.c_ubyte * 6),\n    ('FreqTableUclkDiv', ctypes.c_ubyte * 6),\n    ('FreqTableShadowUclkDiv', ctypes.c_ubyte * 6),\n    ('MemVmempVoltage', ctypes.c_uint16 * 6),\n    ('MemVddioVoltage', ctypes.c_uint16 * 6),\n    ('DalDcModeMaxUclkFreq', ctypes.c_uint16),\n    ('PaddingsMem', ctypes.c_ubyte * 2),\n    ('PaddingFclk', ctypes.c_uint32),\n    ('PcieGenSpeed', ctypes.c_ubyte * 3),\n    ('PcieLaneCount', ctypes.c_ubyte * 3),\n    ('LclkFreq', ctypes.c_uint16 * 3),\n    ('OverrideGfxAvfsFuses', ctypes.c_ubyte),\n    ('GfxAvfsPadding', ctypes.c_ubyte * 1),\n    ('DroopGBStDev', ctypes.c_uint16),\n    ('SocHwRtAvfsFuses', ctypes.c_uint32 * 32),\n    ('GfxL2HwRtAvfsFuses', ctypes.c_uint32 * 32),\n    ('PsmDidt_Vcross', ctypes.c_uint16 * 2),\n    ('PsmDidt_StaticDroop_A', ctypes.c_uint32 * 3),\n    ('PsmDidt_StaticDroop_B', ctypes.c_uint32 * 3),\n    ('PsmDidt_DynDroop_A', ctypes.c_uint32 * 3),\n    ('PsmDidt_DynDroop_B', ctypes.c_uint32 * 3),\n    ('spare_HwRtAvfsFuses', ctypes.c_uint32 * 19),\n    ('SocCommonRtAvfs', ctypes.c_uint32 * 13),\n    ('GfxCommonRtAvfs', ctypes.c_uint32 * 13),\n    ('SocFwRtAvfsFuses', ctypes.c_uint32 * 19),\n    ('GfxL2FwRtAvfsFuses', ctypes.c_uint32 * 19),\n    ('spare_FwRtAvfsFuses', ctypes.c_uint32 * 19),\n    ('Soc_Droop_PWL_F', ctypes.c_uint32 * 5),\n    ('Soc_Droop_PWL_a', ctypes.c_uint32 * 5),\n    ('Soc_Droop_PWL_b', ctypes.c_uint32 * 5),\n    ('Soc_Droop_PWL_c', ctypes.c_uint32 * 5),\n    ('Gfx_Droop_PWL_F', ctypes.c_uint32 * 5),\n    ('Gfx_Droop_PWL_a', ctypes.c_uint32 * 5),\n    ('Gfx_Droop_PWL_b', ctypes.c_uint32 * 5),\n    ('Gfx_Droop_PWL_c', ctypes.c_uint32 * 5),\n    ('Gfx_Static_PWL_Offset', ctypes.c_uint32 * 5),\n    ('Soc_Static_PWL_Offset', ctypes.c_uint32 * 5),\n    ('dGbV_dT_vmin', ctypes.c_uint32),\n    ('dGbV_dT_vmax', ctypes.c_uint32),\n    ('PaddingV2F', ctypes.c_uint32 * 4),\n    ('DcBtcGfxParams', struct_AvfsDcBtcParams_t),\n    ('SSCurve_GFX', struct_QuadraticInt_t),\n    ('GfxAvfsSpare', ctypes.c_uint32 * 29),\n    ('OverrideSocAvfsFuses', ctypes.c_ubyte),\n    ('MinSocAvfsRevision', ctypes.c_ubyte),\n    ('SocAvfsPadding', ctypes.c_ubyte * 2),\n    ('SocAvfsFuseOverride', struct_AvfsFuseOverride_t * 1),\n    ('dBtcGbSoc', struct_DroopInt_t * 1),\n    ('qAgingGb', struct_LinearInt_t * 1),\n    ('qStaticVoltageOffset', struct_QuadraticInt_t * 1),\n    ('DcBtcSocParams', struct_AvfsDcBtcParams_t * 1),\n    ('SSCurve_SOC', struct_QuadraticInt_t),\n    ('SocAvfsSpare', ctypes.c_uint32 * 29),\n    ('BootValues', struct_BootValues_t),\n    ('DriverReportedClocks', struct_DriverReportedClocks_t),\n    ('MsgLimits', struct_MsgLimits_t),\n    ('OverDriveLimitsBasicMin', struct_OverDriveLimits_t),\n    ('OverDriveLimitsBasicMax', struct_OverDriveLimits_t),\n    ('OverDriveLimitsAdvancedMin', struct_OverDriveLimits_t),\n    ('OverDriveLimitsAdvancedMax', struct_OverDriveLimits_t),\n    ('TotalBoardPowerSupport', ctypes.c_ubyte),\n    ('TotalBoardPowerPadding', ctypes.c_ubyte * 1),\n    ('TotalBoardPowerRoc', ctypes.c_uint16),\n    ('qFeffCoeffGameClock', struct_QuadraticInt_t * 2),\n    ('qFeffCoeffBaseClock', struct_QuadraticInt_t * 2),\n    ('qFeffCoeffBoostClock', struct_QuadraticInt_t * 2),\n    ('AptUclkGfxclkLookup', ctypes.c_int32 * 6 * 2),\n    ('AptUclkGfxclkLookupHyst', ctypes.c_uint32 * 6 * 2),\n    ('AptPadding', ctypes.c_uint32),\n    ('GfxXvminDidtDroopThresh', struct_QuadraticInt_t),\n    ('GfxXvminDidtResetDDWait', ctypes.c_uint32),\n    ('GfxXvminDidtClkStopWait', ctypes.c_uint32),\n    ('GfxXvminDidtFcsStepCtrl', ctypes.c_uint32),\n    ('GfxXvminDidtFcsWaitCtrl', ctypes.c_uint32),\n    ('PsmModeEnabled', ctypes.c_uint32),\n    ('P2v_a', ctypes.c_uint32),\n    ('P2v_b', ctypes.c_uint32),\n    ('P2v_c', ctypes.c_uint32),\n    ('T2p_a', ctypes.c_uint32),\n    ('T2p_b', ctypes.c_uint32),\n    ('T2p_c', ctypes.c_uint32),\n    ('P2vTemp', ctypes.c_uint32),\n    ('PsmDidtStaticSettings', struct_QuadraticInt_t),\n    ('PsmDidtDynamicSettings', struct_QuadraticInt_t),\n    ('PsmDidtAvgDiv', ctypes.c_ubyte),\n    ('PsmDidtForceStall', ctypes.c_ubyte),\n    ('PsmDidtReleaseTimer', ctypes.c_uint16),\n    ('PsmDidtStallPattern', ctypes.c_uint32),\n    ('CacEdcCacLeakageC0', ctypes.c_uint32),\n    ('CacEdcCacLeakageC1', ctypes.c_uint32),\n    ('CacEdcCacLeakageC2', ctypes.c_uint32),\n    ('CacEdcCacLeakageC3', ctypes.c_uint32),\n    ('CacEdcCacLeakageC4', ctypes.c_uint32),\n    ('CacEdcCacLeakageC5', ctypes.c_uint32),\n    ('CacEdcGfxClkScalar', ctypes.c_uint32),\n    ('CacEdcGfxClkIntercept', ctypes.c_uint32),\n    ('CacEdcCac_m', ctypes.c_uint32),\n    ('CacEdcCac_b', ctypes.c_uint32),\n    ('CacEdcCurrLimitGuardband', ctypes.c_uint32),\n    ('CacEdcDynToTotalCacRatio', ctypes.c_uint32),\n    ('XVmin_Gfx_EdcThreshScalar', ctypes.c_uint32),\n    ('XVmin_Gfx_EdcEnableFreq', ctypes.c_uint32),\n    ('XVmin_Gfx_EdcPccAsStepCtrl', ctypes.c_uint32),\n    ('XVmin_Gfx_EdcPccAsWaitCtrl', ctypes.c_uint32),\n    ('XVmin_Gfx_EdcThreshold', ctypes.c_uint16),\n    ('XVmin_Gfx_EdcFiltHysWaitCtrl', ctypes.c_uint16),\n    ('XVmin_Soc_EdcThreshScalar', ctypes.c_uint32),\n    ('XVmin_Soc_EdcEnableFreq', ctypes.c_uint32),\n    ('XVmin_Soc_EdcThreshold', ctypes.c_uint32),\n    ('XVmin_Soc_EdcStepUpTime', ctypes.c_uint16),\n    ('XVmin_Soc_EdcStepDownTime', ctypes.c_uint16),\n    ('XVmin_Soc_EdcInitPccStep', ctypes.c_ubyte),\n    ('PaddingSocEdc', ctypes.c_ubyte * 3),\n    ('GfxXvminFuseOverride', ctypes.c_ubyte),\n    ('SocXvminFuseOverride', ctypes.c_ubyte),\n    ('PaddingXvminFuseOverride', ctypes.c_ubyte * 2),\n    ('GfxXvminFddTempLow', ctypes.c_ubyte),\n    ('GfxXvminFddTempHigh', ctypes.c_ubyte),\n    ('SocXvminFddTempLow', ctypes.c_ubyte),\n    ('SocXvminFddTempHigh', ctypes.c_ubyte),\n    ('GfxXvminFddVolt0', ctypes.c_uint16),\n    ('GfxXvminFddVolt1', ctypes.c_uint16),\n    ('GfxXvminFddVolt2', ctypes.c_uint16),\n    ('SocXvminFddVolt0', ctypes.c_uint16),\n    ('SocXvminFddVolt1', ctypes.c_uint16),\n    ('SocXvminFddVolt2', ctypes.c_uint16),\n    ('GfxXvminDsFddDsm', ctypes.c_uint16 * 6),\n    ('GfxXvminEdcFddDsm', ctypes.c_uint16 * 6),\n    ('SocXvminEdcFddDsm', ctypes.c_uint16 * 6),\n    ('Spare', ctypes.c_uint32),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nclass struct_CustomSkuTable_t(Structure):\n    pass\n\nstruct_CustomSkuTable_t._pack_ = 1 # source:False\nstruct_CustomSkuTable_t._fields_ = [\n    ('SocketPowerLimitAc', ctypes.c_uint16 * 4),\n    ('VrTdcLimit', ctypes.c_uint16 * 2),\n    ('TotalIdleBoardPowerM', ctypes.c_int16),\n    ('TotalIdleBoardPowerB', ctypes.c_int16),\n    ('TotalBoardPowerM', ctypes.c_int16),\n    ('TotalBoardPowerB', ctypes.c_int16),\n    ('TemperatureLimit', ctypes.c_uint16 * 12),\n    ('FanStopTemp', ctypes.c_uint16 * 12),\n    ('FanStartTemp', ctypes.c_uint16 * 12),\n    ('FanGain', ctypes.c_uint16 * 12),\n    ('FanPwmMin', ctypes.c_uint16),\n    ('AcousticTargetRpmThreshold', ctypes.c_uint16),\n    ('AcousticLimitRpmThreshold', ctypes.c_uint16),\n    ('FanMaximumRpm', ctypes.c_uint16),\n    ('MGpuAcousticLimitRpmThreshold', ctypes.c_uint16),\n    ('FanTargetGfxclk', ctypes.c_uint16),\n    ('TempInputSelectMask', ctypes.c_uint32),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('FanTachEdgePerRev', ctypes.c_ubyte),\n    ('FanPadding', ctypes.c_uint16),\n    ('FanTargetTemperature', ctypes.c_uint16 * 12),\n    ('FuzzyFan_ErrorSetDelta', ctypes.c_int16),\n    ('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),\n    ('FuzzyFan_PwmSetDelta', ctypes.c_int16),\n    ('FanPadding2', ctypes.c_uint16),\n    ('FwCtfLimit', ctypes.c_uint16 * 12),\n    ('IntakeTempEnableRPM', ctypes.c_uint16),\n    ('IntakeTempOffsetTemp', ctypes.c_int16),\n    ('IntakeTempReleaseTemp', ctypes.c_uint16),\n    ('IntakeTempHighIntakeAcousticLimit', ctypes.c_uint16),\n    ('IntakeTempAcouticLimitReleaseRate', ctypes.c_uint16),\n    ('FanAbnormalTempLimitOffset', ctypes.c_int16),\n    ('FanStalledTriggerRpm', ctypes.c_uint16),\n    ('FanAbnormalTriggerRpmCoeff', ctypes.c_uint16),\n    ('FanSpare', ctypes.c_uint16 * 1),\n    ('FanIntakeSensorSupport', ctypes.c_ubyte),\n    ('FanIntakePadding', ctypes.c_ubyte),\n    ('FanSpare2', ctypes.c_uint32 * 12),\n    ('ODFeatureCtrlMask', ctypes.c_uint32),\n    ('TemperatureLimit_Hynix', ctypes.c_uint16),\n    ('TemperatureLimit_Micron', ctypes.c_uint16),\n    ('TemperatureFwCtfLimit_Hynix', ctypes.c_uint16),\n    ('TemperatureFwCtfLimit_Micron', ctypes.c_uint16),\n    ('PlatformTdcLimit', ctypes.c_uint16 * 2),\n    ('SocketPowerLimitDc', ctypes.c_uint16 * 4),\n    ('SocketPowerLimitSmartShift2', ctypes.c_uint16),\n    ('CustomSkuSpare16b', ctypes.c_uint16),\n    ('CustomSkuSpare32b', ctypes.c_uint32 * 10),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nclass struct_BoardTable_t(Structure):\n    pass\n\nclass struct_I2cControllerConfig_t(Structure):\n    pass\n\nstruct_I2cControllerConfig_t._pack_ = 1 # source:False\nstruct_I2cControllerConfig_t._fields_ = [\n    ('Enabled', ctypes.c_ubyte),\n    ('Speed', ctypes.c_ubyte),\n    ('SlaveAddress', ctypes.c_ubyte),\n    ('ControllerPort', ctypes.c_ubyte),\n    ('ControllerName', ctypes.c_ubyte),\n    ('ThermalThrotter', ctypes.c_ubyte),\n    ('I2cProtocol', ctypes.c_ubyte),\n    ('PaddingConfig', ctypes.c_ubyte),\n]\n\nclass struct_Svi3RegulatorSettings_t(Structure):\n    pass\n\nstruct_Svi3RegulatorSettings_t._pack_ = 1 # source:False\nstruct_Svi3RegulatorSettings_t._fields_ = [\n    ('SlewRateConditions', ctypes.c_ubyte),\n    ('LoadLineAdjust', ctypes.c_ubyte),\n    ('VoutOffset', ctypes.c_ubyte),\n    ('VidMax', ctypes.c_ubyte),\n    ('VidMin', ctypes.c_ubyte),\n    ('TenBitTelEn', ctypes.c_ubyte),\n    ('SixteenBitTelEn', ctypes.c_ubyte),\n    ('OcpThresh', ctypes.c_ubyte),\n    ('OcpWarnThresh', ctypes.c_ubyte),\n    ('OcpSettings', ctypes.c_ubyte),\n    ('VrhotThresh', ctypes.c_ubyte),\n    ('OtpThresh', ctypes.c_ubyte),\n    ('UvpOvpDeltaRef', ctypes.c_ubyte),\n    ('PhaseShed', ctypes.c_ubyte),\n    ('Padding', ctypes.c_ubyte * 10),\n    ('SettingOverrideMask', ctypes.c_uint32),\n]\n\nstruct_BoardTable_t._pack_ = 1 # source:False\nstruct_BoardTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('I2cControllers', struct_I2cControllerConfig_t * 8),\n    ('SlaveAddrMapping', ctypes.c_ubyte * 4),\n    ('VrPsiSupport', ctypes.c_ubyte * 4),\n    ('Svi3SvcSpeed', ctypes.c_uint32),\n    ('EnablePsi6', ctypes.c_ubyte * 4),\n    ('Svi3RegSettings', struct_Svi3RegulatorSettings_t * 4),\n    ('LedOffGpio', ctypes.c_ubyte),\n    ('FanOffGpio', ctypes.c_ubyte),\n    ('GfxVrPowerStageOffGpio', ctypes.c_ubyte),\n    ('AcDcGpio', ctypes.c_ubyte),\n    ('AcDcPolarity', ctypes.c_ubyte),\n    ('VR0HotGpio', ctypes.c_ubyte),\n    ('VR0HotPolarity', ctypes.c_ubyte),\n    ('GthrGpio', ctypes.c_ubyte),\n    ('GthrPolarity', ctypes.c_ubyte),\n    ('LedPin0', ctypes.c_ubyte),\n    ('LedPin1', ctypes.c_ubyte),\n    ('LedPin2', ctypes.c_ubyte),\n    ('LedEnableMask', ctypes.c_ubyte),\n    ('LedPcie', ctypes.c_ubyte),\n    ('LedError', ctypes.c_ubyte),\n    ('PaddingLed', ctypes.c_ubyte),\n    ('UclkTrainingModeSpreadPercent', ctypes.c_ubyte),\n    ('UclkSpreadPadding', ctypes.c_ubyte),\n    ('UclkSpreadFreq', ctypes.c_uint16),\n    ('UclkSpreadPercent', ctypes.c_ubyte * 16),\n    ('GfxclkSpreadEnable', ctypes.c_ubyte),\n    ('FclkSpreadPercent', ctypes.c_ubyte),\n    ('FclkSpreadFreq', ctypes.c_uint16),\n    ('DramWidth', ctypes.c_ubyte),\n    ('PaddingMem1', ctypes.c_ubyte * 7),\n    ('HsrEnabled', ctypes.c_ubyte),\n    ('VddqOffEnabled', ctypes.c_ubyte),\n    ('PaddingUmcFlags', ctypes.c_ubyte * 2),\n    ('Paddign1', ctypes.c_uint32),\n    ('BacoEntryDelay', ctypes.c_uint32),\n    ('FuseWritePowerMuxPresent', ctypes.c_ubyte),\n    ('FuseWritePadding', ctypes.c_ubyte * 3),\n    ('LoadlineGfx', ctypes.c_uint32),\n    ('LoadlineSoc', ctypes.c_uint32),\n    ('GfxEdcLimit', ctypes.c_uint32),\n    ('SocEdcLimit', ctypes.c_uint32),\n    ('RestBoardPower', ctypes.c_uint32),\n    ('ConnectorsImpedance', ctypes.c_uint32),\n    ('EpcsSens0', ctypes.c_ubyte),\n    ('EpcsSens1', ctypes.c_ubyte),\n    ('PaddingEpcs', ctypes.c_ubyte * 2),\n    ('BoardSpare', ctypes.c_uint32 * 52),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nstruct_PPTable_t._pack_ = 1 # source:False\nstruct_PPTable_t._fields_ = [\n    ('PFE_Settings', struct_PFE_Settings_t),\n    ('SkuTable', struct_SkuTable_t),\n    ('CustomSkuTable', struct_CustomSkuTable_t),\n    ('BoardTable', struct_BoardTable_t),\n]\n\nstruct_smu_14_0_2_powerplay_table._pack_ = 1 # source:False\nstruct_smu_14_0_2_powerplay_table._fields_ = [\n    ('header', struct_atom_common_table_header),\n    ('table_revision', ctypes.c_ubyte),\n    ('pptable_source', ctypes.c_ubyte),\n    ('pmfw_pptable_start_offset', ctypes.c_uint16),\n    ('pmfw_pptable_size', ctypes.c_uint16),\n    ('pmfw_sku_table_start_offset', ctypes.c_uint16),\n    ('pmfw_sku_table_size', ctypes.c_uint16),\n    ('pmfw_board_table_start_offset', ctypes.c_uint16),\n    ('pmfw_board_table_size', ctypes.c_uint16),\n    ('pmfw_custom_sku_table_start_offset', ctypes.c_uint16),\n    ('pmfw_custom_sku_table_size', ctypes.c_uint16),\n    ('golden_pp_id', ctypes.c_uint32),\n    ('golden_revision', ctypes.c_uint32),\n    ('format_id', ctypes.c_uint16),\n    ('platform_caps', ctypes.c_uint32),\n    ('thermal_controller_type', ctypes.c_ubyte),\n    ('small_power_limit1', ctypes.c_uint16),\n    ('small_power_limit2', ctypes.c_uint16),\n    ('boost_power_limit', ctypes.c_uint16),\n    ('software_shutdown_temp', ctypes.c_uint16),\n    ('reserve', ctypes.c_ubyte * 143),\n    ('overdrive_table', struct_smu_14_0_2_overdrive_table),\n    ('smc_pptable', struct_PPTable_t),\n]\n\n\n# values for enumeration 'SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP'\nSMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP__enumvalues = {\n    0: 'SMU_14_0_2_CUSTOM_ODCAP_POWER_MODE',\n    1: 'SMU_14_0_2_CUSTOM_ODCAP_COUNT',\n}\nSMU_14_0_2_CUSTOM_ODCAP_POWER_MODE = 0\nSMU_14_0_2_CUSTOM_ODCAP_COUNT = 1\nSMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP = ctypes.c_uint32 # enum\n\n# values for enumeration 'SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID'\nSMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID__enumvalues = {\n    0: 'SMU_14_0_2_CUSTOM_ODSETTING_POWER_MODE',\n    1: 'SMU_14_0_2_CUSTOM_ODSETTING_COUNT',\n}\nSMU_14_0_2_CUSTOM_ODSETTING_POWER_MODE = 0\nSMU_14_0_2_CUSTOM_ODSETTING_COUNT = 1\nSMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID = ctypes.c_uint32 # enum\nclass struct_smu_14_0_2_custom_overdrive_table(Structure):\n    pass\n\nstruct_smu_14_0_2_custom_overdrive_table._pack_ = 1 # source:False\nstruct_smu_14_0_2_custom_overdrive_table._fields_ = [\n    ('revision', ctypes.c_ubyte),\n    ('reserve', ctypes.c_ubyte * 3),\n    ('cap', ctypes.c_ubyte * 1),\n    ('max', ctypes.c_int32 * 1),\n    ('min', ctypes.c_int32 * 1),\n    ('pm_setting', ctypes.c_int16 * 16),\n]\n\nclass struct_smu_14_0_3_custom_powerplay_table(Structure):\n    pass\n\nstruct_smu_14_0_3_custom_powerplay_table._pack_ = 1 # source:False\nstruct_smu_14_0_3_custom_powerplay_table._fields_ = [\n    ('custom_table_revision', ctypes.c_ubyte),\n    ('custom_table_size', ctypes.c_uint16),\n    ('custom_sku_table_offset', ctypes.c_uint16),\n    ('custom_platform_caps', ctypes.c_uint32),\n    ('software_shutdown_temp', ctypes.c_uint16),\n    ('custom_overdrive_table', struct_smu_14_0_2_custom_overdrive_table),\n    ('reserve', ctypes.c_uint32 * 8),\n    ('custom_sku_table_pmfw', struct_CustomSkuTable_t),\n]\n\n__all__ = \\\n    ['PPTABLE_SOURCE_DRIVER_HARDCODED', 'PPTABLE_SOURCE_IFWI',\n    'PPTABLE_SOURCE_MAX', 'PPTABLE_SOURCE_PPGEN_REGISTRY',\n    'SMU_14_0_2_CUSTOM_ODCAP_COUNT',\n    'SMU_14_0_2_CUSTOM_ODCAP_POWER_MODE',\n    'SMU_14_0_2_CUSTOM_ODSETTING_COUNT',\n    'SMU_14_0_2_CUSTOM_ODSETTING_POWER_MODE',\n    'SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID',\n    'SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP',\n    'SMU_14_0_2_CUSTOM_TABLE_FORMAT_REVISION',\n    'SMU_14_0_2_MAX_ODFEATURE', 'SMU_14_0_2_MAX_ODSETTING',\n    'SMU_14_0_2_MAX_PMSETTING',\n    'SMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_14_0_2_ODCAP_AUTO_OC_ENGINE',\n    'SMU_14_0_2_ODCAP_AUTO_OC_MEMORY', 'SMU_14_0_2_ODCAP_AUTO_SOC_UV',\n    'SMU_14_0_2_ODCAP_AUTO_UV_ENGINE',\n    'SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER',\n    'SMU_14_0_2_ODCAP_COUNT', 'SMU_14_0_2_ODCAP_MANUAL_AC_TIMING',\n    'SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE',\n    'SMU_14_0_2_ODCAP_POWER_MODE',\n    'SMU_14_0_2_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_14_0_2_ODFEATURE_AUTO_OC_ENGINE',\n    'SMU_14_0_2_ODFEATURE_AUTO_OC_MEMORY',\n    'SMU_14_0_2_ODFEATURE_AUTO_SOC_UV',\n    'SMU_14_0_2_ODFEATURE_AUTO_UV_ENGINE',\n    'SMU_14_0_2_ODFEATURE_AUTO_VF_CURVE_OPTIMIZER',\n    'SMU_14_0_2_ODFEATURE_MANUAL_AC_TIMING',\n    'SMU_14_0_2_ODFEATURE_MEMORY_TIMING_TUNE',\n    'SMU_14_0_2_ODFEATURE_POWER_MODE',\n    'SMU_14_0_2_ODSETTING_ACTIMING',\n    'SMU_14_0_2_ODSETTING_AUTOOCENGINE',\n    'SMU_14_0_2_ODSETTING_AUTOOCMEMORY',\n    'SMU_14_0_2_ODSETTING_AUTOUVENGINE',\n    'SMU_14_0_2_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',\n    'SMU_14_0_2_ODSETTING_AUTO_SOC_UV',\n    'SMU_14_0_2_ODSETTING_AUTO_VF_CURVE_OPTIMIZER',\n    'SMU_14_0_2_ODSETTING_COUNT',\n    'SMU_14_0_2_ODSETTING_MANUAL_AC_TIMING',\n    'SMU_14_0_2_ODSETTING_POWER_MODE', 'SMU_14_0_2_OD_SW_FEATURE_CAP',\n    'SMU_14_0_2_OD_SW_FEATURE_ID',\n    'SMU_14_0_2_OD_SW_FEATURE_SETTING_ID',\n    'SMU_14_0_2_OVERDRIVE_TABLE_ADVANCED',\n    'SMU_14_0_2_OVERDRIVE_TABLE_BASIC',\n    'SMU_14_0_2_OVERDRIVE_TABLE_COUNT',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_BALANCE',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_QUIET',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_RAGE',\n    'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_TURBO',\n    'SMU_14_0_2_PMSETTING_COUNT',\n    'SMU_14_0_2_PMSETTING_POWER_LIMIT_BALANCE',\n    'SMU_14_0_2_PMSETTING_POWER_LIMIT_QUIET',\n    'SMU_14_0_2_PMSETTING_POWER_LIMIT_RAGE',\n    'SMU_14_0_2_PMSETTING_POWER_LIMIT_TURBO', 'SMU_14_0_2_PPTABLE_H',\n    'SMU_14_0_2_PP_CUSTOM_OVERDRIVE_VERSION',\n    'SMU_14_0_2_PP_OVERDRIVE_VERSION',\n    'SMU_14_0_2_PP_PLATFORM_CAP_BACO',\n    'SMU_14_0_2_PP_PLATFORM_CAP_HARDWAREDC',\n    'SMU_14_0_2_PP_PLATFORM_CAP_LEDSUPPORTED',\n    'SMU_14_0_2_PP_PLATFORM_CAP_MACO',\n    'SMU_14_0_2_PP_PLATFORM_CAP_MOBILEOVERDRIVE',\n    'SMU_14_0_2_PP_PLATFORM_CAP_POWERPLAY',\n    'SMU_14_0_2_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'SMU_14_0_2_PP_PLATFORM_CAP_SHADOWPSTATE',\n    'SMU_14_0_2_PP_POWERSAVINGCLOCK_VERSION',\n    'SMU_14_0_2_PP_THERMALCONTROLLER_NONE',\n    'SMU_14_0_2_PWRMODE_SETTING', 'SMU_14_0_2_TABLE_FORMAT_REVISION',\n    'SMU_14_0_2_overdrive_table_id', 'smu_14_0_3_pptable_source',\n    'struct_AvfsDcBtcParams_t', 'struct_AvfsFuseOverride_t',\n    'struct_BoardTable_t', 'struct_BootValues_t',\n    'struct_CustomSkuTable_t', 'struct_DpmDescriptor_t',\n    'struct_DriverReportedClocks_t', 'struct_DroopInt_t',\n    'struct_I2cControllerConfig_t', 'struct_LinearInt_t',\n    'struct_MsgLimits_t', 'struct_OverDriveLimits_t',\n    'struct_PFE_Settings_t', 'struct_PPTable_t',\n    'struct_QuadraticInt_t', 'struct_SkuTable_t',\n    'struct_Svi3RegulatorSettings_t',\n    'struct_atom_common_table_header',\n    'struct_smu_14_0_2_custom_overdrive_table',\n    'struct_smu_14_0_2_overdrive_table',\n    'struct_smu_14_0_2_powerplay_table',\n    'struct_smu_14_0_3_custom_powerplay_table']\n"
  },
  {
    "path": "src/upp/atom_gen/vega10_pptable.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/include/atombios.h']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\n_VEGA10_PPTABLE_H_ = True # macro\nATOM_VEGA10_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK = 0x0f # macro\nATOM_VEGA10_PP_FANPARAMETERS_NOFAN = 0x80 # macro\nATOM_VEGA10_PP_THERMALCONTROLLER_NONE = 0 # macro\nATOM_VEGA10_PP_THERMALCONTROLLER_LM96163 = 17 # macro\nATOM_VEGA10_PP_THERMALCONTROLLER_VEGA10 = 24 # macro\nATOM_VEGA10_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL = 0x89 # macro\nATOM_VEGA10_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL = 0x8D # macro\nATOM_VEGA10_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro\nATOM_VEGA10_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro\nATOM_VEGA10_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro\nATOM_VEGA10_PP_PLATFORM_CAP_BACO = 0x8 # macro\nATOM_VEGA10_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL = 0x10 # macro\nATOM_PPLIB_CLASSIFICATION_UI_MASK = 0x0007 # macro\nATOM_PPLIB_CLASSIFICATION_UI_SHIFT = 0 # macro\nATOM_PPLIB_CLASSIFICATION_UI_NONE = 0 # macro\nATOM_PPLIB_CLASSIFICATION_UI_BATTERY = 1 # macro\nATOM_PPLIB_CLASSIFICATION_UI_BALANCED = 3 # macro\nATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE = 5 # macro\nATOM_PPLIB_CLASSIFICATION_BOOT = 0x0008 # macro\nATOM_PPLIB_CLASSIFICATION_THERMAL = 0x0010 # macro\nATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE = 0x0020 # macro\nATOM_PPLIB_CLASSIFICATION_REST = 0x0040 # macro\nATOM_PPLIB_CLASSIFICATION_FORCED = 0x0080 # macro\nATOM_PPLIB_CLASSIFICATION_ACPI = 0x1000 # macro\nATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 = 0x0001 # macro\nATOM_Vega10_DISALLOW_ON_DC = 0x00004000 # macro\nATOM_Vega10_ENABLE_VARIBRIGHT = 0x00008000 # macro\nATOM_Vega10_TABLE_REVISION_VEGA10 = 8 # macro\nATOM_Vega10_VoltageMode_AVFS_Interpolate = 0 # macro\nATOM_Vega10_VoltageMode_AVFS_WorstCase = 1 # macro\nATOM_Vega10_VoltageMode_Static = 2 # macro\nclass struct__ATOM_Vega10_POWERPLAYTABLE(Structure):\n    pass\n\nclass struct_atom_common_table_header(Structure):\n    pass\n\nstruct_atom_common_table_header._pack_ = 1 # source:False\nstruct_atom_common_table_header._fields_ = [\n    ('structuresize', ctypes.c_uint16),\n    ('format_revision', ctypes.c_ubyte),\n    ('content_revision', ctypes.c_ubyte),\n]\n\nstruct__ATOM_Vega10_POWERPLAYTABLE._pack_ = 1 # source:False\nstruct__ATOM_Vega10_POWERPLAYTABLE._fields_ = [\n    ('sHeader', struct_atom_common_table_header),\n    ('ucTableRevision', ctypes.c_ubyte),\n    ('usTableSize', ctypes.c_uint16),\n    ('ulGoldenPPID', ctypes.c_uint32),\n    ('ulGoldenRevision', ctypes.c_uint32),\n    ('usFormatID', ctypes.c_uint16),\n    ('ulPlatformCaps', ctypes.c_uint32),\n    ('ulMaxODEngineClock', ctypes.c_uint32),\n    ('ulMaxODMemoryClock', ctypes.c_uint32),\n    ('usPowerControlLimit', ctypes.c_uint16),\n    ('usUlvVoltageOffset', ctypes.c_uint16),\n    ('usUlvSmnclkDid', ctypes.c_uint16),\n    ('usUlvMp1clkDid', ctypes.c_uint16),\n    ('usUlvGfxclkBypass', ctypes.c_uint16),\n    ('usGfxclkSlewRate', ctypes.c_uint16),\n    ('ucGfxVoltageMode', ctypes.c_ubyte),\n    ('ucSocVoltageMode', ctypes.c_ubyte),\n    ('ucUclkVoltageMode', ctypes.c_ubyte),\n    ('ucUvdVoltageMode', ctypes.c_ubyte),\n    ('ucVceVoltageMode', ctypes.c_ubyte),\n    ('ucMp0VoltageMode', ctypes.c_ubyte),\n    ('ucDcefVoltageMode', ctypes.c_ubyte),\n    ('usStateArrayOffset', ctypes.c_uint16),\n    ('usFanTableOffset', ctypes.c_uint16),\n    ('usThermalControllerOffset', ctypes.c_uint16),\n    ('usSocclkDependencyTableOffset', ctypes.c_uint16),\n    ('usMclkDependencyTableOffset', ctypes.c_uint16),\n    ('usGfxclkDependencyTableOffset', ctypes.c_uint16),\n    ('usDcefclkDependencyTableOffset', ctypes.c_uint16),\n    ('usVddcLookupTableOffset', ctypes.c_uint16),\n    ('usVddmemLookupTableOffset', ctypes.c_uint16),\n    ('usMMDependencyTableOffset', ctypes.c_uint16),\n    ('usVCEStateTableOffset', ctypes.c_uint16),\n    ('usReserve', ctypes.c_uint16),\n    ('usPowerTuneTableOffset', ctypes.c_uint16),\n    ('usHardLimitTableOffset', ctypes.c_uint16),\n    ('usVddciLookupTableOffset', ctypes.c_uint16),\n    ('usPCIETableOffset', ctypes.c_uint16),\n    ('usPixclkDependencyTableOffset', ctypes.c_uint16),\n    ('usDispClkDependencyTableOffset', ctypes.c_uint16),\n    ('usPhyClkDependencyTableOffset', ctypes.c_uint16),\n]\n\nATOM_Vega10_POWERPLAYTABLE = struct__ATOM_Vega10_POWERPLAYTABLE\nclass struct__ATOM_Vega10_State(Structure):\n    pass\n\nstruct__ATOM_Vega10_State._pack_ = 1 # source:False\nstruct__ATOM_Vega10_State._fields_ = [\n    ('ucSocClockIndexHigh', ctypes.c_ubyte),\n    ('ucSocClockIndexLow', ctypes.c_ubyte),\n    ('ucGfxClockIndexHigh', ctypes.c_ubyte),\n    ('ucGfxClockIndexLow', ctypes.c_ubyte),\n    ('ucMemClockIndexHigh', ctypes.c_ubyte),\n    ('ucMemClockIndexLow', ctypes.c_ubyte),\n    ('usClassification', ctypes.c_uint16),\n    ('ulCapsAndSettings', ctypes.c_uint32),\n    ('usClassification2', ctypes.c_uint16),\n]\n\nATOM_Vega10_State = struct__ATOM_Vega10_State\nclass struct__ATOM_Vega10_State_Array(Structure):\n    pass\n\nstruct__ATOM_Vega10_State_Array._pack_ = 1 # source:False\nstruct__ATOM_Vega10_State_Array._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('states', struct__ATOM_Vega10_State * 0),\n]\n\nATOM_Vega10_State_Array = struct__ATOM_Vega10_State_Array\nclass struct__ATOM_Vega10_CLK_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_CLK_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_CLK_Dependency_Record._fields_ = [\n    ('ulClk', ctypes.c_uint32),\n    ('ucVddInd', ctypes.c_ubyte),\n]\n\nATOM_Vega10_CLK_Dependency_Record = struct__ATOM_Vega10_CLK_Dependency_Record\nclass struct__ATOM_Vega10_GFXCLK_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_GFXCLK_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_GFXCLK_Dependency_Record._fields_ = [\n    ('ulClk', ctypes.c_uint32),\n    ('ucVddInd', ctypes.c_ubyte),\n    ('usCKSVOffsetandDisable', ctypes.c_uint16),\n    ('usAVFSOffset', ctypes.c_uint16),\n]\n\nATOM_Vega10_GFXCLK_Dependency_Record = struct__ATOM_Vega10_GFXCLK_Dependency_Record\nclass struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2(Structure):\n    pass\n\nstruct__ATOM_Vega10_GFXCLK_Dependency_Record_V2._pack_ = 1 # source:False\nstruct__ATOM_Vega10_GFXCLK_Dependency_Record_V2._fields_ = [\n    ('ulClk', ctypes.c_uint32),\n    ('ucVddInd', ctypes.c_ubyte),\n    ('usCKSVOffsetandDisable', ctypes.c_uint16),\n    ('usAVFSOffset', ctypes.c_uint16),\n    ('ucACGEnable', ctypes.c_ubyte),\n    ('ucReserved', ctypes.c_ubyte * 3),\n]\n\nATOM_Vega10_GFXCLK_Dependency_Record_V2 = struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2\nclass struct__ATOM_Vega10_MCLK_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_MCLK_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_MCLK_Dependency_Record._fields_ = [\n    ('ulMemClk', ctypes.c_uint32),\n    ('ucVddInd', ctypes.c_ubyte),\n    ('ucVddMemInd', ctypes.c_ubyte),\n    ('ucVddciInd', ctypes.c_ubyte),\n]\n\nATOM_Vega10_MCLK_Dependency_Record = struct__ATOM_Vega10_MCLK_Dependency_Record\nclass struct__ATOM_Vega10_GFXCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_GFXCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_GFXCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_GFXCLK_Dependency_Record * 0),\n]\n\nATOM_Vega10_GFXCLK_Dependency_Table = struct__ATOM_Vega10_GFXCLK_Dependency_Table\nclass struct__ATOM_Vega10_MCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_MCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_MCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_MCLK_Dependency_Record * 0),\n]\n\nATOM_Vega10_MCLK_Dependency_Table = struct__ATOM_Vega10_MCLK_Dependency_Table\nclass struct__ATOM_Vega10_SOCCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_SOCCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_SOCCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),\n]\n\nATOM_Vega10_SOCCLK_Dependency_Table = struct__ATOM_Vega10_SOCCLK_Dependency_Table\nclass struct__ATOM_Vega10_DCEFCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_DCEFCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_DCEFCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),\n]\n\nATOM_Vega10_DCEFCLK_Dependency_Table = struct__ATOM_Vega10_DCEFCLK_Dependency_Table\nclass struct__ATOM_Vega10_PIXCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_PIXCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_PIXCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),\n]\n\nATOM_Vega10_PIXCLK_Dependency_Table = struct__ATOM_Vega10_PIXCLK_Dependency_Table\nclass struct__ATOM_Vega10_DISPCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_DISPCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_DISPCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),\n]\n\nATOM_Vega10_DISPCLK_Dependency_Table = struct__ATOM_Vega10_DISPCLK_Dependency_Table\nclass struct__ATOM_Vega10_PHYCLK_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_PHYCLK_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_PHYCLK_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),\n]\n\nATOM_Vega10_PHYCLK_Dependency_Table = struct__ATOM_Vega10_PHYCLK_Dependency_Table\nclass struct__ATOM_Vega10_MM_Dependency_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_MM_Dependency_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_MM_Dependency_Record._fields_ = [\n    ('ucVddcInd', ctypes.c_ubyte),\n    ('ulDClk', ctypes.c_uint32),\n    ('ulVClk', ctypes.c_uint32),\n    ('ulEClk', ctypes.c_uint32),\n    ('ulPSPClk', ctypes.c_uint32),\n]\n\nATOM_Vega10_MM_Dependency_Record = struct__ATOM_Vega10_MM_Dependency_Record\nclass struct__ATOM_Vega10_MM_Dependency_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_MM_Dependency_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_MM_Dependency_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_MM_Dependency_Record * 0),\n]\n\nATOM_Vega10_MM_Dependency_Table = struct__ATOM_Vega10_MM_Dependency_Table\nclass struct__ATOM_Vega10_PCIE_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_PCIE_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_PCIE_Record._fields_ = [\n    ('ulLCLK', ctypes.c_uint32),\n    ('ucPCIEGenSpeed', ctypes.c_ubyte),\n    ('ucPCIELaneWidth', ctypes.c_ubyte),\n]\n\nATOM_Vega10_PCIE_Record = struct__ATOM_Vega10_PCIE_Record\nclass struct__ATOM_Vega10_PCIE_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_PCIE_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_PCIE_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_PCIE_Record * 0),\n]\n\nATOM_Vega10_PCIE_Table = struct__ATOM_Vega10_PCIE_Table\nclass struct__ATOM_Vega10_Voltage_Lookup_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_Voltage_Lookup_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Voltage_Lookup_Record._fields_ = [\n    ('usVdd', ctypes.c_uint16),\n]\n\nATOM_Vega10_Voltage_Lookup_Record = struct__ATOM_Vega10_Voltage_Lookup_Record\nclass struct__ATOM_Vega10_Voltage_Lookup_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_Voltage_Lookup_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Voltage_Lookup_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_Voltage_Lookup_Record * 0),\n]\n\nATOM_Vega10_Voltage_Lookup_Table = struct__ATOM_Vega10_Voltage_Lookup_Table\nclass struct__ATOM_Vega10_Fan_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_Fan_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Fan_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usFanOutputSensitivity', ctypes.c_uint16),\n    ('usFanRPMMax', ctypes.c_uint16),\n    ('usThrottlingRPM', ctypes.c_uint16),\n    ('usFanAcousticLimit', ctypes.c_uint16),\n    ('usTargetTemperature', ctypes.c_uint16),\n    ('usMinimumPWMLimit', ctypes.c_uint16),\n    ('usTargetGfxClk', ctypes.c_uint16),\n    ('usFanGainEdge', ctypes.c_uint16),\n    ('usFanGainHotspot', ctypes.c_uint16),\n    ('usFanGainLiquid', ctypes.c_uint16),\n    ('usFanGainVrVddc', ctypes.c_uint16),\n    ('usFanGainVrMvdd', ctypes.c_uint16),\n    ('usFanGainPlx', ctypes.c_uint16),\n    ('usFanGainHbm', ctypes.c_uint16),\n    ('ucEnableZeroRPM', ctypes.c_ubyte),\n    ('usFanStopTemperature', ctypes.c_uint16),\n    ('usFanStartTemperature', ctypes.c_uint16),\n]\n\nATOM_Vega10_Fan_Table = struct__ATOM_Vega10_Fan_Table\nclass struct__ATOM_Vega10_Fan_Table_V2(Structure):\n    pass\n\nstruct__ATOM_Vega10_Fan_Table_V2._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Fan_Table_V2._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usFanOutputSensitivity', ctypes.c_uint16),\n    ('usFanAcousticLimitRpm', ctypes.c_uint16),\n    ('usThrottlingRPM', ctypes.c_uint16),\n    ('usTargetTemperature', ctypes.c_uint16),\n    ('usMinimumPWMLimit', ctypes.c_uint16),\n    ('usTargetGfxClk', ctypes.c_uint16),\n    ('usFanGainEdge', ctypes.c_uint16),\n    ('usFanGainHotspot', ctypes.c_uint16),\n    ('usFanGainLiquid', ctypes.c_uint16),\n    ('usFanGainVrVddc', ctypes.c_uint16),\n    ('usFanGainVrMvdd', ctypes.c_uint16),\n    ('usFanGainPlx', ctypes.c_uint16),\n    ('usFanGainHbm', ctypes.c_uint16),\n    ('ucEnableZeroRPM', ctypes.c_ubyte),\n    ('usFanStopTemperature', ctypes.c_uint16),\n    ('usFanStartTemperature', ctypes.c_uint16),\n    ('ucFanParameters', ctypes.c_ubyte),\n    ('ucFanMinRPM', ctypes.c_ubyte),\n    ('ucFanMaxRPM', ctypes.c_ubyte),\n]\n\nATOM_Vega10_Fan_Table_V2 = struct__ATOM_Vega10_Fan_Table_V2\nclass struct__ATOM_Vega10_Fan_Table_V3(Structure):\n    pass\n\nstruct__ATOM_Vega10_Fan_Table_V3._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Fan_Table_V3._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usFanOutputSensitivity', ctypes.c_uint16),\n    ('usFanAcousticLimitRpm', ctypes.c_uint16),\n    ('usThrottlingRPM', ctypes.c_uint16),\n    ('usTargetTemperature', ctypes.c_uint16),\n    ('usMinimumPWMLimit', ctypes.c_uint16),\n    ('usTargetGfxClk', ctypes.c_uint16),\n    ('usFanGainEdge', ctypes.c_uint16),\n    ('usFanGainHotspot', ctypes.c_uint16),\n    ('usFanGainLiquid', ctypes.c_uint16),\n    ('usFanGainVrVddc', ctypes.c_uint16),\n    ('usFanGainVrMvdd', ctypes.c_uint16),\n    ('usFanGainPlx', ctypes.c_uint16),\n    ('usFanGainHbm', ctypes.c_uint16),\n    ('ucEnableZeroRPM', ctypes.c_ubyte),\n    ('usFanStopTemperature', ctypes.c_uint16),\n    ('usFanStartTemperature', ctypes.c_uint16),\n    ('ucFanParameters', ctypes.c_ubyte),\n    ('ucFanMinRPM', ctypes.c_ubyte),\n    ('ucFanMaxRPM', ctypes.c_ubyte),\n    ('usMGpuThrottlingRPM', ctypes.c_uint16),\n]\n\nATOM_Vega10_Fan_Table_V3 = struct__ATOM_Vega10_Fan_Table_V3\nclass struct__ATOM_Vega10_Thermal_Controller(Structure):\n    pass\n\nstruct__ATOM_Vega10_Thermal_Controller._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Thermal_Controller._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucType', ctypes.c_ubyte),\n    ('ucI2cLine', ctypes.c_ubyte),\n    ('ucI2cAddress', ctypes.c_ubyte),\n    ('ucFanParameters', ctypes.c_ubyte),\n    ('ucFanMinRPM', ctypes.c_ubyte),\n    ('ucFanMaxRPM', ctypes.c_ubyte),\n    ('ucFlags', ctypes.c_ubyte),\n]\n\nATOM_Vega10_Thermal_Controller = struct__ATOM_Vega10_Thermal_Controller\nclass struct__ATOM_Vega10_VCE_State_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_VCE_State_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_VCE_State_Record._fields_ = [\n    ('ucVCEClockIndex', ctypes.c_ubyte),\n    ('ucFlag', ctypes.c_ubyte),\n    ('ucSCLKIndex', ctypes.c_ubyte),\n    ('ucMCLKIndex', ctypes.c_ubyte),\n]\n\nATOM_Vega10_VCE_State_Record = struct__ATOM_Vega10_VCE_State_Record\nclass struct__ATOM_Vega10_VCE_State_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_VCE_State_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_VCE_State_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_VCE_State_Record * 0),\n]\n\nATOM_Vega10_VCE_State_Table = struct__ATOM_Vega10_VCE_State_Table\nclass struct__ATOM_Vega10_PowerTune_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_PowerTune_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_PowerTune_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usSocketPowerLimit', ctypes.c_uint16),\n    ('usBatteryPowerLimit', ctypes.c_uint16),\n    ('usSmallPowerLimit', ctypes.c_uint16),\n    ('usTdcLimit', ctypes.c_uint16),\n    ('usEdcLimit', ctypes.c_uint16),\n    ('usSoftwareShutdownTemp', ctypes.c_uint16),\n    ('usTemperatureLimitHotSpot', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid1', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid2', ctypes.c_uint16),\n    ('usTemperatureLimitHBM', ctypes.c_uint16),\n    ('usTemperatureLimitVrSoc', ctypes.c_uint16),\n    ('usTemperatureLimitVrMem', ctypes.c_uint16),\n    ('usTemperatureLimitPlx', ctypes.c_uint16),\n    ('usLoadLineResistance', ctypes.c_uint16),\n    ('ucLiquid1_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid2_I2C_address', ctypes.c_ubyte),\n    ('ucVr_I2C_address', ctypes.c_ubyte),\n    ('ucPlx_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid_I2C_LineSCL', ctypes.c_ubyte),\n    ('ucLiquid_I2C_LineSDA', ctypes.c_ubyte),\n    ('ucVr_I2C_LineSCL', ctypes.c_ubyte),\n    ('ucVr_I2C_LineSDA', ctypes.c_ubyte),\n    ('ucPlx_I2C_LineSCL', ctypes.c_ubyte),\n    ('ucPlx_I2C_LineSDA', ctypes.c_ubyte),\n    ('usTemperatureLimitTedge', ctypes.c_uint16),\n]\n\nATOM_Vega10_PowerTune_Table = struct__ATOM_Vega10_PowerTune_Table\nclass struct__ATOM_Vega10_PowerTune_Table_V2(Structure):\n    pass\n\nstruct__ATOM_Vega10_PowerTune_Table_V2._pack_ = 1 # source:False\nstruct__ATOM_Vega10_PowerTune_Table_V2._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usSocketPowerLimit', ctypes.c_uint16),\n    ('usBatteryPowerLimit', ctypes.c_uint16),\n    ('usSmallPowerLimit', ctypes.c_uint16),\n    ('usTdcLimit', ctypes.c_uint16),\n    ('usEdcLimit', ctypes.c_uint16),\n    ('usSoftwareShutdownTemp', ctypes.c_uint16),\n    ('usTemperatureLimitHotSpot', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid1', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid2', ctypes.c_uint16),\n    ('usTemperatureLimitHBM', ctypes.c_uint16),\n    ('usTemperatureLimitVrSoc', ctypes.c_uint16),\n    ('usTemperatureLimitVrMem', ctypes.c_uint16),\n    ('usTemperatureLimitPlx', ctypes.c_uint16),\n    ('usLoadLineResistance', ctypes.c_uint16),\n    ('ucLiquid1_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid2_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid_I2C_Line', ctypes.c_ubyte),\n    ('ucVr_I2C_address', ctypes.c_ubyte),\n    ('ucVr_I2C_Line', ctypes.c_ubyte),\n    ('ucPlx_I2C_address', ctypes.c_ubyte),\n    ('ucPlx_I2C_Line', ctypes.c_ubyte),\n    ('usTemperatureLimitTedge', ctypes.c_uint16),\n]\n\nATOM_Vega10_PowerTune_Table_V2 = struct__ATOM_Vega10_PowerTune_Table_V2\nclass struct__ATOM_Vega10_PowerTune_Table_V3(Structure):\n    pass\n\nstruct__ATOM_Vega10_PowerTune_Table_V3._pack_ = 1 # source:False\nstruct__ATOM_Vega10_PowerTune_Table_V3._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('usSocketPowerLimit', ctypes.c_uint16),\n    ('usBatteryPowerLimit', ctypes.c_uint16),\n    ('usSmallPowerLimit', ctypes.c_uint16),\n    ('usTdcLimit', ctypes.c_uint16),\n    ('usEdcLimit', ctypes.c_uint16),\n    ('usSoftwareShutdownTemp', ctypes.c_uint16),\n    ('usTemperatureLimitHotSpot', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid1', ctypes.c_uint16),\n    ('usTemperatureLimitLiquid2', ctypes.c_uint16),\n    ('usTemperatureLimitHBM', ctypes.c_uint16),\n    ('usTemperatureLimitVrSoc', ctypes.c_uint16),\n    ('usTemperatureLimitVrMem', ctypes.c_uint16),\n    ('usTemperatureLimitPlx', ctypes.c_uint16),\n    ('usLoadLineResistance', ctypes.c_uint16),\n    ('ucLiquid1_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid2_I2C_address', ctypes.c_ubyte),\n    ('ucLiquid_I2C_Line', ctypes.c_ubyte),\n    ('ucVr_I2C_address', ctypes.c_ubyte),\n    ('ucVr_I2C_Line', ctypes.c_ubyte),\n    ('ucPlx_I2C_address', ctypes.c_ubyte),\n    ('ucPlx_I2C_Line', ctypes.c_ubyte),\n    ('usTemperatureLimitTedge', ctypes.c_uint16),\n    ('usBoostStartTemperature', ctypes.c_uint16),\n    ('usBoostStopTemperature', ctypes.c_uint16),\n    ('ulBoostClock', ctypes.c_uint32),\n    ('Reserved', ctypes.c_uint32 * 2),\n]\n\nATOM_Vega10_PowerTune_Table_V3 = struct__ATOM_Vega10_PowerTune_Table_V3\nclass struct__ATOM_Vega10_Hard_Limit_Record(Structure):\n    pass\n\nstruct__ATOM_Vega10_Hard_Limit_Record._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Hard_Limit_Record._fields_ = [\n    ('ulSOCCLKLimit', ctypes.c_uint32),\n    ('ulGFXCLKLimit', ctypes.c_uint32),\n    ('ulMCLKLimit', ctypes.c_uint32),\n    ('usVddcLimit', ctypes.c_uint16),\n    ('usVddciLimit', ctypes.c_uint16),\n    ('usVddMemLimit', ctypes.c_uint16),\n]\n\nATOM_Vega10_Hard_Limit_Record = struct__ATOM_Vega10_Hard_Limit_Record\nclass struct__ATOM_Vega10_Hard_Limit_Table(Structure):\n    pass\n\nstruct__ATOM_Vega10_Hard_Limit_Table._pack_ = 1 # source:False\nstruct__ATOM_Vega10_Hard_Limit_Table._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n    ('ucNumEntries', ctypes.c_ubyte),\n    ('entries', struct__ATOM_Vega10_Hard_Limit_Record * 0),\n]\n\nATOM_Vega10_Hard_Limit_Table = struct__ATOM_Vega10_Hard_Limit_Table\nclass struct__Vega10_PPTable_Generic_SubTable_Header(Structure):\n    pass\n\nstruct__Vega10_PPTable_Generic_SubTable_Header._pack_ = 1 # source:False\nstruct__Vega10_PPTable_Generic_SubTable_Header._fields_ = [\n    ('ucRevId', ctypes.c_ubyte),\n]\n\nVega10_PPTable_Generic_SubTable_Header = struct__Vega10_PPTable_Generic_SubTable_Header\n__all__ = \\\n    ['ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2',\n    'ATOM_PPLIB_CLASSIFICATION_ACPI',\n    'ATOM_PPLIB_CLASSIFICATION_BOOT',\n    'ATOM_PPLIB_CLASSIFICATION_FORCED',\n    'ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE',\n    'ATOM_PPLIB_CLASSIFICATION_REST',\n    'ATOM_PPLIB_CLASSIFICATION_THERMAL',\n    'ATOM_PPLIB_CLASSIFICATION_UI_BALANCED',\n    'ATOM_PPLIB_CLASSIFICATION_UI_BATTERY',\n    'ATOM_PPLIB_CLASSIFICATION_UI_MASK',\n    'ATOM_PPLIB_CLASSIFICATION_UI_NONE',\n    'ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE',\n    'ATOM_PPLIB_CLASSIFICATION_UI_SHIFT',\n    'ATOM_VEGA10_PP_FANPARAMETERS_NOFAN',\n    'ATOM_VEGA10_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK',\n    'ATOM_VEGA10_PP_PLATFORM_CAP_BACO',\n    'ATOM_VEGA10_PP_PLATFORM_CAP_HARDWAREDC',\n    'ATOM_VEGA10_PP_PLATFORM_CAP_POWERPLAY',\n    'ATOM_VEGA10_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'ATOM_VEGA10_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL',\n    'ATOM_VEGA10_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL',\n    'ATOM_VEGA10_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL',\n    'ATOM_VEGA10_PP_THERMALCONTROLLER_LM96163',\n    'ATOM_VEGA10_PP_THERMALCONTROLLER_NONE',\n    'ATOM_VEGA10_PP_THERMALCONTROLLER_VEGA10',\n    'ATOM_Vega10_CLK_Dependency_Record',\n    'ATOM_Vega10_DCEFCLK_Dependency_Table',\n    'ATOM_Vega10_DISALLOW_ON_DC',\n    'ATOM_Vega10_DISPCLK_Dependency_Table',\n    'ATOM_Vega10_ENABLE_VARIBRIGHT', 'ATOM_Vega10_Fan_Table',\n    'ATOM_Vega10_Fan_Table_V2', 'ATOM_Vega10_Fan_Table_V3',\n    'ATOM_Vega10_GFXCLK_Dependency_Record',\n    'ATOM_Vega10_GFXCLK_Dependency_Record_V2',\n    'ATOM_Vega10_GFXCLK_Dependency_Table',\n    'ATOM_Vega10_Hard_Limit_Record', 'ATOM_Vega10_Hard_Limit_Table',\n    'ATOM_Vega10_MCLK_Dependency_Record',\n    'ATOM_Vega10_MCLK_Dependency_Table',\n    'ATOM_Vega10_MM_Dependency_Record',\n    'ATOM_Vega10_MM_Dependency_Table', 'ATOM_Vega10_PCIE_Record',\n    'ATOM_Vega10_PCIE_Table', 'ATOM_Vega10_PHYCLK_Dependency_Table',\n    'ATOM_Vega10_PIXCLK_Dependency_Table',\n    'ATOM_Vega10_POWERPLAYTABLE', 'ATOM_Vega10_PowerTune_Table',\n    'ATOM_Vega10_PowerTune_Table_V2',\n    'ATOM_Vega10_PowerTune_Table_V3',\n    'ATOM_Vega10_SOCCLK_Dependency_Table', 'ATOM_Vega10_State',\n    'ATOM_Vega10_State_Array', 'ATOM_Vega10_TABLE_REVISION_VEGA10',\n    'ATOM_Vega10_Thermal_Controller', 'ATOM_Vega10_VCE_State_Record',\n    'ATOM_Vega10_VCE_State_Table',\n    'ATOM_Vega10_VoltageMode_AVFS_Interpolate',\n    'ATOM_Vega10_VoltageMode_AVFS_WorstCase',\n    'ATOM_Vega10_VoltageMode_Static',\n    'ATOM_Vega10_Voltage_Lookup_Record',\n    'ATOM_Vega10_Voltage_Lookup_Table',\n    'Vega10_PPTable_Generic_SubTable_Header', '_VEGA10_PPTABLE_H_',\n    'struct__ATOM_Vega10_CLK_Dependency_Record',\n    'struct__ATOM_Vega10_DCEFCLK_Dependency_Table',\n    'struct__ATOM_Vega10_DISPCLK_Dependency_Table',\n    'struct__ATOM_Vega10_Fan_Table',\n    'struct__ATOM_Vega10_Fan_Table_V2',\n    'struct__ATOM_Vega10_Fan_Table_V3',\n    'struct__ATOM_Vega10_GFXCLK_Dependency_Record',\n    'struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2',\n    'struct__ATOM_Vega10_GFXCLK_Dependency_Table',\n    'struct__ATOM_Vega10_Hard_Limit_Record',\n    'struct__ATOM_Vega10_Hard_Limit_Table',\n    'struct__ATOM_Vega10_MCLK_Dependency_Record',\n    'struct__ATOM_Vega10_MCLK_Dependency_Table',\n    'struct__ATOM_Vega10_MM_Dependency_Record',\n    'struct__ATOM_Vega10_MM_Dependency_Table',\n    'struct__ATOM_Vega10_PCIE_Record',\n    'struct__ATOM_Vega10_PCIE_Table',\n    'struct__ATOM_Vega10_PHYCLK_Dependency_Table',\n    'struct__ATOM_Vega10_PIXCLK_Dependency_Table',\n    'struct__ATOM_Vega10_POWERPLAYTABLE',\n    'struct__ATOM_Vega10_PowerTune_Table',\n    'struct__ATOM_Vega10_PowerTune_Table_V2',\n    'struct__ATOM_Vega10_PowerTune_Table_V3',\n    'struct__ATOM_Vega10_SOCCLK_Dependency_Table',\n    'struct__ATOM_Vega10_State', 'struct__ATOM_Vega10_State_Array',\n    'struct__ATOM_Vega10_Thermal_Controller',\n    'struct__ATOM_Vega10_VCE_State_Record',\n    'struct__ATOM_Vega10_VCE_State_Table',\n    'struct__ATOM_Vega10_Voltage_Lookup_Record',\n    'struct__ATOM_Vega10_Voltage_Lookup_Table',\n    'struct__Vega10_PPTable_Generic_SubTable_Header',\n    'struct_atom_common_table_header']\n"
  },
  {
    "path": "src/upp/atom_gen/vega20_pptable.py",
    "content": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/powerplay/inc/smu11_driver_if.h', '']\n# WORD_SIZE is: 8\n# POINTER_SIZE is: 8\n# LONGDOUBLE_SIZE is: 16\n#\nimport ctypes\n\n\nclass AsDictMixin:\n    @classmethod\n    def as_dict(cls, self):\n        result = {}\n        if not isinstance(self, AsDictMixin):\n            # not a structure, assume it's already a python object\n            return self\n        if not hasattr(cls, \"_fields_\"):\n            return result\n        # sys.version_info >= (3, 5)\n        # for (field, *_) in cls._fields_:  # noqa\n        for field_tuple in cls._fields_:  # noqa\n            field = field_tuple[0]\n            if field.startswith('PADDING_'):\n                continue\n            value = getattr(self, field)\n            type_ = type(value)\n            if hasattr(value, \"_length_\") and hasattr(value, \"_type_\"):\n                # array\n                type_ = type_._type_\n                if hasattr(type_, 'as_dict'):\n                    value = [type_.as_dict(v) for v in value]\n                else:\n                    value = [i for i in value]\n            elif hasattr(value, \"contents\") and hasattr(value, \"_type_\"):\n                # pointer\n                try:\n                    if not hasattr(type_, \"as_dict\"):\n                        value = value.contents\n                    else:\n                        type_ = type_._type_\n                        value = type_.as_dict(value.contents)\n                except ValueError:\n                    # nullptr\n                    value = None\n            elif isinstance(value, AsDictMixin):\n                # other structure\n                value = type_.as_dict(value)\n            result[field] = value\n        return result\n\n\nclass Structure(ctypes.Structure, AsDictMixin):\n\n    def __init__(self, *args, **kwds):\n        # We don't want to use positional arguments fill PADDING_* fields\n\n        args = dict(zip(self.__class__._field_names_(), args))\n        args.update(kwds)\n        super(Structure, self).__init__(**args)\n\n    @classmethod\n    def _field_names_(cls):\n        if hasattr(cls, '_fields_'):\n            return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))\n        else:\n            return ()\n\n    @classmethod\n    def get_type(cls, field):\n        for f in cls._fields_:\n            if f[0] == field:\n                return f[1]\n        return None\n\n    @classmethod\n    def bind(cls, bound_fields):\n        fields = {}\n        for name, type_ in cls._fields_:\n            if hasattr(type_, \"restype\"):\n                if name in bound_fields:\n                    if bound_fields[name] is None:\n                        fields[name] = type_()\n                    else:\n                        # use a closure to capture the callback from the loop scope\n                        fields[name] = (\n                            type_((lambda callback: lambda *args: callback(*args))(\n                                bound_fields[name]))\n                        )\n                    del bound_fields[name]\n                else:\n                    # default callback implementation (does nothing)\n                    try:\n                        default_ = type_(0).restype().value\n                    except TypeError:\n                        default_ = None\n                    fields[name] = type_((\n                        lambda default_: lambda *args: default_)(default_))\n            else:\n                # not a callback function, use default initialization\n                if name in bound_fields:\n                    fields[name] = bound_fields[name]\n                    del bound_fields[name]\n                else:\n                    fields[name] = type_()\n        if len(bound_fields) != 0:\n            raise ValueError(\n                \"Cannot bind the following unknown callback(s) {}.{}\".format(\n                    cls.__name__, bound_fields.keys()\n            ))\n        return cls(**fields)\n\n\nclass Union(ctypes.Union, AsDictMixin):\n    pass\n\n\n\n\n\n_VEGA20_PPTABLE_H_ = True # macro\nATOM_VEGA20_PP_THERMALCONTROLLER_NONE = 0 # macro\nATOM_VEGA20_PP_THERMALCONTROLLER_VEGA20 = 26 # macro\nATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro\nATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro\nATOM_VEGA20_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro\nATOM_VEGA20_PP_PLATFORM_CAP_BACO = 0x8 # macro\nATOM_VEGA20_PP_PLATFORM_CAP_BAMACO = 0x10 # macro\nATOM_VEGA20_PP_PLATFORM_CAP_ENABLESHADOWPSTATE = 0x20 # macro\nATOM_VEGA20_TABLE_REVISION_VEGA20 = 11 # macro\nATOM_VEGA20_ODFEATURE_MAX_COUNT = 32 # macro\nATOM_VEGA20_ODSETTING_MAX_COUNT = 32 # macro\nATOM_VEGA20_PPCLOCK_MAX_COUNT = 16 # macro\n\n# values for enumeration 'ATOM_VEGA20_ODFEATURE_ID'\nATOM_VEGA20_ODFEATURE_ID__enumvalues = {\n    0: 'ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS',\n    1: 'ATOM_VEGA20_ODFEATURE_GFXCLK_CURVE',\n    2: 'ATOM_VEGA20_ODFEATURE_UCLK_MAX',\n    3: 'ATOM_VEGA20_ODFEATURE_POWER_LIMIT',\n    4: 'ATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    5: 'ATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN',\n    6: 'ATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN',\n    7: 'ATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM',\n    8: 'ATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE',\n    9: 'ATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    10: 'ATOM_VEGA20_ODFEATURE_COUNT',\n}\nATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS = 0\nATOM_VEGA20_ODFEATURE_GFXCLK_CURVE = 1\nATOM_VEGA20_ODFEATURE_UCLK_MAX = 2\nATOM_VEGA20_ODFEATURE_POWER_LIMIT = 3\nATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT = 4\nATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN = 5\nATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN = 6\nATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM = 7\nATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE = 8\nATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL = 9\nATOM_VEGA20_ODFEATURE_COUNT = 10\nATOM_VEGA20_ODFEATURE_ID = ctypes.c_uint32 # enum\n\n# values for enumeration 'ATOM_VEGA20_ODSETTING_ID'\nATOM_VEGA20_ODSETTING_ID__enumvalues = {\n    0: 'ATOM_VEGA20_ODSETTING_GFXCLKFMAX',\n    1: 'ATOM_VEGA20_ODSETTING_GFXCLKFMIN',\n    2: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1',\n    3: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1',\n    4: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2',\n    5: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2',\n    6: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3',\n    7: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3',\n    8: 'ATOM_VEGA20_ODSETTING_UCLKFMAX',\n    9: 'ATOM_VEGA20_ODSETTING_POWERPERCENTAGE',\n    10: 'ATOM_VEGA20_ODSETTING_FANRPMMIN',\n    11: 'ATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT',\n    12: 'ATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE',\n    13: 'ATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX',\n    14: 'ATOM_VEGA20_ODSETTING_COUNT',\n}\nATOM_VEGA20_ODSETTING_GFXCLKFMAX = 0\nATOM_VEGA20_ODSETTING_GFXCLKFMIN = 1\nATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1 = 2\nATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1 = 3\nATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2 = 4\nATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2 = 5\nATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3 = 6\nATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3 = 7\nATOM_VEGA20_ODSETTING_UCLKFMAX = 8\nATOM_VEGA20_ODSETTING_POWERPERCENTAGE = 9\nATOM_VEGA20_ODSETTING_FANRPMMIN = 10\nATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT = 11\nATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE = 12\nATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX = 13\nATOM_VEGA20_ODSETTING_COUNT = 14\nATOM_VEGA20_ODSETTING_ID = ctypes.c_uint32 # enum\nclass struct__ATOM_VEGA20_OVERDRIVE8_RECORD(Structure):\n    pass\n\nstruct__ATOM_VEGA20_OVERDRIVE8_RECORD._pack_ = 1 # source:False\nstruct__ATOM_VEGA20_OVERDRIVE8_RECORD._fields_ = [\n    ('ucODTableRevision', ctypes.c_ubyte),\n    ('ODFeatureCount', ctypes.c_uint32),\n    ('ODFeatureCapabilities', ctypes.c_ubyte * 32),\n    ('ODSettingCount', ctypes.c_uint32),\n    ('ODSettingsMax', ctypes.c_uint32 * 32),\n    ('ODSettingsMin', ctypes.c_uint32 * 32),\n]\n\nATOM_VEGA20_OVERDRIVE8_RECORD = struct__ATOM_VEGA20_OVERDRIVE8_RECORD\n\n# values for enumeration 'ATOM_VEGA20_PPCLOCK_ID'\nATOM_VEGA20_PPCLOCK_ID__enumvalues = {\n    0: 'ATOM_VEGA20_PPCLOCK_GFXCLK',\n    1: 'ATOM_VEGA20_PPCLOCK_VCLK',\n    2: 'ATOM_VEGA20_PPCLOCK_DCLK',\n    3: 'ATOM_VEGA20_PPCLOCK_ECLK',\n    4: 'ATOM_VEGA20_PPCLOCK_SOCCLK',\n    5: 'ATOM_VEGA20_PPCLOCK_UCLK',\n    6: 'ATOM_VEGA20_PPCLOCK_FCLK',\n    7: 'ATOM_VEGA20_PPCLOCK_DCEFCLK',\n    8: 'ATOM_VEGA20_PPCLOCK_DISPCLK',\n    9: 'ATOM_VEGA20_PPCLOCK_PIXCLK',\n    10: 'ATOM_VEGA20_PPCLOCK_PHYCLK',\n    11: 'ATOM_VEGA20_PPCLOCK_COUNT',\n}\nATOM_VEGA20_PPCLOCK_GFXCLK = 0\nATOM_VEGA20_PPCLOCK_VCLK = 1\nATOM_VEGA20_PPCLOCK_DCLK = 2\nATOM_VEGA20_PPCLOCK_ECLK = 3\nATOM_VEGA20_PPCLOCK_SOCCLK = 4\nATOM_VEGA20_PPCLOCK_UCLK = 5\nATOM_VEGA20_PPCLOCK_FCLK = 6\nATOM_VEGA20_PPCLOCK_DCEFCLK = 7\nATOM_VEGA20_PPCLOCK_DISPCLK = 8\nATOM_VEGA20_PPCLOCK_PIXCLK = 9\nATOM_VEGA20_PPCLOCK_PHYCLK = 10\nATOM_VEGA20_PPCLOCK_COUNT = 11\nATOM_VEGA20_PPCLOCK_ID = ctypes.c_uint32 # enum\nclass struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD(Structure):\n    pass\n\nstruct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD._pack_ = 1 # source:False\nstruct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD._fields_ = [\n    ('ucTableRevision', ctypes.c_ubyte),\n    ('PowerSavingClockCount', ctypes.c_uint32),\n    ('PowerSavingClockMax', ctypes.c_uint32 * 16),\n    ('PowerSavingClockMin', ctypes.c_uint32 * 16),\n]\n\nATOM_VEGA20_POWER_SAVING_CLOCK_RECORD = struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD\nclass struct__ATOM_VEGA20_POWERPLAYTABLE(Structure):\n    pass\n\nclass struct_atom_common_table_header(Structure):\n    pass\n\nstruct_atom_common_table_header._pack_ = 1 # source:False\nstruct_atom_common_table_header._fields_ = [\n    ('structuresize', ctypes.c_uint16),\n    ('format_revision', ctypes.c_ubyte),\n    ('content_revision', ctypes.c_ubyte),\n]\n\nclass struct_PPTable_t(Structure):\n    pass\n\nclass struct_DpmDescriptor_t(Structure):\n    pass\n\nclass struct_LinearInt_t(Structure):\n    pass\n\nstruct_LinearInt_t._pack_ = 1 # source:False\nstruct_LinearInt_t._fields_ = [\n    ('m', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n]\n\nclass struct_QuadraticInt_t(Structure):\n    pass\n\nstruct_QuadraticInt_t._pack_ = 1 # source:False\nstruct_QuadraticInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nstruct_DpmDescriptor_t._pack_ = 1 # source:False\nstruct_DpmDescriptor_t._fields_ = [\n    ('VoltageMode', ctypes.c_ubyte),\n    ('SnapToDiscrete', ctypes.c_ubyte),\n    ('NumDiscreteLevels', ctypes.c_ubyte),\n    ('padding', ctypes.c_ubyte),\n    ('ConversionToAvfsClk', struct_LinearInt_t),\n    ('SsCurve', struct_QuadraticInt_t),\n]\n\nclass struct_DroopInt_t(Structure):\n    pass\n\nstruct_DroopInt_t._pack_ = 1 # source:False\nstruct_DroopInt_t._fields_ = [\n    ('a', ctypes.c_uint32),\n    ('b', ctypes.c_uint32),\n    ('c', ctypes.c_uint32),\n]\n\nclass struct_I2cControllerConfig_t(Structure):\n    pass\n\nstruct_I2cControllerConfig_t._pack_ = 1 # source:False\nstruct_I2cControllerConfig_t._fields_ = [\n    ('Enabled', ctypes.c_uint32),\n    ('SlaveAddress', ctypes.c_uint32),\n    ('ControllerPort', ctypes.c_uint32),\n    ('ControllerName', ctypes.c_uint32),\n    ('ThermalThrottler', ctypes.c_uint32),\n    ('I2cProtocol', ctypes.c_uint32),\n    ('I2cSpeed', ctypes.c_uint32),\n]\n\nstruct_PPTable_t._pack_ = 1 # source:False\nstruct_PPTable_t._fields_ = [\n    ('Version', ctypes.c_uint32),\n    ('FeaturesToRun', ctypes.c_uint32 * 2),\n    ('SocketPowerLimitAc0', ctypes.c_uint16),\n    ('SocketPowerLimitAc0Tau', ctypes.c_uint16),\n    ('SocketPowerLimitAc1', ctypes.c_uint16),\n    ('SocketPowerLimitAc1Tau', ctypes.c_uint16),\n    ('SocketPowerLimitAc2', ctypes.c_uint16),\n    ('SocketPowerLimitAc2Tau', ctypes.c_uint16),\n    ('SocketPowerLimitAc3', ctypes.c_uint16),\n    ('SocketPowerLimitAc3Tau', ctypes.c_uint16),\n    ('SocketPowerLimitDc', ctypes.c_uint16),\n    ('SocketPowerLimitDcTau', ctypes.c_uint16),\n    ('TdcLimitSoc', ctypes.c_uint16),\n    ('TdcLimitSocTau', ctypes.c_uint16),\n    ('TdcLimitGfx', ctypes.c_uint16),\n    ('TdcLimitGfxTau', ctypes.c_uint16),\n    ('TedgeLimit', ctypes.c_uint16),\n    ('ThotspotLimit', ctypes.c_uint16),\n    ('ThbmLimit', ctypes.c_uint16),\n    ('Tvr_gfxLimit', ctypes.c_uint16),\n    ('Tvr_memLimit', ctypes.c_uint16),\n    ('Tliquid1Limit', ctypes.c_uint16),\n    ('Tliquid2Limit', ctypes.c_uint16),\n    ('TplxLimit', ctypes.c_uint16),\n    ('FitLimit', ctypes.c_uint32),\n    ('PpmPowerLimit', ctypes.c_uint16),\n    ('PpmTemperatureThreshold', ctypes.c_uint16),\n    ('MemoryOnPackage', ctypes.c_ubyte),\n    ('padding8_limits', ctypes.c_ubyte),\n    ('Tvr_SocLimit', ctypes.c_uint16),\n    ('UlvVoltageOffsetSoc', ctypes.c_uint16),\n    ('UlvVoltageOffsetGfx', ctypes.c_uint16),\n    ('UlvSmnclkDid', ctypes.c_ubyte),\n    ('UlvMp1clkDid', ctypes.c_ubyte),\n    ('UlvGfxclkBypass', ctypes.c_ubyte),\n    ('Padding234', ctypes.c_ubyte),\n    ('MinVoltageGfx', ctypes.c_uint16),\n    ('MinVoltageSoc', ctypes.c_uint16),\n    ('MaxVoltageGfx', ctypes.c_uint16),\n    ('MaxVoltageSoc', ctypes.c_uint16),\n    ('LoadLineResistanceGfx', ctypes.c_uint16),\n    ('LoadLineResistanceSoc', ctypes.c_uint16),\n    ('DpmDescriptor', struct_DpmDescriptor_t * 11),\n    ('FreqTableGfx', ctypes.c_uint16 * 16),\n    ('FreqTableVclk', ctypes.c_uint16 * 8),\n    ('FreqTableDclk', ctypes.c_uint16 * 8),\n    ('FreqTableEclk', ctypes.c_uint16 * 8),\n    ('FreqTableSocclk', ctypes.c_uint16 * 8),\n    ('FreqTableUclk', ctypes.c_uint16 * 4),\n    ('FreqTableFclk', ctypes.c_uint16 * 8),\n    ('FreqTableDcefclk', ctypes.c_uint16 * 8),\n    ('FreqTableDispclk', ctypes.c_uint16 * 8),\n    ('FreqTablePixclk', ctypes.c_uint16 * 8),\n    ('FreqTablePhyclk', ctypes.c_uint16 * 8),\n    ('DcModeMaxFreq', ctypes.c_uint16 * 11),\n    ('Padding8_Clks', ctypes.c_uint16),\n    ('Mp0clkFreq', ctypes.c_uint16 * 2),\n    ('Mp0DpmVoltage', ctypes.c_uint16 * 2),\n    ('GfxclkFidle', ctypes.c_uint16),\n    ('GfxclkSlewRate', ctypes.c_uint16),\n    ('CksEnableFreq', ctypes.c_uint16),\n    ('Padding789', ctypes.c_uint16),\n    ('CksVoltageOffset', struct_QuadraticInt_t),\n    ('Padding567', ctypes.c_ubyte * 4),\n    ('GfxclkDsMaxFreq', ctypes.c_uint16),\n    ('GfxclkSource', ctypes.c_ubyte),\n    ('Padding456', ctypes.c_ubyte),\n    ('LowestUclkReservedForUlv', ctypes.c_ubyte),\n    ('Padding8_Uclk', ctypes.c_ubyte * 3),\n    ('PcieGenSpeed', ctypes.c_ubyte * 2),\n    ('PcieLaneCount', ctypes.c_ubyte * 2),\n    ('LclkFreq', ctypes.c_uint16 * 2),\n    ('EnableTdpm', ctypes.c_uint16),\n    ('TdpmHighHystTemperature', ctypes.c_uint16),\n    ('TdpmLowHystTemperature', ctypes.c_uint16),\n    ('GfxclkFreqHighTempLimit', ctypes.c_uint16),\n    ('FanStopTemp', ctypes.c_uint16),\n    ('FanStartTemp', ctypes.c_uint16),\n    ('FanGainEdge', ctypes.c_uint16),\n    ('FanGainHotspot', ctypes.c_uint16),\n    ('FanGainLiquid', ctypes.c_uint16),\n    ('FanGainVrGfx', ctypes.c_uint16),\n    ('FanGainVrSoc', ctypes.c_uint16),\n    ('FanGainPlx', ctypes.c_uint16),\n    ('FanGainHbm', ctypes.c_uint16),\n    ('FanPwmMin', ctypes.c_uint16),\n    ('FanAcousticLimitRpm', ctypes.c_uint16),\n    ('FanThrottlingRpm', ctypes.c_uint16),\n    ('FanMaximumRpm', ctypes.c_uint16),\n    ('FanTargetTemperature', ctypes.c_uint16),\n    ('FanTargetGfxclk', ctypes.c_uint16),\n    ('FanZeroRpmEnable', ctypes.c_ubyte),\n    ('FanTachEdgePerRev', ctypes.c_ubyte),\n    ('FuzzyFan_ErrorSetDelta', ctypes.c_int16),\n    ('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),\n    ('FuzzyFan_PwmSetDelta', ctypes.c_int16),\n    ('FuzzyFan_Reserved', ctypes.c_uint16),\n    ('OverrideAvfsGb', ctypes.c_ubyte * 2),\n    ('Padding8_Avfs', ctypes.c_ubyte * 2),\n    ('qAvfsGb', struct_QuadraticInt_t * 2),\n    ('dBtcGbGfxCksOn', struct_DroopInt_t),\n    ('dBtcGbGfxCksOff', struct_DroopInt_t),\n    ('dBtcGbGfxAfll', struct_DroopInt_t),\n    ('dBtcGbSoc', struct_DroopInt_t),\n    ('qAgingGb', struct_LinearInt_t * 2),\n    ('qStaticVoltageOffset', struct_QuadraticInt_t * 2),\n    ('DcTol', ctypes.c_uint16 * 2),\n    ('DcBtcEnabled', ctypes.c_ubyte * 2),\n    ('Padding8_GfxBtc', ctypes.c_ubyte * 2),\n    ('DcBtcMin', ctypes.c_int16 * 2),\n    ('DcBtcMax', ctypes.c_uint16 * 2),\n    ('XgmiLinkSpeed', ctypes.c_ubyte * 2),\n    ('XgmiLinkWidth', ctypes.c_ubyte * 2),\n    ('XgmiFclkFreq', ctypes.c_uint16 * 2),\n    ('XgmiUclkFreq', ctypes.c_uint16 * 2),\n    ('XgmiSocclkFreq', ctypes.c_uint16 * 2),\n    ('XgmiSocVoltage', ctypes.c_uint16 * 2),\n    ('DebugOverrides', ctypes.c_uint32),\n    ('ReservedEquation0', struct_QuadraticInt_t),\n    ('ReservedEquation1', struct_QuadraticInt_t),\n    ('ReservedEquation2', struct_QuadraticInt_t),\n    ('ReservedEquation3', struct_QuadraticInt_t),\n    ('MinVoltageUlvGfx', ctypes.c_uint16),\n    ('MinVoltageUlvSoc', ctypes.c_uint16),\n    ('MGpuFanBoostLimitRpm', ctypes.c_uint16),\n    ('padding16_Fan', ctypes.c_uint16),\n    ('FanGainVrMem0', ctypes.c_uint16),\n    ('FanGainVrMem1', ctypes.c_uint16),\n    ('DcBtcGb', ctypes.c_uint16 * 2),\n    ('Reserved', ctypes.c_uint32 * 11),\n    ('Padding32', ctypes.c_uint32 * 3),\n    ('MaxVoltageStepGfx', ctypes.c_uint16),\n    ('MaxVoltageStepSoc', ctypes.c_uint16),\n    ('VddGfxVrMapping', ctypes.c_ubyte),\n    ('VddSocVrMapping', ctypes.c_ubyte),\n    ('VddMem0VrMapping', ctypes.c_ubyte),\n    ('VddMem1VrMapping', ctypes.c_ubyte),\n    ('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('SocUlvPhaseSheddingMask', ctypes.c_ubyte),\n    ('ExternalSensorPresent', ctypes.c_ubyte),\n    ('Padding8_V', ctypes.c_ubyte),\n    ('GfxMaxCurrent', ctypes.c_uint16),\n    ('GfxOffset', ctypes.c_byte),\n    ('Padding_TelemetryGfx', ctypes.c_ubyte),\n    ('SocMaxCurrent', ctypes.c_uint16),\n    ('SocOffset', ctypes.c_byte),\n    ('Padding_TelemetrySoc', ctypes.c_ubyte),\n    ('Mem0MaxCurrent', ctypes.c_uint16),\n    ('Mem0Offset', ctypes.c_byte),\n    ('Padding_TelemetryMem0', ctypes.c_ubyte),\n    ('Mem1MaxCurrent', ctypes.c_uint16),\n    ('Mem1Offset', ctypes.c_byte),\n    ('Padding_TelemetryMem1', ctypes.c_ubyte),\n    ('AcDcGpio', ctypes.c_ubyte),\n    ('AcDcPolarity', ctypes.c_ubyte),\n    ('VR0HotGpio', ctypes.c_ubyte),\n    ('VR0HotPolarity', ctypes.c_ubyte),\n    ('VR1HotGpio', ctypes.c_ubyte),\n    ('VR1HotPolarity', ctypes.c_ubyte),\n    ('Padding1', ctypes.c_ubyte),\n    ('Padding2', ctypes.c_ubyte),\n    ('LedPin0', ctypes.c_ubyte),\n    ('LedPin1', ctypes.c_ubyte),\n    ('LedPin2', ctypes.c_ubyte),\n    ('padding8_4', ctypes.c_ubyte),\n    ('PllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('PllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('PllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('UclkSpreadEnabled', ctypes.c_ubyte),\n    ('UclkSpreadPercent', ctypes.c_ubyte),\n    ('UclkSpreadFreq', ctypes.c_uint16),\n    ('FclkSpreadEnabled', ctypes.c_ubyte),\n    ('FclkSpreadPercent', ctypes.c_ubyte),\n    ('FclkSpreadFreq', ctypes.c_uint16),\n    ('FllGfxclkSpreadEnabled', ctypes.c_ubyte),\n    ('FllGfxclkSpreadPercent', ctypes.c_ubyte),\n    ('FllGfxclkSpreadFreq', ctypes.c_uint16),\n    ('I2cControllers', struct_I2cControllerConfig_t * 7),\n    ('BoardReserved', ctypes.c_uint32 * 10),\n    ('MmHubPadding', ctypes.c_uint32 * 8),\n]\n\nstruct__ATOM_VEGA20_POWERPLAYTABLE._pack_ = 1 # source:False\nstruct__ATOM_VEGA20_POWERPLAYTABLE._fields_ = [\n    ('sHeader', struct_atom_common_table_header),\n    ('ucTableRevision', ctypes.c_ubyte),\n    ('usTableSize', ctypes.c_uint16),\n    ('ulGoldenPPID', ctypes.c_uint32),\n    ('ulGoldenRevision', ctypes.c_uint32),\n    ('usFormatID', ctypes.c_uint16),\n    ('ulPlatformCaps', ctypes.c_uint32),\n    ('ucThermalControllerType', ctypes.c_ubyte),\n    ('usSmallPowerLimit1', ctypes.c_uint16),\n    ('usSmallPowerLimit2', ctypes.c_uint16),\n    ('usBoostPowerLimit', ctypes.c_uint16),\n    ('usODTurboPowerLimit', ctypes.c_uint16),\n    ('usODPowerSavePowerLimit', ctypes.c_uint16),\n    ('usSoftwareShutdownTemp', ctypes.c_uint16),\n    ('PowerSavingClockTable', ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD),\n    ('OverDrive8Table', ATOM_VEGA20_OVERDRIVE8_RECORD),\n    ('usReserve', ctypes.c_uint16 * 5),\n    ('smcPPTable', struct_PPTable_t),\n]\n\nATOM_Vega20_POWERPLAYTABLE = struct__ATOM_VEGA20_POWERPLAYTABLE\n__all__ = \\\n    ['ATOM_VEGA20_ODFEATURE_COUNT',\n    'ATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT',\n    'ATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN',\n    'ATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL',\n    'ATOM_VEGA20_ODFEATURE_GFXCLK_CURVE',\n    'ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS', 'ATOM_VEGA20_ODFEATURE_ID',\n    'ATOM_VEGA20_ODFEATURE_MAX_COUNT',\n    'ATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE',\n    'ATOM_VEGA20_ODFEATURE_POWER_LIMIT',\n    'ATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN',\n    'ATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM',\n    'ATOM_VEGA20_ODFEATURE_UCLK_MAX', 'ATOM_VEGA20_ODSETTING_COUNT',\n    'ATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT',\n    'ATOM_VEGA20_ODSETTING_FANRPMMIN',\n    'ATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE',\n    'ATOM_VEGA20_ODSETTING_GFXCLKFMAX',\n    'ATOM_VEGA20_ODSETTING_GFXCLKFMIN', 'ATOM_VEGA20_ODSETTING_ID',\n    'ATOM_VEGA20_ODSETTING_MAX_COUNT',\n    'ATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX',\n    'ATOM_VEGA20_ODSETTING_POWERPERCENTAGE',\n    'ATOM_VEGA20_ODSETTING_UCLKFMAX',\n    'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1',\n    'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2',\n    'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3',\n    'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1',\n    'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2',\n    'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3',\n    'ATOM_VEGA20_OVERDRIVE8_RECORD',\n    'ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD',\n    'ATOM_VEGA20_PPCLOCK_COUNT', 'ATOM_VEGA20_PPCLOCK_DCEFCLK',\n    'ATOM_VEGA20_PPCLOCK_DCLK', 'ATOM_VEGA20_PPCLOCK_DISPCLK',\n    'ATOM_VEGA20_PPCLOCK_ECLK', 'ATOM_VEGA20_PPCLOCK_FCLK',\n    'ATOM_VEGA20_PPCLOCK_GFXCLK', 'ATOM_VEGA20_PPCLOCK_ID',\n    'ATOM_VEGA20_PPCLOCK_MAX_COUNT', 'ATOM_VEGA20_PPCLOCK_PHYCLK',\n    'ATOM_VEGA20_PPCLOCK_PIXCLK', 'ATOM_VEGA20_PPCLOCK_SOCCLK',\n    'ATOM_VEGA20_PPCLOCK_UCLK', 'ATOM_VEGA20_PPCLOCK_VCLK',\n    'ATOM_VEGA20_PP_PLATFORM_CAP_BACO',\n    'ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO',\n    'ATOM_VEGA20_PP_PLATFORM_CAP_ENABLESHADOWPSTATE',\n    'ATOM_VEGA20_PP_PLATFORM_CAP_HARDWAREDC',\n    'ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY',\n    'ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',\n    'ATOM_VEGA20_PP_THERMALCONTROLLER_NONE',\n    'ATOM_VEGA20_PP_THERMALCONTROLLER_VEGA20',\n    'ATOM_VEGA20_TABLE_REVISION_VEGA20', 'ATOM_Vega20_POWERPLAYTABLE',\n    '_VEGA20_PPTABLE_H_', 'struct_DpmDescriptor_t',\n    'struct_DroopInt_t', 'struct_I2cControllerConfig_t',\n    'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',\n    'struct__ATOM_VEGA20_OVERDRIVE8_RECORD',\n    'struct__ATOM_VEGA20_POWERPLAYTABLE',\n    'struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD',\n    'struct_atom_common_table_header']\n"
  },
  {
    "path": "src/upp/decode.py",
    "content": "import codecs\nimport struct\nimport ctypes\n\nfrom upp.atom_gen import atombios\nfrom collections import OrderedDict\nfrom importlib import import_module\n\n# These two used to be imported from drivers/gpu/drm/amd/amdgpu/atom.h, but\n# from kernel v 6.6 the ATOM_ROM_PART_NUMBER_PTR got removed, so harcoding them\nrom_tbl_ptr = 0x48\npart_num_ptr = 0x6e\n\ncommon_hdr = atombios.struct__ATOM_COMMON_TABLE_HEADER\nmaster_dt_tbl_struct = atombios.struct__ATOM_MASTER_DATA_TABLE\natom_rom_header = atombios.struct__ATOM_ROM_HEADER\natom_rom_header_v2 = atombios.struct__ATOM_ROM_HEADER_V2_1\nleagcy_vrom_offset = 0x40000\n\n# Base ctypes variables, in order to distinguish from structures and arrays\nprimitives = [\n    ctypes.c_byte, ctypes.c_ubyte,\n    ctypes.c_int16, ctypes.c_uint16,\n    ctypes.c_int32, ctypes.c_uint32,\n    ctypes.c_float\n]\n\n# Defined as uint in kernel, but in reality these are float\nfloat_fields = ['a', 'b', 'c', 'm',\n                'VcBtcPsmA', 'VcBtcPsmB', 'VcBtcVminA', 'VcBtcVminB',\n                'DfllBtcMasterScalerM', 'DfllBtcSlaveScalerM',\n                'DfllBtcMasterScalerB', 'DfllBtcSlaveScalerB',\n                'DvoPsmDownThresholdVoltage', 'DvoPsmUpThresholdVoltage',\n                'DvoFmaxLowScaler', 'DcsPfGfxFopt', 'DcsPfUclkFopt',\n                'CacEdcCacLeakageC0', 'CacEdcCacLeakageC1',\n                'CacEdcCacLeakageC2', 'CacEdcCacLeakageC3',\n                'CacEdcCacLeakageC4', 'CacEdcCacLeakageC5',\n                'CacEdcCac_m', 'CacEdcCac_b', 'XVmin_Gfx_EdcThreshScalar',\n                'XVmin_Soc_EdcThreshScalar'\n                ]\n\nfloat_array_patterns = ['Fset', 'Vdroop', 'VcBtcPsm',\n                        'VcBtcVminA', 'VcBtcVminB', 'Droop_'\n                        ]\n\n\ndef odict(init_data=None):\n    \"\"\"\n    Returns ordered dictionary (for consistent behavior on Python 2.7 & 3.6+)\n    \"\"\"\n    if init_data:\n        return OrderedDict(init_data)\n    else:\n        return OrderedDict()\n\n\ndef _read_binary_file(filename):\n    f = open(filename, 'rb')\n    raw_data = f.read()\n    f.close()\n    return bytearray(raw_data)\n\n\ndef _write_binary_file(filename, raw_data):\n    try:\n        f = open(filename, 'wb')\n        f.write(raw_data)\n        f.close()\n    except PermissionError as e:\n        msg = 'ERROR: {}\\n' + \\\n              'To make PowerPlay table file writable: sudo chmod o+w {}'\n        print(msg.format(e, filename, filename))\n        print(e)\n\n\ndef _bytes2hex(bytes):\n    \"\"\"\n    Hex decoding helper\n\n    Does special gymnastics to ensure consistent decoding on Python 2.7 & 3.x\n    \"\"\"\n    return codecs.encode(bytes, 'hex_codec').decode()\n\n\ndef _checksum(rom_bytes):\n    checksum = 0\n    checksum_bytes_length = rom_bytes[0x2] * 512\n    for byte in rom_bytes[:checksum_bytes_length]:\n        checksum += byte\n    checksum = checksum & 0xff\n\n    return checksum\n\n\ndef _rom_info(vrom_file):\n    \"\"\"\n    Displays the VROM image info and returns PowerPlay table offset and size\n\n    Returns:\n    pp_offset, pp_length (tuple): pp_offset (int): pp table offset in vROM\n                                   pp_length (int): pp table length\n\n    \"\"\"\n\n    rom_bytes = _read_binary_file(vrom_file)\n\n    # VROM magic validation\n    rom_magic_bytes = rom_bytes[:2]\n    rom_magic_str = _bytes2hex(rom_magic_bytes).upper()\n    rom_offset = 0\n\n    # Since Navi 3x the UEFI VBIOS comes first, the legacy VBIOS is at 0x40000\n    if rom_magic_str == 'AA55':\n        rom_offset = leagcy_vrom_offset\n        msg = 'UEFIU video ROM magic detected: {}, using legacy VBIOS ' + \\\n              'at offset 0x{:X}'\n        print(msg.format(rom_magic_str, rom_offset))\n        rom_bytes = rom_bytes[rom_offset:]\n        rom_magic_bytes = rom_bytes[:2]\n        rom_magic_str = _bytes2hex(rom_magic_bytes).upper()\n\n    if rom_magic_str != '55AA':\n        err_msg = 'Invalid Video ROM magic: {}, must be 55AA'\n        print(err_msg.format(rom_magic_str))\n        return None, None\n\n    # Fetching ATOM 'Common Table'\n    rom_tbl_offset_bytes = rom_bytes[rom_tbl_ptr:rom_tbl_ptr+2]\n    rom_tbl_offset = struct.unpack('<H', rom_tbl_offset_bytes)[0]\n\n    rom_tbl_header_bytes = rom_bytes[rom_tbl_offset:rom_tbl_offset+5]\n    rom_tbl_header = common_hdr.from_buffer(rom_tbl_header_bytes)\n    rom_tbl_rev = rom_tbl_header.ucTableFormatRevision\n    rom_tbl_len = rom_tbl_header.usStructureSize\n\n    rom_tbl_bytes = rom_bytes[rom_tbl_offset:rom_tbl_offset+rom_tbl_len]\n\n    if rom_tbl_rev == 1:\n        rom_tbl = atom_rom_header.from_buffer(rom_tbl_bytes)\n    elif rom_tbl_rev == 2:\n        rom_tbl = atom_rom_header_v2.from_buffer(rom_tbl_bytes)\n    else:\n        err_msg = 'Can not handle ATOM Common Table revision {}'\n        print(err_msg.format(rom_tbl_rev))\n        return None, None\n\n    print('Found ATOM Common Table rev. {}'.format(rom_tbl_rev))\n\n    rom_signature = bytearray(rom_tbl.uaFirmWareSignature).decode()\n    if rom_signature != 'ATOM':\n        err_msg = 'Invalid Video ROM signature: \"{}\", must match \"ATOM\".'\n        print(err_msg.format(rom_signature))\n        return None, None\n\n    # Dump some VROM info\n    rom_partn_offset_bytes = rom_bytes[part_num_ptr:part_num_ptr+2]\n    rom_partn_offset = struct.unpack('<H', rom_partn_offset_bytes)[0]\n    boot_msg_offset = rom_tbl.usBIOS_BootupMessageOffset\n    cfg_file_offset = rom_tbl.usConfigFilenameOffset\n    crc_blck_offset = rom_tbl.usCRC_BlockOffset\n\n    part_info = rom_bytes[rom_partn_offset:boot_msg_offset-1].split(b'\\x00')\n    boot_msgs = rom_bytes[boot_msg_offset:rom_tbl_offset-1].split(b'\\x00')\n    chksm = rom_bytes[0x21:0x22]\n    crc32 = rom_bytes[crc_blck_offset:crc_blck_offset+4]\n\n    print('Video ROM information:\\n')\n    for msg in part_info + boot_msgs:\n        if msg:\n            print('  ' + msg.decode().strip('\\r\\n'))\n    print('')\n    print('CHKSUM: 0x{} (off by {}), CRC: 0x{}'.format(chksm.hex().upper(),\n                                                       _checksum(rom_bytes),\n                                                       crc32.hex().upper()))\n\n    # Fetching 'Master Data Table'\n    master_dt_tbl_ofst = rom_tbl.usMasterDataTableOffset\n\n    msg = 'Looking into MasterDataTable at offset 0x{:04X}'\n    print(msg.format(master_dt_tbl_ofst))\n\n    master_dt_hdr_bytes = rom_bytes[master_dt_tbl_ofst:master_dt_tbl_ofst+5]\n    master_dt_tbl_header = common_hdr.from_buffer(master_dt_hdr_bytes)\n    master_dt_tbl_len = master_dt_tbl_header.usStructureSize\n    master_dt_tbl_end = master_dt_tbl_ofst + master_dt_tbl_len\n    master_dt_tbl_bytes = rom_bytes[master_dt_tbl_ofst:master_dt_tbl_end]\n    master_dt_tbl = master_dt_tbl_struct.from_buffer(master_dt_tbl_bytes)\n\n    # Fetching 'PowerPlayInfo' table\n    pp_tbl_offset = master_dt_tbl.ListOfDataTables.PowerPlayInfo\n\n    # TODO: For The PowerPlayInfo table offset info on RDNA3+ VBIOS is not at\n    # expected place. It seems to be right after $PS1xx magic. Investigate...\n    ps1_grimoire = {\n        'RDNA3': (b'\\x24\\x50\\x53\\x31\\x50\\x15'),  # $PS1P\u0015\n        'RDNA4': (b'\\x24\\x50\\x53\\x31\\xe0\\x16'),  # $PS1à\u0016\n    }\n\n    if (rom_offset != 0 and pp_tbl_offset == 0):\n        print('Invalid PowerPlayInfo offset, checking for $PS1 magic...')\n        ps1_magic_offset = 0\n        for card_gen, ps1_magic in ps1_grimoire.items():\n            ps1_magic_offset = rom_bytes.find(ps1_magic)\n            if ps1_magic_offset > 0:\n                print('Found {} $PS1 magic at offset 0x{:X}'.format(card_gen,\n                      rom_offset + ps1_magic_offset))\n                break\n        if ps1_magic_offset > 0:\n            pp_tbl_offset = ps1_magic_offset + 0x110\n        else:\n            print('ERROR: Can not find PowerPlay table :(')\n            return 0, 0\n\n    msg = 'Looking into PowerPlayInfo at offset 0x{:04X}'\n    print(msg.format(rom_offset + pp_tbl_offset))\n\n    pp_tbl_header_bytes = rom_bytes[pp_tbl_offset:pp_tbl_offset+5]\n    pp_tbl_header = common_hdr.from_buffer(pp_tbl_header_bytes)\n    pp_tbl_len = pp_tbl_header.usStructureSize\n\n    msg = 'Found {} bytes long PowerPlayInfo table v{}.{} at offset 0x{:04X}'\n    print(msg.format(pp_tbl_len, pp_tbl_header.ucTableFormatRevision,\n                     pp_tbl_header.ucTableContentRevision,\n                     rom_offset + pp_tbl_offset))\n\n    return rom_offset + pp_tbl_offset, pp_tbl_len\n\n\ndef extract_rom(vrom_file, out_pp_file):\n    \"\"\"\n    Extracts PowerPlay table from VROM image\n    \"\"\"\n\n    pp_tbl_offset, pp_tbl_len = _rom_info(vrom_file)\n    if not pp_tbl_offset:\n        return None\n    rom_bytes = _read_binary_file(vrom_file)\n    pp_tbl = rom_bytes[pp_tbl_offset:pp_tbl_offset+pp_tbl_len]\n\n    print('Saving PowerPlay table to {}'.format(out_pp_file))\n    _write_binary_file(out_pp_file, pp_tbl)\n\n\ndef inject_pp_table(input_rom, output_rom, pp_bin_file):\n    \"\"\"\n    Injects PowerPlay table into VROM image\n    \"\"\"\n\n    pp_tbl_offset, pp_tbl_len = _rom_info(input_rom)\n    if not pp_tbl_offset:\n        return None\n    pp_bytes = _read_binary_file(pp_bin_file)\n    if len(pp_bytes) != pp_tbl_len:\n        msg = 'ERROR: The length of {} PowerPlay table must match the ' + \\\n              'length of PowerPlay table in {} vROM image ({} bytes)'\n        print(msg.format(pp_bin_file, input_rom, pp_tbl_len))\n        return None\n    rom_bytes = _read_binary_file(input_rom)\n    print('Replacing PowerPlay data...')\n    rom_bytes[pp_tbl_offset:pp_tbl_offset+pp_tbl_len] = pp_bytes\n    new_checksum = _checksum(rom_bytes)\n    print('Shifting checksum by {}...'.format(new_checksum))\n    rom_bytes[0x21] = (rom_bytes[0x21] - new_checksum) & 0xff\n    _write_binary_file(output_rom, rom_bytes)\n\n    return True\n\n\ndef validate_pp(header, rawbytes, rawdump):\n    \"\"\"\n    Validates PowerPlay master table header\n    \"\"\"\n\n    pp_frev = header.ucTableFormatRevision\n    pp_crev = header.ucTableContentRevision\n    pp_len = header.usStructureSize\n    rw_len = len(rawbytes)\n\n    if pp_len != rw_len and pp_frev in [20, 21, 22] and rw_len == 4095:\n        msg = 'WARNING: Trying to work around rev {}.{} table truncated ' + \\\n              'at 0x{:04x}, setting all missing values to zeroes.'\n        print(msg.format(pp_frev, pp_crev, rw_len))\n        rawbytes.extend(bytearray(pp_len-rw_len))\n        rw_len = len(rawbytes)\n    if pp_len != rw_len:\n        msg = 'ERROR: Header length ({}) differs from file length ({}). ' + \\\n              'Is this a valid PowerPlay table?'\n        print(msg.format(pp_len, rw_len))\n        return None\n    if rawdump:\n        msg = 'PowerPlay table rev {}.{} size {} bytes'\n        print(msg.format(pp_frev, pp_crev, pp_len))\n    return pp_frev, pp_crev\n\n\ndef decode_pp_table(rawdata, c_struct):\n    \"\"\"\n    De-serializes PowerPlay binary data into a ctypes structure\n    \"\"\"\n\n    return c_struct.from_buffer(rawdata)\n\n\ndef _get_bigcap_indices(string):\n    \"\"\"\n    Returns list of positions in a string where separate words start\n\n    PowerPlay sub-tables have names like 'VddcLookupTable', 'VCEStateTable' or\n    'PCIETable'. We need to split this into separate words, but some words are\n    upper-caps acronyms, followed by another word starting with upper-cap.\n    Here we do special gymnastics to return the starting position of all words.\n    \"\"\"\n\n    indices = []\n    i = 0\n    while i < len(string)-1:  # yes, finish with 2nd last char in the string\n        is_i_big = True if string[i].isupper() else False\n        is_i_plus1_big = True if string[i+1].isupper() else False\n        is_i_plus1_small = not is_i_plus1_big\n        if is_i_big:\n            if (is_i_plus1_small and i not in indices) or i == 0:\n                indices.append(i)\n        else:\n            if is_i_plus1_big:\n                indices.append(i+1)\n        i = i + 1\n\n    return indices\n\n\ndef _print_raw_value(offset, symbol, rawbytes, name, desc, value):\n    hexval = _bytes2hex(rawbytes)\n    raw_msg = ' 0x{:04x} ({:04n}) {} {:>8} {:42s}:{: n}'\n    # Polaris variable names have small-caps prefixes that we don't want\n    big_caps = _get_bigcap_indices(name)\n    if big_caps:\n        name = name[big_caps[0]:]\n    if desc:\n        name = name + ' ' + desc\n    print(raw_msg.format(offset, offset, symbol, hexval, name, value))\n\n\ndef _get_ofst_cstruct(module, name, header_bytes, debug=False):\n    \"\"\"\n    Resolves C structure name and its size from parent table's name\n\n    For Polaris and Vega 10 generations of GPUs Linux kernel ATOM BIOS C data\n    structures points to nested child sub-tables using relative pointers.\n    Which table is behind which pointer can only be guessed by a table name in\n    the master PowerPlay tables. Furthermore, some nested tables come in\n    few different versions, depending on particular GPU chip. This function\n    implements logic that does this guess game, some table versioning logic as\n    well as nested tables size calculation. Finally, it has some workarounds\n    for semi-broken (or just very unusual) fields in some nested tables.\n\n    Parameters:\n    module (string): Points to cstruct module defining data structures for the\n                     appropriate generation of GPUs\n    name (string): Name of the child table used for data structure resolution\n    header_bytes (bytearray): A 2-byte array where 1st byte contains the nested\n                              table revision id and 2nd byte number of entries\n    debug (bool): Debugging output enabled\n\n    Returns:\n    cs, total_len (tuple): cs (class): resolved C structure\n                           total_len (int): structure's data length in bytes\n\n    \"\"\"\n\n    cs = None\n    total_len = 0\n    revid = struct.unpack('B', header_bytes[:1])[0]\n    pp_module = import_module(module)\n    module_suffix = '.'.join(module.split('.')[-2:])\n    if module_suffix == 'atom_gen.pptable_v1_0':\n        family = 'Tonga'\n    elif module_suffix == 'atom_gen.vega10_pptable':\n        family = 'Vega10'\n    else:\n        print('ERROR: Module {} does not contain jump structures.', module)\n        return cs, total_len\n\n    # A helper for translating table names into resolvable ctype identifiers\n    def resolve_cstruct(name, family=family):\n        big_caps = _get_bigcap_indices(name)\n        words = []\n        for big_letter in big_caps:\n            i = big_caps.index(big_letter)\n            last = None if big_letter == big_caps[-1] else big_caps[i+1]\n            word = name[big_letter:last]\n            if word.endswith('clk'):\n                word = word.upper()\n            if word.startswith('Vdd'):\n                word = 'Voltage'\n            if word == 'PPM':\n                word = 'PowerTune'\n            elif word == 'Tune':  # 'Power' + 'Tune' -> 'PowerTune'\n                words[-1] = words[-1] + word\n            elif word == 'Clk':   # 'Disp' + 'Clk' -> 'DISPCLK'\n                words[-1] = words[-1].upper() + word.upper()\n            else:\n                words.append(word)\n        ext_cstruct = '_'.join(['ATOM', family] + words)\n        if debug:\n            print('DEBUG: Resolved external struct \"{}\"'.format(ext_cstruct),\n                  'from \"{}\"'.format(family), 'family and', words, 'keywords')\n        return ext_cstruct\n\n    # These are the 'simple' version-less tables that don't depend on GPU gen.\n    simple_tables = [\n        'StateArray', 'ThermalController', 'MclkDependencyTable',\n        'SocclkDependencyTable', 'DcefclkDependencyTable',\n        'VddgfxLookupTable', 'VddcLookupTable', 'VddmemLookupTable',\n        'VddciLookupTable', 'PixclkDependencyTable', 'DispClkDependencyTable',\n        'PhyClkDependencyTable', 'MMDependencyTable', 'HardLimitTable',\n        'VCEStateTable', 'GPIOTable'\n    ]\n\n    if name in simple_tables:\n        cs = getattr(pp_module, resolve_cstruct(name))\n\n    # The rest are 'complex' tables, that may have versions and suffixes\n    elif name == 'SclkDependencyTable':  # ATOM_Polaris_SCLK_Dependency_Table\n        cs = getattr(pp_module, resolve_cstruct(name, 'Polaris'))\n    elif name == 'GfxclkDependencyTable':\n        # This by default points to ATOM_Vega10_GFXCLK_Dependency_Record but it\n        # needs override to ATOM_Vega10_GFXCLK_Dependency_Record_V2 for rev > 0\n        if revid in [0, 1]:              # ATOM_Vega10_GFXCLK_Dependency_Table\n            cs = getattr(pp_module, resolve_cstruct(name))\n            entries_class = cs._fields_[-1][-1]\n            entry_name, entry_type = cs._fields_[-1]\n            assert entry_type._length_ == 0\n            if revid == 0:\n                record_struct = 'ATOM_Vega10_GFXCLK_Dependency_Record'\n            else:\n                record_struct = 'ATOM_Vega10_GFXCLK_Dependency_Record_V2'\n            entry_type = getattr(pp_module, record_struct)\n\n            class FixedEntriesTypeArray(ctypes.LittleEndianStructure):\n                _pack_ = cs._pack_\n                _fields_ = cs._fields_[:-1] + [(entry_name, entry_type * 1)]\n\n            cs = FixedEntriesTypeArray\n        else:\n            cs = getattr(pp_module, resolve_cstruct(name))\n    elif name == 'FanTable':\n        if revid == 8:                   # ATOM_Tonga_Fan_Table (v8)\n            cs = getattr(pp_module, resolve_cstruct(name))\n        elif revid == 9:                 # ATOM_Polaris_Fan_Table (v9)\n            cs = getattr(pp_module, resolve_cstruct(name, 'Polaris'))\n        elif revid == 10:                # ATOM_Vega10_Fan_Table (v10)\n            cs = getattr(pp_module, resolve_cstruct(name))\n        elif revid == 11:                # ATOM_Vega10_Fan_Table_V2 (v11)\n            cs = getattr(pp_module, resolve_cstruct(name) + '_V2')\n        else:                            # ATOM_Vega10_Fan_Table_V3 (v12+)\n            cs = getattr(pp_module, resolve_cstruct(name) + '_V3')\n    elif name == 'PCIETable':\n        if revid == 1:                   # ATOM_Polaris10_PCIE_Table (v1)\n            cs = getattr(pp_module, resolve_cstruct(name, 'Polaris10'))\n        else:                            # ATOM_Vega10_PCIE_Table (v2)\n            cs = getattr(pp_module, resolve_cstruct(name))\n    elif name in 'PPMTable':             # ATOM_Tonga_PowerTune_Table (v1)\n        cs = getattr(pp_module, resolve_cstruct(name))\n    elif name in 'PowerTuneTable':\n        if revid == 4:                   # ATOM_Polaris_PowerTune_Table (v4)\n            cs = getattr(pp_module, resolve_cstruct(name, 'Polaris'))\n        elif revid == 5:                 # ATOM_Vega10_PowerTune_Table (v5)\n            cs = getattr(pp_module, resolve_cstruct(name))\n        elif revid == 6:                 # ATOM_Vega10_PowerTune_Table_V2 (v6)\n            cs = getattr(pp_module, resolve_cstruct(name) + '_V2')\n        else:                            # ATOM_Vega10_PowerTune_Table_V3 (v7+)\n            cs = getattr(pp_module, resolve_cstruct(name) + '_V3')\n    else:\n        print('ERROR: Unknown data structure {} v{}'.format(name, revid))\n        return cs, total_len\n\n    # Here we get the byte-length of the offset-ed C structures\n    if 'ucNumEntries' in cs._fields_[1]:\n        # Vega10 and older C structures all have number of entries set to 0, we\n        # override it with real value that we get from an actual pp_table data\n        entry_name, entry_type = cs._fields_[-1]\n        entry_count = struct.unpack('B', header_bytes[1:2])[0]\n\n        class FixedEntriesCountArray(ctypes.LittleEndianStructure):\n            _pack_ = cs._pack_\n            _fields_ = cs._fields_[:-1] + [(entry_name,\n                                            entry_type._type_ * entry_count)]\n\n        cs = FixedEntriesCountArray\n\n        # This workarounds the oddity of last field in ATOM_Vega10_State_Array\n        # being named 'states', yet all other C structs names it 'entries'\n        entries_field_name = cs._fields_[-1][0]\n        cs_entries = getattr(cs, entries_field_name)\n\n        entry_len = cs_entries.size\n        total_len = cs_entries.offset + cs_entries.size * entry_count\n\n    else:\n        total_len = 0\n        for field in cs._fields_:\n            if field[1] in primitives:\n                total_len += struct.calcsize(field[1]._type_)\n            else:\n                entry_len = struct.calcsize(field[1]._type_._type_)\n                array_size = field[1]._length_\n                total_len += entry_len * array_size\n    if debug:\n        print('DEBUG: Detected C structture of', len(cs._fields_),\n              'elements, total size of', total_len, 'bytes')\n\n    return cs, total_len\n\n\ndef build_data_tree(data, raw=None, decoded=None, parent_name='/',\n                    meta=None, rawdump=False, debug=False):\n    \"\"\"\n    Converts ctypes structure into tree-like ordered dictionary\n\n    This relies heavily on ATOM BIOS C structures extracted from Linux kernel,\n    where variable names as well as table and array structures are defined.\n\n    Parameters:\n    data (ctypes instance): Contains binary data that can be referenced by C\n                            variable names that has been decoded using ctypes\n                            from_buffer() call\n    raw (bytearray): Raw PowerPlay data buffer in bytearray format\n    decoded (OrderedDictdict): A special tree-like structure of nested ordered\n                               dictionaries that describes binary data\n                               structures containing PowerPlay parameters,\n                               used as parameter due to recursive nature of\n                               this function\n    parent_name (string): Reference to a parent of data-structure currently\n                          being processed, used for recursion\n    meta (dict): Containing 'size' and 'offset' keys, used for calculating\n                 offsets & sizes for PowerPlay sub-structure tables\n    rawdump (bool): Shows PowerPlay data in a table format showing offsets\n                    and hex values on a console instead of returning data dict\n    debug (bool): Debugging output enabled\n\n    Returns:\n    decoded (dict): A resulting PowerPlay data-structure in a dictionary form\n\n    \"\"\"\n\n    # Init decoded data dictionary\n    if decoded is None:\n        decoded = odict()\n        if rawdump:\n            print(' Offset (dec.) t Raw val. Variable name ' + ' '*24 +\n                  'Decoded value\\n' + '-'*78)\n\n    # Here we parse data items in C Arrays (all items are same type)\n    if issubclass(type(data), ctypes.Array):\n        d_size = meta['size'] // len(data)\n        d_offset = meta['ofs']\n        index = 0\n\n        # Base data types are parsed as is\n        if data._type_ in primitives:\n            d_symbol = data._type_._type_\n            for d_value in data:\n                d_bytes = d_value.to_bytes(d_size, 'little',\n                                           signed=(d_value < 0))\n                for float_match_substring in float_array_patterns:\n                    if float_match_substring in parent_name:\n                        d_symbol = 'f'\n                        d_value = struct.unpack(d_symbol, d_bytes)[0]\n                child_key = index\n                decoded[child_key] = {'value':  d_value,\n                                      'offset': d_offset,\n                                      'type':   d_symbol}\n                desc = ''\n                if 'desc' in meta and index < len(meta['desc']) - 1:\n                    desc = meta['desc'][index]\n                    decoded[child_key]['desc'] = desc\n                if rawdump:\n                    _print_raw_value(d_offset, d_symbol, d_bytes,\n                                     parent_name, desc, d_value)\n                d_offset += d_size\n                index += 1\n\n        # Other types are recursed back into this very same function\n        else:\n            for item in data:\n                if debug:\n                    msg = 'DEBUG: Recursive dive into \"{}\" array, element {}'\n                    print(msg.format(parent_name, index))\n                child_key = index\n                decoded[child_key] = odict()\n                r_meta = {'ofs': d_offset, 'size': d_size}\n                build_data_tree(item, raw, decoded[child_key], parent_name,\n                                r_meta, rawdump, debug)\n                if debug:\n                    msg = 'DEBUG: End of recursion into \"{}\"'\n                    print(msg.format(parent_name))\n                d_offset += d_size\n                index += 1\n\n    # Here we parse data items in C Structures\n    elif issubclass(type(data), ctypes.Structure):\n        for name, ctyp_cls in data._fields_:\n            d_value = getattr(data, name)\n            d_meta = getattr(type(data), name)\n            d_size = d_meta.size\n            if name.startswith(('uc', 'us', 'ul')):\n                name = name[2:]\n            if 'ofs' not in meta:\n                d_offset = d_meta.offset\n            else:\n                d_offset = meta['ofs'] + d_meta.offset\n\n            # Base types parsed as is, exception are floats & offset tables\n            if ctyp_cls in primitives:\n                d_symbol = ctyp_cls._type_\n                d_size = d_meta.size\n                if ctyp_cls._type_ in ['b', 'h']:\n                    d_bytes = d_value.to_bytes(d_size, 'little', signed=True)\n                else:\n                    d_bytes = d_value.to_bytes(d_size, 'little')\n                if ctyp_cls == ctypes.c_uint and name in float_fields:\n                    d_symbol = 'f'\n                    d_value = struct.unpack(d_symbol, d_bytes)[0]\n                if rawdump:\n                    _print_raw_value(d_offset, d_symbol, d_bytes,\n                                     name, '', d_value)\n                # Check if this is a pointer to an offset-ed table:\n                if not name.endswith(('ArrayOffset',\n                                      'TableOffset',\n                                      'ControllerOffset')):\n                    decoded[name] = {'value':  d_value,\n                                     'offset': d_offset,\n                                     'type':   d_symbol}\n                # This part parses legacy offset-ed tables (Polaris, Vega10)\n                else:\n                    name = name[:-6]\n                    ofst = d_value\n                    if not ofst:\n                        decoded[name] = None\n                        if debug:\n                            print('DEBUG: Table', name, 'points to 0, ignore')\n                    else:\n                        c_struct, size = _get_ofst_cstruct(data.__module__,\n                                                           name,\n                                                           raw[ofst:ofst+2],\n                                                           debug)\n                        if c_struct:\n                            top = ofst + size\n                            array_data = c_struct.from_buffer(raw[:top], ofst)\n                            r_meta = {'ofs': ofst, 'size': size}\n                            if debug:\n                                msg = 'DEBUG: Recursive jump at offset ' + \\\n                                      '{} into \"{}\"'\n                                print(msg.format(ofst, name))\n                            decoded[name] = odict()\n                            build_data_tree(array_data, raw, decoded[name],\n                                            name, r_meta, rawdump, debug)\n                            if debug:\n                                msg = 'DEBUG: End of recursion into \"{}\"'\n                                print(msg.format(name))\n\n            # Other types are recursed back into this very same function\n            else:\n                if debug:\n                    msg = 'DEBUG: Recursive dive from {} struct into \"{}\"'\n                    print(msg.format(parent_name, name))\n                r_meta = {'ofs': d_offset, 'size': d_size}\n                if 'enum' in meta:\n                    if name in meta['enum']:\n                        r_meta['enum'] = {name: meta['enum'][name]}\n                    if parent_name in meta['enum'] and name in ['min', 'max']:\n                        r_meta['desc'] = meta['enum'][parent_name]['enum']\n                    if parent_name in meta['enum'] and name in ['cap']:\n                        r_meta['desc'] = meta['enum'][parent_name]['cap']\n\n                decoded[name] = odict()\n                build_data_tree(d_value, raw, decoded[name], name, r_meta,\n                                rawdump, debug)\n                if debug:\n                    print('DEBUG: End of recursion into \"{}\"'.format(name))\n\n    else:\n        print('ERROR: Unexpected data structure:', type(data))\n\n    return decoded\n\n\ndef select_pp_struct(rawbytes, rawdump=False, debug=False):\n    \"\"\"\n    Selects appropriate variant of ctype data structures for conversion\n    \"\"\"\n\n    pp_header = common_hdr.from_buffer(rawbytes[:4])\n    pp_ver = validate_pp(pp_header, rawbytes, rawdump)\n    enum_structs = {}\n\n    # Polaris aka RX470/RX480/RX570/RX580/RX590\n    if pp_ver == (7, 1):\n        gpugen = 'Polaris'\n        from upp.atom_gen import pptable_v1_0 as pp_struct\n        ctypes_strct = pp_struct.struct__ATOM_Tonga_POWERPLAYTABLE\n    # Vega 10 aka Vega 56/64\n    elif pp_ver == (8, 1):\n        gpugen = 'Vega 10'\n        from upp.atom_gen import vega10_pptable as pp_struct\n        ctypes_strct = pp_struct.struct__ATOM_Vega10_POWERPLAYTABLE\n    # Vega 20 aka Radeon VII\n    elif pp_ver == (11, 0):\n        gpugen = 'Vega 20'\n        from upp.atom_gen import vega20_pptable as pp_struct\n        ctypes_strct = pp_struct.struct__ATOM_VEGA20_POWERPLAYTABLE\n    # Navi 10 aka RX5700/RX5600(XT,M), Navi 14 aka RX5500/RX5300(XT,M)\n    elif pp_ver == (12, 0):\n        gpugen = 'Navi 10 or 14'\n        from upp.atom_gen import smu_v11_0_navi10 as pp_struct\n        ctypes_strct = pp_struct.struct_smu_11_0_powerplay_table\n        enum_structs = {\n            'power_saving_clock': {\n                'prefix': 'SMU_11_0_PPCLOCK_',\n                'struct': pp_struct.SMU_11_0_PPCLOCK_ID__enumvalues\n            },\n            'overdrive_table': {\n                'prefix': 'SMU_11_0_ODSETTING_',\n                'struct': pp_struct.SMU_11_0_ODSETTING_ID__enumvalues,\n                'cappfx': 'SMU_11_0_ODCAP_',\n                'capstr': pp_struct.SMU_11_0_ODFEATURE_CAP__enumvalues,\n            }\n        }\n    # Arcturus aka MI100\n    elif pp_ver == (13, 0):\n        gpugen = 'Arcturus'\n        from upp.atom_gen import smu_v11_0_arcturus as pp_struct\n        ctypes_strct = pp_struct.struct_smu_11_0_powerplay_table\n    # Navi 12 aka PRO V520\n    elif pp_ver == (14, 0):\n        gpugen = 'Navi 12'\n        from upp.atom_gen import smu_v11_0_navi10 as pp_struct\n        ctypes_strct = pp_struct.struct_smu_11_0_powerplay_table\n    # Navi 21 (Sienna Cichlid) aka RX6900XT/RX6800(XT)\n    # Navi 22 (Navy Flounder) aka RX6700(XT)/RX6800M\n    # Navi 23 (Dimgrey Cavefish) aka RX6600(XT)/RX6600M\n    # Navi 24 (Beige Goby) aka RX6500(XT)/RX6400\n    elif ((pp_ver[0] in [15, 16, 18, 19]) and pp_ver[1] == 0):\n        gpugen = 'Navi 2x'\n        from upp.atom_gen import smu_v11_0_7_navi20 as pp_struct\n        ctypes_strct = pp_struct.struct_smu_11_0_7_powerplay_table\n        enum_structs = {\n            'power_saving_clock': {\n                'prefix': 'SMU_11_0_7_PPCLOCK_',\n                'struct': pp_struct.SMU_11_0_7_PPCLOCK_ID__enumvalues\n            },\n            'overdrive_table': {\n                'prefix': 'SMU_11_0_7_ODSETTING_',\n                'struct': pp_struct.SMU_11_0_7_ODSETTING_ID__enumvalues,\n                'cappfx': 'SMU_11_0_7_ODCAP_',\n                'capstr': pp_struct.SMU_11_0_7_ODFEATURE_CAP__enumvalues,\n            }\n        }\n    # Navi 31, 32, 33\n    elif ((pp_ver[0] in [20, 21, 22]) and pp_ver[1] == 0):\n        gpugen = 'Navi 3x'\n        from upp.atom_gen import smu_v13_0_7_navi30 as pp_struct\n        ctypes_strct = pp_struct.struct_smu_13_0_7_powerplay_table\n        enum_structs = {\n            'power_saving_clock': {\n                'prefix': 'SMU_13_0_7_PPCLOCK_',\n                'struct': pp_struct.SMU_13_0_7_PPCLOCK_ID__enumvalues\n            },\n            'overdrive_table': {\n                'prefix': 'SMU_13_0_7_ODSETTING_',\n                'struct': pp_struct.SMU_13_0_7_ODSETTING_ID__enumvalues,\n                'cappfx': 'SMU_13_0_7_ODCAP_',\n                'capstr': pp_struct.SMU_13_0_7_ODFEATURE_CAP__enumvalues,\n            }\n        }\n    # Navi 48\n    elif ((pp_ver[0] in [23,]) and pp_ver[1] == 0):\n        gpugen = 'Navi 48'\n        from upp.atom_gen import smu_v14_0_2_navi40 as pp_struct\n        ctypes_strct = pp_struct.struct_smu_14_0_2_powerplay_table\n    elif pp_ver is not None:\n        msg = 'Can not decode PowerPlay table version {}.{}'\n        print(msg.format(pp_ver[0], pp_ver[1]))\n        return None\n    else:\n        return None\n\n    # Unpack and sanitize enm_structs, if any\n    if enum_structs:\n        for tbl in enum_structs:\n            prefix = enum_structs[tbl].pop('prefix')\n            for enum in enum_structs[tbl]['struct']:\n                txt = enum_structs[tbl]['struct'][enum]\n                enum_structs[tbl]['struct'][enum] = txt.replace(prefix, '')\n            enum_structs[tbl]['enum'] = enum_structs[tbl]['struct']\n            enum_structs[tbl].pop('struct')\n            if 'capstr' in enum_structs[tbl]:\n                cappfx = enum_structs[tbl].pop('cappfx')\n                for cap in enum_structs[tbl]['capstr']:\n                    cpt = enum_structs[tbl]['capstr'][cap]\n                    enum_structs[tbl]['capstr'][cap] = cpt.replace(cappfx, '')\n                enum_structs[tbl]['cap'] = enum_structs[tbl]['capstr']\n                enum_structs[tbl].pop('capstr')\n        if debug:\n            print('DEBUG: unpacked enumeration data:')\n            for table in enum_structs:\n                print('  min/max enum in', table, enum_structs[tbl]['enum'])\n                if 'cap' in enum_structs[table]:\n                    print('  cap enum in', table, enum_structs[tbl]['cap'])\n\n    if debug:\n        print('DEBUG: This is a', gpugen,\n              'PP table, using', pp_struct.__name__)\n\n    data = decode_pp_table(rawbytes, ctypes_strct)\n    data_dict = build_data_tree(data, rawbytes, meta={'enum': enum_structs},\n                                rawdump=rawdump, debug=debug)\n    return data_dict\n\n\ndef dump_pp_table(pp_bin_file, data_dict=None, indent=0, parent='',\n                  rawdump=False, debug=False):\n    \"\"\"\n    Prints all decoded PowerPlay parameters and their values to console\n    \"\"\"\n    if data_dict is None:\n        pp_bytes = _read_binary_file(pp_bin_file)\n        data_dict = select_pp_struct(pp_bytes, rawdump, debug)\n    # Raw dump is handled at build_data_tree() (via select_pp_struct())\n    if not data_dict or rawdump:\n        return\n    for member in data_dict:\n        name = member\n        if isinstance(member, int):\n            name = str(parent) + ' ' + str(member)\n        if data_dict[member] is None:\n            print('{}{}: UNUSED'.format(' '*indent, member))\n        elif 'value' in data_dict[member]:\n            msg = '{}{}: {}'\n            if data_dict[member]['type'] == 'f':\n                msg = '{}{}:{: n}'\n            desc = ''\n            if 'desc' in data_dict[member]:\n                desc = '(' + data_dict[member]['desc'] + ')'\n                msg = '{}{}: {} {}'\n            print(msg.format(' '*indent, name,\n                             data_dict[member]['value'], desc))\n        else:\n            print('{}{}:'.format(' '*indent, name))\n            dump_pp_table(None, data_dict[member], indent+2, parent=member)\n\n\ndef get_value(pp_bin_file, var_path, data_dict=None, debug=False):\n    \"\"\"\n    Returns value of a PowerPlay parameter specified in var_path\n    Parameters:\n    pp_bin_file (file): a file used for getting raw binary PowerPlay data\n    var_path (list): a list containing representing a pp_table key names.\n                     for example:\n                         ['FanTable', 'TargetTemperature']\n                         ['VddGfxLookupTable', 7, 'Vdd']\n    data_dict (dict): Reuse existing PowerPlay data-structure dictionary\n    debug (bool): Debbuging output enabled\n    Returns:\n    dict: A descriptor of a parameter, containing decoded 'value', decimal\n          'offset' and struct type 'type' keys.\n    \"\"\"\n    if data_dict is None:\n        pp_bytes = _read_binary_file(pp_bin_file)\n        data = select_pp_struct(pp_bytes, debug=debug)\n    else:\n        data = data_dict.copy()\n    for category in var_path:\n        if category is not None:\n            # helper that allows skipping the 'entries' key name\n            if (isinstance(category, int)\n               and isinstance(data, dict) and 'entries' in data):\n                data = data['entries']\n            try:\n                data = data[category]\n            except KeyError:\n                msg = 'ERROR: Invalid parameter \"{}\", available ones are: {}'\n                print(msg.format(category, ', '.join([str(k) for k in data])))\n                return None\n            except (TypeError, IndexError):\n                if isinstance(data, list):\n                    indices = [str(i) for i in range(len(data))]\n                else:\n                    indices = []\n                msg = 'ERROR: Invalid parameter \"{}\", available ones are: {}'\n                print(msg.format(category, ', '.join(indices)))\n                return None\n    if data is None:\n        print('ERROR: Table {} does not point anywhere'.format(category))\n    if isinstance(data, list):\n        print('ERROR: Decoded data does not contain any value, you probably',\n              'wanna look deeper into data;',\n              ', '.join([str(i) for i in range(len(data))]))\n        return None\n    if isinstance(data, dict) and 'value' not in data:\n        # helper that allows skipping the key name of the element of the array\n        if len(data) == 1 and isinstance(data, dict):\n            key = list(data.keys())[0]\n            if 'value' in data[key]:\n                return data[key]\n        print('ERROR: Decoded data does not contain any value, you probably',\n              'wanna look deeper into data;',\n              ', '.join([str(k) for k in data.keys()]))\n        return None\n    if not isinstance(data, dict):\n        print('ERROR: Decoded data does not contain any final values, you',\n              'probably wanna go back one step into the data structure')\n        return None\n\n    return data\n\n\ndef set_value(pp_bin_file, pp_tbl_bytes, var_path, new_value,\n              data_dict=None, write=False, debug=False):\n    \"\"\"\n    Sets a PowerPlay parameter specified in var_path to a specified new value\n    This will call a get_value(var_path) first, where parameter value will\n    get decoded, and then the new value will be set. Finally, the new pp_table\n    file with updated value will be written.\n    Parameters:\n    pp_bin_file (file): a file used for reading & writting raw binary PP data\n    pp_tbl_bytes (bytearray): PowerPlay data bytes\n    var_path (list): a list containing representing a pp_table key names.\n                     for example:\n                         ['FanTable', 'TargetTemperature']\n                         ['VddGfxLookupTable', 7, 'Vdd']\n    new_value (int): New value to be set\n    data_dict (dict): Reuse existing PowerPlay data-structure dictionary\n    write (bool): Actually writting data to PP-tables binary file\n    debug (bool): Debbuging output enabled\n    \"\"\"\n    var_pth_str = '.'.join([str(el) for el in var_path])\n    current_data = get_value(pp_bin_file, var_path,\n                             data_dict=data_dict, debug=debug)\n    if current_data:\n        curr_val = current_data['value']\n        off = current_data['offset']\n        d_type = current_data['type']\n        d_size = struct.calcsize(d_type)\n        msg = 'Changing {} of type {} from {} to {} at 0x{:03x}'\n        print(msg.format(var_pth_str, d_type, curr_val, new_value, off))\n    else:\n        print('Can\\'t decode {}'.format(var_path))\n    bytes_value = struct.pack(d_type, new_value)\n    if debug:\n        current_bytes_value = pp_tbl_bytes[off:off+d_size]\n        current_d_value = struct.unpack(d_type, current_bytes_value)[0]\n        dbg_msg = ' 0x{:04x} ({:04n}) {} {:>8} {:32s}: {:n} {}'\n        print(dbg_msg.format(off, off, d_type[-1],\n                             _bytes2hex(current_bytes_value), var_pth_str,\n                             current_d_value, 'CHANGES TO:'))\n        print(dbg_msg.format(off, off, d_type[-1], _bytes2hex(bytes_value),\n                             var_pth_str, new_value, ''))\n    pp_tbl_bytes[off:off+d_size] = bytes_value\n    if write:\n        _write_binary_file(pp_bin_file, pp_tbl_bytes)\n"
  },
  {
    "path": "src/upp/upp.py",
    "content": "# To run without installing, relative imports must match the module imports,\n# which is satisfied when in 'src' directory: python3 -m upp.upp --help\n\nimport click\nimport tempfile\nfrom upp import decode\nimport importlib.metadata\nimport os.path\nimport sys\n\nCONTEXT_SETTINGS = dict(help_option_names=['-h', '--help'])\nREG_CTRL_CLASS = 'Control\\\\Class\\\\{4d36e968-e325-11ce-bfc1-08002be10318}'\nREG_KEY = 'ControlSet001\\\\' + REG_CTRL_CLASS\nREG_KEY_VAL = 'PP_PhmSoftPowerPlayTable'\nREG_HEADER = 'Windows Registry Editor Version 5.00' + 2 * '\\r\\n' + \\\n             '[HKEY_LOCAL_MACHINE\\\\SYSTEM\\\\CurrentControlSet\\\\' + \\\n             REG_CTRL_CLASS + '\\\\0000]\\r\\n'\n\n\ndef _normalize_var_path(var_path_str):\n    var_path_list = var_path_str.strip('/').split('/')\n    normalized_var_path_list = [\n      int(item) if item.isdigit() else item for item in var_path_list]\n    return normalized_var_path_list\n\n\ndef _is_int_or_float(value):\n    if value.isdigit():\n        return True\n    try:\n        float(value)\n        return True\n    except ValueError:\n        pass\n    return False\n\n\ndef _validate_set_pair(set_pair):\n    valid = False\n    if '=' in set_pair and _is_int_or_float(set_pair.split('=')[-1]):\n        return set_pair.split('=')\n    else:\n        print(\"ERROR: Invalid variable assignment '{}'. \".format(set_pair),\n              \"Assignment must be specified in <variable-path>=<value> \",\n              \"format. For example: /PowerTuneTable/TDP=75\")\n        return None, None\n\n\ndef _get_pp_data_from_registry(reg_file_path):\n    reg_path = 'HKLM\\\\SYSTEM\\\\' + REG_KEY + ':' + REG_KEY_VAL\n    try:\n        from Registry import Registry\n    except ImportError as e:\n        print('ERROR: -f/--from-registry option requires python-registry',\n              'package, consider installing it with PIP.')\n        sys.exit(-2)\n    try:\n        reg = Registry.Registry(reg_file_path)\n        keys = reg.open(REG_KEY)\n    except Exception as e:\n        print('ERROR: Can not access', REG_KEY, 'in', reg_file_path)\n        print(e)\n        return None\n    found_data = False\n    for key in keys.subkeys():\n        index = key.name()\n        key_path = REG_KEY + '\\\\' + index\n        if index.startswith('0'):\n            try:\n                data_type = key.value(REG_KEY_VAL).value_type_str()\n                registry_data = key.value(REG_KEY_VAL).raw_data()\n                print('Found', data_type, 'type value', REG_KEY_VAL,\n                      'in', key_path)\n                if found_data:\n                    print('WARNING: Multiple PP tables found in the registry,',\n                          'only using data from last table found!')\n                found_data = True\n                tmpf_prefix = 'registry_device_' + index + '_pp_table_'\n                tmp_pp_file = tempfile.NamedTemporaryFile(prefix=tmpf_prefix,\n                                                          delete=False)\n                decode._write_binary_file(tmp_pp_file.name, registry_data)\n                print('Saved registry PP table', 'data to', tmp_pp_file.name)\n                tmp_pp_file.close()\n            except Registry.RegistryValueNotFoundException:\n                print(\"Can't find needed value\", REG_KEY_VAL, 'in', key_path)\n\n    return tmp_pp_file.name\n\n\ndef _get_pp_data_from_mpt(mpt_filename):\n\n    try:\n        mpt_bytes = decode._read_binary_file(mpt_filename)\n    except Exception as e:\n        print('ERROR: Can not access', mpt_filename)\n        print(e)\n        sys.exit(-2)\n    mpt_table_filename = mpt_filename + '.pp_table'\n    print('Saving MPT PP table data to', mpt_table_filename)\n    decode._write_binary_file(mpt_table_filename, mpt_bytes[0x100:])\n\n    return mpt_table_filename\n\n\ndef _check_file_writeable(filename):\n    if os.path.exists(filename):\n        if os.path.isfile(filename):\n            return os.access(filename, os.W_OK)\n        else:\n            return False\n    pdir = os.path.dirname(filename)\n    if not pdir:\n        pdir = '.'\n    return os.access(pdir, os.W_OK)\n\n\ndef _write_pp_to_reg_file(filename, data, debug=False):\n    if _check_file_writeable(filename):\n        reg_string = REG_KEY_VAL[3:] + '\"=hex:' + data.hex(',')\n        reg_lines = [reg_string[i:i+75] for i in range(0, len(reg_string), 75)]\n        reg_lines[0] = '\"' + REG_KEY_VAL[:3] + reg_lines[0]\n        formatted_reg_string = '\\\\\\r\\n  '.join(reg_lines)\n        reg_pp_data = REG_HEADER + formatted_reg_string + 2 * '\\r\\n'\n        if debug:\n            print(reg_pp_data)\n        decode._write_binary_file(filename, reg_pp_data.encode('utf-16'))\n        print('Written {} Soft PowerPlay bytes to {}'.format(len(data),\n                                                             filename))\n    else:\n        print('Can not write to {}'.format(filename))\n    return 0\n\n\ndef _load_variable_set(dump_filename):\n    variable_set = []\n    with open(dump_filename, 'r') as file:\n        keys = []\n        indent = 0\n        prev_indent = 0\n        lines = file.readlines()\n        for line in lines:\n            prev_indent = indent\n            indent = (len(line) - len(line.lstrip()))//2\n            if line.strip() == '':\n                continue\n            if indent == 0:\n                keys.clear()\n            elif indent <= prev_indent:\n                keys = keys[0:indent]\n\n            key, value = line.split(':')\n            key = key.strip()\n            value = value.strip()\n            if len(value) > 0:\n                value = value.split()[0]\n            if key.find('Unused') == 0 or value.find('UNUSED') == 0:\n                continue\n            if len(keys) > 0 and key.find(keys[-1]) == 0:\n                key = key.split(' ')[1]\n            keys.append(key)\n            if value != '':\n                variable_set.append('{}={}'.format('/'.join(keys), value))\n    return variable_set\n\n\n@click.group(context_settings=CONTEXT_SETTINGS)\n@click.option('-p', '--pp-file', help='Input/output PP table binary file.',\n              metavar='<filename>',\n              default='/sys/class/drm/card0/device/pp_table')\n@click.option('-f', '--from-registry',\n              help='Import PP_PhmSoftPowerPlayTable from Windows registry ' +\n                   '(overrides -p / --pp-file option).',\n              metavar='<filename>')\n@click.option('-m', '--from-mpt',\n              help='Import PowerPlay Table from More Power Tool ' +\n                   '(overrides --pp-file and --from-registry optios).',\n              metavar='<filename>')\n@click.option('--debug/--no-debug', '-d/ ', default='False',\n              help='Debug mode.')\n@click.pass_context\ndef cli(ctx, debug, pp_file, from_registry, from_mpt):\n    \"\"\"UPP: Uplift Power Play\n\n    A tool for parsing, dumping and modifying data in Radeon PowerPlay tables.\n\n    UPP is able to parse and modify binary data structures of PowerPlay\n    tables commonly found on certain AMD Radeon GPUs. Drivers on recent\n    AMD GPUs allow PowerPlay tables to be dynamically modified on runtime,\n    which may be known as \"soft PowerPlay tables\". On Linux, the PowerPlay\n    table is by default found at:\n\n    \\b\n       /sys/class/drm/card0/device/pp_table\n\n    There are also two alternative ways of getting PowerPlay data that this\n    tool supports:\n\n    \\b\n     - By extracting PowerPlay table from Video ROM image (see extract command)\n     - Import \"Soft PowerPlay\" table from Windows registry, directly from\n       offline Windows/System32/config/SYSTEM file on disk, so it would work\n       from Linux distro that has acces to mounted Windows partition\n       (path to SYSTEM registry file is specified with --from-registry option)\n     - Import \"Soft PowerPlay\" table from \"More Powe Tool\" MPT file\n       (path to MPT file is specified with --from-mpt option)\n\n    This tool currently supports parsing and modifying PowerPlay tables\n    found on the following AMD GPU families:\n\n    \\b\n      - Polaris\n      - Vega\n      - Radeon VII\n      - Navi 10, 12, 14\n      - Navi 21, 22, 23\n      - Navi 3x (experimental)\n\n    Note: iGPUs found in many recent AMD APUs are using completely different\n    PowerPlay control methods, this tool does not support them.\n\n    If you have bugs to report or features to request please check:\n\n      github.com/sibradzic/upp\n    \"\"\"\n    ctx.ensure_object(dict)\n    ctx.obj['DEBUG'] = debug\n    ctx.obj['PPBINARY'] = pp_file\n    ctx.obj['FROMREGISTRY'] = from_registry\n    ctx.obj['FROMMPT'] = from_mpt\n\n\n@click.command(short_help='Show UPP version.')\ndef version():\n    \"\"\"Shows UPP version.\"\"\"\n    version = importlib.metadata.version('upp')\n    click.echo(version)\n\n\n@click.command(short_help='Dumps all PowerPlay parameters to console.')\n@click.option('--raw/--no-raw', '-r/ ', help='Show raw binary data.',\n              default='False')\n@click.pass_context\ndef dump(ctx, raw):\n    \"\"\"Dumps all PowerPlay data to console\n\n    De-serializes PowerPlay binary data into a human-readable text output.\n    For example:\n\n    \\b\n        upp --pp-file=radeon.pp_table dump\n\n    In standard mode all data will be dumped to console, where\n    data tree hierarchy is indicated by indentation.\n\n    In raw mode a table showing all hex and binary data, as well\n    as variable names and values, will be dumped.\n    \"\"\"\n    debug = ctx.obj['DEBUG']\n    pp_file = ctx.obj['PPBINARY']\n    from_registry = ctx.obj['FROMREGISTRY']\n    from_mpt = ctx.obj['FROMMPT']\n    if from_registry:\n        pp_file = _get_pp_data_from_registry(from_registry)\n    if from_mpt:\n        pp_file = _get_pp_data_from_mpt(from_mpt)\n    decode.dump_pp_table(pp_file, rawdump=raw, debug=debug)\n    return 0\n\n\n@click.command(short_help='Undumps all PowerPlay parameters to a binary' +\n                          'PP Table file or a Registry')\n@click.option('-d', '--dump-filename',\n              help='File path of dumped powerplay parameters.')\n@click.option('-t', '--to-registry', metavar='<filename>',\n              help='Output to Windows registry .reg file.')\n@click.option('-w', '--write', is_flag=True,\n              help='Write changes to PP binary.', default=False)\n@click.pass_context\ndef undump(ctx, dump_filename, to_registry, write):\n    \"\"\"Undumps all PowerPlay data to pp file or registry\n\n    Serializes previously dumped PowerPlay text to pp file or registry.\n    For example:\n\n    \\b\n        upp --pp-file=radeon.pp_table undump -d pp.dump --write\n\n    \"\"\"\n    variable_set = _load_variable_set(dump_filename)\n    ctx.invoke(set, variable_path_set=variable_set,\n               to_registry=to_registry, write=write)\n    return 0\n\n\n@click.command(short_help='Extract PowerPlay table from Video BIOS ROM image.')\n@click.option('-r', '--video-rom', required=True, metavar='<filename>',\n              help='Input Video ROM binary image file.')\n@click.pass_context\ndef extract(ctx, video_rom):\n    \"\"\"Extracts PowerPlay data from full VBIOS ROM image\n\n    The source video ROM binary must be specified with -r/--video-rom\n    parameter, and extracted PowerPlay table will be saved into file\n    specified with -p/--pp-file. For example:\n\n    \\b\n        upp --pp-file=extracted.pp_table extract -r VIDEO.rom\n\n    Default output file name will be an original ROM file name with an\n    additional .pp_table extension.\n    \"\"\"\n    pp_file = ctx.obj['PPBINARY']\n    ctx.obj['ROMBINARY'] = video_rom\n    # Override default, we don't want to extract any random VBIOS into sysfs\n    if pp_file.endswith('device/pp_table'):\n        pp_file = video_rom + '.pp_table'\n    msg = \"Extracting PP table from '{}' ROM image...\"\n    print(msg.format(video_rom))\n    if decode.extract_rom(video_rom, pp_file):\n        print('Done')\n\n    return 0\n\n\n@click.command(short_help='Inject PowerPlay table into Video BIOS ROM image.')\n@click.option('-i', '--input-rom', required=True, metavar='<filename>',\n              help='Input Video ROM binary image file.')\n@click.option('-o', '--output-rom', required=False, metavar='<filename>',\n              help='Output Video ROM binary image file.')\n@click.pass_context\ndef inject(ctx, input_rom, output_rom):\n    \"\"\"Injects PowerPlay data from file into VBIOS ROM image\n\n    The input video ROM binary must be specified with -i/--input-rom\n    parameter, and the output ROM can be specified with an optional\n    -o/--output-rom parameter.\n\n    \\b\n        upp -p modded.pp_table inject -i original.rom -o modded.rom\n\n    The output filename defaults to <input ROM file name>.modded.\n\n    WARNING: Modified vROM image is probalby not going to work if flashed as\n    is to your card, due to ROM signature checks on recent Radeon cards.\n    Authors of this tool are in no way responsible for any damage that may\n    happen to your expansive graphics card if you choose to flash the modified\n    video ROM, you are doing it entierly on your own risk.\n    \"\"\"\n    pp_file = ctx.obj['PPBINARY']\n    if not output_rom:\n        output_rom = input_rom + '.modded'\n    msg = \"Injecting {} PP table into {} ROM image...\"\n    print(msg.format(pp_file, input_rom))\n    if decode.inject_pp_table(input_rom, output_rom, pp_file):\n        print('Saved modified vROM image as {}.'.format(output_rom))\n\n    return 0\n\n\n@click.command(short_help='Get current value of a PowerPlay parameter(s).')\n@click.argument('variable-path-set', nargs=-1, required=True)\n@click.pass_context\ndef get(ctx, variable_path_set):\n    \"\"\"Retrieves current value of one or multiple PP parameters\n\n    The parameter variable path must be specified in\n    \"/<param> notation\", for example:\n\n    \\b\n        upp get /FanTable/TargetTemperature /VddgfxLookupTable/7/Vdd\n\n    The raw value of the parameter will be retrieved,\n    decoded and displayed on console.\n    Multiple PP parameters can be specified at the same time.\n    \"\"\"\n    debug = ctx.obj['DEBUG']\n    pp_file = ctx.obj['PPBINARY']\n    from_registry = ctx.obj['FROMREGISTRY']\n    if from_registry:\n        pp_file = _get_pp_data_from_registry(from_registry)\n    pp_bytes = decode._read_binary_file(pp_file)\n    data = decode.select_pp_struct(pp_bytes, debug=debug)\n\n    for set_pair_str in variable_path_set:\n        var_path = _normalize_var_path(set_pair_str)\n        res = decode.get_value(pp_file, var_path, data, debug=debug)\n        if res:\n            print('{:n}'.format(res['value']))\n        else:\n            print('ERROR: Incorrect variable path:', set_pair_str)\n            exit(2)\n\n    return 0\n\n\n@click.command(short_help='Set value to PowerPlay parameter(s).')\n@click.argument('variable-path-set', nargs=-1, required=False)\n@click.option('-w', '--write', is_flag=True,\n              help='Write changes to PP binary.', default=False)\n@click.option('-t', '--to-registry', metavar='<filename>',\n              help='Output to Windows registry .reg file.')\n@click.option('-c', '--from-conf', metavar='<filename>',\n              help='Input VARIABLE_PATH_SET from file.')\n@click.pass_context\ndef set(ctx, variable_path_set, to_registry, write, from_conf):\n    \"\"\"Sets value to one or multiple PP parameters\n\n    The parameter path and value must be specified in\n    \"/<param>=<value> notation\", for example:\n\n    \\b\n        upp set /PowerTuneTable/TDP=75 /SclkDependencyTable/7/Sclk=107000\n\n    Multiple PP parameters can be set at the same time.\n    The PP tables will not be changed unless additional\n    --write option is set.\n\n    It is possible to set parameters from a configuration file with one\n    \"/<param>=<value>\" per line using -c/--from-conf instead of directly\n    passing parameters from command line\n\n    \\b\n        upp set --from-conf=card0.conf\n\n    Optionally, if -t/--to-registry output is specified, an additional Windows\n    registry format file with '.reg' extension will be generated, for example:\n\n    \\b\n        upp set /PowerTuneTable/TDP=75 --to-registry=test\n\n    will produce the file test.reg in the current working directory.\n    \"\"\"\n    debug = ctx.obj['DEBUG']\n    pp_file = ctx.obj['PPBINARY']\n\n    if from_conf is not None:\n        if (len(variable_path_set) > 0):\n            print(\"ERROR: VARIABLE_PATH_SET found when using -c/--from-conf.\")\n            exit(2)\n        if not os.path.isfile(from_conf):\n            print(\"ERROR: file {} not found.\".format(from_conf))\n            exit(2)\n        with open(from_conf, 'r') as config:\n            variable_path_set = list(filter(''.__ne__,\n                                            config.read().splitlines()))\n    elif (len(variable_path_set) == 0):\n        print(\"ERROR: no parameters given to set to pp table.\")\n        exit(2)\n\n    set_pairs = []\n    for set_pair_str in variable_path_set:\n        var, val = _validate_set_pair(set_pair_str)\n        if var and val:\n            var_path = _normalize_var_path(var)\n            res = decode.get_value(pp_file, var_path)\n            if res:\n                if res[\"type\"] == 'f':\n                    set_pairs += [var_path + [float(val)]]\n                else:\n                    set_pairs += [var_path + [int(val)]]\n            else:\n                print('ERROR: Incorrect variable path:', var)\n                exit(2)\n        else:\n            exit(2)\n\n    pp_bytes = decode._read_binary_file(pp_file)\n    data = decode.select_pp_struct(pp_bytes)\n\n    for set_list in set_pairs:\n        decode.set_value(pp_file, pp_bytes, set_list[:-1], set_list[-1],\n                         data_dict=data, write=False, debug=debug)\n    if write:\n        print(\"Committing changes to '{}'.\".format(pp_file))\n        decode._write_binary_file(pp_file, pp_bytes)\n    else:\n        print(\"WARNING: Nothing was written to '{}'.\".format(pp_file),\n              \"Add --write option to commit the changes for real!\")\n    if to_registry:\n        _write_pp_to_reg_file(to_registry + '.reg', pp_bytes, debug=debug)\n\n    return 0\n\n\ncli.add_command(extract)\ncli.add_command(inject)\ncli.add_command(dump)\ncli.add_command(undump)\ncli.add_command(get)\ncli.add_command(set)\ncli.add_command(version)\n\n\ndef main():\n    cli(obj={})()\n\n\nif __name__ == \"__main__\":\n    main()\n"
  },
  {
    "path": "test/AMD.RX480.8192.160603.rom.dump",
    "content": "sHeader:\n  StructureSize: 820\n  TableFormatRevision: 7\n  TableContentRevision: 1\nTableRevision: 0\nTableSize: 77\nGoldenPPID: 1546\nGoldenRevision: 9275\nFormatID: 25\nVoltageTime: 0\nPlatformCaps: 16941056\nMaxODEngineClock: 200000\nMaxODMemoryClock: 225000\nPowerControlLimit: 50\nUlvVoltageOffset: 50\nStateArray:\n  RevId: 1\n  NumEntries: 2\n  entries:\n    entries 0:\n      EngineClockIndexHigh: 0\n      EngineClockIndexLow: 0\n      MemoryClockIndexHigh: 0\n      MemoryClockIndexLow: 0\n      PCIEGenLow: 0\n      PCIEGenHigh: 0\n      PCIELaneLow: 0\n      PCIELaneHigh: 0\n      Classification: 8\n      CapsAndSettings: 0\n      Classification2: 0\n      Unused:\n        Unused 0: 0\n        Unused 1: 0\n        Unused 2: 0\n        Unused 3: 0\n    entries 1:\n      EngineClockIndexHigh: 7\n      EngineClockIndexLow: 0\n      MemoryClockIndexHigh: 1\n      MemoryClockIndexLow: 0\n      PCIEGenLow: 0\n      PCIEGenHigh: 0\n      PCIELaneLow: 0\n      PCIELaneHigh: 0\n      Classification: 5\n      CapsAndSettings: 0\n      Classification2: 0\n      Unused:\n        Unused 0: 0\n        Unused 1: 0\n        Unused 2: 0\n        Unused 3: 0\nFanTable:\n  RevId: 9\n  THyst: 3\n  TMin: 4000\n  TMed: 6500\n  THigh: 8500\n  PWMMin: 2000\n  PWMMed: 4000\n  PWMHigh: 6000\n  TMax: 10900\n  FanControlMode: 1\n  FanPWMMax: 100\n  FanOutputSensitivity: 4836\n  FanRPMMax: 2200\n  MinFanSCLKAcousticLimit: 91000\n  TargetTemperature: 80\n  MinimumPWMLimit: 20\n  FanGainEdge: 100\n  FanGainHotspot: 100\n  FanGainLiquid: 100\n  FanGainVrVddc: 100\n  FanGainVrMvdd: 100\n  FanGainPlx: 100\n  FanGainHbm: 100\n  EnableZeroRPM: 0\n  FanStopTemperature: 50\n  FanStartTemperature: 60\n  Reserved: 0\nThermalController:\n  RevId: 1\n  Type: 23\n  I2cLine: 0\n  I2cAddress: 0\n  FanParameters: 2\n  FanMinRPM: 0\n  FanMaxRPM: 52\n  Reserved: 0\n  Flags: 0\nReserv: 0\nMclkDependencyTable:\n  RevId: 0\n  NumEntries: 2\n  entries:\n    entries 0:\n      VddcInd: 0\n      Vddci: 850\n      VddgfxOffset: 0\n      Mvdd: 1000\n      Mclk: 30000\n      Reserved: 0\n    entries 1:\n      VddcInd: 15\n      Vddci: 950\n      VddgfxOffset: 0\n      Mvdd: 1000\n      Mclk: 200000\n      Reserved: 0\nSclkDependencyTable:\n  RevId: 1\n  NumEntries: 8\n  entries:\n    entries 0:\n      VddInd: 0\n      VddcOffset: 0\n      Sclk: 30000\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 128\n      SclkOffset: 0\n    entries 1:\n      VddInd: 1\n      VddcOffset: 65510\n      Sclk: 60800\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 0\n      SclkOffset: 0\n    entries 2:\n      VddInd: 2\n      VddcOffset: 65510\n      Sclk: 91000\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 0\n      SclkOffset: 5000\n    entries 3:\n      VddInd: 3\n      VddcOffset: 65510\n      Sclk: 107700\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 0\n      SclkOffset: 0\n    entries 4:\n      VddInd: 4\n      VddcOffset: 65510\n      Sclk: 114500\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 0\n      SclkOffset: 0\n    entries 5:\n      VddInd: 5\n      VddcOffset: 65510\n      Sclk: 119100\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 0\n      SclkOffset: 0\n    entries 6:\n      VddInd: 6\n      VddcOffset: 65510\n      Sclk: 123600\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 0\n      SclkOffset: 0\n    entries 7:\n      VddInd: 7\n      VddcOffset: 0\n      Sclk: 126600\n      EdcCurrent: 0\n      ReliabilityTemperature: 0\n      CKSVOffsetandDisable: 0\n      SclkOffset: 0\nVddcLookupTable:\n  RevId: 0\n  NumEntries: 16\n  entries:\n    entries 0:\n      Vdd: 800\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 1:\n      Vdd: 65282\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 2:\n      Vdd: 65283\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 3:\n      Vdd: 65284\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 4:\n      Vdd: 65285\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 5:\n      Vdd: 65286\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 6:\n      Vdd: 65287\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 7:\n      Vdd: 65288\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 8:\n      Vdd: 850\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 9:\n      Vdd: 900\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 10:\n      Vdd: 950\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 11:\n      Vdd: 1000\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 12:\n      Vdd: 1050\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 13:\n      Vdd: 1100\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 14:\n      Vdd: 1150\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 15:\n      Vdd: 975\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\nVddgfxLookupTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      Vdd: 900\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 1:\n      Vdd: 65282\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 2:\n      Vdd: 65283\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 3:\n      Vdd: 65284\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 4:\n      Vdd: 65285\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 5:\n      Vdd: 65286\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 6:\n      Vdd: 65287\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\n    entries 7:\n      Vdd: 65288\n      CACLow: 0\n      CACMid: 0\n      CACHigh: 0\nMMDependencyTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      VddcInd: 0\n      VddgfxOffset: 0\n      DClk: 58000\n      VClk: 75000\n      EClk: 63000\n      AClk: 0\n      SAMUClk: 57000\n    entries 1:\n      VddcInd: 8\n      VddgfxOffset: 65460\n      DClk: 63000\n      VClk: 80000\n      EClk: 69000\n      AClk: 0\n      SAMUClk: 64000\n    entries 2:\n      VddcInd: 9\n      VddgfxOffset: 65435\n      DClk: 68000\n      VClk: 85000\n      EClk: 75000\n      AClk: 0\n      SAMUClk: 70000\n    entries 3:\n      VddcInd: 10\n      VddgfxOffset: 65410\n      DClk: 73000\n      VClk: 89000\n      EClk: 81000\n      AClk: 0\n      SAMUClk: 76000\n    entries 4:\n      VddcInd: 11\n      VddgfxOffset: 65385\n      DClk: 77000\n      VClk: 92000\n      EClk: 86000\n      AClk: 0\n      SAMUClk: 81000\n    entries 5:\n      VddcInd: 12\n      VddgfxOffset: 65335\n      DClk: 80000\n      VClk: 95000\n      EClk: 91000\n      AClk: 0\n      SAMUClk: 85000\n    entries 6:\n      VddcInd: 13\n      VddgfxOffset: 65285\n      DClk: 83000\n      VClk: 98000\n      EClk: 96000\n      AClk: 0\n      SAMUClk: 88000\n    entries 7:\n      VddcInd: 14\n      VddgfxOffset: 0\n      DClk: 86000\n      VClk: 100000\n      EClk: 100000\n      AClk: 0\n      SAMUClk: 91000\nVCEStateTable:\n  RevId: 1\n  NumEntries: 6\n  entries:\n    entries 0:\n      VCEClockIndex: 0\n      Flag: 0\n      SCLKIndex: 1\n      MCLKIndex: 1\n    entries 1:\n      VCEClockIndex: 0\n      Flag: 1\n      SCLKIndex: 1\n      MCLKIndex: 1\n    entries 2:\n      VCEClockIndex: 0\n      Flag: 2\n      SCLKIndex: 1\n      MCLKIndex: 1\n    entries 3:\n      VCEClockIndex: 0\n      Flag: 2\n      SCLKIndex: 1\n      MCLKIndex: 1\n    entries 4:\n      VCEClockIndex: 0\n      Flag: 2\n      SCLKIndex: 1\n      MCLKIndex: 1\n    entries 5:\n      VCEClockIndex: 0\n      Flag: 2\n      SCLKIndex: 1\n      MCLKIndex: 1\nPPMTable: UNUSED\nPowerTuneTable:\n  RevId: 4\n  TDP: 110\n  ConfigurableTDP: 0\n  TDC: 107\n  BatteryPowerLimit: 110\n  SmallPowerLimit: 110\n  LowCACLeakage: 0\n  HighCACLeakage: 0\n  MaximumPowerDeliveryLimit: 110\n  TjMax: 90\n  PowerTuneDataSetID: 0\n  EDCLimit: 0\n  SoftwareShutdownTemp: 94\n  ClockStretchAmount: 2\n  TemperatureLimitHotspot: 105\n  TemperatureLimitLiquid1: 80\n  TemperatureLimitLiquid2: 80\n  TemperatureLimitVrVddc: 115\n  TemperatureLimitVrMvdd: 115\n  TemperatureLimitPlx: 95\n  Liquid1_I2C_address: 0\n  Liquid2_I2C_address: 0\n  Liquid_I2C_Line: 144\n  Vr_I2C_address: 16\n  Vr_I2C_Line: 150\n  Plx_I2C_address: 0\n  Plx_I2C_Line: 144\n  BoostPowerLimit: 0\n  CKS_LDO_REFSEL: 6\n  HotSpotOnly: 0\n  Reserve: 0\nHardLimitTable: UNUSED\nPCIETable:\n  RevId: 1\n  NumEntries: 3\n  entries:\n    entries 0:\n      PCIEGenSpeed: 0\n      PCIELaneWidth: 16\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n      PCIE_Sclk: 0\n    entries 1:\n      PCIEGenSpeed: 0\n      PCIELaneWidth: 16\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n      PCIE_Sclk: 0\n    entries 2:\n      PCIEGenSpeed: 2\n      PCIELaneWidth: 16\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n      PCIE_Sclk: 0\nGPIOTable:\n  RevId: 0\n  VRHotTriggeredSclkDpmIndex: 1\n  Reserve:\n    Reserve 0: 0\n    Reserve 1: 0\n    Reserve 2: 0\n    Reserve 3: 0\n    Reserve 4: 0\nReserved:\n  Reserved 0: 0\n  Reserved 1: 0\n  Reserved 2: 0\n  Reserved 3: 0\n  Reserved 4: 0\n  Reserved 5: 0\n"
  },
  {
    "path": "test/AMD.RX480.8192.160603.rom.rawdump",
    "content": "PowerPlay table rev 7.1 size 820 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     3403 StructureSize                             : 820\n 0x0002 (0002) B       07 TableFormatRevision                       : 7\n 0x0003 (0003) B       01 TableContentRevision                      : 1\n 0x0004 (0004) B       00 TableRevision                             : 0\n 0x0005 (0005) H     4d00 TableSize                                 : 77\n 0x0007 (0007) I 0a060000 GoldenPPID                                : 1546\n 0x000b (0011) I 3b240000 GoldenRevision                            : 9275\n 0x000f (0015) H     1900 FormatID                                  : 25\n 0x0011 (0017) H     0000 VoltageTime                               : 0\n 0x0013 (0019) I 00800201 PlatformCaps                              : 16941056\n 0x0017 (0023) I 400d0300 MaxODEngineClock                          : 200000\n 0x001b (0027) I e86e0300 MaxODMemoryClock                          : 225000\n 0x001f (0031) H     3200 PowerControlLimit                         : 50\n 0x0021 (0033) H     3200 UlvVoltageOffset                          : 50\n 0x0023 (0035) H     4d00 StateArrayOffset                          : 77\n 0x004d (0077) B       01 RevId                                     : 1\n 0x004e (0078) B       02 NumEntries                                : 2\n 0x004f (0079) B       00 EngineClockIndexHigh                      : 0\n 0x0050 (0080) B       00 EngineClockIndexLow                       : 0\n 0x0051 (0081) B       00 MemoryClockIndexHigh                      : 0\n 0x0052 (0082) B       00 MemoryClockIndexLow                       : 0\n 0x0053 (0083) B       00 PCIEGenLow                                : 0\n 0x0054 (0084) B       00 PCIEGenHigh                               : 0\n 0x0055 (0085) B       00 PCIELaneLow                               : 0\n 0x0056 (0086) B       00 PCIELaneHigh                              : 0\n 0x0057 (0087) H     0800 Classification                            : 8\n 0x0059 (0089) I 00000000 CapsAndSettings                           : 0\n 0x005d (0093) H     0000 Classification2                           : 0\n 0x005f (0095) B       00 Unused                                    : 0\n 0x0060 (0096) B       00 Unused                                    : 0\n 0x0061 (0097) B       00 Unused                                    : 0\n 0x0062 (0098) B       00 Unused                                    : 0\n 0x0063 (0099) B       07 EngineClockIndexHigh                      : 7\n 0x0064 (0100) B       00 EngineClockIndexLow                       : 0\n 0x0065 (0101) B       01 MemoryClockIndexHigh                      : 1\n 0x0066 (0102) B       00 MemoryClockIndexLow                       : 0\n 0x0067 (0103) B       00 PCIEGenLow                                : 0\n 0x0068 (0104) B       00 PCIEGenHigh                               : 0\n 0x0069 (0105) B       00 PCIELaneLow                               : 0\n 0x006a (0106) B       00 PCIELaneHigh                              : 0\n 0x006b (0107) H     0500 Classification                            : 5\n 0x006d (0109) I 00000000 CapsAndSettings                           : 0\n 0x0071 (0113) H     0000 Classification2                           : 0\n 0x0073 (0115) B       00 Unused                                    : 0\n 0x0074 (0116) B       00 Unused                                    : 0\n 0x0075 (0117) B       00 Unused                                    : 0\n 0x0076 (0118) B       00 Unused                                    : 0\n 0x0025 (0037) H     9402 FanTableOffset                            : 660\n 0x0294 (0660) B       09 RevId                                     : 9\n 0x0295 (0661) B       03 THyst                                     : 3\n 0x0296 (0662) H     a00f TMin                                      : 4000\n 0x0298 (0664) H     6419 TMed                                      : 6500\n 0x029a (0666) H     3421 THigh                                     : 8500\n 0x029c (0668) H     d007 PWMMin                                    : 2000\n 0x029e (0670) H     a00f PWMMed                                    : 4000\n 0x02a0 (0672) H     7017 PWMHigh                                   : 6000\n 0x02a2 (0674) H     942a TMax                                      : 10900\n 0x02a4 (0676) B       01 FanControlMode                            : 1\n 0x02a5 (0677) H     6400 FanPWMMax                                 : 100\n 0x02a7 (0679) H     e412 FanOutputSensitivity                      : 4836\n 0x02a9 (0681) H     9808 FanRPMMax                                 : 2200\n 0x02ab (0683) I 78630100 MinFanSCLKAcousticLimit                   : 91000\n 0x02af (0687) B       50 TargetTemperature                         : 80\n 0x02b0 (0688) B       14 MinimumPWMLimit                           : 20\n 0x02b1 (0689) H     6400 FanGainEdge                               : 100\n 0x02b3 (0691) H     6400 FanGainHotspot                            : 100\n 0x02b5 (0693) H     6400 FanGainLiquid                             : 100\n 0x02b7 (0695) H     6400 FanGainVrVddc                             : 100\n 0x02b9 (0697) H     6400 FanGainVrMvdd                             : 100\n 0x02bb (0699) H     6400 FanGainPlx                                : 100\n 0x02bd (0701) H     6400 FanGainHbm                                : 100\n 0x02bf (0703) B       00 EnableZeroRPM                             : 0\n 0x02c0 (0704) B       32 FanStopTemperature                        : 50\n 0x02c1 (0705) B       3c FanStartTemperature                       : 60\n 0x02c2 (0706) H     0000 Reserved                                  : 0\n 0x0027 (0039) H     8b02 ThermalControllerOffset                   : 651\n 0x028b (0651) B       01 RevId                                     : 1\n 0x028c (0652) B       17 Type                                      : 23\n 0x028d (0653) B       00 I2cLine                                   : 0\n 0x028e (0654) B       00 I2cAddress                                : 0\n 0x028f (0655) B       02 FanParameters                             : 2\n 0x0290 (0656) B       00 FanMinRPM                                 : 0\n 0x0291 (0657) B       34 FanMaxRPM                                 : 52\n 0x0292 (0658) B       00 Reserved                                  : 0\n 0x0293 (0659) B       00 Flags                                     : 0\n 0x0029 (0041) H     0000 Reserv                                    : 0\n 0x002b (0043) H     b501 MclkDependencyTableOffset                 : 437\n 0x01b5 (0437) B       00 RevId                                     : 0\n 0x01b6 (0438) B       02 NumEntries                                : 2\n 0x01b7 (0439) B       00 VddcInd                                   : 0\n 0x01b8 (0440) H     5203 Vddci                                     : 850\n 0x01ba (0442) H     0000 VddgfxOffset                              : 0\n 0x01bc (0444) H     e803 Mvdd                                      : 1000\n 0x01be (0446) I 30750000 Mclk                                      : 30000\n 0x01c2 (0450) H     0000 Reserved                                  : 0\n 0x01c4 (0452) B       0f VddcInd                                   : 15\n 0x01c5 (0453) H     b603 Vddci                                     : 950\n 0x01c7 (0455) H     0000 VddgfxOffset                              : 0\n 0x01c9 (0457) H     e803 Mvdd                                      : 1000\n 0x01cb (0459) I 400d0300 Mclk                                      : 200000\n 0x01cf (0463) H     0000 Reserved                                  : 0\n 0x002d (0045) H     3b01 SclkDependencyTableOffset                 : 315\n 0x013b (0315) B       01 RevId                                     : 1\n 0x013c (0316) B       08 NumEntries                                : 8\n 0x013d (0317) B       00 VddInd                                    : 0\n 0x013e (0318) H     0000 VddcOffset                                : 0\n 0x0140 (0320) I 30750000 Sclk                                      : 30000\n 0x0144 (0324) H     0000 EdcCurrent                                : 0\n 0x0146 (0326) B       00 ReliabilityTemperature                    : 0\n 0x0147 (0327) B       80 CKSVOffsetandDisable                      : 128\n 0x0148 (0328) I 00000000 SclkOffset                                : 0\n 0x014c (0332) B       01 VddInd                                    : 1\n 0x014d (0333) H     e6ff VddcOffset                                : 65510\n 0x014f (0335) I 80ed0000 Sclk                                      : 60800\n 0x0153 (0339) H     0000 EdcCurrent                                : 0\n 0x0155 (0341) B       00 ReliabilityTemperature                    : 0\n 0x0156 (0342) B       00 CKSVOffsetandDisable                      : 0\n 0x0157 (0343) I 00000000 SclkOffset                                : 0\n 0x015b (0347) B       02 VddInd                                    : 2\n 0x015c (0348) H     e6ff VddcOffset                                : 65510\n 0x015e (0350) I 78630100 Sclk                                      : 91000\n 0x0162 (0354) H     0000 EdcCurrent                                : 0\n 0x0164 (0356) B       00 ReliabilityTemperature                    : 0\n 0x0165 (0357) B       00 CKSVOffsetandDisable                      : 0\n 0x0166 (0358) I 88130000 SclkOffset                                : 5000\n 0x016a (0362) B       03 VddInd                                    : 3\n 0x016b (0363) H     e6ff VddcOffset                                : 65510\n 0x016d (0365) I b4a40100 Sclk                                      : 107700\n 0x0171 (0369) H     0000 EdcCurrent                                : 0\n 0x0173 (0371) B       00 ReliabilityTemperature                    : 0\n 0x0174 (0372) B       00 CKSVOffsetandDisable                      : 0\n 0x0175 (0373) I 00000000 SclkOffset                                : 0\n 0x0179 (0377) B       04 VddInd                                    : 4\n 0x017a (0378) H     e6ff VddcOffset                                : 65510\n 0x017c (0380) I 44bf0100 Sclk                                      : 114500\n 0x0180 (0384) H     0000 EdcCurrent                                : 0\n 0x0182 (0386) B       00 ReliabilityTemperature                    : 0\n 0x0183 (0387) B       00 CKSVOffsetandDisable                      : 0\n 0x0184 (0388) I 00000000 SclkOffset                                : 0\n 0x0188 (0392) B       05 VddInd                                    : 5\n 0x0189 (0393) H     e6ff VddcOffset                                : 65510\n 0x018b (0395) I 3cd10100 Sclk                                      : 119100\n 0x018f (0399) H     0000 EdcCurrent                                : 0\n 0x0191 (0401) B       00 ReliabilityTemperature                    : 0\n 0x0192 (0402) B       00 CKSVOffsetandDisable                      : 0\n 0x0193 (0403) I 00000000 SclkOffset                                : 0\n 0x0197 (0407) B       06 VddInd                                    : 6\n 0x0198 (0408) H     e6ff VddcOffset                                : 65510\n 0x019a (0410) I d0e20100 Sclk                                      : 123600\n 0x019e (0414) H     0000 EdcCurrent                                : 0\n 0x01a0 (0416) B       00 ReliabilityTemperature                    : 0\n 0x01a1 (0417) B       00 CKSVOffsetandDisable                      : 0\n 0x01a2 (0418) I 00000000 SclkOffset                                : 0\n 0x01a6 (0422) B       07 VddInd                                    : 7\n 0x01a7 (0423) H     0000 VddcOffset                                : 0\n 0x01a9 (0425) I 88ee0100 Sclk                                      : 126600\n 0x01ad (0429) H     0000 EdcCurrent                                : 0\n 0x01af (0431) B       00 ReliabilityTemperature                    : 0\n 0x01b0 (0432) B       00 CKSVOffsetandDisable                      : 0\n 0x01b1 (0433) I 00000000 SclkOffset                                : 0\n 0x002f (0047) H     7700 VddcLookupTableOffset                     : 119\n 0x0077 (0119) B       00 RevId                                     : 0\n 0x0078 (0120) B       10 NumEntries                                : 16\n 0x0079 (0121) H     2003 Vdd                                       : 800\n 0x007b (0123) H     0000 CACLow                                    : 0\n 0x007d (0125) H     0000 CACMid                                    : 0\n 0x007f (0127) H     0000 CACHigh                                   : 0\n 0x0081 (0129) H     02ff Vdd                                       : 65282\n 0x0083 (0131) H     0000 CACLow                                    : 0\n 0x0085 (0133) H     0000 CACMid                                    : 0\n 0x0087 (0135) H     0000 CACHigh                                   : 0\n 0x0089 (0137) H     03ff Vdd                                       : 65283\n 0x008b (0139) H     0000 CACLow                                    : 0\n 0x008d (0141) H     0000 CACMid                                    : 0\n 0x008f (0143) H     0000 CACHigh                                   : 0\n 0x0091 (0145) H     04ff Vdd                                       : 65284\n 0x0093 (0147) H     0000 CACLow                                    : 0\n 0x0095 (0149) H     0000 CACMid                                    : 0\n 0x0097 (0151) H     0000 CACHigh                                   : 0\n 0x0099 (0153) H     05ff Vdd                                       : 65285\n 0x009b (0155) H     0000 CACLow                                    : 0\n 0x009d (0157) H     0000 CACMid                                    : 0\n 0x009f (0159) H     0000 CACHigh                                   : 0\n 0x00a1 (0161) H     06ff Vdd                                       : 65286\n 0x00a3 (0163) H     0000 CACLow                                    : 0\n 0x00a5 (0165) H     0000 CACMid                                    : 0\n 0x00a7 (0167) H     0000 CACHigh                                   : 0\n 0x00a9 (0169) H     07ff Vdd                                       : 65287\n 0x00ab (0171) H     0000 CACLow                                    : 0\n 0x00ad (0173) H     0000 CACMid                                    : 0\n 0x00af (0175) H     0000 CACHigh                                   : 0\n 0x00b1 (0177) H     08ff Vdd                                       : 65288\n 0x00b3 (0179) H     0000 CACLow                                    : 0\n 0x00b5 (0181) H     0000 CACMid                                    : 0\n 0x00b7 (0183) H     0000 CACHigh                                   : 0\n 0x00b9 (0185) H     5203 Vdd                                       : 850\n 0x00bb (0187) H     0000 CACLow                                    : 0\n 0x00bd (0189) H     0000 CACMid                                    : 0\n 0x00bf (0191) H     0000 CACHigh                                   : 0\n 0x00c1 (0193) H     8403 Vdd                                       : 900\n 0x00c3 (0195) H     0000 CACLow                                    : 0\n 0x00c5 (0197) H     0000 CACMid                                    : 0\n 0x00c7 (0199) H     0000 CACHigh                                   : 0\n 0x00c9 (0201) H     b603 Vdd                                       : 950\n 0x00cb (0203) H     0000 CACLow                                    : 0\n 0x00cd (0205) H     0000 CACMid                                    : 0\n 0x00cf (0207) H     0000 CACHigh                                   : 0\n 0x00d1 (0209) H     e803 Vdd                                       : 1000\n 0x00d3 (0211) H     0000 CACLow                                    : 0\n 0x00d5 (0213) H     0000 CACMid                                    : 0\n 0x00d7 (0215) H     0000 CACHigh                                   : 0\n 0x00d9 (0217) H     1a04 Vdd                                       : 1050\n 0x00db (0219) H     0000 CACLow                                    : 0\n 0x00dd (0221) H     0000 CACMid                                    : 0\n 0x00df (0223) H     0000 CACHigh                                   : 0\n 0x00e1 (0225) H     4c04 Vdd                                       : 1100\n 0x00e3 (0227) H     0000 CACLow                                    : 0\n 0x00e5 (0229) H     0000 CACMid                                    : 0\n 0x00e7 (0231) H     0000 CACHigh                                   : 0\n 0x00e9 (0233) H     7e04 Vdd                                       : 1150\n 0x00eb (0235) H     0000 CACLow                                    : 0\n 0x00ed (0237) H     0000 CACMid                                    : 0\n 0x00ef (0239) H     0000 CACHigh                                   : 0\n 0x00f1 (0241) H     cf03 Vdd                                       : 975\n 0x00f3 (0243) H     0000 CACLow                                    : 0\n 0x00f5 (0245) H     0000 CACMid                                    : 0\n 0x00f7 (0247) H     0000 CACHigh                                   : 0\n 0x0031 (0049) H     f900 VddgfxLookupTableOffset                   : 249\n 0x00f9 (0249) B       00 RevId                                     : 0\n 0x00fa (0250) B       08 NumEntries                                : 8\n 0x00fb (0251) H     8403 Vdd                                       : 900\n 0x00fd (0253) H     0000 CACLow                                    : 0\n 0x00ff (0255) H     0000 CACMid                                    : 0\n 0x0101 (0257) H     0000 CACHigh                                   : 0\n 0x0103 (0259) H     02ff Vdd                                       : 65282\n 0x0105 (0261) H     0000 CACLow                                    : 0\n 0x0107 (0263) H     0000 CACMid                                    : 0\n 0x0109 (0265) H     0000 CACHigh                                   : 0\n 0x010b (0267) H     03ff Vdd                                       : 65283\n 0x010d (0269) H     0000 CACLow                                    : 0\n 0x010f (0271) H     0000 CACMid                                    : 0\n 0x0111 (0273) H     0000 CACHigh                                   : 0\n 0x0113 (0275) H     04ff Vdd                                       : 65284\n 0x0115 (0277) H     0000 CACLow                                    : 0\n 0x0117 (0279) H     0000 CACMid                                    : 0\n 0x0119 (0281) H     0000 CACHigh                                   : 0\n 0x011b (0283) H     05ff Vdd                                       : 65285\n 0x011d (0285) H     0000 CACLow                                    : 0\n 0x011f (0287) H     0000 CACMid                                    : 0\n 0x0121 (0289) H     0000 CACHigh                                   : 0\n 0x0123 (0291) H     06ff Vdd                                       : 65286\n 0x0125 (0293) H     0000 CACLow                                    : 0\n 0x0127 (0295) H     0000 CACMid                                    : 0\n 0x0129 (0297) H     0000 CACHigh                                   : 0\n 0x012b (0299) H     07ff Vdd                                       : 65287\n 0x012d (0301) H     0000 CACLow                                    : 0\n 0x012f (0303) H     0000 CACMid                                    : 0\n 0x0131 (0305) H     0000 CACHigh                                   : 0\n 0x0133 (0307) H     08ff Vdd                                       : 65288\n 0x0135 (0309) H     0000 CACLow                                    : 0\n 0x0137 (0311) H     0000 CACMid                                    : 0\n 0x0139 (0313) H     0000 CACHigh                                   : 0\n 0x0033 (0051) H     d101 MMDependencyTableOffset                   : 465\n 0x01d1 (0465) B       00 RevId                                     : 0\n 0x01d2 (0466) B       08 NumEntries                                : 8\n 0x01d3 (0467) B       00 VddcInd                                   : 0\n 0x01d4 (0468) H     0000 VddgfxOffset                              : 0\n 0x01d6 (0470) I 90e20000 DClk                                      : 58000\n 0x01da (0474) I f8240100 VClk                                      : 75000\n 0x01de (0478) I 18f60000 EClk                                      : 63000\n 0x01e2 (0482) I 00000000 AClk                                      : 0\n 0x01e6 (0486) I a8de0000 SAMUClk                                   : 57000\n 0x01ea (0490) B       08 VddcInd                                   : 8\n 0x01eb (0491) H     b4ff VddgfxOffset                              : 65460\n 0x01ed (0493) I 18f60000 DClk                                      : 63000\n 0x01f1 (0497) I 80380100 VClk                                      : 80000\n 0x01f5 (0501) I 880d0100 EClk                                      : 69000\n 0x01f9 (0505) I 00000000 AClk                                      : 0\n 0x01fd (0509) I 00fa0000 SAMUClk                                   : 64000\n 0x0201 (0513) B       09 VddcInd                                   : 9\n 0x0202 (0514) H     9bff VddgfxOffset                              : 65435\n 0x0204 (0516) I a0090100 DClk                                      : 68000\n 0x0208 (0520) I 084c0100 VClk                                      : 85000\n 0x020c (0524) I f8240100 EClk                                      : 75000\n 0x0210 (0528) I 00000000 AClk                                      : 0\n 0x0214 (0532) I 70110100 SAMUClk                                   : 70000\n 0x0218 (0536) B       0a VddcInd                                   : 10\n 0x0219 (0537) H     82ff VddgfxOffset                              : 65410\n 0x021b (0539) I 281d0100 DClk                                      : 73000\n 0x021f (0543) I a85b0100 VClk                                      : 89000\n 0x0223 (0547) I 683c0100 EClk                                      : 81000\n 0x0227 (0551) I 00000000 AClk                                      : 0\n 0x022b (0555) I e0280100 SAMUClk                                   : 76000\n 0x022f (0559) B       0b VddcInd                                   : 11\n 0x0230 (0560) H     69ff VddgfxOffset                              : 65385\n 0x0232 (0562) I c82c0100 DClk                                      : 77000\n 0x0236 (0566) I 60670100 VClk                                      : 92000\n 0x023a (0570) I f04f0100 EClk                                      : 86000\n 0x023e (0574) I 00000000 AClk                                      : 0\n 0x0242 (0578) I 683c0100 SAMUClk                                   : 81000\n 0x0246 (0582) B       0c VddcInd                                   : 12\n 0x0247 (0583) H     37ff VddgfxOffset                              : 65335\n 0x0249 (0585) I 80380100 DClk                                      : 80000\n 0x024d (0589) I 18730100 VClk                                      : 95000\n 0x0251 (0593) I 78630100 EClk                                      : 91000\n 0x0255 (0597) I 00000000 AClk                                      : 0\n 0x0259 (0601) I 084c0100 SAMUClk                                   : 85000\n 0x025d (0605) B       0d VddcInd                                   : 13\n 0x025e (0606) H     05ff VddgfxOffset                              : 65285\n 0x0260 (0608) I 38440100 DClk                                      : 83000\n 0x0264 (0612) I d07e0100 VClk                                      : 98000\n 0x0268 (0616) I 00770100 EClk                                      : 96000\n 0x026c (0620) I 00000000 AClk                                      : 0\n 0x0270 (0624) I c0570100 SAMUClk                                   : 88000\n 0x0274 (0628) B       0e VddcInd                                   : 14\n 0x0275 (0629) H     0000 VddgfxOffset                              : 0\n 0x0277 (0631) I f04f0100 DClk                                      : 86000\n 0x027b (0635) I a0860100 VClk                                      : 100000\n 0x027f (0639) I a0860100 EClk                                      : 100000\n 0x0283 (0643) I 00000000 AClk                                      : 0\n 0x0287 (0647) I 78630100 SAMUClk                                   : 91000\n 0x0035 (0053) H     f902 VCEStateTableOffset                       : 761\n 0x02f9 (0761) B       01 RevId                                     : 1\n 0x02fa (0762) B       06 NumEntries                                : 6\n 0x02fb (0763) B       00 VCEClockIndex                             : 0\n 0x02fc (0764) B       00 Flag                                      : 0\n 0x02fd (0765) B       01 SCLKIndex                                 : 1\n 0x02fe (0766) B       01 MCLKIndex                                 : 1\n 0x02ff (0767) B       00 VCEClockIndex                             : 0\n 0x0300 (0768) B       01 Flag                                      : 1\n 0x0301 (0769) B       01 SCLKIndex                                 : 1\n 0x0302 (0770) B       01 MCLKIndex                                 : 1\n 0x0303 (0771) B       00 VCEClockIndex                             : 0\n 0x0304 (0772) B       02 Flag                                      : 2\n 0x0305 (0773) B       01 SCLKIndex                                 : 1\n 0x0306 (0774) B       01 MCLKIndex                                 : 1\n 0x0307 (0775) B       00 VCEClockIndex                             : 0\n 0x0308 (0776) B       02 Flag                                      : 2\n 0x0309 (0777) B       01 SCLKIndex                                 : 1\n 0x030a (0778) B       01 MCLKIndex                                 : 1\n 0x030b (0779) B       00 VCEClockIndex                             : 0\n 0x030c (0780) B       02 Flag                                      : 2\n 0x030d (0781) B       01 SCLKIndex                                 : 1\n 0x030e (0782) B       01 MCLKIndex                                 : 1\n 0x030f (0783) B       00 VCEClockIndex                             : 0\n 0x0310 (0784) B       02 Flag                                      : 2\n 0x0311 (0785) B       01 SCLKIndex                                 : 1\n 0x0312 (0786) B       01 MCLKIndex                                 : 1\n 0x0037 (0055) H     0000 PPMTableOffset                            : 0\n 0x0039 (0057) H     c402 PowerTuneTableOffset                      : 708\n 0x02c4 (0708) B       04 RevId                                     : 4\n 0x02c5 (0709) H     6e00 TDP                                       : 110\n 0x02c7 (0711) H     0000 ConfigurableTDP                           : 0\n 0x02c9 (0713) H     6b00 TDC                                       : 107\n 0x02cb (0715) H     6e00 BatteryPowerLimit                         : 110\n 0x02cd (0717) H     6e00 SmallPowerLimit                           : 110\n 0x02cf (0719) H     0000 LowCACLeakage                             : 0\n 0x02d1 (0721) H     0000 HighCACLeakage                            : 0\n 0x02d3 (0723) H     6e00 MaximumPowerDeliveryLimit                 : 110\n 0x02d5 (0725) H     5a00 TjMax                                     : 90\n 0x02d7 (0727) H     0000 PowerTuneDataSetID                        : 0\n 0x02d9 (0729) H     0000 EDCLimit                                  : 0\n 0x02db (0731) H     5e00 SoftwareShutdownTemp                      : 94\n 0x02dd (0733) H     0200 ClockStretchAmount                        : 2\n 0x02df (0735) H     6900 TemperatureLimitHotspot                   : 105\n 0x02e1 (0737) H     5000 TemperatureLimitLiquid1                   : 80\n 0x02e3 (0739) H     5000 TemperatureLimitLiquid2                   : 80\n 0x02e5 (0741) H     7300 TemperatureLimitVrVddc                    : 115\n 0x02e7 (0743) H     7300 TemperatureLimitVrMvdd                    : 115\n 0x02e9 (0745) H     5f00 TemperatureLimitPlx                       : 95\n 0x02eb (0747) B       00 Liquid1_I2C_address                       : 0\n 0x02ec (0748) B       00 Liquid2_I2C_address                       : 0\n 0x02ed (0749) B       90 Liquid_I2C_Line                           : 144\n 0x02ee (0750) B       10 Vr_I2C_address                            : 16\n 0x02ef (0751) B       96 Vr_I2C_Line                               : 150\n 0x02f0 (0752) B       00 Plx_I2C_address                           : 0\n 0x02f1 (0753) B       90 Plx_I2C_Line                              : 144\n 0x02f2 (0754) H     0000 BoostPowerLimit                           : 0\n 0x02f4 (0756) B       06 CKS_LDO_REFSEL                            : 6\n 0x02f5 (0757) B       00 HotSpotOnly                               : 0\n 0x02f6 (0758) B       00 Reserve                                   : 0\n 0x02f7 (0759) H     0000 Reserve                                   : 0\n 0x003b (0059) H     0000 HardLimitTableOffset                      : 0\n 0x003d (0061) H     1303 PCIETableOffset                           : 787\n 0x0313 (0787) B       01 RevId                                     : 1\n 0x0314 (0788) B       03 NumEntries                                : 3\n 0x0315 (0789) B       00 PCIEGenSpeed                              : 0\n 0x0316 (0790) B       10 PCIELaneWidth                             : 16\n 0x0317 (0791) B       00 Reserved                                  : 0\n 0x0318 (0792) B       00 Reserved                                  : 0\n 0x0319 (0793) I 00000000 PCIE_Sclk                                 : 0\n 0x031d (0797) B       00 PCIEGenSpeed                              : 0\n 0x031e (0798) B       10 PCIELaneWidth                             : 16\n 0x031f (0799) B       00 Reserved                                  : 0\n 0x0320 (0800) B       00 Reserved                                  : 0\n 0x0321 (0801) I 00000000 PCIE_Sclk                                 : 0\n 0x0325 (0805) B       02 PCIEGenSpeed                              : 2\n 0x0326 (0806) B       10 PCIELaneWidth                             : 16\n 0x0327 (0807) B       00 Reserved                                  : 0\n 0x0328 (0808) B       00 Reserved                                  : 0\n 0x0329 (0809) I 00000000 PCIE_Sclk                                 : 0\n 0x003f (0063) H     2d03 GPIOTableOffset                           : 813\n 0x032d (0813) B       00 RevId                                     : 0\n 0x032e (0814) B       01 VRHotTriggeredSclkDpmIndex                : 1\n 0x032f (0815) B       00 Reserve                                   : 0\n 0x0330 (0816) B       00 Reserve                                   : 0\n 0x0331 (0817) B       00 Reserve                                   : 0\n 0x0332 (0818) B       00 Reserve                                   : 0\n 0x0333 (0819) B       00 Reserve                                   : 0\n 0x0041 (0065) H     0000 Reserved                                  : 0\n 0x0043 (0067) H     0000 Reserved                                  : 0\n 0x0045 (0069) H     0000 Reserved                                  : 0\n 0x0047 (0071) H     0000 Reserved                                  : 0\n 0x0049 (0073) H     0000 Reserved                                  : 0\n 0x004b (0075) H     0000 Reserved                                  : 0\n"
  },
  {
    "path": "test/AMD.RX5700XT.8192.190616.rom.check",
    "content": "110\n110\n100\n2800\n3900\n2800\n3800\n-0.03\n0\n0\n1650\n4400\n2600\n4600\n3200\n4800\n3200\n5000\n3200\n750\n"
  },
  {
    "path": "test/AMD.RX5700XT.8192.190616.rom.conf",
    "content": "smc_pptable/SocketPowerLimitAc/0=110\nsmc_pptable/SocketPowerLimitDc/0=110\nsmc_pptable/FanStartTemp=100\nsmc_pptable/MinVoltageGfx=2800\nsmc_pptable/MaxVoltageGfx=3900\nsmc_pptable/MinVoltageSoc=2800\nsmc_pptable/MaxVoltageSoc=3800\nsmc_pptable/qStaticVoltageOffset/0/c=-0.03\nsmc_pptable/UlvVoltageOffsetSoc=0\nsmc_pptable/UlvVoltageOffsetGfx=0\nsmc_pptable/FreqTableGfx/1=1650\nsmc_pptable/MemMvddVoltage/0=4400\nsmc_pptable/MemVddciVoltage/0=2600\nsmc_pptable/MemMvddVoltage/1=4600\nsmc_pptable/MemVddciVoltage/1=3200\nsmc_pptable/MemMvddVoltage/2=4800\nsmc_pptable/MemVddciVoltage/2=3200\nsmc_pptable/MemMvddVoltage/3=5000\nsmc_pptable/MemVddciVoltage/3=3200\nsmc_pptable/FreqTableUclk/3=750\n"
  },
  {
    "path": "test/AMD.RX5700XT.8192.190616.rom.dump",
    "content": "header:\n  structuresize: 1674\n  format_revision: 12\n  content_revision: 0\ntable_revision: 1\ntable_size: 482\ngolden_pp_id: 2247\ngolden_revision: 14368\nformat_id: 125\nplatform_caps: 8\nthermal_controller_type: 27\nsmall_power_limit1: 0\nsmall_power_limit2: 0\nboost_power_limit: 0\nod_turbo_power_limit: 0\nod_power_save_power_limit: 0\nsoftware_shutdown_temp: 118\nreserve:\n  reserve 0: 0\n  reserve 1: 0\n  reserve 2: 0\n  reserve 3: 0\n  reserve 4: 0\n  reserve 5: 0\npower_saving_clock:\n  revision: 1\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  count: 10\n  max:\n    max 0: 2100 (GFXCLK)\n    max 1: 1267 (VCLK)\n    max 2: 1086 (DCLK)\n    max 3: 1267 (ECLK)\n    max 4: 1267 (SOCCLK)\n    max 5: 875 (UCLK)\n    max 6: 1267 (DCEFCLK)\n    max 7: 1284 (DISPCLK)\n    max 8: 1284 (PIXCLK)\n    max 9: 810 (PHYCLK)\n    max 10: 0\n    max 11: 0\n    max 12: 0\n    max 13: 0\n    max 14: 0\n    max 15: 0\n  min:\n    min 0: 300 (GFXCLK)\n    min 1: 100 (VCLK)\n    min 2: 100 (DCLK)\n    min 3: 100 (ECLK)\n    min 4: 507 (SOCCLK)\n    min 5: 100 (UCLK)\n    min 6: 507 (DCEFCLK)\n    min 7: 308 (DISPCLK)\n    min 8: 300 (PIXCLK)\n    min 9: 300 (PHYCLK)\n    min 10: 0\n    min 11: 0\n    min 12: 0\n    min 13: 0\n    min 14: 0\n    min 15: 0\noverdrive_table:\n  revision: 128\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  feature_count: 14\n  setting_count: 30\n  cap:\n    cap 0: 1 (GFXCLK_LIMITS)\n    cap 1: 1 (GFXCLK_CURVE)\n    cap 2: 1 (UCLK_MAX)\n    cap 3: 1 (POWER_LIMIT)\n    cap 4: 1 (FAN_ACOUSTIC_LIMIT)\n    cap 5: 1 (FAN_SPEED_MIN)\n    cap 6: 1 (TEMPERATURE_FAN)\n    cap 7: 1 (TEMPERATURE_SYSTEM)\n    cap 8: 1 (MEMORY_TIMING_TUNE)\n    cap 9: 0 (FAN_ZERO_RPM_CONTROL)\n    cap 10: 1 (AUTO_UV_ENGINE)\n    cap 11: 1 (AUTO_OC_ENGINE)\n    cap 12: 1 (AUTO_OC_MEMORY)\n    cap 13: 1 (FAN_CURVE)\n    cap 14: 0\n    cap 15: 0\n    cap 16: 0\n    cap 17: 0\n    cap 18: 0\n    cap 19: 0\n    cap 20: 0\n    cap 21: 0\n    cap 22: 0\n    cap 23: 0\n    cap 24: 0\n    cap 25: 0\n    cap 26: 0\n    cap 27: 0\n    cap 28: 0\n    cap 29: 0\n    cap 30: 0\n    cap 31: 0\n  max:\n    max 0: 2150 (GFXCLKFMAX)\n    max 1: 2150 (GFXCLKFMIN)\n    max 2: 2150 (VDDGFXCURVEFREQ_P1)\n    max 3: 1200 (VDDGFXCURVEVOLTAGE_P1)\n    max 4: 2150 (VDDGFXCURVEFREQ_P2)\n    max 5: 1200 (VDDGFXCURVEVOLTAGE_P2)\n    max 6: 2150 (VDDGFXCURVEFREQ_P3)\n    max 7: 1200 (VDDGFXCURVEVOLTAGE_P3)\n    max 8: 950 (UCLKFMAX)\n    max 9: 50 (POWERPERCENTAGE)\n    max 10: 4950 (FANRPMMIN)\n    max 11: 4950 (FANRPMACOUSTICLIMIT)\n    max 12: 100 (FANTARGETTEMPERATURE)\n    max 13: 110 (OPERATINGTEMPMAX)\n    max 14: 2 (ACTIMING)\n    max 15: 0 (FAN_ZERO_RPM_CONTROL)\n    max 16: 1 (AUTOUVENGINE)\n    max 17: 1 (AUTOOCENGINE)\n    max 18: 1 (AUTOOCMEMORY)\n    max 19: 100\n    max 20: 100\n    max 21: 100\n    max 22: 100\n    max 23: 100\n    max 24: 100\n    max 25: 100\n    max 26: 100\n    max 27: 100\n    max 28: 100\n    max 29: 0\n    max 30: 0\n    max 31: 0\n  min:\n    min 0: 800 (GFXCLKFMAX)\n    min 1: 800 (GFXCLKFMIN)\n    min 2: 800 (VDDGFXCURVEFREQ_P1)\n    min 3: 750 (VDDGFXCURVEVOLTAGE_P1)\n    min 4: 800 (VDDGFXCURVEFREQ_P2)\n    min 5: 750 (VDDGFXCURVEVOLTAGE_P2)\n    min 6: 800 (VDDGFXCURVEFREQ_P3)\n    min 7: 750 (VDDGFXCURVEVOLTAGE_P3)\n    min 8: 625 (UCLKFMAX)\n    min 9: 50 (POWERPERCENTAGE)\n    min 10: 1100 (FANRPMMIN)\n    min 11: 1100 (FANRPMACOUSTICLIMIT)\n    min 12: 25 (FANTARGETTEMPERATURE)\n    min 13: 50 (OPERATINGTEMPMAX)\n    min 14: 0 (ACTIMING)\n    min 15: 0 (FAN_ZERO_RPM_CONTROL)\n    min 16: 0 (AUTOUVENGINE)\n    min 17: 0 (AUTOOCENGINE)\n    min 18: 0 (AUTOOCMEMORY)\n    min 19: 25\n    min 20: 10\n    min 21: 25\n    min 22: 10\n    min 23: 25\n    min 24: 10\n    min 25: 25\n    min 26: 10\n    min 27: 25\n    min 28: 10\n    min 29: 0\n    min 30: 0\n    min 31: 0\nsmc_pptable:\n  Version: 8\n  FeaturesToRun:\n    FeaturesToRun 0: 3017781247\n    FeaturesToRun 1: 1571\n  SocketPowerLimitAc:\n    SocketPowerLimitAc 0: 180\n    SocketPowerLimitAc 1: 0\n    SocketPowerLimitAc 2: 0\n    SocketPowerLimitAc 3: 0\n  SocketPowerLimitAcTau:\n    SocketPowerLimitAcTau 0: 0\n    SocketPowerLimitAcTau 1: 0\n    SocketPowerLimitAcTau 2: 0\n    SocketPowerLimitAcTau 3: 0\n  SocketPowerLimitDc:\n    SocketPowerLimitDc 0: 180\n    SocketPowerLimitDc 1: 0\n    SocketPowerLimitDc 2: 0\n    SocketPowerLimitDc 3: 0\n  SocketPowerLimitDcTau:\n    SocketPowerLimitDcTau 0: 0\n    SocketPowerLimitDcTau 1: 0\n    SocketPowerLimitDcTau 2: 0\n    SocketPowerLimitDcTau 3: 0\n  TdcLimitSoc: 14\n  TdcLimitSocTau: 0\n  TdcLimitGfx: 170\n  TdcLimitGfxTau: 0\n  TedgeLimit: 100\n  ThotspotLimit: 110\n  TmemLimit: 105\n  Tvr_gfxLimit: 115\n  Tvr_mem0Limit: 115\n  Tvr_mem1Limit: 115\n  Tvr_socLimit: 115\n  Tliquid0Limit: 0\n  Tliquid1Limit: 0\n  TplxLimit: 0\n  FitLimit: 0\n  PpmPowerLimit: 0\n  PpmTemperatureThreshold: 0\n  ThrottlerControlMask: 28926\n  FwDStateMask: 1\n  UlvVoltageOffsetSoc: 100\n  UlvVoltageOffsetGfx: 100\n  GceaLinkMgrIdleThreshold: 0\n  paddingRlcUlvParams:\n    paddingRlcUlvParams 0: 0\n    paddingRlcUlvParams 1: 0\n    paddingRlcUlvParams 2: 0\n  UlvSmnclkDid: 0\n  UlvMp1clkDid: 0\n  UlvGfxclkBypass: 0\n  Padding234: 0\n  MinVoltageUlvGfx: 2900\n  MinVoltageUlvSoc: 2900\n  MinVoltageGfx: 3000\n  MinVoltageSoc: 3000\n  MaxVoltageGfx: 4800\n  MaxVoltageSoc: 4800\n  LoadLineResistanceGfx: 76\n  LoadLineResistanceSoc: 0\n  DpmDescriptor:\n    DpmDescriptor 0:\n      VoltageMode: 1\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0\n        b: 0\n      SsCurve:\n        a: 0.2542\n        b:-0.21625\n        c: 0.69572\n    DpmDescriptor 1:\n      VoltageMode: 1\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1\n        b: 0\n      SsCurve:\n        a: 0.21751\n        b:-0.05852\n        c: 0.71468\n    DpmDescriptor 2:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 4\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1\n        b: 0\n      SsCurve:\n        a: 0.21751\n        b:-0.05852\n        c: 0.71468\n    DpmDescriptor 3:\n      VoltageMode: 1\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0.6443\n        b: 0.5349\n      SsCurve:\n        a: 0\n        b: 0.3851\n        c: 0.5678\n    DpmDescriptor 4:\n      VoltageMode: 1\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0.5094\n        b: 0.5925\n      SsCurve:\n        a: 0\n        b: 0.3307\n        c: 0.5685\n    DpmDescriptor 5:\n      VoltageMode: 1\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.256\n        b:-0.3438\n      SsCurve:\n        a: 0\n        b: 0.5343\n        c: 0.2453\n    DpmDescriptor 6:\n      VoltageMode: 1\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0.8216\n        b: 0.0146\n      SsCurve:\n        a: 0\n        b: 0.4776\n        c: 0.2526\n    DpmDescriptor 7:\n      VoltageMode: 2\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0\n        b: 0\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 8:\n      VoltageMode: 2\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0\n        b: 0\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n  FreqTableGfx:\n    FreqTableGfx 0: 300\n    FreqTableGfx 1: 2100\n    FreqTableGfx 2: 1400\n    FreqTableGfx 3: 1400\n    FreqTableGfx 4: 1400\n    FreqTableGfx 5: 1400\n    FreqTableGfx 6: 1400\n    FreqTableGfx 7: 1400\n    FreqTableGfx 8: 1400\n    FreqTableGfx 9: 1400\n    FreqTableGfx 10: 1400\n    FreqTableGfx 11: 1400\n    FreqTableGfx 12: 1400\n    FreqTableGfx 13: 1400\n    FreqTableGfx 14: 1400\n    FreqTableGfx 15: 1400\n  FreqTableVclk:\n    FreqTableVclk 0: 100\n    FreqTableVclk 1: 1267\n    FreqTableVclk 2: 1267\n    FreqTableVclk 3: 1267\n    FreqTableVclk 4: 1267\n    FreqTableVclk 5: 1267\n    FreqTableVclk 6: 1267\n    FreqTableVclk 7: 1267\n  FreqTableDclk:\n    FreqTableDclk 0: 100\n    FreqTableDclk 1: 1086\n    FreqTableDclk 2: 1086\n    FreqTableDclk 3: 1086\n    FreqTableDclk 4: 1086\n    FreqTableDclk 5: 1086\n    FreqTableDclk 6: 1086\n    FreqTableDclk 7: 1086\n  FreqTableSocclk:\n    FreqTableSocclk 0: 507\n    FreqTableSocclk 1: 1267\n    FreqTableSocclk 2: 950\n    FreqTableSocclk 3: 950\n    FreqTableSocclk 4: 950\n    FreqTableSocclk 5: 950\n    FreqTableSocclk 6: 950\n    FreqTableSocclk 7: 950\n  FreqTableUclk:\n    FreqTableUclk 0: 100\n    FreqTableUclk 1: 500\n    FreqTableUclk 2: 625\n    FreqTableUclk 3: 875\n  FreqTableDcefclk:\n    FreqTableDcefclk 0: 507\n    FreqTableDcefclk 1: 1267\n    FreqTableDcefclk 2: 1267\n    FreqTableDcefclk 3: 1267\n    FreqTableDcefclk 4: 1267\n    FreqTableDcefclk 5: 1267\n    FreqTableDcefclk 6: 1267\n    FreqTableDcefclk 7: 1267\n  FreqTableDispclk:\n    FreqTableDispclk 0: 308\n    FreqTableDispclk 1: 1284\n    FreqTableDispclk 2: 1284\n    FreqTableDispclk 3: 1284\n    FreqTableDispclk 4: 1284\n    FreqTableDispclk 5: 1284\n    FreqTableDispclk 6: 1284\n    FreqTableDispclk 7: 1284\n  FreqTablePixclk:\n    FreqTablePixclk 0: 300\n    FreqTablePixclk 1: 1284\n    FreqTablePixclk 2: 1188\n    FreqTablePixclk 3: 1188\n    FreqTablePixclk 4: 1188\n    FreqTablePixclk 5: 1188\n    FreqTablePixclk 6: 1188\n    FreqTablePixclk 7: 1188\n  FreqTablePhyclk:\n    FreqTablePhyclk 0: 300\n    FreqTablePhyclk 1: 810\n    FreqTablePhyclk 2: 810\n    FreqTablePhyclk 3: 810\n    FreqTablePhyclk 4: 810\n    FreqTablePhyclk 5: 810\n    FreqTablePhyclk 6: 810\n    FreqTablePhyclk 7: 810\n  Paddingclks:\n    Paddingclks 0: 30409168\n    Paddingclks 1: 30409168\n    Paddingclks 2: 30409168\n    Paddingclks 3: 30409168\n    Paddingclks 4: 30409168\n    Paddingclks 5: 30409168\n    Paddingclks 6: 30409168\n    Paddingclks 7: 30409168\n    Paddingclks 8: 30409168\n    Paddingclks 9: 30409168\n    Paddingclks 10: 30409168\n    Paddingclks 11: 30409168\n    Paddingclks 12: 30409168\n    Paddingclks 13: 30409168\n    Paddingclks 14: 30409168\n    Paddingclks 15: 30409168\n  DcModeMaxFreq:\n    DcModeMaxFreq 0: 2100\n    DcModeMaxFreq 1: 1267\n    DcModeMaxFreq 2: 875\n    DcModeMaxFreq 3: 1086\n    DcModeMaxFreq 4: 1267\n    DcModeMaxFreq 5: 1267\n    DcModeMaxFreq 6: 1284\n    DcModeMaxFreq 7: 1284\n    DcModeMaxFreq 8: 810\n  Padding8_Clks: 464\n  FreqTableUclkDiv:\n    FreqTableUclkDiv 0: 0\n    FreqTableUclkDiv 1: 3\n    FreqTableUclkDiv 2: 3\n    FreqTableUclkDiv 3: 3\n  Mp0clkFreq:\n    Mp0clkFreq 0: 304\n    Mp0clkFreq 1: 507\n  Mp0DpmVoltage:\n    Mp0DpmVoltage 0: 3000\n    Mp0DpmVoltage 1: 3000\n  MemVddciVoltage:\n    MemVddciVoltage 0: 2700\n    MemVddciVoltage 1: 3400\n    MemVddciVoltage 2: 3400\n    MemVddciVoltage 3: 3400\n  MemMvddVoltage:\n    MemMvddVoltage 0: 5000\n    MemMvddVoltage 1: 5400\n    MemMvddVoltage 2: 5400\n    MemMvddVoltage 3: 5400\n  GfxclkFgfxoffEntry: 800\n  GfxclkFinit: 800\n  GfxclkFidle: 800\n  GfxclkSlewRate: 0\n  GfxclkFopt: 0\n  Padding567:\n    Padding567 0: 208\n    Padding567 1: 1\n  GfxclkDsMaxFreq: 0\n  GfxclkSource: 1\n  Padding456: 2\n  LowestUclkReservedForUlv: 0\n  paddingUclk:\n    paddingUclk 0: 0\n    paddingUclk 1: 91\n    paddingUclk 2: 0\n  MemoryType: 0\n  MemoryChannels: 16\n  PaddingMem:\n    PaddingMem 0: 0\n    PaddingMem 1: 0\n  PcieGenSpeed:\n    PcieGenSpeed 0: 0\n    PcieGenSpeed 1: 3\n  PcieLaneCount:\n    PcieLaneCount 0: 6\n    PcieLaneCount 1: 6\n  LclkFreq:\n    LclkFreq 0: 619\n    LclkFreq 1: 619\n  EnableTdpm: 0\n  TdpmHighHystTemperature: 0\n  TdpmLowHystTemperature: 0\n  GfxclkFreqHighTempLimit: 0\n  FanStopTemp: 0\n  FanStartTemp: 0\n  FanGainEdge: 400\n  FanGainHotspot: 400\n  FanGainLiquid0: 400\n  FanGainLiquid1: 400\n  FanGainVrGfx: 400\n  FanGainVrSoc: 400\n  FanGainVrMem0: 400\n  FanGainVrMem1: 400\n  FanGainPlx: 400\n  FanGainMem: 400\n  FanPwmMin: 20\n  FanAcousticLimitRpm: 2100\n  FanThrottlingRpm: 2100\n  FanMaximumRpm: 4950\n  FanTargetTemperature: 90\n  FanTargetGfxclk: 800\n  FanTempInputSelect: 1\n  FanPadding: 0\n  FanZeroRpmEnable: 0\n  FanTachEdgePerRev: 2\n  FuzzyFan_ErrorSetDelta: 0\n  FuzzyFan_ErrorRateSetDelta: 0\n  FuzzyFan_PwmSetDelta: 0\n  FuzzyFan_Reserved: 0\n  OverrideAvfsGb:\n    OverrideAvfsGb 0: 0\n    OverrideAvfsGb 1: 0\n  Padding8_Avfs:\n    Padding8_Avfs 0: 0\n    Padding8_Avfs 1: 0\n  qAvfsGb:\n    qAvfsGb 0:\n      a: 0.01781\n      b:-0.04728\n      c: 0.05402\n    qAvfsGb 1:\n      a: 0\n      b: 0\n      c: 0.03\n  dBtcGbGfxPll:\n    a: 0\n    b: 0\n    c: 0\n  dBtcGbGfxDfll:\n    a: 0.09755\n    b: 0.04839\n    c:-0.07874\n  dBtcGbSoc:\n    a: 0.00234\n    b:-0.00239\n    c: 0.09239\n  qAgingGb:\n    qAgingGb 0:\n      m: 0\n      b: 0\n    qAgingGb 1:\n      m: 0\n      b: 0\n  qStaticVoltageOffset:\n    qStaticVoltageOffset 0:\n      a: 0\n      b: 0\n      c: 0\n    qStaticVoltageOffset 1:\n      a: 0\n      b: 0\n      c: 0\n  DcTol:\n    DcTol 0: 160\n    DcTol 1: 160\n  DcBtcEnabled:\n    DcBtcEnabled 0: 1\n    DcBtcEnabled 1: 1\n  Padding8_GfxBtc:\n    Padding8_GfxBtc 0: 0\n    Padding8_GfxBtc 1: 0\n  DcBtcMin:\n    DcBtcMin 0: 0\n    DcBtcMin 1: 0\n  DcBtcMax:\n    DcBtcMax 0: 160\n    DcBtcMax 1: 160\n  DebugOverrides: 512\n  ReservedEquation0:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation1:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation2:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation3:\n    a: 0\n    b: 0\n    c: 0\n  TotalPowerConfig: 1\n  TotalPowerSpare1: 0\n  TotalPowerSpare2: 0\n  PccThresholdLow: 0\n  PccThresholdHigh: 0\n  MGpuFanBoostLimitRpm: 0\n  PaddingAPCC:\n    PaddingAPCC 0: 0\n    PaddingAPCC 1: 0\n    PaddingAPCC 2: 0\n    PaddingAPCC 3: 0\n    PaddingAPCC 4: 0\n  VDDGFX_TVmin: 0\n  VDDSOC_TVmin: 0\n  VDDGFX_Vmin_HiTemp: 0\n  VDDGFX_Vmin_LoTemp: 0\n  VDDSOC_Vmin_HiTemp: 0\n  VDDSOC_Vmin_LoTemp: 0\n  VDDGFX_TVminHystersis: 0\n  VDDSOC_TVminHystersis: 0\n  BtcConfig: 0\n  SsFmin:\n    SsFmin 0: 425\n    SsFmin 1: 135\n    SsFmin 2: 135\n    SsFmin 3: 0\n    SsFmin 4: 0\n    SsFmin 5: 0\n    SsFmin 6: 0\n    SsFmin 7: 0\n    SsFmin 8: 0\n    SsFmin 9: 0\n  DcBtcGb:\n    DcBtcGb 0: 25\n    DcBtcGb 1: 25\n  Reserved:\n    Reserved 0: 0\n    Reserved 1: 0\n    Reserved 2: 0\n    Reserved 3: 0\n    Reserved 4: 0\n    Reserved 5: 0\n    Reserved 6: 0\n    Reserved 7: 0\n  I2cControllers:\n    I2cControllers 0:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 1:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 2:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 3:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 4:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 5:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 6:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 7:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n  MaxVoltageStepGfx: 0\n  MaxVoltageStepSoc: 0\n  VddGfxVrMapping: 0\n  VddSocVrMapping: 0\n  VddMem0VrMapping: 0\n  VddMem1VrMapping: 0\n  GfxUlvPhaseSheddingMask: 0\n  SocUlvPhaseSheddingMask: 0\n  ExternalSensorPresent: 0\n  Padding8_V: 0\n  GfxMaxCurrent: 0\n  GfxOffset: 0\n  Padding_TelemetryGfx: 0\n  SocMaxCurrent: 0\n  SocOffset: 0\n  Padding_TelemetrySoc: 0\n  Mem0MaxCurrent: 0\n  Mem0Offset: 0\n  Padding_TelemetryMem0: 0\n  Mem1MaxCurrent: 0\n  Mem1Offset: 0\n  Padding_TelemetryMem1: 0\n  AcDcGpio: 0\n  AcDcPolarity: 0\n  VR0HotGpio: 0\n  VR0HotPolarity: 0\n  VR1HotGpio: 0\n  VR1HotPolarity: 0\n  GthrGpio: 0\n  GthrPolarity: 0\n  LedPin0: 0\n  LedPin1: 0\n  LedPin2: 0\n  padding8_4: 0\n  PllGfxclkSpreadEnabled: 0\n  PllGfxclkSpreadPercent: 0\n  PllGfxclkSpreadFreq: 0\n  DfllGfxclkSpreadEnabled: 0\n  DfllGfxclkSpreadPercent: 0\n  DfllGfxclkSpreadFreq: 0\n  UclkSpreadEnabled: 0\n  UclkSpreadPercent: 0\n  UclkSpreadFreq: 0\n  SoclkSpreadEnabled: 0\n  SocclkSpreadPercent: 0\n  SocclkSpreadFreq: 0\n  TotalBoardPower: 0\n  BoardPadding: 0\n  MvddRatio: 0\n  RenesesLoadLineEnabled: 0\n  GfxLoadlineResistance: 0\n  SocLoadlineResistance: 0\n  Padding8_Loadline: 0\n  BoardReserved:\n    BoardReserved 0: 0\n    BoardReserved 1: 0\n    BoardReserved 2: 0\n    BoardReserved 3: 0\n    BoardReserved 4: 0\n    BoardReserved 5: 0\n    BoardReserved 6: 0\n    BoardReserved 7: 0\n  MmHubPadding:\n    MmHubPadding 0: 0\n    MmHubPadding 1: 0\n    MmHubPadding 2: 0\n    MmHubPadding 3: 0\n    MmHubPadding 4: 0\n    MmHubPadding 5: 0\n    MmHubPadding 6: 0\n    MmHubPadding 7: 0\n"
  },
  {
    "path": "test/AMD.RX5700XT.8192.190616.rom.rawdump",
    "content": "PowerPlay table rev 12.0 size 1674 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     8a06 structuresize                             : 1674\n 0x0002 (0002) B       0c format_revision                           : 12\n 0x0003 (0003) B       00 content_revision                          : 0\n 0x0004 (0004) B       01 table_revision                            : 1\n 0x0005 (0005) H     e201 table_size                                : 482\n 0x0007 (0007) I c7080000 golden_pp_id                              : 2247\n 0x000b (0011) I 20380000 golden_revision                           : 14368\n 0x000f (0015) H     7d00 format_id                                 : 125\n 0x0011 (0017) I 08000000 platform_caps                             : 8\n 0x0015 (0021) B       1b thermal_controller_type                   : 27\n 0x0016 (0022) H     0000 small_power_limit1                        : 0\n 0x0018 (0024) H     0000 small_power_limit2                        : 0\n 0x001a (0026) H     0000 boost_power_limit                         : 0\n 0x001c (0028) H     0000 od_turbo_power_limit                      : 0\n 0x001e (0030) H     0000 od_power_save_power_limit                 : 0\n 0x0020 (0032) H     7600 software_shutdown_temp                    : 118\n 0x0022 (0034) H     0000 reserve                                   : 0\n 0x0024 (0036) H     0000 reserve                                   : 0\n 0x0026 (0038) H     0000 reserve                                   : 0\n 0x0028 (0040) H     0000 reserve                                   : 0\n 0x002a (0042) H     0000 reserve                                   : 0\n 0x002c (0044) H     0000 reserve                                   : 0\n 0x002e (0046) B       01 revision                                  : 1\n 0x002f (0047) B       00 reserve                                   : 0\n 0x0030 (0048) B       00 reserve                                   : 0\n 0x0031 (0049) B       00 reserve                                   : 0\n 0x0032 (0050) I 0a000000 count                                     : 10\n 0x0036 (0054) I 34080000 max GFXCLK                                : 2100\n 0x003a (0058) I f3040000 max VCLK                                  : 1267\n 0x003e (0062) I 3e040000 max DCLK                                  : 1086\n 0x0042 (0066) I f3040000 max ECLK                                  : 1267\n 0x0046 (0070) I f3040000 max SOCCLK                                : 1267\n 0x004a (0074) I 6b030000 max UCLK                                  : 875\n 0x004e (0078) I f3040000 max DCEFCLK                               : 1267\n 0x0052 (0082) I 04050000 max DISPCLK                               : 1284\n 0x0056 (0086) I 04050000 max PIXCLK                                : 1284\n 0x005a (0090) I 2a030000 max PHYCLK                                : 810\n 0x005e (0094) I 00000000 max                                       : 0\n 0x0062 (0098) I 00000000 max                                       : 0\n 0x0066 (0102) I 00000000 max                                       : 0\n 0x006a (0106) I 00000000 max                                       : 0\n 0x006e (0110) I 00000000 max                                       : 0\n 0x0072 (0114) I 00000000 max                                       : 0\n 0x0076 (0118) I 2c010000 min GFXCLK                                : 300\n 0x007a (0122) I 64000000 min VCLK                                  : 100\n 0x007e (0126) I 64000000 min DCLK                                  : 100\n 0x0082 (0130) I 64000000 min ECLK                                  : 100\n 0x0086 (0134) I fb010000 min SOCCLK                                : 507\n 0x008a (0138) I 64000000 min UCLK                                  : 100\n 0x008e (0142) I fb010000 min DCEFCLK                               : 507\n 0x0092 (0146) I 34010000 min DISPCLK                               : 308\n 0x0096 (0150) I 2c010000 min PIXCLK                                : 300\n 0x009a (0154) I 2c010000 min PHYCLK                                : 300\n 0x009e (0158) I 00000000 min                                       : 0\n 0x00a2 (0162) I 00000000 min                                       : 0\n 0x00a6 (0166) I 00000000 min                                       : 0\n 0x00aa (0170) I 00000000 min                                       : 0\n 0x00ae (0174) I 00000000 min                                       : 0\n 0x00b2 (0178) I 00000000 min                                       : 0\n 0x00b6 (0182) B       80 revision                                  : 128\n 0x00b7 (0183) B       00 reserve                                   : 0\n 0x00b8 (0184) B       00 reserve                                   : 0\n 0x00b9 (0185) B       00 reserve                                   : 0\n 0x00ba (0186) I 0e000000 feature_count                             : 14\n 0x00be (0190) I 1e000000 setting_count                             : 30\n 0x00c2 (0194) B       01 cap GFXCLK_LIMITS                         : 1\n 0x00c3 (0195) B       01 cap GFXCLK_CURVE                          : 1\n 0x00c4 (0196) B       01 cap UCLK_MAX                              : 1\n 0x00c5 (0197) B       01 cap POWER_LIMIT                           : 1\n 0x00c6 (0198) B       01 cap FAN_ACOUSTIC_LIMIT                    : 1\n 0x00c7 (0199) B       01 cap FAN_SPEED_MIN                         : 1\n 0x00c8 (0200) B       01 cap TEMPERATURE_FAN                       : 1\n 0x00c9 (0201) B       01 cap TEMPERATURE_SYSTEM                    : 1\n 0x00ca (0202) B       01 cap MEMORY_TIMING_TUNE                    : 1\n 0x00cb (0203) B       00 cap FAN_ZERO_RPM_CONTROL                  : 0\n 0x00cc (0204) B       01 cap AUTO_UV_ENGINE                        : 1\n 0x00cd (0205) B       01 cap AUTO_OC_ENGINE                        : 1\n 0x00ce (0206) B       01 cap AUTO_OC_MEMORY                        : 1\n 0x00cf (0207) B       01 cap FAN_CURVE                             : 1\n 0x00d0 (0208) B       00 cap                                       : 0\n 0x00d1 (0209) B       00 cap                                       : 0\n 0x00d2 (0210) B       00 cap                                       : 0\n 0x00d3 (0211) B       00 cap                                       : 0\n 0x00d4 (0212) B       00 cap                                       : 0\n 0x00d5 (0213) B       00 cap                                       : 0\n 0x00d6 (0214) B       00 cap                                       : 0\n 0x00d7 (0215) B       00 cap                                       : 0\n 0x00d8 (0216) B       00 cap                                       : 0\n 0x00d9 (0217) B       00 cap                                       : 0\n 0x00da (0218) B       00 cap                                       : 0\n 0x00db (0219) B       00 cap                                       : 0\n 0x00dc (0220) B       00 cap                                       : 0\n 0x00dd (0221) B       00 cap                                       : 0\n 0x00de (0222) B       00 cap                                       : 0\n 0x00df (0223) B       00 cap                                       : 0\n 0x00e0 (0224) B       00 cap                                       : 0\n 0x00e1 (0225) B       00 cap                                       : 0\n 0x00e2 (0226) I 66080000 max GFXCLKFMAX                            : 2150\n 0x00e6 (0230) I 66080000 max GFXCLKFMIN                            : 2150\n 0x00ea (0234) I 66080000 max VDDGFXCURVEFREQ_P1                    : 2150\n 0x00ee (0238) I b0040000 max VDDGFXCURVEVOLTAGE_P1                 : 1200\n 0x00f2 (0242) I 66080000 max VDDGFXCURVEFREQ_P2                    : 2150\n 0x00f6 (0246) I b0040000 max VDDGFXCURVEVOLTAGE_P2                 : 1200\n 0x00fa (0250) I 66080000 max VDDGFXCURVEFREQ_P3                    : 2150\n 0x00fe (0254) I b0040000 max VDDGFXCURVEVOLTAGE_P3                 : 1200\n 0x0102 (0258) I b6030000 max UCLKFMAX                              : 950\n 0x0106 (0262) I 32000000 max POWERPERCENTAGE                       : 50\n 0x010a (0266) I 56130000 max FANRPMMIN                             : 4950\n 0x010e (0270) I 56130000 max FANRPMACOUSTICLIMIT                   : 4950\n 0x0112 (0274) I 64000000 max FANTARGETTEMPERATURE                  : 100\n 0x0116 (0278) I 6e000000 max OPERATINGTEMPMAX                      : 110\n 0x011a (0282) I 02000000 max ACTIMING                              : 2\n 0x011e (0286) I 00000000 max FAN_ZERO_RPM_CONTROL                  : 0\n 0x0122 (0290) I 01000000 max AUTOUVENGINE                          : 1\n 0x0126 (0294) I 01000000 max AUTOOCENGINE                          : 1\n 0x012a (0298) I 01000000 max AUTOOCMEMORY                          : 1\n 0x012e (0302) I 64000000 max                                       : 100\n 0x0132 (0306) I 64000000 max                                       : 100\n 0x0136 (0310) I 64000000 max                                       : 100\n 0x013a (0314) I 64000000 max                                       : 100\n 0x013e (0318) I 64000000 max                                       : 100\n 0x0142 (0322) I 64000000 max                                       : 100\n 0x0146 (0326) I 64000000 max                                       : 100\n 0x014a (0330) I 64000000 max                                       : 100\n 0x014e (0334) I 64000000 max                                       : 100\n 0x0152 (0338) I 64000000 max                                       : 100\n 0x0156 (0342) I 00000000 max                                       : 0\n 0x015a (0346) I 00000000 max                                       : 0\n 0x015e (0350) I 00000000 max                                       : 0\n 0x0162 (0354) I 20030000 min GFXCLKFMAX                            : 800\n 0x0166 (0358) I 20030000 min GFXCLKFMIN                            : 800\n 0x016a (0362) I 20030000 min VDDGFXCURVEFREQ_P1                    : 800\n 0x016e (0366) I ee020000 min VDDGFXCURVEVOLTAGE_P1                 : 750\n 0x0172 (0370) I 20030000 min VDDGFXCURVEFREQ_P2                    : 800\n 0x0176 (0374) I ee020000 min VDDGFXCURVEVOLTAGE_P2                 : 750\n 0x017a (0378) I 20030000 min VDDGFXCURVEFREQ_P3                    : 800\n 0x017e (0382) I ee020000 min VDDGFXCURVEVOLTAGE_P3                 : 750\n 0x0182 (0386) I 71020000 min UCLKFMAX                              : 625\n 0x0186 (0390) I 32000000 min POWERPERCENTAGE                       : 50\n 0x018a (0394) I 4c040000 min FANRPMMIN                             : 1100\n 0x018e (0398) I 4c040000 min FANRPMACOUSTICLIMIT                   : 1100\n 0x0192 (0402) I 19000000 min FANTARGETTEMPERATURE                  : 25\n 0x0196 (0406) I 32000000 min OPERATINGTEMPMAX                      : 50\n 0x019a (0410) I 00000000 min ACTIMING                              : 0\n 0x019e (0414) I 00000000 min FAN_ZERO_RPM_CONTROL                  : 0\n 0x01a2 (0418) I 00000000 min AUTOUVENGINE                          : 0\n 0x01a6 (0422) I 00000000 min AUTOOCENGINE                          : 0\n 0x01aa (0426) I 00000000 min AUTOOCMEMORY                          : 0\n 0x01ae (0430) I 19000000 min                                       : 25\n 0x01b2 (0434) I 0a000000 min                                       : 10\n 0x01b6 (0438) I 19000000 min                                       : 25\n 0x01ba (0442) I 0a000000 min                                       : 10\n 0x01be (0446) I 19000000 min                                       : 25\n 0x01c2 (0450) I 0a000000 min                                       : 10\n 0x01c6 (0454) I 19000000 min                                       : 25\n 0x01ca (0458) I 0a000000 min                                       : 10\n 0x01ce (0462) I 19000000 min                                       : 25\n 0x01d2 (0466) I 0a000000 min                                       : 10\n 0x01d6 (0470) I 00000000 min                                       : 0\n 0x01da (0474) I 00000000 min                                       : 0\n 0x01de (0478) I 00000000 min                                       : 0\n 0x01e2 (0482) I 08000000 Version                                   : 8\n 0x01e6 (0486) I ffafdfb3 FeaturesToRun                             : 3017781247\n 0x01ea (0490) I 23060000 FeaturesToRun                             : 1571\n 0x01ee (0494) H     b400 SocketPowerLimitAc                        : 180\n 0x01f0 (0496) H     0000 SocketPowerLimitAc                        : 0\n 0x01f2 (0498) H     0000 SocketPowerLimitAc                        : 0\n 0x01f4 (0500) H     0000 SocketPowerLimitAc                        : 0\n 0x01f6 (0502) H     0000 SocketPowerLimitAcTau                     : 0\n 0x01f8 (0504) H     0000 SocketPowerLimitAcTau                     : 0\n 0x01fa (0506) H     0000 SocketPowerLimitAcTau                     : 0\n 0x01fc (0508) H     0000 SocketPowerLimitAcTau                     : 0\n 0x01fe (0510) H     b400 SocketPowerLimitDc                        : 180\n 0x0200 (0512) H     0000 SocketPowerLimitDc                        : 0\n 0x0202 (0514) H     0000 SocketPowerLimitDc                        : 0\n 0x0204 (0516) H     0000 SocketPowerLimitDc                        : 0\n 0x0206 (0518) H     0000 SocketPowerLimitDcTau                     : 0\n 0x0208 (0520) H     0000 SocketPowerLimitDcTau                     : 0\n 0x020a (0522) H     0000 SocketPowerLimitDcTau                     : 0\n 0x020c (0524) H     0000 SocketPowerLimitDcTau                     : 0\n 0x020e (0526) H     0e00 TdcLimitSoc                               : 14\n 0x0210 (0528) H     0000 TdcLimitSocTau                            : 0\n 0x0212 (0530) H     aa00 TdcLimitGfx                               : 170\n 0x0214 (0532) H     0000 TdcLimitGfxTau                            : 0\n 0x0216 (0534) H     6400 TedgeLimit                                : 100\n 0x0218 (0536) H     6e00 ThotspotLimit                             : 110\n 0x021a (0538) H     6900 TmemLimit                                 : 105\n 0x021c (0540) H     7300 Tvr_gfxLimit                              : 115\n 0x021e (0542) H     7300 Tvr_mem0Limit                             : 115\n 0x0220 (0544) H     7300 Tvr_mem1Limit                             : 115\n 0x0222 (0546) H     7300 Tvr_socLimit                              : 115\n 0x0224 (0548) H     0000 Tliquid0Limit                             : 0\n 0x0226 (0550) H     0000 Tliquid1Limit                             : 0\n 0x0228 (0552) H     0000 TplxLimit                                 : 0\n 0x022a (0554) I 00000000 FitLimit                                  : 0\n 0x022e (0558) H     0000 PpmPowerLimit                             : 0\n 0x0230 (0560) H     0000 PpmTemperatureThreshold                   : 0\n 0x0232 (0562) I fe700000 ThrottlerControlMask                      : 28926\n 0x0236 (0566) I 01000000 FwDStateMask                              : 1\n 0x023a (0570) H     6400 UlvVoltageOffsetSoc                       : 100\n 0x023c (0572) H     6400 UlvVoltageOffsetGfx                       : 100\n 0x023e (0574) B       00 GceaLinkMgrIdleThreshold                  : 0\n 0x023f (0575) B       00 RlcUlvParams                              : 0\n 0x0240 (0576) B       00 RlcUlvParams                              : 0\n 0x0241 (0577) B       00 RlcUlvParams                              : 0\n 0x0242 (0578) B       00 UlvSmnclkDid                              : 0\n 0x0243 (0579) B       00 UlvMp1clkDid                              : 0\n 0x0244 (0580) B       00 UlvGfxclkBypass                           : 0\n 0x0245 (0581) B       00 Padding234                                : 0\n 0x0246 (0582) H     540b MinVoltageUlvGfx                          : 2900\n 0x0248 (0584) H     540b MinVoltageUlvSoc                          : 2900\n 0x024a (0586) H     b80b MinVoltageGfx                             : 3000\n 0x024c (0588) H     b80b MinVoltageSoc                             : 3000\n 0x024e (0590) H     c012 MaxVoltageGfx                             : 4800\n 0x0250 (0592) H     c012 MaxVoltageSoc                             : 4800\n 0x0252 (0594) H     4c00 LoadLineResistanceGfx                     : 76\n 0x0254 (0596) H     0000 LoadLineResistanceSoc                     : 0\n 0x0256 (0598) B       01 VoltageMode                               : 1\n 0x0257 (0599) B       00 SnapToDiscrete                            : 0\n 0x0258 (0600) B       02 NumDiscreteLevels                         : 2\n 0x0259 (0601) B       00 Padding                                   : 0\n 0x025a (0602) f 00000000 m                                         : 0\n 0x025e (0606) f 00000000 b                                         : 0\n 0x0262 (0610) f 8126823e a                                         : 0.2542\n 0x0266 (0614) f a4705dbe b                                         :-0.21625\n 0x026a (0618) f b51a323f c                                         : 0.69572\n 0x026e (0622) B       01 VoltageMode                               : 1\n 0x026f (0623) B       00 SnapToDiscrete                            : 0\n 0x0270 (0624) B       02 NumDiscreteLevels                         : 2\n 0x0271 (0625) B       00 Padding                                   : 0\n 0x0272 (0626) f 0000803f m                                         : 1\n 0x0276 (0630) f 00000000 b                                         : 0\n 0x027a (0634) f f1ba5e3e a                                         : 0.21751\n 0x027e (0638) f abb26fbd b                                         :-0.05852\n 0x0282 (0642) f 45f5363f c                                         : 0.71468\n 0x0286 (0646) B       01 VoltageMode                               : 1\n 0x0287 (0647) B       01 SnapToDiscrete                            : 1\n 0x0288 (0648) B       04 NumDiscreteLevels                         : 4\n 0x0289 (0649) B       00 Padding                                   : 0\n 0x028a (0650) f 0000803f m                                         : 1\n 0x028e (0654) f 00000000 b                                         : 0\n 0x0292 (0658) f f1ba5e3e a                                         : 0.21751\n 0x0296 (0662) f abb26fbd b                                         :-0.05852\n 0x029a (0666) f 45f5363f c                                         : 0.71468\n 0x029e (0670) B       01 VoltageMode                               : 1\n 0x029f (0671) B       00 SnapToDiscrete                            : 0\n 0x02a0 (0672) B       02 NumDiscreteLevels                         : 2\n 0x02a1 (0673) B       00 Padding                                   : 0\n 0x02a2 (0674) f d8f0243f m                                         : 0.6443\n 0x02a6 (0678) f 35ef083f b                                         : 0.5349\n 0x02aa (0682) f 00000000 a                                         : 0\n 0x02ae (0686) f d42bc53e b                                         : 0.3851\n 0x02b2 (0690) f 575b113f c                                         : 0.5678\n 0x02b6 (0694) B       01 VoltageMode                               : 1\n 0x02b7 (0695) B       00 SnapToDiscrete                            : 0\n 0x02b8 (0696) B       02 NumDiscreteLevels                         : 2\n 0x02b9 (0697) B       00 Padding                                   : 0\n 0x02ba (0698) f 0a68023f m                                         : 0.5094\n 0x02be (0702) f 14ae173f b                                         : 0.5925\n 0x02c2 (0706) f 00000000 a                                         : 0\n 0x02c6 (0710) f 8351a93e b                                         : 0.3307\n 0x02ca (0714) f 3789113f c                                         : 0.5685\n 0x02ce (0718) B       01 VoltageMode                               : 1\n 0x02cf (0719) B       00 SnapToDiscrete                            : 0\n 0x02d0 (0720) B       02 NumDiscreteLevels                         : 2\n 0x02d1 (0721) B       00 Padding                                   : 0\n 0x02d2 (0722) f 9cc4a03f m                                         : 1.256\n 0x02d6 (0726) f 8e06b0be b                                         :-0.3438\n 0x02da (0730) f 00000000 a                                         : 0\n 0x02de (0734) f e3c7083f b                                         : 0.5343\n 0x02e2 (0738) f ec2f7b3e c                                         : 0.2453\n 0x02e6 (0742) B       01 VoltageMode                               : 1\n 0x02e7 (0743) B       00 SnapToDiscrete                            : 0\n 0x02e8 (0744) B       02 NumDiscreteLevels                         : 2\n 0x02e9 (0745) B       00 Padding                                   : 0\n 0x02ea (0746) f 6154523f m                                         : 0.8216\n 0x02ee (0750) f d7346f3c b                                         : 0.0146\n 0x02f2 (0754) f 00000000 a                                         : 0\n 0x02f6 (0758) f fd87f43e b                                         : 0.4776\n 0x02fa (0762) f ca54813e c                                         : 0.2526\n 0x02fe (0766) B       02 VoltageMode                               : 2\n 0x02ff (0767) B       00 SnapToDiscrete                            : 0\n 0x0300 (0768) B       02 NumDiscreteLevels                         : 2\n 0x0301 (0769) B       00 Padding                                   : 0\n 0x0302 (0770) f 00000000 m                                         : 0\n 0x0306 (0774) f 00000000 b                                         : 0\n 0x030a (0778) f 00000000 a                                         : 0\n 0x030e (0782) f 00000000 b                                         : 0\n 0x0312 (0786) f 00000000 c                                         : 0\n 0x0316 (0790) B       02 VoltageMode                               : 2\n 0x0317 (0791) B       00 SnapToDiscrete                            : 0\n 0x0318 (0792) B       02 NumDiscreteLevels                         : 2\n 0x0319 (0793) B       00 Padding                                   : 0\n 0x031a (0794) f 00000000 m                                         : 0\n 0x031e (0798) f 00000000 b                                         : 0\n 0x0322 (0802) f 00000000 a                                         : 0\n 0x0326 (0806) f 00000000 b                                         : 0\n 0x032a (0810) f 00000000 c                                         : 0\n 0x032e (0814) H     2c01 FreqTableGfx                              : 300\n 0x0330 (0816) H     3408 FreqTableGfx                              : 2100\n 0x0332 (0818) H     7805 FreqTableGfx                              : 1400\n 0x0334 (0820) H     7805 FreqTableGfx                              : 1400\n 0x0336 (0822) H     7805 FreqTableGfx                              : 1400\n 0x0338 (0824) H     7805 FreqTableGfx                              : 1400\n 0x033a (0826) H     7805 FreqTableGfx                              : 1400\n 0x033c (0828) H     7805 FreqTableGfx                              : 1400\n 0x033e (0830) H     7805 FreqTableGfx                              : 1400\n 0x0340 (0832) H     7805 FreqTableGfx                              : 1400\n 0x0342 (0834) H     7805 FreqTableGfx                              : 1400\n 0x0344 (0836) H     7805 FreqTableGfx                              : 1400\n 0x0346 (0838) H     7805 FreqTableGfx                              : 1400\n 0x0348 (0840) H     7805 FreqTableGfx                              : 1400\n 0x034a (0842) H     7805 FreqTableGfx                              : 1400\n 0x034c (0844) H     7805 FreqTableGfx                              : 1400\n 0x034e (0846) H     6400 FreqTableVclk                             : 100\n 0x0350 (0848) H     f304 FreqTableVclk                             : 1267\n 0x0352 (0850) H     f304 FreqTableVclk                             : 1267\n 0x0354 (0852) H     f304 FreqTableVclk                             : 1267\n 0x0356 (0854) H     f304 FreqTableVclk                             : 1267\n 0x0358 (0856) H     f304 FreqTableVclk                             : 1267\n 0x035a (0858) H     f304 FreqTableVclk                             : 1267\n 0x035c (0860) H     f304 FreqTableVclk                             : 1267\n 0x035e (0862) H     6400 FreqTableDclk                             : 100\n 0x0360 (0864) H     3e04 FreqTableDclk                             : 1086\n 0x0362 (0866) H     3e04 FreqTableDclk                             : 1086\n 0x0364 (0868) H     3e04 FreqTableDclk                             : 1086\n 0x0366 (0870) H     3e04 FreqTableDclk                             : 1086\n 0x0368 (0872) H     3e04 FreqTableDclk                             : 1086\n 0x036a (0874) H     3e04 FreqTableDclk                             : 1086\n 0x036c (0876) H     3e04 FreqTableDclk                             : 1086\n 0x036e (0878) H     fb01 FreqTableSocclk                           : 507\n 0x0370 (0880) H     f304 FreqTableSocclk                           : 1267\n 0x0372 (0882) H     b603 FreqTableSocclk                           : 950\n 0x0374 (0884) H     b603 FreqTableSocclk                           : 950\n 0x0376 (0886) H     b603 FreqTableSocclk                           : 950\n 0x0378 (0888) H     b603 FreqTableSocclk                           : 950\n 0x037a (0890) H     b603 FreqTableSocclk                           : 950\n 0x037c (0892) H     b603 FreqTableSocclk                           : 950\n 0x037e (0894) H     6400 FreqTableUclk                             : 100\n 0x0380 (0896) H     f401 FreqTableUclk                             : 500\n 0x0382 (0898) H     7102 FreqTableUclk                             : 625\n 0x0384 (0900) H     6b03 FreqTableUclk                             : 875\n 0x0386 (0902) H     fb01 FreqTableDcefclk                          : 507\n 0x0388 (0904) H     f304 FreqTableDcefclk                          : 1267\n 0x038a (0906) H     f304 FreqTableDcefclk                          : 1267\n 0x038c (0908) H     f304 FreqTableDcefclk                          : 1267\n 0x038e (0910) H     f304 FreqTableDcefclk                          : 1267\n 0x0390 (0912) H     f304 FreqTableDcefclk                          : 1267\n 0x0392 (0914) H     f304 FreqTableDcefclk                          : 1267\n 0x0394 (0916) H     f304 FreqTableDcefclk                          : 1267\n 0x0396 (0918) H     3401 FreqTableDispclk                          : 308\n 0x0398 (0920) H     0405 FreqTableDispclk                          : 1284\n 0x039a (0922) H     0405 FreqTableDispclk                          : 1284\n 0x039c (0924) H     0405 FreqTableDispclk                          : 1284\n 0x039e (0926) H     0405 FreqTableDispclk                          : 1284\n 0x03a0 (0928) H     0405 FreqTableDispclk                          : 1284\n 0x03a2 (0930) H     0405 FreqTableDispclk                          : 1284\n 0x03a4 (0932) H     0405 FreqTableDispclk                          : 1284\n 0x03a6 (0934) H     2c01 FreqTablePixclk                           : 300\n 0x03a8 (0936) H     0405 FreqTablePixclk                           : 1284\n 0x03aa (0938) H     a404 FreqTablePixclk                           : 1188\n 0x03ac (0940) H     a404 FreqTablePixclk                           : 1188\n 0x03ae (0942) H     a404 FreqTablePixclk                           : 1188\n 0x03b0 (0944) H     a404 FreqTablePixclk                           : 1188\n 0x03b2 (0946) H     a404 FreqTablePixclk                           : 1188\n 0x03b4 (0948) H     a404 FreqTablePixclk                           : 1188\n 0x03b6 (0950) H     2c01 FreqTablePhyclk                           : 300\n 0x03b8 (0952) H     2a03 FreqTablePhyclk                           : 810\n 0x03ba (0954) H     2a03 FreqTablePhyclk                           : 810\n 0x03bc (0956) H     2a03 FreqTablePhyclk                           : 810\n 0x03be (0958) H     2a03 FreqTablePhyclk                           : 810\n 0x03c0 (0960) H     2a03 FreqTablePhyclk                           : 810\n 0x03c2 (0962) H     2a03 FreqTablePhyclk                           : 810\n 0x03c4 (0964) H     2a03 FreqTablePhyclk                           : 810\n 0x03c6 (0966) I d001d001 Paddingclks                               : 30409168\n 0x03ca (0970) I d001d001 Paddingclks                               : 30409168\n 0x03ce (0974) I d001d001 Paddingclks                               : 30409168\n 0x03d2 (0978) I d001d001 Paddingclks                               : 30409168\n 0x03d6 (0982) I d001d001 Paddingclks                               : 30409168\n 0x03da (0986) I d001d001 Paddingclks                               : 30409168\n 0x03de (0990) I d001d001 Paddingclks                               : 30409168\n 0x03e2 (0994) I d001d001 Paddingclks                               : 30409168\n 0x03e6 (0998) I d001d001 Paddingclks                               : 30409168\n 0x03ea (1002) I d001d001 Paddingclks                               : 30409168\n 0x03ee (1006) I d001d001 Paddingclks                               : 30409168\n 0x03f2 (1010) I d001d001 Paddingclks                               : 30409168\n 0x03f6 (1014) I d001d001 Paddingclks                               : 30409168\n 0x03fa (1018) I d001d001 Paddingclks                               : 30409168\n 0x03fe (1022) I d001d001 Paddingclks                               : 30409168\n 0x0402 (1026) I d001d001 Paddingclks                               : 30409168\n 0x0406 (1030) H     3408 DcModeMaxFreq                             : 2100\n 0x0408 (1032) H     f304 DcModeMaxFreq                             : 1267\n 0x040a (1034) H     6b03 DcModeMaxFreq                             : 875\n 0x040c (1036) H     3e04 DcModeMaxFreq                             : 1086\n 0x040e (1038) H     f304 DcModeMaxFreq                             : 1267\n 0x0410 (1040) H     f304 DcModeMaxFreq                             : 1267\n 0x0412 (1042) H     0405 DcModeMaxFreq                             : 1284\n 0x0414 (1044) H     0405 DcModeMaxFreq                             : 1284\n 0x0416 (1046) H     2a03 DcModeMaxFreq                             : 810\n 0x0418 (1048) H     d001 Padding8_Clks                             : 464\n 0x041a (1050) B       00 FreqTableUclkDiv                          : 0\n 0x041b (1051) B       03 FreqTableUclkDiv                          : 3\n 0x041c (1052) B       03 FreqTableUclkDiv                          : 3\n 0x041d (1053) B       03 FreqTableUclkDiv                          : 3\n 0x041e (1054) H     3001 Mp0clkFreq                                : 304\n 0x0420 (1056) H     fb01 Mp0clkFreq                                : 507\n 0x0422 (1058) H     b80b Mp0DpmVoltage                             : 3000\n 0x0424 (1060) H     b80b Mp0DpmVoltage                             : 3000\n 0x0426 (1062) H     8c0a MemVddciVoltage                           : 2700\n 0x0428 (1064) H     480d MemVddciVoltage                           : 3400\n 0x042a (1066) H     480d MemVddciVoltage                           : 3400\n 0x042c (1068) H     480d MemVddciVoltage                           : 3400\n 0x042e (1070) H     8813 MemMvddVoltage                            : 5000\n 0x0430 (1072) H     1815 MemMvddVoltage                            : 5400\n 0x0432 (1074) H     1815 MemMvddVoltage                            : 5400\n 0x0434 (1076) H     1815 MemMvddVoltage                            : 5400\n 0x0436 (1078) H     2003 GfxclkFgfxoffEntry                        : 800\n 0x0438 (1080) H     2003 GfxclkFinit                               : 800\n 0x043a (1082) H     2003 GfxclkFidle                               : 800\n 0x043c (1084) H     0000 GfxclkSlewRate                            : 0\n 0x043e (1086) H     0000 GfxclkFopt                                : 0\n 0x0440 (1088) B       d0 Padding567                                : 208\n 0x0441 (1089) B       01 Padding567                                : 1\n 0x0442 (1090) H     0000 GfxclkDsMaxFreq                           : 0\n 0x0444 (1092) B       01 GfxclkSource                              : 1\n 0x0445 (1093) B       02 Padding456                                : 2\n 0x0446 (1094) B       00 LowestUclkReservedForUlv                  : 0\n 0x0447 (1095) B       00 Uclk                                      : 0\n 0x0448 (1096) B       5b Uclk                                      : 91\n 0x0449 (1097) B       00 Uclk                                      : 0\n 0x044a (1098) B       00 MemoryType                                : 0\n 0x044b (1099) B       10 MemoryChannels                            : 16\n 0x044c (1100) B       00 PaddingMem                                : 0\n 0x044d (1101) B       00 PaddingMem                                : 0\n 0x044e (1102) B       00 PcieGenSpeed                              : 0\n 0x044f (1103) B       03 PcieGenSpeed                              : 3\n 0x0450 (1104) B       06 PcieLaneCount                             : 6\n 0x0451 (1105) B       06 PcieLaneCount                             : 6\n 0x0452 (1106) H     6b02 LclkFreq                                  : 619\n 0x0454 (1108) H     6b02 LclkFreq                                  : 619\n 0x0456 (1110) H     0000 EnableTdpm                                : 0\n 0x0458 (1112) H     0000 TdpmHighHystTemperature                   : 0\n 0x045a (1114) H     0000 TdpmLowHystTemperature                    : 0\n 0x045c (1116) H     0000 GfxclkFreqHighTempLimit                   : 0\n 0x045e (1118) H     0000 FanStopTemp                               : 0\n 0x0460 (1120) H     0000 FanStartTemp                              : 0\n 0x0462 (1122) H     9001 FanGainEdge                               : 400\n 0x0464 (1124) H     9001 FanGainHotspot                            : 400\n 0x0466 (1126) H     9001 FanGainLiquid0                            : 400\n 0x0468 (1128) H     9001 FanGainLiquid1                            : 400\n 0x046a (1130) H     9001 FanGainVrGfx                              : 400\n 0x046c (1132) H     9001 FanGainVrSoc                              : 400\n 0x046e (1134) H     9001 FanGainVrMem0                             : 400\n 0x0470 (1136) H     9001 FanGainVrMem1                             : 400\n 0x0472 (1138) H     9001 FanGainPlx                                : 400\n 0x0474 (1140) H     9001 FanGainMem                                : 400\n 0x0476 (1142) H     1400 FanPwmMin                                 : 20\n 0x0478 (1144) H     3408 FanAcousticLimitRpm                       : 2100\n 0x047a (1146) H     3408 FanThrottlingRpm                          : 2100\n 0x047c (1148) H     5613 FanMaximumRpm                             : 4950\n 0x047e (1150) H     5a00 FanTargetTemperature                      : 90\n 0x0480 (1152) H     2003 FanTargetGfxclk                           : 800\n 0x0482 (1154) B       01 FanTempInputSelect                        : 1\n 0x0483 (1155) B       00 FanPadding                                : 0\n 0x0484 (1156) B       00 FanZeroRpmEnable                          : 0\n 0x0485 (1157) B       02 FanTachEdgePerRev                         : 2\n 0x0486 (1158) h     0000 FuzzyFan_ErrorSetDelta                    : 0\n 0x0488 (1160) h     0000 FuzzyFan_ErrorRateSetDelta                : 0\n 0x048a (1162) h     0000 FuzzyFan_PwmSetDelta                      : 0\n 0x048c (1164) H     0000 FuzzyFan_Reserved                         : 0\n 0x048e (1166) B       00 OverrideAvfsGb                            : 0\n 0x048f (1167) B       00 OverrideAvfsGb                            : 0\n 0x0490 (1168) B       00 Padding8_Avfs                             : 0\n 0x0491 (1169) B       00 Padding8_Avfs                             : 0\n 0x0492 (1170) f 47e6913c a                                         : 0.01781\n 0x0496 (1174) f aca841bd b                                         :-0.04728\n 0x049a (1178) f 13445d3d c                                         : 0.05402\n 0x049e (1182) f 00000000 a                                         : 0\n 0x04a2 (1186) f 00000000 b                                         : 0\n 0x04a6 (1190) f 8fc2f53c c                                         : 0.03\n 0x04aa (1194) f 00000000 a                                         : 0\n 0x04ae (1198) f 00000000 b                                         : 0\n 0x04b2 (1202) f 00000000 c                                         : 0\n 0x04b6 (1206) f 4bc8c73d a                                         : 0.09755\n 0x04ba (1210) f 9834463d b                                         : 0.04839\n 0x04be (1214) f 7042a1bd c                                         :-0.07874\n 0x04c2 (1218) f af5a193b a                                         : 0.00234\n 0x04c6 (1222) f 8ca11cbb b                                         :-0.00239\n 0x04ca (1226) f f836bd3d c                                         : 0.09239\n 0x04ce (1230) f 00000000 m                                         : 0\n 0x04d2 (1234) f 00000000 b                                         : 0\n 0x04d6 (1238) f 00000000 m                                         : 0\n 0x04da (1242) f 00000000 b                                         : 0\n 0x04de (1246) f 00000000 a                                         : 0\n 0x04e2 (1250) f 00000000 b                                         : 0\n 0x04e6 (1254) f 00000000 c                                         : 0\n 0x04ea (1258) f 00000000 a                                         : 0\n 0x04ee (1262) f 00000000 b                                         : 0\n 0x04f2 (1266) f 00000000 c                                         : 0\n 0x04f6 (1270) H     a000 DcTol                                     : 160\n 0x04f8 (1272) H     a000 DcTol                                     : 160\n 0x04fa (1274) B       01 DcBtcEnabled                              : 1\n 0x04fb (1275) B       01 DcBtcEnabled                              : 1\n 0x04fc (1276) B       00 Padding8_GfxBtc                           : 0\n 0x04fd (1277) B       00 Padding8_GfxBtc                           : 0\n 0x04fe (1278) H     0000 DcBtcMin                                  : 0\n 0x0500 (1280) H     0000 DcBtcMin                                  : 0\n 0x0502 (1282) H     a000 DcBtcMax                                  : 160\n 0x0504 (1284) H     a000 DcBtcMax                                  : 160\n 0x0506 (1286) I 00020000 DebugOverrides                            : 512\n 0x050a (1290) f 00000000 a                                         : 0\n 0x050e (1294) f 00000000 b                                         : 0\n 0x0512 (1298) f 00000000 c                                         : 0\n 0x0516 (1302) f 00000000 a                                         : 0\n 0x051a (1306) f 00000000 b                                         : 0\n 0x051e (1310) f 00000000 c                                         : 0\n 0x0522 (1314) f 00000000 a                                         : 0\n 0x0526 (1318) f 00000000 b                                         : 0\n 0x052a (1322) f 00000000 c                                         : 0\n 0x052e (1326) f 00000000 a                                         : 0\n 0x0532 (1330) f 00000000 b                                         : 0\n 0x0536 (1334) f 00000000 c                                         : 0\n 0x053a (1338) B       01 TotalPowerConfig                          : 1\n 0x053b (1339) B       00 TotalPowerSpare1                          : 0\n 0x053c (1340) H     0000 TotalPowerSpare2                          : 0\n 0x053e (1342) H     0000 PccThresholdLow                           : 0\n 0x0540 (1344) H     0000 PccThresholdHigh                          : 0\n 0x0542 (1346) I 00000000 MGpuFanBoostLimitRpm                      : 0\n 0x0546 (1350) I 00000000 PaddingAPCC                               : 0\n 0x054a (1354) I 00000000 PaddingAPCC                               : 0\n 0x054e (1358) I 00000000 PaddingAPCC                               : 0\n 0x0552 (1362) I 00000000 PaddingAPCC                               : 0\n 0x0556 (1366) I 00000000 PaddingAPCC                               : 0\n 0x055a (1370) H     0000 VDDGFX_TVmin                              : 0\n 0x055c (1372) H     0000 VDDSOC_TVmin                              : 0\n 0x055e (1374) H     0000 VDDGFX_Vmin_HiTemp                        : 0\n 0x0560 (1376) H     0000 VDDGFX_Vmin_LoTemp                        : 0\n 0x0562 (1378) H     0000 VDDSOC_Vmin_HiTemp                        : 0\n 0x0564 (1380) H     0000 VDDSOC_Vmin_LoTemp                        : 0\n 0x0566 (1382) H     0000 VDDGFX_TVminHystersis                     : 0\n 0x0568 (1384) H     0000 VDDSOC_TVminHystersis                     : 0\n 0x056a (1386) I 00000000 BtcConfig                                 : 0\n 0x056e (1390) H     a901 SsFmin                                    : 425\n 0x0570 (1392) H     8700 SsFmin                                    : 135\n 0x0572 (1394) H     8700 SsFmin                                    : 135\n 0x0574 (1396) H     0000 SsFmin                                    : 0\n 0x0576 (1398) H     0000 SsFmin                                    : 0\n 0x0578 (1400) H     0000 SsFmin                                    : 0\n 0x057a (1402) H     0000 SsFmin                                    : 0\n 0x057c (1404) H     0000 SsFmin                                    : 0\n 0x057e (1406) H     0000 SsFmin                                    : 0\n 0x0580 (1408) H     0000 SsFmin                                    : 0\n 0x0582 (1410) H     1900 DcBtcGb                                   : 25\n 0x0584 (1412) H     1900 DcBtcGb                                   : 25\n 0x0586 (1414) I 00000000 Reserved                                  : 0\n 0x058a (1418) I 00000000 Reserved                                  : 0\n 0x058e (1422) I 00000000 Reserved                                  : 0\n 0x0592 (1426) I 00000000 Reserved                                  : 0\n 0x0596 (1430) I 00000000 Reserved                                  : 0\n 0x059a (1434) I 00000000 Reserved                                  : 0\n 0x059e (1438) I 00000000 Reserved                                  : 0\n 0x05a2 (1442) I 00000000 Reserved                                  : 0\n 0x05a6 (1446) B       00 Enabled                                   : 0\n 0x05a7 (1447) B       00 Speed                                     : 0\n 0x05a8 (1448) B       00 Padding                                   : 0\n 0x05a9 (1449) B       00 Padding                                   : 0\n 0x05aa (1450) I 00000000 SlaveAddress                              : 0\n 0x05ae (1454) B       00 ControllerPort                            : 0\n 0x05af (1455) B       00 ControllerName                            : 0\n 0x05b0 (1456) B       00 ThermalThrotter                           : 0\n 0x05b1 (1457) B       00 I2cProtocol                               : 0\n 0x05b2 (1458) B       00 Enabled                                   : 0\n 0x05b3 (1459) B       00 Speed                                     : 0\n 0x05b4 (1460) B       00 Padding                                   : 0\n 0x05b5 (1461) B       00 Padding                                   : 0\n 0x05b6 (1462) I 00000000 SlaveAddress                              : 0\n 0x05ba (1466) B       00 ControllerPort                            : 0\n 0x05bb (1467) B       00 ControllerName                            : 0\n 0x05bc (1468) B       00 ThermalThrotter                           : 0\n 0x05bd (1469) B       00 I2cProtocol                               : 0\n 0x05be (1470) B       00 Enabled                                   : 0\n 0x05bf (1471) B       00 Speed                                     : 0\n 0x05c0 (1472) B       00 Padding                                   : 0\n 0x05c1 (1473) B       00 Padding                                   : 0\n 0x05c2 (1474) I 00000000 SlaveAddress                              : 0\n 0x05c6 (1478) B       00 ControllerPort                            : 0\n 0x05c7 (1479) B       00 ControllerName                            : 0\n 0x05c8 (1480) B       00 ThermalThrotter                           : 0\n 0x05c9 (1481) B       00 I2cProtocol                               : 0\n 0x05ca (1482) B       00 Enabled                                   : 0\n 0x05cb (1483) B       00 Speed                                     : 0\n 0x05cc (1484) B       00 Padding                                   : 0\n 0x05cd (1485) B       00 Padding                                   : 0\n 0x05ce (1486) I 00000000 SlaveAddress                              : 0\n 0x05d2 (1490) B       00 ControllerPort                            : 0\n 0x05d3 (1491) B       00 ControllerName                            : 0\n 0x05d4 (1492) B       00 ThermalThrotter                           : 0\n 0x05d5 (1493) B       00 I2cProtocol                               : 0\n 0x05d6 (1494) B       00 Enabled                                   : 0\n 0x05d7 (1495) B       00 Speed                                     : 0\n 0x05d8 (1496) B       00 Padding                                   : 0\n 0x05d9 (1497) B       00 Padding                                   : 0\n 0x05da (1498) I 00000000 SlaveAddress                              : 0\n 0x05de (1502) B       00 ControllerPort                            : 0\n 0x05df (1503) B       00 ControllerName                            : 0\n 0x05e0 (1504) B       00 ThermalThrotter                           : 0\n 0x05e1 (1505) B       00 I2cProtocol                               : 0\n 0x05e2 (1506) B       00 Enabled                                   : 0\n 0x05e3 (1507) B       00 Speed                                     : 0\n 0x05e4 (1508) B       00 Padding                                   : 0\n 0x05e5 (1509) B       00 Padding                                   : 0\n 0x05e6 (1510) I 00000000 SlaveAddress                              : 0\n 0x05ea (1514) B       00 ControllerPort                            : 0\n 0x05eb (1515) B       00 ControllerName                            : 0\n 0x05ec (1516) B       00 ThermalThrotter                           : 0\n 0x05ed (1517) B       00 I2cProtocol                               : 0\n 0x05ee (1518) B       00 Enabled                                   : 0\n 0x05ef (1519) B       00 Speed                                     : 0\n 0x05f0 (1520) B       00 Padding                                   : 0\n 0x05f1 (1521) B       00 Padding                                   : 0\n 0x05f2 (1522) I 00000000 SlaveAddress                              : 0\n 0x05f6 (1526) B       00 ControllerPort                            : 0\n 0x05f7 (1527) B       00 ControllerName                            : 0\n 0x05f8 (1528) B       00 ThermalThrotter                           : 0\n 0x05f9 (1529) B       00 I2cProtocol                               : 0\n 0x05fa (1530) B       00 Enabled                                   : 0\n 0x05fb (1531) B       00 Speed                                     : 0\n 0x05fc (1532) B       00 Padding                                   : 0\n 0x05fd (1533) B       00 Padding                                   : 0\n 0x05fe (1534) I 00000000 SlaveAddress                              : 0\n 0x0602 (1538) B       00 ControllerPort                            : 0\n 0x0603 (1539) B       00 ControllerName                            : 0\n 0x0604 (1540) B       00 ThermalThrotter                           : 0\n 0x0605 (1541) B       00 I2cProtocol                               : 0\n 0x0606 (1542) H     0000 MaxVoltageStepGfx                         : 0\n 0x0608 (1544) H     0000 MaxVoltageStepSoc                         : 0\n 0x060a (1546) B       00 VddGfxVrMapping                           : 0\n 0x060b (1547) B       00 VddSocVrMapping                           : 0\n 0x060c (1548) B       00 VddMem0VrMapping                          : 0\n 0x060d (1549) B       00 VddMem1VrMapping                          : 0\n 0x060e (1550) B       00 GfxUlvPhaseSheddingMask                   : 0\n 0x060f (1551) B       00 SocUlvPhaseSheddingMask                   : 0\n 0x0610 (1552) B       00 ExternalSensorPresent                     : 0\n 0x0611 (1553) B       00 Padding8_V                                : 0\n 0x0612 (1554) H     0000 GfxMaxCurrent                             : 0\n 0x0614 (1556) b       00 GfxOffset                                 : 0\n 0x0615 (1557) B       00 Padding_TelemetryGfx                      : 0\n 0x0616 (1558) H     0000 SocMaxCurrent                             : 0\n 0x0618 (1560) b       00 SocOffset                                 : 0\n 0x0619 (1561) B       00 Padding_TelemetrySoc                      : 0\n 0x061a (1562) H     0000 Mem0MaxCurrent                            : 0\n 0x061c (1564) b       00 Mem0Offset                                : 0\n 0x061d (1565) B       00 Padding_TelemetryMem0                     : 0\n 0x061e (1566) H     0000 Mem1MaxCurrent                            : 0\n 0x0620 (1568) b       00 Mem1Offset                                : 0\n 0x0621 (1569) B       00 Padding_TelemetryMem1                     : 0\n 0x0622 (1570) B       00 AcDcGpio                                  : 0\n 0x0623 (1571) B       00 AcDcPolarity                              : 0\n 0x0624 (1572) B       00 VR0HotGpio                                : 0\n 0x0625 (1573) B       00 VR0HotPolarity                            : 0\n 0x0626 (1574) B       00 VR1HotGpio                                : 0\n 0x0627 (1575) B       00 VR1HotPolarity                            : 0\n 0x0628 (1576) B       00 GthrGpio                                  : 0\n 0x0629 (1577) B       00 GthrPolarity                              : 0\n 0x062a (1578) B       00 LedPin0                                   : 0\n 0x062b (1579) B       00 LedPin1                                   : 0\n 0x062c (1580) B       00 LedPin2                                   : 0\n 0x062d (1581) B       00 padding8_4                                : 0\n 0x062e (1582) B       00 PllGfxclkSpreadEnabled                    : 0\n 0x062f (1583) B       00 PllGfxclkSpreadPercent                    : 0\n 0x0630 (1584) H     0000 PllGfxclkSpreadFreq                       : 0\n 0x0632 (1586) B       00 DfllGfxclkSpreadEnabled                   : 0\n 0x0633 (1587) B       00 DfllGfxclkSpreadPercent                   : 0\n 0x0634 (1588) H     0000 DfllGfxclkSpreadFreq                      : 0\n 0x0636 (1590) B       00 UclkSpreadEnabled                         : 0\n 0x0637 (1591) B       00 UclkSpreadPercent                         : 0\n 0x0638 (1592) H     0000 UclkSpreadFreq                            : 0\n 0x063a (1594) B       00 SoclkSpreadEnabled                        : 0\n 0x063b (1595) B       00 SocclkSpreadPercent                       : 0\n 0x063c (1596) H     0000 SocclkSpreadFreq                          : 0\n 0x063e (1598) H     0000 TotalBoardPower                           : 0\n 0x0640 (1600) H     0000 BoardPadding                              : 0\n 0x0642 (1602) I 00000000 MvddRatio                                 : 0\n 0x0646 (1606) B       00 RenesesLoadLineEnabled                    : 0\n 0x0647 (1607) B       00 GfxLoadlineResistance                     : 0\n 0x0648 (1608) B       00 SocLoadlineResistance                     : 0\n 0x0649 (1609) B       00 Padding8_Loadline                         : 0\n 0x064a (1610) I 00000000 BoardReserved                             : 0\n 0x064e (1614) I 00000000 BoardReserved                             : 0\n 0x0652 (1618) I 00000000 BoardReserved                             : 0\n 0x0656 (1622) I 00000000 BoardReserved                             : 0\n 0x065a (1626) I 00000000 BoardReserved                             : 0\n 0x065e (1630) I 00000000 BoardReserved                             : 0\n 0x0662 (1634) I 00000000 BoardReserved                             : 0\n 0x0666 (1638) I 00000000 BoardReserved                             : 0\n 0x066a (1642) I 00000000 MmHubPadding                              : 0\n 0x066e (1646) I 00000000 MmHubPadding                              : 0\n 0x0672 (1650) I 00000000 MmHubPadding                              : 0\n 0x0676 (1654) I 00000000 MmHubPadding                              : 0\n 0x067a (1658) I 00000000 MmHubPadding                              : 0\n 0x067e (1662) I 00000000 MmHubPadding                              : 0\n 0x0682 (1666) I 00000000 MmHubPadding                              : 0\n 0x0686 (1670) I 00000000 MmHubPadding                              : 0\n"
  },
  {
    "path": "test/AMD.RX6900XT.16384.201104.rom.dump",
    "content": "header:\n  structuresize: 2470\n  format_revision: 15\n  content_revision: 0\ntable_revision: 2\ntable_size: 802\ngolden_pp_id: 2479\ngolden_revision: 16503\nformat_id: 128\nplatform_caps: 24\nthermal_controller_type: 28\nsmall_power_limit1: 0\nsmall_power_limit2: 0\nboost_power_limit: 0\nsoftware_shutdown_temp: 118\nreserve:\n  reserve 0: 0\n  reserve 1: 0\n  reserve 2: 0\n  reserve 3: 0\n  reserve 4: 0\n  reserve 5: 0\n  reserve 6: 1\n  reserve 7: 0\npower_saving_clock:\n  revision: 1\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  count: 13\n  max:\n    max 0: 2660 (GFXCLK)\n    max 1: 1200 (SOCCLK)\n    max 2: 1000 (UCLK)\n    max 3: 1940 (FCLK)\n    max 4: 1266 (DCLK_0)\n    max 5: 1477 (VCLK_0)\n    max 6: 1266 (DCLK_1)\n    max 7: 1477 (VCLK_1)\n    max 8: 1200 (DCEFCLK)\n    max 9: 1217 (DISPCLK)\n    max 10: 1217 (PIXCLK)\n    max 11: 810 (PHYCLK)\n    max 12: 1217 (DTBCLK)\n    max 13: 0\n    max 14: 0\n    max 15: 0\n  min:\n    min 0: 500 (GFXCLK)\n    min 1: 480 (SOCCLK)\n    min 2: 97 (UCLK)\n    min 3: 550 (FCLK)\n    min 4: 317 (DCLK_0)\n    min 5: 363 (VCLK_0)\n    min 6: 317 (DCLK_1)\n    min 7: 363 (VCLK_1)\n    min 8: 418 (DCEFCLK)\n    min 9: 487 (DISPCLK)\n    min 10: 487 (PIXCLK)\n    min 11: 300 (PHYCLK)\n    min 12: 487 (DTBCLK)\n    min 13: 0\n    min 14: 0\n    min 15: 0\noverdrive_table:\n  revision: 129\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  feature_count: 16\n  setting_count: 30\n  cap:\n    cap 0: 1 (GFXCLK_LIMITS)\n    cap 1: 1 (GFXCLK_CURVE)\n    cap 2: 1 (UCLK_LIMITS)\n    cap 3: 1 (POWER_LIMIT)\n    cap 4: 1 (FAN_ACOUSTIC_LIMIT)\n    cap 5: 1 (FAN_SPEED_MIN)\n    cap 6: 1 (TEMPERATURE_FAN)\n    cap 7: 1 (TEMPERATURE_SYSTEM)\n    cap 8: 1 (MEMORY_TIMING_TUNE)\n    cap 9: 1 (FAN_ZERO_RPM_CONTROL)\n    cap 10: 1 (AUTO_UV_ENGINE)\n    cap 11: 1 (AUTO_OC_ENGINE)\n    cap 12: 1 (AUTO_OC_MEMORY)\n    cap 13: 1 (FAN_CURVE)\n    cap 14: 0 (SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT)\n    cap 15: 1 (POWER_MODE)\n    cap 16: 0\n    cap 17: 0\n    cap 18: 0\n    cap 19: 0\n    cap 20: 0\n    cap 21: 0\n    cap 22: 0\n    cap 23: 0\n    cap 24: 0\n    cap 25: 0\n    cap 26: 0\n    cap 27: 0\n    cap 28: 0\n    cap 29: 0\n    cap 30: 0\n    cap 31: 0\n  max:\n    max 0: 3000 (GFXCLKFMAX)\n    max 1: 3000 (GFXCLKFMIN)\n    max 2: 0 (CUSTOM_GFX_VF_CURVE_A)\n    max 3: 0 (CUSTOM_GFX_VF_CURVE_B)\n    max 4: 0 (CUSTOM_GFX_VF_CURVE_C)\n    max 5: 3000 (CUSTOM_CURVE_VFT_FMIN)\n    max 6: 1075 (UCLKFMIN)\n    max 7: 1075 (UCLKFMAX)\n    max 8: 15 (POWERPERCENTAGE)\n    max 9: 3300 (FANRPMMIN)\n    max 10: 3300 (FANRPMACOUSTICLIMIT)\n    max 11: 100 (FANTARGETTEMPERATURE)\n    max 12: 110 (OPERATINGTEMPMAX)\n    max 13: 1 (ACTIMING)\n    max 14: 1 (FAN_ZERO_RPM_CONTROL)\n    max 15: 1 (AUTOUVENGINE)\n    max 16: 1 (AUTOOCENGINE)\n    max 17: 1 (AUTOOCMEMORY)\n    max 18: 100 (FAN_CURVE_TEMPERATURE_1)\n    max 19: 100 (FAN_CURVE_SPEED_1)\n    max 20: 100 (FAN_CURVE_TEMPERATURE_2)\n    max 21: 100 (FAN_CURVE_SPEED_2)\n    max 22: 100 (FAN_CURVE_TEMPERATURE_3)\n    max 23: 100 (FAN_CURVE_SPEED_3)\n    max 24: 100 (FAN_CURVE_TEMPERATURE_4)\n    max 25: 100 (FAN_CURVE_SPEED_4)\n    max 26: 100 (FAN_CURVE_TEMPERATURE_5)\n    max 27: 100 (FAN_CURVE_SPEED_5)\n    max 28: 0 (AUTO_FAN_ACOUSTIC_LIMIT)\n    max 29: 1 (POWER_MODE)\n    max 30: 0\n    max 31: 0\n    max 32: 0\n    max 33: 0\n    max 34: 0\n    max 35: 0\n    max 36: 0\n    max 37: 0\n    max 38: 0\n    max 39: 0\n    max 40: 0\n    max 41: 0\n    max 42: 0\n    max 43: 0\n    max 44: 0\n    max 45: 0\n    max 46: 0\n    max 47: 0\n    max 48: 0\n    max 49: 0\n    max 50: 0\n    max 51: 0\n    max 52: 0\n    max 53: 0\n    max 54: 0\n    max 55: 0\n    max 56: 0\n    max 57: 0\n    max 58: 0\n    max 59: 0\n    max 60: 0\n    max 61: 0\n    max 62: 0\n    max 63: 0\n  min:\n    min 0: 500 (GFXCLKFMAX)\n    min 1: 500 (GFXCLKFMIN)\n    min 2: 0 (CUSTOM_GFX_VF_CURVE_A)\n    min 3: 0 (CUSTOM_GFX_VF_CURVE_B)\n    min 4: 0 (CUSTOM_GFX_VF_CURVE_C)\n    min 5: 500 (CUSTOM_CURVE_VFT_FMIN)\n    min 6: 674 (UCLKFMIN)\n    min 7: 674 (UCLKFMAX)\n    min 8: 10 (POWERPERCENTAGE)\n    min 9: 250 (FANRPMMIN)\n    min 10: 1000 (FANRPMACOUSTICLIMIT)\n    min 11: 25 (FANTARGETTEMPERATURE)\n    min 12: 50 (OPERATINGTEMPMAX)\n    min 13: 0 (ACTIMING)\n    min 14: 0 (FAN_ZERO_RPM_CONTROL)\n    min 15: 0 (AUTOUVENGINE)\n    min 16: 0 (AUTOOCENGINE)\n    min 17: 0 (AUTOOCMEMORY)\n    min 18: 25 (FAN_CURVE_TEMPERATURE_1)\n    min 19: 10 (FAN_CURVE_SPEED_1)\n    min 20: 25 (FAN_CURVE_TEMPERATURE_2)\n    min 21: 10 (FAN_CURVE_SPEED_2)\n    min 22: 25 (FAN_CURVE_TEMPERATURE_3)\n    min 23: 10 (FAN_CURVE_SPEED_3)\n    min 24: 25 (FAN_CURVE_TEMPERATURE_4)\n    min 25: 10 (FAN_CURVE_SPEED_4)\n    min 26: 25 (FAN_CURVE_TEMPERATURE_5)\n    min 27: 10 (FAN_CURVE_SPEED_5)\n    min 28: 0 (AUTO_FAN_ACOUSTIC_LIMIT)\n    min 29: 0 (POWER_MODE)\n    min 30: 0\n    min 31: 0\n    min 32: 0\n    min 33: 0\n    min 34: 0\n    min 35: 0\n    min 36: 0\n    min 37: 0\n    min 38: 0\n    min 39: 0\n    min 40: 0\n    min 41: 0\n    min 42: 0\n    min 43: 0\n    min 44: 0\n    min 45: 0\n    min 46: 0\n    min 47: 0\n    min 48: 0\n    min 49: 0\n    min 50: 0\n    min 51: 0\n    min 52: 0\n    min 53: 0\n    min 54: 0\n    min 55: 0\n    min 56: 0\n    min 57: 0\n    min 58: 0\n    min 59: 0\n    min 60: 0\n    min 61: 0\n    min 62: 0\n    min 63: 0\n  pm_setting:\n    pm_setting 0: 6\n    pm_setting 1: 0\n    pm_setting 2: 6\n    pm_setting 3: 6\n    pm_setting 4: 95\n    pm_setting 5: 95\n    pm_setting 6: 95\n    pm_setting 7: 95\n    pm_setting 8: 1650\n    pm_setting 9: 1650\n    pm_setting 10: 1750\n    pm_setting 11: 1750\n    pm_setting 12: 2000\n    pm_setting 13: 2000\n    pm_setting 14: 2250\n    pm_setting 15: 2250\n    pm_setting 16: 0\n    pm_setting 17: 0\n    pm_setting 18: 0\n    pm_setting 19: 0\n    pm_setting 20: 0\n    pm_setting 21: 0\n    pm_setting 22: 0\n    pm_setting 23: 0\n    pm_setting 24: 0\n    pm_setting 25: 0\n    pm_setting 26: 0\n    pm_setting 27: 0\n    pm_setting 28: 0\n    pm_setting 29: 0\n    pm_setting 30: 0\n    pm_setting 31: 0\nsmc_pptable:\n  Version: 6\n  FeaturesToRun:\n    FeaturesToRun 0: 2743074303\n    FeaturesToRun 1: 14179\n  SocketPowerLimitAc:\n    SocketPowerLimitAc 0: 255\n    SocketPowerLimitAc 1: 0\n    SocketPowerLimitAc 2: 0\n    SocketPowerLimitAc 3: 0\n  SocketPowerLimitAcTau:\n    SocketPowerLimitAcTau 0: 0\n    SocketPowerLimitAcTau 1: 0\n    SocketPowerLimitAcTau 2: 0\n    SocketPowerLimitAcTau 3: 0\n  SocketPowerLimitDc:\n    SocketPowerLimitDc 0: 255\n    SocketPowerLimitDc 1: 0\n    SocketPowerLimitDc 2: 0\n    SocketPowerLimitDc 3: 0\n  SocketPowerLimitDcTau:\n    SocketPowerLimitDcTau 0: 0\n    SocketPowerLimitDcTau 1: 0\n    SocketPowerLimitDcTau 2: 0\n    SocketPowerLimitDcTau 3: 0\n  TdcLimit:\n    TdcLimit 0: 320\n    TdcLimit 1: 55\n  TdcLimitTau:\n    TdcLimitTau 0: 0\n    TdcLimitTau 1: 0\n  TemperatureLimit:\n    TemperatureLimit 0: 100\n    TemperatureLimit 1: 110\n    TemperatureLimit 2: 100\n    TemperatureLimit 3: 115\n    TemperatureLimit 4: 115\n    TemperatureLimit 5: 115\n    TemperatureLimit 6: 115\n    TemperatureLimit 7: 0\n    TemperatureLimit 8: 0\n    TemperatureLimit 9: 0\n  FitLimit: 0\n  TotalPowerConfig: 1\n  TotalPowerPadding:\n    TotalPowerPadding 0: 0\n    TotalPowerPadding 1: 0\n    TotalPowerPadding 2: 0\n  ApccPlusResidencyLimit: 10\n  SmnclkDpmFreq:\n    SmnclkDpmFreq 0: 0\n    SmnclkDpmFreq 1: 0\n  SmnclkDpmVoltage:\n    SmnclkDpmVoltage 0: 0\n    SmnclkDpmVoltage 1: 0\n  PaddingAPCC: 0\n  PerPartDroopVsetGfxDfll:\n    PerPartDroopVsetGfxDfll 0: 0\n    PerPartDroopVsetGfxDfll 1: 0\n    PerPartDroopVsetGfxDfll 2: 0\n    PerPartDroopVsetGfxDfll 3: 0\n    PerPartDroopVsetGfxDfll 4: 0\n  PaddingPerPartDroop: 0\n  ThrottlerControlMask: 14590\n  FwDStateMask: 3955\n  UlvVoltageOffsetSoc: 100\n  UlvVoltageOffsetGfx: 100\n  MinVoltageUlvGfx: 3100\n  MinVoltageUlvSoc: 3200\n  SocLIVmin: 0\n  PaddingLIVmin: 0\n  GceaLinkMgrIdleThreshold: 0\n  paddingRlcUlvParams:\n    paddingRlcUlvParams 0: 0\n    paddingRlcUlvParams 1: 0\n    paddingRlcUlvParams 2: 0\n  MinVoltageGfx: 3300\n  MinVoltageSoc: 3300\n  MaxVoltageGfx: 4700\n  MaxVoltageSoc: 4600\n  LoadLineResistanceGfx: 64\n  LoadLineResistanceSoc: 256\n  VDDGFX_TVmin: 50\n  VDDSOC_TVmin: 60\n  VDDGFX_Vmin_HiTemp: 3200\n  VDDGFX_Vmin_LoTemp: 3200\n  VDDSOC_Vmin_HiTemp: 3200\n  VDDSOC_Vmin_LoTemp: 3200\n  VDDGFX_TVminHystersis: 20\n  VDDSOC_TVminHystersis: 20\n  DpmDescriptor:\n    DpmDescriptor 0:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1\n        b: 0\n      SsCurve:\n        a: 0.3598\n        b:-0.90277\n        c: 1.30665\n      SsFmin: 1163\n      Padding16: 0\n    DpmDescriptor 1:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.121\n        b: 0.259\n      SsCurve:\n        a: 0.30118\n        b:-0.13445\n        c: 0.71117\n      SsFmin: 241\n      Padding16: 0\n    DpmDescriptor 2:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 4\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.35\n        b:-0.076\n      SsCurve:\n        a: 0.4463\n        b:-0.39971\n        c: 0.78566\n      SsFmin: 448\n      Padding16: 0\n    DpmDescriptor 3:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1\n        b: 0\n      SsCurve:\n        a: 0.24489\n        b:-0.25886\n        c: 0.76457\n      SsFmin: 529\n      Padding16: 0\n    DpmDescriptor 4:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.3714\n        b:-0.035\n      SsCurve:\n        a: 0.46056\n        b:-0.37851\n        c: 0.77393\n      SsFmin: 411\n      Padding16: 0\n    DpmDescriptor 5:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.0771\n        b: 0.13\n      SsCurve:\n        a: 0.2841\n        b:-0.21024\n        c: 0.73506\n      SsFmin: 371\n      Padding16: 0\n    DpmDescriptor 6:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.3714\n        b:-0.035\n      SsCurve:\n        a: 0.46056\n        b:-0.37851\n        c: 0.77393\n      SsFmin: 411\n      Padding16: 0\n    DpmDescriptor 7:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.0771\n        b: 0.13\n      SsCurve:\n        a: 0.2841\n        b:-0.21024\n        c: 0.73506\n      SsFmin: 371\n      Padding16: 0\n    DpmDescriptor 8:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 1.166\n        b: 0.131\n      SsCurve:\n        a: 0.33294\n        b:-0.22702\n        c: 0.73486\n      SsFmin: 341\n      Padding16: 0\n    DpmDescriptor 9:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0.956\n        b: 0.22\n      SsCurve:\n        a: 0.22381\n        b:-0.14446\n        c: 0.71948\n      SsFmin: 323\n      Padding16: 0\n    DpmDescriptor 10:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0.956\n        b: 0.22\n      SsCurve:\n        a: 0.22381\n        b:-0.14446\n        c: 0.71948\n      SsFmin: 323\n      Padding16: 0\n    DpmDescriptor 11:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0.571\n        b: 0.425\n      SsCurve:\n        a: 0.07984\n        b:-0.02895\n        c: 0.69879\n      SsFmin: 182\n      Padding16: 0\n    DpmDescriptor 12:\n      VoltageMode: 0\n      SnapToDiscrete: 0\n      NumDiscreteLevels: 2\n      Padding: 0\n      ConversionToAvfsClk:\n        m: 0.956\n        b: 0.22\n      SsCurve:\n        a: 0.22381\n        b:-0.14446\n        c: 0.71948\n      SsFmin: 323\n      Padding16: 0\n  FreqTableGfx:\n    FreqTableGfx 0: 500\n    FreqTableGfx 1: 2660\n    FreqTableGfx 2: 0\n    FreqTableGfx 3: 0\n    FreqTableGfx 4: 0\n    FreqTableGfx 5: 0\n    FreqTableGfx 6: 0\n    FreqTableGfx 7: 0\n    FreqTableGfx 8: 0\n    FreqTableGfx 9: 0\n    FreqTableGfx 10: 0\n    FreqTableGfx 11: 0\n    FreqTableGfx 12: 0\n    FreqTableGfx 13: 0\n    FreqTableGfx 14: 0\n    FreqTableGfx 15: 0\n  FreqTableVclk:\n    FreqTableVclk 0: 363\n    FreqTableVclk 1: 1477\n    FreqTableVclk 2: 0\n    FreqTableVclk 3: 0\n    FreqTableVclk 4: 0\n    FreqTableVclk 5: 0\n    FreqTableVclk 6: 0\n    FreqTableVclk 7: 0\n  FreqTableDclk:\n    FreqTableDclk 0: 317\n    FreqTableDclk 1: 1266\n    FreqTableDclk 2: 0\n    FreqTableDclk 3: 0\n    FreqTableDclk 4: 0\n    FreqTableDclk 5: 0\n    FreqTableDclk 6: 0\n    FreqTableDclk 7: 0\n  FreqTableSocclk:\n    FreqTableSocclk 0: 480\n    FreqTableSocclk 1: 1200\n    FreqTableSocclk 2: 0\n    FreqTableSocclk 3: 0\n    FreqTableSocclk 4: 0\n    FreqTableSocclk 5: 0\n    FreqTableSocclk 6: 0\n    FreqTableSocclk 7: 0\n  FreqTableUclk:\n    FreqTableUclk 0: 97\n    FreqTableUclk 1: 457\n    FreqTableUclk 2: 674\n    FreqTableUclk 3: 1000\n  FreqTableDcefclk:\n    FreqTableDcefclk 0: 418\n    FreqTableDcefclk 1: 1200\n    FreqTableDcefclk 2: 0\n    FreqTableDcefclk 3: 0\n    FreqTableDcefclk 4: 0\n    FreqTableDcefclk 5: 0\n    FreqTableDcefclk 6: 0\n    FreqTableDcefclk 7: 0\n  FreqTableDispclk:\n    FreqTableDispclk 0: 487\n    FreqTableDispclk 1: 1217\n    FreqTableDispclk 2: 0\n    FreqTableDispclk 3: 0\n    FreqTableDispclk 4: 0\n    FreqTableDispclk 5: 0\n    FreqTableDispclk 6: 0\n    FreqTableDispclk 7: 0\n  FreqTablePixclk:\n    FreqTablePixclk 0: 487\n    FreqTablePixclk 1: 1217\n    FreqTablePixclk 2: 0\n    FreqTablePixclk 3: 0\n    FreqTablePixclk 4: 0\n    FreqTablePixclk 5: 0\n    FreqTablePixclk 6: 0\n    FreqTablePixclk 7: 0\n  FreqTablePhyclk:\n    FreqTablePhyclk 0: 300\n    FreqTablePhyclk 1: 810\n    FreqTablePhyclk 2: 0\n    FreqTablePhyclk 3: 0\n    FreqTablePhyclk 4: 0\n    FreqTablePhyclk 5: 0\n    FreqTablePhyclk 6: 0\n    FreqTablePhyclk 7: 0\n  FreqTableDtbclk:\n    FreqTableDtbclk 0: 487\n    FreqTableDtbclk 1: 1217\n    FreqTableDtbclk 2: 0\n    FreqTableDtbclk 3: 0\n    FreqTableDtbclk 4: 0\n    FreqTableDtbclk 5: 0\n    FreqTableDtbclk 6: 0\n    FreqTableDtbclk 7: 0\n  FreqTableFclk:\n    FreqTableFclk 0: 550\n    FreqTableFclk 1: 1940\n    FreqTableFclk 2: 0\n    FreqTableFclk 3: 0\n    FreqTableFclk 4: 0\n    FreqTableFclk 5: 0\n    FreqTableFclk 6: 0\n    FreqTableFclk 7: 0\n  Paddingclks: 0\n  PerPartDroopModelGfxDfll:\n    PerPartDroopModelGfxDfll 0:\n      a: 0\n      b: 0\n      c: 0\n    PerPartDroopModelGfxDfll 1:\n      a: 0\n      b: 0\n      c: 0\n    PerPartDroopModelGfxDfll 2:\n      a: 0\n      b: 0\n      c: 0\n    PerPartDroopModelGfxDfll 3:\n      a: 0\n      b: 0\n      c: 0\n    PerPartDroopModelGfxDfll 4:\n      a: 0\n      b: 0\n      c: 0\n  DcModeMaxFreq:\n    DcModeMaxFreq 0: 2660\n    DcModeMaxFreq 1: 1200\n    DcModeMaxFreq 2: 1000\n    DcModeMaxFreq 3: 1940\n    DcModeMaxFreq 4: 1266\n    DcModeMaxFreq 5: 1477\n    DcModeMaxFreq 6: 1266\n    DcModeMaxFreq 7: 1477\n    DcModeMaxFreq 8: 1200\n    DcModeMaxFreq 9: 1217\n    DcModeMaxFreq 10: 1217\n    DcModeMaxFreq 11: 810\n    DcModeMaxFreq 12: 1217\n  FreqTableUclkDiv:\n    FreqTableUclkDiv 0: 0\n    FreqTableUclkDiv 1: 2\n    FreqTableUclkDiv 2: 3\n    FreqTableUclkDiv 3: 3\n  FclkBoostFreq: 1400\n  FclkParamPadding: 0\n  Mp0clkFreq:\n    Mp0clkFreq 0: 332\n    Mp0clkFreq 1: 506\n  Mp0DpmVoltage:\n    Mp0DpmVoltage 0: 2800\n    Mp0DpmVoltage 1: 3200\n  MemVddciVoltage:\n    MemVddciVoltage 0: 2700\n    MemVddciVoltage 1: 3200\n    MemVddciVoltage 2: 3400\n    MemVddciVoltage 3: 3400\n  MemMvddVoltage:\n    MemMvddVoltage 0: 5000\n    MemMvddVoltage 1: 5400\n    MemMvddVoltage 2: 5400\n    MemMvddVoltage 3: 5400\n  GfxclkFgfxoffEntry: 500\n  GfxclkFinit: 800\n  GfxclkFidle: 500\n  GfxclkSource: 1\n  GfxclkPadding: 0\n  GfxGpoSubFeatureMask: 1\n  GfxGpoEnabledWorkPolicyMask: 2\n  GfxGpoDisabledWorkPolicyMask: 93\n  GfxGpoPadding:\n    GfxGpoPadding 0: 0\n  GfxGpoVotingAllow: 1\n  GfxGpoPadding32:\n    GfxGpoPadding32 0: 0\n    GfxGpoPadding32 1: 0\n    GfxGpoPadding32 2: 0\n    GfxGpoPadding32 3: 0\n  GfxDcsFopt: 0\n  GfxDcsFclkFopt: 0\n  GfxDcsUclkFopt: 0\n  DcsGfxOffVoltage: 0\n  DcsMinGfxOffTime: 0\n  DcsMaxGfxOffTime: 0\n  DcsMinCreditAccum: 0\n  DcsExitHysteresis: 0\n  DcsTimeout: 0\n  DcsParamPadding:\n    DcsParamPadding 0: 0\n    DcsParamPadding 1: 0\n    DcsParamPadding 2: 0\n    DcsParamPadding 3: 0\n    DcsParamPadding 4: 0\n  FlopsPerByteTable:\n    FlopsPerByteTable 0: 5674\n    FlopsPerByteTable 1: 5591\n    FlopsPerByteTable 2: 5508\n    FlopsPerByteTable 3: 5424\n    FlopsPerByteTable 4: 5341\n    FlopsPerByteTable 5: 5258\n    FlopsPerByteTable 6: 5174\n    FlopsPerByteTable 7: 5091\n    FlopsPerByteTable 8: 5008\n    FlopsPerByteTable 9: 4925\n    FlopsPerByteTable 10: 4841\n    FlopsPerByteTable 11: 4758\n    FlopsPerByteTable 12: 4529\n    FlopsPerByteTable 13: 4300\n    FlopsPerByteTable 14: 4071\n    FlopsPerByteTable 15: 3842\n  LowestUclkReservedForUlv: 0\n  PaddingMem:\n    PaddingMem 0: 0\n    PaddingMem 1: 0\n    PaddingMem 2: 0\n  UclkDpmPstates:\n    UclkDpmPstates 0: 3\n    UclkDpmPstates 1: 2\n    UclkDpmPstates 2: 1\n    UclkDpmPstates 3: 0\n  UclkDpmSrcFreqRange:\n    Fmin: 0\n    Fmax: 0\n  UclkDpmTargFreqRange:\n    Fmin: 0\n    Fmax: 0\n  UclkDpmMidstepFreq: 0\n  UclkMidstepPadding: 0\n  PcieGenSpeed:\n    PcieGenSpeed 0: 0\n    PcieGenSpeed 1: 3\n  PcieLaneCount:\n    PcieLaneCount 0: 1\n    PcieLaneCount 1: 6\n  LclkFreq:\n    LclkFreq 0: 310\n    LclkFreq 1: 619\n  FanStopTemp: 55\n  FanStartTemp: 70\n  FanGain:\n    FanGain 0: 400\n    FanGain 1: 400\n    FanGain 2: 400\n    FanGain 3: 400\n    FanGain 4: 400\n    FanGain 5: 400\n    FanGain 6: 400\n    FanGain 7: 400\n    FanGain 8: 400\n    FanGain 9: 400\n  FanPwmMin: 25\n  FanAcousticLimitRpm: 1650\n  FanThrottlingRpm: 2000\n  FanMaximumRpm: 3300\n  MGpuFanBoostLimitRpm: 0\n  FanTargetTemperature: 95\n  FanTargetGfxclk: 500\n  FanPadding16: 0\n  FanTempInputSelect: 1\n  FanPadding: 0\n  FanZeroRpmEnable: 1\n  FanTachEdgePerRev: 2\n  FuzzyFan_ErrorSetDelta: 0\n  FuzzyFan_ErrorRateSetDelta: 0\n  FuzzyFan_PwmSetDelta: 0\n  FuzzyFan_Reserved: 0\n  OverrideAvfsGb:\n    OverrideAvfsGb 0: 0\n    OverrideAvfsGb 1: 0\n  dBtcGbGfxDfllModelSelect: 1\n  Padding8_Avfs: 0\n  qAvfsGb:\n    qAvfsGb 0:\n      a: 0\n      b: 0\n      c: 0\n    qAvfsGb 1:\n      a: 0\n      b: 0\n      c: 0\n  dBtcGbGfxPll:\n    a: 0.06559\n    b:-0.10255\n    c: 0.14502\n  dBtcGbGfxDfll:\n    a: 0\n    b: 0\n    c: 0\n  dBtcGbSoc:\n    a: 0\n    b: 0\n    c: 0\n  qAgingGb:\n    qAgingGb 0:\n      m: 0\n      b: 0\n    qAgingGb 1:\n      m: 0\n      b: 0\n  PiecewiseLinearDroopIntGfxDfll:\n    Fset:\n      Fset 0: 0.3\n      Fset 1: 1.5\n      Fset 2: 2.3\n      Fset 3: 2.5\n      Fset 4: 3.1\n    Vdroop:\n      Vdroop 0: 0.04\n      Vdroop 1: 0.0655\n      Vdroop 2: 0.089\n      Vdroop 3: 0.098\n      Vdroop 4: 0.358\n  qStaticVoltageOffset:\n    qStaticVoltageOffset 0:\n      a: 0.0745\n      b:-0.2595\n      c: 0.2447\n    qStaticVoltageOffset 1:\n      a:-0.0394\n      b: 0.278\n      c:-0.16743\n  DcTol:\n    DcTol 0: 192\n    DcTol 1: 192\n  DcBtcEnabled:\n    DcBtcEnabled 0: 1\n    DcBtcEnabled 1: 1\n  Padding8_GfxBtc:\n    Padding8_GfxBtc 0: 0\n    Padding8_GfxBtc 1: 0\n  DcBtcMin:\n    DcBtcMin 0: 0\n    DcBtcMin 1: 0\n  DcBtcMax:\n    DcBtcMax 0: 192\n    DcBtcMax 1: 192\n  DcBtcGb:\n    DcBtcGb 0: 25\n    DcBtcGb 1: 25\n  XgmiDpmPstates:\n    XgmiDpmPstates 0: 0\n    XgmiDpmPstates 1: 0\n  XgmiDpmSpare:\n    XgmiDpmSpare 0: 0\n    XgmiDpmSpare 1: 0\n  DebugOverrides: 0\n  ReservedEquation0:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation1:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation2:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation3:\n    a: 0\n    b: 0\n    c: 0\n  CustomerVariant: 0\n  VcBtcEnabled: 1\n  VcBtcVminT0: 2875\n  VcBtcFixedVminAgingOffset: 325\n  VcBtcVmin2PsmDegrationGb: 0\n  VcBtcPsmA: 0.0028\n  VcBtcPsmB: 0.4017\n  VcBtcVminA: 0.0116\n  VcBtcVminB: 0.4855\n  LedGpio: 0\n  GfxPowerStagesGpio: 1\n  SkuReserved:\n    SkuReserved 0: 0\n    SkuReserved 1: 0\n    SkuReserved 2: 0\n    SkuReserved 3: 0\n    SkuReserved 4: 0\n    SkuReserved 5: 0\n    SkuReserved 6: 0\n    SkuReserved 7: 0\n  GamingClk:\n    GamingClk 0: 0\n    GamingClk 1: 0\n    GamingClk 2: 0\n    GamingClk 3: 0\n    GamingClk 4: 0\n    GamingClk 5: 0\n  I2cControllers:\n    I2cControllers 0:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 1:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 2:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 3:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 4:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 5:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 6:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 7:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 8:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 9:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 10:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 11:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 12:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 13:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 14:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n    I2cControllers 15:\n      Enabled: 0\n      Speed: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n      PaddingConfig: 0\n  GpioScl: 0\n  GpioSda: 0\n  FchUsbPdSlaveAddr: 0\n  I2cSpare:\n    I2cSpare 0: 0\n  VddGfxVrMapping: 0\n  VddSocVrMapping: 0\n  VddMem0VrMapping: 0\n  VddMem1VrMapping: 0\n  GfxUlvPhaseSheddingMask: 0\n  SocUlvPhaseSheddingMask: 0\n  VddciUlvPhaseSheddingMask: 0\n  MvddUlvPhaseSheddingMask: 0\n  GfxMaxCurrent: 0\n  GfxOffset: 0\n  Padding_TelemetryGfx: 0\n  SocMaxCurrent: 0\n  SocOffset: 0\n  Padding_TelemetrySoc: 0\n  Mem0MaxCurrent: 0\n  Mem0Offset: 0\n  Padding_TelemetryMem0: 0\n  Mem1MaxCurrent: 0\n  Mem1Offset: 0\n  Padding_TelemetryMem1: 0\n  MvddRatio: 0\n  AcDcGpio: 0\n  AcDcPolarity: 0\n  VR0HotGpio: 0\n  VR0HotPolarity: 0\n  VR1HotGpio: 0\n  VR1HotPolarity: 0\n  GthrGpio: 0\n  GthrPolarity: 0\n  LedPin0: 0\n  LedPin1: 0\n  LedPin2: 0\n  LedEnableMask: 0\n  LedPcie: 0\n  LedError: 0\n  LedSpare1:\n    LedSpare1 0: 0\n    LedSpare1 1: 1\n  PllGfxclkSpreadEnabled: 0\n  PllGfxclkSpreadPercent: 0\n  PllGfxclkSpreadFreq: 0\n  DfllGfxclkSpreadEnabled: 0\n  DfllGfxclkSpreadPercent: 0\n  DfllGfxclkSpreadFreq: 0\n  UclkSpreadPadding: 0\n  UclkSpreadFreq: 0\n  FclkSpreadEnabled: 0\n  FclkSpreadPercent: 0\n  FclkSpreadFreq: 0\n  MemoryChannelEnabled: 0\n  DramBitWidth: 0\n  PaddingMem1:\n    PaddingMem1 0: 0\n    PaddingMem1 1: 0\n    PaddingMem1 2: 0\n  TotalBoardPower: 0\n  BoardPowerPadding: 0\n  XgmiLinkSpeed:\n    XgmiLinkSpeed 0: 0\n    XgmiLinkSpeed 1: 0\n    XgmiLinkSpeed 2: 0\n    XgmiLinkSpeed 3: 0\n  XgmiLinkWidth:\n    XgmiLinkWidth 0: 0\n    XgmiLinkWidth 1: 0\n    XgmiLinkWidth 2: 0\n    XgmiLinkWidth 3: 0\n  XgmiFclkFreq:\n    XgmiFclkFreq 0: 0\n    XgmiFclkFreq 1: 0\n    XgmiFclkFreq 2: 0\n    XgmiFclkFreq 3: 0\n  XgmiSocVoltage:\n    XgmiSocVoltage 0: 0\n    XgmiSocVoltage 1: 0\n    XgmiSocVoltage 2: 0\n    XgmiSocVoltage 3: 0\n  HsrEnabled: 0\n  VddqOffEnabled: 0\n  PaddingUmcFlags:\n    PaddingUmcFlags 0: 0\n    PaddingUmcFlags 1: 0\n  UclkSpreadPercent:\n    UclkSpreadPercent 0: 0\n    UclkSpreadPercent 1: 0\n    UclkSpreadPercent 2: 0\n    UclkSpreadPercent 3: 0\n    UclkSpreadPercent 4: 0\n    UclkSpreadPercent 5: 0\n    UclkSpreadPercent 6: 0\n    UclkSpreadPercent 7: 0\n    UclkSpreadPercent 8: 0\n    UclkSpreadPercent 9: 0\n    UclkSpreadPercent 10: 0\n    UclkSpreadPercent 11: 0\n    UclkSpreadPercent 12: 0\n    UclkSpreadPercent 13: 0\n    UclkSpreadPercent 14: 0\n    UclkSpreadPercent 15: 0\n  BoardReserved:\n    BoardReserved 0: 0\n    BoardReserved 1: 0\n    BoardReserved 2: 0\n    BoardReserved 3: 0\n    BoardReserved 4: 0\n    BoardReserved 5: 0\n    BoardReserved 6: 0\n    BoardReserved 7: 0\n    BoardReserved 8: 0\n    BoardReserved 9: 0\n    BoardReserved 10: 0\n  MmHubPadding:\n    MmHubPadding 0: 0\n    MmHubPadding 1: 0\n    MmHubPadding 2: 0\n    MmHubPadding 3: 0\n    MmHubPadding 4: 0\n    MmHubPadding 5: 0\n    MmHubPadding 6: 0\n    MmHubPadding 7: 102629376\n"
  },
  {
    "path": "test/AMD.RX6900XT.16384.201104.rom.rawdump",
    "content": "PowerPlay table rev 15.0 size 2470 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     a609 structuresize                             : 2470\n 0x0002 (0002) B       0f format_revision                           : 15\n 0x0003 (0003) B       00 content_revision                          : 0\n 0x0004 (0004) B       02 table_revision                            : 2\n 0x0005 (0005) H     2203 table_size                                : 802\n 0x0007 (0007) I af090000 golden_pp_id                              : 2479\n 0x000b (0011) I 77400000 golden_revision                           : 16503\n 0x000f (0015) H     8000 format_id                                 : 128\n 0x0011 (0017) I 18000000 platform_caps                             : 24\n 0x0015 (0021) B       1c thermal_controller_type                   : 28\n 0x0016 (0022) H     0000 small_power_limit1                        : 0\n 0x0018 (0024) H     0000 small_power_limit2                        : 0\n 0x001a (0026) H     0000 boost_power_limit                         : 0\n 0x001c (0028) H     7600 software_shutdown_temp                    : 118\n 0x001e (0030) H     0000 reserve                                   : 0\n 0x0020 (0032) H     0000 reserve                                   : 0\n 0x0022 (0034) H     0000 reserve                                   : 0\n 0x0024 (0036) H     0000 reserve                                   : 0\n 0x0026 (0038) H     0000 reserve                                   : 0\n 0x0028 (0040) H     0000 reserve                                   : 0\n 0x002a (0042) H     0100 reserve                                   : 1\n 0x002c (0044) H     0000 reserve                                   : 0\n 0x002e (0046) B       01 revision                                  : 1\n 0x002f (0047) B       00 reserve                                   : 0\n 0x0030 (0048) B       00 reserve                                   : 0\n 0x0031 (0049) B       00 reserve                                   : 0\n 0x0032 (0050) I 0d000000 count                                     : 13\n 0x0036 (0054) I 640a0000 max GFXCLK                                : 2660\n 0x003a (0058) I b0040000 max SOCCLK                                : 1200\n 0x003e (0062) I e8030000 max UCLK                                  : 1000\n 0x0042 (0066) I 94070000 max FCLK                                  : 1940\n 0x0046 (0070) I f2040000 max DCLK_0                                : 1266\n 0x004a (0074) I c5050000 max VCLK_0                                : 1477\n 0x004e (0078) I f2040000 max DCLK_1                                : 1266\n 0x0052 (0082) I c5050000 max VCLK_1                                : 1477\n 0x0056 (0086) I b0040000 max DCEFCLK                               : 1200\n 0x005a (0090) I c1040000 max DISPCLK                               : 1217\n 0x005e (0094) I c1040000 max PIXCLK                                : 1217\n 0x0062 (0098) I 2a030000 max PHYCLK                                : 810\n 0x0066 (0102) I c1040000 max DTBCLK                                : 1217\n 0x006a (0106) I 00000000 max                                       : 0\n 0x006e (0110) I 00000000 max                                       : 0\n 0x0072 (0114) I 00000000 max                                       : 0\n 0x0076 (0118) I f4010000 min GFXCLK                                : 500\n 0x007a (0122) I e0010000 min SOCCLK                                : 480\n 0x007e (0126) I 61000000 min UCLK                                  : 97\n 0x0082 (0130) I 26020000 min FCLK                                  : 550\n 0x0086 (0134) I 3d010000 min DCLK_0                                : 317\n 0x008a (0138) I 6b010000 min VCLK_0                                : 363\n 0x008e (0142) I 3d010000 min DCLK_1                                : 317\n 0x0092 (0146) I 6b010000 min VCLK_1                                : 363\n 0x0096 (0150) I a2010000 min DCEFCLK                               : 418\n 0x009a (0154) I e7010000 min DISPCLK                               : 487\n 0x009e (0158) I e7010000 min PIXCLK                                : 487\n 0x00a2 (0162) I 2c010000 min PHYCLK                                : 300\n 0x00a6 (0166) I e7010000 min DTBCLK                                : 487\n 0x00aa (0170) I 00000000 min                                       : 0\n 0x00ae (0174) I 00000000 min                                       : 0\n 0x00b2 (0178) I 00000000 min                                       : 0\n 0x00b6 (0182) B       81 revision                                  : 129\n 0x00b7 (0183) B       00 reserve                                   : 0\n 0x00b8 (0184) B       00 reserve                                   : 0\n 0x00b9 (0185) B       00 reserve                                   : 0\n 0x00ba (0186) I 10000000 feature_count                             : 16\n 0x00be (0190) I 1e000000 setting_count                             : 30\n 0x00c2 (0194) B       01 cap GFXCLK_LIMITS                         : 1\n 0x00c3 (0195) B       01 cap GFXCLK_CURVE                          : 1\n 0x00c4 (0196) B       01 cap UCLK_LIMITS                           : 1\n 0x00c5 (0197) B       01 cap POWER_LIMIT                           : 1\n 0x00c6 (0198) B       01 cap FAN_ACOUSTIC_LIMIT                    : 1\n 0x00c7 (0199) B       01 cap FAN_SPEED_MIN                         : 1\n 0x00c8 (0200) B       01 cap TEMPERATURE_FAN                       : 1\n 0x00c9 (0201) B       01 cap TEMPERATURE_SYSTEM                    : 1\n 0x00ca (0202) B       01 cap MEMORY_TIMING_TUNE                    : 1\n 0x00cb (0203) B       01 cap FAN_ZERO_RPM_CONTROL                  : 1\n 0x00cc (0204) B       01 cap AUTO_UV_ENGINE                        : 1\n 0x00cd (0205) B       01 cap AUTO_OC_ENGINE                        : 1\n 0x00ce (0206) B       01 cap AUTO_OC_MEMORY                        : 1\n 0x00cf (0207) B       01 cap FAN_CURVE                             : 1\n 0x00d0 (0208) B       00 cap SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT: 0\n 0x00d1 (0209) B       01 cap POWER_MODE                            : 1\n 0x00d2 (0210) B       00 cap                                       : 0\n 0x00d3 (0211) B       00 cap                                       : 0\n 0x00d4 (0212) B       00 cap                                       : 0\n 0x00d5 (0213) B       00 cap                                       : 0\n 0x00d6 (0214) B       00 cap                                       : 0\n 0x00d7 (0215) B       00 cap                                       : 0\n 0x00d8 (0216) B       00 cap                                       : 0\n 0x00d9 (0217) B       00 cap                                       : 0\n 0x00da (0218) B       00 cap                                       : 0\n 0x00db (0219) B       00 cap                                       : 0\n 0x00dc (0220) B       00 cap                                       : 0\n 0x00dd (0221) B       00 cap                                       : 0\n 0x00de (0222) B       00 cap                                       : 0\n 0x00df (0223) B       00 cap                                       : 0\n 0x00e0 (0224) B       00 cap                                       : 0\n 0x00e1 (0225) B       00 cap                                       : 0\n 0x00e2 (0226) I b80b0000 max GFXCLKFMAX                            : 3000\n 0x00e6 (0230) I b80b0000 max GFXCLKFMIN                            : 3000\n 0x00ea (0234) I 00000000 max CUSTOM_GFX_VF_CURVE_A                 : 0\n 0x00ee (0238) I 00000000 max CUSTOM_GFX_VF_CURVE_B                 : 0\n 0x00f2 (0242) I 00000000 max CUSTOM_GFX_VF_CURVE_C                 : 0\n 0x00f6 (0246) I b80b0000 max CUSTOM_CURVE_VFT_FMIN                 : 3000\n 0x00fa (0250) I 33040000 max UCLKFMIN                              : 1075\n 0x00fe (0254) I 33040000 max UCLKFMAX                              : 1075\n 0x0102 (0258) I 0f000000 max POWERPERCENTAGE                       : 15\n 0x0106 (0262) I e40c0000 max FANRPMMIN                             : 3300\n 0x010a (0266) I e40c0000 max FANRPMACOUSTICLIMIT                   : 3300\n 0x010e (0270) I 64000000 max FANTARGETTEMPERATURE                  : 100\n 0x0112 (0274) I 6e000000 max OPERATINGTEMPMAX                      : 110\n 0x0116 (0278) I 01000000 max ACTIMING                              : 1\n 0x011a (0282) I 01000000 max FAN_ZERO_RPM_CONTROL                  : 1\n 0x011e (0286) I 01000000 max AUTOUVENGINE                          : 1\n 0x0122 (0290) I 01000000 max AUTOOCENGINE                          : 1\n 0x0126 (0294) I 01000000 max AUTOOCMEMORY                          : 1\n 0x012a (0298) I 64000000 max FAN_CURVE_TEMPERATURE_1               : 100\n 0x012e (0302) I 64000000 max FAN_CURVE_SPEED_1                     : 100\n 0x0132 (0306) I 64000000 max FAN_CURVE_TEMPERATURE_2               : 100\n 0x0136 (0310) I 64000000 max FAN_CURVE_SPEED_2                     : 100\n 0x013a (0314) I 64000000 max FAN_CURVE_TEMPERATURE_3               : 100\n 0x013e (0318) I 64000000 max FAN_CURVE_SPEED_3                     : 100\n 0x0142 (0322) I 64000000 max FAN_CURVE_TEMPERATURE_4               : 100\n 0x0146 (0326) I 64000000 max FAN_CURVE_SPEED_4                     : 100\n 0x014a (0330) I 64000000 max FAN_CURVE_TEMPERATURE_5               : 100\n 0x014e (0334) I 64000000 max FAN_CURVE_SPEED_5                     : 100\n 0x0152 (0338) I 00000000 max AUTO_FAN_ACOUSTIC_LIMIT               : 0\n 0x0156 (0342) I 01000000 max POWER_MODE                            : 1\n 0x015a (0346) I 00000000 max                                       : 0\n 0x015e (0350) I 00000000 max                                       : 0\n 0x0162 (0354) I 00000000 max                                       : 0\n 0x0166 (0358) I 00000000 max                                       : 0\n 0x016a (0362) I 00000000 max                                       : 0\n 0x016e (0366) I 00000000 max                                       : 0\n 0x0172 (0370) I 00000000 max                                       : 0\n 0x0176 (0374) I 00000000 max                                       : 0\n 0x017a (0378) I 00000000 max                                       : 0\n 0x017e (0382) I 00000000 max                                       : 0\n 0x0182 (0386) I 00000000 max                                       : 0\n 0x0186 (0390) I 00000000 max                                       : 0\n 0x018a (0394) I 00000000 max                                       : 0\n 0x018e (0398) I 00000000 max                                       : 0\n 0x0192 (0402) I 00000000 max                                       : 0\n 0x0196 (0406) I 00000000 max                                       : 0\n 0x019a (0410) I 00000000 max                                       : 0\n 0x019e (0414) I 00000000 max                                       : 0\n 0x01a2 (0418) I 00000000 max                                       : 0\n 0x01a6 (0422) I 00000000 max                                       : 0\n 0x01aa (0426) I 00000000 max                                       : 0\n 0x01ae (0430) I 00000000 max                                       : 0\n 0x01b2 (0434) I 00000000 max                                       : 0\n 0x01b6 (0438) I 00000000 max                                       : 0\n 0x01ba (0442) I 00000000 max                                       : 0\n 0x01be (0446) I 00000000 max                                       : 0\n 0x01c2 (0450) I 00000000 max                                       : 0\n 0x01c6 (0454) I 00000000 max                                       : 0\n 0x01ca (0458) I 00000000 max                                       : 0\n 0x01ce (0462) I 00000000 max                                       : 0\n 0x01d2 (0466) I 00000000 max                                       : 0\n 0x01d6 (0470) I 00000000 max                                       : 0\n 0x01da (0474) I 00000000 max                                       : 0\n 0x01de (0478) I 00000000 max                                       : 0\n 0x01e2 (0482) I f4010000 min GFXCLKFMAX                            : 500\n 0x01e6 (0486) I f4010000 min GFXCLKFMIN                            : 500\n 0x01ea (0490) I 00000000 min CUSTOM_GFX_VF_CURVE_A                 : 0\n 0x01ee (0494) I 00000000 min CUSTOM_GFX_VF_CURVE_B                 : 0\n 0x01f2 (0498) I 00000000 min CUSTOM_GFX_VF_CURVE_C                 : 0\n 0x01f6 (0502) I f4010000 min CUSTOM_CURVE_VFT_FMIN                 : 500\n 0x01fa (0506) I a2020000 min UCLKFMIN                              : 674\n 0x01fe (0510) I a2020000 min UCLKFMAX                              : 674\n 0x0202 (0514) I 0a000000 min POWERPERCENTAGE                       : 10\n 0x0206 (0518) I fa000000 min FANRPMMIN                             : 250\n 0x020a (0522) I e8030000 min FANRPMACOUSTICLIMIT                   : 1000\n 0x020e (0526) I 19000000 min FANTARGETTEMPERATURE                  : 25\n 0x0212 (0530) I 32000000 min OPERATINGTEMPMAX                      : 50\n 0x0216 (0534) I 00000000 min ACTIMING                              : 0\n 0x021a (0538) I 00000000 min FAN_ZERO_RPM_CONTROL                  : 0\n 0x021e (0542) I 00000000 min AUTOUVENGINE                          : 0\n 0x0222 (0546) I 00000000 min AUTOOCENGINE                          : 0\n 0x0226 (0550) I 00000000 min AUTOOCMEMORY                          : 0\n 0x022a (0554) I 19000000 min FAN_CURVE_TEMPERATURE_1               : 25\n 0x022e (0558) I 0a000000 min FAN_CURVE_SPEED_1                     : 10\n 0x0232 (0562) I 19000000 min FAN_CURVE_TEMPERATURE_2               : 25\n 0x0236 (0566) I 0a000000 min FAN_CURVE_SPEED_2                     : 10\n 0x023a (0570) I 19000000 min FAN_CURVE_TEMPERATURE_3               : 25\n 0x023e (0574) I 0a000000 min FAN_CURVE_SPEED_3                     : 10\n 0x0242 (0578) I 19000000 min FAN_CURVE_TEMPERATURE_4               : 25\n 0x0246 (0582) I 0a000000 min FAN_CURVE_SPEED_4                     : 10\n 0x024a (0586) I 19000000 min FAN_CURVE_TEMPERATURE_5               : 25\n 0x024e (0590) I 0a000000 min FAN_CURVE_SPEED_5                     : 10\n 0x0252 (0594) I 00000000 min AUTO_FAN_ACOUSTIC_LIMIT               : 0\n 0x0256 (0598) I 00000000 min POWER_MODE                            : 0\n 0x025a (0602) I 00000000 min                                       : 0\n 0x025e (0606) I 00000000 min                                       : 0\n 0x0262 (0610) I 00000000 min                                       : 0\n 0x0266 (0614) I 00000000 min                                       : 0\n 0x026a (0618) I 00000000 min                                       : 0\n 0x026e (0622) I 00000000 min                                       : 0\n 0x0272 (0626) I 00000000 min                                       : 0\n 0x0276 (0630) I 00000000 min                                       : 0\n 0x027a (0634) I 00000000 min                                       : 0\n 0x027e (0638) I 00000000 min                                       : 0\n 0x0282 (0642) I 00000000 min                                       : 0\n 0x0286 (0646) I 00000000 min                                       : 0\n 0x028a (0650) I 00000000 min                                       : 0\n 0x028e (0654) I 00000000 min                                       : 0\n 0x0292 (0658) I 00000000 min                                       : 0\n 0x0296 (0662) I 00000000 min                                       : 0\n 0x029a (0666) I 00000000 min                                       : 0\n 0x029e (0670) I 00000000 min                                       : 0\n 0x02a2 (0674) I 00000000 min                                       : 0\n 0x02a6 (0678) I 00000000 min                                       : 0\n 0x02aa (0682) I 00000000 min                                       : 0\n 0x02ae (0686) I 00000000 min                                       : 0\n 0x02b2 (0690) I 00000000 min                                       : 0\n 0x02b6 (0694) I 00000000 min                                       : 0\n 0x02ba (0698) I 00000000 min                                       : 0\n 0x02be (0702) I 00000000 min                                       : 0\n 0x02c2 (0706) I 00000000 min                                       : 0\n 0x02c6 (0710) I 00000000 min                                       : 0\n 0x02ca (0714) I 00000000 min                                       : 0\n 0x02ce (0718) I 00000000 min                                       : 0\n 0x02d2 (0722) I 00000000 min                                       : 0\n 0x02d6 (0726) I 00000000 min                                       : 0\n 0x02da (0730) I 00000000 min                                       : 0\n 0x02de (0734) I 00000000 min                                       : 0\n 0x02e2 (0738) h     0600 pm_setting                                : 6\n 0x02e4 (0740) h     0000 pm_setting                                : 0\n 0x02e6 (0742) h     0600 pm_setting                                : 6\n 0x02e8 (0744) h     0600 pm_setting                                : 6\n 0x02ea (0746) h     5f00 pm_setting                                : 95\n 0x02ec (0748) h     5f00 pm_setting                                : 95\n 0x02ee (0750) h     5f00 pm_setting                                : 95\n 0x02f0 (0752) h     5f00 pm_setting                                : 95\n 0x02f2 (0754) h     7206 pm_setting                                : 1650\n 0x02f4 (0756) h     7206 pm_setting                                : 1650\n 0x02f6 (0758) h     d606 pm_setting                                : 1750\n 0x02f8 (0760) h     d606 pm_setting                                : 1750\n 0x02fa (0762) h     d007 pm_setting                                : 2000\n 0x02fc (0764) h     d007 pm_setting                                : 2000\n 0x02fe (0766) h     ca08 pm_setting                                : 2250\n 0x0300 (0768) h     ca08 pm_setting                                : 2250\n 0x0302 (0770) h     0000 pm_setting                                : 0\n 0x0304 (0772) h     0000 pm_setting                                : 0\n 0x0306 (0774) h     0000 pm_setting                                : 0\n 0x0308 (0776) h     0000 pm_setting                                : 0\n 0x030a (0778) h     0000 pm_setting                                : 0\n 0x030c (0780) h     0000 pm_setting                                : 0\n 0x030e (0782) h     0000 pm_setting                                : 0\n 0x0310 (0784) h     0000 pm_setting                                : 0\n 0x0312 (0786) h     0000 pm_setting                                : 0\n 0x0314 (0788) h     0000 pm_setting                                : 0\n 0x0316 (0790) h     0000 pm_setting                                : 0\n 0x0318 (0792) h     0000 pm_setting                                : 0\n 0x031a (0794) h     0000 pm_setting                                : 0\n 0x031c (0796) h     0000 pm_setting                                : 0\n 0x031e (0798) h     0000 pm_setting                                : 0\n 0x0320 (0800) h     0000 pm_setting                                : 0\n 0x0322 (0802) I 06000000 Version                                   : 6\n 0x0326 (0806) I fffd7fa3 FeaturesToRun                             : 2743074303\n 0x032a (0810) I 63370000 FeaturesToRun                             : 14179\n 0x032e (0814) H     ff00 SocketPowerLimitAc                        : 255\n 0x0330 (0816) H     0000 SocketPowerLimitAc                        : 0\n 0x0332 (0818) H     0000 SocketPowerLimitAc                        : 0\n 0x0334 (0820) H     0000 SocketPowerLimitAc                        : 0\n 0x0336 (0822) H     0000 SocketPowerLimitAcTau                     : 0\n 0x0338 (0824) H     0000 SocketPowerLimitAcTau                     : 0\n 0x033a (0826) H     0000 SocketPowerLimitAcTau                     : 0\n 0x033c (0828) H     0000 SocketPowerLimitAcTau                     : 0\n 0x033e (0830) H     ff00 SocketPowerLimitDc                        : 255\n 0x0340 (0832) H     0000 SocketPowerLimitDc                        : 0\n 0x0342 (0834) H     0000 SocketPowerLimitDc                        : 0\n 0x0344 (0836) H     0000 SocketPowerLimitDc                        : 0\n 0x0346 (0838) H     0000 SocketPowerLimitDcTau                     : 0\n 0x0348 (0840) H     0000 SocketPowerLimitDcTau                     : 0\n 0x034a (0842) H     0000 SocketPowerLimitDcTau                     : 0\n 0x034c (0844) H     0000 SocketPowerLimitDcTau                     : 0\n 0x034e (0846) H     4001 TdcLimit                                  : 320\n 0x0350 (0848) H     3700 TdcLimit                                  : 55\n 0x0352 (0850) H     0000 TdcLimitTau                               : 0\n 0x0354 (0852) H     0000 TdcLimitTau                               : 0\n 0x0356 (0854) H     6400 TemperatureLimit                          : 100\n 0x0358 (0856) H     6e00 TemperatureLimit                          : 110\n 0x035a (0858) H     6400 TemperatureLimit                          : 100\n 0x035c (0860) H     7300 TemperatureLimit                          : 115\n 0x035e (0862) H     7300 TemperatureLimit                          : 115\n 0x0360 (0864) H     7300 TemperatureLimit                          : 115\n 0x0362 (0866) H     7300 TemperatureLimit                          : 115\n 0x0364 (0868) H     0000 TemperatureLimit                          : 0\n 0x0366 (0870) H     0000 TemperatureLimit                          : 0\n 0x0368 (0872) H     0000 TemperatureLimit                          : 0\n 0x036a (0874) I 00000000 FitLimit                                  : 0\n 0x036e (0878) B       01 TotalPowerConfig                          : 1\n 0x036f (0879) B       00 TotalPowerPadding                         : 0\n 0x0370 (0880) B       00 TotalPowerPadding                         : 0\n 0x0371 (0881) B       00 TotalPowerPadding                         : 0\n 0x0372 (0882) I 0a000000 ApccPlusResidencyLimit                    : 10\n 0x0376 (0886) H     0000 SmnclkDpmFreq                             : 0\n 0x0378 (0888) H     0000 SmnclkDpmFreq                             : 0\n 0x037a (0890) H     0000 SmnclkDpmVoltage                          : 0\n 0x037c (0892) H     0000 SmnclkDpmVoltage                          : 0\n 0x037e (0894) I 00000000 PaddingAPCC                               : 0\n 0x0382 (0898) H     0000 PerPartDroopVsetGfxDfll                   : 0\n 0x0384 (0900) H     0000 PerPartDroopVsetGfxDfll                   : 0\n 0x0386 (0902) H     0000 PerPartDroopVsetGfxDfll                   : 0\n 0x0388 (0904) H     0000 PerPartDroopVsetGfxDfll                   : 0\n 0x038a (0906) H     0000 PerPartDroopVsetGfxDfll                   : 0\n 0x038c (0908) H     0000 PaddingPerPartDroop                       : 0\n 0x038e (0910) I fe380000 ThrottlerControlMask                      : 14590\n 0x0392 (0914) I 730f0000 FwDStateMask                              : 3955\n 0x0396 (0918) H     6400 UlvVoltageOffsetSoc                       : 100\n 0x0398 (0920) H     6400 UlvVoltageOffsetGfx                       : 100\n 0x039a (0922) H     1c0c MinVoltageUlvGfx                          : 3100\n 0x039c (0924) H     800c MinVoltageUlvSoc                          : 3200\n 0x039e (0926) H     0000 SocLIVmin                                 : 0\n 0x03a0 (0928) H     0000 PaddingLIVmin                             : 0\n 0x03a2 (0930) B       00 GceaLinkMgrIdleThreshold                  : 0\n 0x03a3 (0931) B       00 RlcUlvParams                              : 0\n 0x03a4 (0932) B       00 RlcUlvParams                              : 0\n 0x03a5 (0933) B       00 RlcUlvParams                              : 0\n 0x03a6 (0934) H     e40c MinVoltageGfx                             : 3300\n 0x03a8 (0936) H     e40c MinVoltageSoc                             : 3300\n 0x03aa (0938) H     5c12 MaxVoltageGfx                             : 4700\n 0x03ac (0940) H     f811 MaxVoltageSoc                             : 4600\n 0x03ae (0942) H     4000 LoadLineResistanceGfx                     : 64\n 0x03b0 (0944) H     0001 LoadLineResistanceSoc                     : 256\n 0x03b2 (0946) H     3200 VDDGFX_TVmin                              : 50\n 0x03b4 (0948) H     3c00 VDDSOC_TVmin                              : 60\n 0x03b6 (0950) H     800c VDDGFX_Vmin_HiTemp                        : 3200\n 0x03b8 (0952) H     800c VDDGFX_Vmin_LoTemp                        : 3200\n 0x03ba (0954) H     800c VDDSOC_Vmin_HiTemp                        : 3200\n 0x03bc (0956) H     800c VDDSOC_Vmin_LoTemp                        : 3200\n 0x03be (0958) H     1400 VDDGFX_TVminHystersis                     : 20\n 0x03c0 (0960) H     1400 VDDSOC_TVminHystersis                     : 20\n 0x03c2 (0962) B       00 VoltageMode                               : 0\n 0x03c3 (0963) B       00 SnapToDiscrete                            : 0\n 0x03c4 (0964) B       02 NumDiscreteLevels                         : 2\n 0x03c5 (0965) B       00 Padding                                   : 0\n 0x03c6 (0966) f 0000803f m                                         : 1\n 0x03ca (0970) f 00000000 b                                         : 0\n 0x03ce (0974) f b537b83e a                                         : 0.3598\n 0x03d2 (0978) f ef1b67bf b                                         :-0.90277\n 0x03d6 (0982) f 4f40a73f c                                         : 1.30665\n 0x03da (0986) H     8b04 SsFmin                                    : 1163\n 0x03dc (0988) H     0000 Padding16                                 : 0\n 0x03de (0990) B       00 VoltageMode                               : 0\n 0x03df (0991) B       00 SnapToDiscrete                            : 0\n 0x03e0 (0992) B       02 NumDiscreteLevels                         : 2\n 0x03e1 (0993) B       00 Padding                                   : 0\n 0x03e2 (0994) f ee7c8f3f m                                         : 1.121\n 0x03e6 (0998) f a69b843e b                                         : 0.259\n 0x03ea (1002) f 44349a3e a                                         : 0.30118\n 0x03ee (1006) f 43ad09be b                                         :-0.13445\n 0x03f2 (1010) f 3d0f363f c                                         : 0.71117\n 0x03f6 (1014) H     f100 SsFmin                                    : 241\n 0x03f8 (1016) H     0000 Padding16                                 : 0\n 0x03fa (1018) B       00 VoltageMode                               : 0\n 0x03fb (1019) B       01 SnapToDiscrete                            : 1\n 0x03fc (1020) B       04 NumDiscreteLevels                         : 4\n 0x03fd (1021) B       00 Padding                                   : 0\n 0x03fe (1022) f cdccac3f m                                         : 1.35\n 0x0402 (1026) f e3a59bbd b                                         :-0.076\n 0x0406 (1030) f 6f81e43e a                                         : 0.4463\n 0x040a (1034) f caa6ccbe b                                         :-0.39971\n 0x040e (1038) f 0421493f c                                         : 0.78566\n 0x0412 (1042) H     c001 SsFmin                                    : 448\n 0x0414 (1044) H     0000 Padding16                                 : 0\n 0x0416 (1046) B       00 VoltageMode                               : 0\n 0x0417 (1047) B       00 SnapToDiscrete                            : 0\n 0x0418 (1048) B       02 NumDiscreteLevels                         : 2\n 0x0419 (1049) B       00 Padding                                   : 0\n 0x041a (1050) f 0000803f m                                         : 1\n 0x041e (1054) f 00000000 b                                         : 0\n 0x0422 (1058) f 72c47a3e a                                         : 0.24489\n 0x0426 (1062) f 4c8984be b                                         :-0.25886\n 0x042a (1066) f dcba433f c                                         : 0.76457\n 0x042e (1070) H     1102 SsFmin                                    : 529\n 0x0430 (1072) H     0000 Padding16                                 : 0\n 0x0432 (1074) B       00 VoltageMode                               : 0\n 0x0433 (1075) B       00 SnapToDiscrete                            : 0\n 0x0434 (1076) B       02 NumDiscreteLevels                         : 2\n 0x0435 (1077) B       00 Padding                                   : 0\n 0x0436 (1078) f 098aaf3f m                                         : 1.3714\n 0x043a (1082) f 295c0fbd b                                         :-0.035\n 0x043e (1086) f 85ceeb3e a                                         : 0.46056\n 0x0442 (1090) f 10ccc1be b                                         :-0.37851\n 0x0446 (1094) f 4720463f c                                         : 0.77393\n 0x044a (1098) H     9b01 SsFmin                                    : 411\n 0x044c (1100) H     0000 Padding16                                 : 0\n 0x044e (1102) B       00 VoltageMode                               : 0\n 0x044f (1103) B       00 SnapToDiscrete                            : 0\n 0x0450 (1104) B       02 NumDiscreteLevels                         : 2\n 0x0451 (1105) B       00 Padding                                   : 0\n 0x0452 (1106) f 6ade893f m                                         : 1.0771\n 0x0456 (1110) f b81e053e b                                         : 0.13\n 0x045a (1114) f 8e75913e a                                         : 0.2841\n 0x045e (1118) f 284957be b                                         :-0.21024\n 0x0462 (1122) f e42c3c3f c                                         : 0.73506\n 0x0466 (1126) H     7301 SsFmin                                    : 371\n 0x0468 (1128) H     0000 Padding16                                 : 0\n 0x046a (1130) B       00 VoltageMode                               : 0\n 0x046b (1131) B       00 SnapToDiscrete                            : 0\n 0x046c (1132) B       02 NumDiscreteLevels                         : 2\n 0x046d (1133) B       00 Padding                                   : 0\n 0x046e (1134) f 098aaf3f m                                         : 1.3714\n 0x0472 (1138) f 295c0fbd b                                         :-0.035\n 0x0476 (1142) f 85ceeb3e a                                         : 0.46056\n 0x047a (1146) f 10ccc1be b                                         :-0.37851\n 0x047e (1150) f 4720463f c                                         : 0.77393\n 0x0482 (1154) H     9b01 SsFmin                                    : 411\n 0x0484 (1156) H     0000 Padding16                                 : 0\n 0x0486 (1158) B       00 VoltageMode                               : 0\n 0x0487 (1159) B       00 SnapToDiscrete                            : 0\n 0x0488 (1160) B       02 NumDiscreteLevels                         : 2\n 0x0489 (1161) B       00 Padding                                   : 0\n 0x048a (1162) f 6ade893f m                                         : 1.0771\n 0x048e (1166) f b81e053e b                                         : 0.13\n 0x0492 (1170) f 8e75913e a                                         : 0.2841\n 0x0496 (1174) f 284957be b                                         :-0.21024\n 0x049a (1178) f e42c3c3f c                                         : 0.73506\n 0x049e (1182) H     7301 SsFmin                                    : 371\n 0x04a0 (1184) H     0000 Padding16                                 : 0\n 0x04a2 (1186) B       00 VoltageMode                               : 0\n 0x04a3 (1187) B       00 SnapToDiscrete                            : 0\n 0x04a4 (1188) B       02 NumDiscreteLevels                         : 2\n 0x04a5 (1189) B       00 Padding                                   : 0\n 0x04a6 (1190) f 7d3f953f m                                         : 1.166\n 0x04aa (1194) f dd24063e b                                         : 0.131\n 0x04ae (1198) f 1d77aa3e a                                         : 0.33294\n 0x04b2 (1202) f ee7768be b                                         :-0.22702\n 0x04b6 (1206) f c91f3c3f c                                         : 0.73486\n 0x04ba (1210) H     5501 SsFmin                                    : 341\n 0x04bc (1212) H     0000 Padding16                                 : 0\n 0x04be (1214) B       00 VoltageMode                               : 0\n 0x04bf (1215) B       00 SnapToDiscrete                            : 0\n 0x04c0 (1216) B       02 NumDiscreteLevels                         : 2\n 0x04c1 (1217) B       00 Padding                                   : 0\n 0x04c2 (1218) f 6abc743f m                                         : 0.956\n 0x04c6 (1222) f ae47613e b                                         : 0.22\n 0x04ca (1226) f 732e653e a                                         : 0.22381\n 0x04ce (1230) f 52ed13be b                                         :-0.14446\n 0x04d2 (1234) f d72f383f c                                         : 0.71948\n 0x04d6 (1238) H     4301 SsFmin                                    : 323\n 0x04d8 (1240) H     0000 Padding16                                 : 0\n 0x04da (1242) B       00 VoltageMode                               : 0\n 0x04db (1243) B       00 SnapToDiscrete                            : 0\n 0x04dc (1244) B       02 NumDiscreteLevels                         : 2\n 0x04dd (1245) B       00 Padding                                   : 0\n 0x04de (1246) f 6abc743f m                                         : 0.956\n 0x04e2 (1250) f ae47613e b                                         : 0.22\n 0x04e6 (1254) f 732e653e a                                         : 0.22381\n 0x04ea (1258) f 52ed13be b                                         :-0.14446\n 0x04ee (1262) f d72f383f c                                         : 0.71948\n 0x04f2 (1266) H     4301 SsFmin                                    : 323\n 0x04f4 (1268) H     0000 Padding16                                 : 0\n 0x04f6 (1270) B       00 VoltageMode                               : 0\n 0x04f7 (1271) B       00 SnapToDiscrete                            : 0\n 0x04f8 (1272) B       02 NumDiscreteLevels                         : 2\n 0x04f9 (1273) B       00 Padding                                   : 0\n 0x04fa (1274) f 0e2d123f m                                         : 0.571\n 0x04fe (1278) f 9a99d93e b                                         : 0.425\n 0x0502 (1282) f 2783a33d a                                         : 0.07984\n 0x0506 (1286) f 8d28edbc b                                         :-0.02895\n 0x050a (1290) f e7e3323f c                                         : 0.69879\n 0x050e (1294) H     b600 SsFmin                                    : 182\n 0x0510 (1296) H     0000 Padding16                                 : 0\n 0x0512 (1298) B       00 VoltageMode                               : 0\n 0x0513 (1299) B       00 SnapToDiscrete                            : 0\n 0x0514 (1300) B       02 NumDiscreteLevels                         : 2\n 0x0515 (1301) B       00 Padding                                   : 0\n 0x0516 (1302) f 6abc743f m                                         : 0.956\n 0x051a (1306) f ae47613e b                                         : 0.22\n 0x051e (1310) f 732e653e a                                         : 0.22381\n 0x0522 (1314) f 52ed13be b                                         :-0.14446\n 0x0526 (1318) f d72f383f c                                         : 0.71948\n 0x052a (1322) H     4301 SsFmin                                    : 323\n 0x052c (1324) H     0000 Padding16                                 : 0\n 0x052e (1326) H     f401 FreqTableGfx                              : 500\n 0x0530 (1328) H     640a FreqTableGfx                              : 2660\n 0x0532 (1330) H     0000 FreqTableGfx                              : 0\n 0x0534 (1332) H     0000 FreqTableGfx                              : 0\n 0x0536 (1334) H     0000 FreqTableGfx                              : 0\n 0x0538 (1336) H     0000 FreqTableGfx                              : 0\n 0x053a (1338) H     0000 FreqTableGfx                              : 0\n 0x053c (1340) H     0000 FreqTableGfx                              : 0\n 0x053e (1342) H     0000 FreqTableGfx                              : 0\n 0x0540 (1344) H     0000 FreqTableGfx                              : 0\n 0x0542 (1346) H     0000 FreqTableGfx                              : 0\n 0x0544 (1348) H     0000 FreqTableGfx                              : 0\n 0x0546 (1350) H     0000 FreqTableGfx                              : 0\n 0x0548 (1352) H     0000 FreqTableGfx                              : 0\n 0x054a (1354) H     0000 FreqTableGfx                              : 0\n 0x054c (1356) H     0000 FreqTableGfx                              : 0\n 0x054e (1358) H     6b01 FreqTableVclk                             : 363\n 0x0550 (1360) H     c505 FreqTableVclk                             : 1477\n 0x0552 (1362) H     0000 FreqTableVclk                             : 0\n 0x0554 (1364) H     0000 FreqTableVclk                             : 0\n 0x0556 (1366) H     0000 FreqTableVclk                             : 0\n 0x0558 (1368) H     0000 FreqTableVclk                             : 0\n 0x055a (1370) H     0000 FreqTableVclk                             : 0\n 0x055c (1372) H     0000 FreqTableVclk                             : 0\n 0x055e (1374) H     3d01 FreqTableDclk                             : 317\n 0x0560 (1376) H     f204 FreqTableDclk                             : 1266\n 0x0562 (1378) H     0000 FreqTableDclk                             : 0\n 0x0564 (1380) H     0000 FreqTableDclk                             : 0\n 0x0566 (1382) H     0000 FreqTableDclk                             : 0\n 0x0568 (1384) H     0000 FreqTableDclk                             : 0\n 0x056a (1386) H     0000 FreqTableDclk                             : 0\n 0x056c (1388) H     0000 FreqTableDclk                             : 0\n 0x056e (1390) H     e001 FreqTableSocclk                           : 480\n 0x0570 (1392) H     b004 FreqTableSocclk                           : 1200\n 0x0572 (1394) H     0000 FreqTableSocclk                           : 0\n 0x0574 (1396) H     0000 FreqTableSocclk                           : 0\n 0x0576 (1398) H     0000 FreqTableSocclk                           : 0\n 0x0578 (1400) H     0000 FreqTableSocclk                           : 0\n 0x057a (1402) H     0000 FreqTableSocclk                           : 0\n 0x057c (1404) H     0000 FreqTableSocclk                           : 0\n 0x057e (1406) H     6100 FreqTableUclk                             : 97\n 0x0580 (1408) H     c901 FreqTableUclk                             : 457\n 0x0582 (1410) H     a202 FreqTableUclk                             : 674\n 0x0584 (1412) H     e803 FreqTableUclk                             : 1000\n 0x0586 (1414) H     a201 FreqTableDcefclk                          : 418\n 0x0588 (1416) H     b004 FreqTableDcefclk                          : 1200\n 0x058a (1418) H     0000 FreqTableDcefclk                          : 0\n 0x058c (1420) H     0000 FreqTableDcefclk                          : 0\n 0x058e (1422) H     0000 FreqTableDcefclk                          : 0\n 0x0590 (1424) H     0000 FreqTableDcefclk                          : 0\n 0x0592 (1426) H     0000 FreqTableDcefclk                          : 0\n 0x0594 (1428) H     0000 FreqTableDcefclk                          : 0\n 0x0596 (1430) H     e701 FreqTableDispclk                          : 487\n 0x0598 (1432) H     c104 FreqTableDispclk                          : 1217\n 0x059a (1434) H     0000 FreqTableDispclk                          : 0\n 0x059c (1436) H     0000 FreqTableDispclk                          : 0\n 0x059e (1438) H     0000 FreqTableDispclk                          : 0\n 0x05a0 (1440) H     0000 FreqTableDispclk                          : 0\n 0x05a2 (1442) H     0000 FreqTableDispclk                          : 0\n 0x05a4 (1444) H     0000 FreqTableDispclk                          : 0\n 0x05a6 (1446) H     e701 FreqTablePixclk                           : 487\n 0x05a8 (1448) H     c104 FreqTablePixclk                           : 1217\n 0x05aa (1450) H     0000 FreqTablePixclk                           : 0\n 0x05ac (1452) H     0000 FreqTablePixclk                           : 0\n 0x05ae (1454) H     0000 FreqTablePixclk                           : 0\n 0x05b0 (1456) H     0000 FreqTablePixclk                           : 0\n 0x05b2 (1458) H     0000 FreqTablePixclk                           : 0\n 0x05b4 (1460) H     0000 FreqTablePixclk                           : 0\n 0x05b6 (1462) H     2c01 FreqTablePhyclk                           : 300\n 0x05b8 (1464) H     2a03 FreqTablePhyclk                           : 810\n 0x05ba (1466) H     0000 FreqTablePhyclk                           : 0\n 0x05bc (1468) H     0000 FreqTablePhyclk                           : 0\n 0x05be (1470) H     0000 FreqTablePhyclk                           : 0\n 0x05c0 (1472) H     0000 FreqTablePhyclk                           : 0\n 0x05c2 (1474) H     0000 FreqTablePhyclk                           : 0\n 0x05c4 (1476) H     0000 FreqTablePhyclk                           : 0\n 0x05c6 (1478) H     e701 FreqTableDtbclk                           : 487\n 0x05c8 (1480) H     c104 FreqTableDtbclk                           : 1217\n 0x05ca (1482) H     0000 FreqTableDtbclk                           : 0\n 0x05cc (1484) H     0000 FreqTableDtbclk                           : 0\n 0x05ce (1486) H     0000 FreqTableDtbclk                           : 0\n 0x05d0 (1488) H     0000 FreqTableDtbclk                           : 0\n 0x05d2 (1490) H     0000 FreqTableDtbclk                           : 0\n 0x05d4 (1492) H     0000 FreqTableDtbclk                           : 0\n 0x05d6 (1494) H     2602 FreqTableFclk                             : 550\n 0x05d8 (1496) H     9407 FreqTableFclk                             : 1940\n 0x05da (1498) H     0000 FreqTableFclk                             : 0\n 0x05dc (1500) H     0000 FreqTableFclk                             : 0\n 0x05de (1502) H     0000 FreqTableFclk                             : 0\n 0x05e0 (1504) H     0000 FreqTableFclk                             : 0\n 0x05e2 (1506) H     0000 FreqTableFclk                             : 0\n 0x05e4 (1508) H     0000 FreqTableFclk                             : 0\n 0x05e6 (1510) I 00000000 Paddingclks                               : 0\n 0x05ea (1514) f 00000000 a                                         : 0\n 0x05ee (1518) f 00000000 b                                         : 0\n 0x05f2 (1522) f 00000000 c                                         : 0\n 0x05f6 (1526) f 00000000 a                                         : 0\n 0x05fa (1530) f 00000000 b                                         : 0\n 0x05fe (1534) f 00000000 c                                         : 0\n 0x0602 (1538) f 00000000 a                                         : 0\n 0x0606 (1542) f 00000000 b                                         : 0\n 0x060a (1546) f 00000000 c                                         : 0\n 0x060e (1550) f 00000000 a                                         : 0\n 0x0612 (1554) f 00000000 b                                         : 0\n 0x0616 (1558) f 00000000 c                                         : 0\n 0x061a (1562) f 00000000 a                                         : 0\n 0x061e (1566) f 00000000 b                                         : 0\n 0x0622 (1570) f 00000000 c                                         : 0\n 0x0626 (1574) I 640a0000 DcModeMaxFreq                             : 2660\n 0x062a (1578) I b0040000 DcModeMaxFreq                             : 1200\n 0x062e (1582) I e8030000 DcModeMaxFreq                             : 1000\n 0x0632 (1586) I 94070000 DcModeMaxFreq                             : 1940\n 0x0636 (1590) I f2040000 DcModeMaxFreq                             : 1266\n 0x063a (1594) I c5050000 DcModeMaxFreq                             : 1477\n 0x063e (1598) I f2040000 DcModeMaxFreq                             : 1266\n 0x0642 (1602) I c5050000 DcModeMaxFreq                             : 1477\n 0x0646 (1606) I b0040000 DcModeMaxFreq                             : 1200\n 0x064a (1610) I c1040000 DcModeMaxFreq                             : 1217\n 0x064e (1614) I c1040000 DcModeMaxFreq                             : 1217\n 0x0652 (1618) I 2a030000 DcModeMaxFreq                             : 810\n 0x0656 (1622) I c1040000 DcModeMaxFreq                             : 1217\n 0x065a (1626) B       00 FreqTableUclkDiv                          : 0\n 0x065b (1627) B       02 FreqTableUclkDiv                          : 2\n 0x065c (1628) B       03 FreqTableUclkDiv                          : 3\n 0x065d (1629) B       03 FreqTableUclkDiv                          : 3\n 0x065e (1630) H     7805 FclkBoostFreq                             : 1400\n 0x0660 (1632) H     0000 FclkParamPadding                          : 0\n 0x0662 (1634) H     4c01 Mp0clkFreq                                : 332\n 0x0664 (1636) H     fa01 Mp0clkFreq                                : 506\n 0x0666 (1638) H     f00a Mp0DpmVoltage                             : 2800\n 0x0668 (1640) H     800c Mp0DpmVoltage                             : 3200\n 0x066a (1642) H     8c0a MemVddciVoltage                           : 2700\n 0x066c (1644) H     800c MemVddciVoltage                           : 3200\n 0x066e (1646) H     480d MemVddciVoltage                           : 3400\n 0x0670 (1648) H     480d MemVddciVoltage                           : 3400\n 0x0672 (1650) H     8813 MemMvddVoltage                            : 5000\n 0x0674 (1652) H     1815 MemMvddVoltage                            : 5400\n 0x0676 (1654) H     1815 MemMvddVoltage                            : 5400\n 0x0678 (1656) H     1815 MemMvddVoltage                            : 5400\n 0x067a (1658) H     f401 GfxclkFgfxoffEntry                        : 500\n 0x067c (1660) H     2003 GfxclkFinit                               : 800\n 0x067e (1662) H     f401 GfxclkFidle                               : 500\n 0x0680 (1664) B       01 GfxclkSource                              : 1\n 0x0681 (1665) B       00 GfxclkPadding                             : 0\n 0x0682 (1666) B       01 GfxGpoSubFeatureMask                      : 1\n 0x0683 (1667) B       02 GfxGpoEnabledWorkPolicyMask               : 2\n 0x0684 (1668) B       5d GfxGpoDisabledWorkPolicyMask              : 93\n 0x0685 (1669) B       00 GfxGpoPadding                             : 0\n 0x0686 (1670) I 01000000 GfxGpoVotingAllow                         : 1\n 0x068a (1674) I 00000000 GfxGpoPadding32                           : 0\n 0x068e (1678) I 00000000 GfxGpoPadding32                           : 0\n 0x0692 (1682) I 00000000 GfxGpoPadding32                           : 0\n 0x0696 (1686) I 00000000 GfxGpoPadding32                           : 0\n 0x069a (1690) H     0000 GfxDcsFopt                                : 0\n 0x069c (1692) H     0000 GfxDcsFclkFopt                            : 0\n 0x069e (1694) H     0000 GfxDcsUclkFopt                            : 0\n 0x06a0 (1696) H     0000 DcsGfxOffVoltage                          : 0\n 0x06a2 (1698) H     0000 DcsMinGfxOffTime                          : 0\n 0x06a4 (1700) H     0000 DcsMaxGfxOffTime                          : 0\n 0x06a6 (1702) I 00000000 DcsMinCreditAccum                         : 0\n 0x06aa (1706) H     0000 DcsExitHysteresis                         : 0\n 0x06ac (1708) H     0000 DcsTimeout                                : 0\n 0x06ae (1710) I 00000000 DcsParamPadding                           : 0\n 0x06b2 (1714) I 00000000 DcsParamPadding                           : 0\n 0x06b6 (1718) I 00000000 DcsParamPadding                           : 0\n 0x06ba (1722) I 00000000 DcsParamPadding                           : 0\n 0x06be (1726) I 00000000 DcsParamPadding                           : 0\n 0x06c2 (1730) H     2a16 FlopsPerByteTable                         : 5674\n 0x06c4 (1732) H     d715 FlopsPerByteTable                         : 5591\n 0x06c6 (1734) H     8415 FlopsPerByteTable                         : 5508\n 0x06c8 (1736) H     3015 FlopsPerByteTable                         : 5424\n 0x06ca (1738) H     dd14 FlopsPerByteTable                         : 5341\n 0x06cc (1740) H     8a14 FlopsPerByteTable                         : 5258\n 0x06ce (1742) H     3614 FlopsPerByteTable                         : 5174\n 0x06d0 (1744) H     e313 FlopsPerByteTable                         : 5091\n 0x06d2 (1746) H     9013 FlopsPerByteTable                         : 5008\n 0x06d4 (1748) H     3d13 FlopsPerByteTable                         : 4925\n 0x06d6 (1750) H     e912 FlopsPerByteTable                         : 4841\n 0x06d8 (1752) H     9612 FlopsPerByteTable                         : 4758\n 0x06da (1754) H     b111 FlopsPerByteTable                         : 4529\n 0x06dc (1756) H     cc10 FlopsPerByteTable                         : 4300\n 0x06de (1758) H     e70f FlopsPerByteTable                         : 4071\n 0x06e0 (1760) H     020f FlopsPerByteTable                         : 3842\n 0x06e2 (1762) B       00 LowestUclkReservedForUlv                  : 0\n 0x06e3 (1763) B       00 PaddingMem                                : 0\n 0x06e4 (1764) B       00 PaddingMem                                : 0\n 0x06e5 (1765) B       00 PaddingMem                                : 0\n 0x06e6 (1766) B       03 UclkDpmPstates                            : 3\n 0x06e7 (1767) B       02 UclkDpmPstates                            : 2\n 0x06e8 (1768) B       01 UclkDpmPstates                            : 1\n 0x06e9 (1769) B       00 UclkDpmPstates                            : 0\n 0x06ea (1770) H     0000 Fmin                                      : 0\n 0x06ec (1772) H     0000 Fmax                                      : 0\n 0x06ee (1774) H     0000 Fmin                                      : 0\n 0x06f0 (1776) H     0000 Fmax                                      : 0\n 0x06f2 (1778) H     0000 UclkDpmMidstepFreq                        : 0\n 0x06f4 (1780) H     0000 UclkMidstepPadding                        : 0\n 0x06f6 (1782) B       00 PcieGenSpeed                              : 0\n 0x06f7 (1783) B       03 PcieGenSpeed                              : 3\n 0x06f8 (1784) B       01 PcieLaneCount                             : 1\n 0x06f9 (1785) B       06 PcieLaneCount                             : 6\n 0x06fa (1786) H     3601 LclkFreq                                  : 310\n 0x06fc (1788) H     6b02 LclkFreq                                  : 619\n 0x06fe (1790) H     3700 FanStopTemp                               : 55\n 0x0700 (1792) H     4600 FanStartTemp                              : 70\n 0x0702 (1794) H     9001 FanGain                                   : 400\n 0x0704 (1796) H     9001 FanGain                                   : 400\n 0x0706 (1798) H     9001 FanGain                                   : 400\n 0x0708 (1800) H     9001 FanGain                                   : 400\n 0x070a (1802) H     9001 FanGain                                   : 400\n 0x070c (1804) H     9001 FanGain                                   : 400\n 0x070e (1806) H     9001 FanGain                                   : 400\n 0x0710 (1808) H     9001 FanGain                                   : 400\n 0x0712 (1810) H     9001 FanGain                                   : 400\n 0x0714 (1812) H     9001 FanGain                                   : 400\n 0x0716 (1814) H     1900 FanPwmMin                                 : 25\n 0x0718 (1816) H     7206 FanAcousticLimitRpm                       : 1650\n 0x071a (1818) H     d007 FanThrottlingRpm                          : 2000\n 0x071c (1820) H     e40c FanMaximumRpm                             : 3300\n 0x071e (1822) H     0000 MGpuFanBoostLimitRpm                      : 0\n 0x0720 (1824) H     5f00 FanTargetTemperature                      : 95\n 0x0722 (1826) H     f401 FanTargetGfxclk                           : 500\n 0x0724 (1828) H     0000 FanPadding16                              : 0\n 0x0726 (1830) B       01 FanTempInputSelect                        : 1\n 0x0727 (1831) B       00 FanPadding                                : 0\n 0x0728 (1832) B       01 FanZeroRpmEnable                          : 1\n 0x0729 (1833) B       02 FanTachEdgePerRev                         : 2\n 0x072a (1834) h     0000 FuzzyFan_ErrorSetDelta                    : 0\n 0x072c (1836) h     0000 FuzzyFan_ErrorRateSetDelta                : 0\n 0x072e (1838) h     0000 FuzzyFan_PwmSetDelta                      : 0\n 0x0730 (1840) H     0000 FuzzyFan_Reserved                         : 0\n 0x0732 (1842) B       00 OverrideAvfsGb                            : 0\n 0x0733 (1843) B       00 OverrideAvfsGb                            : 0\n 0x0734 (1844) B       01 BtcGbGfxDfllModelSelect                   : 1\n 0x0735 (1845) B       00 Padding8_Avfs                             : 0\n 0x0736 (1846) f 00000000 a                                         : 0\n 0x073a (1850) f 00000000 b                                         : 0\n 0x073e (1854) f 00000000 c                                         : 0\n 0x0742 (1858) f 00000000 a                                         : 0\n 0x0746 (1862) f 00000000 b                                         : 0\n 0x074a (1866) f 00000000 c                                         : 0\n 0x074e (1870) f 0d54863d a                                         : 0.06559\n 0x0752 (1874) f bc05d2bd b                                         :-0.10255\n 0x0756 (1878) f 1f80143e c                                         : 0.14502\n 0x075a (1882) f 00000000 a                                         : 0\n 0x075e (1886) f 00000000 b                                         : 0\n 0x0762 (1890) f 00000000 c                                         : 0\n 0x0766 (1894) f 00000000 a                                         : 0\n 0x076a (1898) f 00000000 b                                         : 0\n 0x076e (1902) f 00000000 c                                         : 0\n 0x0772 (1906) f 00000000 m                                         : 0\n 0x0776 (1910) f 00000000 b                                         : 0\n 0x077a (1914) f 00000000 m                                         : 0\n 0x077e (1918) f 00000000 b                                         : 0\n 0x0782 (1922) f 9a99993e Fset                                      : 0.3\n 0x0786 (1926) f 0000c03f Fset                                      : 1.5\n 0x078a (1930) f 33331340 Fset                                      : 2.3\n 0x078e (1934) f 00002040 Fset                                      : 2.5\n 0x0792 (1938) f 66664640 Fset                                      : 3.1\n 0x0796 (1942) f 0ad7233d Vdroop                                    : 0.04\n 0x079a (1946) f dd24863d Vdroop                                    : 0.0655\n 0x079e (1950) f a245b63d Vdroop                                    : 0.089\n 0x07a2 (1954) f 39b4c83d Vdroop                                    : 0.098\n 0x07a6 (1958) f c74bb73e Vdroop                                    : 0.358\n 0x07aa (1962) f 7593983d a                                         : 0.0745\n 0x07ae (1966) f 2fdd84be b                                         :-0.2595\n 0x07b2 (1970) f a3927a3e c                                         : 0.2447\n 0x07b6 (1974) f e56121bd a                                         :-0.0394\n 0x07ba (1978) f 04568e3e b                                         : 0.278\n 0x07be (1982) f c5722bbe c                                         :-0.16743\n 0x07c2 (1986) H     c000 DcTol                                     : 192\n 0x07c4 (1988) H     c000 DcTol                                     : 192\n 0x07c6 (1990) B       01 DcBtcEnabled                              : 1\n 0x07c7 (1991) B       01 DcBtcEnabled                              : 1\n 0x07c8 (1992) B       00 Padding8_GfxBtc                           : 0\n 0x07c9 (1993) B       00 Padding8_GfxBtc                           : 0\n 0x07ca (1994) H     0000 DcBtcMin                                  : 0\n 0x07cc (1996) H     0000 DcBtcMin                                  : 0\n 0x07ce (1998) H     c000 DcBtcMax                                  : 192\n 0x07d0 (2000) H     c000 DcBtcMax                                  : 192\n 0x07d2 (2002) H     1900 DcBtcGb                                   : 25\n 0x07d4 (2004) H     1900 DcBtcGb                                   : 25\n 0x07d6 (2006) B       00 XgmiDpmPstates                            : 0\n 0x07d7 (2007) B       00 XgmiDpmPstates                            : 0\n 0x07d8 (2008) B       00 XgmiDpmSpare                              : 0\n 0x07d9 (2009) B       00 XgmiDpmSpare                              : 0\n 0x07da (2010) I 00000000 DebugOverrides                            : 0\n 0x07de (2014) f 00000000 a                                         : 0\n 0x07e2 (2018) f 00000000 b                                         : 0\n 0x07e6 (2022) f 00000000 c                                         : 0\n 0x07ea (2026) f 00000000 a                                         : 0\n 0x07ee (2030) f 00000000 b                                         : 0\n 0x07f2 (2034) f 00000000 c                                         : 0\n 0x07f6 (2038) f 00000000 a                                         : 0\n 0x07fa (2042) f 00000000 b                                         : 0\n 0x07fe (2046) f 00000000 c                                         : 0\n 0x0802 (2050) f 00000000 a                                         : 0\n 0x0806 (2054) f 00000000 b                                         : 0\n 0x080a (2058) f 00000000 c                                         : 0\n 0x080e (2062) B       00 CustomerVariant                           : 0\n 0x080f (2063) B       01 VcBtcEnabled                              : 1\n 0x0810 (2064) H     3b0b VcBtcVminT0                               : 2875\n 0x0812 (2066) H     4501 VcBtcFixedVminAgingOffset                 : 325\n 0x0814 (2068) H     0000 VcBtcVmin2PsmDegrationGb                  : 0\n 0x0816 (2070) f 3480373b VcBtcPsmA                                 : 0.0028\n 0x081a (2074) f 9fabcd3e VcBtcPsmB                                 : 0.4017\n 0x081e (2078) f ed0d3e3c VcBtcVminA                                : 0.0116\n 0x0822 (2082) f 7593f83e VcBtcVminB                                : 0.4855\n 0x0826 (2086) H     0000 LedGpio                                   : 0\n 0x0828 (2088) H     0100 GfxPowerStagesGpio                        : 1\n 0x082a (2090) I 00000000 SkuReserved                               : 0\n 0x082e (2094) I 00000000 SkuReserved                               : 0\n 0x0832 (2098) I 00000000 SkuReserved                               : 0\n 0x0836 (2102) I 00000000 SkuReserved                               : 0\n 0x083a (2106) I 00000000 SkuReserved                               : 0\n 0x083e (2110) I 00000000 SkuReserved                               : 0\n 0x0842 (2114) I 00000000 SkuReserved                               : 0\n 0x0846 (2118) I 00000000 SkuReserved                               : 0\n 0x084a (2122) I 00000000 GamingClk                                 : 0\n 0x084e (2126) I 00000000 GamingClk                                 : 0\n 0x0852 (2130) I 00000000 GamingClk                                 : 0\n 0x0856 (2134) I 00000000 GamingClk                                 : 0\n 0x085a (2138) I 00000000 GamingClk                                 : 0\n 0x085e (2142) I 00000000 GamingClk                                 : 0\n 0x0862 (2146) B       00 Enabled                                   : 0\n 0x0863 (2147) B       00 Speed                                     : 0\n 0x0864 (2148) B       00 SlaveAddress                              : 0\n 0x0865 (2149) B       00 ControllerPort                            : 0\n 0x0866 (2150) B       00 ControllerName                            : 0\n 0x0867 (2151) B       00 ThermalThrotter                           : 0\n 0x0868 (2152) B       00 I2cProtocol                               : 0\n 0x0869 (2153) B       00 PaddingConfig                             : 0\n 0x086a (2154) B       00 Enabled                                   : 0\n 0x086b (2155) B       00 Speed                                     : 0\n 0x086c (2156) B       00 SlaveAddress                              : 0\n 0x086d (2157) B       00 ControllerPort                            : 0\n 0x086e (2158) B       00 ControllerName                            : 0\n 0x086f (2159) B       00 ThermalThrotter                           : 0\n 0x0870 (2160) B       00 I2cProtocol                               : 0\n 0x0871 (2161) B       00 PaddingConfig                             : 0\n 0x0872 (2162) B       00 Enabled                                   : 0\n 0x0873 (2163) B       00 Speed                                     : 0\n 0x0874 (2164) B       00 SlaveAddress                              : 0\n 0x0875 (2165) B       00 ControllerPort                            : 0\n 0x0876 (2166) B       00 ControllerName                            : 0\n 0x0877 (2167) B       00 ThermalThrotter                           : 0\n 0x0878 (2168) B       00 I2cProtocol                               : 0\n 0x0879 (2169) B       00 PaddingConfig                             : 0\n 0x087a (2170) B       00 Enabled                                   : 0\n 0x087b (2171) B       00 Speed                                     : 0\n 0x087c (2172) B       00 SlaveAddress                              : 0\n 0x087d (2173) B       00 ControllerPort                            : 0\n 0x087e (2174) B       00 ControllerName                            : 0\n 0x087f (2175) B       00 ThermalThrotter                           : 0\n 0x0880 (2176) B       00 I2cProtocol                               : 0\n 0x0881 (2177) B       00 PaddingConfig                             : 0\n 0x0882 (2178) B       00 Enabled                                   : 0\n 0x0883 (2179) B       00 Speed                                     : 0\n 0x0884 (2180) B       00 SlaveAddress                              : 0\n 0x0885 (2181) B       00 ControllerPort                            : 0\n 0x0886 (2182) B       00 ControllerName                            : 0\n 0x0887 (2183) B       00 ThermalThrotter                           : 0\n 0x0888 (2184) B       00 I2cProtocol                               : 0\n 0x0889 (2185) B       00 PaddingConfig                             : 0\n 0x088a (2186) B       00 Enabled                                   : 0\n 0x088b (2187) B       00 Speed                                     : 0\n 0x088c (2188) B       00 SlaveAddress                              : 0\n 0x088d (2189) B       00 ControllerPort                            : 0\n 0x088e (2190) B       00 ControllerName                            : 0\n 0x088f (2191) B       00 ThermalThrotter                           : 0\n 0x0890 (2192) B       00 I2cProtocol                               : 0\n 0x0891 (2193) B       00 PaddingConfig                             : 0\n 0x0892 (2194) B       00 Enabled                                   : 0\n 0x0893 (2195) B       00 Speed                                     : 0\n 0x0894 (2196) B       00 SlaveAddress                              : 0\n 0x0895 (2197) B       00 ControllerPort                            : 0\n 0x0896 (2198) B       00 ControllerName                            : 0\n 0x0897 (2199) B       00 ThermalThrotter                           : 0\n 0x0898 (2200) B       00 I2cProtocol                               : 0\n 0x0899 (2201) B       00 PaddingConfig                             : 0\n 0x089a (2202) B       00 Enabled                                   : 0\n 0x089b (2203) B       00 Speed                                     : 0\n 0x089c (2204) B       00 SlaveAddress                              : 0\n 0x089d (2205) B       00 ControllerPort                            : 0\n 0x089e (2206) B       00 ControllerName                            : 0\n 0x089f (2207) B       00 ThermalThrotter                           : 0\n 0x08a0 (2208) B       00 I2cProtocol                               : 0\n 0x08a1 (2209) B       00 PaddingConfig                             : 0\n 0x08a2 (2210) B       00 Enabled                                   : 0\n 0x08a3 (2211) B       00 Speed                                     : 0\n 0x08a4 (2212) B       00 SlaveAddress                              : 0\n 0x08a5 (2213) B       00 ControllerPort                            : 0\n 0x08a6 (2214) B       00 ControllerName                            : 0\n 0x08a7 (2215) B       00 ThermalThrotter                           : 0\n 0x08a8 (2216) B       00 I2cProtocol                               : 0\n 0x08a9 (2217) B       00 PaddingConfig                             : 0\n 0x08aa (2218) B       00 Enabled                                   : 0\n 0x08ab (2219) B       00 Speed                                     : 0\n 0x08ac (2220) B       00 SlaveAddress                              : 0\n 0x08ad (2221) B       00 ControllerPort                            : 0\n 0x08ae (2222) B       00 ControllerName                            : 0\n 0x08af (2223) B       00 ThermalThrotter                           : 0\n 0x08b0 (2224) B       00 I2cProtocol                               : 0\n 0x08b1 (2225) B       00 PaddingConfig                             : 0\n 0x08b2 (2226) B       00 Enabled                                   : 0\n 0x08b3 (2227) B       00 Speed                                     : 0\n 0x08b4 (2228) B       00 SlaveAddress                              : 0\n 0x08b5 (2229) B       00 ControllerPort                            : 0\n 0x08b6 (2230) B       00 ControllerName                            : 0\n 0x08b7 (2231) B       00 ThermalThrotter                           : 0\n 0x08b8 (2232) B       00 I2cProtocol                               : 0\n 0x08b9 (2233) B       00 PaddingConfig                             : 0\n 0x08ba (2234) B       00 Enabled                                   : 0\n 0x08bb (2235) B       00 Speed                                     : 0\n 0x08bc (2236) B       00 SlaveAddress                              : 0\n 0x08bd (2237) B       00 ControllerPort                            : 0\n 0x08be (2238) B       00 ControllerName                            : 0\n 0x08bf (2239) B       00 ThermalThrotter                           : 0\n 0x08c0 (2240) B       00 I2cProtocol                               : 0\n 0x08c1 (2241) B       00 PaddingConfig                             : 0\n 0x08c2 (2242) B       00 Enabled                                   : 0\n 0x08c3 (2243) B       00 Speed                                     : 0\n 0x08c4 (2244) B       00 SlaveAddress                              : 0\n 0x08c5 (2245) B       00 ControllerPort                            : 0\n 0x08c6 (2246) B       00 ControllerName                            : 0\n 0x08c7 (2247) B       00 ThermalThrotter                           : 0\n 0x08c8 (2248) B       00 I2cProtocol                               : 0\n 0x08c9 (2249) B       00 PaddingConfig                             : 0\n 0x08ca (2250) B       00 Enabled                                   : 0\n 0x08cb (2251) B       00 Speed                                     : 0\n 0x08cc (2252) B       00 SlaveAddress                              : 0\n 0x08cd (2253) B       00 ControllerPort                            : 0\n 0x08ce (2254) B       00 ControllerName                            : 0\n 0x08cf (2255) B       00 ThermalThrotter                           : 0\n 0x08d0 (2256) B       00 I2cProtocol                               : 0\n 0x08d1 (2257) B       00 PaddingConfig                             : 0\n 0x08d2 (2258) B       00 Enabled                                   : 0\n 0x08d3 (2259) B       00 Speed                                     : 0\n 0x08d4 (2260) B       00 SlaveAddress                              : 0\n 0x08d5 (2261) B       00 ControllerPort                            : 0\n 0x08d6 (2262) B       00 ControllerName                            : 0\n 0x08d7 (2263) B       00 ThermalThrotter                           : 0\n 0x08d8 (2264) B       00 I2cProtocol                               : 0\n 0x08d9 (2265) B       00 PaddingConfig                             : 0\n 0x08da (2266) B       00 Enabled                                   : 0\n 0x08db (2267) B       00 Speed                                     : 0\n 0x08dc (2268) B       00 SlaveAddress                              : 0\n 0x08dd (2269) B       00 ControllerPort                            : 0\n 0x08de (2270) B       00 ControllerName                            : 0\n 0x08df (2271) B       00 ThermalThrotter                           : 0\n 0x08e0 (2272) B       00 I2cProtocol                               : 0\n 0x08e1 (2273) B       00 PaddingConfig                             : 0\n 0x08e2 (2274) B       00 GpioScl                                   : 0\n 0x08e3 (2275) B       00 GpioSda                                   : 0\n 0x08e4 (2276) B       00 FchUsbPdSlaveAddr                         : 0\n 0x08e5 (2277) B       00 I2cSpare                                  : 0\n 0x08e6 (2278) B       00 VddGfxVrMapping                           : 0\n 0x08e7 (2279) B       00 VddSocVrMapping                           : 0\n 0x08e8 (2280) B       00 VddMem0VrMapping                          : 0\n 0x08e9 (2281) B       00 VddMem1VrMapping                          : 0\n 0x08ea (2282) B       00 GfxUlvPhaseSheddingMask                   : 0\n 0x08eb (2283) B       00 SocUlvPhaseSheddingMask                   : 0\n 0x08ec (2284) B       00 VddciUlvPhaseSheddingMask                 : 0\n 0x08ed (2285) B       00 MvddUlvPhaseSheddingMask                  : 0\n 0x08ee (2286) H     0000 GfxMaxCurrent                             : 0\n 0x08f0 (2288) b       00 GfxOffset                                 : 0\n 0x08f1 (2289) B       00 Padding_TelemetryGfx                      : 0\n 0x08f2 (2290) H     0000 SocMaxCurrent                             : 0\n 0x08f4 (2292) b       00 SocOffset                                 : 0\n 0x08f5 (2293) B       00 Padding_TelemetrySoc                      : 0\n 0x08f6 (2294) H     0000 Mem0MaxCurrent                            : 0\n 0x08f8 (2296) b       00 Mem0Offset                                : 0\n 0x08f9 (2297) B       00 Padding_TelemetryMem0                     : 0\n 0x08fa (2298) H     0000 Mem1MaxCurrent                            : 0\n 0x08fc (2300) b       00 Mem1Offset                                : 0\n 0x08fd (2301) B       00 Padding_TelemetryMem1                     : 0\n 0x08fe (2302) I 00000000 MvddRatio                                 : 0\n 0x0902 (2306) B       00 AcDcGpio                                  : 0\n 0x0903 (2307) B       00 AcDcPolarity                              : 0\n 0x0904 (2308) B       00 VR0HotGpio                                : 0\n 0x0905 (2309) B       00 VR0HotPolarity                            : 0\n 0x0906 (2310) B       00 VR1HotGpio                                : 0\n 0x0907 (2311) B       00 VR1HotPolarity                            : 0\n 0x0908 (2312) B       00 GthrGpio                                  : 0\n 0x0909 (2313) B       00 GthrPolarity                              : 0\n 0x090a (2314) B       00 LedPin0                                   : 0\n 0x090b (2315) B       00 LedPin1                                   : 0\n 0x090c (2316) B       00 LedPin2                                   : 0\n 0x090d (2317) B       00 LedEnableMask                             : 0\n 0x090e (2318) B       00 LedPcie                                   : 0\n 0x090f (2319) B       00 LedError                                  : 0\n 0x0910 (2320) B       00 LedSpare1                                 : 0\n 0x0911 (2321) B       01 LedSpare1                                 : 1\n 0x0912 (2322) B       00 PllGfxclkSpreadEnabled                    : 0\n 0x0913 (2323) B       00 PllGfxclkSpreadPercent                    : 0\n 0x0914 (2324) H     0000 PllGfxclkSpreadFreq                       : 0\n 0x0916 (2326) B       00 DfllGfxclkSpreadEnabled                   : 0\n 0x0917 (2327) B       00 DfllGfxclkSpreadPercent                   : 0\n 0x0918 (2328) H     0000 DfllGfxclkSpreadFreq                      : 0\n 0x091a (2330) H     0000 UclkSpreadPadding                         : 0\n 0x091c (2332) H     0000 UclkSpreadFreq                            : 0\n 0x091e (2334) B       00 FclkSpreadEnabled                         : 0\n 0x091f (2335) B       00 FclkSpreadPercent                         : 0\n 0x0920 (2336) H     0000 FclkSpreadFreq                            : 0\n 0x0922 (2338) I 00000000 MemoryChannelEnabled                      : 0\n 0x0926 (2342) B       00 DramBitWidth                              : 0\n 0x0927 (2343) B       00 PaddingMem1                               : 0\n 0x0928 (2344) B       00 PaddingMem1                               : 0\n 0x0929 (2345) B       00 PaddingMem1                               : 0\n 0x092a (2346) H     0000 TotalBoardPower                           : 0\n 0x092c (2348) H     0000 BoardPowerPadding                         : 0\n 0x092e (2350) B       00 XgmiLinkSpeed                             : 0\n 0x092f (2351) B       00 XgmiLinkSpeed                             : 0\n 0x0930 (2352) B       00 XgmiLinkSpeed                             : 0\n 0x0931 (2353) B       00 XgmiLinkSpeed                             : 0\n 0x0932 (2354) B       00 XgmiLinkWidth                             : 0\n 0x0933 (2355) B       00 XgmiLinkWidth                             : 0\n 0x0934 (2356) B       00 XgmiLinkWidth                             : 0\n 0x0935 (2357) B       00 XgmiLinkWidth                             : 0\n 0x0936 (2358) H     0000 XgmiFclkFreq                              : 0\n 0x0938 (2360) H     0000 XgmiFclkFreq                              : 0\n 0x093a (2362) H     0000 XgmiFclkFreq                              : 0\n 0x093c (2364) H     0000 XgmiFclkFreq                              : 0\n 0x093e (2366) H     0000 XgmiSocVoltage                            : 0\n 0x0940 (2368) H     0000 XgmiSocVoltage                            : 0\n 0x0942 (2370) H     0000 XgmiSocVoltage                            : 0\n 0x0944 (2372) H     0000 XgmiSocVoltage                            : 0\n 0x0946 (2374) B       00 HsrEnabled                                : 0\n 0x0947 (2375) B       00 VddqOffEnabled                            : 0\n 0x0948 (2376) B       00 PaddingUmcFlags                           : 0\n 0x0949 (2377) B       00 PaddingUmcFlags                           : 0\n 0x094a (2378) B       00 UclkSpreadPercent                         : 0\n 0x094b (2379) B       00 UclkSpreadPercent                         : 0\n 0x094c (2380) B       00 UclkSpreadPercent                         : 0\n 0x094d (2381) B       00 UclkSpreadPercent                         : 0\n 0x094e (2382) B       00 UclkSpreadPercent                         : 0\n 0x094f (2383) B       00 UclkSpreadPercent                         : 0\n 0x0950 (2384) B       00 UclkSpreadPercent                         : 0\n 0x0951 (2385) B       00 UclkSpreadPercent                         : 0\n 0x0952 (2386) B       00 UclkSpreadPercent                         : 0\n 0x0953 (2387) B       00 UclkSpreadPercent                         : 0\n 0x0954 (2388) B       00 UclkSpreadPercent                         : 0\n 0x0955 (2389) B       00 UclkSpreadPercent                         : 0\n 0x0956 (2390) B       00 UclkSpreadPercent                         : 0\n 0x0957 (2391) B       00 UclkSpreadPercent                         : 0\n 0x0958 (2392) B       00 UclkSpreadPercent                         : 0\n 0x0959 (2393) B       00 UclkSpreadPercent                         : 0\n 0x095a (2394) I 00000000 BoardReserved                             : 0\n 0x095e (2398) I 00000000 BoardReserved                             : 0\n 0x0962 (2402) I 00000000 BoardReserved                             : 0\n 0x0966 (2406) I 00000000 BoardReserved                             : 0\n 0x096a (2410) I 00000000 BoardReserved                             : 0\n 0x096e (2414) I 00000000 BoardReserved                             : 0\n 0x0972 (2418) I 00000000 BoardReserved                             : 0\n 0x0976 (2422) I 00000000 BoardReserved                             : 0\n 0x097a (2426) I 00000000 BoardReserved                             : 0\n 0x097e (2430) I 00000000 BoardReserved                             : 0\n 0x0982 (2434) I 00000000 BoardReserved                             : 0\n 0x0986 (2438) I 00000000 MmHubPadding                              : 0\n 0x098a (2442) I 00000000 MmHubPadding                              : 0\n 0x098e (2446) I 00000000 MmHubPadding                              : 0\n 0x0992 (2450) I 00000000 MmHubPadding                              : 0\n 0x0996 (2454) I 00000000 MmHubPadding                              : 0\n 0x099a (2458) I 00000000 MmHubPadding                              : 0\n 0x099e (2462) I 00000000 MmHubPadding                              : 0\n 0x09a2 (2466) I 00001e06 MmHubPadding                              : 102629376\n"
  },
  {
    "path": "test/AMD.RX7900XTX.24576.230323.rom.dump",
    "content": "header:\n  structuresize: 5424\n  format_revision: 20\n  content_revision: 0\ntable_revision: 3\npadding: 0\ntable_size: 832\ngolden_pp_id: 3900\ngolden_revision: 21521\nformat_id: 133\nplatform_caps: 8\nthermal_controller_type: 29\nsmall_power_limit1: 0\nsmall_power_limit2: 0\nboost_power_limit: 0\nsoftware_shutdown_temp: 118\nreserve:\n  reserve 0: 0\n  reserve 1: 0\n  reserve 2: 0\n  reserve 3: 0\n  reserve 4: 0\n  reserve 5: 0\n  reserve 6: 0\n  reserve 7: 0\n  reserve 8: 0\n  reserve 9: 0\n  reserve 10: 0\n  reserve 11: 0\n  reserve 12: 0\n  reserve 13: 0\n  reserve 14: 0\n  reserve 15: 0\n  reserve 16: 0\n  reserve 17: 0\n  reserve 18: 0\n  reserve 19: 0\n  reserve 20: 0\n  reserve 21: 0\n  reserve 22: 0\n  reserve 23: 0\n  reserve 24: 0\n  reserve 25: 0\n  reserve 26: 0\n  reserve 27: 0\n  reserve 28: 0\n  reserve 29: 0\n  reserve 30: 0\n  reserve 31: 0\n  reserve 32: 0\n  reserve 33: 0\n  reserve 34: 0\n  reserve 35: 0\n  reserve 36: 0\n  reserve 37: 0\n  reserve 38: 0\n  reserve 39: 0\n  reserve 40: 0\n  reserve 41: 0\n  reserve 42: 0\n  reserve 43: 0\n  reserve 44: 0\noverdrive_table:\n  revision: 131\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  feature_count: 22\n  setting_count: 41\n  cap:\n    cap 0: 1 (GFXCLK_LIMITS)\n    cap 1: 1 (UCLK_LIMITS)\n    cap 2: 1 (POWER_LIMIT)\n    cap 3: 1 (FAN_ACOUSTIC_LIMIT)\n    cap 4: 1 (FAN_SPEED_MIN)\n    cap 5: 1 (TEMPERATURE_FAN)\n    cap 6: 1 (TEMPERATURE_SYSTEM)\n    cap 7: 1 (MEMORY_TIMING_TUNE)\n    cap 8: 1 (FAN_ZERO_RPM_CONTROL)\n    cap 9: 1 (AUTO_UV_ENGINE)\n    cap 10: 1 (AUTO_OC_ENGINE)\n    cap 11: 1 (AUTO_OC_MEMORY)\n    cap 12: 1 (FAN_CURVE)\n    cap 13: 0 (AUTO_FAN_ACOUSTIC_LIMIT)\n    cap 14: 1 (POWER_MODE)\n    cap 15: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET)\n    cap 16: 0\n    cap 17: 1\n    cap 18: 0\n    cap 19: 0\n    cap 20: 0\n    cap 21: 0\n    cap 22: 0\n    cap 23: 0\n    cap 24: 0\n    cap 25: 0\n    cap 26: 0\n    cap 27: 0\n    cap 28: 0\n    cap 29: 0\n    cap 30: 0\n    cap 31: 0\n  max:\n    max 0: 5000 (GFXCLKFMAX)\n    max 1: 5000 (GFXCLKFMIN)\n    max 2: 1500 (UCLKFMIN)\n    max 3: 1500 (UCLKFMAX)\n    max 4: 15 (POWERPERCENTAGE)\n    max 5: 3300 (FANRPMMIN)\n    max 6: 3300 (FANRPMACOUSTICLIMIT)\n    max 7: 105 (FANTARGETTEMPERATURE)\n    max 8: 110 (OPERATINGTEMPMAX)\n    max 9: 1 (ACTIMING)\n    max 10: 1 (FAN_ZERO_RPM_CONTROL)\n    max 11: 1 (AUTOUVENGINE)\n    max 12: 1 (AUTOOCENGINE)\n    max 13: 1 (AUTOOCMEMORY)\n    max 14: 100 (FAN_CURVE_TEMPERATURE_1)\n    max 15: 100 (FAN_CURVE_SPEED_1)\n    max 16: 100 (FAN_CURVE_TEMPERATURE_2)\n    max 17: 100 (FAN_CURVE_SPEED_2)\n    max 18: 100 (FAN_CURVE_TEMPERATURE_3)\n    max 19: 100 (FAN_CURVE_SPEED_3)\n    max 20: 100 (FAN_CURVE_TEMPERATURE_4)\n    max 21: 100 (FAN_CURVE_SPEED_4)\n    max 22: 100 (FAN_CURVE_TEMPERATURE_5)\n    max 23: 100 (FAN_CURVE_SPEED_5)\n    max 24: 0 (AUTO_FAN_ACOUSTIC_LIMIT)\n    max 25: 1 (POWER_MODE)\n    max 26: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1)\n    max 27: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2)\n    max 28: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3)\n    max 29: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4)\n    max 30: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5)\n    max 31: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6)\n    max 32: 0\n    max 33: 0\n    max 34: 0\n    max 35: 0\n    max 36: 0\n    max 37: 0\n    max 38: 0\n    max 39: 0\n    max 40: 0\n    max 41: 0\n    max 42: 0\n    max 43: 0\n    max 44: 0\n    max 45: 0\n    max 46: 0\n    max 47: 0\n    max 48: 0\n    max 49: 0\n    max 50: 0\n    max 51: 0\n    max 52: 0\n    max 53: 0\n    max 54: 0\n    max 55: 0\n    max 56: 0\n    max 57: 0\n    max 58: 0\n    max 59: 0\n    max 60: 0\n    max 61: 0\n    max 62: 0\n    max 63: 0\n  min:\n    min 0: 500 (GFXCLKFMAX)\n    min 1: 500 (GFXCLKFMIN)\n    min 2: 97 (UCLKFMIN)\n    min 3: 97 (UCLKFMAX)\n    min 4: 10 (POWERPERCENTAGE)\n    min 5: 500 (FANRPMMIN)\n    min 6: 500 (FANRPMACOUSTICLIMIT)\n    min 7: 25 (FANTARGETTEMPERATURE)\n    min 8: 50 (OPERATINGTEMPMAX)\n    min 9: 0 (ACTIMING)\n    min 10: 0 (FAN_ZERO_RPM_CONTROL)\n    min 11: 0 (AUTOUVENGINE)\n    min 12: 0 (AUTOOCENGINE)\n    min 13: 0 (AUTOOCMEMORY)\n    min 14: 25 (FAN_CURVE_TEMPERATURE_1)\n    min 15: 15 (FAN_CURVE_SPEED_1)\n    min 16: 25 (FAN_CURVE_TEMPERATURE_2)\n    min 17: 15 (FAN_CURVE_SPEED_2)\n    min 18: 25 (FAN_CURVE_TEMPERATURE_3)\n    min 19: 15 (FAN_CURVE_SPEED_3)\n    min 20: 25 (FAN_CURVE_TEMPERATURE_4)\n    min 21: 15 (FAN_CURVE_SPEED_4)\n    min 22: 25 (FAN_CURVE_TEMPERATURE_5)\n    min 23: 15 (FAN_CURVE_SPEED_5)\n    min 24: 0 (AUTO_FAN_ACOUSTIC_LIMIT)\n    min 25: 0 (POWER_MODE)\n    min 26: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1)\n    min 27: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2)\n    min 28: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3)\n    min 29: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4)\n    min 30: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5)\n    min 31: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6)\n    min 32: 0\n    min 33: 10\n    min 34: 0\n    min 35: 0\n    min 36: 0\n    min 37: 0\n    min 38: 0\n    min 39: 0\n    min 40: 0\n    min 41: 0\n    min 42: 0\n    min 43: 0\n    min 44: 0\n    min 45: 0\n    min 46: 0\n    min 47: 0\n    min 48: 0\n    min 49: 0\n    min 50: 0\n    min 51: 0\n    min 52: 0\n    min 53: 0\n    min 54: 0\n    min 55: 0\n    min 56: 0\n    min 57: 0\n    min 58: 0\n    min 59: 0\n    min 60: 0\n    min 61: 0\n    min 62: 0\n    min 63: 0\n  pm_setting:\n    pm_setting 0: 0\n    pm_setting 1: 0\n    pm_setting 2: 0\n    pm_setting 3: 10\n    pm_setting 4: 105\n    pm_setting 5: 95\n    pm_setting 6: 0\n    pm_setting 7: 75\n    pm_setting 8: 1550\n    pm_setting 9: 1700\n    pm_setting 10: 0\n    pm_setting 11: 3000\n    pm_setting 12: 1550\n    pm_setting 13: 3000\n    pm_setting 14: 0\n    pm_setting 15: 3000\n    pm_setting 16: 0\n    pm_setting 17: 0\n    pm_setting 18: 0\n    pm_setting 19: 0\n    pm_setting 20: 0\n    pm_setting 21: 0\n    pm_setting 22: 0\n    pm_setting 23: 0\n    pm_setting 24: 0\n    pm_setting 25: 0\n    pm_setting 26: 0\n    pm_setting 27: 0\n    pm_setting 28: 0\n    pm_setting 29: 0\n    pm_setting 30: 0\n    pm_setting 31: 0\npadding1: 0\nsmc_pptable:\n  SkuTable:\n    Version: 41\n    FeaturesToRun:\n      FeaturesToRun 0: 1912602623\n      FeaturesToRun 1: 256952\n    TotalPowerConfig: 1\n    CustomerVariant: 0\n    MemoryTemperatureTypeMask: 4\n    SmartShiftVersion: 0\n    SocketPowerLimitAc:\n      SocketPowerLimitAc 0: 327\n      SocketPowerLimitAc 1: 1200\n      SocketPowerLimitAc 2: 0\n      SocketPowerLimitAc 3: 0\n    SocketPowerLimitDc:\n      SocketPowerLimitDc 0: 0\n      SocketPowerLimitDc 1: 0\n      SocketPowerLimitDc 2: 0\n      SocketPowerLimitDc 3: 0\n    SocketPowerLimitSmartShift2: 0\n    EnableLegacyPptLimit: 0\n    UseInputTelemetry: 0\n    SmartShiftMinReportedPptinDcs: 0\n    PaddingPpt:\n      PaddingPpt 0: 0\n    VrTdcLimit:\n      VrTdcLimit 0: 315\n      VrTdcLimit 1: 82\n      VrTdcLimit 2: 86\n    PlatformTdcLimit:\n      PlatformTdcLimit 0: 448\n      PlatformTdcLimit 1: 82\n      PlatformTdcLimit 2: 86\n    TemperatureLimit:\n      TemperatureLimit 0: 100\n      TemperatureLimit 1: 110\n      TemperatureLimit 2: 110\n      TemperatureLimit 3: 110\n      TemperatureLimit 4: 108\n      TemperatureLimit 5: 115\n      TemperatureLimit 6: 115\n      TemperatureLimit 7: 115\n      TemperatureLimit 8: 115\n      TemperatureLimit 9: 115\n      TemperatureLimit 10: 0\n      TemperatureLimit 11: 0\n      TemperatureLimit 12: 0\n    HwCtfTempLimit: 120\n    PaddingInfra: 0\n    FitControllerFailureRateLimit: 0\n    FitControllerGfxDutyCycle: 0\n    FitControllerSocDutyCycle: 0\n    FitControllerSocOffset: 0\n    GfxApccPlusResidencyLimit: 0\n    ThrottlerControlMask: 254962\n    FwDStateMask: 27000831\n    UlvVoltageOffset:\n      UlvVoltageOffset 0: 100\n      UlvVoltageOffset 1: 100\n    UlvVoltageOffsetU: 100\n    DeepUlvVoltageOffsetSoc: 100\n    DefaultMaxVoltage:\n      DefaultMaxVoltage 0: 4600\n      DefaultMaxVoltage 1: 4800\n    BoostMaxVoltage:\n      BoostMaxVoltage 0: 4600\n      BoostMaxVoltage 1: 4800\n    VminTempHystersis:\n      VminTempHystersis 0: 5\n      VminTempHystersis 1: 5\n    VminTempThreshold:\n      VminTempThreshold 0: 55\n      VminTempThreshold 1: 55\n    Vmin_Hot_T0:\n      Vmin_Hot_T0 0: 2800\n      Vmin_Hot_T0 1: 2800\n    Vmin_Cold_T0:\n      Vmin_Cold_T0 0: 2800\n      Vmin_Cold_T0 1: 2800\n    Vmin_Hot_Eol:\n      Vmin_Hot_Eol 0: 2800\n      Vmin_Hot_Eol 1: 2800\n    Vmin_Cold_Eol:\n      Vmin_Cold_Eol 0: 2800\n      Vmin_Cold_Eol 1: 2800\n    Vmin_Aging_Offset:\n      Vmin_Aging_Offset 0: 0\n      Vmin_Aging_Offset 1: 0\n    Spare_Vmin_Plat_Offset_Hot:\n      Spare_Vmin_Plat_Offset_Hot 0: 0\n      Spare_Vmin_Plat_Offset_Hot 1: 0\n    Spare_Vmin_Plat_Offset_Cold:\n      Spare_Vmin_Plat_Offset_Cold 0: 0\n      Spare_Vmin_Plat_Offset_Cold 1: 0\n    VcBtcFixedVminAgingOffset:\n      VcBtcFixedVminAgingOffset 0: 0\n      VcBtcFixedVminAgingOffset 1: 0\n    VcBtcVmin2PsmDegrationGb:\n      VcBtcVmin2PsmDegrationGb 0: 0\n      VcBtcVmin2PsmDegrationGb 1: 0\n    VcBtcPsmA:\n      VcBtcPsmA 0: 0\n      VcBtcPsmA 1: 0\n    VcBtcPsmB:\n      VcBtcPsmB 0: 0\n      VcBtcPsmB 1: 0\n    VcBtcVminA:\n      VcBtcVminA 0: 0\n      VcBtcVminA 1: 0\n    VcBtcVminB:\n      VcBtcVminB 0: 0\n      VcBtcVminB 1: 0\n    PerPartVminEnabled:\n      PerPartVminEnabled 0: 1\n      PerPartVminEnabled 1: 0\n    VcBtcEnabled:\n      VcBtcEnabled 0: 0\n      VcBtcEnabled 1: 0\n    SocketPowerLimitAcTau:\n      SocketPowerLimitAcTau 0: 100\n      SocketPowerLimitAcTau 1: 10\n      SocketPowerLimitAcTau 2: 0\n      SocketPowerLimitAcTau 3: 0\n    SocketPowerLimitDcTau:\n      SocketPowerLimitDcTau 0: 0\n      SocketPowerLimitDcTau 1: 0\n      SocketPowerLimitDcTau 2: 0\n      SocketPowerLimitDcTau 3: 0\n    Vmin_droop:\n      a: 0\n      b: 0.075\n      c:-0.01\n    SpareVmin:\n      SpareVmin 0: 0\n      SpareVmin 1: 0\n      SpareVmin 2: 0\n      SpareVmin 3: 0\n      SpareVmin 4: 0\n      SpareVmin 5: 0\n      SpareVmin 6: 131072\n      SpareVmin 7: 0\n      SpareVmin 8: 0\n    DpmDescriptor:\n      DpmDescriptor 0:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 3\n        ConversionToAvfsClk:\n          m: 1\n          b: 0\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 500\n        Padding2: 0\n      DpmDescriptor 1:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.313\n          b: 0.194\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 262400\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 2:\n        Padding: 0\n        SnapToDiscrete: 1\n        NumDiscreteLevels: 4\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.523\n          b: 0.0967\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 3:\n        Padding: 0\n        SnapToDiscrete: 1\n        NumDiscreteLevels: 8\n        CalculateFopt: 3\n        ConversionToAvfsClk:\n          m: 1\n          b: 0\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 2300\n        Padding2: 0\n      DpmDescriptor 4:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.0204\n          b: 0.342\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 5:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 0.9045\n          b:-0.1883\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 6:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.0204\n          b: 0.342\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 7:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 0.9045\n          b:-0.1883\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 8:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 0.7845\n          b: 0.746\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 9:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 0.7845\n          b: 0.746\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 10:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.269\n          b: 0.188\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 11:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.108\n          b: 0.555\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n      DpmDescriptor 12:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.269\n          b: 0.188\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 131072500\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 0\n    FreqTableGfx:\n      FreqTableGfx 0: 500\n      FreqTableGfx 1: 3218\n      FreqTableGfx 2: 0\n      FreqTableGfx 3: 0\n      FreqTableGfx 4: 0\n      FreqTableGfx 5: 0\n      FreqTableGfx 6: 0\n      FreqTableGfx 7: 0\n      FreqTableGfx 8: 0\n      FreqTableGfx 9: 0\n      FreqTableGfx 10: 0\n      FreqTableGfx 11: 0\n      FreqTableGfx 12: 0\n      FreqTableGfx 13: 0\n      FreqTableGfx 14: 0\n      FreqTableGfx 15: 0\n    FreqTableVclk:\n      FreqTableVclk 0: 513\n      FreqTableVclk 1: 2934\n      FreqTableVclk 2: 0\n      FreqTableVclk 3: 0\n      FreqTableVclk 4: 0\n      FreqTableVclk 5: 0\n      FreqTableVclk 6: 0\n      FreqTableVclk 7: 0\n    FreqTableDclk:\n      FreqTableDclk 0: 513\n      FreqTableDclk 1: 2200\n      FreqTableDclk 2: 0\n      FreqTableDclk 3: 0\n      FreqTableDclk 4: 0\n      FreqTableDclk 5: 0\n      FreqTableDclk 6: 0\n      FreqTableDclk 7: 0\n    FreqTableSocclk:\n      FreqTableSocclk 0: 500\n      FreqTableSocclk 1: 1500\n      FreqTableSocclk 2: 97\n      FreqTableSocclk 3: 457\n      FreqTableSocclk 4: 685\n      FreqTableSocclk 5: 1000\n      FreqTableSocclk 6: 0\n      FreqTableSocclk 7: 0\n    FreqTableUclk:\n      FreqTableUclk 0: 97\n      FreqTableUclk 1: 457\n      FreqTableUclk 2: 773\n      FreqTableUclk 3: 1250\n    FreqTableDispclk:\n      FreqTableDispclk 0: 148\n      FreqTableDispclk 1: 2150\n      FreqTableDispclk 2: 0\n      FreqTableDispclk 3: 0\n      FreqTableDispclk 4: 0\n      FreqTableDispclk 5: 0\n      FreqTableDispclk 6: 0\n      FreqTableDispclk 7: 0\n    FreqTableDppClk:\n      FreqTableDppClk 0: 148\n      FreqTableDppClk 1: 2150\n      FreqTableDppClk 2: 0\n      FreqTableDppClk 3: 0\n      FreqTableDppClk 4: 0\n      FreqTableDppClk 5: 0\n      FreqTableDppClk 6: 0\n      FreqTableDppClk 7: 0\n    FreqTableDprefclk:\n      FreqTableDprefclk 0: 717\n      FreqTableDprefclk 1: 717\n      FreqTableDprefclk 2: 0\n      FreqTableDprefclk 3: 0\n      FreqTableDprefclk 4: 0\n      FreqTableDprefclk 5: 0\n      FreqTableDprefclk 6: 0\n      FreqTableDprefclk 7: 0\n    FreqTableDcfclk:\n      FreqTableDcfclk 0: 148\n      FreqTableDcfclk 1: 1564\n      FreqTableDcfclk 2: 0\n      FreqTableDcfclk 3: 0\n      FreqTableDcfclk 4: 0\n      FreqTableDcfclk 5: 0\n      FreqTableDcfclk 6: 0\n      FreqTableDcfclk 7: 0\n    FreqTableDtbclk:\n      FreqTableDtbclk 0: 148\n      FreqTableDtbclk 1: 1564\n      FreqTableDtbclk 2: 0\n      FreqTableDtbclk 3: 0\n      FreqTableDtbclk 4: 0\n      FreqTableDtbclk 5: 0\n      FreqTableDtbclk 6: 0\n      FreqTableDtbclk 7: 0\n    FreqTableFclk:\n      FreqTableFclk 0: 600\n      FreqTableFclk 1: 1000\n      FreqTableFclk 2: 1200\n      FreqTableFclk 3: 1600\n      FreqTableFclk 4: 2000\n      FreqTableFclk 5: 2200\n      FreqTableFclk 6: 2250\n      FreqTableFclk 7: 2300\n    DcModeMaxFreq:\n      DcModeMaxFreq 0: 3218\n      DcModeMaxFreq 1: 1500\n      DcModeMaxFreq 2: 1250\n      DcModeMaxFreq 3: 2300\n      DcModeMaxFreq 4: 2200\n      DcModeMaxFreq 5: 2934\n      DcModeMaxFreq 6: 2200\n      DcModeMaxFreq 7: 2934\n      DcModeMaxFreq 8: 2150\n      DcModeMaxFreq 9: 2150\n      DcModeMaxFreq 10: 717\n      DcModeMaxFreq 11: 1564\n      DcModeMaxFreq 12: 1564\n    Mp0clkFreq:\n      Mp0clkFreq 0: 500\n      Mp0clkFreq 1: 700\n    Mp0DpmVoltage:\n      Mp0DpmVoltage 0: 2800\n      Mp0DpmVoltage 1: 3200\n    GfxclkSpare:\n      GfxclkSpare 0: 0\n      GfxclkSpare 1: 0\n    GfxclkFreqCap: 0\n    GfxclkFgfxoffEntry: 800\n    GfxclkFgfxoffExitImu: 1200\n    GfxclkFgfxoffExitRlc: 800\n    GfxclkThrottleClock: 250\n    EnableGfxPowerStagesGpio: 1\n    GfxIdlePadding: 0\n    SmsRepairWRCKClkDivEn: 1\n    SmsRepairWRCKClkDivVal: 4\n    GfxOffEntryEarlyMGCGEn: 1\n    GfxOffEntryForceCGCGEn: 0\n    GfxOffEntryForceCGCGDelayEn: 0\n    GfxOffEntryForceCGCGDelayVal: 0\n    GfxclkFreqGfxUlv: 1300\n    GfxIdlePadding2:\n      GfxIdlePadding2 0: 0\n      GfxIdlePadding2 1: 0\n    GfxOffEntryHysteresis: 60000\n    GfxoffSpare:\n      GfxoffSpare 0: 0\n      GfxoffSpare 1: 0\n      GfxoffSpare 2: 0\n      GfxoffSpare 3: 0\n      GfxoffSpare 4: 0\n      GfxoffSpare 5: 0\n      GfxoffSpare 6: 0\n      GfxoffSpare 7: 0\n      GfxoffSpare 8: 0\n      GfxoffSpare 9: 0\n      GfxoffSpare 10: 0\n      GfxoffSpare 11: 0\n      GfxoffSpare 12: 0\n      GfxoffSpare 13: 0\n      GfxoffSpare 14: 0\n    DfllBtcMasterScalerM: 1\n    DfllBtcMasterScalerB: 0\n    DfllBtcSlaveScalerM: 1.1\n    DfllBtcSlaveScalerB: 0\n    DfllPccAsWaitCtrl: 6553700\n    DfllPccAsStepCtrl: 2065455\n    GfxGpoSpare:\n      GfxGpoSpare 0: 1066024305\n      GfxGpoSpare 1: 0\n      GfxGpoSpare 2: 0\n      GfxGpoSpare 3: 0\n      GfxGpoSpare 4: 0\n      GfxGpoSpare 5: 0\n      GfxGpoSpare 6: 0\n      GfxGpoSpare 7: 0\n      GfxGpoSpare 8: 0\n      GfxGpoSpare 9: 0\n    DcsGfxOffVoltage: 0\n    PaddingDcs: 0\n    DcsMinGfxOffTime: 0\n    DcsMaxGfxOffTime: 0\n    DcsMinCreditAccum: 0\n    DcsExitHysteresis: 0\n    DcsTimeout: 0\n    DcsSpare:\n      DcsSpare 0: 0\n      DcsSpare 1: 0\n      DcsSpare 2: 0\n      DcsSpare 3: 0\n      DcsSpare 4: 0\n      DcsSpare 5: 0\n      DcsSpare 6: 0\n      DcsSpare 7: 0\n      DcsSpare 8: 0\n      DcsSpare 9: 0\n      DcsSpare 10: 0\n      DcsSpare 11: 0\n      DcsSpare 12: 0\n      DcsSpare 13: 0\n    ShadowFreqTableUclk:\n      ShadowFreqTableUclk 0: 100\n      ShadowFreqTableUclk 1: 438\n      ShadowFreqTableUclk 2: 731\n      ShadowFreqTableUclk 3: 1187\n    UseStrobeModeOptimizations: 1\n    PaddingMem:\n      PaddingMem 0: 10\n      PaddingMem 1: 240\n      PaddingMem 2: 10\n    UclkDpmPstates:\n      UclkDpmPstates 0: 3\n      UclkDpmPstates 1: 2\n      UclkDpmPstates 2: 1\n      UclkDpmPstates 3: 0\n    FreqTableUclkDiv:\n      FreqTableUclkDiv 0: 0\n      FreqTableUclkDiv 1: 2\n      FreqTableUclkDiv 2: 3\n      FreqTableUclkDiv 3: 3\n    MemVmempVoltage:\n      MemVmempVoltage 0: 2700\n      MemVmempVoltage 1: 2800\n      MemVmempVoltage 2: 3000\n      MemVmempVoltage 3: 3200\n    MemVddioVoltage:\n      MemVddioVoltage 0: 5000\n      MemVddioVoltage 1: 5400\n      MemVddioVoltage 2: 5400\n      MemVddioVoltage 3: 5400\n    FclkDpmUPstates:\n      FclkDpmUPstates 0: 0\n      FclkDpmUPstates 1: 1\n      FclkDpmUPstates 2: 2\n      FclkDpmUPstates 3: 3\n      FclkDpmUPstates 4: 4\n      FclkDpmUPstates 5: 5\n      FclkDpmUPstates 6: 6\n      FclkDpmUPstates 7: 7\n    FclkDpmVddU:\n      FclkDpmVddU 0: 3000\n      FclkDpmVddU 1: 3000\n      FclkDpmVddU 2: 3000\n      FclkDpmVddU 3: 3000\n      FclkDpmVddU 4: 3000\n      FclkDpmVddU 5: 3400\n      FclkDpmVddU 6: 3400\n      FclkDpmVddU 7: 3400\n    FclkDpmUSpeed:\n      FclkDpmUSpeed 0: 2400\n      FclkDpmUSpeed 1: 4000\n      FclkDpmUSpeed 2: 4800\n      FclkDpmUSpeed 3: 6400\n      FclkDpmUSpeed 4: 8000\n      FclkDpmUSpeed 5: 8800\n      FclkDpmUSpeed 6: 9000\n      FclkDpmUSpeed 7: 9200\n    FclkDpmDisallowPstateFreq: 0\n    PaddingFclk: 0\n    PcieGenSpeed:\n      PcieGenSpeed 0: 0\n      PcieGenSpeed 1: 1\n      PcieGenSpeed 2: 3\n    PcieLaneCount:\n      PcieLaneCount 0: 1\n      PcieLaneCount 1: 3\n      PcieLaneCount 2: 6\n    LclkFreq:\n      LclkFreq 0: 78\n      LclkFreq 1: 156\n      LclkFreq 2: 623\n    FanStopTemp:\n      FanStopTemp 0: 0\n      FanStopTemp 1: 50\n      FanStopTemp 2: 50\n      FanStopTemp 3: 50\n      FanStopTemp 4: 60\n      FanStopTemp 5: 50\n      FanStopTemp 6: 50\n      FanStopTemp 7: 50\n      FanStopTemp 8: 50\n      FanStopTemp 9: 50\n      FanStopTemp 10: 0\n      FanStopTemp 11: 0\n      FanStopTemp 12: 0\n    FanStartTemp:\n      FanStartTemp 0: 0\n      FanStartTemp 1: 60\n      FanStartTemp 2: 60\n      FanStartTemp 3: 60\n      FanStartTemp 4: 70\n      FanStartTemp 5: 60\n      FanStartTemp 6: 60\n      FanStartTemp 7: 60\n      FanStartTemp 8: 60\n      FanStartTemp 9: 60\n      FanStartTemp 10: 0\n      FanStartTemp 11: 0\n      FanStartTemp 12: 0\n    FanGain:\n      FanGain 0: 0\n      FanGain 1: 400\n      FanGain 2: 400\n      FanGain 3: 400\n      FanGain 4: 400\n      FanGain 5: 400\n      FanGain 6: 400\n      FanGain 7: 400\n      FanGain 8: 400\n      FanGain 9: 400\n      FanGain 10: 0\n      FanGain 11: 0\n      FanGain 12: 0\n    FanGainPadding: 4900\n    FanPwmMin: 15\n    AcousticTargetRpmThreshold: 1600\n    AcousticLimitRpmThreshold: 3300\n    FanMaximumRpm: 3300\n    MGpuAcousticLimitRpmThreshold: 3000\n    FanTargetGfxclk: 500\n    TempInputSelectMask: 1010\n    FanZeroRpmEnable: 1\n    FanTachEdgePerRev: 2\n    FanTargetTemperature:\n      FanTargetTemperature 0: 0\n      FanTargetTemperature 1: 82\n      FanTargetTemperature 2: 82\n      FanTargetTemperature 3: 82\n      FanTargetTemperature 4: 90\n      FanTargetTemperature 5: 100\n      FanTargetTemperature 6: 100\n      FanTargetTemperature 7: 100\n      FanTargetTemperature 8: 100\n      FanTargetTemperature 9: 100\n      FanTargetTemperature 10: 0\n      FanTargetTemperature 11: 0\n      FanTargetTemperature 12: 0\n    FuzzyFan_ErrorSetDelta: 0\n    FuzzyFan_ErrorRateSetDelta: 0\n    FuzzyFan_PwmSetDelta: 0\n    FuzzyFan_Reserved: 125\n    FwCtfLimit:\n      FwCtfLimit 0: 0\n      FwCtfLimit 1: 118\n      FwCtfLimit 2: 118\n      FwCtfLimit 3: 118\n      FwCtfLimit 4: 113\n      FwCtfLimit 5: 125\n      FwCtfLimit 6: 125\n      FwCtfLimit 7: 125\n      FwCtfLimit 8: 125\n      FwCtfLimit 9: 125\n      FwCtfLimit 10: 0\n      FwCtfLimit 11: 0\n      FwCtfLimit 12: 0\n    IntakeTempEnableRPM: 1000\n    IntakeTempOffsetTemp: 200\n    IntakeTempReleaseTemp: 45\n    IntakeTempHighIntakeAcousticLimit: 3000\n    IntakeTempAcouticLimitReleaseRate: 100\n    FanAbnormalTempLimitOffset: -20\n    FanStalledTriggerRpm: 250\n    FanAbnormalTriggerRpmCoeff: 85\n    FanAbnormalDetectionEnable: 0\n    FanIntakeSensorSupport: 1\n    FanIntakePadding:\n      FanIntakePadding 0: 0\n      FanIntakePadding 1: 0\n      FanIntakePadding 2: 0\n    FanSpare:\n      FanSpare 0: 0\n      FanSpare 1: 0\n      FanSpare 2: 0\n      FanSpare 3: 0\n      FanSpare 4: 0\n      FanSpare 5: 0\n      FanSpare 6: 0\n      FanSpare 7: 0\n      FanSpare 8: 0\n      FanSpare 9: 0\n      FanSpare 10: 0\n      FanSpare 11: 0\n      FanSpare 12: 0\n    OverrideGfxAvfsFuses: 0\n    GfxAvfsPadding:\n      GfxAvfsPadding 0: 0\n      GfxAvfsPadding 1: 0\n      GfxAvfsPadding 2: 0\n    L2HwRtAvfsFuses:\n      L2HwRtAvfsFuses 0: 16777216\n      L2HwRtAvfsFuses 1: 16777216\n      L2HwRtAvfsFuses 2: 16777216\n      L2HwRtAvfsFuses 3: 16777216\n      L2HwRtAvfsFuses 4: 16777216\n      L2HwRtAvfsFuses 5: 33555776\n      L2HwRtAvfsFuses 6: 4096\n      L2HwRtAvfsFuses 7: 33555776\n      L2HwRtAvfsFuses 8: 4096\n      L2HwRtAvfsFuses 9: 33555776\n      L2HwRtAvfsFuses 10: 4096\n      L2HwRtAvfsFuses 11: 33555776\n      L2HwRtAvfsFuses 12: 4096\n      L2HwRtAvfsFuses 13: 33555776\n      L2HwRtAvfsFuses 14: 4096\n      L2HwRtAvfsFuses 15: 18022631\n      L2HwRtAvfsFuses 16: 19988788\n      L2HwRtAvfsFuses 17: 22544768\n      L2HwRtAvfsFuses 18: 25887181\n      L2HwRtAvfsFuses 19: 0\n      L2HwRtAvfsFuses 20: 0\n      L2HwRtAvfsFuses 21: 0\n      L2HwRtAvfsFuses 22: 0\n      L2HwRtAvfsFuses 23: 0\n      L2HwRtAvfsFuses 24: 0\n      L2HwRtAvfsFuses 25: 0\n      L2HwRtAvfsFuses 26: 0\n      L2HwRtAvfsFuses 27: 0\n      L2HwRtAvfsFuses 28: 2148565008\n      L2HwRtAvfsFuses 29: 2148565008\n      L2HwRtAvfsFuses 30: 32784\n      L2HwRtAvfsFuses 31: 65535\n    SeHwRtAvfsFuses:\n      SeHwRtAvfsFuses 0: 16777216\n      SeHwRtAvfsFuses 1: 16777216\n      SeHwRtAvfsFuses 2: 16777216\n      SeHwRtAvfsFuses 3: 16777216\n      SeHwRtAvfsFuses 4: 16777216\n      SeHwRtAvfsFuses 5: 33555776\n      SeHwRtAvfsFuses 6: 4096\n      SeHwRtAvfsFuses 7: 33555776\n      SeHwRtAvfsFuses 8: 4096\n      SeHwRtAvfsFuses 9: 33555776\n      SeHwRtAvfsFuses 10: 4096\n      SeHwRtAvfsFuses 11: 33555776\n      SeHwRtAvfsFuses 12: 4096\n      SeHwRtAvfsFuses 13: 33555776\n      SeHwRtAvfsFuses 14: 4096\n      SeHwRtAvfsFuses 15: 18022631\n      SeHwRtAvfsFuses 16: 19988788\n      SeHwRtAvfsFuses 17: 22544768\n      SeHwRtAvfsFuses 18: 25887181\n      SeHwRtAvfsFuses 19: 0\n      SeHwRtAvfsFuses 20: 0\n      SeHwRtAvfsFuses 21: 0\n      SeHwRtAvfsFuses 22: 0\n      SeHwRtAvfsFuses 23: 0\n      SeHwRtAvfsFuses 24: 0\n      SeHwRtAvfsFuses 25: 0\n      SeHwRtAvfsFuses 26: 0\n      SeHwRtAvfsFuses 27: 0\n      SeHwRtAvfsFuses 28: 2148565008\n      SeHwRtAvfsFuses 29: 2148565008\n      SeHwRtAvfsFuses 30: 32784\n      SeHwRtAvfsFuses 31: 65535\n    CommonRtAvfs:\n      CommonRtAvfs 0: 700\n      CommonRtAvfs 1: 700\n      CommonRtAvfs 2: 700\n      CommonRtAvfs 3: 700\n      CommonRtAvfs 4: 700\n      CommonRtAvfs 5: 700\n      CommonRtAvfs 6: 700\n      CommonRtAvfs 7: 700\n      CommonRtAvfs 8: 0\n      CommonRtAvfs 9: 682\n      CommonRtAvfs 10: 682\n      CommonRtAvfs 11: 682\n      CommonRtAvfs 12: 682\n    L2FwRtAvfsFuses:\n      L2FwRtAvfsFuses 0: 0\n      L2FwRtAvfsFuses 1: 0\n      L2FwRtAvfsFuses 2: 0\n      L2FwRtAvfsFuses 3: 0\n      L2FwRtAvfsFuses 4: 0\n      L2FwRtAvfsFuses 5: 0\n      L2FwRtAvfsFuses 6: 0\n      L2FwRtAvfsFuses 7: 0\n      L2FwRtAvfsFuses 8: 0\n      L2FwRtAvfsFuses 9: 0\n      L2FwRtAvfsFuses 10: 0\n      L2FwRtAvfsFuses 11: 0\n      L2FwRtAvfsFuses 12: 50\n      L2FwRtAvfsFuses 13: 3000\n      L2FwRtAvfsFuses 14: 1538\n      L2FwRtAvfsFuses 15: 1538\n      L2FwRtAvfsFuses 16: 1538\n      L2FwRtAvfsFuses 17: 1538\n      L2FwRtAvfsFuses 18: 1538\n    SeFwRtAvfsFuses:\n      SeFwRtAvfsFuses 0: 0\n      SeFwRtAvfsFuses 1: 0\n      SeFwRtAvfsFuses 2: 0\n      SeFwRtAvfsFuses 3: 0\n      SeFwRtAvfsFuses 4: 0\n      SeFwRtAvfsFuses 5: 0\n      SeFwRtAvfsFuses 6: 0\n      SeFwRtAvfsFuses 7: 0\n      SeFwRtAvfsFuses 8: 0\n      SeFwRtAvfsFuses 9: 0\n      SeFwRtAvfsFuses 10: 0\n      SeFwRtAvfsFuses 11: 0\n      SeFwRtAvfsFuses 12: 50\n      SeFwRtAvfsFuses 13: 3000\n      SeFwRtAvfsFuses 14: 1538\n      SeFwRtAvfsFuses 15: 1538\n      SeFwRtAvfsFuses 16: 1538\n      SeFwRtAvfsFuses 17: 1538\n      SeFwRtAvfsFuses 18: 1538\n    Droop_PWL_F:\n      Droop_PWL_F 0: 0\n      Droop_PWL_F 1: 2\n      Droop_PWL_F 2: 2.5\n      Droop_PWL_F 3: 3\n      Droop_PWL_F 4: 3.5\n    Droop_PWL_a:\n      Droop_PWL_a 0: 0.08164\n      Droop_PWL_a 1: 0.08164\n      Droop_PWL_a 2: 0.08164\n      Droop_PWL_a 3: 0.08164\n      Droop_PWL_a 4: 0.08164\n    Droop_PWL_b:\n      Droop_PWL_b 0: 0.07288\n      Droop_PWL_b 1: 0.07288\n      Droop_PWL_b 2: 0.09488\n      Droop_PWL_b 3: 0.07288\n      Droop_PWL_b 4: 0.07288\n    Droop_PWL_c:\n      Droop_PWL_c 0:-0.10281\n      Droop_PWL_c 1:-0.10281\n      Droop_PWL_c 2:-0.12781\n      Droop_PWL_c 3:-0.03831\n      Droop_PWL_c 4:-0.03831\n    Static_PWL_Offset:\n      Static_PWL_Offset 0: 1008981770\n      Static_PWL_Offset 1: 1008981770\n      Static_PWL_Offset 2: 1008981770\n      Static_PWL_Offset 3: 1008981770\n      Static_PWL_Offset 4: 1008981770\n    dGbV_dT_vmin: 0\n    dGbV_dT_vmax: 0\n    V2F_vmin_range_low: 600\n    V2F_vmin_range_high: 700\n    V2F_vmax_range_low: 1100\n    V2F_vmax_range_high: 1200\n    DcBtcGfxParams:\n      DcBtcEnabled: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n        Padding 2: 0\n      DcTol: 24\n      DcBtcGb: 0\n      DcBtcMin: 0\n      DcBtcMax: 0\n      DcBtcGbScalar:\n        m: 0\n        b: 0\n    GfxAvfsSpare:\n      GfxAvfsSpare 0: 0\n      GfxAvfsSpare 1: 0\n      GfxAvfsSpare 2: 0\n      GfxAvfsSpare 3: 0\n      GfxAvfsSpare 4: 0\n      GfxAvfsSpare 5: 0\n      GfxAvfsSpare 6: 0\n      GfxAvfsSpare 7: 0\n      GfxAvfsSpare 8: 0\n      GfxAvfsSpare 9: 0\n      GfxAvfsSpare 10: 0\n      GfxAvfsSpare 11: 0\n      GfxAvfsSpare 12: 0\n      GfxAvfsSpare 13: 0\n      GfxAvfsSpare 14: 0\n      GfxAvfsSpare 15: 0\n      GfxAvfsSpare 16: 0\n      GfxAvfsSpare 17: 0\n      GfxAvfsSpare 18: 0\n      GfxAvfsSpare 19: 0\n      GfxAvfsSpare 20: 0\n      GfxAvfsSpare 21: 0\n      GfxAvfsSpare 22: 0\n      GfxAvfsSpare 23: 0\n      GfxAvfsSpare 24: 0\n      GfxAvfsSpare 25: 0\n      GfxAvfsSpare 26: 0\n      GfxAvfsSpare 27: 0\n      GfxAvfsSpare 28: 0\n      GfxAvfsSpare 29: 0\n      GfxAvfsSpare 30: 0\n      GfxAvfsSpare 31: 0\n    OverrideSocAvfsFuses: 0\n    MinSocAvfsRevision: 1\n    SocAvfsPadding:\n      SocAvfsPadding 0: 0\n      SocAvfsPadding 1: 0\n    SocAvfsFuseOverride:\n      SocAvfsFuseOverride 0:\n        AvfsTemp:\n          AvfsTemp 0: 0\n          AvfsTemp 1: 85\n        VftFMin: 300\n        VInversion: 2800\n        qVft:\n          qVft 0:\n            a: 0.0317\n            b: 0.06094\n            c: 0.46387\n          qVft 1:\n            a: 0.04119\n            b: 0.05521\n            c: 0.42941\n        qAvfsGb:\n          a: 0\n          b: 0\n          c: 0.048\n        qAvfsGb2:\n          a: 0\n          b: 0\n          c: 0\n      SocAvfsFuseOverride 1:\n        AvfsTemp:\n          AvfsTemp 0: 0\n          AvfsTemp 1: 85\n        VftFMin: 300\n        VInversion: 2800\n        qVft:\n          qVft 0:\n            a: 0.0317\n            b: 0.06094\n            c: 0.46387\n          qVft 1:\n            a: 0.04119\n            b: 0.05521\n            c: 0.42941\n        qAvfsGb:\n          a: 0\n          b: 0\n          c: 0.048\n        qAvfsGb2:\n          a: 0\n          b: 0\n          c: 0\n      SocAvfsFuseOverride 2:\n        AvfsTemp:\n          AvfsTemp 0: 0\n          AvfsTemp 1: 85\n        VftFMin: 300\n        VInversion: 2800\n        qVft:\n          qVft 0:\n            a: 0.0317\n            b: 0.06094\n            c: 0.46387\n          qVft 1:\n            a: 0.04119\n            b: 0.05521\n            c: 0.42941\n        qAvfsGb:\n          a: 0\n          b: 0\n          c: 0.048\n        qAvfsGb2:\n          a: 0\n          b: 0\n          c: 0\n    dBtcGbSoc:\n      dBtcGbSoc 0:\n        a: 1.5\n        b:-0.0774\n        c:-0.753\n      dBtcGbSoc 1:\n        a: 1.5\n        b:-0.0774\n        c:-0.753\n      dBtcGbSoc 2:\n        a: 1.5\n        b:-0.0774\n        c:-0.753\n    qAgingGb:\n      qAgingGb 0:\n        m: 0\n        b: 0\n      qAgingGb 1:\n        m: 0\n        b: 0\n      qAgingGb 2:\n        m: 0\n        b: 0\n    qStaticVoltageOffset:\n      qStaticVoltageOffset 0:\n        a: 0\n        b: 0\n        c: 0\n      qStaticVoltageOffset 1:\n        a: 0\n        b: 0\n        c: 0\n      qStaticVoltageOffset 2:\n        a: 0\n        b: 0\n        c: 0\n    DcBtcSocParams:\n      DcBtcSocParams 0:\n        DcBtcEnabled: 1\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n        DcTol: 180\n        DcBtcGb: 24\n        DcBtcMin: 0\n        DcBtcMax: 180\n        DcBtcGbScalar:\n          m: 2.5\n          b: 0\n      DcBtcSocParams 1:\n        DcBtcEnabled: 1\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n        DcTol: 180\n        DcBtcGb: 24\n        DcBtcMin: 0\n        DcBtcMax: 180\n        DcBtcGbScalar:\n          m: 4.5\n          b: 0\n      DcBtcSocParams 2:\n        DcBtcEnabled: 0\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n        DcTol: 0\n        DcBtcGb: 0\n        DcBtcMin: 0\n        DcBtcMax: 0\n        DcBtcGbScalar:\n          m: 0\n          b: 0\n    SocAvfsSpare:\n      SocAvfsSpare 0: 0\n      SocAvfsSpare 1: 0\n      SocAvfsSpare 2: 0\n      SocAvfsSpare 3: 0\n      SocAvfsSpare 4: 0\n      SocAvfsSpare 5: 0\n      SocAvfsSpare 6: 0\n      SocAvfsSpare 7: 0\n      SocAvfsSpare 8: 0\n      SocAvfsSpare 9: 0\n      SocAvfsSpare 10: 0\n      SocAvfsSpare 11: 0\n      SocAvfsSpare 12: 0\n      SocAvfsSpare 13: 0\n      SocAvfsSpare 14: 0\n      SocAvfsSpare 15: 0\n      SocAvfsSpare 16: 0\n      SocAvfsSpare 17: 0\n      SocAvfsSpare 18: 0\n      SocAvfsSpare 19: 0\n      SocAvfsSpare 20: 0\n      SocAvfsSpare 21: 0\n      SocAvfsSpare 22: 0\n      SocAvfsSpare 23: 0\n      SocAvfsSpare 24: 0\n      SocAvfsSpare 25: 0\n      SocAvfsSpare 26: 0\n      SocAvfsSpare 27: 0\n      SocAvfsSpare 28: 0\n      SocAvfsSpare 29: 0\n      SocAvfsSpare 30: 0\n      SocAvfsSpare 31: 0\n    BootValues:\n      InitGfxclk_bypass: 1200\n      InitSocclk: 600\n      InitMp0clk: 720\n      InitMpioclk: 500\n      InitSmnclk: 500\n      InitUcpclk: 1000\n      InitCsrclk: 400\n      InitDprefclk: 717\n      InitDcfclk: 662\n      InitDtbclk: 0\n      InitDclk: 513\n      InitVclk: 513\n      InitUsbdfsclk: 672\n      InitMp1clk: 509\n      InitLclk: 623\n      InitBaco400clk_bypass: 400\n      InitBaco1200clk_bypass: 1200\n      InitBaco700clk_bypass: 700\n      InitFclk: 1000\n      InitGfxclk_clkb: 0\n      InitUclkDPMState: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n        Padding 2: 0\n      InitVcoFreqPll0: 4500\n      InitVcoFreqPll1: 4300\n      InitVcoFreqPll2: 0\n      InitVcoFreqPll3: 4100\n      InitVcoFreqPll4: 4000\n      InitVcoFreqPll5: 4200\n      InitVcoFreqPll6: 0\n      InitGfx: 0\n      InitSoc: 3200\n      InitU: 3400\n      Padding2: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n        Spare 5: 0\n        Spare 6: 0\n        Spare 7: 0\n    DriverReportedClocks:\n      BaseClockAc: 2075\n      GameClockAc: 2515\n      BoostClockAc: 2617\n      BaseClockDc: 0\n      GameClockDc: 0\n      BoostClockDc: 0\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n        Reserved 3: 0\n    MsgLimits:\n      Power:\n        Power 0:\n          0 0: 350\n          0 1: 0\n        Power 1:\n          1 0: 1200\n          1 1: 0\n        Power 2:\n          2 0: 0\n          2 1: 0\n        Power 3:\n          3 0: 0\n          3 1: 0\n      Tdc:\n        Tdc 0: 448\n        Tdc 1: 82\n        Tdc 2: 86\n      Temperature:\n        Temperature 0: 100\n        Temperature 1: 110\n        Temperature 2: 110\n        Temperature 3: 110\n        Temperature 4: 110\n        Temperature 5: 115\n        Temperature 6: 115\n        Temperature 7: 115\n        Temperature 8: 115\n        Temperature 9: 115\n        Temperature 10: 0\n        Temperature 11: 0\n        Temperature 12: 0\n      PwmLimitMin: 0\n      PwmLimitMax: 255\n      FanTargetTemperature: 110\n      Spare1:\n        Spare1 0: 0\n      AcousticTargetRpmThresholdMin: 500\n      AcousticTargetRpmThresholdMax: 6000\n      AcousticLimitRpmThresholdMin: 500\n      AcousticLimitRpmThresholdMax: 6000\n      PccLimitMin: 0\n      PccLimitMax: 450\n      FanStopTempMin: 25\n      FanStopTempMax: 100\n      FanStartTempMin: 25\n      FanStartTempMax: 100\n      PowerMinPpt0:\n        PowerMinPpt0 0: 0\n        PowerMinPpt0 1: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n        Spare 5: 0\n        Spare 6: 0\n        Spare 7: 0\n        Spare 8: 0\n        Spare 9: 0\n        Spare 10: 0\n    OverDriveLimitsMin:\n      FeatureCtrlMask: 1997\n      VoltageOffsetPerZoneBoundary: -450\n      Reserved1: 0\n      Reserved2: 0\n      GfxclkFmin: 500\n      GfxclkFmax: 500\n      UclkFmin: 97\n      UclkFmax: 97\n      Ppt: -10\n      Tdc: -10\n      FanLinearPwmPoints: 15\n      FanLinearTempPoints: 25\n      FanMinimumPwm: 15\n      AcousticTargetRpmThreshold: 500\n      AcousticLimitRpmThreshold: 500\n      FanTargetTemperature: 25\n      FanZeroRpmEnable: 0\n      FanZeroRpmStopTemp: 25\n      FanMode: 0\n      MaxOpTemp: 50\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n        Padding 2: 0\n        Padding 3: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n        Spare 5: 0\n        Spare 6: 0\n        Spare 7: 0\n        Spare 8: 0\n        Spare 9: 0\n        Spare 10: 0\n        Spare 11: 0\n    OverDriveLimitsBasicMax:\n      FeatureCtrlMask: 1997\n      VoltageOffsetPerZoneBoundary: 0\n      Reserved1: 0\n      Reserved2: 0\n      GfxclkFmin: 5000\n      GfxclkFmax: 5000\n      UclkFmin: 1500\n      UclkFmax: 1500\n      Ppt: 15\n      Tdc: 0\n      FanLinearPwmPoints: 100\n      FanLinearTempPoints: 100\n      FanMinimumPwm: 100\n      AcousticTargetRpmThreshold: 3300\n      AcousticLimitRpmThreshold: 3300\n      FanTargetTemperature: 105\n      FanZeroRpmEnable: 1\n      FanZeroRpmStopTemp: 100\n      FanMode: 1\n      MaxOpTemp: 110\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n        Padding 2: 0\n        Padding 3: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n        Spare 5: 0\n        Spare 6: 0\n        Spare 7: 0\n        Spare 8: 39322800\n        Spare 9: 32768720\n        Spare 10: 65536500\n        Spare 11: 45875600\n    OverDriveLimitsAdvancedMax:\n      FeatureCtrlMask: 0\n      VoltageOffsetPerZoneBoundary: 0\n      Reserved1: 0\n      Reserved2: 0\n      GfxclkFmin: 0\n      GfxclkFmax: 0\n      UclkFmin: 0\n      UclkFmax: 0\n      Ppt: 0\n      Tdc: 0\n      FanLinearPwmPoints: 0\n      FanLinearTempPoints: 0\n      FanMinimumPwm: 0\n      AcousticTargetRpmThreshold: 0\n      AcousticLimitRpmThreshold: 0\n      FanTargetTemperature: 0\n      FanZeroRpmEnable: 0\n      FanZeroRpmStopTemp: 0\n      FanMode: 0\n      MaxOpTemp: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n        Padding 2: 0\n        Padding 3: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 4200\n        Spare 3: 0\n        Spare 4: 45875200\n        Spare 5: 750\n        Spare 6: 0\n        Spare 7: 0\n        Spare 8: 0\n        Spare 9: 0\n        Spare 10: 0\n        Spare 11: 0\n    DebugOverrides: 0\n    TotalBoardPowerSupport: 1\n    TotalBoardPowerPadding:\n      TotalBoardPowerPadding 0: 0\n      TotalBoardPowerPadding 1: 0\n      TotalBoardPowerPadding 2: 0\n    TotalIdleBoardPowerM: 877\n    TotalIdleBoardPowerB: 0\n    TotalBoardPowerM: 1179\n    TotalBoardPowerB: 4019\n    qFeffCoeffGameClock:\n      qFeffCoeffGameClock 0:\n        a:-0.06944\n        b: 47.0833\n        c:-5455.62\n      qFeffCoeffGameClock 1:\n        a: 0\n        b: 0\n        c: 0\n    qFeffCoeffBaseClock:\n      qFeffCoeffBaseClock 0:\n        a:-0.00744\n        b: 8.64583\n        c: 43.9866\n      qFeffCoeffBaseClock 1:\n        a: 0\n        b: 0\n        c: 0\n    qFeffCoeffBoostClock:\n      qFeffCoeffBoostClock 0:\n        a: 0.04216\n        b:-22.7708\n        c: 5555.08\n      qFeffCoeffBoostClock 1:\n        a: 0\n        b: 0\n        c: 0\n    Spare:\n      Spare 0: 0\n      Spare 1: 0\n      Spare 2: 0\n      Spare 3: 0\n      Spare 4: 0\n      Spare 5: 0\n      Spare 6: 0\n      Spare 7: 0\n      Spare 8: 0\n      Spare 9: 0\n      Spare 10: 0\n      Spare 11: 0\n      Spare 12: 0\n      Spare 13: 0\n      Spare 14: 0\n      Spare 15: 0\n      Spare 16: 0\n      Spare 17: 0\n      Spare 18: 0\n      Spare 19: 0\n      Spare 20: 0\n      Spare 21: 0\n      Spare 22: 0\n      Spare 23: 0\n      Spare 24: 0\n      Spare 25: 0\n      Spare 26: 0\n      Spare 27: 0\n      Spare 28: 0\n      Spare 29: 0\n      Spare 30: 0\n      Spare 31: 0\n      Spare 32: 0\n      Spare 33: 0\n      Spare 34: 0\n      Spare 35: 0\n      Spare 36: 0\n      Spare 37: 0\n      Spare 38: 0\n      Spare 39: 0\n      Spare 40: 0\n      Spare 41: 0\n      Spare 42: 0\n    MmHubPadding:\n      MmHubPadding 0: 0\n      MmHubPadding 1: 0\n      MmHubPadding 2: 0\n      MmHubPadding 3: 0\n      MmHubPadding 4: 0\n      MmHubPadding 5: 0\n      MmHubPadding 6: 0\n      MmHubPadding 7: 0\n  BoardTable:\n    Version: 38\n    I2cControllers:\n      I2cControllers 0:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 1:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 2:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 3:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 4:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 5:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 6:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 7:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n    VddGfxVrMapping: 0\n    VddSocVrMapping: 0\n    VddMem0VrMapping: 0\n    VddMem1VrMapping: 0\n    GfxUlvPhaseSheddingMask: 0\n    SocUlvPhaseSheddingMask: 0\n    VmempUlvPhaseSheddingMask: 0\n    VddioUlvPhaseSheddingMask: 0\n    SlaveAddrMapping:\n      SlaveAddrMapping 0: 0\n      SlaveAddrMapping 1: 0\n      SlaveAddrMapping 2: 0\n      SlaveAddrMapping 3: 0\n      SlaveAddrMapping 4: 0\n    VrPsiSupport:\n      VrPsiSupport 0: 0\n      VrPsiSupport 1: 0\n      VrPsiSupport 2: 0\n      VrPsiSupport 3: 1\n      VrPsiSupport 4: 0\n    PaddingPsi:\n      PaddingPsi 0: 0\n      PaddingPsi 1: 0\n      PaddingPsi 2: 0\n      PaddingPsi 3: 0\n      PaddingPsi 4: 0\n    EnablePsi6:\n      EnablePsi6 0: 0\n      EnablePsi6 1: 0\n      EnablePsi6 2: 0\n      EnablePsi6 3: 0\n      EnablePsi6 4: 0\n    SviTelemetryScale:\n      SviTelemetryScale 0:\n        Offset: 0\n        Padding: 0\n        MaxCurrent: 0\n      SviTelemetryScale 1:\n        Offset: 0\n        Padding: 0\n        MaxCurrent: 0\n      SviTelemetryScale 2:\n        Offset: 0\n        Padding: 0\n        MaxCurrent: 0\n      SviTelemetryScale 3:\n        Offset: 0\n        Padding: 0\n        MaxCurrent: 0\n      SviTelemetryScale 4:\n        Offset: 0\n        Padding: 0\n        MaxCurrent: 0\n    VoltageTelemetryRatio:\n      VoltageTelemetryRatio 0: 0\n      VoltageTelemetryRatio 1: 0\n      VoltageTelemetryRatio 2: 0\n      VoltageTelemetryRatio 3: 0\n      VoltageTelemetryRatio 4: 0\n    DownSlewRateVr:\n      DownSlewRateVr 0: 0\n      DownSlewRateVr 1: 0\n      DownSlewRateVr 2: 0\n      DownSlewRateVr 3: 0\n      DownSlewRateVr 4: 0\n    LedOffGpio: 0\n    FanOffGpio: 0\n    GfxVrPowerStageOffGpio: 0\n    AcDcGpio: 0\n    AcDcPolarity: 0\n    VR0HotGpio: 0\n    VR0HotPolarity: 0\n    GthrGpio: 0\n    GthrPolarity: 0\n    LedPin0: 0\n    LedPin1: 0\n    LedPin2: 0\n    LedEnableMask: 0\n    LedPcie: 0\n    LedError: 0\n    UclkTrainingModeSpreadPercent: 0\n    UclkSpreadPadding: 0\n    UclkSpreadFreq: 0\n    UclkSpreadPercent:\n      UclkSpreadPercent 0: 0\n      UclkSpreadPercent 1: 0\n      UclkSpreadPercent 2: 0\n      UclkSpreadPercent 3: 0\n      UclkSpreadPercent 4: 0\n      UclkSpreadPercent 5: 0\n      UclkSpreadPercent 6: 0\n      UclkSpreadPercent 7: 0\n      UclkSpreadPercent 8: 0\n      UclkSpreadPercent 9: 0\n      UclkSpreadPercent 10: 0\n      UclkSpreadPercent 11: 0\n      UclkSpreadPercent 12: 0\n      UclkSpreadPercent 13: 0\n      UclkSpreadPercent 14: 0\n      UclkSpreadPercent 15: 0\n    FclkSpreadPadding: 0\n    FclkSpreadPercent: 0\n    FclkSpreadFreq: 0\n    DramWidth: 0\n    PaddingMem1:\n      PaddingMem1 0: 0\n      PaddingMem1 1: 0\n      PaddingMem1 2: 0\n      PaddingMem1 3: 0\n      PaddingMem1 4: 0\n      PaddingMem1 5: 0\n      PaddingMem1 6: 0\n    HsrEnabled: 0\n    VddqOffEnabled: 0\n    PaddingUmcFlags:\n      PaddingUmcFlags 0: 0\n      PaddingUmcFlags 1: 0\n    PostVoltageSetBacoDelay: 0\n    BacoEntryDelay: 0\n    FuseWritePowerMuxPresent: 0\n    FuseWritePadding:\n      FuseWritePadding 0: 0\n      FuseWritePadding 1: 0\n      FuseWritePadding 2: 0\n    BoardSpare:\n      BoardSpare 0: 0\n      BoardSpare 1: 0\n      BoardSpare 2: 0\n      BoardSpare 3: 0\n      BoardSpare 4: 0\n      BoardSpare 5: 0\n      BoardSpare 6: 0\n      BoardSpare 7: 0\n      BoardSpare 8: 0\n      BoardSpare 9: 0\n      BoardSpare 10: 0\n      BoardSpare 11: 0\n      BoardSpare 12: 0\n      BoardSpare 13: 0\n      BoardSpare 14: 0\n      BoardSpare 15: 0\n      BoardSpare 16: 0\n      BoardSpare 17: 0\n      BoardSpare 18: 0\n      BoardSpare 19: 0\n      BoardSpare 20: 0\n      BoardSpare 21: 0\n      BoardSpare 22: 0\n      BoardSpare 23: 0\n      BoardSpare 24: 0\n      BoardSpare 25: 0\n      BoardSpare 26: 0\n      BoardSpare 27: 0\n      BoardSpare 28: 0\n      BoardSpare 29: 0\n      BoardSpare 30: 0\n      BoardSpare 31: 0\n      BoardSpare 32: 0\n      BoardSpare 33: 0\n      BoardSpare 34: 0\n      BoardSpare 35: 0\n      BoardSpare 36: 0\n      BoardSpare 37: 0\n      BoardSpare 38: 0\n      BoardSpare 39: 0\n      BoardSpare 40: 0\n      BoardSpare 41: 0\n      BoardSpare 42: 0\n      BoardSpare 43: 0\n      BoardSpare 44: 0\n      BoardSpare 45: 0\n      BoardSpare 46: 0\n      BoardSpare 47: 0\n      BoardSpare 48: 0\n      BoardSpare 49: 0\n      BoardSpare 50: 0\n      BoardSpare 51: 0\n      BoardSpare 52: 0\n      BoardSpare 53: 0\n      BoardSpare 54: 0\n      BoardSpare 55: 0\n      BoardSpare 56: 0\n      BoardSpare 57: 0\n      BoardSpare 58: 0\n      BoardSpare 59: 0\n      BoardSpare 60: 0\n      BoardSpare 61: 0\n      BoardSpare 62: 0\n    MmHubPadding:\n      MmHubPadding 0: 0\n      MmHubPadding 1: 0\n      MmHubPadding 2: 0\n      MmHubPadding 3: 0\n      MmHubPadding 4: 0\n      MmHubPadding 5: 0\n      MmHubPadding 6: 0\n      MmHubPadding 7: 0\n"
  },
  {
    "path": "test/AMD.RX7900XTX.24576.230323.rom.rawdump",
    "content": "PowerPlay table rev 20.0 size 5424 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     3015 structuresize                             : 5424\n 0x0002 (0002) B       14 format_revision                           : 20\n 0x0003 (0003) B       00 content_revision                          : 0\n 0x0004 (0004) B       03 table_revision                            : 3\n 0x0005 (0005) B       00 padding                                   : 0\n 0x0006 (0006) H     4003 table_size                                : 832\n 0x0008 (0008) I 3c0f0000 golden_pp_id                              : 3900\n 0x000c (0012) I 11540000 golden_revision                           : 21521\n 0x0010 (0016) H     8500 format_id                                 : 133\n 0x0012 (0018) I 08000000 platform_caps                             : 8\n 0x0016 (0022) B       1d thermal_controller_type                   : 29\n 0x0017 (0023) H     0000 small_power_limit1                        : 0\n 0x0019 (0025) H     0000 small_power_limit2                        : 0\n 0x001b (0027) H     0000 boost_power_limit                         : 0\n 0x001d (0029) H     7600 software_shutdown_temp                    : 118\n 0x001f (0031) I 00000000 reserve                                   : 0\n 0x0023 (0035) I 00000000 reserve                                   : 0\n 0x0027 (0039) I 00000000 reserve                                   : 0\n 0x002b (0043) I 00000000 reserve                                   : 0\n 0x002f (0047) I 00000000 reserve                                   : 0\n 0x0033 (0051) I 00000000 reserve                                   : 0\n 0x0037 (0055) I 00000000 reserve                                   : 0\n 0x003b (0059) I 00000000 reserve                                   : 0\n 0x003f (0063) I 00000000 reserve                                   : 0\n 0x0043 (0067) I 00000000 reserve                                   : 0\n 0x0047 (0071) I 00000000 reserve                                   : 0\n 0x004b (0075) I 00000000 reserve                                   : 0\n 0x004f (0079) I 00000000 reserve                                   : 0\n 0x0053 (0083) I 00000000 reserve                                   : 0\n 0x0057 (0087) I 00000000 reserve                                   : 0\n 0x005b (0091) I 00000000 reserve                                   : 0\n 0x005f (0095) I 00000000 reserve                                   : 0\n 0x0063 (0099) I 00000000 reserve                                   : 0\n 0x0067 (0103) I 00000000 reserve                                   : 0\n 0x006b (0107) I 00000000 reserve                                   : 0\n 0x006f (0111) I 00000000 reserve                                   : 0\n 0x0073 (0115) I 00000000 reserve                                   : 0\n 0x0077 (0119) I 00000000 reserve                                   : 0\n 0x007b (0123) I 00000000 reserve                                   : 0\n 0x007f (0127) I 00000000 reserve                                   : 0\n 0x0083 (0131) I 00000000 reserve                                   : 0\n 0x0087 (0135) I 00000000 reserve                                   : 0\n 0x008b (0139) I 00000000 reserve                                   : 0\n 0x008f (0143) I 00000000 reserve                                   : 0\n 0x0093 (0147) I 00000000 reserve                                   : 0\n 0x0097 (0151) I 00000000 reserve                                   : 0\n 0x009b (0155) I 00000000 reserve                                   : 0\n 0x009f (0159) I 00000000 reserve                                   : 0\n 0x00a3 (0163) I 00000000 reserve                                   : 0\n 0x00a7 (0167) I 00000000 reserve                                   : 0\n 0x00ab (0171) I 00000000 reserve                                   : 0\n 0x00af (0175) I 00000000 reserve                                   : 0\n 0x00b3 (0179) I 00000000 reserve                                   : 0\n 0x00b7 (0183) I 00000000 reserve                                   : 0\n 0x00bb (0187) I 00000000 reserve                                   : 0\n 0x00bf (0191) I 00000000 reserve                                   : 0\n 0x00c3 (0195) I 00000000 reserve                                   : 0\n 0x00c7 (0199) I 00000000 reserve                                   : 0\n 0x00cb (0203) I 00000000 reserve                                   : 0\n 0x00cf (0207) I 00000000 reserve                                   : 0\n 0x00d3 (0211) B       83 revision                                  : 131\n 0x00d4 (0212) B       00 reserve                                   : 0\n 0x00d5 (0213) B       00 reserve                                   : 0\n 0x00d6 (0214) B       00 reserve                                   : 0\n 0x00d7 (0215) I 16000000 feature_count                             : 22\n 0x00db (0219) I 29000000 setting_count                             : 41\n 0x00df (0223) B       01 cap GFXCLK_LIMITS                         : 1\n 0x00e0 (0224) B       01 cap UCLK_LIMITS                           : 1\n 0x00e1 (0225) B       01 cap POWER_LIMIT                           : 1\n 0x00e2 (0226) B       01 cap FAN_ACOUSTIC_LIMIT                    : 1\n 0x00e3 (0227) B       01 cap FAN_SPEED_MIN                         : 1\n 0x00e4 (0228) B       01 cap TEMPERATURE_FAN                       : 1\n 0x00e5 (0229) B       01 cap TEMPERATURE_SYSTEM                    : 1\n 0x00e6 (0230) B       01 cap MEMORY_TIMING_TUNE                    : 1\n 0x00e7 (0231) B       01 cap FAN_ZERO_RPM_CONTROL                  : 1\n 0x00e8 (0232) B       01 cap AUTO_UV_ENGINE                        : 1\n 0x00e9 (0233) B       01 cap AUTO_OC_ENGINE                        : 1\n 0x00ea (0234) B       01 cap AUTO_OC_MEMORY                        : 1\n 0x00eb (0235) B       01 cap FAN_CURVE                             : 1\n 0x00ec (0236) B       00 cap AUTO_FAN_ACOUSTIC_LIMIT               : 0\n 0x00ed (0237) B       01 cap POWER_MODE                            : 1\n 0x00ee (0238) B       00 cap PER_ZONE_GFX_VOLTAGE_OFFSET           : 0\n 0x00ef (0239) B       00 cap                                       : 0\n 0x00f0 (0240) B       01 cap                                       : 1\n 0x00f1 (0241) B       00 cap                                       : 0\n 0x00f2 (0242) B       00 cap                                       : 0\n 0x00f3 (0243) B       00 cap                                       : 0\n 0x00f4 (0244) B       00 cap                                       : 0\n 0x00f5 (0245) B       00 cap                                       : 0\n 0x00f6 (0246) B       00 cap                                       : 0\n 0x00f7 (0247) B       00 cap                                       : 0\n 0x00f8 (0248) B       00 cap                                       : 0\n 0x00f9 (0249) B       00 cap                                       : 0\n 0x00fa (0250) B       00 cap                                       : 0\n 0x00fb (0251) B       00 cap                                       : 0\n 0x00fc (0252) B       00 cap                                       : 0\n 0x00fd (0253) B       00 cap                                       : 0\n 0x00fe (0254) B       00 cap                                       : 0\n 0x00ff (0255) I 88130000 max GFXCLKFMAX                            : 5000\n 0x0103 (0259) I 88130000 max GFXCLKFMIN                            : 5000\n 0x0107 (0263) I dc050000 max UCLKFMIN                              : 1500\n 0x010b (0267) I dc050000 max UCLKFMAX                              : 1500\n 0x010f (0271) I 0f000000 max POWERPERCENTAGE                       : 15\n 0x0113 (0275) I e40c0000 max FANRPMMIN                             : 3300\n 0x0117 (0279) I e40c0000 max FANRPMACOUSTICLIMIT                   : 3300\n 0x011b (0283) I 69000000 max FANTARGETTEMPERATURE                  : 105\n 0x011f (0287) I 6e000000 max OPERATINGTEMPMAX                      : 110\n 0x0123 (0291) I 01000000 max ACTIMING                              : 1\n 0x0127 (0295) I 01000000 max FAN_ZERO_RPM_CONTROL                  : 1\n 0x012b (0299) I 01000000 max AUTOUVENGINE                          : 1\n 0x012f (0303) I 01000000 max AUTOOCENGINE                          : 1\n 0x0133 (0307) I 01000000 max AUTOOCMEMORY                          : 1\n 0x0137 (0311) I 64000000 max FAN_CURVE_TEMPERATURE_1               : 100\n 0x013b (0315) I 64000000 max FAN_CURVE_SPEED_1                     : 100\n 0x013f (0319) I 64000000 max FAN_CURVE_TEMPERATURE_2               : 100\n 0x0143 (0323) I 64000000 max FAN_CURVE_SPEED_2                     : 100\n 0x0147 (0327) I 64000000 max FAN_CURVE_TEMPERATURE_3               : 100\n 0x014b (0331) I 64000000 max FAN_CURVE_SPEED_3                     : 100\n 0x014f (0335) I 64000000 max FAN_CURVE_TEMPERATURE_4               : 100\n 0x0153 (0339) I 64000000 max FAN_CURVE_SPEED_4                     : 100\n 0x0157 (0343) I 64000000 max FAN_CURVE_TEMPERATURE_5               : 100\n 0x015b (0347) I 64000000 max FAN_CURVE_SPEED_5                     : 100\n 0x015f (0351) I 00000000 max AUTO_FAN_ACOUSTIC_LIMIT               : 0\n 0x0163 (0355) I 01000000 max POWER_MODE                            : 1\n 0x0167 (0359) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1   : 0\n 0x016b (0363) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2   : 0\n 0x016f (0367) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3   : 0\n 0x0173 (0371) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4   : 0\n 0x0177 (0375) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5   : 0\n 0x017b (0379) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6   : 0\n 0x017f (0383) I 00000000 max                                       : 0\n 0x0183 (0387) I 00000000 max                                       : 0\n 0x0187 (0391) I 00000000 max                                       : 0\n 0x018b (0395) I 00000000 max                                       : 0\n 0x018f (0399) I 00000000 max                                       : 0\n 0x0193 (0403) I 00000000 max                                       : 0\n 0x0197 (0407) I 00000000 max                                       : 0\n 0x019b (0411) I 00000000 max                                       : 0\n 0x019f (0415) I 00000000 max                                       : 0\n 0x01a3 (0419) I 00000000 max                                       : 0\n 0x01a7 (0423) I 00000000 max                                       : 0\n 0x01ab (0427) I 00000000 max                                       : 0\n 0x01af (0431) I 00000000 max                                       : 0\n 0x01b3 (0435) I 00000000 max                                       : 0\n 0x01b7 (0439) I 00000000 max                                       : 0\n 0x01bb (0443) I 00000000 max                                       : 0\n 0x01bf (0447) I 00000000 max                                       : 0\n 0x01c3 (0451) I 00000000 max                                       : 0\n 0x01c7 (0455) I 00000000 max                                       : 0\n 0x01cb (0459) I 00000000 max                                       : 0\n 0x01cf (0463) I 00000000 max                                       : 0\n 0x01d3 (0467) I 00000000 max                                       : 0\n 0x01d7 (0471) I 00000000 max                                       : 0\n 0x01db (0475) I 00000000 max                                       : 0\n 0x01df (0479) I 00000000 max                                       : 0\n 0x01e3 (0483) I 00000000 max                                       : 0\n 0x01e7 (0487) I 00000000 max                                       : 0\n 0x01eb (0491) I 00000000 max                                       : 0\n 0x01ef (0495) I 00000000 max                                       : 0\n 0x01f3 (0499) I 00000000 max                                       : 0\n 0x01f7 (0503) I 00000000 max                                       : 0\n 0x01fb (0507) I 00000000 max                                       : 0\n 0x01ff (0511) I f4010000 min GFXCLKFMAX                            : 500\n 0x0203 (0515) I f4010000 min GFXCLKFMIN                            : 500\n 0x0207 (0519) I 61000000 min UCLKFMIN                              : 97\n 0x020b (0523) I 61000000 min UCLKFMAX                              : 97\n 0x020f (0527) I 0a000000 min POWERPERCENTAGE                       : 10\n 0x0213 (0531) I f4010000 min FANRPMMIN                             : 500\n 0x0217 (0535) I f4010000 min FANRPMACOUSTICLIMIT                   : 500\n 0x021b (0539) I 19000000 min FANTARGETTEMPERATURE                  : 25\n 0x021f (0543) I 32000000 min OPERATINGTEMPMAX                      : 50\n 0x0223 (0547) I 00000000 min ACTIMING                              : 0\n 0x0227 (0551) I 00000000 min FAN_ZERO_RPM_CONTROL                  : 0\n 0x022b (0555) I 00000000 min AUTOUVENGINE                          : 0\n 0x022f (0559) I 00000000 min AUTOOCENGINE                          : 0\n 0x0233 (0563) I 00000000 min AUTOOCMEMORY                          : 0\n 0x0237 (0567) I 19000000 min FAN_CURVE_TEMPERATURE_1               : 25\n 0x023b (0571) I 0f000000 min FAN_CURVE_SPEED_1                     : 15\n 0x023f (0575) I 19000000 min FAN_CURVE_TEMPERATURE_2               : 25\n 0x0243 (0579) I 0f000000 min FAN_CURVE_SPEED_2                     : 15\n 0x0247 (0583) I 19000000 min FAN_CURVE_TEMPERATURE_3               : 25\n 0x024b (0587) I 0f000000 min FAN_CURVE_SPEED_3                     : 15\n 0x024f (0591) I 19000000 min FAN_CURVE_TEMPERATURE_4               : 25\n 0x0253 (0595) I 0f000000 min FAN_CURVE_SPEED_4                     : 15\n 0x0257 (0599) I 19000000 min FAN_CURVE_TEMPERATURE_5               : 25\n 0x025b (0603) I 0f000000 min FAN_CURVE_SPEED_5                     : 15\n 0x025f (0607) I 00000000 min AUTO_FAN_ACOUSTIC_LIMIT               : 0\n 0x0263 (0611) I 00000000 min POWER_MODE                            : 0\n 0x0267 (0615) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1   : 0\n 0x026b (0619) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2   : 0\n 0x026f (0623) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3   : 0\n 0x0273 (0627) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4   : 0\n 0x0277 (0631) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5   : 0\n 0x027b (0635) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6   : 0\n 0x027f (0639) I 00000000 min                                       : 0\n 0x0283 (0643) I 0a000000 min                                       : 10\n 0x0287 (0647) I 00000000 min                                       : 0\n 0x028b (0651) I 00000000 min                                       : 0\n 0x028f (0655) I 00000000 min                                       : 0\n 0x0293 (0659) I 00000000 min                                       : 0\n 0x0297 (0663) I 00000000 min                                       : 0\n 0x029b (0667) I 00000000 min                                       : 0\n 0x029f (0671) I 00000000 min                                       : 0\n 0x02a3 (0675) I 00000000 min                                       : 0\n 0x02a7 (0679) I 00000000 min                                       : 0\n 0x02ab (0683) I 00000000 min                                       : 0\n 0x02af (0687) I 00000000 min                                       : 0\n 0x02b3 (0691) I 00000000 min                                       : 0\n 0x02b7 (0695) I 00000000 min                                       : 0\n 0x02bb (0699) I 00000000 min                                       : 0\n 0x02bf (0703) I 00000000 min                                       : 0\n 0x02c3 (0707) I 00000000 min                                       : 0\n 0x02c7 (0711) I 00000000 min                                       : 0\n 0x02cb (0715) I 00000000 min                                       : 0\n 0x02cf (0719) I 00000000 min                                       : 0\n 0x02d3 (0723) I 00000000 min                                       : 0\n 0x02d7 (0727) I 00000000 min                                       : 0\n 0x02db (0731) I 00000000 min                                       : 0\n 0x02df (0735) I 00000000 min                                       : 0\n 0x02e3 (0739) I 00000000 min                                       : 0\n 0x02e7 (0743) I 00000000 min                                       : 0\n 0x02eb (0747) I 00000000 min                                       : 0\n 0x02ef (0751) I 00000000 min                                       : 0\n 0x02f3 (0755) I 00000000 min                                       : 0\n 0x02f7 (0759) I 00000000 min                                       : 0\n 0x02fb (0763) I 00000000 min                                       : 0\n 0x02ff (0767) h     0000 pm_setting                                : 0\n 0x0301 (0769) h     0000 pm_setting                                : 0\n 0x0303 (0771) h     0000 pm_setting                                : 0\n 0x0305 (0773) h     0a00 pm_setting                                : 10\n 0x0307 (0775) h     6900 pm_setting                                : 105\n 0x0309 (0777) h     5f00 pm_setting                                : 95\n 0x030b (0779) h     0000 pm_setting                                : 0\n 0x030d (0781) h     4b00 pm_setting                                : 75\n 0x030f (0783) h     0e06 pm_setting                                : 1550\n 0x0311 (0785) h     a406 pm_setting                                : 1700\n 0x0313 (0787) h     0000 pm_setting                                : 0\n 0x0315 (0789) h     b80b pm_setting                                : 3000\n 0x0317 (0791) h     0e06 pm_setting                                : 1550\n 0x0319 (0793) h     b80b pm_setting                                : 3000\n 0x031b (0795) h     0000 pm_setting                                : 0\n 0x031d (0797) h     b80b pm_setting                                : 3000\n 0x031f (0799) h     0000 pm_setting                                : 0\n 0x0321 (0801) h     0000 pm_setting                                : 0\n 0x0323 (0803) h     0000 pm_setting                                : 0\n 0x0325 (0805) h     0000 pm_setting                                : 0\n 0x0327 (0807) h     0000 pm_setting                                : 0\n 0x0329 (0809) h     0000 pm_setting                                : 0\n 0x032b (0811) h     0000 pm_setting                                : 0\n 0x032d (0813) h     0000 pm_setting                                : 0\n 0x032f (0815) h     0000 pm_setting                                : 0\n 0x0331 (0817) h     0000 pm_setting                                : 0\n 0x0333 (0819) h     0000 pm_setting                                : 0\n 0x0335 (0821) h     0000 pm_setting                                : 0\n 0x0337 (0823) h     0000 pm_setting                                : 0\n 0x0339 (0825) h     0000 pm_setting                                : 0\n 0x033b (0827) h     0000 pm_setting                                : 0\n 0x033d (0829) h     0000 pm_setting                                : 0\n 0x033f (0831) B       00 padding1                                  : 0\n 0x0340 (0832) I 29000000 Version                                   : 41\n 0x0344 (0836) I ffffff71 FeaturesToRun                             : 1912602623\n 0x0348 (0840) I b8eb0300 FeaturesToRun                             : 256952\n 0x034c (0844) B       01 TotalPowerConfig                          : 1\n 0x034d (0845) B       00 CustomerVariant                           : 0\n 0x034e (0846) B       04 MemoryTemperatureTypeMask                 : 4\n 0x034f (0847) B       00 SmartShiftVersion                         : 0\n 0x0350 (0848) H     4701 SocketPowerLimitAc                        : 327\n 0x0352 (0850) H     b004 SocketPowerLimitAc                        : 1200\n 0x0354 (0852) H     0000 SocketPowerLimitAc                        : 0\n 0x0356 (0854) H     0000 SocketPowerLimitAc                        : 0\n 0x0358 (0856) H     0000 SocketPowerLimitDc                        : 0\n 0x035a (0858) H     0000 SocketPowerLimitDc                        : 0\n 0x035c (0860) H     0000 SocketPowerLimitDc                        : 0\n 0x035e (0862) H     0000 SocketPowerLimitDc                        : 0\n 0x0360 (0864) H     0000 SocketPowerLimitSmartShift2               : 0\n 0x0362 (0866) B       00 EnableLegacyPptLimit                      : 0\n 0x0363 (0867) B       00 UseInputTelemetry                         : 0\n 0x0364 (0868) B       00 SmartShiftMinReportedPptinDcs             : 0\n 0x0365 (0869) B       00 PaddingPpt                                : 0\n 0x0366 (0870) H     3b01 VrTdcLimit                                : 315\n 0x0368 (0872) H     5200 VrTdcLimit                                : 82\n 0x036a (0874) H     5600 VrTdcLimit                                : 86\n 0x036c (0876) H     c001 PlatformTdcLimit                          : 448\n 0x036e (0878) H     5200 PlatformTdcLimit                          : 82\n 0x0370 (0880) H     5600 PlatformTdcLimit                          : 86\n 0x0372 (0882) H     6400 TemperatureLimit                          : 100\n 0x0374 (0884) H     6e00 TemperatureLimit                          : 110\n 0x0376 (0886) H     6e00 TemperatureLimit                          : 110\n 0x0378 (0888) H     6e00 TemperatureLimit                          : 110\n 0x037a (0890) H     6c00 TemperatureLimit                          : 108\n 0x037c (0892) H     7300 TemperatureLimit                          : 115\n 0x037e (0894) H     7300 TemperatureLimit                          : 115\n 0x0380 (0896) H     7300 TemperatureLimit                          : 115\n 0x0382 (0898) H     7300 TemperatureLimit                          : 115\n 0x0384 (0900) H     7300 TemperatureLimit                          : 115\n 0x0386 (0902) H     0000 TemperatureLimit                          : 0\n 0x0388 (0904) H     0000 TemperatureLimit                          : 0\n 0x038a (0906) H     0000 TemperatureLimit                          : 0\n 0x038c (0908) H     7800 HwCtfTempLimit                            : 120\n 0x038e (0910) H     0000 PaddingInfra                              : 0\n 0x0390 (0912) I 00000000 FitControllerFailureRateLimit             : 0\n 0x0394 (0916) I 00000000 FitControllerGfxDutyCycle                 : 0\n 0x0398 (0920) I 00000000 FitControllerSocDutyCycle                 : 0\n 0x039c (0924) I 00000000 FitControllerSocOffset                    : 0\n 0x03a0 (0928) I 00000000 GfxApccPlusResidencyLimit                 : 0\n 0x03a4 (0932) I f2e30300 ThrottlerControlMask                      : 254962\n 0x03a8 (0936) I ffff9b01 FwDStateMask                              : 27000831\n 0x03ac (0940) H     6400 UlvVoltageOffset                          : 100\n 0x03ae (0942) H     6400 UlvVoltageOffset                          : 100\n 0x03b0 (0944) H     6400 UlvVoltageOffsetU                         : 100\n 0x03b2 (0946) H     6400 DeepUlvVoltageOffsetSoc                   : 100\n 0x03b4 (0948) H     f811 DefaultMaxVoltage                         : 4600\n 0x03b6 (0950) H     c012 DefaultMaxVoltage                         : 4800\n 0x03b8 (0952) H     f811 BoostMaxVoltage                           : 4600\n 0x03ba (0954) H     c012 BoostMaxVoltage                           : 4800\n 0x03bc (0956) h     0500 VminTempHystersis                         : 5\n 0x03be (0958) h     0500 VminTempHystersis                         : 5\n 0x03c0 (0960) h     3700 VminTempThreshold                         : 55\n 0x03c2 (0962) h     3700 VminTempThreshold                         : 55\n 0x03c4 (0964) H     f00a Vmin_Hot_T0                               : 2800\n 0x03c6 (0966) H     f00a Vmin_Hot_T0                               : 2800\n 0x03c8 (0968) H     f00a Vmin_Cold_T0                              : 2800\n 0x03ca (0970) H     f00a Vmin_Cold_T0                              : 2800\n 0x03cc (0972) H     f00a Vmin_Hot_Eol                              : 2800\n 0x03ce (0974) H     f00a Vmin_Hot_Eol                              : 2800\n 0x03d0 (0976) H     f00a Vmin_Cold_Eol                             : 2800\n 0x03d2 (0978) H     f00a Vmin_Cold_Eol                             : 2800\n 0x03d4 (0980) H     0000 Vmin_Aging_Offset                         : 0\n 0x03d6 (0982) H     0000 Vmin_Aging_Offset                         : 0\n 0x03d8 (0984) H     0000 Spare_Vmin_Plat_Offset_Hot                : 0\n 0x03da (0986) H     0000 Spare_Vmin_Plat_Offset_Hot                : 0\n 0x03dc (0988) H     0000 Spare_Vmin_Plat_Offset_Cold               : 0\n 0x03de (0990) H     0000 Spare_Vmin_Plat_Offset_Cold               : 0\n 0x03e0 (0992) H     0000 VcBtcFixedVminAgingOffset                 : 0\n 0x03e2 (0994) H     0000 VcBtcFixedVminAgingOffset                 : 0\n 0x03e4 (0996) H     0000 VcBtcVmin2PsmDegrationGb                  : 0\n 0x03e6 (0998) H     0000 VcBtcVmin2PsmDegrationGb                  : 0\n 0x03e8 (1000) f 00000000 VcBtcPsmA                                 : 0\n 0x03ec (1004) f 00000000 VcBtcPsmA                                 : 0\n 0x03f0 (1008) f 00000000 VcBtcPsmB                                 : 0\n 0x03f4 (1012) f 00000000 VcBtcPsmB                                 : 0\n 0x03f8 (1016) f 00000000 VcBtcVminA                                : 0\n 0x03fc (1020) f 00000000 VcBtcVminA                                : 0\n 0x0400 (1024) f 00000000 VcBtcVminB                                : 0\n 0x0404 (1028) f 00000000 VcBtcVminB                                : 0\n 0x0408 (1032) B       01 PerPartVminEnabled                        : 1\n 0x0409 (1033) B       00 PerPartVminEnabled                        : 0\n 0x040a (1034) B       00 VcBtcEnabled                              : 0\n 0x040b (1035) B       00 VcBtcEnabled                              : 0\n 0x040c (1036) H     6400 SocketPowerLimitAcTau                     : 100\n 0x040e (1038) H     0a00 SocketPowerLimitAcTau                     : 10\n 0x0410 (1040) H     0000 SocketPowerLimitAcTau                     : 0\n 0x0412 (1042) H     0000 SocketPowerLimitAcTau                     : 0\n 0x0414 (1044) H     0000 SocketPowerLimitDcTau                     : 0\n 0x0416 (1046) H     0000 SocketPowerLimitDcTau                     : 0\n 0x0418 (1048) H     0000 SocketPowerLimitDcTau                     : 0\n 0x041a (1050) H     0000 SocketPowerLimitDcTau                     : 0\n 0x041c (1052) f 00000000 a                                         : 0\n 0x0420 (1056) f 9a99993d b                                         : 0.075\n 0x0424 (1060) f 0ad723bc c                                         :-0.01\n 0x0428 (1064) I 00000000 SpareVmin                                 : 0\n 0x042c (1068) I 00000000 SpareVmin                                 : 0\n 0x0430 (1072) I 00000000 SpareVmin                                 : 0\n 0x0434 (1076) I 00000000 SpareVmin                                 : 0\n 0x0438 (1080) I 00000000 SpareVmin                                 : 0\n 0x043c (1084) I 00000000 SpareVmin                                 : 0\n 0x0440 (1088) I 00000200 SpareVmin                                 : 131072\n 0x0444 (1092) I 00000000 SpareVmin                                 : 0\n 0x0448 (1096) I 00000000 SpareVmin                                 : 0\n 0x044c (1100) B       00 Padding                                   : 0\n 0x044d (1101) B       00 SnapToDiscrete                            : 0\n 0x044e (1102) B       02 NumDiscreteLevels                         : 2\n 0x044f (1103) B       03 CalculateFopt                             : 3\n 0x0450 (1104) f 0000803f m                                         : 1\n 0x0454 (1108) f 00000000 b                                         : 0\n 0x0458 (1112) I 00000000 Padding3                                  : 0\n 0x045c (1116) I 00000000 Padding3                                  : 0\n 0x0460 (1120) I 00000000 Padding3                                  : 0\n 0x0464 (1124) H     0000 Padding4                                  : 0\n 0x0466 (1126) H     0000 FoptimalDc                                : 0\n 0x0468 (1128) H     f401 FoptimalAc                                : 500\n 0x046a (1130) H     0000 Padding2                                  : 0\n 0x046c (1132) B       00 Padding                                   : 0\n 0x046d (1133) B       00 SnapToDiscrete                            : 0\n 0x046e (1134) B       02 NumDiscreteLevels                         : 2\n 0x046f (1135) B       00 CalculateFopt                             : 0\n 0x0470 (1136) f 6210a83f m                                         : 1.313\n 0x0474 (1140) f f0a7463e b                                         : 0.194\n 0x0478 (1144) I 00000000 Padding3                                  : 0\n 0x047c (1148) I 00000000 Padding3                                  : 0\n 0x0480 (1152) I 00010400 Padding3                                  : 262400\n 0x0484 (1156) H     0000 Padding4                                  : 0\n 0x0486 (1158) H     0000 FoptimalDc                                : 0\n 0x0488 (1160) H     0000 FoptimalAc                                : 0\n 0x048a (1162) H     0000 Padding2                                  : 0\n 0x048c (1164) B       00 Padding                                   : 0\n 0x048d (1165) B       01 SnapToDiscrete                            : 1\n 0x048e (1166) B       04 NumDiscreteLevels                         : 4\n 0x048f (1167) B       00 CalculateFopt                             : 0\n 0x0490 (1168) f aaf1c23f m                                         : 1.523\n 0x0494 (1172) f a60ac63d b                                         : 0.0967\n 0x0498 (1176) I 00000000 Padding3                                  : 0\n 0x049c (1180) I 00000000 Padding3                                  : 0\n 0x04a0 (1184) I 00000000 Padding3                                  : 0\n 0x04a4 (1188) H     0000 Padding4                                  : 0\n 0x04a6 (1190) H     0000 FoptimalDc                                : 0\n 0x04a8 (1192) H     0000 FoptimalAc                                : 0\n 0x04aa (1194) H     0000 Padding2                                  : 0\n 0x04ac (1196) B       00 Padding                                   : 0\n 0x04ad (1197) B       01 SnapToDiscrete                            : 1\n 0x04ae (1198) B       08 NumDiscreteLevels                         : 8\n 0x04af (1199) B       03 CalculateFopt                             : 3\n 0x04b0 (1200) f 0000803f m                                         : 1\n 0x04b4 (1204) f 00000000 b                                         : 0\n 0x04b8 (1208) I 00000000 Padding3                                  : 0\n 0x04bc (1212) I 00000000 Padding3                                  : 0\n 0x04c0 (1216) I 00000000 Padding3                                  : 0\n 0x04c4 (1220) H     0000 Padding4                                  : 0\n 0x04c6 (1222) H     0000 FoptimalDc                                : 0\n 0x04c8 (1224) H     fc08 FoptimalAc                                : 2300\n 0x04ca (1226) H     0000 Padding2                                  : 0\n 0x04cc (1228) B       00 Padding                                   : 0\n 0x04cd (1229) B       00 SnapToDiscrete                            : 0\n 0x04ce (1230) B       02 NumDiscreteLevels                         : 2\n 0x04cf (1231) B       00 CalculateFopt                             : 0\n 0x04d0 (1232) f 789c823f m                                         : 1.0204\n 0x04d4 (1236) f a01aaf3e b                                         : 0.342\n 0x04d8 (1240) I 00000000 Padding3                                  : 0\n 0x04dc (1244) I 00000000 Padding3                                  : 0\n 0x04e0 (1248) I 00000000 Padding3                                  : 0\n 0x04e4 (1252) H     0000 Padding4                                  : 0\n 0x04e6 (1254) H     0000 FoptimalDc                                : 0\n 0x04e8 (1256) H     0000 FoptimalAc                                : 0\n 0x04ea (1258) H     0000 Padding2                                  : 0\n 0x04ec (1260) B       00 Padding                                   : 0\n 0x04ed (1261) B       00 SnapToDiscrete                            : 0\n 0x04ee (1262) B       02 NumDiscreteLevels                         : 2\n 0x04ef (1263) B       00 CalculateFopt                             : 0\n 0x04f0 (1264) f 508d673f m                                         : 0.9045\n 0x04f4 (1268) f b7d140be b                                         :-0.1883\n 0x04f8 (1272) I 00000000 Padding3                                  : 0\n 0x04fc (1276) I 00000000 Padding3                                  : 0\n 0x0500 (1280) I 00000000 Padding3                                  : 0\n 0x0504 (1284) H     0000 Padding4                                  : 0\n 0x0506 (1286) H     0000 FoptimalDc                                : 0\n 0x0508 (1288) H     0000 FoptimalAc                                : 0\n 0x050a (1290) H     0000 Padding2                                  : 0\n 0x050c (1292) B       00 Padding                                   : 0\n 0x050d (1293) B       00 SnapToDiscrete                            : 0\n 0x050e (1294) B       02 NumDiscreteLevels                         : 2\n 0x050f (1295) B       00 CalculateFopt                             : 0\n 0x0510 (1296) f 789c823f m                                         : 1.0204\n 0x0514 (1300) f a01aaf3e b                                         : 0.342\n 0x0518 (1304) I 00000000 Padding3                                  : 0\n 0x051c (1308) I 00000000 Padding3                                  : 0\n 0x0520 (1312) I 00000000 Padding3                                  : 0\n 0x0524 (1316) H     0000 Padding4                                  : 0\n 0x0526 (1318) H     0000 FoptimalDc                                : 0\n 0x0528 (1320) H     0000 FoptimalAc                                : 0\n 0x052a (1322) H     0000 Padding2                                  : 0\n 0x052c (1324) B       00 Padding                                   : 0\n 0x052d (1325) B       00 SnapToDiscrete                            : 0\n 0x052e (1326) B       02 NumDiscreteLevels                         : 2\n 0x052f (1327) B       00 CalculateFopt                             : 0\n 0x0530 (1328) f 508d673f m                                         : 0.9045\n 0x0534 (1332) f b7d140be b                                         :-0.1883\n 0x0538 (1336) I 00000000 Padding3                                  : 0\n 0x053c (1340) I 00000000 Padding3                                  : 0\n 0x0540 (1344) I 00000000 Padding3                                  : 0\n 0x0544 (1348) H     0000 Padding4                                  : 0\n 0x0546 (1350) H     0000 FoptimalDc                                : 0\n 0x0548 (1352) H     0000 FoptimalAc                                : 0\n 0x054a (1354) H     0000 Padding2                                  : 0\n 0x054c (1356) B       00 Padding                                   : 0\n 0x054d (1357) B       00 SnapToDiscrete                            : 0\n 0x054e (1358) B       02 NumDiscreteLevels                         : 2\n 0x054f (1359) B       00 CalculateFopt                             : 0\n 0x0550 (1360) f fed4483f m                                         : 0.7845\n 0x0554 (1364) f dbf93e3f b                                         : 0.746\n 0x0558 (1368) I 00000000 Padding3                                  : 0\n 0x055c (1372) I 00000000 Padding3                                  : 0\n 0x0560 (1376) I 00000000 Padding3                                  : 0\n 0x0564 (1380) H     0000 Padding4                                  : 0\n 0x0566 (1382) H     0000 FoptimalDc                                : 0\n 0x0568 (1384) H     0000 FoptimalAc                                : 0\n 0x056a (1386) H     0000 Padding2                                  : 0\n 0x056c (1388) B       00 Padding                                   : 0\n 0x056d (1389) B       00 SnapToDiscrete                            : 0\n 0x056e (1390) B       02 NumDiscreteLevels                         : 2\n 0x056f (1391) B       00 CalculateFopt                             : 0\n 0x0570 (1392) f fed4483f m                                         : 0.7845\n 0x0574 (1396) f dbf93e3f b                                         : 0.746\n 0x0578 (1400) I 00000000 Padding3                                  : 0\n 0x057c (1404) I 00000000 Padding3                                  : 0\n 0x0580 (1408) I 00000000 Padding3                                  : 0\n 0x0584 (1412) H     0000 Padding4                                  : 0\n 0x0586 (1414) H     0000 FoptimalDc                                : 0\n 0x0588 (1416) H     0000 FoptimalAc                                : 0\n 0x058a (1418) H     0000 Padding2                                  : 0\n 0x058c (1420) B       00 Padding                                   : 0\n 0x058d (1421) B       00 SnapToDiscrete                            : 0\n 0x058e (1422) B       02 NumDiscreteLevels                         : 2\n 0x058f (1423) B       00 CalculateFopt                             : 0\n 0x0590 (1424) f 986ea23f m                                         : 1.269\n 0x0594 (1428) f 1283403e b                                         : 0.188\n 0x0598 (1432) I 00000000 Padding3                                  : 0\n 0x059c (1436) I 00000000 Padding3                                  : 0\n 0x05a0 (1440) I 00000000 Padding3                                  : 0\n 0x05a4 (1444) H     0000 Padding4                                  : 0\n 0x05a6 (1446) H     0000 FoptimalDc                                : 0\n 0x05a8 (1448) H     0000 FoptimalAc                                : 0\n 0x05aa (1450) H     0000 Padding2                                  : 0\n 0x05ac (1452) B       00 Padding                                   : 0\n 0x05ad (1453) B       00 SnapToDiscrete                            : 0\n 0x05ae (1454) B       02 NumDiscreteLevels                         : 2\n 0x05af (1455) B       00 CalculateFopt                             : 0\n 0x05b0 (1456) f f2d28d3f m                                         : 1.108\n 0x05b4 (1460) f 7b140e3f b                                         : 0.555\n 0x05b8 (1464) I 00000000 Padding3                                  : 0\n 0x05bc (1468) I 00000000 Padding3                                  : 0\n 0x05c0 (1472) I 00000000 Padding3                                  : 0\n 0x05c4 (1476) H     0000 Padding4                                  : 0\n 0x05c6 (1478) H     0000 FoptimalDc                                : 0\n 0x05c8 (1480) H     0000 FoptimalAc                                : 0\n 0x05ca (1482) H     0000 Padding2                                  : 0\n 0x05cc (1484) B       00 Padding                                   : 0\n 0x05cd (1485) B       00 SnapToDiscrete                            : 0\n 0x05ce (1486) B       02 NumDiscreteLevels                         : 2\n 0x05cf (1487) B       00 CalculateFopt                             : 0\n 0x05d0 (1488) f 986ea23f m                                         : 1.269\n 0x05d4 (1492) f 1283403e b                                         : 0.188\n 0x05d8 (1496) I 00000000 Padding3                                  : 0\n 0x05dc (1500) I 00000000 Padding3                                  : 0\n 0x05e0 (1504) I f401d007 Padding3                                  : 131072500\n 0x05e4 (1508) H     0000 Padding4                                  : 0\n 0x05e6 (1510) H     0000 FoptimalDc                                : 0\n 0x05e8 (1512) H     0000 FoptimalAc                                : 0\n 0x05ea (1514) H     0000 Padding2                                  : 0\n 0x05ec (1516) H     f401 FreqTableGfx                              : 500\n 0x05ee (1518) H     920c FreqTableGfx                              : 3218\n 0x05f0 (1520) H     0000 FreqTableGfx                              : 0\n 0x05f2 (1522) H     0000 FreqTableGfx                              : 0\n 0x05f4 (1524) H     0000 FreqTableGfx                              : 0\n 0x05f6 (1526) H     0000 FreqTableGfx                              : 0\n 0x05f8 (1528) H     0000 FreqTableGfx                              : 0\n 0x05fa (1530) H     0000 FreqTableGfx                              : 0\n 0x05fc (1532) H     0000 FreqTableGfx                              : 0\n 0x05fe (1534) H     0000 FreqTableGfx                              : 0\n 0x0600 (1536) H     0000 FreqTableGfx                              : 0\n 0x0602 (1538) H     0000 FreqTableGfx                              : 0\n 0x0604 (1540) H     0000 FreqTableGfx                              : 0\n 0x0606 (1542) H     0000 FreqTableGfx                              : 0\n 0x0608 (1544) H     0000 FreqTableGfx                              : 0\n 0x060a (1546) H     0000 FreqTableGfx                              : 0\n 0x060c (1548) H     0102 FreqTableVclk                             : 513\n 0x060e (1550) H     760b FreqTableVclk                             : 2934\n 0x0610 (1552) H     0000 FreqTableVclk                             : 0\n 0x0612 (1554) H     0000 FreqTableVclk                             : 0\n 0x0614 (1556) H     0000 FreqTableVclk                             : 0\n 0x0616 (1558) H     0000 FreqTableVclk                             : 0\n 0x0618 (1560) H     0000 FreqTableVclk                             : 0\n 0x061a (1562) H     0000 FreqTableVclk                             : 0\n 0x061c (1564) H     0102 FreqTableDclk                             : 513\n 0x061e (1566) H     9808 FreqTableDclk                             : 2200\n 0x0620 (1568) H     0000 FreqTableDclk                             : 0\n 0x0622 (1570) H     0000 FreqTableDclk                             : 0\n 0x0624 (1572) H     0000 FreqTableDclk                             : 0\n 0x0626 (1574) H     0000 FreqTableDclk                             : 0\n 0x0628 (1576) H     0000 FreqTableDclk                             : 0\n 0x062a (1578) H     0000 FreqTableDclk                             : 0\n 0x062c (1580) H     f401 FreqTableSocclk                           : 500\n 0x062e (1582) H     dc05 FreqTableSocclk                           : 1500\n 0x0630 (1584) H     6100 FreqTableSocclk                           : 97\n 0x0632 (1586) H     c901 FreqTableSocclk                           : 457\n 0x0634 (1588) H     ad02 FreqTableSocclk                           : 685\n 0x0636 (1590) H     e803 FreqTableSocclk                           : 1000\n 0x0638 (1592) H     0000 FreqTableSocclk                           : 0\n 0x063a (1594) H     0000 FreqTableSocclk                           : 0\n 0x063c (1596) H     6100 FreqTableUclk                             : 97\n 0x063e (1598) H     c901 FreqTableUclk                             : 457\n 0x0640 (1600) H     0503 FreqTableUclk                             : 773\n 0x0642 (1602) H     e204 FreqTableUclk                             : 1250\n 0x0644 (1604) H     9400 FreqTableDispclk                          : 148\n 0x0646 (1606) H     6608 FreqTableDispclk                          : 2150\n 0x0648 (1608) H     0000 FreqTableDispclk                          : 0\n 0x064a (1610) H     0000 FreqTableDispclk                          : 0\n 0x064c (1612) H     0000 FreqTableDispclk                          : 0\n 0x064e (1614) H     0000 FreqTableDispclk                          : 0\n 0x0650 (1616) H     0000 FreqTableDispclk                          : 0\n 0x0652 (1618) H     0000 FreqTableDispclk                          : 0\n 0x0654 (1620) H     9400 FreqTableDppClk                           : 148\n 0x0656 (1622) H     6608 FreqTableDppClk                           : 2150\n 0x0658 (1624) H     0000 FreqTableDppClk                           : 0\n 0x065a (1626) H     0000 FreqTableDppClk                           : 0\n 0x065c (1628) H     0000 FreqTableDppClk                           : 0\n 0x065e (1630) H     0000 FreqTableDppClk                           : 0\n 0x0660 (1632) H     0000 FreqTableDppClk                           : 0\n 0x0662 (1634) H     0000 FreqTableDppClk                           : 0\n 0x0664 (1636) H     cd02 FreqTableDprefclk                         : 717\n 0x0666 (1638) H     cd02 FreqTableDprefclk                         : 717\n 0x0668 (1640) H     0000 FreqTableDprefclk                         : 0\n 0x066a (1642) H     0000 FreqTableDprefclk                         : 0\n 0x066c (1644) H     0000 FreqTableDprefclk                         : 0\n 0x066e (1646) H     0000 FreqTableDprefclk                         : 0\n 0x0670 (1648) H     0000 FreqTableDprefclk                         : 0\n 0x0672 (1650) H     0000 FreqTableDprefclk                         : 0\n 0x0674 (1652) H     9400 FreqTableDcfclk                           : 148\n 0x0676 (1654) H     1c06 FreqTableDcfclk                           : 1564\n 0x0678 (1656) H     0000 FreqTableDcfclk                           : 0\n 0x067a (1658) H     0000 FreqTableDcfclk                           : 0\n 0x067c (1660) H     0000 FreqTableDcfclk                           : 0\n 0x067e (1662) H     0000 FreqTableDcfclk                           : 0\n 0x0680 (1664) H     0000 FreqTableDcfclk                           : 0\n 0x0682 (1666) H     0000 FreqTableDcfclk                           : 0\n 0x0684 (1668) H     9400 FreqTableDtbclk                           : 148\n 0x0686 (1670) H     1c06 FreqTableDtbclk                           : 1564\n 0x0688 (1672) H     0000 FreqTableDtbclk                           : 0\n 0x068a (1674) H     0000 FreqTableDtbclk                           : 0\n 0x068c (1676) H     0000 FreqTableDtbclk                           : 0\n 0x068e (1678) H     0000 FreqTableDtbclk                           : 0\n 0x0690 (1680) H     0000 FreqTableDtbclk                           : 0\n 0x0692 (1682) H     0000 FreqTableDtbclk                           : 0\n 0x0694 (1684) H     5802 FreqTableFclk                             : 600\n 0x0696 (1686) H     e803 FreqTableFclk                             : 1000\n 0x0698 (1688) H     b004 FreqTableFclk                             : 1200\n 0x069a (1690) H     4006 FreqTableFclk                             : 1600\n 0x069c (1692) H     d007 FreqTableFclk                             : 2000\n 0x069e (1694) H     9808 FreqTableFclk                             : 2200\n 0x06a0 (1696) H     ca08 FreqTableFclk                             : 2250\n 0x06a2 (1698) H     fc08 FreqTableFclk                             : 2300\n 0x06a4 (1700) I 920c0000 DcModeMaxFreq                             : 3218\n 0x06a8 (1704) I dc050000 DcModeMaxFreq                             : 1500\n 0x06ac (1708) I e2040000 DcModeMaxFreq                             : 1250\n 0x06b0 (1712) I fc080000 DcModeMaxFreq                             : 2300\n 0x06b4 (1716) I 98080000 DcModeMaxFreq                             : 2200\n 0x06b8 (1720) I 760b0000 DcModeMaxFreq                             : 2934\n 0x06bc (1724) I 98080000 DcModeMaxFreq                             : 2200\n 0x06c0 (1728) I 760b0000 DcModeMaxFreq                             : 2934\n 0x06c4 (1732) I 66080000 DcModeMaxFreq                             : 2150\n 0x06c8 (1736) I 66080000 DcModeMaxFreq                             : 2150\n 0x06cc (1740) I cd020000 DcModeMaxFreq                             : 717\n 0x06d0 (1744) I 1c060000 DcModeMaxFreq                             : 1564\n 0x06d4 (1748) I 1c060000 DcModeMaxFreq                             : 1564\n 0x06d8 (1752) H     f401 Mp0clkFreq                                : 500\n 0x06da (1754) H     bc02 Mp0clkFreq                                : 700\n 0x06dc (1756) H     f00a Mp0DpmVoltage                             : 2800\n 0x06de (1758) H     800c Mp0DpmVoltage                             : 3200\n 0x06e0 (1760) B       00 GfxclkSpare                               : 0\n 0x06e1 (1761) B       00 GfxclkSpare                               : 0\n 0x06e2 (1762) H     0000 GfxclkFreqCap                             : 0\n 0x06e4 (1764) H     2003 GfxclkFgfxoffEntry                        : 800\n 0x06e6 (1766) H     b004 GfxclkFgfxoffExitImu                      : 1200\n 0x06e8 (1768) H     2003 GfxclkFgfxoffExitRlc                      : 800\n 0x06ea (1770) H     fa00 GfxclkThrottleClock                       : 250\n 0x06ec (1772) B       01 EnableGfxPowerStagesGpio                  : 1\n 0x06ed (1773) B       00 GfxIdlePadding                            : 0\n 0x06ee (1774) B       01 SmsRepairWRCKClkDivEn                     : 1\n 0x06ef (1775) B       04 SmsRepairWRCKClkDivVal                    : 4\n 0x06f0 (1776) B       01 GfxOffEntryEarlyMGCGEn                    : 1\n 0x06f1 (1777) B       00 GfxOffEntryForceCGCGEn                    : 0\n 0x06f2 (1778) B       00 GfxOffEntryForceCGCGDelayEn               : 0\n 0x06f3 (1779) B       00 GfxOffEntryForceCGCGDelayVal              : 0\n 0x06f4 (1780) H     1405 GfxclkFreqGfxUlv                          : 1300\n 0x06f6 (1782) B       00 GfxIdlePadding2                           : 0\n 0x06f7 (1783) B       00 GfxIdlePadding2                           : 0\n 0x06f8 (1784) I 60ea0000 GfxOffEntryHysteresis                     : 60000\n 0x06fc (1788) I 00000000 GfxoffSpare                               : 0\n 0x0700 (1792) I 00000000 GfxoffSpare                               : 0\n 0x0704 (1796) I 00000000 GfxoffSpare                               : 0\n 0x0708 (1800) I 00000000 GfxoffSpare                               : 0\n 0x070c (1804) I 00000000 GfxoffSpare                               : 0\n 0x0710 (1808) I 00000000 GfxoffSpare                               : 0\n 0x0714 (1812) I 00000000 GfxoffSpare                               : 0\n 0x0718 (1816) I 00000000 GfxoffSpare                               : 0\n 0x071c (1820) I 00000000 GfxoffSpare                               : 0\n 0x0720 (1824) I 00000000 GfxoffSpare                               : 0\n 0x0724 (1828) I 00000000 GfxoffSpare                               : 0\n 0x0728 (1832) I 00000000 GfxoffSpare                               : 0\n 0x072c (1836) I 00000000 GfxoffSpare                               : 0\n 0x0730 (1840) I 00000000 GfxoffSpare                               : 0\n 0x0734 (1844) I 00000000 GfxoffSpare                               : 0\n 0x0738 (1848) f 0000803f DfllBtcMasterScalerM                      : 1\n 0x073c (1852) i 00000000 DfllBtcMasterScalerB                      : 0\n 0x0740 (1856) f cdcc8c3f DfllBtcSlaveScalerM                       : 1.1\n 0x0744 (1860) i 00000000 DfllBtcSlaveScalerB                       : 0\n 0x0748 (1864) I 64006400 DfllPccAsWaitCtrl                         : 6553700\n 0x074c (1868) I 2f841f00 DfllPccAsStepCtrl                         : 2065455\n 0x0750 (1872) I 713d8a3f GfxGpoSpare                               : 1066024305\n 0x0754 (1876) I 00000000 GfxGpoSpare                               : 0\n 0x0758 (1880) I 00000000 GfxGpoSpare                               : 0\n 0x075c (1884) I 00000000 GfxGpoSpare                               : 0\n 0x0760 (1888) I 00000000 GfxGpoSpare                               : 0\n 0x0764 (1892) I 00000000 GfxGpoSpare                               : 0\n 0x0768 (1896) I 00000000 GfxGpoSpare                               : 0\n 0x076c (1900) I 00000000 GfxGpoSpare                               : 0\n 0x0770 (1904) I 00000000 GfxGpoSpare                               : 0\n 0x0774 (1908) I 00000000 GfxGpoSpare                               : 0\n 0x0778 (1912) H     0000 DcsGfxOffVoltage                          : 0\n 0x077a (1914) H     0000 PaddingDcs                                : 0\n 0x077c (1916) H     0000 DcsMinGfxOffTime                          : 0\n 0x077e (1918) H     0000 DcsMaxGfxOffTime                          : 0\n 0x0780 (1920) I 00000000 DcsMinCreditAccum                         : 0\n 0x0784 (1924) H     0000 DcsExitHysteresis                         : 0\n 0x0786 (1926) H     0000 DcsTimeout                                : 0\n 0x0788 (1928) I 00000000 DcsSpare                                  : 0\n 0x078c (1932) I 00000000 DcsSpare                                  : 0\n 0x0790 (1936) I 00000000 DcsSpare                                  : 0\n 0x0794 (1940) I 00000000 DcsSpare                                  : 0\n 0x0798 (1944) I 00000000 DcsSpare                                  : 0\n 0x079c (1948) I 00000000 DcsSpare                                  : 0\n 0x07a0 (1952) I 00000000 DcsSpare                                  : 0\n 0x07a4 (1956) I 00000000 DcsSpare                                  : 0\n 0x07a8 (1960) I 00000000 DcsSpare                                  : 0\n 0x07ac (1964) I 00000000 DcsSpare                                  : 0\n 0x07b0 (1968) I 00000000 DcsSpare                                  : 0\n 0x07b4 (1972) I 00000000 DcsSpare                                  : 0\n 0x07b8 (1976) I 00000000 DcsSpare                                  : 0\n 0x07bc (1980) I 00000000 DcsSpare                                  : 0\n 0x07c0 (1984) H     6400 ShadowFreqTableUclk                       : 100\n 0x07c2 (1986) H     b601 ShadowFreqTableUclk                       : 438\n 0x07c4 (1988) H     db02 ShadowFreqTableUclk                       : 731\n 0x07c6 (1990) H     a304 ShadowFreqTableUclk                       : 1187\n 0x07c8 (1992) B       01 UseStrobeModeOptimizations                : 1\n 0x07c9 (1993) B       0a PaddingMem                                : 10\n 0x07ca (1994) B       f0 PaddingMem                                : 240\n 0x07cb (1995) B       0a PaddingMem                                : 10\n 0x07cc (1996) B       03 UclkDpmPstates                            : 3\n 0x07cd (1997) B       02 UclkDpmPstates                            : 2\n 0x07ce (1998) B       01 UclkDpmPstates                            : 1\n 0x07cf (1999) B       00 UclkDpmPstates                            : 0\n 0x07d0 (2000) B       00 FreqTableUclkDiv                          : 0\n 0x07d1 (2001) B       02 FreqTableUclkDiv                          : 2\n 0x07d2 (2002) B       03 FreqTableUclkDiv                          : 3\n 0x07d3 (2003) B       03 FreqTableUclkDiv                          : 3\n 0x07d4 (2004) H     8c0a MemVmempVoltage                           : 2700\n 0x07d6 (2006) H     f00a MemVmempVoltage                           : 2800\n 0x07d8 (2008) H     b80b MemVmempVoltage                           : 3000\n 0x07da (2010) H     800c MemVmempVoltage                           : 3200\n 0x07dc (2012) H     8813 MemVddioVoltage                           : 5000\n 0x07de (2014) H     1815 MemVddioVoltage                           : 5400\n 0x07e0 (2016) H     1815 MemVddioVoltage                           : 5400\n 0x07e2 (2018) H     1815 MemVddioVoltage                           : 5400\n 0x07e4 (2020) B       00 FclkDpmUPstates                           : 0\n 0x07e5 (2021) B       01 FclkDpmUPstates                           : 1\n 0x07e6 (2022) B       02 FclkDpmUPstates                           : 2\n 0x07e7 (2023) B       03 FclkDpmUPstates                           : 3\n 0x07e8 (2024) B       04 FclkDpmUPstates                           : 4\n 0x07e9 (2025) B       05 FclkDpmUPstates                           : 5\n 0x07ea (2026) B       06 FclkDpmUPstates                           : 6\n 0x07eb (2027) B       07 FclkDpmUPstates                           : 7\n 0x07ec (2028) H     b80b FclkDpmVddU                               : 3000\n 0x07ee (2030) H     b80b FclkDpmVddU                               : 3000\n 0x07f0 (2032) H     b80b FclkDpmVddU                               : 3000\n 0x07f2 (2034) H     b80b FclkDpmVddU                               : 3000\n 0x07f4 (2036) H     b80b FclkDpmVddU                               : 3000\n 0x07f6 (2038) H     480d FclkDpmVddU                               : 3400\n 0x07f8 (2040) H     480d FclkDpmVddU                               : 3400\n 0x07fa (2042) H     480d FclkDpmVddU                               : 3400\n 0x07fc (2044) H     6009 FclkDpmUSpeed                             : 2400\n 0x07fe (2046) H     a00f FclkDpmUSpeed                             : 4000\n 0x0800 (2048) H     c012 FclkDpmUSpeed                             : 4800\n 0x0802 (2050) H     0019 FclkDpmUSpeed                             : 6400\n 0x0804 (2052) H     401f FclkDpmUSpeed                             : 8000\n 0x0806 (2054) H     6022 FclkDpmUSpeed                             : 8800\n 0x0808 (2056) H     2823 FclkDpmUSpeed                             : 9000\n 0x080a (2058) H     f023 FclkDpmUSpeed                             : 9200\n 0x080c (2060) H     0000 FclkDpmDisallowPstateFreq                 : 0\n 0x080e (2062) H     0000 PaddingFclk                               : 0\n 0x0810 (2064) B       00 PcieGenSpeed                              : 0\n 0x0811 (2065) B       01 PcieGenSpeed                              : 1\n 0x0812 (2066) B       03 PcieGenSpeed                              : 3\n 0x0813 (2067) B       01 PcieLaneCount                             : 1\n 0x0814 (2068) B       03 PcieLaneCount                             : 3\n 0x0815 (2069) B       06 PcieLaneCount                             : 6\n 0x0816 (2070) H     4e00 LclkFreq                                  : 78\n 0x0818 (2072) H     9c00 LclkFreq                                  : 156\n 0x081a (2074) H     6f02 LclkFreq                                  : 623\n 0x081c (2076) H     0000 FanStopTemp                               : 0\n 0x081e (2078) H     3200 FanStopTemp                               : 50\n 0x0820 (2080) H     3200 FanStopTemp                               : 50\n 0x0822 (2082) H     3200 FanStopTemp                               : 50\n 0x0824 (2084) H     3c00 FanStopTemp                               : 60\n 0x0826 (2086) H     3200 FanStopTemp                               : 50\n 0x0828 (2088) H     3200 FanStopTemp                               : 50\n 0x082a (2090) H     3200 FanStopTemp                               : 50\n 0x082c (2092) H     3200 FanStopTemp                               : 50\n 0x082e (2094) H     3200 FanStopTemp                               : 50\n 0x0830 (2096) H     0000 FanStopTemp                               : 0\n 0x0832 (2098) H     0000 FanStopTemp                               : 0\n 0x0834 (2100) H     0000 FanStopTemp                               : 0\n 0x0836 (2102) H     0000 FanStartTemp                              : 0\n 0x0838 (2104) H     3c00 FanStartTemp                              : 60\n 0x083a (2106) H     3c00 FanStartTemp                              : 60\n 0x083c (2108) H     3c00 FanStartTemp                              : 60\n 0x083e (2110) H     4600 FanStartTemp                              : 70\n 0x0840 (2112) H     3c00 FanStartTemp                              : 60\n 0x0842 (2114) H     3c00 FanStartTemp                              : 60\n 0x0844 (2116) H     3c00 FanStartTemp                              : 60\n 0x0846 (2118) H     3c00 FanStartTemp                              : 60\n 0x0848 (2120) H     3c00 FanStartTemp                              : 60\n 0x084a (2122) H     0000 FanStartTemp                              : 0\n 0x084c (2124) H     0000 FanStartTemp                              : 0\n 0x084e (2126) H     0000 FanStartTemp                              : 0\n 0x0850 (2128) H     0000 FanGain                                   : 0\n 0x0852 (2130) H     9001 FanGain                                   : 400\n 0x0854 (2132) H     9001 FanGain                                   : 400\n 0x0856 (2134) H     9001 FanGain                                   : 400\n 0x0858 (2136) H     9001 FanGain                                   : 400\n 0x085a (2138) H     9001 FanGain                                   : 400\n 0x085c (2140) H     9001 FanGain                                   : 400\n 0x085e (2142) H     9001 FanGain                                   : 400\n 0x0860 (2144) H     9001 FanGain                                   : 400\n 0x0862 (2146) H     9001 FanGain                                   : 400\n 0x0864 (2148) H     0000 FanGain                                   : 0\n 0x0866 (2150) H     0000 FanGain                                   : 0\n 0x0868 (2152) H     0000 FanGain                                   : 0\n 0x086a (2154) H     2413 FanGainPadding                            : 4900\n 0x086c (2156) H     0f00 FanPwmMin                                 : 15\n 0x086e (2158) H     4006 AcousticTargetRpmThreshold                : 1600\n 0x0870 (2160) H     e40c AcousticLimitRpmThreshold                 : 3300\n 0x0872 (2162) H     e40c FanMaximumRpm                             : 3300\n 0x0874 (2164) H     b80b MGpuAcousticLimitRpmThreshold             : 3000\n 0x0876 (2166) H     f401 FanTargetGfxclk                           : 500\n 0x0878 (2168) I f2030000 TempInputSelectMask                       : 1010\n 0x087c (2172) B       01 FanZeroRpmEnable                          : 1\n 0x087d (2173) B       02 FanTachEdgePerRev                         : 2\n 0x087e (2174) H     0000 FanTargetTemperature                      : 0\n 0x0880 (2176) H     5200 FanTargetTemperature                      : 82\n 0x0882 (2178) H     5200 FanTargetTemperature                      : 82\n 0x0884 (2180) H     5200 FanTargetTemperature                      : 82\n 0x0886 (2182) H     5a00 FanTargetTemperature                      : 90\n 0x0888 (2184) H     6400 FanTargetTemperature                      : 100\n 0x088a (2186) H     6400 FanTargetTemperature                      : 100\n 0x088c (2188) H     6400 FanTargetTemperature                      : 100\n 0x088e (2190) H     6400 FanTargetTemperature                      : 100\n 0x0890 (2192) H     6400 FanTargetTemperature                      : 100\n 0x0892 (2194) H     0000 FanTargetTemperature                      : 0\n 0x0894 (2196) H     0000 FanTargetTemperature                      : 0\n 0x0896 (2198) H     0000 FanTargetTemperature                      : 0\n 0x0898 (2200) h     0000 FuzzyFan_ErrorSetDelta                    : 0\n 0x089a (2202) h     0000 FuzzyFan_ErrorRateSetDelta                : 0\n 0x089c (2204) h     0000 FuzzyFan_PwmSetDelta                      : 0\n 0x089e (2206) H     7d00 FuzzyFan_Reserved                         : 125\n 0x08a0 (2208) H     0000 FwCtfLimit                                : 0\n 0x08a2 (2210) H     7600 FwCtfLimit                                : 118\n 0x08a4 (2212) H     7600 FwCtfLimit                                : 118\n 0x08a6 (2214) H     7600 FwCtfLimit                                : 118\n 0x08a8 (2216) H     7100 FwCtfLimit                                : 113\n 0x08aa (2218) H     7d00 FwCtfLimit                                : 125\n 0x08ac (2220) H     7d00 FwCtfLimit                                : 125\n 0x08ae (2222) H     7d00 FwCtfLimit                                : 125\n 0x08b0 (2224) H     7d00 FwCtfLimit                                : 125\n 0x08b2 (2226) H     7d00 FwCtfLimit                                : 125\n 0x08b4 (2228) H     0000 FwCtfLimit                                : 0\n 0x08b6 (2230) H     0000 FwCtfLimit                                : 0\n 0x08b8 (2232) H     0000 FwCtfLimit                                : 0\n 0x08ba (2234) H     e803 IntakeTempEnableRPM                       : 1000\n 0x08bc (2236) h     c800 IntakeTempOffsetTemp                      : 200\n 0x08be (2238) H     2d00 IntakeTempReleaseTemp                     : 45\n 0x08c0 (2240) H     b80b IntakeTempHighIntakeAcousticLimit         : 3000\n 0x08c2 (2242) H     6400 IntakeTempAcouticLimitReleaseRate         : 100\n 0x08c4 (2244) h     ecff FanAbnormalTempLimitOffset                :-20\n 0x08c6 (2246) H     fa00 FanStalledTriggerRpm                      : 250\n 0x08c8 (2248) H     5500 FanAbnormalTriggerRpmCoeff                : 85\n 0x08ca (2250) H     0000 FanAbnormalDetectionEnable                : 0\n 0x08cc (2252) B       01 FanIntakeSensorSupport                    : 1\n 0x08cd (2253) B       00 FanIntakePadding                          : 0\n 0x08ce (2254) B       00 FanIntakePadding                          : 0\n 0x08cf (2255) B       00 FanIntakePadding                          : 0\n 0x08d0 (2256) I 00000000 FanSpare                                  : 0\n 0x08d4 (2260) I 00000000 FanSpare                                  : 0\n 0x08d8 (2264) I 00000000 FanSpare                                  : 0\n 0x08dc (2268) I 00000000 FanSpare                                  : 0\n 0x08e0 (2272) I 00000000 FanSpare                                  : 0\n 0x08e4 (2276) I 00000000 FanSpare                                  : 0\n 0x08e8 (2280) I 00000000 FanSpare                                  : 0\n 0x08ec (2284) I 00000000 FanSpare                                  : 0\n 0x08f0 (2288) I 00000000 FanSpare                                  : 0\n 0x08f4 (2292) I 00000000 FanSpare                                  : 0\n 0x08f8 (2296) I 00000000 FanSpare                                  : 0\n 0x08fc (2300) I 00000000 FanSpare                                  : 0\n 0x0900 (2304) I 00000000 FanSpare                                  : 0\n 0x0904 (2308) B       00 OverrideGfxAvfsFuses                      : 0\n 0x0905 (2309) B       00 GfxAvfsPadding                            : 0\n 0x0906 (2310) B       00 GfxAvfsPadding                            : 0\n 0x0907 (2311) B       00 GfxAvfsPadding                            : 0\n 0x0908 (2312) I 00000001 L2HwRtAvfsFuses                           : 16777216\n 0x090c (2316) I 00000001 L2HwRtAvfsFuses                           : 16777216\n 0x0910 (2320) I 00000001 L2HwRtAvfsFuses                           : 16777216\n 0x0914 (2324) I 00000001 L2HwRtAvfsFuses                           : 16777216\n 0x0918 (2328) I 00000001 L2HwRtAvfsFuses                           : 16777216\n 0x091c (2332) I 40050002 L2HwRtAvfsFuses                           : 33555776\n 0x0920 (2336) I 00100000 L2HwRtAvfsFuses                           : 4096\n 0x0924 (2340) I 40050002 L2HwRtAvfsFuses                           : 33555776\n 0x0928 (2344) I 00100000 L2HwRtAvfsFuses                           : 4096\n 0x092c (2348) I 40050002 L2HwRtAvfsFuses                           : 33555776\n 0x0930 (2352) I 00100000 L2HwRtAvfsFuses                           : 4096\n 0x0934 (2356) I 40050002 L2HwRtAvfsFuses                           : 33555776\n 0x0938 (2360) I 00100000 L2HwRtAvfsFuses                           : 4096\n 0x093c (2364) I 40050002 L2HwRtAvfsFuses                           : 33555776\n 0x0940 (2368) I 00100000 L2HwRtAvfsFuses                           : 4096\n 0x0944 (2372) I e7001301 L2HwRtAvfsFuses                           : 18022631\n 0x0948 (2376) I 34013101 L2HwRtAvfsFuses                           : 19988788\n 0x094c (2380) I 80015801 L2HwRtAvfsFuses                           : 22544768\n 0x0950 (2384) I cd018b01 L2HwRtAvfsFuses                           : 25887181\n 0x0954 (2388) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x0958 (2392) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x095c (2396) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x0960 (2400) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x0964 (2404) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x0968 (2408) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x096c (2412) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x0970 (2416) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x0974 (2420) I 00000000 L2HwRtAvfsFuses                           : 0\n 0x0978 (2424) I 10801080 L2HwRtAvfsFuses                           : 2148565008\n 0x097c (2428) I 10801080 L2HwRtAvfsFuses                           : 2148565008\n 0x0980 (2432) I 10800000 L2HwRtAvfsFuses                           : 32784\n 0x0984 (2436) I ffff0000 L2HwRtAvfsFuses                           : 65535\n 0x0988 (2440) I 00000001 SeHwRtAvfsFuses                           : 16777216\n 0x098c (2444) I 00000001 SeHwRtAvfsFuses                           : 16777216\n 0x0990 (2448) I 00000001 SeHwRtAvfsFuses                           : 16777216\n 0x0994 (2452) I 00000001 SeHwRtAvfsFuses                           : 16777216\n 0x0998 (2456) I 00000001 SeHwRtAvfsFuses                           : 16777216\n 0x099c (2460) I 40050002 SeHwRtAvfsFuses                           : 33555776\n 0x09a0 (2464) I 00100000 SeHwRtAvfsFuses                           : 4096\n 0x09a4 (2468) I 40050002 SeHwRtAvfsFuses                           : 33555776\n 0x09a8 (2472) I 00100000 SeHwRtAvfsFuses                           : 4096\n 0x09ac (2476) I 40050002 SeHwRtAvfsFuses                           : 33555776\n 0x09b0 (2480) I 00100000 SeHwRtAvfsFuses                           : 4096\n 0x09b4 (2484) I 40050002 SeHwRtAvfsFuses                           : 33555776\n 0x09b8 (2488) I 00100000 SeHwRtAvfsFuses                           : 4096\n 0x09bc (2492) I 40050002 SeHwRtAvfsFuses                           : 33555776\n 0x09c0 (2496) I 00100000 SeHwRtAvfsFuses                           : 4096\n 0x09c4 (2500) I e7001301 SeHwRtAvfsFuses                           : 18022631\n 0x09c8 (2504) I 34013101 SeHwRtAvfsFuses                           : 19988788\n 0x09cc (2508) I 80015801 SeHwRtAvfsFuses                           : 22544768\n 0x09d0 (2512) I cd018b01 SeHwRtAvfsFuses                           : 25887181\n 0x09d4 (2516) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09d8 (2520) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09dc (2524) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09e0 (2528) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09e4 (2532) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09e8 (2536) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09ec (2540) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09f0 (2544) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09f4 (2548) I 00000000 SeHwRtAvfsFuses                           : 0\n 0x09f8 (2552) I 10801080 SeHwRtAvfsFuses                           : 2148565008\n 0x09fc (2556) I 10801080 SeHwRtAvfsFuses                           : 2148565008\n 0x0a00 (2560) I 10800000 SeHwRtAvfsFuses                           : 32784\n 0x0a04 (2564) I ffff0000 SeHwRtAvfsFuses                           : 65535\n 0x0a08 (2568) I bc020000 CommonRtAvfs                              : 700\n 0x0a0c (2572) I bc020000 CommonRtAvfs                              : 700\n 0x0a10 (2576) I bc020000 CommonRtAvfs                              : 700\n 0x0a14 (2580) I bc020000 CommonRtAvfs                              : 700\n 0x0a18 (2584) I bc020000 CommonRtAvfs                              : 700\n 0x0a1c (2588) I bc020000 CommonRtAvfs                              : 700\n 0x0a20 (2592) I bc020000 CommonRtAvfs                              : 700\n 0x0a24 (2596) I bc020000 CommonRtAvfs                              : 700\n 0x0a28 (2600) I 00000000 CommonRtAvfs                              : 0\n 0x0a2c (2604) I aa020000 CommonRtAvfs                              : 682\n 0x0a30 (2608) I aa020000 CommonRtAvfs                              : 682\n 0x0a34 (2612) I aa020000 CommonRtAvfs                              : 682\n 0x0a38 (2616) I aa020000 CommonRtAvfs                              : 682\n 0x0a3c (2620) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a40 (2624) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a44 (2628) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a48 (2632) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a4c (2636) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a50 (2640) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a54 (2644) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a58 (2648) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a5c (2652) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a60 (2656) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a64 (2660) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a68 (2664) I 00000000 L2FwRtAvfsFuses                           : 0\n 0x0a6c (2668) I 32000000 L2FwRtAvfsFuses                           : 50\n 0x0a70 (2672) I b80b0000 L2FwRtAvfsFuses                           : 3000\n 0x0a74 (2676) I 02060000 L2FwRtAvfsFuses                           : 1538\n 0x0a78 (2680) I 02060000 L2FwRtAvfsFuses                           : 1538\n 0x0a7c (2684) I 02060000 L2FwRtAvfsFuses                           : 1538\n 0x0a80 (2688) I 02060000 L2FwRtAvfsFuses                           : 1538\n 0x0a84 (2692) I 02060000 L2FwRtAvfsFuses                           : 1538\n 0x0a88 (2696) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0a8c (2700) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0a90 (2704) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0a94 (2708) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0a98 (2712) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0a9c (2716) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0aa0 (2720) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0aa4 (2724) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0aa8 (2728) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0aac (2732) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0ab0 (2736) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0ab4 (2740) I 00000000 SeFwRtAvfsFuses                           : 0\n 0x0ab8 (2744) I 32000000 SeFwRtAvfsFuses                           : 50\n 0x0abc (2748) I b80b0000 SeFwRtAvfsFuses                           : 3000\n 0x0ac0 (2752) I 02060000 SeFwRtAvfsFuses                           : 1538\n 0x0ac4 (2756) I 02060000 SeFwRtAvfsFuses                           : 1538\n 0x0ac8 (2760) I 02060000 SeFwRtAvfsFuses                           : 1538\n 0x0acc (2764) I 02060000 SeFwRtAvfsFuses                           : 1538\n 0x0ad0 (2768) I 02060000 SeFwRtAvfsFuses                           : 1538\n 0x0ad4 (2772) f 00000000 Droop_PWL_F                               : 0\n 0x0ad8 (2776) f 00000040 Droop_PWL_F                               : 2\n 0x0adc (2780) f 00002040 Droop_PWL_F                               : 2.5\n 0x0ae0 (2784) f 00004040 Droop_PWL_F                               : 3\n 0x0ae4 (2788) f 00006040 Droop_PWL_F                               : 3.5\n 0x0ae8 (2792) f df32a73d Droop_PWL_a                               : 0.08164\n 0x0aec (2796) f df32a73d Droop_PWL_a                               : 0.08164\n 0x0af0 (2800) f df32a73d Droop_PWL_a                               : 0.08164\n 0x0af4 (2804) f df32a73d Droop_PWL_a                               : 0.08164\n 0x0af8 (2808) f df32a73d Droop_PWL_a                               : 0.08164\n 0x0afc (2812) f 1c42953d Droop_PWL_b                               : 0.07288\n 0x0b00 (2816) f 1c42953d Droop_PWL_b                               : 0.07288\n 0x0b04 (2820) f 7250c23d Droop_PWL_b                               : 0.09488\n 0x0b08 (2824) f 1c42953d Droop_PWL_b                               : 0.07288\n 0x0b0c (2828) f 1c42953d Droop_PWL_b                               : 0.07288\n 0x0b10 (2832) f 0d8ed2bd Droop_PWL_c                               :-0.10281\n 0x0b14 (2836) f 0d8ed2bd Droop_PWL_c                               :-0.10281\n 0x0b18 (2840) f a0e002be Droop_PWL_c                               :-0.12781\n 0x0b1c (2844) f f2ea1cbd Droop_PWL_c                               :-0.03831\n 0x0b20 (2848) f f2ea1cbd Droop_PWL_c                               :-0.03831\n 0x0b24 (2852) I 0ad7233c Static_PWL_Offset                         : 1008981770\n 0x0b28 (2856) I 0ad7233c Static_PWL_Offset                         : 1008981770\n 0x0b2c (2860) I 0ad7233c Static_PWL_Offset                         : 1008981770\n 0x0b30 (2864) I 0ad7233c Static_PWL_Offset                         : 1008981770\n 0x0b34 (2868) I 0ad7233c Static_PWL_Offset                         : 1008981770\n 0x0b38 (2872) I 00000000 GbV_dT_vmin                               : 0\n 0x0b3c (2876) I 00000000 GbV_dT_vmax                               : 0\n 0x0b40 (2880) I 58020000 V2F_vmin_range_low                        : 600\n 0x0b44 (2884) I bc020000 V2F_vmin_range_high                       : 700\n 0x0b48 (2888) I 4c040000 V2F_vmax_range_low                        : 1100\n 0x0b4c (2892) I b0040000 V2F_vmax_range_high                       : 1200\n 0x0b50 (2896) B       00 DcBtcEnabled                              : 0\n 0x0b51 (2897) B       00 Padding                                   : 0\n 0x0b52 (2898) B       00 Padding                                   : 0\n 0x0b53 (2899) B       00 Padding                                   : 0\n 0x0b54 (2900) H     1800 DcTol                                     : 24\n 0x0b56 (2902) H     0000 DcBtcGb                                   : 0\n 0x0b58 (2904) H     0000 DcBtcMin                                  : 0\n 0x0b5a (2906) H     0000 DcBtcMax                                  : 0\n 0x0b5c (2908) f 00000000 m                                         : 0\n 0x0b60 (2912) f 00000000 b                                         : 0\n 0x0b64 (2916) I 00000000 GfxAvfsSpare                              : 0\n 0x0b68 (2920) I 00000000 GfxAvfsSpare                              : 0\n 0x0b6c (2924) I 00000000 GfxAvfsSpare                              : 0\n 0x0b70 (2928) I 00000000 GfxAvfsSpare                              : 0\n 0x0b74 (2932) I 00000000 GfxAvfsSpare                              : 0\n 0x0b78 (2936) I 00000000 GfxAvfsSpare                              : 0\n 0x0b7c (2940) I 00000000 GfxAvfsSpare                              : 0\n 0x0b80 (2944) I 00000000 GfxAvfsSpare                              : 0\n 0x0b84 (2948) I 00000000 GfxAvfsSpare                              : 0\n 0x0b88 (2952) I 00000000 GfxAvfsSpare                              : 0\n 0x0b8c (2956) I 00000000 GfxAvfsSpare                              : 0\n 0x0b90 (2960) I 00000000 GfxAvfsSpare                              : 0\n 0x0b94 (2964) I 00000000 GfxAvfsSpare                              : 0\n 0x0b98 (2968) I 00000000 GfxAvfsSpare                              : 0\n 0x0b9c (2972) I 00000000 GfxAvfsSpare                              : 0\n 0x0ba0 (2976) I 00000000 GfxAvfsSpare                              : 0\n 0x0ba4 (2980) I 00000000 GfxAvfsSpare                              : 0\n 0x0ba8 (2984) I 00000000 GfxAvfsSpare                              : 0\n 0x0bac (2988) I 00000000 GfxAvfsSpare                              : 0\n 0x0bb0 (2992) I 00000000 GfxAvfsSpare                              : 0\n 0x0bb4 (2996) I 00000000 GfxAvfsSpare                              : 0\n 0x0bb8 (3000) I 00000000 GfxAvfsSpare                              : 0\n 0x0bbc (3004) I 00000000 GfxAvfsSpare                              : 0\n 0x0bc0 (3008) I 00000000 GfxAvfsSpare                              : 0\n 0x0bc4 (3012) I 00000000 GfxAvfsSpare                              : 0\n 0x0bc8 (3016) I 00000000 GfxAvfsSpare                              : 0\n 0x0bcc (3020) I 00000000 GfxAvfsSpare                              : 0\n 0x0bd0 (3024) I 00000000 GfxAvfsSpare                              : 0\n 0x0bd4 (3028) I 00000000 GfxAvfsSpare                              : 0\n 0x0bd8 (3032) I 00000000 GfxAvfsSpare                              : 0\n 0x0bdc (3036) I 00000000 GfxAvfsSpare                              : 0\n 0x0be0 (3040) I 00000000 GfxAvfsSpare                              : 0\n 0x0be4 (3044) B       00 OverrideSocAvfsFuses                      : 0\n 0x0be5 (3045) B       01 MinSocAvfsRevision                        : 1\n 0x0be6 (3046) B       00 SocAvfsPadding                            : 0\n 0x0be7 (3047) B       00 SocAvfsPadding                            : 0\n 0x0be8 (3048) H     0000 AvfsTemp                                  : 0\n 0x0bea (3050) H     5500 AvfsTemp                                  : 85\n 0x0bec (3052) H     2c01 VftFMin                                   : 300\n 0x0bee (3054) H     f00a VInversion                                : 2800\n 0x0bf0 (3056) f dcd7013d a                                         : 0.0317\n 0x0bf4 (3060) f 399c793d b                                         : 0.06094\n 0x0bf8 (3064) f 5e80ed3e c                                         : 0.46387\n 0x0bfc (3068) f d8b6283d a                                         : 0.04119\n 0x0c00 (3072) f e223623d b                                         : 0.05521\n 0x0c04 (3076) f a1dbdb3e c                                         : 0.42941\n 0x0c08 (3080) f 00000000 a                                         : 0\n 0x0c0c (3084) f 00000000 b                                         : 0\n 0x0c10 (3088) f a69b443d c                                         : 0.048\n 0x0c14 (3092) f 00000000 a                                         : 0\n 0x0c18 (3096) f 00000000 b                                         : 0\n 0x0c1c (3100) f 00000000 c                                         : 0\n 0x0c20 (3104) H     0000 AvfsTemp                                  : 0\n 0x0c22 (3106) H     5500 AvfsTemp                                  : 85\n 0x0c24 (3108) H     2c01 VftFMin                                   : 300\n 0x0c26 (3110) H     f00a VInversion                                : 2800\n 0x0c28 (3112) f dcd7013d a                                         : 0.0317\n 0x0c2c (3116) f 399c793d b                                         : 0.06094\n 0x0c30 (3120) f 5e80ed3e c                                         : 0.46387\n 0x0c34 (3124) f d8b6283d a                                         : 0.04119\n 0x0c38 (3128) f e223623d b                                         : 0.05521\n 0x0c3c (3132) f a1dbdb3e c                                         : 0.42941\n 0x0c40 (3136) f 00000000 a                                         : 0\n 0x0c44 (3140) f 00000000 b                                         : 0\n 0x0c48 (3144) f a69b443d c                                         : 0.048\n 0x0c4c (3148) f 00000000 a                                         : 0\n 0x0c50 (3152) f 00000000 b                                         : 0\n 0x0c54 (3156) f 00000000 c                                         : 0\n 0x0c58 (3160) H     0000 AvfsTemp                                  : 0\n 0x0c5a (3162) H     5500 AvfsTemp                                  : 85\n 0x0c5c (3164) H     2c01 VftFMin                                   : 300\n 0x0c5e (3166) H     f00a VInversion                                : 2800\n 0x0c60 (3168) f dcd7013d a                                         : 0.0317\n 0x0c64 (3172) f 399c793d b                                         : 0.06094\n 0x0c68 (3176) f 5e80ed3e c                                         : 0.46387\n 0x0c6c (3180) f d8b6283d a                                         : 0.04119\n 0x0c70 (3184) f e223623d b                                         : 0.05521\n 0x0c74 (3188) f a1dbdb3e c                                         : 0.42941\n 0x0c78 (3192) f 00000000 a                                         : 0\n 0x0c7c (3196) f 00000000 b                                         : 0\n 0x0c80 (3200) f a69b443d c                                         : 0.048\n 0x0c84 (3204) f 00000000 a                                         : 0\n 0x0c88 (3208) f 00000000 b                                         : 0\n 0x0c8c (3212) f 00000000 c                                         : 0\n 0x0c90 (3216) f 0000c03f a                                         : 1.5\n 0x0c94 (3220) f e4839ebd b                                         :-0.0774\n 0x0c98 (3224) f 9cc440bf c                                         :-0.753\n 0x0c9c (3228) f 0000c03f a                                         : 1.5\n 0x0ca0 (3232) f e4839ebd b                                         :-0.0774\n 0x0ca4 (3236) f 9cc440bf c                                         :-0.753\n 0x0ca8 (3240) f 0000c03f a                                         : 1.5\n 0x0cac (3244) f e4839ebd b                                         :-0.0774\n 0x0cb0 (3248) f 9cc440bf c                                         :-0.753\n 0x0cb4 (3252) f 00000000 m                                         : 0\n 0x0cb8 (3256) f 00000000 b                                         : 0\n 0x0cbc (3260) f 00000000 m                                         : 0\n 0x0cc0 (3264) f 00000000 b                                         : 0\n 0x0cc4 (3268) f 00000000 m                                         : 0\n 0x0cc8 (3272) f 00000000 b                                         : 0\n 0x0ccc (3276) f 00000000 a                                         : 0\n 0x0cd0 (3280) f 00000000 b                                         : 0\n 0x0cd4 (3284) f 00000000 c                                         : 0\n 0x0cd8 (3288) f 00000000 a                                         : 0\n 0x0cdc (3292) f 00000000 b                                         : 0\n 0x0ce0 (3296) f 00000000 c                                         : 0\n 0x0ce4 (3300) f 00000000 a                                         : 0\n 0x0ce8 (3304) f 00000000 b                                         : 0\n 0x0cec (3308) f 00000000 c                                         : 0\n 0x0cf0 (3312) B       01 DcBtcEnabled                              : 1\n 0x0cf1 (3313) B       00 Padding                                   : 0\n 0x0cf2 (3314) B       00 Padding                                   : 0\n 0x0cf3 (3315) B       00 Padding                                   : 0\n 0x0cf4 (3316) H     b400 DcTol                                     : 180\n 0x0cf6 (3318) H     1800 DcBtcGb                                   : 24\n 0x0cf8 (3320) H     0000 DcBtcMin                                  : 0\n 0x0cfa (3322) H     b400 DcBtcMax                                  : 180\n 0x0cfc (3324) f 00002040 m                                         : 2.5\n 0x0d00 (3328) f 00000000 b                                         : 0\n 0x0d04 (3332) B       01 DcBtcEnabled                              : 1\n 0x0d05 (3333) B       00 Padding                                   : 0\n 0x0d06 (3334) B       00 Padding                                   : 0\n 0x0d07 (3335) B       00 Padding                                   : 0\n 0x0d08 (3336) H     b400 DcTol                                     : 180\n 0x0d0a (3338) H     1800 DcBtcGb                                   : 24\n 0x0d0c (3340) H     0000 DcBtcMin                                  : 0\n 0x0d0e (3342) H     b400 DcBtcMax                                  : 180\n 0x0d10 (3344) f 00009040 m                                         : 4.5\n 0x0d14 (3348) f 00000000 b                                         : 0\n 0x0d18 (3352) B       00 DcBtcEnabled                              : 0\n 0x0d19 (3353) B       00 Padding                                   : 0\n 0x0d1a (3354) B       00 Padding                                   : 0\n 0x0d1b (3355) B       00 Padding                                   : 0\n 0x0d1c (3356) H     0000 DcTol                                     : 0\n 0x0d1e (3358) H     0000 DcBtcGb                                   : 0\n 0x0d20 (3360) H     0000 DcBtcMin                                  : 0\n 0x0d22 (3362) H     0000 DcBtcMax                                  : 0\n 0x0d24 (3364) f 00000000 m                                         : 0\n 0x0d28 (3368) f 00000000 b                                         : 0\n 0x0d2c (3372) I 00000000 SocAvfsSpare                              : 0\n 0x0d30 (3376) I 00000000 SocAvfsSpare                              : 0\n 0x0d34 (3380) I 00000000 SocAvfsSpare                              : 0\n 0x0d38 (3384) I 00000000 SocAvfsSpare                              : 0\n 0x0d3c (3388) I 00000000 SocAvfsSpare                              : 0\n 0x0d40 (3392) I 00000000 SocAvfsSpare                              : 0\n 0x0d44 (3396) I 00000000 SocAvfsSpare                              : 0\n 0x0d48 (3400) I 00000000 SocAvfsSpare                              : 0\n 0x0d4c (3404) I 00000000 SocAvfsSpare                              : 0\n 0x0d50 (3408) I 00000000 SocAvfsSpare                              : 0\n 0x0d54 (3412) I 00000000 SocAvfsSpare                              : 0\n 0x0d58 (3416) I 00000000 SocAvfsSpare                              : 0\n 0x0d5c (3420) I 00000000 SocAvfsSpare                              : 0\n 0x0d60 (3424) I 00000000 SocAvfsSpare                              : 0\n 0x0d64 (3428) I 00000000 SocAvfsSpare                              : 0\n 0x0d68 (3432) I 00000000 SocAvfsSpare                              : 0\n 0x0d6c (3436) I 00000000 SocAvfsSpare                              : 0\n 0x0d70 (3440) I 00000000 SocAvfsSpare                              : 0\n 0x0d74 (3444) I 00000000 SocAvfsSpare                              : 0\n 0x0d78 (3448) I 00000000 SocAvfsSpare                              : 0\n 0x0d7c (3452) I 00000000 SocAvfsSpare                              : 0\n 0x0d80 (3456) I 00000000 SocAvfsSpare                              : 0\n 0x0d84 (3460) I 00000000 SocAvfsSpare                              : 0\n 0x0d88 (3464) I 00000000 SocAvfsSpare                              : 0\n 0x0d8c (3468) I 00000000 SocAvfsSpare                              : 0\n 0x0d90 (3472) I 00000000 SocAvfsSpare                              : 0\n 0x0d94 (3476) I 00000000 SocAvfsSpare                              : 0\n 0x0d98 (3480) I 00000000 SocAvfsSpare                              : 0\n 0x0d9c (3484) I 00000000 SocAvfsSpare                              : 0\n 0x0da0 (3488) I 00000000 SocAvfsSpare                              : 0\n 0x0da4 (3492) I 00000000 SocAvfsSpare                              : 0\n 0x0da8 (3496) I 00000000 SocAvfsSpare                              : 0\n 0x0dac (3500) H     b004 InitGfxclk_bypass                         : 1200\n 0x0dae (3502) H     5802 InitSocclk                                : 600\n 0x0db0 (3504) H     d002 InitMp0clk                                : 720\n 0x0db2 (3506) H     f401 InitMpioclk                               : 500\n 0x0db4 (3508) H     f401 InitSmnclk                                : 500\n 0x0db6 (3510) H     e803 InitUcpclk                                : 1000\n 0x0db8 (3512) H     9001 InitCsrclk                                : 400\n 0x0dba (3514) H     cd02 InitDprefclk                              : 717\n 0x0dbc (3516) H     9602 InitDcfclk                                : 662\n 0x0dbe (3518) H     0000 InitDtbclk                                : 0\n 0x0dc0 (3520) H     0102 InitDclk                                  : 513\n 0x0dc2 (3522) H     0102 InitVclk                                  : 513\n 0x0dc4 (3524) H     a002 InitUsbdfsclk                             : 672\n 0x0dc6 (3526) H     fd01 InitMp1clk                                : 509\n 0x0dc8 (3528) H     6f02 InitLclk                                  : 623\n 0x0dca (3530) H     9001 InitBaco400clk_bypass                     : 400\n 0x0dcc (3532) H     b004 InitBaco1200clk_bypass                    : 1200\n 0x0dce (3534) H     bc02 InitBaco700clk_bypass                     : 700\n 0x0dd0 (3536) H     e803 InitFclk                                  : 1000\n 0x0dd2 (3538) H     0000 InitGfxclk_clkb                           : 0\n 0x0dd4 (3540) B       00 InitUclkDPMState                          : 0\n 0x0dd5 (3541) B       00 Padding                                   : 0\n 0x0dd6 (3542) B       00 Padding                                   : 0\n 0x0dd7 (3543) B       00 Padding                                   : 0\n 0x0dd8 (3544) I 94110000 InitVcoFreqPll0                           : 4500\n 0x0ddc (3548) I cc100000 InitVcoFreqPll1                           : 4300\n 0x0de0 (3552) I 00000000 InitVcoFreqPll2                           : 0\n 0x0de4 (3556) I 04100000 InitVcoFreqPll3                           : 4100\n 0x0de8 (3560) I a00f0000 InitVcoFreqPll4                           : 4000\n 0x0dec (3564) I 68100000 InitVcoFreqPll5                           : 4200\n 0x0df0 (3568) I 00000000 InitVcoFreqPll6                           : 0\n 0x0df4 (3572) H     0000 InitGfx                                   : 0\n 0x0df6 (3574) H     800c InitSoc                                   : 3200\n 0x0df8 (3576) H     480d InitU                                     : 3400\n 0x0dfa (3578) H     0000 Padding2                                  : 0\n 0x0dfc (3580) I 00000000 Spare                                     : 0\n 0x0e00 (3584) I 00000000 Spare                                     : 0\n 0x0e04 (3588) I 00000000 Spare                                     : 0\n 0x0e08 (3592) I 00000000 Spare                                     : 0\n 0x0e0c (3596) I 00000000 Spare                                     : 0\n 0x0e10 (3600) I 00000000 Spare                                     : 0\n 0x0e14 (3604) I 00000000 Spare                                     : 0\n 0x0e18 (3608) I 00000000 Spare                                     : 0\n 0x0e1c (3612) H     1b08 BaseClockAc                               : 2075\n 0x0e1e (3614) H     d309 GameClockAc                               : 2515\n 0x0e20 (3616) H     390a BoostClockAc                              : 2617\n 0x0e22 (3618) H     0000 BaseClockDc                               : 0\n 0x0e24 (3620) H     0000 GameClockDc                               : 0\n 0x0e26 (3622) H     0000 BoostClockDc                              : 0\n 0x0e28 (3624) I 00000000 Reserved                                  : 0\n 0x0e2c (3628) I 00000000 Reserved                                  : 0\n 0x0e30 (3632) I 00000000 Reserved                                  : 0\n 0x0e34 (3636) I 00000000 Reserved                                  : 0\n 0x0e38 (3640) H     5e01 Power                                     : 350\n 0x0e3a (3642) H     0000 Power                                     : 0\n 0x0e3c (3644) H     b004 Power                                     : 1200\n 0x0e3e (3646) H     0000 Power                                     : 0\n 0x0e40 (3648) H     0000 Power                                     : 0\n 0x0e42 (3650) H     0000 Power                                     : 0\n 0x0e44 (3652) H     0000 Power                                     : 0\n 0x0e46 (3654) H     0000 Power                                     : 0\n 0x0e48 (3656) H     c001 Tdc                                       : 448\n 0x0e4a (3658) H     5200 Tdc                                       : 82\n 0x0e4c (3660) H     5600 Tdc                                       : 86\n 0x0e4e (3662) H     6400 Temperature                               : 100\n 0x0e50 (3664) H     6e00 Temperature                               : 110\n 0x0e52 (3666) H     6e00 Temperature                               : 110\n 0x0e54 (3668) H     6e00 Temperature                               : 110\n 0x0e56 (3670) H     6e00 Temperature                               : 110\n 0x0e58 (3672) H     7300 Temperature                               : 115\n 0x0e5a (3674) H     7300 Temperature                               : 115\n 0x0e5c (3676) H     7300 Temperature                               : 115\n 0x0e5e (3678) H     7300 Temperature                               : 115\n 0x0e60 (3680) H     7300 Temperature                               : 115\n 0x0e62 (3682) H     0000 Temperature                               : 0\n 0x0e64 (3684) H     0000 Temperature                               : 0\n 0x0e66 (3686) H     0000 Temperature                               : 0\n 0x0e68 (3688) B       00 PwmLimitMin                               : 0\n 0x0e69 (3689) B       ff PwmLimitMax                               : 255\n 0x0e6a (3690) B       6e FanTargetTemperature                      : 110\n 0x0e6b (3691) B       00 Spare1                                    : 0\n 0x0e6c (3692) H     f401 AcousticTargetRpmThresholdMin             : 500\n 0x0e6e (3694) H     7017 AcousticTargetRpmThresholdMax             : 6000\n 0x0e70 (3696) H     f401 AcousticLimitRpmThresholdMin              : 500\n 0x0e72 (3698) H     7017 AcousticLimitRpmThresholdMax              : 6000\n 0x0e74 (3700) H     0000 PccLimitMin                               : 0\n 0x0e76 (3702) H     c201 PccLimitMax                               : 450\n 0x0e78 (3704) H     1900 FanStopTempMin                            : 25\n 0x0e7a (3706) H     6400 FanStopTempMax                            : 100\n 0x0e7c (3708) H     1900 FanStartTempMin                           : 25\n 0x0e7e (3710) H     6400 FanStartTempMax                           : 100\n 0x0e80 (3712) H     0000 PowerMinPpt0                              : 0\n 0x0e82 (3714) H     0000 PowerMinPpt0                              : 0\n 0x0e84 (3716) I 00000000 Spare                                     : 0\n 0x0e88 (3720) I 00000000 Spare                                     : 0\n 0x0e8c (3724) I 00000000 Spare                                     : 0\n 0x0e90 (3728) I 00000000 Spare                                     : 0\n 0x0e94 (3732) I 00000000 Spare                                     : 0\n 0x0e98 (3736) I 00000000 Spare                                     : 0\n 0x0e9c (3740) I 00000000 Spare                                     : 0\n 0x0ea0 (3744) I 00000000 Spare                                     : 0\n 0x0ea4 (3748) I 00000000 Spare                                     : 0\n 0x0ea8 (3752) I 00000000 Spare                                     : 0\n 0x0eac (3756) I 00000000 Spare                                     : 0\n 0x0eb0 (3760) I cd070000 FeatureCtrlMask                           : 1997\n 0x0eb4 (3764) h     3efe VoltageOffsetPerZoneBoundary              :-450\n 0x0eb6 (3766) H     0000 Reserved1                                 : 0\n 0x0eb8 (3768) H     0000 Reserved2                                 : 0\n 0x0eba (3770) h     f401 GfxclkFmin                                : 500\n 0x0ebc (3772) h     f401 GfxclkFmax                                : 500\n 0x0ebe (3774) H     6100 UclkFmin                                  : 97\n 0x0ec0 (3776) H     6100 UclkFmax                                  : 97\n 0x0ec2 (3778) h     f6ff Ppt                                       :-10\n 0x0ec4 (3780) h     f6ff Tdc                                       :-10\n 0x0ec6 (3782) B       0f FanLinearPwmPoints                        : 15\n 0x0ec7 (3783) B       19 FanLinearTempPoints                       : 25\n 0x0ec8 (3784) H     0f00 FanMinimumPwm                             : 15\n 0x0eca (3786) H     f401 AcousticTargetRpmThreshold                : 500\n 0x0ecc (3788) H     f401 AcousticLimitRpmThreshold                 : 500\n 0x0ece (3790) H     1900 FanTargetTemperature                      : 25\n 0x0ed0 (3792) B       00 FanZeroRpmEnable                          : 0\n 0x0ed1 (3793) B       19 FanZeroRpmStopTemp                        : 25\n 0x0ed2 (3794) B       00 FanMode                                   : 0\n 0x0ed3 (3795) B       32 MaxOpTemp                                 : 50\n 0x0ed4 (3796) B       00 Padding                                   : 0\n 0x0ed5 (3797) B       00 Padding                                   : 0\n 0x0ed6 (3798) B       00 Padding                                   : 0\n 0x0ed7 (3799) B       00 Padding                                   : 0\n 0x0ed8 (3800) I 00000000 Spare                                     : 0\n 0x0edc (3804) I 00000000 Spare                                     : 0\n 0x0ee0 (3808) I 00000000 Spare                                     : 0\n 0x0ee4 (3812) I 00000000 Spare                                     : 0\n 0x0ee8 (3816) I 00000000 Spare                                     : 0\n 0x0eec (3820) I 00000000 Spare                                     : 0\n 0x0ef0 (3824) I 00000000 Spare                                     : 0\n 0x0ef4 (3828) I 00000000 Spare                                     : 0\n 0x0ef8 (3832) I 00000000 Spare                                     : 0\n 0x0efc (3836) I 00000000 Spare                                     : 0\n 0x0f00 (3840) I 00000000 Spare                                     : 0\n 0x0f04 (3844) I 00000000 Spare                                     : 0\n 0x0f08 (3848) I cd070000 FeatureCtrlMask                           : 1997\n 0x0f0c (3852) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x0f0e (3854) H     0000 Reserved1                                 : 0\n 0x0f10 (3856) H     0000 Reserved2                                 : 0\n 0x0f12 (3858) h     8813 GfxclkFmin                                : 5000\n 0x0f14 (3860) h     8813 GfxclkFmax                                : 5000\n 0x0f16 (3862) H     dc05 UclkFmin                                  : 1500\n 0x0f18 (3864) H     dc05 UclkFmax                                  : 1500\n 0x0f1a (3866) h     0f00 Ppt                                       : 15\n 0x0f1c (3868) h     0000 Tdc                                       : 0\n 0x0f1e (3870) B       64 FanLinearPwmPoints                        : 100\n 0x0f1f (3871) B       64 FanLinearTempPoints                       : 100\n 0x0f20 (3872) H     6400 FanMinimumPwm                             : 100\n 0x0f22 (3874) H     e40c AcousticTargetRpmThreshold                : 3300\n 0x0f24 (3876) H     e40c AcousticLimitRpmThreshold                 : 3300\n 0x0f26 (3878) H     6900 FanTargetTemperature                      : 105\n 0x0f28 (3880) B       01 FanZeroRpmEnable                          : 1\n 0x0f29 (3881) B       64 FanZeroRpmStopTemp                        : 100\n 0x0f2a (3882) B       01 FanMode                                   : 1\n 0x0f2b (3883) B       6e MaxOpTemp                                 : 110\n 0x0f2c (3884) B       00 Padding                                   : 0\n 0x0f2d (3885) B       00 Padding                                   : 0\n 0x0f2e (3886) B       00 Padding                                   : 0\n 0x0f2f (3887) B       00 Padding                                   : 0\n 0x0f30 (3888) I 00000000 Spare                                     : 0\n 0x0f34 (3892) I 00000000 Spare                                     : 0\n 0x0f38 (3896) I 00000000 Spare                                     : 0\n 0x0f3c (3900) I 00000000 Spare                                     : 0\n 0x0f40 (3904) I 00000000 Spare                                     : 0\n 0x0f44 (3908) I 00000000 Spare                                     : 0\n 0x0f48 (3912) I 00000000 Spare                                     : 0\n 0x0f4c (3916) I 00000000 Spare                                     : 0\n 0x0f50 (3920) I b0045802 Spare                                     : 39322800\n 0x0f54 (3924) I d002f401 Spare                                     : 32768720\n 0x0f58 (3928) I f401e803 Spare                                     : 65536500\n 0x0f5c (3932) I 9001bc02 Spare                                     : 45875600\n 0x0f60 (3936) I 00000000 FeatureCtrlMask                           : 0\n 0x0f64 (3940) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x0f66 (3942) H     0000 Reserved1                                 : 0\n 0x0f68 (3944) H     0000 Reserved2                                 : 0\n 0x0f6a (3946) h     0000 GfxclkFmin                                : 0\n 0x0f6c (3948) h     0000 GfxclkFmax                                : 0\n 0x0f6e (3950) H     0000 UclkFmin                                  : 0\n 0x0f70 (3952) H     0000 UclkFmax                                  : 0\n 0x0f72 (3954) h     0000 Ppt                                       : 0\n 0x0f74 (3956) h     0000 Tdc                                       : 0\n 0x0f76 (3958) B       00 FanLinearPwmPoints                        : 0\n 0x0f77 (3959) B       00 FanLinearTempPoints                       : 0\n 0x0f78 (3960) H     0000 FanMinimumPwm                             : 0\n 0x0f7a (3962) H     0000 AcousticTargetRpmThreshold                : 0\n 0x0f7c (3964) H     0000 AcousticLimitRpmThreshold                 : 0\n 0x0f7e (3966) H     0000 FanTargetTemperature                      : 0\n 0x0f80 (3968) B       00 FanZeroRpmEnable                          : 0\n 0x0f81 (3969) B       00 FanZeroRpmStopTemp                        : 0\n 0x0f82 (3970) B       00 FanMode                                   : 0\n 0x0f83 (3971) B       00 MaxOpTemp                                 : 0\n 0x0f84 (3972) B       00 Padding                                   : 0\n 0x0f85 (3973) B       00 Padding                                   : 0\n 0x0f86 (3974) B       00 Padding                                   : 0\n 0x0f87 (3975) B       00 Padding                                   : 0\n 0x0f88 (3976) I 00000000 Spare                                     : 0\n 0x0f8c (3980) I 00000000 Spare                                     : 0\n 0x0f90 (3984) I 68100000 Spare                                     : 4200\n 0x0f94 (3988) I 00000000 Spare                                     : 0\n 0x0f98 (3992) I 0000bc02 Spare                                     : 45875200\n 0x0f9c (3996) I ee020000 Spare                                     : 750\n 0x0fa0 (4000) I 00000000 Spare                                     : 0\n 0x0fa4 (4004) I 00000000 Spare                                     : 0\n 0x0fa8 (4008) I 00000000 Spare                                     : 0\n 0x0fac (4012) I 00000000 Spare                                     : 0\n 0x0fb0 (4016) I 00000000 Spare                                     : 0\n 0x0fb4 (4020) I 00000000 Spare                                     : 0\n 0x0fb8 (4024) I 00000000 DebugOverrides                            : 0\n 0x0fbc (4028) B       01 TotalBoardPowerSupport                    : 1\n 0x0fbd (4029) B       00 TotalBoardPowerPadding                    : 0\n 0x0fbe (4030) B       00 TotalBoardPowerPadding                    : 0\n 0x0fbf (4031) B       00 TotalBoardPowerPadding                    : 0\n 0x0fc0 (4032) h     6d03 TotalIdleBoardPowerM                      : 877\n 0x0fc2 (4034) h     0000 TotalIdleBoardPowerB                      : 0\n 0x0fc4 (4036) h     9b04 TotalBoardPowerM                          : 1179\n 0x0fc6 (4038) h     b30f TotalBoardPowerB                          : 4019\n 0x0fc8 (4040) f 8f368ebd a                                         :-0.06944\n 0x0fcc (4044) f 54553c42 b                                         : 47.0833\n 0x0fd0 (4048) f 007daac5 c                                         :-5455.62\n 0x0fd4 (4052) f 00000000 a                                         : 0\n 0x0fd8 (4056) f 00000000 b                                         : 0\n 0x0fdc (4060) f 00000000 c                                         : 0\n 0x0fe0 (4064) f 3ecbf3bb a                                         :-0.00744\n 0x0fe4 (4068) f 52550a41 b                                         : 8.64583\n 0x0fe8 (4072) f 4af22f42 c                                         : 43.9866\n 0x0fec (4076) f 00000000 a                                         : 0\n 0x0ff0 (4080) f 00000000 b                                         : 0\n 0x0ff4 (4084) f 00000000 c                                         : 0\n 0x0ff8 (4088) f f7af2c3d a                                         : 0.04216\n 0x0ffc (4092) f a92ab6c1 b                                         :-22.7708\n 0x1000 (4096) f 9b98ad45 c                                         : 5555.08\n 0x1004 (4100) f 00000000 a                                         : 0\n 0x1008 (4104) f 00000000 b                                         : 0\n 0x100c (4108) f 00000000 c                                         : 0\n 0x1010 (4112) I 00000000 Spare                                     : 0\n 0x1014 (4116) I 00000000 Spare                                     : 0\n 0x1018 (4120) I 00000000 Spare                                     : 0\n 0x101c (4124) I 00000000 Spare                                     : 0\n 0x1020 (4128) I 00000000 Spare                                     : 0\n 0x1024 (4132) I 00000000 Spare                                     : 0\n 0x1028 (4136) I 00000000 Spare                                     : 0\n 0x102c (4140) I 00000000 Spare                                     : 0\n 0x1030 (4144) I 00000000 Spare                                     : 0\n 0x1034 (4148) I 00000000 Spare                                     : 0\n 0x1038 (4152) I 00000000 Spare                                     : 0\n 0x103c (4156) I 00000000 Spare                                     : 0\n 0x1040 (4160) I 00000000 Spare                                     : 0\n 0x1044 (4164) I 00000000 Spare                                     : 0\n 0x1048 (4168) I 00000000 Spare                                     : 0\n 0x104c (4172) I 00000000 Spare                                     : 0\n 0x1050 (4176) I 00000000 Spare                                     : 0\n 0x1054 (4180) I 00000000 Spare                                     : 0\n 0x1058 (4184) I 00000000 Spare                                     : 0\n 0x105c (4188) I 00000000 Spare                                     : 0\n 0x1060 (4192) I 00000000 Spare                                     : 0\n 0x1064 (4196) I 00000000 Spare                                     : 0\n 0x1068 (4200) I 00000000 Spare                                     : 0\n 0x106c (4204) I 00000000 Spare                                     : 0\n 0x1070 (4208) I 00000000 Spare                                     : 0\n 0x1074 (4212) I 00000000 Spare                                     : 0\n 0x1078 (4216) I 00000000 Spare                                     : 0\n 0x107c (4220) I 00000000 Spare                                     : 0\n 0x1080 (4224) I 00000000 Spare                                     : 0\n 0x1084 (4228) I 00000000 Spare                                     : 0\n 0x1088 (4232) I 00000000 Spare                                     : 0\n 0x108c (4236) I 00000000 Spare                                     : 0\n 0x1090 (4240) I 00000000 Spare                                     : 0\n 0x1094 (4244) I 00000000 Spare                                     : 0\n 0x1098 (4248) I 00000000 Spare                                     : 0\n 0x109c (4252) I 00000000 Spare                                     : 0\n 0x10a0 (4256) I 00000000 Spare                                     : 0\n 0x10a4 (4260) I 00000000 Spare                                     : 0\n 0x10a8 (4264) I 00000000 Spare                                     : 0\n 0x10ac (4268) I 00000000 Spare                                     : 0\n 0x10b0 (4272) I 00000000 Spare                                     : 0\n 0x10b4 (4276) I 00000000 Spare                                     : 0\n 0x10b8 (4280) I 00000000 Spare                                     : 0\n 0x10bc (4284) I 00000000 MmHubPadding                              : 0\n 0x10c0 (4288) I 00000000 MmHubPadding                              : 0\n 0x10c4 (4292) I 00000000 MmHubPadding                              : 0\n 0x10c8 (4296) I 00000000 MmHubPadding                              : 0\n 0x10cc (4300) I 00000000 MmHubPadding                              : 0\n 0x10d0 (4304) I 00000000 MmHubPadding                              : 0\n 0x10d4 (4308) I 00000000 MmHubPadding                              : 0\n 0x10d8 (4312) I 00000000 MmHubPadding                              : 0\n 0x10dc (4316) I 26000000 Version                                   : 38\n 0x10e0 (4320) B       00 Enabled                                   : 0\n 0x10e1 (4321) B       00 Speed                                     : 0\n 0x10e2 (4322) B       00 SlaveAddress                              : 0\n 0x10e3 (4323) B       00 ControllerPort                            : 0\n 0x10e4 (4324) B       00 ControllerName                            : 0\n 0x10e5 (4325) B       00 ThermalThrotter                           : 0\n 0x10e6 (4326) B       00 I2cProtocol                               : 0\n 0x10e7 (4327) B       00 PaddingConfig                             : 0\n 0x10e8 (4328) B       00 Enabled                                   : 0\n 0x10e9 (4329) B       00 Speed                                     : 0\n 0x10ea (4330) B       00 SlaveAddress                              : 0\n 0x10eb (4331) B       00 ControllerPort                            : 0\n 0x10ec (4332) B       00 ControllerName                            : 0\n 0x10ed (4333) B       00 ThermalThrotter                           : 0\n 0x10ee (4334) B       00 I2cProtocol                               : 0\n 0x10ef (4335) B       00 PaddingConfig                             : 0\n 0x10f0 (4336) B       00 Enabled                                   : 0\n 0x10f1 (4337) B       00 Speed                                     : 0\n 0x10f2 (4338) B       00 SlaveAddress                              : 0\n 0x10f3 (4339) B       00 ControllerPort                            : 0\n 0x10f4 (4340) B       00 ControllerName                            : 0\n 0x10f5 (4341) B       00 ThermalThrotter                           : 0\n 0x10f6 (4342) B       00 I2cProtocol                               : 0\n 0x10f7 (4343) B       00 PaddingConfig                             : 0\n 0x10f8 (4344) B       00 Enabled                                   : 0\n 0x10f9 (4345) B       00 Speed                                     : 0\n 0x10fa (4346) B       00 SlaveAddress                              : 0\n 0x10fb (4347) B       00 ControllerPort                            : 0\n 0x10fc (4348) B       00 ControllerName                            : 0\n 0x10fd (4349) B       00 ThermalThrotter                           : 0\n 0x10fe (4350) B       00 I2cProtocol                               : 0\n 0x10ff (4351) B       00 PaddingConfig                             : 0\n 0x1100 (4352) B       00 Enabled                                   : 0\n 0x1101 (4353) B       00 Speed                                     : 0\n 0x1102 (4354) B       00 SlaveAddress                              : 0\n 0x1103 (4355) B       00 ControllerPort                            : 0\n 0x1104 (4356) B       00 ControllerName                            : 0\n 0x1105 (4357) B       00 ThermalThrotter                           : 0\n 0x1106 (4358) B       00 I2cProtocol                               : 0\n 0x1107 (4359) B       00 PaddingConfig                             : 0\n 0x1108 (4360) B       00 Enabled                                   : 0\n 0x1109 (4361) B       00 Speed                                     : 0\n 0x110a (4362) B       00 SlaveAddress                              : 0\n 0x110b (4363) B       00 ControllerPort                            : 0\n 0x110c (4364) B       00 ControllerName                            : 0\n 0x110d (4365) B       00 ThermalThrotter                           : 0\n 0x110e (4366) B       00 I2cProtocol                               : 0\n 0x110f (4367) B       00 PaddingConfig                             : 0\n 0x1110 (4368) B       00 Enabled                                   : 0\n 0x1111 (4369) B       00 Speed                                     : 0\n 0x1112 (4370) B       00 SlaveAddress                              : 0\n 0x1113 (4371) B       00 ControllerPort                            : 0\n 0x1114 (4372) B       00 ControllerName                            : 0\n 0x1115 (4373) B       00 ThermalThrotter                           : 0\n 0x1116 (4374) B       00 I2cProtocol                               : 0\n 0x1117 (4375) B       00 PaddingConfig                             : 0\n 0x1118 (4376) B       00 Enabled                                   : 0\n 0x1119 (4377) B       00 Speed                                     : 0\n 0x111a (4378) B       00 SlaveAddress                              : 0\n 0x111b (4379) B       00 ControllerPort                            : 0\n 0x111c (4380) B       00 ControllerName                            : 0\n 0x111d (4381) B       00 ThermalThrotter                           : 0\n 0x111e (4382) B       00 I2cProtocol                               : 0\n 0x111f (4383) B       00 PaddingConfig                             : 0\n 0x1120 (4384) B       00 VddGfxVrMapping                           : 0\n 0x1121 (4385) B       00 VddSocVrMapping                           : 0\n 0x1122 (4386) B       00 VddMem0VrMapping                          : 0\n 0x1123 (4387) B       00 VddMem1VrMapping                          : 0\n 0x1124 (4388) B       00 GfxUlvPhaseSheddingMask                   : 0\n 0x1125 (4389) B       00 SocUlvPhaseSheddingMask                   : 0\n 0x1126 (4390) B       00 VmempUlvPhaseSheddingMask                 : 0\n 0x1127 (4391) B       00 VddioUlvPhaseSheddingMask                 : 0\n 0x1128 (4392) B       00 SlaveAddrMapping                          : 0\n 0x1129 (4393) B       00 SlaveAddrMapping                          : 0\n 0x112a (4394) B       00 SlaveAddrMapping                          : 0\n 0x112b (4395) B       00 SlaveAddrMapping                          : 0\n 0x112c (4396) B       00 SlaveAddrMapping                          : 0\n 0x112d (4397) B       00 VrPsiSupport                              : 0\n 0x112e (4398) B       00 VrPsiSupport                              : 0\n 0x112f (4399) B       00 VrPsiSupport                              : 0\n 0x1130 (4400) B       01 VrPsiSupport                              : 1\n 0x1131 (4401) B       00 VrPsiSupport                              : 0\n 0x1132 (4402) B       00 PaddingPsi                                : 0\n 0x1133 (4403) B       00 PaddingPsi                                : 0\n 0x1134 (4404) B       00 PaddingPsi                                : 0\n 0x1135 (4405) B       00 PaddingPsi                                : 0\n 0x1136 (4406) B       00 PaddingPsi                                : 0\n 0x1137 (4407) B       00 EnablePsi6                                : 0\n 0x1138 (4408) B       00 EnablePsi6                                : 0\n 0x1139 (4409) B       00 EnablePsi6                                : 0\n 0x113a (4410) B       00 EnablePsi6                                : 0\n 0x113b (4411) B       00 EnablePsi6                                : 0\n 0x113c (4412) b       00 Offset                                    : 0\n 0x113d (4413) B       00 Padding                                   : 0\n 0x113e (4414) H     0000 MaxCurrent                                : 0\n 0x1140 (4416) b       00 Offset                                    : 0\n 0x1141 (4417) B       00 Padding                                   : 0\n 0x1142 (4418) H     0000 MaxCurrent                                : 0\n 0x1144 (4420) b       00 Offset                                    : 0\n 0x1145 (4421) B       00 Padding                                   : 0\n 0x1146 (4422) H     0000 MaxCurrent                                : 0\n 0x1148 (4424) b       00 Offset                                    : 0\n 0x1149 (4425) B       00 Padding                                   : 0\n 0x114a (4426) H     0000 MaxCurrent                                : 0\n 0x114c (4428) b       00 Offset                                    : 0\n 0x114d (4429) B       00 Padding                                   : 0\n 0x114e (4430) H     0000 MaxCurrent                                : 0\n 0x1150 (4432) I 00000000 VoltageTelemetryRatio                     : 0\n 0x1154 (4436) I 00000000 VoltageTelemetryRatio                     : 0\n 0x1158 (4440) I 00000000 VoltageTelemetryRatio                     : 0\n 0x115c (4444) I 00000000 VoltageTelemetryRatio                     : 0\n 0x1160 (4448) I 00000000 VoltageTelemetryRatio                     : 0\n 0x1164 (4452) B       00 DownSlewRateVr                            : 0\n 0x1165 (4453) B       00 DownSlewRateVr                            : 0\n 0x1166 (4454) B       00 DownSlewRateVr                            : 0\n 0x1167 (4455) B       00 DownSlewRateVr                            : 0\n 0x1168 (4456) B       00 DownSlewRateVr                            : 0\n 0x1169 (4457) B       00 LedOffGpio                                : 0\n 0x116a (4458) B       00 FanOffGpio                                : 0\n 0x116b (4459) B       00 GfxVrPowerStageOffGpio                    : 0\n 0x116c (4460) B       00 AcDcGpio                                  : 0\n 0x116d (4461) B       00 AcDcPolarity                              : 0\n 0x116e (4462) B       00 VR0HotGpio                                : 0\n 0x116f (4463) B       00 VR0HotPolarity                            : 0\n 0x1170 (4464) B       00 GthrGpio                                  : 0\n 0x1171 (4465) B       00 GthrPolarity                              : 0\n 0x1172 (4466) B       00 LedPin0                                   : 0\n 0x1173 (4467) B       00 LedPin1                                   : 0\n 0x1174 (4468) B       00 LedPin2                                   : 0\n 0x1175 (4469) B       00 LedEnableMask                             : 0\n 0x1176 (4470) B       00 LedPcie                                   : 0\n 0x1177 (4471) B       00 LedError                                  : 0\n 0x1178 (4472) B       00 UclkTrainingModeSpreadPercent             : 0\n 0x1179 (4473) B       00 UclkSpreadPadding                         : 0\n 0x117a (4474) H     0000 UclkSpreadFreq                            : 0\n 0x117c (4476) B       00 UclkSpreadPercent                         : 0\n 0x117d (4477) B       00 UclkSpreadPercent                         : 0\n 0x117e (4478) B       00 UclkSpreadPercent                         : 0\n 0x117f (4479) B       00 UclkSpreadPercent                         : 0\n 0x1180 (4480) B       00 UclkSpreadPercent                         : 0\n 0x1181 (4481) B       00 UclkSpreadPercent                         : 0\n 0x1182 (4482) B       00 UclkSpreadPercent                         : 0\n 0x1183 (4483) B       00 UclkSpreadPercent                         : 0\n 0x1184 (4484) B       00 UclkSpreadPercent                         : 0\n 0x1185 (4485) B       00 UclkSpreadPercent                         : 0\n 0x1186 (4486) B       00 UclkSpreadPercent                         : 0\n 0x1187 (4487) B       00 UclkSpreadPercent                         : 0\n 0x1188 (4488) B       00 UclkSpreadPercent                         : 0\n 0x1189 (4489) B       00 UclkSpreadPercent                         : 0\n 0x118a (4490) B       00 UclkSpreadPercent                         : 0\n 0x118b (4491) B       00 UclkSpreadPercent                         : 0\n 0x118c (4492) B       00 FclkSpreadPadding                         : 0\n 0x118d (4493) B       00 FclkSpreadPercent                         : 0\n 0x118e (4494) H     0000 FclkSpreadFreq                            : 0\n 0x1190 (4496) B       00 DramWidth                                 : 0\n 0x1191 (4497) B       00 PaddingMem1                               : 0\n 0x1192 (4498) B       00 PaddingMem1                               : 0\n 0x1193 (4499) B       00 PaddingMem1                               : 0\n 0x1194 (4500) B       00 PaddingMem1                               : 0\n 0x1195 (4501) B       00 PaddingMem1                               : 0\n 0x1196 (4502) B       00 PaddingMem1                               : 0\n 0x1197 (4503) B       00 PaddingMem1                               : 0\n 0x1198 (4504) B       00 HsrEnabled                                : 0\n 0x1199 (4505) B       00 VddqOffEnabled                            : 0\n 0x119a (4506) B       00 PaddingUmcFlags                           : 0\n 0x119b (4507) B       00 PaddingUmcFlags                           : 0\n 0x119c (4508) I 00000000 PostVoltageSetBacoDelay                   : 0\n 0x11a0 (4512) I 00000000 BacoEntryDelay                            : 0\n 0x11a4 (4516) B       00 FuseWritePowerMuxPresent                  : 0\n 0x11a5 (4517) B       00 FuseWritePadding                          : 0\n 0x11a6 (4518) B       00 FuseWritePadding                          : 0\n 0x11a7 (4519) B       00 FuseWritePadding                          : 0\n 0x11a8 (4520) I 00000000 BoardSpare                                : 0\n 0x11ac (4524) I 00000000 BoardSpare                                : 0\n 0x11b0 (4528) I 00000000 BoardSpare                                : 0\n 0x11b4 (4532) I 00000000 BoardSpare                                : 0\n 0x11b8 (4536) I 00000000 BoardSpare                                : 0\n 0x11bc (4540) I 00000000 BoardSpare                                : 0\n 0x11c0 (4544) I 00000000 BoardSpare                                : 0\n 0x11c4 (4548) I 00000000 BoardSpare                                : 0\n 0x11c8 (4552) I 00000000 BoardSpare                                : 0\n 0x11cc (4556) I 00000000 BoardSpare                                : 0\n 0x11d0 (4560) I 00000000 BoardSpare                                : 0\n 0x11d4 (4564) I 00000000 BoardSpare                                : 0\n 0x11d8 (4568) I 00000000 BoardSpare                                : 0\n 0x11dc (4572) I 00000000 BoardSpare                                : 0\n 0x11e0 (4576) I 00000000 BoardSpare                                : 0\n 0x11e4 (4580) I 00000000 BoardSpare                                : 0\n 0x11e8 (4584) I 00000000 BoardSpare                                : 0\n 0x11ec (4588) I 00000000 BoardSpare                                : 0\n 0x11f0 (4592) I 00000000 BoardSpare                                : 0\n 0x11f4 (4596) I 00000000 BoardSpare                                : 0\n 0x11f8 (4600) I 00000000 BoardSpare                                : 0\n 0x11fc (4604) I 00000000 BoardSpare                                : 0\n 0x1200 (4608) I 00000000 BoardSpare                                : 0\n 0x1204 (4612) I 00000000 BoardSpare                                : 0\n 0x1208 (4616) I 00000000 BoardSpare                                : 0\n 0x120c (4620) I 00000000 BoardSpare                                : 0\n 0x1210 (4624) I 00000000 BoardSpare                                : 0\n 0x1214 (4628) I 00000000 BoardSpare                                : 0\n 0x1218 (4632) I 00000000 BoardSpare                                : 0\n 0x121c (4636) I 00000000 BoardSpare                                : 0\n 0x1220 (4640) I 00000000 BoardSpare                                : 0\n 0x1224 (4644) I 00000000 BoardSpare                                : 0\n 0x1228 (4648) I 00000000 BoardSpare                                : 0\n 0x122c (4652) I 00000000 BoardSpare                                : 0\n 0x1230 (4656) I 00000000 BoardSpare                                : 0\n 0x1234 (4660) I 00000000 BoardSpare                                : 0\n 0x1238 (4664) I 00000000 BoardSpare                                : 0\n 0x123c (4668) I 00000000 BoardSpare                                : 0\n 0x1240 (4672) I 00000000 BoardSpare                                : 0\n 0x1244 (4676) I 00000000 BoardSpare                                : 0\n 0x1248 (4680) I 00000000 BoardSpare                                : 0\n 0x124c (4684) I 00000000 BoardSpare                                : 0\n 0x1250 (4688) I 00000000 BoardSpare                                : 0\n 0x1254 (4692) I 00000000 BoardSpare                                : 0\n 0x1258 (4696) I 00000000 BoardSpare                                : 0\n 0x125c (4700) I 00000000 BoardSpare                                : 0\n 0x1260 (4704) I 00000000 BoardSpare                                : 0\n 0x1264 (4708) I 00000000 BoardSpare                                : 0\n 0x1268 (4712) I 00000000 BoardSpare                                : 0\n 0x126c (4716) I 00000000 BoardSpare                                : 0\n 0x1270 (4720) I 00000000 BoardSpare                                : 0\n 0x1274 (4724) I 00000000 BoardSpare                                : 0\n 0x1278 (4728) I 00000000 BoardSpare                                : 0\n 0x127c (4732) I 00000000 BoardSpare                                : 0\n 0x1280 (4736) I 00000000 BoardSpare                                : 0\n 0x1284 (4740) I 00000000 BoardSpare                                : 0\n 0x1288 (4744) I 00000000 BoardSpare                                : 0\n 0x128c (4748) I 00000000 BoardSpare                                : 0\n 0x1290 (4752) I 00000000 BoardSpare                                : 0\n 0x1294 (4756) I 00000000 BoardSpare                                : 0\n 0x1298 (4760) I 00000000 BoardSpare                                : 0\n 0x129c (4764) I 00000000 BoardSpare                                : 0\n 0x12a0 (4768) I 00000000 BoardSpare                                : 0\n 0x12a4 (4772) I 00000000 MmHubPadding                              : 0\n 0x12a8 (4776) I 00000000 MmHubPadding                              : 0\n 0x12ac (4780) I 00000000 MmHubPadding                              : 0\n 0x12b0 (4784) I 00000000 MmHubPadding                              : 0\n 0x12b4 (4788) I 00000000 MmHubPadding                              : 0\n 0x12b8 (4792) I 00000000 MmHubPadding                              : 0\n 0x12bc (4796) I 00000000 MmHubPadding                              : 0\n 0x12c0 (4800) I 00000000 MmHubPadding                              : 0\n"
  },
  {
    "path": "test/AMD.RXVega64.8176.170719.rom.dump",
    "content": "sHeader:\n  structuresize: 694\n  format_revision: 8\n  content_revision: 1\nTableRevision: 0\nTableSize: 92\nGoldenPPID: 1761\nGoldenRevision: 11246\nFormatID: 27\nPlatformCaps: 72\nMaxODEngineClock: 240000\nMaxODMemoryClock: 150000\nPowerControlLimit: 50\nUlvVoltageOffset: 8\nUlvSmnclkDid: 0\nUlvMp1clkDid: 0\nUlvGfxclkBypass: 0\nGfxclkSlewRate: 0\nGfxVoltageMode: 0\nSocVoltageMode: 0\nUclkVoltageMode: 0\nUvdVoltageMode: 0\nVceVoltageMode: 0\nMp0VoltageMode: 2\nDcefVoltageMode: 1\nStateArray:\n  RevId: 2\n  NumEntries: 2\n  states:\n    states 0:\n      SocClockIndexHigh: 0\n      SocClockIndexLow: 0\n      GfxClockIndexHigh: 0\n      GfxClockIndexLow: 0\n      MemClockIndexHigh: 0\n      MemClockIndexLow: 0\n      Classification: 8\n      CapsAndSettings: 0\n      Classification2: 0\n    states 1:\n      SocClockIndexHigh: 5\n      SocClockIndexLow: 0\n      GfxClockIndexHigh: 7\n      GfxClockIndexLow: 0\n      MemClockIndexHigh: 3\n      MemClockIndexLow: 0\n      Classification: 5\n      CapsAndSettings: 0\n      Classification2: 0\nFanTable:\n  RevId: 11\n  FanOutputSensitivity: 4836\n  FanAcousticLimitRpm: 2400\n  ThrottlingRPM: 2400\n  TargetTemperature: 75\n  MinimumPWMLimit: 10\n  TargetGfxClk: 852\n  FanGainEdge: 400\n  FanGainHotspot: 400\n  FanGainLiquid: 400\n  FanGainVrVddc: 400\n  FanGainVrMvdd: 400\n  FanGainPlx: 400\n  FanGainHbm: 400\n  EnableZeroRPM: 0\n  FanStopTemperature: 0\n  FanStartTemperature: 0\n  FanParameters: 2\n  FanMinRPM: 4\n  FanMaxRPM: 49\nThermalController:\n  RevId: 1\n  Type: 24\n  I2cLine: 0\n  I2cAddress: 0\n  FanParameters: 0\n  FanMinRPM: 0\n  FanMaxRPM: 0\n  Flags: 0\nSocclkDependencyTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      Clk: 60000\n      VddInd: 0\n    entries 1:\n      Clk: 72000\n      VddInd: 1\n    entries 2:\n      Clk: 80000\n      VddInd: 2\n    entries 3:\n      Clk: 84700\n      VddInd: 3\n    entries 4:\n      Clk: 90000\n      VddInd: 4\n    entries 5:\n      Clk: 96000\n      VddInd: 5\n    entries 6:\n      Clk: 102800\n      VddInd: 6\n    entries 7:\n      Clk: 110700\n      VddInd: 7\nMclkDependencyTable:\n  RevId: 1\n  NumEntries: 4\n  entries:\n    entries 0:\n      MemClk: 16700\n      VddInd: 0\n      VddMemInd: 0\n      VddciInd: 0\n    entries 1:\n      MemClk: 50000\n      VddInd: 0\n      VddMemInd: 0\n      VddciInd: 0\n    entries 2:\n      MemClk: 80000\n      VddInd: 2\n      VddMemInd: 0\n      VddciInd: 0\n    entries 3:\n      MemClk: 94500\n      VddInd: 4\n      VddMemInd: 0\n      VddciInd: 0\nGfxclkDependencyTable:\n  RevId: 1\n  NumEntries: 8\n  entries:\n    entries 0:\n      Clk: 85200\n      VddInd: 0\n      CKSVOffsetandDisable: 32768\n      AVFSOffset: 0\n      ACGEnable: 0\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    entries 1:\n      Clk: 99100\n      VddInd: 1\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n      ACGEnable: 0\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    entries 2:\n      Clk: 108400\n      VddInd: 2\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n      ACGEnable: 0\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    entries 3:\n      Clk: 113800\n      VddInd: 3\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n      ACGEnable: 0\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    entries 4:\n      Clk: 120000\n      VddInd: 4\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n      ACGEnable: 0\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    entries 5:\n      Clk: 140100\n      VddInd: 5\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n      ACGEnable: 1\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    entries 6:\n      Clk: 153600\n      VddInd: 6\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n      ACGEnable: 1\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    entries 7:\n      Clk: 163000\n      VddInd: 7\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n      ACGEnable: 1\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\nDcefclkDependencyTable:\n  RevId: 0\n  NumEntries: 5\n  entries:\n    entries 0:\n      Clk: 60000\n      VddInd: 0\n    entries 1:\n      Clk: 72000\n      VddInd: 0\n    entries 2:\n      Clk: 80000\n      VddInd: 0\n    entries 3:\n      Clk: 84700\n      VddInd: 0\n    entries 4:\n      Clk: 90000\n      VddInd: 0\nVddcLookupTable:\n  RevId: 1\n  NumEntries: 8\n  entries:\n    entries 0:\n      Vdd: 800\n    entries 1:\n      Vdd: 900\n    entries 2:\n      Vdd: 950\n    entries 3:\n      Vdd: 1000\n    entries 4:\n      Vdd: 1050\n    entries 5:\n      Vdd: 1100\n    entries 6:\n      Vdd: 1150\n    entries 7:\n      Vdd: 1200\nVddmemLookupTable:\n  RevId: 1\n  NumEntries: 1\n  entries:\n    entries 0:\n      Vdd: 1350\nMMDependencyTable:\n  RevId: 1\n  NumEntries: 8\n  entries:\n    entries 0:\n      VddcInd: 0\n      DClk: 34200\n      VClk: 46400\n      EClk: 60000\n      PSPClk: 50000\n    entries 1:\n      VddcInd: 1\n      DClk: 48000\n      VClk: 60000\n      EClk: 68500\n      PSPClk: 50000\n    entries 2:\n      VddcInd: 2\n      DClk: 57600\n      VClk: 68500\n      EClk: 72000\n      PSPClk: 50000\n    entries 3:\n      VddcInd: 3\n      DClk: 65400\n      VClk: 72000\n      EClk: 75400\n      PSPClk: 50000\n    entries 4:\n      VddcInd: 4\n      DClk: 72000\n      VClk: 80000\n      EClk: 80000\n      PSPClk: 50000\n    entries 5:\n      VddcInd: 5\n      DClk: 80000\n      VClk: 84700\n      EClk: 84700\n      PSPClk: 50000\n    entries 6:\n      VddcInd: 6\n      DClk: 96000\n      VClk: 96000\n      EClk: 90000\n      PSPClk: 50000\n    entries 7:\n      VddcInd: 7\n      DClk: 102800\n      VClk: 102800\n      EClk: 96000\n      PSPClk: 50000\nVCEStateTable: UNUSED\nReserve: 0\nPowerTuneTable:\n  RevId: 7\n  SocketPowerLimit: 220\n  BatteryPowerLimit: 220\n  SmallPowerLimit: 220\n  TdcLimit: 300\n  EdcLimit: 0\n  SoftwareShutdownTemp: 89\n  TemperatureLimitHotSpot: 105\n  TemperatureLimitLiquid1: 74\n  TemperatureLimitLiquid2: 74\n  TemperatureLimitHBM: 95\n  TemperatureLimitVrSoc: 115\n  TemperatureLimitVrMem: 115\n  TemperatureLimitPlx: 100\n  LoadLineResistance: 64\n  Liquid1_I2C_address: 144\n  Liquid2_I2C_address: 146\n  Liquid_I2C_Line: 151\n  Vr_I2C_address: 96\n  Vr_I2C_Line: 150\n  Plx_I2C_address: 0\n  Plx_I2C_Line: 144\n  TemperatureLimitTedge: 85\n  BoostStartTemperature: 0\n  BoostStopTemperature: 0\n  BoostClock: 0\n  Reserved:\n    Reserved 0: 0\n    Reserved 1: 0\nHardLimitTable: UNUSED\nVddciLookupTable:\n  RevId: 1\n  NumEntries: 1\n  entries:\n    entries 0:\n      Vdd: 900\nPCIETable:\n  RevId: 2\n  NumEntries: 2\n  entries:\n    entries 0:\n      LCLK: 12500\n      PCIEGenSpeed: 2\n      PCIELaneWidth: 16\n    entries 1:\n      LCLK: 60000\n      PCIEGenSpeed: 2\n      PCIELaneWidth: 16\nPixclkDependencyTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      Clk: 14700\n      VddInd: 0\n    entries 1:\n      Clk: 24100\n      VddInd: 1\n    entries 2:\n      Clk: 34300\n      VddInd: 2\n    entries 3:\n      Clk: 48300\n      VddInd: 3\n    entries 4:\n      Clk: 53300\n      VddInd: 4\n    entries 5:\n      Clk: 93800\n      VddInd: 5\n    entries 6:\n      Clk: 104200\n      VddInd: 6\n    entries 7:\n      Clk: 107500\n      VddInd: 7\nDispClkDependencyTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      Clk: 28200\n      VddInd: 0\n    entries 1:\n      Clk: 51500\n      VddInd: 1\n    entries 2:\n      Clk: 68600\n      VddInd: 2\n    entries 3:\n      Clk: 80000\n      VddInd: 3\n    entries 4:\n      Clk: 90000\n      VddInd: 4\n    entries 5:\n      Clk: 102900\n      VddInd: 5\n    entries 6:\n      Clk: 110800\n      VddInd: 6\n    entries 7:\n      Clk: 120000\n      VddInd: 7\nPhyClkDependencyTable:\n  RevId: 0\n  NumEntries: 1\n  entries:\n    entries 0:\n      Clk: 81000\n      VddInd: 0\n"
  },
  {
    "path": "test/AMD.RXVega64.8176.170719.rom.rawdump",
    "content": "PowerPlay table rev 8.1 size 694 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     b602 structuresize                             : 694\n 0x0002 (0002) B       08 format_revision                           : 8\n 0x0003 (0003) B       01 content_revision                          : 1\n 0x0004 (0004) B       00 TableRevision                             : 0\n 0x0005 (0005) H     5c00 TableSize                                 : 92\n 0x0007 (0007) I e1060000 GoldenPPID                                : 1761\n 0x000b (0011) I ee2b0000 GoldenRevision                            : 11246\n 0x000f (0015) H     1b00 FormatID                                  : 27\n 0x0011 (0017) I 48000000 PlatformCaps                              : 72\n 0x0015 (0021) I 80a90300 MaxODEngineClock                          : 240000\n 0x0019 (0025) I f0490200 MaxODMemoryClock                          : 150000\n 0x001d (0029) H     3200 PowerControlLimit                         : 50\n 0x001f (0031) H     0800 UlvVoltageOffset                          : 8\n 0x0021 (0033) H     0000 UlvSmnclkDid                              : 0\n 0x0023 (0035) H     0000 UlvMp1clkDid                              : 0\n 0x0025 (0037) H     0000 UlvGfxclkBypass                           : 0\n 0x0027 (0039) H     0000 GfxclkSlewRate                            : 0\n 0x0029 (0041) B       00 GfxVoltageMode                            : 0\n 0x002a (0042) B       00 SocVoltageMode                            : 0\n 0x002b (0043) B       00 UclkVoltageMode                           : 0\n 0x002c (0044) B       00 UvdVoltageMode                            : 0\n 0x002d (0045) B       00 VceVoltageMode                            : 0\n 0x002e (0046) B       02 Mp0VoltageMode                            : 2\n 0x002f (0047) B       01 DcefVoltageMode                           : 1\n 0x0030 (0048) H     5c00 StateArrayOffset                          : 92\n 0x005c (0092) B       02 RevId                                     : 2\n 0x005d (0093) B       02 NumEntries                                : 2\n 0x005e (0094) B       00 SocClockIndexHigh                         : 0\n 0x005f (0095) B       00 SocClockIndexLow                          : 0\n 0x0060 (0096) B       00 GfxClockIndexHigh                         : 0\n 0x0061 (0097) B       00 GfxClockIndexLow                          : 0\n 0x0062 (0098) B       00 MemClockIndexHigh                         : 0\n 0x0063 (0099) B       00 MemClockIndexLow                          : 0\n 0x0064 (0100) H     0800 Classification                            : 8\n 0x0066 (0102) I 00000000 CapsAndSettings                           : 0\n 0x006a (0106) H     0000 Classification2                           : 0\n 0x006c (0108) B       05 SocClockIndexHigh                         : 5\n 0x006d (0109) B       00 SocClockIndexLow                          : 0\n 0x006e (0110) B       07 GfxClockIndexHigh                         : 7\n 0x006f (0111) B       00 GfxClockIndexLow                          : 0\n 0x0070 (0112) B       03 MemClockIndexHigh                         : 3\n 0x0071 (0113) B       00 MemClockIndexLow                          : 0\n 0x0072 (0114) H     0500 Classification                            : 5\n 0x0074 (0116) I 00000000 CapsAndSettings                           : 0\n 0x0078 (0120) H     0000 Classification2                           : 0\n 0x0032 (0050) H     4f02 FanTableOffset                            : 591\n 0x024f (0591) B       0b RevId                                     : 11\n 0x0250 (0592) H     e412 FanOutputSensitivity                      : 4836\n 0x0252 (0594) H     6009 FanAcousticLimitRpm                       : 2400\n 0x0254 (0596) H     6009 ThrottlingRPM                             : 2400\n 0x0256 (0598) H     4b00 TargetTemperature                         : 75\n 0x0258 (0600) H     0a00 MinimumPWMLimit                           : 10\n 0x025a (0602) H     5403 TargetGfxClk                              : 852\n 0x025c (0604) H     9001 FanGainEdge                               : 400\n 0x025e (0606) H     9001 FanGainHotspot                            : 400\n 0x0260 (0608) H     9001 FanGainLiquid                             : 400\n 0x0262 (0610) H     9001 FanGainVrVddc                             : 400\n 0x0264 (0612) H     9001 FanGainVrMvdd                             : 400\n 0x0266 (0614) H     9001 FanGainPlx                                : 400\n 0x0268 (0616) H     9001 FanGainHbm                                : 400\n 0x026a (0618) B       00 EnableZeroRPM                             : 0\n 0x026b (0619) H     0000 FanStopTemperature                        : 0\n 0x026d (0621) H     0000 FanStartTemperature                       : 0\n 0x026f (0623) B       02 FanParameters                             : 2\n 0x0270 (0624) B       04 FanMinRPM                                 : 4\n 0x0271 (0625) B       31 FanMaxRPM                                 : 49\n 0x0034 (0052) H     4602 ThermalControllerOffset                   : 582\n 0x0246 (0582) B       01 RevId                                     : 1\n 0x0247 (0583) B       18 Type                                      : 24\n 0x0248 (0584) B       00 I2cLine                                   : 0\n 0x0249 (0585) B       00 I2cAddress                                : 0\n 0x024a (0586) B       00 FanParameters                             : 0\n 0x024b (0587) B       00 FanMinRPM                                 : 0\n 0x024c (0588) B       00 FanMaxRPM                                 : 0\n 0x024d (0589) B       00 Flags                                     : 0\n 0x0036 (0054) H     9400 SocclkDependencyTableOffset               : 148\n 0x0094 (0148) B       00 RevId                                     : 0\n 0x0095 (0149) B       08 NumEntries                                : 8\n 0x0096 (0150) I 60ea0000 Clk                                       : 60000\n 0x009a (0154) B       00 VddInd                                    : 0\n 0x009b (0155) I 40190100 Clk                                       : 72000\n 0x009f (0159) B       01 VddInd                                    : 1\n 0x00a0 (0160) I 80380100 Clk                                       : 80000\n 0x00a4 (0164) B       02 VddInd                                    : 2\n 0x00a5 (0165) I dc4a0100 Clk                                       : 84700\n 0x00a9 (0169) B       03 VddInd                                    : 3\n 0x00aa (0170) I 905f0100 Clk                                       : 90000\n 0x00ae (0174) B       04 VddInd                                    : 4\n 0x00af (0175) I 00770100 Clk                                       : 96000\n 0x00b3 (0179) B       05 VddInd                                    : 5\n 0x00b4 (0180) I 90910100 Clk                                       : 102800\n 0x00b8 (0184) B       06 VddInd                                    : 6\n 0x00b9 (0185) I 6cb00100 Clk                                       : 110700\n 0x00bd (0189) B       07 VddInd                                    : 7\n 0x0038 (0056) H     9e01 MclkDependencyTableOffset                 : 414\n 0x019e (0414) B       01 RevId                                     : 1\n 0x019f (0415) B       04 NumEntries                                : 4\n 0x01a0 (0416) I 3c410000 MemClk                                    : 16700\n 0x01a4 (0420) B       00 VddInd                                    : 0\n 0x01a5 (0421) B       00 VddMemInd                                 : 0\n 0x01a6 (0422) B       00 VddciInd                                  : 0\n 0x01a7 (0423) I 50c30000 MemClk                                    : 50000\n 0x01ab (0427) B       00 VddInd                                    : 0\n 0x01ac (0428) B       00 VddMemInd                                 : 0\n 0x01ad (0429) B       00 VddciInd                                  : 0\n 0x01ae (0430) I 80380100 MemClk                                    : 80000\n 0x01b2 (0434) B       02 VddInd                                    : 2\n 0x01b3 (0435) B       00 VddMemInd                                 : 0\n 0x01b4 (0436) B       00 VddciInd                                  : 0\n 0x01b5 (0437) I 24710100 MemClk                                    : 94500\n 0x01b9 (0441) B       04 VddInd                                    : 4\n 0x01ba (0442) B       00 VddMemInd                                 : 0\n 0x01bb (0443) B       00 VddciInd                                  : 0\n 0x003a (0058) H     be00 GfxclkDependencyTableOffset               : 190\n 0x00be (0190) B       01 RevId                                     : 1\n 0x00bf (0191) B       08 NumEntries                                : 8\n 0x00c0 (0192) I d04c0100 Clk                                       : 85200\n 0x00c4 (0196) B       00 VddInd                                    : 0\n 0x00c5 (0197) H     0080 CKSVOffsetandDisable                      : 32768\n 0x00c7 (0199) H     0000 AVFSOffset                                : 0\n 0x00c9 (0201) B       00 ACGEnable                                 : 0\n 0x00ca (0202) B       00 Reserved                                  : 0\n 0x00cb (0203) B       00 Reserved                                  : 0\n 0x00cc (0204) B       00 Reserved                                  : 0\n 0x00cd (0205) I 1c830100 Clk                                       : 99100\n 0x00d1 (0209) B       01 VddInd                                    : 1\n 0x00d2 (0210) H     0000 CKSVOffsetandDisable                      : 0\n 0x00d4 (0212) H     0000 AVFSOffset                                : 0\n 0x00d6 (0214) B       00 ACGEnable                                 : 0\n 0x00d7 (0215) B       00 Reserved                                  : 0\n 0x00d8 (0216) B       00 Reserved                                  : 0\n 0x00d9 (0217) B       00 Reserved                                  : 0\n 0x00da (0218) I 70a70100 Clk                                       : 108400\n 0x00de (0222) B       02 VddInd                                    : 2\n 0x00df (0223) H     0000 CKSVOffsetandDisable                      : 0\n 0x00e1 (0225) H     0000 AVFSOffset                                : 0\n 0x00e3 (0227) B       00 ACGEnable                                 : 0\n 0x00e4 (0228) B       00 Reserved                                  : 0\n 0x00e5 (0229) B       00 Reserved                                  : 0\n 0x00e6 (0230) B       00 Reserved                                  : 0\n 0x00e7 (0231) I 88bc0100 Clk                                       : 113800\n 0x00eb (0235) B       03 VddInd                                    : 3\n 0x00ec (0236) H     0000 CKSVOffsetandDisable                      : 0\n 0x00ee (0238) H     0000 AVFSOffset                                : 0\n 0x00f0 (0240) B       00 ACGEnable                                 : 0\n 0x00f1 (0241) B       00 Reserved                                  : 0\n 0x00f2 (0242) B       00 Reserved                                  : 0\n 0x00f3 (0243) B       00 Reserved                                  : 0\n 0x00f4 (0244) I c0d40100 Clk                                       : 120000\n 0x00f8 (0248) B       04 VddInd                                    : 4\n 0x00f9 (0249) H     0000 CKSVOffsetandDisable                      : 0\n 0x00fb (0251) H     0000 AVFSOffset                                : 0\n 0x00fd (0253) B       00 ACGEnable                                 : 0\n 0x00fe (0254) B       00 Reserved                                  : 0\n 0x00ff (0255) B       00 Reserved                                  : 0\n 0x0100 (0256) B       00 Reserved                                  : 0\n 0x0101 (0257) I 44230200 Clk                                       : 140100\n 0x0105 (0261) B       05 VddInd                                    : 5\n 0x0106 (0262) H     0000 CKSVOffsetandDisable                      : 0\n 0x0108 (0264) H     0000 AVFSOffset                                : 0\n 0x010a (0266) B       01 ACGEnable                                 : 1\n 0x010b (0267) B       00 Reserved                                  : 0\n 0x010c (0268) B       00 Reserved                                  : 0\n 0x010d (0269) B       00 Reserved                                  : 0\n 0x010e (0270) I 00580200 Clk                                       : 153600\n 0x0112 (0274) B       06 VddInd                                    : 6\n 0x0113 (0275) H     0000 CKSVOffsetandDisable                      : 0\n 0x0115 (0277) H     0000 AVFSOffset                                : 0\n 0x0117 (0279) B       01 ACGEnable                                 : 1\n 0x0118 (0280) B       00 Reserved                                  : 0\n 0x0119 (0281) B       00 Reserved                                  : 0\n 0x011a (0282) B       00 Reserved                                  : 0\n 0x011b (0283) I b87c0200 Clk                                       : 163000\n 0x011f (0287) B       07 VddInd                                    : 7\n 0x0120 (0288) H     0000 CKSVOffsetandDisable                      : 0\n 0x0122 (0290) H     0000 AVFSOffset                                : 0\n 0x0124 (0292) B       01 ACGEnable                                 : 1\n 0x0125 (0293) B       00 Reserved                                  : 0\n 0x0126 (0294) B       00 Reserved                                  : 0\n 0x0127 (0295) B       00 Reserved                                  : 0\n 0x003c (0060) H     2801 DcefclkDependencyTableOffset              : 296\n 0x0128 (0296) B       00 RevId                                     : 0\n 0x0129 (0297) B       05 NumEntries                                : 5\n 0x012a (0298) I 60ea0000 Clk                                       : 60000\n 0x012e (0302) B       00 VddInd                                    : 0\n 0x012f (0303) I 40190100 Clk                                       : 72000\n 0x0133 (0307) B       00 VddInd                                    : 0\n 0x0134 (0308) I 80380100 Clk                                       : 80000\n 0x0138 (0312) B       00 VddInd                                    : 0\n 0x0139 (0313) I dc4a0100 Clk                                       : 84700\n 0x013d (0317) B       00 VddInd                                    : 0\n 0x013e (0318) I 905f0100 Clk                                       : 90000\n 0x0142 (0322) B       00 VddInd                                    : 0\n 0x003e (0062) H     7a00 VddcLookupTableOffset                     : 122\n 0x007a (0122) B       01 RevId                                     : 1\n 0x007b (0123) B       08 NumEntries                                : 8\n 0x007c (0124) H     2003 Vdd                                       : 800\n 0x007e (0126) H     8403 Vdd                                       : 900\n 0x0080 (0128) H     b603 Vdd                                       : 950\n 0x0082 (0130) H     e803 Vdd                                       : 1000\n 0x0084 (0132) H     1a04 Vdd                                       : 1050\n 0x0086 (0134) H     4c04 Vdd                                       : 1100\n 0x0088 (0136) H     7e04 Vdd                                       : 1150\n 0x008a (0138) H     b004 Vdd                                       : 1200\n 0x0040 (0064) H     8c00 VddmemLookupTableOffset                   : 140\n 0x008c (0140) B       01 RevId                                     : 1\n 0x008d (0141) B       01 NumEntries                                : 1\n 0x008e (0142) H     4605 Vdd                                       : 1350\n 0x0042 (0066) H     bc01 MMDependencyTableOffset                   : 444\n 0x01bc (0444) B       01 RevId                                     : 1\n 0x01bd (0445) B       08 NumEntries                                : 8\n 0x01be (0446) B       00 VddcInd                                   : 0\n 0x01bf (0447) I 98850000 DClk                                      : 34200\n 0x01c3 (0451) I 40b50000 VClk                                      : 46400\n 0x01c7 (0455) I 60ea0000 EClk                                      : 60000\n 0x01cb (0459) I 50c30000 PSPClk                                    : 50000\n 0x01cf (0463) B       01 VddcInd                                   : 1\n 0x01d0 (0464) I 80bb0000 DClk                                      : 48000\n 0x01d4 (0468) I 60ea0000 VClk                                      : 60000\n 0x01d8 (0472) I 940b0100 EClk                                      : 68500\n 0x01dc (0476) I 50c30000 PSPClk                                    : 50000\n 0x01e0 (0480) B       02 VddcInd                                   : 2\n 0x01e1 (0481) I 00e10000 DClk                                      : 57600\n 0x01e5 (0485) I 940b0100 VClk                                      : 68500\n 0x01e9 (0489) I 40190100 EClk                                      : 72000\n 0x01ed (0493) I 50c30000 PSPClk                                    : 50000\n 0x01f1 (0497) B       03 VddcInd                                   : 3\n 0x01f2 (0498) I 78ff0000 DClk                                      : 65400\n 0x01f6 (0502) I 40190100 VClk                                      : 72000\n 0x01fa (0506) I 88260100 EClk                                      : 75400\n 0x01fe (0510) I 50c30000 PSPClk                                    : 50000\n 0x0202 (0514) B       04 VddcInd                                   : 4\n 0x0203 (0515) I 40190100 DClk                                      : 72000\n 0x0207 (0519) I 80380100 VClk                                      : 80000\n 0x020b (0523) I 80380100 EClk                                      : 80000\n 0x020f (0527) I 50c30000 PSPClk                                    : 50000\n 0x0213 (0531) B       05 VddcInd                                   : 5\n 0x0214 (0532) I 80380100 DClk                                      : 80000\n 0x0218 (0536) I dc4a0100 VClk                                      : 84700\n 0x021c (0540) I dc4a0100 EClk                                      : 84700\n 0x0220 (0544) I 50c30000 PSPClk                                    : 50000\n 0x0224 (0548) B       06 VddcInd                                   : 6\n 0x0225 (0549) I 00770100 DClk                                      : 96000\n 0x0229 (0553) I 00770100 VClk                                      : 96000\n 0x022d (0557) I 905f0100 EClk                                      : 90000\n 0x0231 (0561) I 50c30000 PSPClk                                    : 50000\n 0x0235 (0565) B       07 VddcInd                                   : 7\n 0x0236 (0566) I 90910100 DClk                                      : 102800\n 0x023a (0570) I 90910100 VClk                                      : 102800\n 0x023e (0574) I 00770100 EClk                                      : 96000\n 0x0242 (0578) I 50c30000 PSPClk                                    : 50000\n 0x0044 (0068) H     0000 VCEStateTableOffset                       : 0\n 0x0046 (0070) H     0000 Reserve                                   : 0\n 0x0048 (0072) H     7202 PowerTuneTableOffset                      : 626\n 0x0272 (0626) B       07 RevId                                     : 7\n 0x0273 (0627) H     dc00 SocketPowerLimit                          : 220\n 0x0275 (0629) H     dc00 BatteryPowerLimit                         : 220\n 0x0277 (0631) H     dc00 SmallPowerLimit                           : 220\n 0x0279 (0633) H     2c01 TdcLimit                                  : 300\n 0x027b (0635) H     0000 EdcLimit                                  : 0\n 0x027d (0637) H     5900 SoftwareShutdownTemp                      : 89\n 0x027f (0639) H     6900 TemperatureLimitHotSpot                   : 105\n 0x0281 (0641) H     4a00 TemperatureLimitLiquid1                   : 74\n 0x0283 (0643) H     4a00 TemperatureLimitLiquid2                   : 74\n 0x0285 (0645) H     5f00 TemperatureLimitHBM                       : 95\n 0x0287 (0647) H     7300 TemperatureLimitVrSoc                     : 115\n 0x0289 (0649) H     7300 TemperatureLimitVrMem                     : 115\n 0x028b (0651) H     6400 TemperatureLimitPlx                       : 100\n 0x028d (0653) H     4000 LoadLineResistance                        : 64\n 0x028f (0655) B       90 Liquid1_I2C_address                       : 144\n 0x0290 (0656) B       92 Liquid2_I2C_address                       : 146\n 0x0291 (0657) B       97 Liquid_I2C_Line                           : 151\n 0x0292 (0658) B       60 Vr_I2C_address                            : 96\n 0x0293 (0659) B       96 Vr_I2C_Line                               : 150\n 0x0294 (0660) B       00 Plx_I2C_address                           : 0\n 0x0295 (0661) B       90 Plx_I2C_Line                              : 144\n 0x0296 (0662) H     5500 TemperatureLimitTedge                     : 85\n 0x0298 (0664) H     0000 BoostStartTemperature                     : 0\n 0x029a (0666) H     0000 BoostStopTemperature                      : 0\n 0x029c (0668) I 00000000 BoostClock                                : 0\n 0x02a0 (0672) I 00000000 Reserved                                  : 0\n 0x02a4 (0676) I 00000000 Reserved                                  : 0\n 0x004a (0074) H     0000 HardLimitTableOffset                      : 0\n 0x004c (0076) H     9000 VddciLookupTableOffset                    : 144\n 0x0090 (0144) B       01 RevId                                     : 1\n 0x0091 (0145) B       01 NumEntries                                : 1\n 0x0092 (0146) H     8403 Vdd                                       : 900\n 0x004e (0078) H     a802 PCIETableOffset                           : 680\n 0x02a8 (0680) B       02 RevId                                     : 2\n 0x02a9 (0681) B       02 NumEntries                                : 2\n 0x02aa (0682) I d4300000 LCLK                                      : 12500\n 0x02ae (0686) B       02 PCIEGenSpeed                              : 2\n 0x02af (0687) B       10 PCIELaneWidth                             : 16\n 0x02b0 (0688) I 60ea0000 LCLK                                      : 60000\n 0x02b4 (0692) B       02 PCIEGenSpeed                              : 2\n 0x02b5 (0693) B       10 PCIELaneWidth                             : 16\n 0x0050 (0080) H     6d01 PixclkDependencyTableOffset               : 365\n 0x016d (0365) B       00 RevId                                     : 0\n 0x016e (0366) B       08 NumEntries                                : 8\n 0x016f (0367) I 6c390000 Clk                                       : 14700\n 0x0173 (0371) B       00 VddInd                                    : 0\n 0x0174 (0372) I 245e0000 Clk                                       : 24100\n 0x0178 (0376) B       01 VddInd                                    : 1\n 0x0179 (0377) I fc850000 Clk                                       : 34300\n 0x017d (0381) B       02 VddInd                                    : 2\n 0x017e (0382) I acbc0000 Clk                                       : 48300\n 0x0182 (0386) B       03 VddInd                                    : 3\n 0x0183 (0387) I 34d00000 Clk                                       : 53300\n 0x0187 (0391) B       04 VddInd                                    : 4\n 0x0188 (0392) I 686e0100 Clk                                       : 93800\n 0x018c (0396) B       05 VddInd                                    : 5\n 0x018d (0397) I 08970100 Clk                                       : 104200\n 0x0191 (0401) B       06 VddInd                                    : 6\n 0x0192 (0402) I eca30100 Clk                                       : 107500\n 0x0196 (0406) B       07 VddInd                                    : 7\n 0x0052 (0082) H     4301 DispClkDependencyTableOffset              : 323\n 0x0143 (0323) B       00 RevId                                     : 0\n 0x0144 (0324) B       08 NumEntries                                : 8\n 0x0145 (0325) I 286e0000 Clk                                       : 28200\n 0x0149 (0329) B       00 VddInd                                    : 0\n 0x014a (0330) I 2cc90000 Clk                                       : 51500\n 0x014e (0334) B       01 VddInd                                    : 1\n 0x014f (0335) I f80b0100 Clk                                       : 68600\n 0x0153 (0339) B       02 VddInd                                    : 2\n 0x0154 (0340) I 80380100 Clk                                       : 80000\n 0x0158 (0344) B       03 VddInd                                    : 3\n 0x0159 (0345) I 905f0100 Clk                                       : 90000\n 0x015d (0349) B       04 VddInd                                    : 4\n 0x015e (0350) I f4910100 Clk                                       : 102900\n 0x0162 (0354) B       05 VddInd                                    : 5\n 0x0163 (0355) I d0b00100 Clk                                       : 110800\n 0x0167 (0359) B       06 VddInd                                    : 6\n 0x0168 (0360) I c0d40100 Clk                                       : 120000\n 0x016c (0364) B       07 VddInd                                    : 7\n 0x0054 (0084) H     9701 PhyClkDependencyTableOffset               : 407\n 0x0197 (0407) B       00 RevId                                     : 0\n 0x0198 (0408) B       01 NumEntries                                : 1\n 0x0199 (0409) I 683c0100 Clk                                       : 81000\n 0x019d (0413) B       00 VddInd                                    : 0\n"
  },
  {
    "path": "test/AMD.RXVegaFrontier.16384.170628.rom.dump",
    "content": "sHeader:\n  structuresize: 642\n  format_revision: 8\n  content_revision: 1\nTableRevision: 0\nTableSize: 92\nGoldenPPID: 1810\nGoldenRevision: 11069\nFormatID: 27\nPlatformCaps: 72\nMaxODEngineClock: 240000\nMaxODMemoryClock: 150000\nPowerControlLimit: 50\nUlvVoltageOffset: 8\nUlvSmnclkDid: 0\nUlvMp1clkDid: 0\nUlvGfxclkBypass: 0\nGfxclkSlewRate: 0\nGfxVoltageMode: 0\nSocVoltageMode: 0\nUclkVoltageMode: 0\nUvdVoltageMode: 0\nVceVoltageMode: 0\nMp0VoltageMode: 2\nDcefVoltageMode: 1\nStateArray:\n  RevId: 2\n  NumEntries: 2\n  states:\n    states 0:\n      SocClockIndexHigh: 0\n      SocClockIndexLow: 0\n      GfxClockIndexHigh: 0\n      GfxClockIndexLow: 0\n      MemClockIndexHigh: 0\n      MemClockIndexLow: 0\n      Classification: 8\n      CapsAndSettings: 0\n      Classification2: 0\n    states 1:\n      SocClockIndexHigh: 5\n      SocClockIndexLow: 0\n      GfxClockIndexHigh: 7\n      GfxClockIndexLow: 0\n      MemClockIndexHigh: 3\n      MemClockIndexLow: 0\n      Classification: 5\n      CapsAndSettings: 0\n      Classification2: 0\nFanTable:\n  RevId: 11\n  FanOutputSensitivity: 4836\n  FanAcousticLimitRpm: 1500\n  ThrottlingRPM: 2300\n  TargetTemperature: 65\n  MinimumPWMLimit: 15\n  TargetGfxClk: 852\n  FanGainEdge: 400\n  FanGainHotspot: 400\n  FanGainLiquid: 400\n  FanGainVrVddc: 400\n  FanGainVrMvdd: 400\n  FanGainPlx: 400\n  FanGainHbm: 400\n  EnableZeroRPM: 0\n  FanStopTemperature: 0\n  FanStartTemperature: 0\n  FanParameters: 2\n  FanMinRPM: 4\n  FanMaxRPM: 33\nThermalController:\n  RevId: 1\n  Type: 24\n  I2cLine: 0\n  I2cAddress: 0\n  FanParameters: 0\n  FanMinRPM: 0\n  FanMaxRPM: 0\n  Flags: 0\nSocclkDependencyTable:\n  RevId: 0\n  NumEntries: 6\n  entries:\n    entries 0:\n      Clk: 60000\n      VddInd: 0\n    entries 1:\n      Clk: 72000\n      VddInd: 1\n    entries 2:\n      Clk: 84700\n      VddInd: 2\n    entries 3:\n      Clk: 96000\n      VddInd: 3\n    entries 4:\n      Clk: 102800\n      VddInd: 4\n    entries 5:\n      Clk: 110700\n      VddInd: 5\nMclkDependencyTable:\n  RevId: 1\n  NumEntries: 4\n  entries:\n    entries 0:\n      MemClk: 16700\n      VddInd: 0\n      VddMemInd: 0\n      VddciInd: 0\n    entries 1:\n      MemClk: 50000\n      VddInd: 1\n      VddMemInd: 0\n      VddciInd: 0\n    entries 2:\n      MemClk: 80000\n      VddInd: 2\n      VddMemInd: 0\n      VddciInd: 0\n    entries 3:\n      MemClk: 94500\n      VddInd: 3\n      VddMemInd: 0\n      VddciInd: 0\nGfxclkDependencyTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      Clk: 85200\n      VddInd: 0\n      CKSVOffsetandDisable: 32768\n      AVFSOffset: 0\n    entries 1:\n      Clk: 99100\n      VddInd: 1\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n    entries 2:\n      Clk: 113800\n      VddInd: 2\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n    entries 3:\n      Clk: 126900\n      VddInd: 3\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n    entries 4:\n      Clk: 134800\n      VddInd: 4\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n    entries 5:\n      Clk: 144000\n      VddInd: 5\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n    entries 6:\n      Clk: 152800\n      VddInd: 6\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\n    entries 7:\n      Clk: 160000\n      VddInd: 7\n      CKSVOffsetandDisable: 0\n      AVFSOffset: 0\nDcefclkDependencyTable:\n  RevId: 0\n  NumEntries: 3\n  entries:\n    entries 0:\n      Clk: 60000\n      VddInd: 0\n    entries 1:\n      Clk: 72000\n      VddInd: 0\n    entries 2:\n      Clk: 80000\n      VddInd: 0\nVddcLookupTable:\n  RevId: 1\n  NumEntries: 8\n  entries:\n    entries 0:\n      Vdd: 800\n    entries 1:\n      Vdd: 900\n    entries 2:\n      Vdd: 950\n    entries 3:\n      Vdd: 1000\n    entries 4:\n      Vdd: 1050\n    entries 5:\n      Vdd: 1100\n    entries 6:\n      Vdd: 1150\n    entries 7:\n      Vdd: 1200\nVddmemLookupTable:\n  RevId: 1\n  NumEntries: 1\n  entries:\n    entries 0:\n      Vdd: 1350\nMMDependencyTable:\n  RevId: 1\n  NumEntries: 8\n  entries:\n    entries 0:\n      VddcInd: 0\n      DClk: 34200\n      VClk: 46200\n      EClk: 60000\n      PSPClk: 50000\n    entries 1:\n      VddcInd: 1\n      DClk: 48000\n      VClk: 60000\n      EClk: 68500\n      PSPClk: 50000\n    entries 2:\n      VddcInd: 2\n      DClk: 65400\n      VClk: 72000\n      EClk: 75700\n      PSPClk: 50000\n    entries 3:\n      VddcInd: 3\n      DClk: 75700\n      VClk: 84700\n      EClk: 84700\n      PSPClk: 50000\n    entries 4:\n      VddcInd: 4\n      DClk: 84700\n      VClk: 90000\n      EClk: 90000\n      PSPClk: 50000\n    entries 5:\n      VddcInd: 5\n      DClk: 96000\n      VClk: 102800\n      EClk: 96000\n      PSPClk: 50000\n    entries 6:\n      VddcInd: 6\n      DClk: 102800\n      VClk: 110700\n      EClk: 96000\n      PSPClk: 50000\n    entries 7:\n      VddcInd: 7\n      DClk: 110700\n      VClk: 110700\n      EClk: 102800\n      PSPClk: 50000\nVCEStateTable: UNUSED\nReserve: 0\nPowerTuneTable:\n  RevId: 7\n  SocketPowerLimit: 220\n  BatteryPowerLimit: 220\n  SmallPowerLimit: 220\n  TdcLimit: 300\n  EdcLimit: 0\n  SoftwareShutdownTemp: 74\n  TemperatureLimitHotSpot: 105\n  TemperatureLimitLiquid1: 74\n  TemperatureLimitLiquid2: 74\n  TemperatureLimitHBM: 95\n  TemperatureLimitVrSoc: 115\n  TemperatureLimitVrMem: 115\n  TemperatureLimitPlx: 100\n  LoadLineResistance: 64\n  Liquid1_I2C_address: 144\n  Liquid2_I2C_address: 146\n  Liquid_I2C_Line: 151\n  Vr_I2C_address: 96\n  Vr_I2C_Line: 150\n  Plx_I2C_address: 0\n  Plx_I2C_Line: 144\n  TemperatureLimitTedge: 70\n  BoostStartTemperature: 0\n  BoostStopTemperature: 0\n  BoostClock: 0\n  Reserved:\n    Reserved 0: 0\n    Reserved 1: 0\nHardLimitTable: UNUSED\nVddciLookupTable:\n  RevId: 1\n  NumEntries: 1\n  entries:\n    entries 0:\n      Vdd: 900\nPCIETable:\n  RevId: 2\n  NumEntries: 2\n  entries:\n    entries 0:\n      LCLK: 12500\n      PCIEGenSpeed: 2\n      PCIELaneWidth: 16\n    entries 1:\n      LCLK: 60000\n      PCIEGenSpeed: 2\n      PCIELaneWidth: 16\nPixclkDependencyTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      Clk: 14700\n      VddInd: 0\n    entries 1:\n      Clk: 24100\n      VddInd: 1\n    entries 2:\n      Clk: 34300\n      VddInd: 2\n    entries 3:\n      Clk: 48300\n      VddInd: 3\n    entries 4:\n      Clk: 53300\n      VddInd: 4\n    entries 5:\n      Clk: 93800\n      VddInd: 5\n    entries 6:\n      Clk: 104200\n      VddInd: 6\n    entries 7:\n      Clk: 107500\n      VddInd: 7\nDispClkDependencyTable:\n  RevId: 0\n  NumEntries: 8\n  entries:\n    entries 0:\n      Clk: 28200\n      VddInd: 0\n    entries 1:\n      Clk: 51500\n      VddInd: 1\n    entries 2:\n      Clk: 68600\n      VddInd: 2\n    entries 3:\n      Clk: 80000\n      VddInd: 3\n    entries 4:\n      Clk: 90000\n      VddInd: 4\n    entries 5:\n      Clk: 102900\n      VddInd: 5\n    entries 6:\n      Clk: 110800\n      VddInd: 6\n    entries 7:\n      Clk: 120000\n      VddInd: 7\nPhyClkDependencyTable:\n  RevId: 0\n  NumEntries: 1\n  entries:\n    entries 0:\n      Clk: 81000\n      VddInd: 0\n"
  },
  {
    "path": "test/AMD.RXVegaFrontier.16384.170628.rom.rawdump",
    "content": "PowerPlay table rev 8.1 size 642 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     8202 structuresize                             : 642\n 0x0002 (0002) B       08 format_revision                           : 8\n 0x0003 (0003) B       01 content_revision                          : 1\n 0x0004 (0004) B       00 TableRevision                             : 0\n 0x0005 (0005) H     5c00 TableSize                                 : 92\n 0x0007 (0007) I 12070000 GoldenPPID                                : 1810\n 0x000b (0011) I 3d2b0000 GoldenRevision                            : 11069\n 0x000f (0015) H     1b00 FormatID                                  : 27\n 0x0011 (0017) I 48000000 PlatformCaps                              : 72\n 0x0015 (0021) I 80a90300 MaxODEngineClock                          : 240000\n 0x0019 (0025) I f0490200 MaxODMemoryClock                          : 150000\n 0x001d (0029) H     3200 PowerControlLimit                         : 50\n 0x001f (0031) H     0800 UlvVoltageOffset                          : 8\n 0x0021 (0033) H     0000 UlvSmnclkDid                              : 0\n 0x0023 (0035) H     0000 UlvMp1clkDid                              : 0\n 0x0025 (0037) H     0000 UlvGfxclkBypass                           : 0\n 0x0027 (0039) H     0000 GfxclkSlewRate                            : 0\n 0x0029 (0041) B       00 GfxVoltageMode                            : 0\n 0x002a (0042) B       00 SocVoltageMode                            : 0\n 0x002b (0043) B       00 UclkVoltageMode                           : 0\n 0x002c (0044) B       00 UvdVoltageMode                            : 0\n 0x002d (0045) B       00 VceVoltageMode                            : 0\n 0x002e (0046) B       02 Mp0VoltageMode                            : 2\n 0x002f (0047) B       01 DcefVoltageMode                           : 1\n 0x0030 (0048) H     5c00 StateArrayOffset                          : 92\n 0x005c (0092) B       02 RevId                                     : 2\n 0x005d (0093) B       02 NumEntries                                : 2\n 0x005e (0094) B       00 SocClockIndexHigh                         : 0\n 0x005f (0095) B       00 SocClockIndexLow                          : 0\n 0x0060 (0096) B       00 GfxClockIndexHigh                         : 0\n 0x0061 (0097) B       00 GfxClockIndexLow                          : 0\n 0x0062 (0098) B       00 MemClockIndexHigh                         : 0\n 0x0063 (0099) B       00 MemClockIndexLow                          : 0\n 0x0064 (0100) H     0800 Classification                            : 8\n 0x0066 (0102) I 00000000 CapsAndSettings                           : 0\n 0x006a (0106) H     0000 Classification2                           : 0\n 0x006c (0108) B       05 SocClockIndexHigh                         : 5\n 0x006d (0109) B       00 SocClockIndexLow                          : 0\n 0x006e (0110) B       07 GfxClockIndexHigh                         : 7\n 0x006f (0111) B       00 GfxClockIndexLow                          : 0\n 0x0070 (0112) B       03 MemClockIndexHigh                         : 3\n 0x0071 (0113) B       00 MemClockIndexLow                          : 0\n 0x0072 (0114) H     0500 Classification                            : 5\n 0x0074 (0116) I 00000000 CapsAndSettings                           : 0\n 0x0078 (0120) H     0000 Classification2                           : 0\n 0x0032 (0050) H     1b02 FanTableOffset                            : 539\n 0x021b (0539) B       0b RevId                                     : 11\n 0x021c (0540) H     e412 FanOutputSensitivity                      : 4836\n 0x021e (0542) H     dc05 FanAcousticLimitRpm                       : 1500\n 0x0220 (0544) H     fc08 ThrottlingRPM                             : 2300\n 0x0222 (0546) H     4100 TargetTemperature                         : 65\n 0x0224 (0548) H     0f00 MinimumPWMLimit                           : 15\n 0x0226 (0550) H     5403 TargetGfxClk                              : 852\n 0x0228 (0552) H     9001 FanGainEdge                               : 400\n 0x022a (0554) H     9001 FanGainHotspot                            : 400\n 0x022c (0556) H     9001 FanGainLiquid                             : 400\n 0x022e (0558) H     9001 FanGainVrVddc                             : 400\n 0x0230 (0560) H     9001 FanGainVrMvdd                             : 400\n 0x0232 (0562) H     9001 FanGainPlx                                : 400\n 0x0234 (0564) H     9001 FanGainHbm                                : 400\n 0x0236 (0566) B       00 EnableZeroRPM                             : 0\n 0x0237 (0567) H     0000 FanStopTemperature                        : 0\n 0x0239 (0569) H     0000 FanStartTemperature                       : 0\n 0x023b (0571) B       02 FanParameters                             : 2\n 0x023c (0572) B       04 FanMinRPM                                 : 4\n 0x023d (0573) B       21 FanMaxRPM                                 : 33\n 0x0034 (0052) H     1202 ThermalControllerOffset                   : 530\n 0x0212 (0530) B       01 RevId                                     : 1\n 0x0213 (0531) B       18 Type                                      : 24\n 0x0214 (0532) B       00 I2cLine                                   : 0\n 0x0215 (0533) B       00 I2cAddress                                : 0\n 0x0216 (0534) B       00 FanParameters                             : 0\n 0x0217 (0535) B       00 FanMinRPM                                 : 0\n 0x0218 (0536) B       00 FanMaxRPM                                 : 0\n 0x0219 (0537) B       00 Flags                                     : 0\n 0x0036 (0054) H     9400 SocclkDependencyTableOffset               : 148\n 0x0094 (0148) B       00 RevId                                     : 0\n 0x0095 (0149) B       06 NumEntries                                : 6\n 0x0096 (0150) I 60ea0000 Clk                                       : 60000\n 0x009a (0154) B       00 VddInd                                    : 0\n 0x009b (0155) I 40190100 Clk                                       : 72000\n 0x009f (0159) B       01 VddInd                                    : 1\n 0x00a0 (0160) I dc4a0100 Clk                                       : 84700\n 0x00a4 (0164) B       02 VddInd                                    : 2\n 0x00a5 (0165) I 00770100 Clk                                       : 96000\n 0x00a9 (0169) B       03 VddInd                                    : 3\n 0x00aa (0170) I 90910100 Clk                                       : 102800\n 0x00ae (0174) B       04 VddInd                                    : 4\n 0x00af (0175) I 6cb00100 Clk                                       : 110700\n 0x00b3 (0179) B       05 VddInd                                    : 5\n 0x0038 (0056) H     6a01 MclkDependencyTableOffset                 : 362\n 0x016a (0362) B       01 RevId                                     : 1\n 0x016b (0363) B       04 NumEntries                                : 4\n 0x016c (0364) I 3c410000 MemClk                                    : 16700\n 0x0170 (0368) B       00 VddInd                                    : 0\n 0x0171 (0369) B       00 VddMemInd                                 : 0\n 0x0172 (0370) B       00 VddciInd                                  : 0\n 0x0173 (0371) I 50c30000 MemClk                                    : 50000\n 0x0177 (0375) B       01 VddInd                                    : 1\n 0x0178 (0376) B       00 VddMemInd                                 : 0\n 0x0179 (0377) B       00 VddciInd                                  : 0\n 0x017a (0378) I 80380100 MemClk                                    : 80000\n 0x017e (0382) B       02 VddInd                                    : 2\n 0x017f (0383) B       00 VddMemInd                                 : 0\n 0x0180 (0384) B       00 VddciInd                                  : 0\n 0x0181 (0385) I 24710100 MemClk                                    : 94500\n 0x0185 (0389) B       03 VddInd                                    : 3\n 0x0186 (0390) B       00 VddMemInd                                 : 0\n 0x0187 (0391) B       00 VddciInd                                  : 0\n 0x003a (0058) H     b400 GfxclkDependencyTableOffset               : 180\n 0x00b4 (0180) B       00 RevId                                     : 0\n 0x00b5 (0181) B       08 NumEntries                                : 8\n 0x00b6 (0182) I d04c0100 Clk                                       : 85200\n 0x00ba (0186) B       00 VddInd                                    : 0\n 0x00bb (0187) H     0080 CKSVOffsetandDisable                      : 32768\n 0x00bd (0189) H     0000 AVFSOffset                                : 0\n 0x00bf (0191) I 1c830100 Clk                                       : 99100\n 0x00c3 (0195) B       01 VddInd                                    : 1\n 0x00c4 (0196) H     0000 CKSVOffsetandDisable                      : 0\n 0x00c6 (0198) H     0000 AVFSOffset                                : 0\n 0x00c8 (0200) I 88bc0100 Clk                                       : 113800\n 0x00cc (0204) B       02 VddInd                                    : 2\n 0x00cd (0205) H     0000 CKSVOffsetandDisable                      : 0\n 0x00cf (0207) H     0000 AVFSOffset                                : 0\n 0x00d1 (0209) I b4ef0100 Clk                                       : 126900\n 0x00d5 (0213) B       03 VddInd                                    : 3\n 0x00d6 (0214) H     0000 CKSVOffsetandDisable                      : 0\n 0x00d8 (0216) H     0000 AVFSOffset                                : 0\n 0x00da (0218) I 900e0200 Clk                                       : 134800\n 0x00de (0222) B       04 VddInd                                    : 4\n 0x00df (0223) H     0000 CKSVOffsetandDisable                      : 0\n 0x00e1 (0225) H     0000 AVFSOffset                                : 0\n 0x00e3 (0227) I 80320200 Clk                                       : 144000\n 0x00e7 (0231) B       05 VddInd                                    : 5\n 0x00e8 (0232) H     0000 CKSVOffsetandDisable                      : 0\n 0x00ea (0234) H     0000 AVFSOffset                                : 0\n 0x00ec (0236) I e0540200 Clk                                       : 152800\n 0x00f0 (0240) B       06 VddInd                                    : 6\n 0x00f1 (0241) H     0000 CKSVOffsetandDisable                      : 0\n 0x00f3 (0243) H     0000 AVFSOffset                                : 0\n 0x00f5 (0245) I 00710200 Clk                                       : 160000\n 0x00f9 (0249) B       07 VddInd                                    : 7\n 0x00fa (0250) H     0000 CKSVOffsetandDisable                      : 0\n 0x00fc (0252) H     0000 AVFSOffset                                : 0\n 0x003c (0060) H     fe00 DcefclkDependencyTableOffset              : 254\n 0x00fe (0254) B       00 RevId                                     : 0\n 0x00ff (0255) B       03 NumEntries                                : 3\n 0x0100 (0256) I 60ea0000 Clk                                       : 60000\n 0x0104 (0260) B       00 VddInd                                    : 0\n 0x0105 (0261) I 40190100 Clk                                       : 72000\n 0x0109 (0265) B       00 VddInd                                    : 0\n 0x010a (0266) I 80380100 Clk                                       : 80000\n 0x010e (0270) B       00 VddInd                                    : 0\n 0x003e (0062) H     7a00 VddcLookupTableOffset                     : 122\n 0x007a (0122) B       01 RevId                                     : 1\n 0x007b (0123) B       08 NumEntries                                : 8\n 0x007c (0124) H     2003 Vdd                                       : 800\n 0x007e (0126) H     8403 Vdd                                       : 900\n 0x0080 (0128) H     b603 Vdd                                       : 950\n 0x0082 (0130) H     e803 Vdd                                       : 1000\n 0x0084 (0132) H     1a04 Vdd                                       : 1050\n 0x0086 (0134) H     4c04 Vdd                                       : 1100\n 0x0088 (0136) H     7e04 Vdd                                       : 1150\n 0x008a (0138) H     b004 Vdd                                       : 1200\n 0x0040 (0064) H     8c00 VddmemLookupTableOffset                   : 140\n 0x008c (0140) B       01 RevId                                     : 1\n 0x008d (0141) B       01 NumEntries                                : 1\n 0x008e (0142) H     4605 Vdd                                       : 1350\n 0x0042 (0066) H     8801 MMDependencyTableOffset                   : 392\n 0x0188 (0392) B       01 RevId                                     : 1\n 0x0189 (0393) B       08 NumEntries                                : 8\n 0x018a (0394) B       00 VddcInd                                   : 0\n 0x018b (0395) I 98850000 DClk                                      : 34200\n 0x018f (0399) I 78b40000 VClk                                      : 46200\n 0x0193 (0403) I 60ea0000 EClk                                      : 60000\n 0x0197 (0407) I 50c30000 PSPClk                                    : 50000\n 0x019b (0411) B       01 VddcInd                                   : 1\n 0x019c (0412) I 80bb0000 DClk                                      : 48000\n 0x01a0 (0416) I 60ea0000 VClk                                      : 60000\n 0x01a4 (0420) I 940b0100 EClk                                      : 68500\n 0x01a8 (0424) I 50c30000 PSPClk                                    : 50000\n 0x01ac (0428) B       02 VddcInd                                   : 2\n 0x01ad (0429) I 78ff0000 DClk                                      : 65400\n 0x01b1 (0433) I 40190100 VClk                                      : 72000\n 0x01b5 (0437) I b4270100 EClk                                      : 75700\n 0x01b9 (0441) I 50c30000 PSPClk                                    : 50000\n 0x01bd (0445) B       03 VddcInd                                   : 3\n 0x01be (0446) I b4270100 DClk                                      : 75700\n 0x01c2 (0450) I dc4a0100 VClk                                      : 84700\n 0x01c6 (0454) I dc4a0100 EClk                                      : 84700\n 0x01ca (0458) I 50c30000 PSPClk                                    : 50000\n 0x01ce (0462) B       04 VddcInd                                   : 4\n 0x01cf (0463) I dc4a0100 DClk                                      : 84700\n 0x01d3 (0467) I 905f0100 VClk                                      : 90000\n 0x01d7 (0471) I 905f0100 EClk                                      : 90000\n 0x01db (0475) I 50c30000 PSPClk                                    : 50000\n 0x01df (0479) B       05 VddcInd                                   : 5\n 0x01e0 (0480) I 00770100 DClk                                      : 96000\n 0x01e4 (0484) I 90910100 VClk                                      : 102800\n 0x01e8 (0488) I 00770100 EClk                                      : 96000\n 0x01ec (0492) I 50c30000 PSPClk                                    : 50000\n 0x01f0 (0496) B       06 VddcInd                                   : 6\n 0x01f1 (0497) I 90910100 DClk                                      : 102800\n 0x01f5 (0501) I 6cb00100 VClk                                      : 110700\n 0x01f9 (0505) I 00770100 EClk                                      : 96000\n 0x01fd (0509) I 50c30000 PSPClk                                    : 50000\n 0x0201 (0513) B       07 VddcInd                                   : 7\n 0x0202 (0514) I 6cb00100 DClk                                      : 110700\n 0x0206 (0518) I 6cb00100 VClk                                      : 110700\n 0x020a (0522) I 90910100 EClk                                      : 102800\n 0x020e (0526) I 50c30000 PSPClk                                    : 50000\n 0x0044 (0068) H     0000 VCEStateTableOffset                       : 0\n 0x0046 (0070) H     0000 Reserve                                   : 0\n 0x0048 (0072) H     3e02 PowerTuneTableOffset                      : 574\n 0x023e (0574) B       07 RevId                                     : 7\n 0x023f (0575) H     dc00 SocketPowerLimit                          : 220\n 0x0241 (0577) H     dc00 BatteryPowerLimit                         : 220\n 0x0243 (0579) H     dc00 SmallPowerLimit                           : 220\n 0x0245 (0581) H     2c01 TdcLimit                                  : 300\n 0x0247 (0583) H     0000 EdcLimit                                  : 0\n 0x0249 (0585) H     4a00 SoftwareShutdownTemp                      : 74\n 0x024b (0587) H     6900 TemperatureLimitHotSpot                   : 105\n 0x024d (0589) H     4a00 TemperatureLimitLiquid1                   : 74\n 0x024f (0591) H     4a00 TemperatureLimitLiquid2                   : 74\n 0x0251 (0593) H     5f00 TemperatureLimitHBM                       : 95\n 0x0253 (0595) H     7300 TemperatureLimitVrSoc                     : 115\n 0x0255 (0597) H     7300 TemperatureLimitVrMem                     : 115\n 0x0257 (0599) H     6400 TemperatureLimitPlx                       : 100\n 0x0259 (0601) H     4000 LoadLineResistance                        : 64\n 0x025b (0603) B       90 Liquid1_I2C_address                       : 144\n 0x025c (0604) B       92 Liquid2_I2C_address                       : 146\n 0x025d (0605) B       97 Liquid_I2C_Line                           : 151\n 0x025e (0606) B       60 Vr_I2C_address                            : 96\n 0x025f (0607) B       96 Vr_I2C_Line                               : 150\n 0x0260 (0608) B       00 Plx_I2C_address                           : 0\n 0x0261 (0609) B       90 Plx_I2C_Line                              : 144\n 0x0262 (0610) H     4600 TemperatureLimitTedge                     : 70\n 0x0264 (0612) H     0000 BoostStartTemperature                     : 0\n 0x0266 (0614) H     0000 BoostStopTemperature                      : 0\n 0x0268 (0616) I 00000000 BoostClock                                : 0\n 0x026c (0620) I 00000000 Reserved                                  : 0\n 0x0270 (0624) I 00000000 Reserved                                  : 0\n 0x004a (0074) H     0000 HardLimitTableOffset                      : 0\n 0x004c (0076) H     9000 VddciLookupTableOffset                    : 144\n 0x0090 (0144) B       01 RevId                                     : 1\n 0x0091 (0145) B       01 NumEntries                                : 1\n 0x0092 (0146) H     8403 Vdd                                       : 900\n 0x004e (0078) H     7402 PCIETableOffset                           : 628\n 0x0274 (0628) B       02 RevId                                     : 2\n 0x0275 (0629) B       02 NumEntries                                : 2\n 0x0276 (0630) I d4300000 LCLK                                      : 12500\n 0x027a (0634) B       02 PCIEGenSpeed                              : 2\n 0x027b (0635) B       10 PCIELaneWidth                             : 16\n 0x027c (0636) I 60ea0000 LCLK                                      : 60000\n 0x0280 (0640) B       02 PCIEGenSpeed                              : 2\n 0x0281 (0641) B       10 PCIELaneWidth                             : 16\n 0x0050 (0080) H     3901 PixclkDependencyTableOffset               : 313\n 0x0139 (0313) B       00 RevId                                     : 0\n 0x013a (0314) B       08 NumEntries                                : 8\n 0x013b (0315) I 6c390000 Clk                                       : 14700\n 0x013f (0319) B       00 VddInd                                    : 0\n 0x0140 (0320) I 245e0000 Clk                                       : 24100\n 0x0144 (0324) B       01 VddInd                                    : 1\n 0x0145 (0325) I fc850000 Clk                                       : 34300\n 0x0149 (0329) B       02 VddInd                                    : 2\n 0x014a (0330) I acbc0000 Clk                                       : 48300\n 0x014e (0334) B       03 VddInd                                    : 3\n 0x014f (0335) I 34d00000 Clk                                       : 53300\n 0x0153 (0339) B       04 VddInd                                    : 4\n 0x0154 (0340) I 686e0100 Clk                                       : 93800\n 0x0158 (0344) B       05 VddInd                                    : 5\n 0x0159 (0345) I 08970100 Clk                                       : 104200\n 0x015d (0349) B       06 VddInd                                    : 6\n 0x015e (0350) I eca30100 Clk                                       : 107500\n 0x0162 (0354) B       07 VddInd                                    : 7\n 0x0052 (0082) H     0f01 DispClkDependencyTableOffset              : 271\n 0x010f (0271) B       00 RevId                                     : 0\n 0x0110 (0272) B       08 NumEntries                                : 8\n 0x0111 (0273) I 286e0000 Clk                                       : 28200\n 0x0115 (0277) B       00 VddInd                                    : 0\n 0x0116 (0278) I 2cc90000 Clk                                       : 51500\n 0x011a (0282) B       01 VddInd                                    : 1\n 0x011b (0283) I f80b0100 Clk                                       : 68600\n 0x011f (0287) B       02 VddInd                                    : 2\n 0x0120 (0288) I 80380100 Clk                                       : 80000\n 0x0124 (0292) B       03 VddInd                                    : 3\n 0x0125 (0293) I 905f0100 Clk                                       : 90000\n 0x0129 (0297) B       04 VddInd                                    : 4\n 0x012a (0298) I f4910100 Clk                                       : 102900\n 0x012e (0302) B       05 VddInd                                    : 5\n 0x012f (0303) I d0b00100 Clk                                       : 110800\n 0x0133 (0307) B       06 VddInd                                    : 6\n 0x0134 (0308) I c0d40100 Clk                                       : 120000\n 0x0138 (0312) B       07 VddInd                                    : 7\n 0x0054 (0084) H     6301 PhyClkDependencyTableOffset               : 355\n 0x0163 (0355) B       00 RevId                                     : 0\n 0x0164 (0356) B       01 NumEntries                                : 1\n 0x0165 (0357) I 683c0100 Clk                                       : 81000\n 0x0169 (0361) B       00 VddInd                                    : 0\n"
  },
  {
    "path": "test/AMD.RadeonVII.16384.190116.rom.dump",
    "content": "sHeader:\n  structuresize: 1730\n  format_revision: 11\n  content_revision: 0\nTableRevision: 2\nTableSize: 1730\nGoldenPPID: 2100\nGoldenRevision: 13732\nFormatID: 124\nPlatformCaps: 9\nThermalControllerType: 26\nSmallPowerLimit1: 250\nSmallPowerLimit2: 250\nBoostPowerLimit: 250\nODTurboPowerLimit: 0\nODPowerSavePowerLimit: 0\nSoftwareShutdownTemp: 118\nPowerSavingClockTable:\n  TableRevision: 1\n  PowerSavingClockCount: 11\n  PowerSavingClockMax:\n    PowerSavingClockMax 0: 1801\n    PowerSavingClockMax 1: 1134\n    PowerSavingClockMax 2: 972\n    PowerSavingClockMax 3: 972\n    PowerSavingClockMax 4: 972\n    PowerSavingClockMax 5: 1000\n    PowerSavingClockMax 6: 1225\n    PowerSavingClockMax 7: 1134\n    PowerSavingClockMax 8: 1134\n    PowerSavingClockMax 9: 1076\n    PowerSavingClockMax 10: 810\n    PowerSavingClockMax 11: 0\n    PowerSavingClockMax 12: 0\n    PowerSavingClockMax 13: 0\n    PowerSavingClockMax 14: 0\n    PowerSavingClockMax 15: 0\n  PowerSavingClockMin:\n    PowerSavingClockMin 0: 700\n    PowerSavingClockMin 1: 358\n    PowerSavingClockMin 2: 310\n    PowerSavingClockMin 3: 310\n    PowerSavingClockMin 4: 310\n    PowerSavingClockMin 5: 350\n    PowerSavingClockMin 6: 550\n    PowerSavingClockMin 7: 358\n    PowerSavingClockMin 8: 358\n    PowerSavingClockMin 9: 147\n    PowerSavingClockMin 10: 270\n    PowerSavingClockMin 11: 0\n    PowerSavingClockMin 12: 0\n    PowerSavingClockMin 13: 0\n    PowerSavingClockMin 14: 0\n    PowerSavingClockMin 15: 0\nOverDrive8Table:\n  ODTableRevision: 1\n  ODFeatureCount: 14\n  ODFeatureCapabilities:\n    ODFeatureCapabilities 0: 1\n    ODFeatureCapabilities 1: 1\n    ODFeatureCapabilities 2: 1\n    ODFeatureCapabilities 3: 1\n    ODFeatureCapabilities 4: 1\n    ODFeatureCapabilities 5: 1\n    ODFeatureCapabilities 6: 1\n    ODFeatureCapabilities 7: 1\n    ODFeatureCapabilities 8: 1\n    ODFeatureCapabilities 9: 0\n    ODFeatureCapabilities 10: 1\n    ODFeatureCapabilities 11: 1\n    ODFeatureCapabilities 12: 1\n    ODFeatureCapabilities 13: 1\n    ODFeatureCapabilities 14: 0\n    ODFeatureCapabilities 15: 0\n    ODFeatureCapabilities 16: 0\n    ODFeatureCapabilities 17: 0\n    ODFeatureCapabilities 18: 0\n    ODFeatureCapabilities 19: 0\n    ODFeatureCapabilities 20: 0\n    ODFeatureCapabilities 21: 0\n    ODFeatureCapabilities 22: 0\n    ODFeatureCapabilities 23: 0\n    ODFeatureCapabilities 24: 0\n    ODFeatureCapabilities 25: 0\n    ODFeatureCapabilities 26: 0\n    ODFeatureCapabilities 27: 0\n    ODFeatureCapabilities 28: 0\n    ODFeatureCapabilities 29: 0\n    ODFeatureCapabilities 30: 0\n    ODFeatureCapabilities 31: 0\n  ODSettingCount: 29\n  ODSettingsMax:\n    ODSettingsMax 0: 2200\n    ODSettingsMax 1: 2200\n    ODSettingsMax 2: 2200\n    ODSettingsMax 3: 1218\n    ODSettingsMax 4: 2200\n    ODSettingsMax 5: 1218\n    ODSettingsMax 6: 2200\n    ODSettingsMax 7: 1218\n    ODSettingsMax 8: 1200\n    ODSettingsMax 9: 20\n    ODSettingsMax 10: 3850\n    ODSettingsMax 11: 3850\n    ODSettingsMax 12: 95\n    ODSettingsMax 13: 110\n    ODSettingsMax 14: 2\n    ODSettingsMax 15: 0\n    ODSettingsMax 16: 1\n    ODSettingsMax 17: 1\n    ODSettingsMax 18: 1\n    ODSettingsMax 19: 95\n    ODSettingsMax 20: 100\n    ODSettingsMax 21: 95\n    ODSettingsMax 22: 100\n    ODSettingsMax 23: 95\n    ODSettingsMax 24: 100\n    ODSettingsMax 25: 95\n    ODSettingsMax 26: 100\n    ODSettingsMax 27: 95\n    ODSettingsMax 28: 100\n    ODSettingsMax 29: 0\n    ODSettingsMax 30: 0\n    ODSettingsMax 31: 0\n  ODSettingsMin:\n    ODSettingsMin 0: 808\n    ODSettingsMin 1: 808\n    ODSettingsMin 2: 808\n    ODSettingsMin 3: 738\n    ODSettingsMin 4: 808\n    ODSettingsMin 5: 738\n    ODSettingsMin 6: 808\n    ODSettingsMin 7: 738\n    ODSettingsMin 8: 350\n    ODSettingsMin 9: 20\n    ODSettingsMin 10: 450\n    ODSettingsMin 11: 450\n    ODSettingsMin 12: 25\n    ODSettingsMin 13: 50\n    ODSettingsMin 14: 0\n    ODSettingsMin 15: 0\n    ODSettingsMin 16: 0\n    ODSettingsMin 17: 0\n    ODSettingsMin 18: 0\n    ODSettingsMin 19: 25\n    ODSettingsMin 20: 20\n    ODSettingsMin 21: 25\n    ODSettingsMin 22: 20\n    ODSettingsMin 23: 25\n    ODSettingsMin 24: 20\n    ODSettingsMin 25: 25\n    ODSettingsMin 26: 20\n    ODSettingsMin 27: 25\n    ODSettingsMin 28: 20\n    ODSettingsMin 29: 0\n    ODSettingsMin 30: 0\n    ODSettingsMin 31: 0\nReserve:\n  Reserve 0: 0\n  Reserve 1: 0\n  Reserve 2: 0\n  Reserve 3: 0\n  Reserve 4: 0\nsmcPPTable:\n  Version: 3\n  FeaturesToRun:\n    FeaturesToRun 0: 972353535\n    FeaturesToRun 1: 0\n  SocketPowerLimitAc0: 250\n  SocketPowerLimitAc0Tau: 0\n  SocketPowerLimitAc1: 0\n  SocketPowerLimitAc1Tau: 0\n  SocketPowerLimitAc2: 0\n  SocketPowerLimitAc2Tau: 0\n  SocketPowerLimitAc3: 0\n  SocketPowerLimitAc3Tau: 0\n  SocketPowerLimitDc: 250\n  SocketPowerLimitDcTau: 0\n  TdcLimitSoc: 50\n  TdcLimitSocTau: 0\n  TdcLimitGfx: 330\n  TdcLimitGfxTau: 0\n  TedgeLimit: 100\n  ThotspotLimit: 110\n  ThbmLimit: 94\n  Tvr_gfxLimit: 115\n  Tvr_memLimit: 115\n  Tliquid1Limit: 65535\n  Tliquid2Limit: 65535\n  TplxLimit: 65535\n  FitLimit: 0\n  PpmPowerLimit: 0\n  PpmTemperatureThreshold: 0\n  MemoryOnPackage: 1\n  padding8_limits: 0\n  Tvr_SocLimit: 115\n  UlvVoltageOffsetSoc: 0\n  UlvVoltageOffsetGfx: 0\n  UlvSmnclkDid: 0\n  UlvMp1clkDid: 0\n  UlvGfxclkBypass: 0\n  Padding234: 0\n  MinVoltageGfx: 2950\n  MinVoltageSoc: 2850\n  MaxVoltageGfx: 4875\n  MaxVoltageSoc: 4675\n  LoadLineResistanceGfx: 38\n  LoadLineResistanceSoc: 0\n  DpmDescriptor:\n    DpmDescriptor 0:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 9\n      padding: 0\n      ConversionToAvfsClk:\n        m: 0\n        b: 0\n      SsCurve:\n        a: 0.3744\n        b:-0.485\n        c: 0.8207\n    DpmDescriptor 1:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.244\n        b:-0.08099\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 2:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.206\n        b: 0.17013\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 3:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.3784\n        b: 0.03667\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 4:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.2608\n        b:-0.05297\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 5:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 3\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.0241\n        b: 0.15026\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 6:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.0486\n        b: 0.1726\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 7:\n      VoltageMode: 0\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 0.8545\n        b: 0.11896\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0\n    DpmDescriptor 8:\n      VoltageMode: 2\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 0\n        b: 0\n      SsCurve:\n        a: 1.105\n        b:-1.0397\n        c: 0.69885\n    DpmDescriptor 9:\n      VoltageMode: 2\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 3\n      padding: 0\n      ConversionToAvfsClk:\n        m: 0\n        b: 0\n      SsCurve:\n        a: 0\n        b: 0\n        c: 0.69885\n    DpmDescriptor 10:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1\n        b: 0\n      SsCurve:\n        a: 0.4933\n        b:-0.67\n        c: 0.95885\n  FreqTableGfx:\n    FreqTableGfx 0: 700\n    FreqTableGfx 1: 808\n    FreqTableGfx 2: 1134\n    FreqTableGfx 3: 1372\n    FreqTableGfx 4: 1546\n    FreqTableGfx 5: 1683\n    FreqTableGfx 6: 1749\n    FreqTableGfx 7: 1773\n    FreqTableGfx 8: 1801\n    FreqTableGfx 9: 0\n    FreqTableGfx 10: 0\n    FreqTableGfx 11: 0\n    FreqTableGfx 12: 0\n    FreqTableGfx 13: 0\n    FreqTableGfx 14: 0\n    FreqTableGfx 15: 0\n  FreqTableVclk:\n    FreqTableVclk 0: 358\n    FreqTableVclk 1: 486\n    FreqTableVclk 2: 619\n    FreqTableVclk 3: 756\n    FreqTableVclk 4: 850\n    FreqTableVclk 5: 972\n    FreqTableVclk 6: 1134\n    FreqTableVclk 7: 1134\n  FreqTableDclk:\n    FreqTableDclk 0: 310\n    FreqTableDclk 1: 400\n    FreqTableDclk 2: 524\n    FreqTableDclk 3: 619\n    FreqTableDclk 4: 680\n    FreqTableDclk 5: 756\n    FreqTableDclk 6: 850\n    FreqTableDclk 7: 972\n  FreqTableEclk:\n    FreqTableEclk 0: 310\n    FreqTableEclk 1: 400\n    FreqTableEclk 2: 524\n    FreqTableEclk 3: 619\n    FreqTableEclk 4: 680\n    FreqTableEclk 5: 756\n    FreqTableEclk 6: 850\n    FreqTableEclk 7: 972\n  FreqTableSocclk:\n    FreqTableSocclk 0: 310\n    FreqTableSocclk 1: 524\n    FreqTableSocclk 2: 567\n    FreqTableSocclk 3: 619\n    FreqTableSocclk 4: 680\n    FreqTableSocclk 5: 756\n    FreqTableSocclk 6: 850\n    FreqTableSocclk 7: 972\n  FreqTableUclk:\n    FreqTableUclk 0: 350\n    FreqTableUclk 1: 800\n    FreqTableUclk 2: 1000\n    FreqTableUclk 3: 1000\n  FreqTableFclk:\n    FreqTableFclk 0: 550\n    FreqTableFclk 1: 610\n    FreqTableFclk 2: 690\n    FreqTableFclk 3: 760\n    FreqTableFclk 4: 870\n    FreqTableFclk 5: 960\n    FreqTableFclk 6: 1080\n    FreqTableFclk 7: 1225\n  FreqTableDcefclk:\n    FreqTableDcefclk 0: 358\n    FreqTableDcefclk 1: 454\n    FreqTableDcefclk 2: 567\n    FreqTableDcefclk 3: 680\n    FreqTableDcefclk 4: 756\n    FreqTableDcefclk 5: 850\n    FreqTableDcefclk 6: 972\n    FreqTableDcefclk 7: 1134\n  FreqTableDispclk:\n    FreqTableDispclk 0: 358\n    FreqTableDispclk 1: 454\n    FreqTableDispclk 2: 567\n    FreqTableDispclk 3: 680\n    FreqTableDispclk 4: 756\n    FreqTableDispclk 5: 850\n    FreqTableDispclk 6: 972\n    FreqTableDispclk 7: 1134\n  FreqTablePixclk:\n    FreqTablePixclk 0: 147\n    FreqTablePixclk 1: 242\n    FreqTablePixclk 2: 344\n    FreqTablePixclk 3: 484\n    FreqTablePixclk 4: 533\n    FreqTablePixclk 5: 938\n    FreqTablePixclk 6: 1043\n    FreqTablePixclk 7: 1076\n  FreqTablePhyclk:\n    FreqTablePhyclk 0: 270\n    FreqTablePhyclk 1: 540\n    FreqTablePhyclk 2: 810\n    FreqTablePhyclk 3: 0\n    FreqTablePhyclk 4: 0\n    FreqTablePhyclk 5: 0\n    FreqTablePhyclk 6: 0\n    FreqTablePhyclk 7: 0\n  DcModeMaxFreq:\n    DcModeMaxFreq 0: 1801\n    DcModeMaxFreq 1: 1134\n    DcModeMaxFreq 2: 972\n    DcModeMaxFreq 3: 972\n    DcModeMaxFreq 4: 972\n    DcModeMaxFreq 5: 1000\n    DcModeMaxFreq 6: 1134\n    DcModeMaxFreq 7: 1134\n    DcModeMaxFreq 8: 1076\n    DcModeMaxFreq 9: 810\n    DcModeMaxFreq 10: 1225\n  Padding8_Clks: 0\n  Mp0clkFreq:\n    Mp0clkFreq 0: 200\n    Mp0clkFreq 1: 300\n  Mp0DpmVoltage:\n    Mp0DpmVoltage 0: 2400\n    Mp0DpmVoltage 1: 2800\n  GfxclkFidle: 808\n  GfxclkSlewRate: 0\n  CksEnableFreq: 0\n  Padding789: 0\n  CksVoltageOffset:\n    a: 0\n    b: 0\n    c: 0\n  Padding567:\n    Padding567 0: 0\n    Padding567 1: 0\n    Padding567 2: 0\n    Padding567 3: 0\n  GfxclkDsMaxFreq: 1801\n  GfxclkSource: 1\n  Padding456: 0\n  LowestUclkReservedForUlv: 0\n  Padding8_Uclk:\n    Padding8_Uclk 0: 0\n    Padding8_Uclk 1: 0\n    Padding8_Uclk 2: 0\n  PcieGenSpeed:\n    PcieGenSpeed 0: 0\n    PcieGenSpeed 1: 2\n  PcieLaneCount:\n    PcieLaneCount 0: 6\n    PcieLaneCount 1: 6\n  LclkFreq:\n    LclkFreq 0: 80\n    LclkFreq 1: 308\n  EnableTdpm: 0\n  TdpmHighHystTemperature: 0\n  TdpmLowHystTemperature: 0\n  GfxclkFreqHighTempLimit: 0\n  FanStopTemp: 0\n  FanStartTemp: 0\n  FanGainEdge: 400\n  FanGainHotspot: 400\n  FanGainLiquid: 400\n  FanGainVrGfx: 400\n  FanGainVrSoc: 400\n  FanGainPlx: 400\n  FanGainHbm: 400\n  FanPwmMin: 20\n  FanAcousticLimitRpm: 2900\n  FanThrottlingRpm: 2900\n  FanMaximumRpm: 3850\n  FanTargetTemperature: 95\n  FanTargetGfxclk: 0\n  FanZeroRpmEnable: 0\n  FanTachEdgePerRev: 2\n  FuzzyFan_ErrorSetDelta: 0\n  FuzzyFan_ErrorRateSetDelta: 0\n  FuzzyFan_PwmSetDelta: 0\n  FuzzyFan_Reserved: 0\n  OverrideAvfsGb:\n    OverrideAvfsGb 0: 0\n    OverrideAvfsGb 1: 1\n  Padding8_Avfs:\n    Padding8_Avfs 0: 0\n    Padding8_Avfs 1: 0\n  qAvfsGb:\n    qAvfsGb 0:\n      a: 0\n      b: 0.0185\n      c: 0.005\n    qAvfsGb 1:\n      a: 0\n      b: 0.01864\n      c: 0.04703\n  dBtcGbGfxCksOn:\n    a: 0\n    b: 0\n    c: 0\n  dBtcGbGfxCksOff:\n    a: 0\n    b: 0\n    c: 0\n  dBtcGbGfxAfll:\n    a: 0\n    b: 0\n    c: 0\n  dBtcGbSoc:\n    a: 0\n    b: 0\n    c: 0\n  qAgingGb:\n    qAgingGb 0:\n      m: 0\n      b: 0\n    qAgingGb 1:\n      m: 0\n      b: 0\n  qStaticVoltageOffset:\n    qStaticVoltageOffset 0:\n      a: 0\n      b: 0\n      c: 0\n    qStaticVoltageOffset 1:\n      a: 0\n      b: 0\n      c: 0\n  DcTol:\n    DcTol 0: 0\n    DcTol 1: 160\n  DcBtcEnabled:\n    DcBtcEnabled 0: 1\n    DcBtcEnabled 1: 0\n  Padding8_GfxBtc:\n    Padding8_GfxBtc 0: 0\n    Padding8_GfxBtc 1: 0\n  DcBtcMin:\n    DcBtcMin 0: 0\n    DcBtcMin 1: 0\n  DcBtcMax:\n    DcBtcMax 0: 160\n    DcBtcMax 1: 0\n  XgmiLinkSpeed:\n    XgmiLinkSpeed 0: 8\n    XgmiLinkSpeed 1: 16\n  XgmiLinkWidth:\n    XgmiLinkWidth 0: 2\n    XgmiLinkWidth 1: 16\n  XgmiFclkFreq:\n    XgmiFclkFreq 0: 1050\n    XgmiFclkFreq 1: 1100\n  XgmiUclkFreq:\n    XgmiUclkFreq 0: 1000\n    XgmiUclkFreq 1: 1000\n  XgmiSocclkFreq:\n    XgmiSocclkFreq 0: 1000\n    XgmiSocclkFreq 1: 1000\n  XgmiSocVoltage:\n    XgmiSocVoltage 0: 0\n    XgmiSocVoltage 1: 0\n  DebugOverrides: 0\n  ReservedEquation0:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation1:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation2:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation3:\n    a: 0\n    b: 0\n    c: 0\n  MinVoltageUlvGfx: 2950\n  MinVoltageUlvSoc: 2850\n  MGpuFanBoostLimitRpm: 2900\n  padding16_Fan: 0\n  FanGainVrMem0: 400\n  FanGainVrMem1: 400\n  DcBtcGb:\n    DcBtcGb 0: 56\n    DcBtcGb 1: 0\n  Reserved:\n    Reserved 0: 0\n    Reserved 1: 0\n    Reserved 2: 0\n    Reserved 3: 0\n    Reserved 4: 0\n    Reserved 5: 0\n    Reserved 6: 0\n    Reserved 7: 0\n    Reserved 8: 0\n    Reserved 9: 0\n    Reserved 10: 0\n  Padding32:\n    Padding32 0: 0\n    Padding32 1: 0\n    Padding32 2: 0\n  MaxVoltageStepGfx: 0\n  MaxVoltageStepSoc: 0\n  VddGfxVrMapping: 0\n  VddSocVrMapping: 0\n  VddMem0VrMapping: 0\n  VddMem1VrMapping: 0\n  GfxUlvPhaseSheddingMask: 0\n  SocUlvPhaseSheddingMask: 0\n  ExternalSensorPresent: 0\n  Padding8_V: 0\n  GfxMaxCurrent: 0\n  GfxOffset: 0\n  Padding_TelemetryGfx: 0\n  SocMaxCurrent: 0\n  SocOffset: 0\n  Padding_TelemetrySoc: 0\n  Mem0MaxCurrent: 0\n  Mem0Offset: 0\n  Padding_TelemetryMem0: 0\n  Mem1MaxCurrent: 0\n  Mem1Offset: 0\n  Padding_TelemetryMem1: 0\n  AcDcGpio: 0\n  AcDcPolarity: 0\n  VR0HotGpio: 0\n  VR0HotPolarity: 0\n  VR1HotGpio: 0\n  VR1HotPolarity: 0\n  Padding1: 0\n  Padding2: 0\n  LedPin0: 0\n  LedPin1: 0\n  LedPin2: 0\n  padding8_4: 0\n  PllGfxclkSpreadEnabled: 0\n  PllGfxclkSpreadPercent: 0\n  PllGfxclkSpreadFreq: 0\n  UclkSpreadEnabled: 0\n  UclkSpreadPercent: 0\n  UclkSpreadFreq: 0\n  FclkSpreadEnabled: 0\n  FclkSpreadPercent: 0\n  FclkSpreadFreq: 0\n  FllGfxclkSpreadEnabled: 0\n  FllGfxclkSpreadPercent: 0\n  FllGfxclkSpreadFreq: 0\n  I2cControllers:\n    I2cControllers 0:\n      Enabled: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrottler: 0\n      I2cProtocol: 0\n      I2cSpeed: 0\n    I2cControllers 1:\n      Enabled: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrottler: 0\n      I2cProtocol: 0\n      I2cSpeed: 0\n    I2cControllers 2:\n      Enabled: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrottler: 0\n      I2cProtocol: 0\n      I2cSpeed: 0\n    I2cControllers 3:\n      Enabled: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrottler: 0\n      I2cProtocol: 0\n      I2cSpeed: 0\n    I2cControllers 4:\n      Enabled: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrottler: 0\n      I2cProtocol: 0\n      I2cSpeed: 0\n    I2cControllers 5:\n      Enabled: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrottler: 0\n      I2cProtocol: 0\n      I2cSpeed: 0\n    I2cControllers 6:\n      Enabled: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrottler: 0\n      I2cProtocol: 0\n      I2cSpeed: 0\n  BoardReserved:\n    BoardReserved 0: 0\n    BoardReserved 1: 0\n    BoardReserved 2: 0\n    BoardReserved 3: 0\n    BoardReserved 4: 0\n    BoardReserved 5: 0\n    BoardReserved 6: 0\n    BoardReserved 7: 0\n    BoardReserved 8: 0\n    BoardReserved 9: 0\n  MmHubPadding:\n    MmHubPadding 0: 0\n    MmHubPadding 1: 0\n    MmHubPadding 2: 0\n    MmHubPadding 3: 0\n    MmHubPadding 4: 0\n    MmHubPadding 5: 0\n    MmHubPadding 6: 0\n    MmHubPadding 7: 0\n"
  },
  {
    "path": "test/AMD.RadeonVII.16384.190116.rom.rawdump",
    "content": "PowerPlay table rev 11.0 size 1730 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     c206 structuresize                             : 1730\n 0x0002 (0002) B       0b format_revision                           : 11\n 0x0003 (0003) B       00 content_revision                          : 0\n 0x0004 (0004) B       02 TableRevision                             : 2\n 0x0005 (0005) H     c206 TableSize                                 : 1730\n 0x0007 (0007) I 34080000 GoldenPPID                                : 2100\n 0x000b (0011) I a4350000 GoldenRevision                            : 13732\n 0x000f (0015) H     7c00 FormatID                                  : 124\n 0x0011 (0017) I 09000000 PlatformCaps                              : 9\n 0x0015 (0021) B       1a ThermalControllerType                     : 26\n 0x0016 (0022) H     fa00 SmallPowerLimit1                          : 250\n 0x0018 (0024) H     fa00 SmallPowerLimit2                          : 250\n 0x001a (0026) H     fa00 BoostPowerLimit                           : 250\n 0x001c (0028) H     0000 ODTurboPowerLimit                         : 0\n 0x001e (0030) H     0000 ODPowerSavePowerLimit                     : 0\n 0x0020 (0032) H     7600 SoftwareShutdownTemp                      : 118\n 0x0022 (0034) B       01 TableRevision                             : 1\n 0x0023 (0035) I 0b000000 PowerSavingClockCount                     : 11\n 0x0027 (0039) I 09070000 PowerSavingClockMax                       : 1801\n 0x002b (0043) I 6e040000 PowerSavingClockMax                       : 1134\n 0x002f (0047) I cc030000 PowerSavingClockMax                       : 972\n 0x0033 (0051) I cc030000 PowerSavingClockMax                       : 972\n 0x0037 (0055) I cc030000 PowerSavingClockMax                       : 972\n 0x003b (0059) I e8030000 PowerSavingClockMax                       : 1000\n 0x003f (0063) I c9040000 PowerSavingClockMax                       : 1225\n 0x0043 (0067) I 6e040000 PowerSavingClockMax                       : 1134\n 0x0047 (0071) I 6e040000 PowerSavingClockMax                       : 1134\n 0x004b (0075) I 34040000 PowerSavingClockMax                       : 1076\n 0x004f (0079) I 2a030000 PowerSavingClockMax                       : 810\n 0x0053 (0083) I 00000000 PowerSavingClockMax                       : 0\n 0x0057 (0087) I 00000000 PowerSavingClockMax                       : 0\n 0x005b (0091) I 00000000 PowerSavingClockMax                       : 0\n 0x005f (0095) I 00000000 PowerSavingClockMax                       : 0\n 0x0063 (0099) I 00000000 PowerSavingClockMax                       : 0\n 0x0067 (0103) I bc020000 PowerSavingClockMin                       : 700\n 0x006b (0107) I 66010000 PowerSavingClockMin                       : 358\n 0x006f (0111) I 36010000 PowerSavingClockMin                       : 310\n 0x0073 (0115) I 36010000 PowerSavingClockMin                       : 310\n 0x0077 (0119) I 36010000 PowerSavingClockMin                       : 310\n 0x007b (0123) I 5e010000 PowerSavingClockMin                       : 350\n 0x007f (0127) I 26020000 PowerSavingClockMin                       : 550\n 0x0083 (0131) I 66010000 PowerSavingClockMin                       : 358\n 0x0087 (0135) I 66010000 PowerSavingClockMin                       : 358\n 0x008b (0139) I 93000000 PowerSavingClockMin                       : 147\n 0x008f (0143) I 0e010000 PowerSavingClockMin                       : 270\n 0x0093 (0147) I 00000000 PowerSavingClockMin                       : 0\n 0x0097 (0151) I 00000000 PowerSavingClockMin                       : 0\n 0x009b (0155) I 00000000 PowerSavingClockMin                       : 0\n 0x009f (0159) I 00000000 PowerSavingClockMin                       : 0\n 0x00a3 (0163) I 00000000 PowerSavingClockMin                       : 0\n 0x00a7 (0167) B       01 ODTableRevision                           : 1\n 0x00a8 (0168) I 0e000000 ODFeatureCount                            : 14\n 0x00ac (0172) B       01 ODFeatureCapabilities                     : 1\n 0x00ad (0173) B       01 ODFeatureCapabilities                     : 1\n 0x00ae (0174) B       01 ODFeatureCapabilities                     : 1\n 0x00af (0175) B       01 ODFeatureCapabilities                     : 1\n 0x00b0 (0176) B       01 ODFeatureCapabilities                     : 1\n 0x00b1 (0177) B       01 ODFeatureCapabilities                     : 1\n 0x00b2 (0178) B       01 ODFeatureCapabilities                     : 1\n 0x00b3 (0179) B       01 ODFeatureCapabilities                     : 1\n 0x00b4 (0180) B       01 ODFeatureCapabilities                     : 1\n 0x00b5 (0181) B       00 ODFeatureCapabilities                     : 0\n 0x00b6 (0182) B       01 ODFeatureCapabilities                     : 1\n 0x00b7 (0183) B       01 ODFeatureCapabilities                     : 1\n 0x00b8 (0184) B       01 ODFeatureCapabilities                     : 1\n 0x00b9 (0185) B       01 ODFeatureCapabilities                     : 1\n 0x00ba (0186) B       00 ODFeatureCapabilities                     : 0\n 0x00bb (0187) B       00 ODFeatureCapabilities                     : 0\n 0x00bc (0188) B       00 ODFeatureCapabilities                     : 0\n 0x00bd (0189) B       00 ODFeatureCapabilities                     : 0\n 0x00be (0190) B       00 ODFeatureCapabilities                     : 0\n 0x00bf (0191) B       00 ODFeatureCapabilities                     : 0\n 0x00c0 (0192) B       00 ODFeatureCapabilities                     : 0\n 0x00c1 (0193) B       00 ODFeatureCapabilities                     : 0\n 0x00c2 (0194) B       00 ODFeatureCapabilities                     : 0\n 0x00c3 (0195) B       00 ODFeatureCapabilities                     : 0\n 0x00c4 (0196) B       00 ODFeatureCapabilities                     : 0\n 0x00c5 (0197) B       00 ODFeatureCapabilities                     : 0\n 0x00c6 (0198) B       00 ODFeatureCapabilities                     : 0\n 0x00c7 (0199) B       00 ODFeatureCapabilities                     : 0\n 0x00c8 (0200) B       00 ODFeatureCapabilities                     : 0\n 0x00c9 (0201) B       00 ODFeatureCapabilities                     : 0\n 0x00ca (0202) B       00 ODFeatureCapabilities                     : 0\n 0x00cb (0203) B       00 ODFeatureCapabilities                     : 0\n 0x00cc (0204) I 1d000000 ODSettingCount                            : 29\n 0x00d0 (0208) I 98080000 ODSettingsMax                             : 2200\n 0x00d4 (0212) I 98080000 ODSettingsMax                             : 2200\n 0x00d8 (0216) I 98080000 ODSettingsMax                             : 2200\n 0x00dc (0220) I c2040000 ODSettingsMax                             : 1218\n 0x00e0 (0224) I 98080000 ODSettingsMax                             : 2200\n 0x00e4 (0228) I c2040000 ODSettingsMax                             : 1218\n 0x00e8 (0232) I 98080000 ODSettingsMax                             : 2200\n 0x00ec (0236) I c2040000 ODSettingsMax                             : 1218\n 0x00f0 (0240) I b0040000 ODSettingsMax                             : 1200\n 0x00f4 (0244) I 14000000 ODSettingsMax                             : 20\n 0x00f8 (0248) I 0a0f0000 ODSettingsMax                             : 3850\n 0x00fc (0252) I 0a0f0000 ODSettingsMax                             : 3850\n 0x0100 (0256) I 5f000000 ODSettingsMax                             : 95\n 0x0104 (0260) I 6e000000 ODSettingsMax                             : 110\n 0x0108 (0264) I 02000000 ODSettingsMax                             : 2\n 0x010c (0268) I 00000000 ODSettingsMax                             : 0\n 0x0110 (0272) I 01000000 ODSettingsMax                             : 1\n 0x0114 (0276) I 01000000 ODSettingsMax                             : 1\n 0x0118 (0280) I 01000000 ODSettingsMax                             : 1\n 0x011c (0284) I 5f000000 ODSettingsMax                             : 95\n 0x0120 (0288) I 64000000 ODSettingsMax                             : 100\n 0x0124 (0292) I 5f000000 ODSettingsMax                             : 95\n 0x0128 (0296) I 64000000 ODSettingsMax                             : 100\n 0x012c (0300) I 5f000000 ODSettingsMax                             : 95\n 0x0130 (0304) I 64000000 ODSettingsMax                             : 100\n 0x0134 (0308) I 5f000000 ODSettingsMax                             : 95\n 0x0138 (0312) I 64000000 ODSettingsMax                             : 100\n 0x013c (0316) I 5f000000 ODSettingsMax                             : 95\n 0x0140 (0320) I 64000000 ODSettingsMax                             : 100\n 0x0144 (0324) I 00000000 ODSettingsMax                             : 0\n 0x0148 (0328) I 00000000 ODSettingsMax                             : 0\n 0x014c (0332) I 00000000 ODSettingsMax                             : 0\n 0x0150 (0336) I 28030000 ODSettingsMin                             : 808\n 0x0154 (0340) I 28030000 ODSettingsMin                             : 808\n 0x0158 (0344) I 28030000 ODSettingsMin                             : 808\n 0x015c (0348) I e2020000 ODSettingsMin                             : 738\n 0x0160 (0352) I 28030000 ODSettingsMin                             : 808\n 0x0164 (0356) I e2020000 ODSettingsMin                             : 738\n 0x0168 (0360) I 28030000 ODSettingsMin                             : 808\n 0x016c (0364) I e2020000 ODSettingsMin                             : 738\n 0x0170 (0368) I 5e010000 ODSettingsMin                             : 350\n 0x0174 (0372) I 14000000 ODSettingsMin                             : 20\n 0x0178 (0376) I c2010000 ODSettingsMin                             : 450\n 0x017c (0380) I c2010000 ODSettingsMin                             : 450\n 0x0180 (0384) I 19000000 ODSettingsMin                             : 25\n 0x0184 (0388) I 32000000 ODSettingsMin                             : 50\n 0x0188 (0392) I 00000000 ODSettingsMin                             : 0\n 0x018c (0396) I 00000000 ODSettingsMin                             : 0\n 0x0190 (0400) I 00000000 ODSettingsMin                             : 0\n 0x0194 (0404) I 00000000 ODSettingsMin                             : 0\n 0x0198 (0408) I 00000000 ODSettingsMin                             : 0\n 0x019c (0412) I 19000000 ODSettingsMin                             : 25\n 0x01a0 (0416) I 14000000 ODSettingsMin                             : 20\n 0x01a4 (0420) I 19000000 ODSettingsMin                             : 25\n 0x01a8 (0424) I 14000000 ODSettingsMin                             : 20\n 0x01ac (0428) I 19000000 ODSettingsMin                             : 25\n 0x01b0 (0432) I 14000000 ODSettingsMin                             : 20\n 0x01b4 (0436) I 19000000 ODSettingsMin                             : 25\n 0x01b8 (0440) I 14000000 ODSettingsMin                             : 20\n 0x01bc (0444) I 19000000 ODSettingsMin                             : 25\n 0x01c0 (0448) I 14000000 ODSettingsMin                             : 20\n 0x01c4 (0452) I 00000000 ODSettingsMin                             : 0\n 0x01c8 (0456) I 00000000 ODSettingsMin                             : 0\n 0x01cc (0460) I 00000000 ODSettingsMin                             : 0\n 0x01d0 (0464) H     0000 Reserve                                   : 0\n 0x01d2 (0466) H     0000 Reserve                                   : 0\n 0x01d4 (0468) H     0000 Reserve                                   : 0\n 0x01d6 (0470) H     0000 Reserve                                   : 0\n 0x01d8 (0472) H     0000 Reserve                                   : 0\n 0x01da (0474) I 03000000 Version                                   : 3\n 0x01de (0478) I ffeff439 FeaturesToRun                             : 972353535\n 0x01e2 (0482) I 00000000 FeaturesToRun                             : 0\n 0x01e6 (0486) H     fa00 SocketPowerLimitAc0                       : 250\n 0x01e8 (0488) H     0000 SocketPowerLimitAc0Tau                    : 0\n 0x01ea (0490) H     0000 SocketPowerLimitAc1                       : 0\n 0x01ec (0492) H     0000 SocketPowerLimitAc1Tau                    : 0\n 0x01ee (0494) H     0000 SocketPowerLimitAc2                       : 0\n 0x01f0 (0496) H     0000 SocketPowerLimitAc2Tau                    : 0\n 0x01f2 (0498) H     0000 SocketPowerLimitAc3                       : 0\n 0x01f4 (0500) H     0000 SocketPowerLimitAc3Tau                    : 0\n 0x01f6 (0502) H     fa00 SocketPowerLimitDc                        : 250\n 0x01f8 (0504) H     0000 SocketPowerLimitDcTau                     : 0\n 0x01fa (0506) H     3200 TdcLimitSoc                               : 50\n 0x01fc (0508) H     0000 TdcLimitSocTau                            : 0\n 0x01fe (0510) H     4a01 TdcLimitGfx                               : 330\n 0x0200 (0512) H     0000 TdcLimitGfxTau                            : 0\n 0x0202 (0514) H     6400 TedgeLimit                                : 100\n 0x0204 (0516) H     6e00 ThotspotLimit                             : 110\n 0x0206 (0518) H     5e00 ThbmLimit                                 : 94\n 0x0208 (0520) H     7300 Tvr_gfxLimit                              : 115\n 0x020a (0522) H     7300 Tvr_memLimit                              : 115\n 0x020c (0524) H     ffff Tliquid1Limit                             : 65535\n 0x020e (0526) H     ffff Tliquid2Limit                             : 65535\n 0x0210 (0528) H     ffff TplxLimit                                 : 65535\n 0x0212 (0530) I 00000000 FitLimit                                  : 0\n 0x0216 (0534) H     0000 PpmPowerLimit                             : 0\n 0x0218 (0536) H     0000 PpmTemperatureThreshold                   : 0\n 0x021a (0538) B       01 MemoryOnPackage                           : 1\n 0x021b (0539) B       00 padding8_limits                           : 0\n 0x021c (0540) H     7300 Tvr_SocLimit                              : 115\n 0x021e (0542) H     0000 UlvVoltageOffsetSoc                       : 0\n 0x0220 (0544) H     0000 UlvVoltageOffsetGfx                       : 0\n 0x0222 (0546) B       00 UlvSmnclkDid                              : 0\n 0x0223 (0547) B       00 UlvMp1clkDid                              : 0\n 0x0224 (0548) B       00 UlvGfxclkBypass                           : 0\n 0x0225 (0549) B       00 Padding234                                : 0\n 0x0226 (0550) H     860b MinVoltageGfx                             : 2950\n 0x0228 (0552) H     220b MinVoltageSoc                             : 2850\n 0x022a (0554) H     0b13 MaxVoltageGfx                             : 4875\n 0x022c (0556) H     4312 MaxVoltageSoc                             : 4675\n 0x022e (0558) H     2600 LoadLineResistanceGfx                     : 38\n 0x0230 (0560) H     0000 LoadLineResistanceSoc                     : 0\n 0x0232 (0562) B       01 VoltageMode                               : 1\n 0x0233 (0563) B       01 SnapToDiscrete                            : 1\n 0x0234 (0564) B       09 NumDiscreteLevels                         : 9\n 0x0235 (0565) B       00 padding                                   : 0\n 0x0236 (0566) f 00000000 m                                         : 0\n 0x023a (0570) f 00000000 b                                         : 0\n 0x023e (0574) f 5bb1bf3e a                                         : 0.3744\n 0x0242 (0578) f ec51f8be b                                         :-0.485\n 0x0246 (0582) f 6519523f c                                         : 0.8207\n 0x024a (0586) B       00 VoltageMode                               : 0\n 0x024b (0587) B       01 SnapToDiscrete                            : 1\n 0x024c (0588) B       08 NumDiscreteLevels                         : 8\n 0x024d (0589) B       00 padding                                   : 0\n 0x024e (0590) f 643b9f3f m                                         : 1.244\n 0x0252 (0594) f 16dea5bd b                                         :-0.08099\n 0x0256 (0598) f 00000000 a                                         : 0\n 0x025a (0602) f 00000000 b                                         : 0\n 0x025e (0606) f 00000000 c                                         : 0\n 0x0262 (0610) B       00 VoltageMode                               : 0\n 0x0263 (0611) B       01 SnapToDiscrete                            : 1\n 0x0264 (0612) B       08 NumDiscreteLevels                         : 8\n 0x0265 (0613) B       00 padding                                   : 0\n 0x0266 (0614) f 355e9a3f m                                         : 1.206\n 0x026a (0618) f 8f362e3e b                                         : 0.17013\n 0x026e (0622) f 00000000 a                                         : 0\n 0x0272 (0626) f 00000000 b                                         : 0\n 0x0276 (0630) f 00000000 c                                         : 0\n 0x027a (0634) B       00 VoltageMode                               : 0\n 0x027b (0635) B       01 SnapToDiscrete                            : 1\n 0x027c (0636) B       08 NumDiscreteLevels                         : 8\n 0x027d (0637) B       00 padding                                   : 0\n 0x027e (0638) f 696fb03f m                                         : 1.3784\n 0x0282 (0642) f 4833163d b                                         : 0.03667\n 0x0286 (0646) f 00000000 a                                         : 0\n 0x028a (0650) f 00000000 b                                         : 0\n 0x028e (0654) f 00000000 c                                         : 0\n 0x0292 (0658) B       00 VoltageMode                               : 0\n 0x0293 (0659) B       01 SnapToDiscrete                            : 1\n 0x0294 (0660) B       08 NumDiscreteLevels                         : 8\n 0x0295 (0661) B       00 padding                                   : 0\n 0x0296 (0662) f e561a13f m                                         : 1.2608\n 0x029a (0666) f 12f758bd b                                         :-0.05297\n 0x029e (0670) f 00000000 a                                         : 0\n 0x02a2 (0674) f 00000000 b                                         : 0\n 0x02a6 (0678) f 00000000 c                                         : 0\n 0x02aa (0682) B       00 VoltageMode                               : 0\n 0x02ab (0683) B       01 SnapToDiscrete                            : 1\n 0x02ac (0684) B       03 NumDiscreteLevels                         : 3\n 0x02ad (0685) B       00 padding                                   : 0\n 0x02ae (0686) f b515833f m                                         : 1.0241\n 0x02b2 (0690) f c2dd193e b                                         : 0.15026\n 0x02b6 (0694) f 00000000 a                                         : 0\n 0x02ba (0698) f 00000000 b                                         : 0\n 0x02be (0702) f 00000000 c                                         : 0\n 0x02c2 (0706) B       00 VoltageMode                               : 0\n 0x02c3 (0707) B       01 SnapToDiscrete                            : 1\n 0x02c4 (0708) B       08 NumDiscreteLevels                         : 8\n 0x02c5 (0709) B       00 padding                                   : 0\n 0x02c6 (0710) f 8638863f m                                         : 1.0486\n 0x02ca (0714) f 0ebe303e b                                         : 0.1726\n 0x02ce (0718) f 00000000 a                                         : 0\n 0x02d2 (0722) f 00000000 b                                         : 0\n 0x02d6 (0726) f 00000000 c                                         : 0\n 0x02da (0730) B       00 VoltageMode                               : 0\n 0x02db (0731) B       01 SnapToDiscrete                            : 1\n 0x02dc (0732) B       08 NumDiscreteLevels                         : 8\n 0x02dd (0733) B       00 padding                                   : 0\n 0x02de (0734) f 83c05a3f m                                         : 0.8545\n 0x02e2 (0738) f 4da1f33d b                                         : 0.11896\n 0x02e6 (0742) f 00000000 a                                         : 0\n 0x02ea (0746) f 00000000 b                                         : 0\n 0x02ee (0750) f 00000000 c                                         : 0\n 0x02f2 (0754) B       02 VoltageMode                               : 2\n 0x02f3 (0755) B       01 SnapToDiscrete                            : 1\n 0x02f4 (0756) B       08 NumDiscreteLevels                         : 8\n 0x02f5 (0757) B       00 padding                                   : 0\n 0x02f6 (0758) f 00000000 m                                         : 0\n 0x02fa (0762) f 00000000 b                                         : 0\n 0x02fe (0766) f a4708d3f a                                         : 1.105\n 0x0302 (0770) f e41485bf b                                         :-1.0397\n 0x0306 (0774) f d5e7323f c                                         : 0.69885\n 0x030a (0778) B       02 VoltageMode                               : 2\n 0x030b (0779) B       01 SnapToDiscrete                            : 1\n 0x030c (0780) B       03 NumDiscreteLevels                         : 3\n 0x030d (0781) B       00 padding                                   : 0\n 0x030e (0782) f 00000000 m                                         : 0\n 0x0312 (0786) f 00000000 b                                         : 0\n 0x0316 (0790) f 00000000 a                                         : 0\n 0x031a (0794) f 00000000 b                                         : 0\n 0x031e (0798) f d5e7323f c                                         : 0.69885\n 0x0322 (0802) B       01 VoltageMode                               : 1\n 0x0323 (0803) B       01 SnapToDiscrete                            : 1\n 0x0324 (0804) B       08 NumDiscreteLevels                         : 8\n 0x0325 (0805) B       00 padding                                   : 0\n 0x0326 (0806) f 0000803f m                                         : 1\n 0x032a (0810) f 00000000 b                                         : 0\n 0x032e (0814) f d191fc3e a                                         : 0.4933\n 0x0332 (0818) f 1f852bbf b                                         :-0.67\n 0x0336 (0822) f 3277753f c                                         : 0.95885\n 0x033a (0826) H     bc02 FreqTableGfx                              : 700\n 0x033c (0828) H     2803 FreqTableGfx                              : 808\n 0x033e (0830) H     6e04 FreqTableGfx                              : 1134\n 0x0340 (0832) H     5c05 FreqTableGfx                              : 1372\n 0x0342 (0834) H     0a06 FreqTableGfx                              : 1546\n 0x0344 (0836) H     9306 FreqTableGfx                              : 1683\n 0x0346 (0838) H     d506 FreqTableGfx                              : 1749\n 0x0348 (0840) H     ed06 FreqTableGfx                              : 1773\n 0x034a (0842) H     0907 FreqTableGfx                              : 1801\n 0x034c (0844) H     0000 FreqTableGfx                              : 0\n 0x034e (0846) H     0000 FreqTableGfx                              : 0\n 0x0350 (0848) H     0000 FreqTableGfx                              : 0\n 0x0352 (0850) H     0000 FreqTableGfx                              : 0\n 0x0354 (0852) H     0000 FreqTableGfx                              : 0\n 0x0356 (0854) H     0000 FreqTableGfx                              : 0\n 0x0358 (0856) H     0000 FreqTableGfx                              : 0\n 0x035a (0858) H     6601 FreqTableVclk                             : 358\n 0x035c (0860) H     e601 FreqTableVclk                             : 486\n 0x035e (0862) H     6b02 FreqTableVclk                             : 619\n 0x0360 (0864) H     f402 FreqTableVclk                             : 756\n 0x0362 (0866) H     5203 FreqTableVclk                             : 850\n 0x0364 (0868) H     cc03 FreqTableVclk                             : 972\n 0x0366 (0870) H     6e04 FreqTableVclk                             : 1134\n 0x0368 (0872) H     6e04 FreqTableVclk                             : 1134\n 0x036a (0874) H     3601 FreqTableDclk                             : 310\n 0x036c (0876) H     9001 FreqTableDclk                             : 400\n 0x036e (0878) H     0c02 FreqTableDclk                             : 524\n 0x0370 (0880) H     6b02 FreqTableDclk                             : 619\n 0x0372 (0882) H     a802 FreqTableDclk                             : 680\n 0x0374 (0884) H     f402 FreqTableDclk                             : 756\n 0x0376 (0886) H     5203 FreqTableDclk                             : 850\n 0x0378 (0888) H     cc03 FreqTableDclk                             : 972\n 0x037a (0890) H     3601 FreqTableEclk                             : 310\n 0x037c (0892) H     9001 FreqTableEclk                             : 400\n 0x037e (0894) H     0c02 FreqTableEclk                             : 524\n 0x0380 (0896) H     6b02 FreqTableEclk                             : 619\n 0x0382 (0898) H     a802 FreqTableEclk                             : 680\n 0x0384 (0900) H     f402 FreqTableEclk                             : 756\n 0x0386 (0902) H     5203 FreqTableEclk                             : 850\n 0x0388 (0904) H     cc03 FreqTableEclk                             : 972\n 0x038a (0906) H     3601 FreqTableSocclk                           : 310\n 0x038c (0908) H     0c02 FreqTableSocclk                           : 524\n 0x038e (0910) H     3702 FreqTableSocclk                           : 567\n 0x0390 (0912) H     6b02 FreqTableSocclk                           : 619\n 0x0392 (0914) H     a802 FreqTableSocclk                           : 680\n 0x0394 (0916) H     f402 FreqTableSocclk                           : 756\n 0x0396 (0918) H     5203 FreqTableSocclk                           : 850\n 0x0398 (0920) H     cc03 FreqTableSocclk                           : 972\n 0x039a (0922) H     5e01 FreqTableUclk                             : 350\n 0x039c (0924) H     2003 FreqTableUclk                             : 800\n 0x039e (0926) H     e803 FreqTableUclk                             : 1000\n 0x03a0 (0928) H     e803 FreqTableUclk                             : 1000\n 0x03a2 (0930) H     2602 FreqTableFclk                             : 550\n 0x03a4 (0932) H     6202 FreqTableFclk                             : 610\n 0x03a6 (0934) H     b202 FreqTableFclk                             : 690\n 0x03a8 (0936) H     f802 FreqTableFclk                             : 760\n 0x03aa (0938) H     6603 FreqTableFclk                             : 870\n 0x03ac (0940) H     c003 FreqTableFclk                             : 960\n 0x03ae (0942) H     3804 FreqTableFclk                             : 1080\n 0x03b0 (0944) H     c904 FreqTableFclk                             : 1225\n 0x03b2 (0946) H     6601 FreqTableDcefclk                          : 358\n 0x03b4 (0948) H     c601 FreqTableDcefclk                          : 454\n 0x03b6 (0950) H     3702 FreqTableDcefclk                          : 567\n 0x03b8 (0952) H     a802 FreqTableDcefclk                          : 680\n 0x03ba (0954) H     f402 FreqTableDcefclk                          : 756\n 0x03bc (0956) H     5203 FreqTableDcefclk                          : 850\n 0x03be (0958) H     cc03 FreqTableDcefclk                          : 972\n 0x03c0 (0960) H     6e04 FreqTableDcefclk                          : 1134\n 0x03c2 (0962) H     6601 FreqTableDispclk                          : 358\n 0x03c4 (0964) H     c601 FreqTableDispclk                          : 454\n 0x03c6 (0966) H     3702 FreqTableDispclk                          : 567\n 0x03c8 (0968) H     a802 FreqTableDispclk                          : 680\n 0x03ca (0970) H     f402 FreqTableDispclk                          : 756\n 0x03cc (0972) H     5203 FreqTableDispclk                          : 850\n 0x03ce (0974) H     cc03 FreqTableDispclk                          : 972\n 0x03d0 (0976) H     6e04 FreqTableDispclk                          : 1134\n 0x03d2 (0978) H     9300 FreqTablePixclk                           : 147\n 0x03d4 (0980) H     f200 FreqTablePixclk                           : 242\n 0x03d6 (0982) H     5801 FreqTablePixclk                           : 344\n 0x03d8 (0984) H     e401 FreqTablePixclk                           : 484\n 0x03da (0986) H     1502 FreqTablePixclk                           : 533\n 0x03dc (0988) H     aa03 FreqTablePixclk                           : 938\n 0x03de (0990) H     1304 FreqTablePixclk                           : 1043\n 0x03e0 (0992) H     3404 FreqTablePixclk                           : 1076\n 0x03e2 (0994) H     0e01 FreqTablePhyclk                           : 270\n 0x03e4 (0996) H     1c02 FreqTablePhyclk                           : 540\n 0x03e6 (0998) H     2a03 FreqTablePhyclk                           : 810\n 0x03e8 (1000) H     0000 FreqTablePhyclk                           : 0\n 0x03ea (1002) H     0000 FreqTablePhyclk                           : 0\n 0x03ec (1004) H     0000 FreqTablePhyclk                           : 0\n 0x03ee (1006) H     0000 FreqTablePhyclk                           : 0\n 0x03f0 (1008) H     0000 FreqTablePhyclk                           : 0\n 0x03f2 (1010) H     0907 DcModeMaxFreq                             : 1801\n 0x03f4 (1012) H     6e04 DcModeMaxFreq                             : 1134\n 0x03f6 (1014) H     cc03 DcModeMaxFreq                             : 972\n 0x03f8 (1016) H     cc03 DcModeMaxFreq                             : 972\n 0x03fa (1018) H     cc03 DcModeMaxFreq                             : 972\n 0x03fc (1020) H     e803 DcModeMaxFreq                             : 1000\n 0x03fe (1022) H     6e04 DcModeMaxFreq                             : 1134\n 0x0400 (1024) H     6e04 DcModeMaxFreq                             : 1134\n 0x0402 (1026) H     3404 DcModeMaxFreq                             : 1076\n 0x0404 (1028) H     2a03 DcModeMaxFreq                             : 810\n 0x0406 (1030) H     c904 DcModeMaxFreq                             : 1225\n 0x0408 (1032) H     0000 Padding8_Clks                             : 0\n 0x040a (1034) H     c800 Mp0clkFreq                                : 200\n 0x040c (1036) H     2c01 Mp0clkFreq                                : 300\n 0x040e (1038) H     6009 Mp0DpmVoltage                             : 2400\n 0x0410 (1040) H     f00a Mp0DpmVoltage                             : 2800\n 0x0412 (1042) H     2803 GfxclkFidle                               : 808\n 0x0414 (1044) H     0000 GfxclkSlewRate                            : 0\n 0x0416 (1046) H     0000 CksEnableFreq                             : 0\n 0x0418 (1048) H     0000 Padding789                                : 0\n 0x041a (1050) f 00000000 a                                         : 0\n 0x041e (1054) f 00000000 b                                         : 0\n 0x0422 (1058) f 00000000 c                                         : 0\n 0x0426 (1062) B       00 Padding567                                : 0\n 0x0427 (1063) B       00 Padding567                                : 0\n 0x0428 (1064) B       00 Padding567                                : 0\n 0x0429 (1065) B       00 Padding567                                : 0\n 0x042a (1066) H     0907 GfxclkDsMaxFreq                           : 1801\n 0x042c (1068) B       01 GfxclkSource                              : 1\n 0x042d (1069) B       00 Padding456                                : 0\n 0x042e (1070) B       00 LowestUclkReservedForUlv                  : 0\n 0x042f (1071) B       00 Padding8_Uclk                             : 0\n 0x0430 (1072) B       00 Padding8_Uclk                             : 0\n 0x0431 (1073) B       00 Padding8_Uclk                             : 0\n 0x0432 (1074) B       00 PcieGenSpeed                              : 0\n 0x0433 (1075) B       02 PcieGenSpeed                              : 2\n 0x0434 (1076) B       06 PcieLaneCount                             : 6\n 0x0435 (1077) B       06 PcieLaneCount                             : 6\n 0x0436 (1078) H     5000 LclkFreq                                  : 80\n 0x0438 (1080) H     3401 LclkFreq                                  : 308\n 0x043a (1082) H     0000 EnableTdpm                                : 0\n 0x043c (1084) H     0000 TdpmHighHystTemperature                   : 0\n 0x043e (1086) H     0000 TdpmLowHystTemperature                    : 0\n 0x0440 (1088) H     0000 GfxclkFreqHighTempLimit                   : 0\n 0x0442 (1090) H     0000 FanStopTemp                               : 0\n 0x0444 (1092) H     0000 FanStartTemp                              : 0\n 0x0446 (1094) H     9001 FanGainEdge                               : 400\n 0x0448 (1096) H     9001 FanGainHotspot                            : 400\n 0x044a (1098) H     9001 FanGainLiquid                             : 400\n 0x044c (1100) H     9001 FanGainVrGfx                              : 400\n 0x044e (1102) H     9001 FanGainVrSoc                              : 400\n 0x0450 (1104) H     9001 FanGainPlx                                : 400\n 0x0452 (1106) H     9001 FanGainHbm                                : 400\n 0x0454 (1108) H     1400 FanPwmMin                                 : 20\n 0x0456 (1110) H     540b FanAcousticLimitRpm                       : 2900\n 0x0458 (1112) H     540b FanThrottlingRpm                          : 2900\n 0x045a (1114) H     0a0f FanMaximumRpm                             : 3850\n 0x045c (1116) H     5f00 FanTargetTemperature                      : 95\n 0x045e (1118) H     0000 FanTargetGfxclk                           : 0\n 0x0460 (1120) B       00 FanZeroRpmEnable                          : 0\n 0x0461 (1121) B       02 FanTachEdgePerRev                         : 2\n 0x0462 (1122) h     0000 FuzzyFan_ErrorSetDelta                    : 0\n 0x0464 (1124) h     0000 FuzzyFan_ErrorRateSetDelta                : 0\n 0x0466 (1126) h     0000 FuzzyFan_PwmSetDelta                      : 0\n 0x0468 (1128) H     0000 FuzzyFan_Reserved                         : 0\n 0x046a (1130) B       00 OverrideAvfsGb                            : 0\n 0x046b (1131) B       01 OverrideAvfsGb                            : 1\n 0x046c (1132) B       00 Padding8_Avfs                             : 0\n 0x046d (1133) B       00 Padding8_Avfs                             : 0\n 0x046e (1134) f 00000000 a                                         : 0\n 0x0472 (1138) f 508d973c b                                         : 0.0185\n 0x0476 (1142) f 0ad7a33b c                                         : 0.005\n 0x047a (1146) f 00000000 a                                         : 0\n 0x047e (1150) f eab2983c b                                         : 0.01864\n 0x0482 (1154) f 87a2403d c                                         : 0.04703\n 0x0486 (1158) f 00000000 a                                         : 0\n 0x048a (1162) f 00000000 b                                         : 0\n 0x048e (1166) f 00000000 c                                         : 0\n 0x0492 (1170) f 00000000 a                                         : 0\n 0x0496 (1174) f 00000000 b                                         : 0\n 0x049a (1178) f 00000000 c                                         : 0\n 0x049e (1182) f 00000000 a                                         : 0\n 0x04a2 (1186) f 00000000 b                                         : 0\n 0x04a6 (1190) f 00000000 c                                         : 0\n 0x04aa (1194) f 00000000 a                                         : 0\n 0x04ae (1198) f 00000000 b                                         : 0\n 0x04b2 (1202) f 00000000 c                                         : 0\n 0x04b6 (1206) f 00000000 m                                         : 0\n 0x04ba (1210) f 00000000 b                                         : 0\n 0x04be (1214) f 00000000 m                                         : 0\n 0x04c2 (1218) f 00000000 b                                         : 0\n 0x04c6 (1222) f 00000000 a                                         : 0\n 0x04ca (1226) f 00000000 b                                         : 0\n 0x04ce (1230) f 00000000 c                                         : 0\n 0x04d2 (1234) f 00000000 a                                         : 0\n 0x04d6 (1238) f 00000000 b                                         : 0\n 0x04da (1242) f 00000000 c                                         : 0\n 0x04de (1246) H     0000 DcTol                                     : 0\n 0x04e0 (1248) H     a000 DcTol                                     : 160\n 0x04e2 (1250) B       01 DcBtcEnabled                              : 1\n 0x04e3 (1251) B       00 DcBtcEnabled                              : 0\n 0x04e4 (1252) B       00 Padding8_GfxBtc                           : 0\n 0x04e5 (1253) B       00 Padding8_GfxBtc                           : 0\n 0x04e6 (1254) h     0000 DcBtcMin                                  : 0\n 0x04e8 (1256) h     0000 DcBtcMin                                  : 0\n 0x04ea (1258) H     a000 DcBtcMax                                  : 160\n 0x04ec (1260) H     0000 DcBtcMax                                  : 0\n 0x04ee (1262) B       08 XgmiLinkSpeed                             : 8\n 0x04ef (1263) B       10 XgmiLinkSpeed                             : 16\n 0x04f0 (1264) B       02 XgmiLinkWidth                             : 2\n 0x04f1 (1265) B       10 XgmiLinkWidth                             : 16\n 0x04f2 (1266) H     1a04 XgmiFclkFreq                              : 1050\n 0x04f4 (1268) H     4c04 XgmiFclkFreq                              : 1100\n 0x04f6 (1270) H     e803 XgmiUclkFreq                              : 1000\n 0x04f8 (1272) H     e803 XgmiUclkFreq                              : 1000\n 0x04fa (1274) H     e803 XgmiSocclkFreq                            : 1000\n 0x04fc (1276) H     e803 XgmiSocclkFreq                            : 1000\n 0x04fe (1278) H     0000 XgmiSocVoltage                            : 0\n 0x0500 (1280) H     0000 XgmiSocVoltage                            : 0\n 0x0502 (1282) I 00000000 DebugOverrides                            : 0\n 0x0506 (1286) f 00000000 a                                         : 0\n 0x050a (1290) f 00000000 b                                         : 0\n 0x050e (1294) f 00000000 c                                         : 0\n 0x0512 (1298) f 00000000 a                                         : 0\n 0x0516 (1302) f 00000000 b                                         : 0\n 0x051a (1306) f 00000000 c                                         : 0\n 0x051e (1310) f 00000000 a                                         : 0\n 0x0522 (1314) f 00000000 b                                         : 0\n 0x0526 (1318) f 00000000 c                                         : 0\n 0x052a (1322) f 00000000 a                                         : 0\n 0x052e (1326) f 00000000 b                                         : 0\n 0x0532 (1330) f 00000000 c                                         : 0\n 0x0536 (1334) H     860b MinVoltageUlvGfx                          : 2950\n 0x0538 (1336) H     220b MinVoltageUlvSoc                          : 2850\n 0x053a (1338) H     540b MGpuFanBoostLimitRpm                      : 2900\n 0x053c (1340) H     0000 Fan                                       : 0\n 0x053e (1342) H     9001 FanGainVrMem0                             : 400\n 0x0540 (1344) H     9001 FanGainVrMem1                             : 400\n 0x0542 (1346) H     3800 DcBtcGb                                   : 56\n 0x0544 (1348) H     0000 DcBtcGb                                   : 0\n 0x0546 (1350) I 00000000 Reserved                                  : 0\n 0x054a (1354) I 00000000 Reserved                                  : 0\n 0x054e (1358) I 00000000 Reserved                                  : 0\n 0x0552 (1362) I 00000000 Reserved                                  : 0\n 0x0556 (1366) I 00000000 Reserved                                  : 0\n 0x055a (1370) I 00000000 Reserved                                  : 0\n 0x055e (1374) I 00000000 Reserved                                  : 0\n 0x0562 (1378) I 00000000 Reserved                                  : 0\n 0x0566 (1382) I 00000000 Reserved                                  : 0\n 0x056a (1386) I 00000000 Reserved                                  : 0\n 0x056e (1390) I 00000000 Reserved                                  : 0\n 0x0572 (1394) I 00000000 Padding32                                 : 0\n 0x0576 (1398) I 00000000 Padding32                                 : 0\n 0x057a (1402) I 00000000 Padding32                                 : 0\n 0x057e (1406) H     0000 MaxVoltageStepGfx                         : 0\n 0x0580 (1408) H     0000 MaxVoltageStepSoc                         : 0\n 0x0582 (1410) B       00 VddGfxVrMapping                           : 0\n 0x0583 (1411) B       00 VddSocVrMapping                           : 0\n 0x0584 (1412) B       00 VddMem0VrMapping                          : 0\n 0x0585 (1413) B       00 VddMem1VrMapping                          : 0\n 0x0586 (1414) B       00 GfxUlvPhaseSheddingMask                   : 0\n 0x0587 (1415) B       00 SocUlvPhaseSheddingMask                   : 0\n 0x0588 (1416) B       00 ExternalSensorPresent                     : 0\n 0x0589 (1417) B       00 Padding8_V                                : 0\n 0x058a (1418) H     0000 GfxMaxCurrent                             : 0\n 0x058c (1420) b       00 GfxOffset                                 : 0\n 0x058d (1421) B       00 Padding_TelemetryGfx                      : 0\n 0x058e (1422) H     0000 SocMaxCurrent                             : 0\n 0x0590 (1424) b       00 SocOffset                                 : 0\n 0x0591 (1425) B       00 Padding_TelemetrySoc                      : 0\n 0x0592 (1426) H     0000 Mem0MaxCurrent                            : 0\n 0x0594 (1428) b       00 Mem0Offset                                : 0\n 0x0595 (1429) B       00 Padding_TelemetryMem0                     : 0\n 0x0596 (1430) H     0000 Mem1MaxCurrent                            : 0\n 0x0598 (1432) b       00 Mem1Offset                                : 0\n 0x0599 (1433) B       00 Padding_TelemetryMem1                     : 0\n 0x059a (1434) B       00 AcDcGpio                                  : 0\n 0x059b (1435) B       00 AcDcPolarity                              : 0\n 0x059c (1436) B       00 VR0HotGpio                                : 0\n 0x059d (1437) B       00 VR0HotPolarity                            : 0\n 0x059e (1438) B       00 VR1HotGpio                                : 0\n 0x059f (1439) B       00 VR1HotPolarity                            : 0\n 0x05a0 (1440) B       00 Padding1                                  : 0\n 0x05a1 (1441) B       00 Padding2                                  : 0\n 0x05a2 (1442) B       00 LedPin0                                   : 0\n 0x05a3 (1443) B       00 LedPin1                                   : 0\n 0x05a4 (1444) B       00 LedPin2                                   : 0\n 0x05a5 (1445) B       00 padding8_4                                : 0\n 0x05a6 (1446) B       00 PllGfxclkSpreadEnabled                    : 0\n 0x05a7 (1447) B       00 PllGfxclkSpreadPercent                    : 0\n 0x05a8 (1448) H     0000 PllGfxclkSpreadFreq                       : 0\n 0x05aa (1450) B       00 UclkSpreadEnabled                         : 0\n 0x05ab (1451) B       00 UclkSpreadPercent                         : 0\n 0x05ac (1452) H     0000 UclkSpreadFreq                            : 0\n 0x05ae (1454) B       00 FclkSpreadEnabled                         : 0\n 0x05af (1455) B       00 FclkSpreadPercent                         : 0\n 0x05b0 (1456) H     0000 FclkSpreadFreq                            : 0\n 0x05b2 (1458) B       00 FllGfxclkSpreadEnabled                    : 0\n 0x05b3 (1459) B       00 FllGfxclkSpreadPercent                    : 0\n 0x05b4 (1460) H     0000 FllGfxclkSpreadFreq                       : 0\n 0x05b6 (1462) I 00000000 Enabled                                   : 0\n 0x05ba (1466) I 00000000 SlaveAddress                              : 0\n 0x05be (1470) I 00000000 ControllerPort                            : 0\n 0x05c2 (1474) I 00000000 ControllerName                            : 0\n 0x05c6 (1478) I 00000000 ThermalThrottler                          : 0\n 0x05ca (1482) I 00000000 I2cProtocol                               : 0\n 0x05ce (1486) I 00000000 I2cSpeed                                  : 0\n 0x05d2 (1490) I 00000000 Enabled                                   : 0\n 0x05d6 (1494) I 00000000 SlaveAddress                              : 0\n 0x05da (1498) I 00000000 ControllerPort                            : 0\n 0x05de (1502) I 00000000 ControllerName                            : 0\n 0x05e2 (1506) I 00000000 ThermalThrottler                          : 0\n 0x05e6 (1510) I 00000000 I2cProtocol                               : 0\n 0x05ea (1514) I 00000000 I2cSpeed                                  : 0\n 0x05ee (1518) I 00000000 Enabled                                   : 0\n 0x05f2 (1522) I 00000000 SlaveAddress                              : 0\n 0x05f6 (1526) I 00000000 ControllerPort                            : 0\n 0x05fa (1530) I 00000000 ControllerName                            : 0\n 0x05fe (1534) I 00000000 ThermalThrottler                          : 0\n 0x0602 (1538) I 00000000 I2cProtocol                               : 0\n 0x0606 (1542) I 00000000 I2cSpeed                                  : 0\n 0x060a (1546) I 00000000 Enabled                                   : 0\n 0x060e (1550) I 00000000 SlaveAddress                              : 0\n 0x0612 (1554) I 00000000 ControllerPort                            : 0\n 0x0616 (1558) I 00000000 ControllerName                            : 0\n 0x061a (1562) I 00000000 ThermalThrottler                          : 0\n 0x061e (1566) I 00000000 I2cProtocol                               : 0\n 0x0622 (1570) I 00000000 I2cSpeed                                  : 0\n 0x0626 (1574) I 00000000 Enabled                                   : 0\n 0x062a (1578) I 00000000 SlaveAddress                              : 0\n 0x062e (1582) I 00000000 ControllerPort                            : 0\n 0x0632 (1586) I 00000000 ControllerName                            : 0\n 0x0636 (1590) I 00000000 ThermalThrottler                          : 0\n 0x063a (1594) I 00000000 I2cProtocol                               : 0\n 0x063e (1598) I 00000000 I2cSpeed                                  : 0\n 0x0642 (1602) I 00000000 Enabled                                   : 0\n 0x0646 (1606) I 00000000 SlaveAddress                              : 0\n 0x064a (1610) I 00000000 ControllerPort                            : 0\n 0x064e (1614) I 00000000 ControllerName                            : 0\n 0x0652 (1618) I 00000000 ThermalThrottler                          : 0\n 0x0656 (1622) I 00000000 I2cProtocol                               : 0\n 0x065a (1626) I 00000000 I2cSpeed                                  : 0\n 0x065e (1630) I 00000000 Enabled                                   : 0\n 0x0662 (1634) I 00000000 SlaveAddress                              : 0\n 0x0666 (1638) I 00000000 ControllerPort                            : 0\n 0x066a (1642) I 00000000 ControllerName                            : 0\n 0x066e (1646) I 00000000 ThermalThrottler                          : 0\n 0x0672 (1650) I 00000000 I2cProtocol                               : 0\n 0x0676 (1654) I 00000000 I2cSpeed                                  : 0\n 0x067a (1658) I 00000000 BoardReserved                             : 0\n 0x067e (1662) I 00000000 BoardReserved                             : 0\n 0x0682 (1666) I 00000000 BoardReserved                             : 0\n 0x0686 (1670) I 00000000 BoardReserved                             : 0\n 0x068a (1674) I 00000000 BoardReserved                             : 0\n 0x068e (1678) I 00000000 BoardReserved                             : 0\n 0x0692 (1682) I 00000000 BoardReserved                             : 0\n 0x0696 (1686) I 00000000 BoardReserved                             : 0\n 0x069a (1690) I 00000000 BoardReserved                             : 0\n 0x069e (1694) I 00000000 BoardReserved                             : 0\n 0x06a2 (1698) I 00000000 MmHubPadding                              : 0\n 0x06a6 (1702) I 00000000 MmHubPadding                              : 0\n 0x06aa (1706) I 00000000 MmHubPadding                              : 0\n 0x06ae (1710) I 00000000 MmHubPadding                              : 0\n 0x06b2 (1714) I 00000000 MmHubPadding                              : 0\n 0x06b6 (1718) I 00000000 MmHubPadding                              : 0\n 0x06ba (1722) I 00000000 MmHubPadding                              : 0\n 0x06be (1726) I 00000000 MmHubPadding                              : 0\n"
  },
  {
    "path": "test/MI100_000.000.000.000.016113_113-D3431401-100.rom.dump",
    "content": "header:\n  structuresize: 1494\n  format_revision: 13\n  content_revision: 0\ntable_revision: 1\ntable_size: 482\ngolden_pp_id: 2462\ngolden_revision: 16007\nformat_id: 126\nplatform_caps: 8\nthermal_controller_type: 28\nsmall_power_limit1: 290\nsmall_power_limit2: 290\nboost_power_limit: 290\nod_turbo_power_limit: 0\nod_power_save_power_limit: 0\nsoftware_shutdown_temp: 108\nreserve:\n  reserve 0: 0\n  reserve 1: 0\n  reserve 2: 0\n  reserve 3: 0\n  reserve 4: 0\n  reserve 5: 0\npower_saving_clock:\n  revision: 1\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  count: 10\n  max:\n    max 0: 0\n    max 1: 0\n    max 2: 0\n    max 3: 0\n    max 4: 0\n    max 5: 0\n    max 6: 0\n    max 7: 0\n    max 8: 0\n    max 9: 0\n    max 10: 0\n    max 11: 0\n    max 12: 0\n    max 13: 0\n    max 14: 0\n    max 15: 0\n  min:\n    min 0: 0\n    min 1: 0\n    min 2: 0\n    min 3: 0\n    min 4: 0\n    min 5: 0\n    min 6: 0\n    min 7: 0\n    min 8: 0\n    min 9: 0\n    min 10: 0\n    min 11: 0\n    min 12: 0\n    min 13: 0\n    min 14: 0\n    min 15: 0\noverdrive_table:\n  revision: 128\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  feature_count: 14\n  setting_count: 19\n  cap:\n    cap 0: 0\n    cap 1: 0\n    cap 2: 0\n    cap 3: 0\n    cap 4: 0\n    cap 5: 0\n    cap 6: 0\n    cap 7: 0\n    cap 8: 0\n    cap 9: 0\n    cap 10: 0\n    cap 11: 0\n    cap 12: 0\n    cap 13: 0\n    cap 14: 0\n    cap 15: 0\n    cap 16: 0\n    cap 17: 0\n    cap 18: 0\n    cap 19: 0\n    cap 20: 0\n    cap 21: 0\n    cap 22: 0\n    cap 23: 0\n    cap 24: 0\n    cap 25: 0\n    cap 26: 0\n    cap 27: 0\n    cap 28: 0\n    cap 29: 0\n    cap 30: 0\n    cap 31: 0\n  max:\n    max 0: 0\n    max 1: 0\n    max 2: 0\n    max 3: 0\n    max 4: 0\n    max 5: 0\n    max 6: 0\n    max 7: 0\n    max 8: 0\n    max 9: 0\n    max 10: 0\n    max 11: 0\n    max 12: 0\n    max 13: 0\n    max 14: 0\n    max 15: 0\n    max 16: 0\n    max 17: 0\n    max 18: 0\n    max 19: 0\n    max 20: 0\n    max 21: 0\n    max 22: 0\n    max 23: 0\n    max 24: 0\n    max 25: 0\n    max 26: 0\n    max 27: 0\n    max 28: 0\n    max 29: 0\n    max 30: 0\n    max 31: 0\n  min:\n    min 0: 0\n    min 1: 0\n    min 2: 0\n    min 3: 0\n    min 4: 0\n    min 5: 0\n    min 6: 0\n    min 7: 0\n    min 8: 0\n    min 9: 0\n    min 10: 0\n    min 11: 0\n    min 12: 0\n    min 13: 0\n    min 14: 0\n    min 15: 0\n    min 16: 0\n    min 17: 0\n    min 18: 0\n    min 19: 0\n    min 20: 0\n    min 21: 0\n    min 22: 0\n    min 23: 0\n    min 24: 0\n    min 25: 0\n    min 26: 0\n    min 27: 0\n    min 28: 0\n    min 29: 0\n    min 30: 0\n    min 31: 0\nsmc_pptable:\n  Version: 4\n  FeaturesToRun:\n    FeaturesToRun 0: 95155971\n    FeaturesToRun 1: 0\n  SocketPowerLimitAc:\n    SocketPowerLimitAc 0: 290\n    SocketPowerLimitAc 1: 391\n    SocketPowerLimitAc 2: 0\n    SocketPowerLimitAc 3: 0\n  SocketPowerLimitAcTau:\n    SocketPowerLimitAcTau 0: 5\n    SocketPowerLimitAcTau 1: 1\n    SocketPowerLimitAcTau 2: 0\n    SocketPowerLimitAcTau 3: 0\n  TdcLimitSoc: 50\n  TdcLimitSocTau: 0\n  TdcLimitGfx: 320\n  TdcLimitGfxTau: 0\n  TedgeLimit: 100\n  ThotspotLimit: 100\n  TmemLimit: 94\n  Tvr_gfxLimit: 103\n  Tvr_memLimit: 103\n  Tvr_socLimit: 103\n  FitLimit: 0\n  PpmPowerLimit: 0\n  PpmTemperatureThreshold: 0\n  ThrottlerControlMask: 2044\n  UlvVoltageOffsetGfx: 0\n  UlvPadding: 0\n  UlvGfxclkBypass: 0\n  Padding234:\n    Padding234 0: 0\n    Padding234 1: 0\n    Padding234 2: 0\n  MinVoltageGfx: 2700\n  MinVoltageSoc: 3500\n  MaxVoltageGfx: 4150\n  MaxVoltageSoc: 4200\n  LoadLineResistanceGfx: 25\n  LoadLineResistanceSoc: 0\n  DpmDescriptor:\n    DpmDescriptor 0:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 16\n      padding: 0\n      ConversionToAvfsClk:\n        m: 0\n        b: 0\n      SsCurve:\n        a: 0.17702\n        b: 0.0013\n        c: 0.60972\n      SsFmin: 300\n      Padding16: 0\n    DpmDescriptor 1:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 0.7374\n        b: 0.2015\n      SsCurve:\n        a: 0.2395\n        b:-0.198\n        c: 0.7078\n      SsFmin: 413\n      Padding16: 0\n    DpmDescriptor 2:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.114\n        b: 0.03267\n      SsCurve:\n        a: 0.4971\n        b:-0.419\n        c: 0.7549\n      SsFmin: 421\n      Padding16: 0\n    DpmDescriptor 3:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.075\n        b: 0.0286\n      SsCurve:\n        a: 0.4573\n        b:-0.432\n        c: 0.8233\n      SsFmin: 472\n      Padding16: 0\n    DpmDescriptor 4:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 4\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1.2161\n        b:-0.05914\n      SsCurve:\n        a: 0.5357\n        b:-0.549\n        c: 0.8838\n      SsFmin: 512\n      Padding16: 0\n    DpmDescriptor 5:\n      VoltageMode: 1\n      SnapToDiscrete: 1\n      NumDiscreteLevels: 8\n      padding: 0\n      ConversionToAvfsClk:\n        m: 1\n        b: 0\n      SsCurve:\n        a: 0.4561\n        b:-0.576\n        c: 0.9238\n      SsFmin: 631\n      Padding16: 0\n  FreqTableGfx:\n    FreqTableGfx 0: 300\n    FreqTableGfx 1: 495\n    FreqTableGfx 2: 731\n    FreqTableGfx 3: 962\n    FreqTableGfx 4: 1029\n    FreqTableGfx 5: 1086\n    FreqTableGfx 6: 1146\n    FreqTableGfx 7: 1188\n    FreqTableGfx 8: 1235\n    FreqTableGfx 9: 1283\n    FreqTableGfx 10: 1318\n    FreqTableGfx 11: 1363\n    FreqTableGfx 12: 1404\n    FreqTableGfx 13: 1430\n    FreqTableGfx 14: 1471\n    FreqTableGfx 15: 1502\n  FreqTableVclk:\n    FreqTableVclk 0: 600\n    FreqTableVclk 1: 706\n    FreqTableVclk 2: 800\n    FreqTableVclk 3: 858\n    FreqTableVclk 4: 924\n    FreqTableVclk 5: 1091\n    FreqTableVclk 6: 1200\n    FreqTableVclk 7: 1334\n  FreqTableDclk:\n    FreqTableDclk 0: 546\n    FreqTableDclk 1: 600\n    FreqTableDclk 2: 706\n    FreqTableDclk 3: 750\n    FreqTableDclk 4: 800\n    FreqTableDclk 5: 924\n    FreqTableDclk 6: 1000\n    FreqTableDclk 7: 1091\n  FreqTableSocclk:\n    FreqTableSocclk 0: 600\n    FreqTableSocclk 1: 667\n    FreqTableSocclk 2: 706\n    FreqTableSocclk 3: 750\n    FreqTableSocclk 4: 800\n    FreqTableSocclk 5: 858\n    FreqTableSocclk 6: 924\n    FreqTableSocclk 7: 1000\n  FreqTableUclk:\n    FreqTableUclk 0: 600\n    FreqTableUclk 1: 800\n    FreqTableUclk 2: 1000\n    FreqTableUclk 3: 1200\n  FreqTableFclk:\n    FreqTableFclk 0: 650\n    FreqTableFclk 1: 848\n    FreqTableFclk 2: 955\n    FreqTableFclk 3: 1060\n    FreqTableFclk 4: 1179\n    FreqTableFclk 5: 1236\n    FreqTableFclk 6: 1291\n    FreqTableFclk 7: 1403\n  Paddingclks:\n    Paddingclks 0: 0\n    Paddingclks 1: 0\n    Paddingclks 2: 0\n    Paddingclks 3: 0\n    Paddingclks 4: 0\n    Paddingclks 5: 0\n    Paddingclks 6: 0\n    Paddingclks 7: 0\n    Paddingclks 8: 0\n    Paddingclks 9: 0\n    Paddingclks 10: 0\n    Paddingclks 11: 0\n    Paddingclks 12: 0\n    Paddingclks 13: 0\n    Paddingclks 14: 0\n    Paddingclks 15: 0\n  Mp0clkFreq:\n    Mp0clkFreq 0: 300\n    Mp0clkFreq 1: 500\n  Mp0DpmVoltage:\n    Mp0DpmVoltage 0: 2850\n    Mp0DpmVoltage 1: 2850\n  GfxclkFidle: 300\n  GfxclkSlewRate: 0\n  Padding567:\n    Padding567 0: 0\n    Padding567 1: 0\n    Padding567 2: 0\n    Padding567 3: 0\n  GfxclkDsMaxFreq: 1502\n  GfxclkSource: 1\n  Padding456: 0\n  EnableTdpm: 0\n  TdpmHighHystTemperature: 0\n  TdpmLowHystTemperature: 0\n  GfxclkFreqHighTempLimit: 0\n  FanStopTemp: 0\n  FanStartTemp: 0\n  FanGainEdge: 0\n  FanGainHotspot: 400\n  FanGainVrGfx: 400\n  FanGainVrSoc: 400\n  FanGainVrMem: 400\n  FanGainHbm: 400\n  FanPwmMin: 20\n  FanAcousticLimitRpm: 2900\n  FanThrottlingRpm: 2900\n  FanMaximumRpm: 3850\n  FanTargetTemperature: 90\n  FanTargetGfxclk: 300\n  FanZeroRpmEnable: 0\n  FanTachEdgePerRev: 2\n  FanTempInputSelect: 1\n  padding8_Fan: 0\n  FuzzyFan_ErrorSetDelta: 0\n  FuzzyFan_ErrorRateSetDelta: 0\n  FuzzyFan_PwmSetDelta: 0\n  FuzzyFan_Reserved: 0\n  OverrideAvfsGb:\n    OverrideAvfsGb 0: 1\n    OverrideAvfsGb 1: 1\n  Padding8_Avfs:\n    Padding8_Avfs 0: 0\n    Padding8_Avfs 1: 0\n  qAvfsGb:\n    qAvfsGb 0:\n      a: 0.03647\n      b:-0.03839\n      c: 0.03198\n    qAvfsGb 1:\n      a: 0\n      b: 0\n      c: 0.04\n  dBtcGbGfxPll:\n    a: 0\n    b: 0\n    c: 0\n  dBtcGbGfxAfll:\n    a:-0.0336\n    b: 0.0957\n    c:-0.06153\n  dBtcGbSoc:\n    a: 0.16426\n    b: 0.03781\n    c:-0.07586\n  qAgingGb:\n    qAgingGb 0:\n      m: 0\n      b: 0\n    qAgingGb 1:\n      m: 0\n      b: 0\n  qStaticVoltageOffset:\n    qStaticVoltageOffset 0:\n      a: 0\n      b: 0\n      c: 0\n    qStaticVoltageOffset 1:\n      a: 0\n      b: 0\n      c: 0\n  DcTol:\n    DcTol 0: 308\n    DcTol 1: 308\n  DcBtcEnabled:\n    DcBtcEnabled 0: 1\n    DcBtcEnabled 1: 1\n  Padding8_GfxBtc:\n    Padding8_GfxBtc 0: 0\n    Padding8_GfxBtc 1: 0\n  DcBtcMin:\n    DcBtcMin 0: 95\n    DcBtcMin 1: 95\n  DcBtcMax:\n    DcBtcMax 0: 308\n    DcBtcMax 1: 308\n  DcBtcGb:\n    DcBtcGb 0: 25\n    DcBtcGb 1: 25\n  XgmiDpmPstates:\n    XgmiDpmPstates 0: 3\n    XgmiDpmPstates 1: 0\n  XgmiDpmSpare:\n    XgmiDpmSpare 0: 0\n    XgmiDpmSpare 1: 0\n  VDDGFX_TVmin: 0\n  VDDSOC_TVmin: 0\n  VDDGFX_Vmin_HiTemp: 0\n  VDDGFX_Vmin_LoTemp: 0\n  VDDSOC_Vmin_HiTemp: 0\n  VDDSOC_Vmin_LoTemp: 0\n  VDDGFX_TVminHystersis: 0\n  VDDSOC_TVminHystersis: 0\n  DebugOverrides: 0\n  ReservedEquation0:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation1:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation2:\n    a: 0\n    b: 0\n    c: 0\n  ReservedEquation3:\n    a: 0\n    b: 0\n    c: 0\n  MinVoltageUlvGfx: 2700\n  PaddingUlv: 0\n  TotalPowerConfig: 3\n  TotalPowerSpare1: 0\n  TotalPowerSpare2: 0\n  PccThresholdLow: 0\n  PccThresholdHigh: 0\n  PaddingAPCC:\n    PaddingAPCC 0: 0\n    PaddingAPCC 1: 0\n    PaddingAPCC 2: 0\n    PaddingAPCC 3: 0\n    PaddingAPCC 4: 0\n    PaddingAPCC 5: 0\n  BasePerformanceCardPower: 300\n  MaxPerformanceCardPower: 300\n  BasePerformanceFrequencyCap: 0\n  MaxPerformanceFrequencyCap: 0\n  VDDGFX_VminLow: 2550\n  VDDGFX_TVminLow: 0\n  VDDGFX_VminLow_HiTemp: 0\n  VDDGFX_VminLow_LoTemp: 0\n  Reserved:\n    Reserved 0: 0\n    Reserved 1: 0\n    Reserved 2: 0\n    Reserved 3: 0\n    Reserved 4: 0\n    Reserved 5: 0\n    Reserved 6: 0\n  MaxVoltageStepGfx: 0\n  MaxVoltageStepSoc: 0\n  VddGfxVrMapping: 0\n  VddSocVrMapping: 0\n  VddMemVrMapping: 0\n  BoardVrMapping: 0\n  GfxUlvPhaseSheddingMask: 0\n  ExternalSensorPresent: 0\n  Padding8_V:\n    Padding8_V 0: 0\n    Padding8_V 1: 0\n  GfxMaxCurrent: 0\n  GfxOffset: 0\n  Padding_TelemetryGfx: 0\n  SocMaxCurrent: 0\n  SocOffset: 0\n  Padding_TelemetrySoc: 0\n  MemMaxCurrent: 0\n  MemOffset: 0\n  Padding_TelemetryMem: 0\n  BoardMaxCurrent: 0\n  BoardOffset: 0\n  Padding_TelemetryBoardInput: 0\n  VR0HotGpio: 0\n  VR0HotPolarity: 0\n  VR1HotGpio: 0\n  VR1HotPolarity: 0\n  PllGfxclkSpreadEnabled: 0\n  PllGfxclkSpreadPercent: 0\n  PllGfxclkSpreadFreq: 0\n  UclkSpreadEnabled: 0\n  UclkSpreadPercent: 0\n  UclkSpreadFreq: 0\n  FclkSpreadEnabled: 0\n  FclkSpreadPercent: 0\n  FclkSpreadFreq: 0\n  FllGfxclkSpreadEnabled: 0\n  FllGfxclkSpreadPercent: 0\n  FllGfxclkSpreadFreq: 0\n  I2cControllers:\n    I2cControllers 0:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 1:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 2:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 3:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 4:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 5:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 6:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n    I2cControllers 7:\n      Enabled: 0\n      Speed: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n      SlaveAddress: 0\n      ControllerPort: 0\n      ControllerName: 0\n      ThermalThrotter: 0\n      I2cProtocol: 0\n  MemoryChannelEnabled: 0\n  DramBitWidth: 0\n  PaddingMem:\n    PaddingMem 0: 0\n    PaddingMem 1: 0\n    PaddingMem 2: 0\n  TotalBoardPower: 0\n  BoardPadding: 0\n  XgmiLinkSpeed:\n    XgmiLinkSpeed 0: 0\n    XgmiLinkSpeed 1: 0\n    XgmiLinkSpeed 2: 0\n    XgmiLinkSpeed 3: 0\n  XgmiLinkWidth:\n    XgmiLinkWidth 0: 0\n    XgmiLinkWidth 1: 0\n    XgmiLinkWidth 2: 0\n    XgmiLinkWidth 3: 0\n  XgmiFclkFreq:\n    XgmiFclkFreq 0: 0\n    XgmiFclkFreq 1: 0\n    XgmiFclkFreq 2: 0\n    XgmiFclkFreq 3: 0\n  XgmiSocVoltage:\n    XgmiSocVoltage 0: 0\n    XgmiSocVoltage 1: 0\n    XgmiSocVoltage 2: 0\n    XgmiSocVoltage 3: 0\n  GpioI2cScl: 0\n  GpioI2cSda: 0\n  GpioPadding: 0\n  BoardVoltageCoeffA: 0\n  BoardVoltageCoeffB: 0\n  BoardReserved:\n    BoardReserved 0: 0\n    BoardReserved 1: 0\n    BoardReserved 2: 0\n    BoardReserved 3: 0\n    BoardReserved 4: 0\n    BoardReserved 5: 0\n    BoardReserved 6: 0\n  MmHubPadding:\n    MmHubPadding 0: 0\n    MmHubPadding 1: 0\n    MmHubPadding 2: 0\n    MmHubPadding 3: 0\n    MmHubPadding 4: 0\n    MmHubPadding 5: 0\n    MmHubPadding 6: 0\n    MmHubPadding 7: 0\n"
  },
  {
    "path": "test/MI100_000.000.000.000.016113_113-D3431401-100.rom.rawdump",
    "content": "PowerPlay table rev 13.0 size 1494 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     d605 structuresize                             : 1494\n 0x0002 (0002) B       0d format_revision                           : 13\n 0x0003 (0003) B       00 content_revision                          : 0\n 0x0004 (0004) B       01 table_revision                            : 1\n 0x0005 (0005) H     e201 table_size                                : 482\n 0x0007 (0007) I 9e090000 golden_pp_id                              : 2462\n 0x000b (0011) I 873e0000 golden_revision                           : 16007\n 0x000f (0015) H     7e00 format_id                                 : 126\n 0x0011 (0017) I 08000000 platform_caps                             : 8\n 0x0015 (0021) B       1c thermal_controller_type                   : 28\n 0x0016 (0022) H     2201 small_power_limit1                        : 290\n 0x0018 (0024) H     2201 small_power_limit2                        : 290\n 0x001a (0026) H     2201 boost_power_limit                         : 290\n 0x001c (0028) H     0000 od_turbo_power_limit                      : 0\n 0x001e (0030) H     0000 od_power_save_power_limit                 : 0\n 0x0020 (0032) H     6c00 software_shutdown_temp                    : 108\n 0x0022 (0034) H     0000 reserve                                   : 0\n 0x0024 (0036) H     0000 reserve                                   : 0\n 0x0026 (0038) H     0000 reserve                                   : 0\n 0x0028 (0040) H     0000 reserve                                   : 0\n 0x002a (0042) H     0000 reserve                                   : 0\n 0x002c (0044) H     0000 reserve                                   : 0\n 0x002e (0046) B       01 revision                                  : 1\n 0x002f (0047) B       00 reserve                                   : 0\n 0x0030 (0048) B       00 reserve                                   : 0\n 0x0031 (0049) B       00 reserve                                   : 0\n 0x0032 (0050) I 0a000000 count                                     : 10\n 0x0036 (0054) I 00000000 max                                       : 0\n 0x003a (0058) I 00000000 max                                       : 0\n 0x003e (0062) I 00000000 max                                       : 0\n 0x0042 (0066) I 00000000 max                                       : 0\n 0x0046 (0070) I 00000000 max                                       : 0\n 0x004a (0074) I 00000000 max                                       : 0\n 0x004e (0078) I 00000000 max                                       : 0\n 0x0052 (0082) I 00000000 max                                       : 0\n 0x0056 (0086) I 00000000 max                                       : 0\n 0x005a (0090) I 00000000 max                                       : 0\n 0x005e (0094) I 00000000 max                                       : 0\n 0x0062 (0098) I 00000000 max                                       : 0\n 0x0066 (0102) I 00000000 max                                       : 0\n 0x006a (0106) I 00000000 max                                       : 0\n 0x006e (0110) I 00000000 max                                       : 0\n 0x0072 (0114) I 00000000 max                                       : 0\n 0x0076 (0118) I 00000000 min                                       : 0\n 0x007a (0122) I 00000000 min                                       : 0\n 0x007e (0126) I 00000000 min                                       : 0\n 0x0082 (0130) I 00000000 min                                       : 0\n 0x0086 (0134) I 00000000 min                                       : 0\n 0x008a (0138) I 00000000 min                                       : 0\n 0x008e (0142) I 00000000 min                                       : 0\n 0x0092 (0146) I 00000000 min                                       : 0\n 0x0096 (0150) I 00000000 min                                       : 0\n 0x009a (0154) I 00000000 min                                       : 0\n 0x009e (0158) I 00000000 min                                       : 0\n 0x00a2 (0162) I 00000000 min                                       : 0\n 0x00a6 (0166) I 00000000 min                                       : 0\n 0x00aa (0170) I 00000000 min                                       : 0\n 0x00ae (0174) I 00000000 min                                       : 0\n 0x00b2 (0178) I 00000000 min                                       : 0\n 0x00b6 (0182) B       80 revision                                  : 128\n 0x00b7 (0183) B       00 reserve                                   : 0\n 0x00b8 (0184) B       00 reserve                                   : 0\n 0x00b9 (0185) B       00 reserve                                   : 0\n 0x00ba (0186) I 0e000000 feature_count                             : 14\n 0x00be (0190) I 13000000 setting_count                             : 19\n 0x00c2 (0194) B       00 cap                                       : 0\n 0x00c3 (0195) B       00 cap                                       : 0\n 0x00c4 (0196) B       00 cap                                       : 0\n 0x00c5 (0197) B       00 cap                                       : 0\n 0x00c6 (0198) B       00 cap                                       : 0\n 0x00c7 (0199) B       00 cap                                       : 0\n 0x00c8 (0200) B       00 cap                                       : 0\n 0x00c9 (0201) B       00 cap                                       : 0\n 0x00ca (0202) B       00 cap                                       : 0\n 0x00cb (0203) B       00 cap                                       : 0\n 0x00cc (0204) B       00 cap                                       : 0\n 0x00cd (0205) B       00 cap                                       : 0\n 0x00ce (0206) B       00 cap                                       : 0\n 0x00cf (0207) B       00 cap                                       : 0\n 0x00d0 (0208) B       00 cap                                       : 0\n 0x00d1 (0209) B       00 cap                                       : 0\n 0x00d2 (0210) B       00 cap                                       : 0\n 0x00d3 (0211) B       00 cap                                       : 0\n 0x00d4 (0212) B       00 cap                                       : 0\n 0x00d5 (0213) B       00 cap                                       : 0\n 0x00d6 (0214) B       00 cap                                       : 0\n 0x00d7 (0215) B       00 cap                                       : 0\n 0x00d8 (0216) B       00 cap                                       : 0\n 0x00d9 (0217) B       00 cap                                       : 0\n 0x00da (0218) B       00 cap                                       : 0\n 0x00db (0219) B       00 cap                                       : 0\n 0x00dc (0220) B       00 cap                                       : 0\n 0x00dd (0221) B       00 cap                                       : 0\n 0x00de (0222) B       00 cap                                       : 0\n 0x00df (0223) B       00 cap                                       : 0\n 0x00e0 (0224) B       00 cap                                       : 0\n 0x00e1 (0225) B       00 cap                                       : 0\n 0x00e2 (0226) I 00000000 max                                       : 0\n 0x00e6 (0230) I 00000000 max                                       : 0\n 0x00ea (0234) I 00000000 max                                       : 0\n 0x00ee (0238) I 00000000 max                                       : 0\n 0x00f2 (0242) I 00000000 max                                       : 0\n 0x00f6 (0246) I 00000000 max                                       : 0\n 0x00fa (0250) I 00000000 max                                       : 0\n 0x00fe (0254) I 00000000 max                                       : 0\n 0x0102 (0258) I 00000000 max                                       : 0\n 0x0106 (0262) I 00000000 max                                       : 0\n 0x010a (0266) I 00000000 max                                       : 0\n 0x010e (0270) I 00000000 max                                       : 0\n 0x0112 (0274) I 00000000 max                                       : 0\n 0x0116 (0278) I 00000000 max                                       : 0\n 0x011a (0282) I 00000000 max                                       : 0\n 0x011e (0286) I 00000000 max                                       : 0\n 0x0122 (0290) I 00000000 max                                       : 0\n 0x0126 (0294) I 00000000 max                                       : 0\n 0x012a (0298) I 00000000 max                                       : 0\n 0x012e (0302) I 00000000 max                                       : 0\n 0x0132 (0306) I 00000000 max                                       : 0\n 0x0136 (0310) I 00000000 max                                       : 0\n 0x013a (0314) I 00000000 max                                       : 0\n 0x013e (0318) I 00000000 max                                       : 0\n 0x0142 (0322) I 00000000 max                                       : 0\n 0x0146 (0326) I 00000000 max                                       : 0\n 0x014a (0330) I 00000000 max                                       : 0\n 0x014e (0334) I 00000000 max                                       : 0\n 0x0152 (0338) I 00000000 max                                       : 0\n 0x0156 (0342) I 00000000 max                                       : 0\n 0x015a (0346) I 00000000 max                                       : 0\n 0x015e (0350) I 00000000 max                                       : 0\n 0x0162 (0354) I 00000000 min                                       : 0\n 0x0166 (0358) I 00000000 min                                       : 0\n 0x016a (0362) I 00000000 min                                       : 0\n 0x016e (0366) I 00000000 min                                       : 0\n 0x0172 (0370) I 00000000 min                                       : 0\n 0x0176 (0374) I 00000000 min                                       : 0\n 0x017a (0378) I 00000000 min                                       : 0\n 0x017e (0382) I 00000000 min                                       : 0\n 0x0182 (0386) I 00000000 min                                       : 0\n 0x0186 (0390) I 00000000 min                                       : 0\n 0x018a (0394) I 00000000 min                                       : 0\n 0x018e (0398) I 00000000 min                                       : 0\n 0x0192 (0402) I 00000000 min                                       : 0\n 0x0196 (0406) I 00000000 min                                       : 0\n 0x019a (0410) I 00000000 min                                       : 0\n 0x019e (0414) I 00000000 min                                       : 0\n 0x01a2 (0418) I 00000000 min                                       : 0\n 0x01a6 (0422) I 00000000 min                                       : 0\n 0x01aa (0426) I 00000000 min                                       : 0\n 0x01ae (0430) I 00000000 min                                       : 0\n 0x01b2 (0434) I 00000000 min                                       : 0\n 0x01b6 (0438) I 00000000 min                                       : 0\n 0x01ba (0442) I 00000000 min                                       : 0\n 0x01be (0446) I 00000000 min                                       : 0\n 0x01c2 (0450) I 00000000 min                                       : 0\n 0x01c6 (0454) I 00000000 min                                       : 0\n 0x01ca (0458) I 00000000 min                                       : 0\n 0x01ce (0462) I 00000000 min                                       : 0\n 0x01d2 (0466) I 00000000 min                                       : 0\n 0x01d6 (0470) I 00000000 min                                       : 0\n 0x01da (0474) I 00000000 min                                       : 0\n 0x01de (0478) I 00000000 min                                       : 0\n 0x01e2 (0482) I 04000000 Version                                   : 4\n 0x01e6 (0486) I 03f7ab05 FeaturesToRun                             : 95155971\n 0x01ea (0490) I 00000000 FeaturesToRun                             : 0\n 0x01ee (0494) H     2201 SocketPowerLimitAc                        : 290\n 0x01f0 (0496) H     8701 SocketPowerLimitAc                        : 391\n 0x01f2 (0498) H     0000 SocketPowerLimitAc                        : 0\n 0x01f4 (0500) H     0000 SocketPowerLimitAc                        : 0\n 0x01f6 (0502) H     0500 SocketPowerLimitAcTau                     : 5\n 0x01f8 (0504) H     0100 SocketPowerLimitAcTau                     : 1\n 0x01fa (0506) H     0000 SocketPowerLimitAcTau                     : 0\n 0x01fc (0508) H     0000 SocketPowerLimitAcTau                     : 0\n 0x01fe (0510) H     3200 TdcLimitSoc                               : 50\n 0x0200 (0512) H     0000 TdcLimitSocTau                            : 0\n 0x0202 (0514) H     4001 TdcLimitGfx                               : 320\n 0x0204 (0516) H     0000 TdcLimitGfxTau                            : 0\n 0x0206 (0518) H     6400 TedgeLimit                                : 100\n 0x0208 (0520) H     6400 ThotspotLimit                             : 100\n 0x020a (0522) H     5e00 TmemLimit                                 : 94\n 0x020c (0524) H     6700 Tvr_gfxLimit                              : 103\n 0x020e (0526) H     6700 Tvr_memLimit                              : 103\n 0x0210 (0528) H     6700 Tvr_socLimit                              : 103\n 0x0212 (0530) I 00000000 FitLimit                                  : 0\n 0x0216 (0534) H     0000 PpmPowerLimit                             : 0\n 0x0218 (0536) H     0000 PpmTemperatureThreshold                   : 0\n 0x021a (0538) I fc070000 ThrottlerControlMask                      : 2044\n 0x021e (0542) H     0000 UlvVoltageOffsetGfx                       : 0\n 0x0220 (0544) H     0000 UlvPadding                                : 0\n 0x0222 (0546) B       00 UlvGfxclkBypass                           : 0\n 0x0223 (0547) B       00 Padding234                                : 0\n 0x0224 (0548) B       00 Padding234                                : 0\n 0x0225 (0549) B       00 Padding234                                : 0\n 0x0226 (0550) H     8c0a MinVoltageGfx                             : 2700\n 0x0228 (0552) H     ac0d MinVoltageSoc                             : 3500\n 0x022a (0554) H     3610 MaxVoltageGfx                             : 4150\n 0x022c (0556) H     6810 MaxVoltageSoc                             : 4200\n 0x022e (0558) H     1900 LoadLineResistanceGfx                     : 25\n 0x0230 (0560) H     0000 LoadLineResistanceSoc                     : 0\n 0x0232 (0562) B       01 VoltageMode                               : 1\n 0x0233 (0563) B       01 SnapToDiscrete                            : 1\n 0x0234 (0564) B       10 NumDiscreteLevels                         : 16\n 0x0235 (0565) B       00 padding                                   : 0\n 0x0236 (0566) f 00000000 m                                         : 0\n 0x023a (0570) f 00000000 b                                         : 0\n 0x023e (0574) f bb44353e a                                         : 0.17702\n 0x0242 (0578) f c364aa3a b                                         : 0.0013\n 0x0246 (0582) f 9c161c3f c                                         : 0.60972\n 0x024a (0586) H     2c01 SsFmin                                    : 300\n 0x024c (0588) H     0000 Padding16                                 : 0\n 0x024e (0590) B       01 VoltageMode                               : 1\n 0x024f (0591) B       01 SnapToDiscrete                            : 1\n 0x0250 (0592) B       08 NumDiscreteLevels                         : 8\n 0x0251 (0593) B       00 padding                                   : 0\n 0x0252 (0594) f 3fc63c3f m                                         : 0.7374\n 0x0256 (0598) f 04564e3e b                                         : 0.2015\n 0x025a (0602) f 7d3f753e a                                         : 0.2395\n 0x025e (0606) f 83c04abe b                                         :-0.198\n 0x0262 (0610) f 6132353f c                                         : 0.7078\n 0x0266 (0614) H     9d01 SsFmin                                    : 413\n 0x0268 (0616) H     0000 Padding16                                 : 0\n 0x026a (0618) B       01 VoltageMode                               : 1\n 0x026b (0619) B       01 SnapToDiscrete                            : 1\n 0x026c (0620) B       08 NumDiscreteLevels                         : 8\n 0x026d (0621) B       00 padding                                   : 0\n 0x026e (0622) f 8d978e3f m                                         : 1.114\n 0x0272 (0626) f fad0053d b                                         : 0.03267\n 0x0276 (0630) f e483fe3e a                                         : 0.4971\n 0x027a (0634) f 2b87d6be b                                         :-0.419\n 0x027e (0638) f 2041413f c                                         : 0.7549\n 0x0282 (0642) H     a501 SsFmin                                    : 421\n 0x0284 (0644) H     0000 Padding16                                 : 0\n 0x0286 (0646) B       01 VoltageMode                               : 1\n 0x0287 (0647) B       01 SnapToDiscrete                            : 1\n 0x0288 (0648) B       08 NumDiscreteLevels                         : 8\n 0x0289 (0649) B       00 padding                                   : 0\n 0x028a (0650) f 9a99893f m                                         : 1.075\n 0x028e (0654) f 8c4aea3c b                                         : 0.0286\n 0x0292 (0658) f 3a23ea3e a                                         : 0.4573\n 0x0296 (0662) f 1b2fddbe b                                         :-0.432\n 0x029a (0666) f cac3523f c                                         : 0.8233\n 0x029e (0670) H     d801 SsFmin                                    : 472\n 0x02a0 (0672) H     0000 Padding16                                 : 0\n 0x02a2 (0674) B       01 VoltageMode                               : 1\n 0x02a3 (0675) B       01 SnapToDiscrete                            : 1\n 0x02a4 (0676) B       04 NumDiscreteLevels                         : 4\n 0x02a5 (0677) B       00 padding                                   : 0\n 0x02a6 (0678) f 2aa99b3f m                                         : 1.2161\n 0x02aa (0682) f c93c72bd b                                         :-0.05914\n 0x02ae (0686) f a323093f a                                         : 0.5357\n 0x02b2 (0690) f 448b0cbf b                                         :-0.549\n 0x02b6 (0694) f b840623f c                                         : 0.8838\n 0x02ba (0698) H     0002 SsFmin                                    : 512\n 0x02bc (0700) H     0000 Padding16                                 : 0\n 0x02be (0702) B       01 VoltageMode                               : 1\n 0x02bf (0703) B       01 SnapToDiscrete                            : 1\n 0x02c0 (0704) B       08 NumDiscreteLevels                         : 8\n 0x02c1 (0705) B       00 padding                                   : 0\n 0x02c2 (0706) f 0000803f m                                         : 1\n 0x02c6 (0710) f 00000000 b                                         : 0\n 0x02ca (0714) f f085e93e a                                         : 0.4561\n 0x02ce (0718) f bc7413bf b                                         :-0.576\n 0x02d2 (0722) f 287e6c3f c                                         : 0.9238\n 0x02d6 (0726) H     7702 SsFmin                                    : 631\n 0x02d8 (0728) H     0000 Padding16                                 : 0\n 0x02da (0730) H     2c01 FreqTableGfx                              : 300\n 0x02dc (0732) H     ef01 FreqTableGfx                              : 495\n 0x02de (0734) H     db02 FreqTableGfx                              : 731\n 0x02e0 (0736) H     c203 FreqTableGfx                              : 962\n 0x02e2 (0738) H     0504 FreqTableGfx                              : 1029\n 0x02e4 (0740) H     3e04 FreqTableGfx                              : 1086\n 0x02e6 (0742) H     7a04 FreqTableGfx                              : 1146\n 0x02e8 (0744) H     a404 FreqTableGfx                              : 1188\n 0x02ea (0746) H     d304 FreqTableGfx                              : 1235\n 0x02ec (0748) H     0305 FreqTableGfx                              : 1283\n 0x02ee (0750) H     2605 FreqTableGfx                              : 1318\n 0x02f0 (0752) H     5305 FreqTableGfx                              : 1363\n 0x02f2 (0754) H     7c05 FreqTableGfx                              : 1404\n 0x02f4 (0756) H     9605 FreqTableGfx                              : 1430\n 0x02f6 (0758) H     bf05 FreqTableGfx                              : 1471\n 0x02f8 (0760) H     de05 FreqTableGfx                              : 1502\n 0x02fa (0762) H     5802 FreqTableVclk                             : 600\n 0x02fc (0764) H     c202 FreqTableVclk                             : 706\n 0x02fe (0766) H     2003 FreqTableVclk                             : 800\n 0x0300 (0768) H     5a03 FreqTableVclk                             : 858\n 0x0302 (0770) H     9c03 FreqTableVclk                             : 924\n 0x0304 (0772) H     4304 FreqTableVclk                             : 1091\n 0x0306 (0774) H     b004 FreqTableVclk                             : 1200\n 0x0308 (0776) H     3605 FreqTableVclk                             : 1334\n 0x030a (0778) H     2202 FreqTableDclk                             : 546\n 0x030c (0780) H     5802 FreqTableDclk                             : 600\n 0x030e (0782) H     c202 FreqTableDclk                             : 706\n 0x0310 (0784) H     ee02 FreqTableDclk                             : 750\n 0x0312 (0786) H     2003 FreqTableDclk                             : 800\n 0x0314 (0788) H     9c03 FreqTableDclk                             : 924\n 0x0316 (0790) H     e803 FreqTableDclk                             : 1000\n 0x0318 (0792) H     4304 FreqTableDclk                             : 1091\n 0x031a (0794) H     5802 FreqTableSocclk                           : 600\n 0x031c (0796) H     9b02 FreqTableSocclk                           : 667\n 0x031e (0798) H     c202 FreqTableSocclk                           : 706\n 0x0320 (0800) H     ee02 FreqTableSocclk                           : 750\n 0x0322 (0802) H     2003 FreqTableSocclk                           : 800\n 0x0324 (0804) H     5a03 FreqTableSocclk                           : 858\n 0x0326 (0806) H     9c03 FreqTableSocclk                           : 924\n 0x0328 (0808) H     e803 FreqTableSocclk                           : 1000\n 0x032a (0810) H     5802 FreqTableUclk                             : 600\n 0x032c (0812) H     2003 FreqTableUclk                             : 800\n 0x032e (0814) H     e803 FreqTableUclk                             : 1000\n 0x0330 (0816) H     b004 FreqTableUclk                             : 1200\n 0x0332 (0818) H     8a02 FreqTableFclk                             : 650\n 0x0334 (0820) H     5003 FreqTableFclk                             : 848\n 0x0336 (0822) H     bb03 FreqTableFclk                             : 955\n 0x0338 (0824) H     2404 FreqTableFclk                             : 1060\n 0x033a (0826) H     9b04 FreqTableFclk                             : 1179\n 0x033c (0828) H     d404 FreqTableFclk                             : 1236\n 0x033e (0830) H     0b05 FreqTableFclk                             : 1291\n 0x0340 (0832) H     7b05 FreqTableFclk                             : 1403\n 0x0342 (0834) I 00000000 Paddingclks                               : 0\n 0x0346 (0838) I 00000000 Paddingclks                               : 0\n 0x034a (0842) I 00000000 Paddingclks                               : 0\n 0x034e (0846) I 00000000 Paddingclks                               : 0\n 0x0352 (0850) I 00000000 Paddingclks                               : 0\n 0x0356 (0854) I 00000000 Paddingclks                               : 0\n 0x035a (0858) I 00000000 Paddingclks                               : 0\n 0x035e (0862) I 00000000 Paddingclks                               : 0\n 0x0362 (0866) I 00000000 Paddingclks                               : 0\n 0x0366 (0870) I 00000000 Paddingclks                               : 0\n 0x036a (0874) I 00000000 Paddingclks                               : 0\n 0x036e (0878) I 00000000 Paddingclks                               : 0\n 0x0372 (0882) I 00000000 Paddingclks                               : 0\n 0x0376 (0886) I 00000000 Paddingclks                               : 0\n 0x037a (0890) I 00000000 Paddingclks                               : 0\n 0x037e (0894) I 00000000 Paddingclks                               : 0\n 0x0382 (0898) H     2c01 Mp0clkFreq                                : 300\n 0x0384 (0900) H     f401 Mp0clkFreq                                : 500\n 0x0386 (0902) H     220b Mp0DpmVoltage                             : 2850\n 0x0388 (0904) H     220b Mp0DpmVoltage                             : 2850\n 0x038a (0906) H     2c01 GfxclkFidle                               : 300\n 0x038c (0908) H     0000 GfxclkSlewRate                            : 0\n 0x038e (0910) B       00 Padding567                                : 0\n 0x038f (0911) B       00 Padding567                                : 0\n 0x0390 (0912) B       00 Padding567                                : 0\n 0x0391 (0913) B       00 Padding567                                : 0\n 0x0392 (0914) H     de05 GfxclkDsMaxFreq                           : 1502\n 0x0394 (0916) B       01 GfxclkSource                              : 1\n 0x0395 (0917) B       00 Padding456                                : 0\n 0x0396 (0918) H     0000 EnableTdpm                                : 0\n 0x0398 (0920) H     0000 TdpmHighHystTemperature                   : 0\n 0x039a (0922) H     0000 TdpmLowHystTemperature                    : 0\n 0x039c (0924) H     0000 GfxclkFreqHighTempLimit                   : 0\n 0x039e (0926) H     0000 FanStopTemp                               : 0\n 0x03a0 (0928) H     0000 FanStartTemp                              : 0\n 0x03a2 (0930) H     0000 FanGainEdge                               : 0\n 0x03a4 (0932) H     9001 FanGainHotspot                            : 400\n 0x03a6 (0934) H     9001 FanGainVrGfx                              : 400\n 0x03a8 (0936) H     9001 FanGainVrSoc                              : 400\n 0x03aa (0938) H     9001 FanGainVrMem                              : 400\n 0x03ac (0940) H     9001 FanGainHbm                                : 400\n 0x03ae (0942) H     1400 FanPwmMin                                 : 20\n 0x03b0 (0944) H     540b FanAcousticLimitRpm                       : 2900\n 0x03b2 (0946) H     540b FanThrottlingRpm                          : 2900\n 0x03b4 (0948) H     0a0f FanMaximumRpm                             : 3850\n 0x03b6 (0950) H     5a00 FanTargetTemperature                      : 90\n 0x03b8 (0952) H     2c01 FanTargetGfxclk                           : 300\n 0x03ba (0954) B       00 FanZeroRpmEnable                          : 0\n 0x03bb (0955) B       02 FanTachEdgePerRev                         : 2\n 0x03bc (0956) B       01 FanTempInputSelect                        : 1\n 0x03bd (0957) B       00 Fan                                       : 0\n 0x03be (0958) h     0000 FuzzyFan_ErrorSetDelta                    : 0\n 0x03c0 (0960) h     0000 FuzzyFan_ErrorRateSetDelta                : 0\n 0x03c2 (0962) h     0000 FuzzyFan_PwmSetDelta                      : 0\n 0x03c4 (0964) H     0000 FuzzyFan_Reserved                         : 0\n 0x03c6 (0966) B       01 OverrideAvfsGb                            : 1\n 0x03c7 (0967) B       01 OverrideAvfsGb                            : 1\n 0x03c8 (0968) B       00 Padding8_Avfs                             : 0\n 0x03c9 (0969) B       00 Padding8_Avfs                             : 0\n 0x03ca (0970) f 9161153d a                                         : 0.03647\n 0x03ce (0974) f d53e1dbd b                                         :-0.03839\n 0x03d2 (0978) f 76fd023d c                                         : 0.03198\n 0x03d6 (0982) f 00000000 a                                         : 0\n 0x03da (0986) f 00000000 b                                         : 0\n 0x03de (0990) f 0ad7233d c                                         : 0.04\n 0x03e2 (0994) f 00000000 a                                         : 0\n 0x03e6 (0998) f 00000000 b                                         : 0\n 0x03ea (1002) f 00000000 c                                         : 0\n 0x03ee (1006) f 27a009bd a                                         :-0.0336\n 0x03f2 (1010) f 5dfec33d b                                         : 0.0957\n 0x03f6 (1014) f e2067cbd c                                         :-0.06153\n 0x03fa (1018) f c633283e a                                         : 0.16426\n 0x03fe (1022) f a9de1a3d b                                         : 0.03781\n 0x0402 (1026) f 7d5c9bbd c                                         :-0.07586\n 0x0406 (1030) f 00000000 m                                         : 0\n 0x040a (1034) f 00000000 b                                         : 0\n 0x040e (1038) f 00000000 m                                         : 0\n 0x0412 (1042) f 00000000 b                                         : 0\n 0x0416 (1046) f 00000000 a                                         : 0\n 0x041a (1050) f 00000000 b                                         : 0\n 0x041e (1054) f 00000000 c                                         : 0\n 0x0422 (1058) f 00000000 a                                         : 0\n 0x0426 (1062) f 00000000 b                                         : 0\n 0x042a (1066) f 00000000 c                                         : 0\n 0x042e (1070) H     3401 DcTol                                     : 308\n 0x0430 (1072) H     3401 DcTol                                     : 308\n 0x0432 (1074) B       01 DcBtcEnabled                              : 1\n 0x0433 (1075) B       01 DcBtcEnabled                              : 1\n 0x0434 (1076) B       00 Padding8_GfxBtc                           : 0\n 0x0435 (1077) B       00 Padding8_GfxBtc                           : 0\n 0x0436 (1078) H     5f00 DcBtcMin                                  : 95\n 0x0438 (1080) H     5f00 DcBtcMin                                  : 95\n 0x043a (1082) H     3401 DcBtcMax                                  : 308\n 0x043c (1084) H     3401 DcBtcMax                                  : 308\n 0x043e (1086) H     1900 DcBtcGb                                   : 25\n 0x0440 (1088) H     1900 DcBtcGb                                   : 25\n 0x0442 (1090) B       03 XgmiDpmPstates                            : 3\n 0x0443 (1091) B       00 XgmiDpmPstates                            : 0\n 0x0444 (1092) B       00 XgmiDpmSpare                              : 0\n 0x0445 (1093) B       00 XgmiDpmSpare                              : 0\n 0x0446 (1094) H     0000 VDDGFX_TVmin                              : 0\n 0x0448 (1096) H     0000 VDDSOC_TVmin                              : 0\n 0x044a (1098) H     0000 VDDGFX_Vmin_HiTemp                        : 0\n 0x044c (1100) H     0000 VDDGFX_Vmin_LoTemp                        : 0\n 0x044e (1102) H     0000 VDDSOC_Vmin_HiTemp                        : 0\n 0x0450 (1104) H     0000 VDDSOC_Vmin_LoTemp                        : 0\n 0x0452 (1106) H     0000 VDDGFX_TVminHystersis                     : 0\n 0x0454 (1108) H     0000 VDDSOC_TVminHystersis                     : 0\n 0x0456 (1110) I 00000000 DebugOverrides                            : 0\n 0x045a (1114) f 00000000 a                                         : 0\n 0x045e (1118) f 00000000 b                                         : 0\n 0x0462 (1122) f 00000000 c                                         : 0\n 0x0466 (1126) f 00000000 a                                         : 0\n 0x046a (1130) f 00000000 b                                         : 0\n 0x046e (1134) f 00000000 c                                         : 0\n 0x0472 (1138) f 00000000 a                                         : 0\n 0x0476 (1142) f 00000000 b                                         : 0\n 0x047a (1146) f 00000000 c                                         : 0\n 0x047e (1150) f 00000000 a                                         : 0\n 0x0482 (1154) f 00000000 b                                         : 0\n 0x0486 (1158) f 00000000 c                                         : 0\n 0x048a (1162) H     8c0a MinVoltageUlvGfx                          : 2700\n 0x048c (1164) H     0000 PaddingUlv                                : 0\n 0x048e (1166) B       03 TotalPowerConfig                          : 3\n 0x048f (1167) B       00 TotalPowerSpare1                          : 0\n 0x0490 (1168) H     0000 TotalPowerSpare2                          : 0\n 0x0492 (1170) H     0000 PccThresholdLow                           : 0\n 0x0494 (1172) H     0000 PccThresholdHigh                          : 0\n 0x0496 (1174) I 00000000 PaddingAPCC                               : 0\n 0x049a (1178) I 00000000 PaddingAPCC                               : 0\n 0x049e (1182) I 00000000 PaddingAPCC                               : 0\n 0x04a2 (1186) I 00000000 PaddingAPCC                               : 0\n 0x04a6 (1190) I 00000000 PaddingAPCC                               : 0\n 0x04aa (1194) I 00000000 PaddingAPCC                               : 0\n 0x04ae (1198) H     2c01 BasePerformanceCardPower                  : 300\n 0x04b0 (1200) H     2c01 MaxPerformanceCardPower                   : 300\n 0x04b2 (1202) H     0000 BasePerformanceFrequencyCap               : 0\n 0x04b4 (1204) H     0000 MaxPerformanceFrequencyCap                : 0\n 0x04b6 (1206) H     f609 VDDGFX_VminLow                            : 2550\n 0x04b8 (1208) H     0000 VDDGFX_TVminLow                           : 0\n 0x04ba (1210) H     0000 VDDGFX_VminLow_HiTemp                     : 0\n 0x04bc (1212) H     0000 VDDGFX_VminLow_LoTemp                     : 0\n 0x04be (1214) I 00000000 Reserved                                  : 0\n 0x04c2 (1218) I 00000000 Reserved                                  : 0\n 0x04c6 (1222) I 00000000 Reserved                                  : 0\n 0x04ca (1226) I 00000000 Reserved                                  : 0\n 0x04ce (1230) I 00000000 Reserved                                  : 0\n 0x04d2 (1234) I 00000000 Reserved                                  : 0\n 0x04d6 (1238) I 00000000 Reserved                                  : 0\n 0x04da (1242) H     0000 MaxVoltageStepGfx                         : 0\n 0x04dc (1244) H     0000 MaxVoltageStepSoc                         : 0\n 0x04de (1246) B       00 VddGfxVrMapping                           : 0\n 0x04df (1247) B       00 VddSocVrMapping                           : 0\n 0x04e0 (1248) B       00 VddMemVrMapping                           : 0\n 0x04e1 (1249) B       00 BoardVrMapping                            : 0\n 0x04e2 (1250) B       00 GfxUlvPhaseSheddingMask                   : 0\n 0x04e3 (1251) B       00 ExternalSensorPresent                     : 0\n 0x04e4 (1252) B       00 Padding8_V                                : 0\n 0x04e5 (1253) B       00 Padding8_V                                : 0\n 0x04e6 (1254) H     0000 GfxMaxCurrent                             : 0\n 0x04e8 (1256) b       00 GfxOffset                                 : 0\n 0x04e9 (1257) B       00 Padding_TelemetryGfx                      : 0\n 0x04ea (1258) H     0000 SocMaxCurrent                             : 0\n 0x04ec (1260) b       00 SocOffset                                 : 0\n 0x04ed (1261) B       00 Padding_TelemetrySoc                      : 0\n 0x04ee (1262) H     0000 MemMaxCurrent                             : 0\n 0x04f0 (1264) b       00 MemOffset                                 : 0\n 0x04f1 (1265) B       00 Padding_TelemetryMem                      : 0\n 0x04f2 (1266) H     0000 BoardMaxCurrent                           : 0\n 0x04f4 (1268) b       00 BoardOffset                               : 0\n 0x04f5 (1269) B       00 Padding_TelemetryBoardInput               : 0\n 0x04f6 (1270) B       00 VR0HotGpio                                : 0\n 0x04f7 (1271) B       00 VR0HotPolarity                            : 0\n 0x04f8 (1272) B       00 VR1HotGpio                                : 0\n 0x04f9 (1273) B       00 VR1HotPolarity                            : 0\n 0x04fa (1274) B       00 PllGfxclkSpreadEnabled                    : 0\n 0x04fb (1275) B       00 PllGfxclkSpreadPercent                    : 0\n 0x04fc (1276) H     0000 PllGfxclkSpreadFreq                       : 0\n 0x04fe (1278) B       00 UclkSpreadEnabled                         : 0\n 0x04ff (1279) B       00 UclkSpreadPercent                         : 0\n 0x0500 (1280) H     0000 UclkSpreadFreq                            : 0\n 0x0502 (1282) B       00 FclkSpreadEnabled                         : 0\n 0x0503 (1283) B       00 FclkSpreadPercent                         : 0\n 0x0504 (1284) H     0000 FclkSpreadFreq                            : 0\n 0x0506 (1286) B       00 FllGfxclkSpreadEnabled                    : 0\n 0x0507 (1287) B       00 FllGfxclkSpreadPercent                    : 0\n 0x0508 (1288) H     0000 FllGfxclkSpreadFreq                       : 0\n 0x050a (1290) B       00 Enabled                                   : 0\n 0x050b (1291) B       00 Speed                                     : 0\n 0x050c (1292) B       00 Padding                                   : 0\n 0x050d (1293) B       00 Padding                                   : 0\n 0x050e (1294) I 00000000 SlaveAddress                              : 0\n 0x0512 (1298) B       00 ControllerPort                            : 0\n 0x0513 (1299) B       00 ControllerName                            : 0\n 0x0514 (1300) B       00 ThermalThrotter                           : 0\n 0x0515 (1301) B       00 I2cProtocol                               : 0\n 0x0516 (1302) B       00 Enabled                                   : 0\n 0x0517 (1303) B       00 Speed                                     : 0\n 0x0518 (1304) B       00 Padding                                   : 0\n 0x0519 (1305) B       00 Padding                                   : 0\n 0x051a (1306) I 00000000 SlaveAddress                              : 0\n 0x051e (1310) B       00 ControllerPort                            : 0\n 0x051f (1311) B       00 ControllerName                            : 0\n 0x0520 (1312) B       00 ThermalThrotter                           : 0\n 0x0521 (1313) B       00 I2cProtocol                               : 0\n 0x0522 (1314) B       00 Enabled                                   : 0\n 0x0523 (1315) B       00 Speed                                     : 0\n 0x0524 (1316) B       00 Padding                                   : 0\n 0x0525 (1317) B       00 Padding                                   : 0\n 0x0526 (1318) I 00000000 SlaveAddress                              : 0\n 0x052a (1322) B       00 ControllerPort                            : 0\n 0x052b (1323) B       00 ControllerName                            : 0\n 0x052c (1324) B       00 ThermalThrotter                           : 0\n 0x052d (1325) B       00 I2cProtocol                               : 0\n 0x052e (1326) B       00 Enabled                                   : 0\n 0x052f (1327) B       00 Speed                                     : 0\n 0x0530 (1328) B       00 Padding                                   : 0\n 0x0531 (1329) B       00 Padding                                   : 0\n 0x0532 (1330) I 00000000 SlaveAddress                              : 0\n 0x0536 (1334) B       00 ControllerPort                            : 0\n 0x0537 (1335) B       00 ControllerName                            : 0\n 0x0538 (1336) B       00 ThermalThrotter                           : 0\n 0x0539 (1337) B       00 I2cProtocol                               : 0\n 0x053a (1338) B       00 Enabled                                   : 0\n 0x053b (1339) B       00 Speed                                     : 0\n 0x053c (1340) B       00 Padding                                   : 0\n 0x053d (1341) B       00 Padding                                   : 0\n 0x053e (1342) I 00000000 SlaveAddress                              : 0\n 0x0542 (1346) B       00 ControllerPort                            : 0\n 0x0543 (1347) B       00 ControllerName                            : 0\n 0x0544 (1348) B       00 ThermalThrotter                           : 0\n 0x0545 (1349) B       00 I2cProtocol                               : 0\n 0x0546 (1350) B       00 Enabled                                   : 0\n 0x0547 (1351) B       00 Speed                                     : 0\n 0x0548 (1352) B       00 Padding                                   : 0\n 0x0549 (1353) B       00 Padding                                   : 0\n 0x054a (1354) I 00000000 SlaveAddress                              : 0\n 0x054e (1358) B       00 ControllerPort                            : 0\n 0x054f (1359) B       00 ControllerName                            : 0\n 0x0550 (1360) B       00 ThermalThrotter                           : 0\n 0x0551 (1361) B       00 I2cProtocol                               : 0\n 0x0552 (1362) B       00 Enabled                                   : 0\n 0x0553 (1363) B       00 Speed                                     : 0\n 0x0554 (1364) B       00 Padding                                   : 0\n 0x0555 (1365) B       00 Padding                                   : 0\n 0x0556 (1366) I 00000000 SlaveAddress                              : 0\n 0x055a (1370) B       00 ControllerPort                            : 0\n 0x055b (1371) B       00 ControllerName                            : 0\n 0x055c (1372) B       00 ThermalThrotter                           : 0\n 0x055d (1373) B       00 I2cProtocol                               : 0\n 0x055e (1374) B       00 Enabled                                   : 0\n 0x055f (1375) B       00 Speed                                     : 0\n 0x0560 (1376) B       00 Padding                                   : 0\n 0x0561 (1377) B       00 Padding                                   : 0\n 0x0562 (1378) I 00000000 SlaveAddress                              : 0\n 0x0566 (1382) B       00 ControllerPort                            : 0\n 0x0567 (1383) B       00 ControllerName                            : 0\n 0x0568 (1384) B       00 ThermalThrotter                           : 0\n 0x0569 (1385) B       00 I2cProtocol                               : 0\n 0x056a (1386) I 00000000 MemoryChannelEnabled                      : 0\n 0x056e (1390) B       00 DramBitWidth                              : 0\n 0x056f (1391) B       00 PaddingMem                                : 0\n 0x0570 (1392) B       00 PaddingMem                                : 0\n 0x0571 (1393) B       00 PaddingMem                                : 0\n 0x0572 (1394) H     0000 TotalBoardPower                           : 0\n 0x0574 (1396) H     0000 BoardPadding                              : 0\n 0x0576 (1398) B       00 XgmiLinkSpeed                             : 0\n 0x0577 (1399) B       00 XgmiLinkSpeed                             : 0\n 0x0578 (1400) B       00 XgmiLinkSpeed                             : 0\n 0x0579 (1401) B       00 XgmiLinkSpeed                             : 0\n 0x057a (1402) B       00 XgmiLinkWidth                             : 0\n 0x057b (1403) B       00 XgmiLinkWidth                             : 0\n 0x057c (1404) B       00 XgmiLinkWidth                             : 0\n 0x057d (1405) B       00 XgmiLinkWidth                             : 0\n 0x057e (1406) H     0000 XgmiFclkFreq                              : 0\n 0x0580 (1408) H     0000 XgmiFclkFreq                              : 0\n 0x0582 (1410) H     0000 XgmiFclkFreq                              : 0\n 0x0584 (1412) H     0000 XgmiFclkFreq                              : 0\n 0x0586 (1414) H     0000 XgmiSocVoltage                            : 0\n 0x0588 (1416) H     0000 XgmiSocVoltage                            : 0\n 0x058a (1418) H     0000 XgmiSocVoltage                            : 0\n 0x058c (1420) H     0000 XgmiSocVoltage                            : 0\n 0x058e (1422) B       00 GpioI2cScl                                : 0\n 0x058f (1423) B       00 GpioI2cSda                                : 0\n 0x0590 (1424) H     0000 GpioPadding                               : 0\n 0x0592 (1426) I 00000000 BoardVoltageCoeffA                        : 0\n 0x0596 (1430) I 00000000 BoardVoltageCoeffB                        : 0\n 0x059a (1434) I 00000000 BoardReserved                             : 0\n 0x059e (1438) I 00000000 BoardReserved                             : 0\n 0x05a2 (1442) I 00000000 BoardReserved                             : 0\n 0x05a6 (1446) I 00000000 BoardReserved                             : 0\n 0x05aa (1450) I 00000000 BoardReserved                             : 0\n 0x05ae (1454) I 00000000 BoardReserved                             : 0\n 0x05b2 (1458) I 00000000 BoardReserved                             : 0\n 0x05b6 (1462) I 00000000 MmHubPadding                              : 0\n 0x05ba (1466) I 00000000 MmHubPadding                              : 0\n 0x05be (1470) I 00000000 MmHubPadding                              : 0\n 0x05c2 (1474) I 00000000 MmHubPadding                              : 0\n 0x05c6 (1478) I 00000000 MmHubPadding                              : 0\n 0x05ca (1482) I 00000000 MmHubPadding                              : 0\n 0x05ce (1486) I 00000000 MmHubPadding                              : 0\n 0x05d2 (1490) I 00000000 MmHubPadding                              : 0\n"
  },
  {
    "path": "test/Powercolor.RX9070.16384.241204_1.rom.dump",
    "content": "header:\n  structuresize: 5812\n  format_revision: 23\n  content_revision: 0\ntable_revision: 5\npptable_source: 0\npmfw_pptable_start_offset: 1344\npmfw_pptable_size: 4468\npmfw_sku_table_start_offset: 1372\npmfw_sku_table_size: 3552\npmfw_board_table_start_offset: 5284\npmfw_board_table_size: 528\npmfw_custom_sku_table_start_offset: 4924\npmfw_custom_sku_table_size: 360\ngolden_pp_id: 4518\ngolden_revision: 23538\nformat_id: 136\nplatform_caps: 8\nthermal_controller_type: 32\nsmall_power_limit1: 0\nsmall_power_limit2: 0\nboost_power_limit: 0\nsoftware_shutdown_temp: 118\nreserve:\n  reserve 0: 0\n  reserve 1: 0\n  reserve 2: 0\n  reserve 3: 0\n  reserve 4: 0\n  reserve 5: 0\n  reserve 6: 0\n  reserve 7: 0\n  reserve 8: 0\n  reserve 9: 0\n  reserve 10: 0\n  reserve 11: 0\n  reserve 12: 0\n  reserve 13: 0\n  reserve 14: 0\n  reserve 15: 2\n  reserve 16: 0\n  reserve 17: 0\n  reserve 18: 0\n  reserve 19: 0\n  reserve 20: 1\n  reserve 21: 1\n  reserve 22: 1\n  reserve 23: 1\n  reserve 24: 1\n  reserve 25: 0\n  reserve 26: 0\n  reserve 27: 0\n  reserve 28: 1\n  reserve 29: 0\n  reserve 30: 0\n  reserve 31: 0\n  reserve 32: 0\n  reserve 33: 0\n  reserve 34: 0\n  reserve 35: 0\n  reserve 36: 0\n  reserve 37: 0\n  reserve 38: 0\n  reserve 39: 0\n  reserve 40: 0\n  reserve 41: 0\n  reserve 42: 0\n  reserve 43: 0\n  reserve 44: 0\n  reserve 45: 0\n  reserve 46: 0\n  reserve 47: 0\n  reserve 48: 0\n  reserve 49: 0\n  reserve 50: 0\n  reserve 51: 0\n  reserve 52: 0\n  reserve 53: 0\n  reserve 54: 0\n  reserve 55: 0\n  reserve 56: 0\n  reserve 57: 0\n  reserve 58: 0\n  reserve 59: 0\n  reserve 60: 0\n  reserve 61: 0\n  reserve 62: 0\n  reserve 63: 0\n  reserve 64: 0\n  reserve 65: 0\n  reserve 66: 0\n  reserve 67: 0\n  reserve 68: 0\n  reserve 69: 0\n  reserve 70: 0\n  reserve 71: 0\n  reserve 72: 0\n  reserve 73: 0\n  reserve 74: 0\n  reserve 75: 0\n  reserve 76: 0\n  reserve 77: 0\n  reserve 78: 0\n  reserve 79: 0\n  reserve 80: 0\n  reserve 81: 0\n  reserve 82: 0\n  reserve 83: 0\n  reserve 84: 0\n  reserve 85: 0\n  reserve 86: 0\n  reserve 87: 1\n  reserve 88: 0\n  reserve 89: 0\n  reserve 90: 0\n  reserve 91: 1\n  reserve 92: 0\n  reserve 93: 0\n  reserve 94: 0\n  reserve 95: 1\n  reserve 96: 0\n  reserve 97: 0\n  reserve 98: 0\n  reserve 99: 1\n  reserve 100: 0\n  reserve 101: 0\n  reserve 102: 0\n  reserve 103: 1\n  reserve 104: 0\n  reserve 105: 0\n  reserve 106: 0\n  reserve 107: 0\n  reserve 108: 0\n  reserve 109: 0\n  reserve 110: 0\n  reserve 111: 0\n  reserve 112: 0\n  reserve 113: 0\n  reserve 114: 0\n  reserve 115: 0\n  reserve 116: 0\n  reserve 117: 0\n  reserve 118: 0\n  reserve 119: 1\n  reserve 120: 0\n  reserve 121: 0\n  reserve 122: 0\n  reserve 123: 0\n  reserve 124: 0\n  reserve 125: 0\n  reserve 126: 0\n  reserve 127: 0\n  reserve 128: 0\n  reserve 129: 0\n  reserve 130: 0\n  reserve 131: 0\n  reserve 132: 0\n  reserve 133: 0\n  reserve 134: 0\n  reserve 135: 0\n  reserve 136: 0\n  reserve 137: 0\n  reserve 138: 0\n  reserve 139: 0\n  reserve 140: 0\n  reserve 141: 0\n  reserve 142: 0\noverdrive_table:\n  revision: 0\n  reserve:\n    reserve 0: 0\n    reserve 1: 0\n    reserve 2: 0\n  cap:\n    cap 0:\n      0 0: 0\n      0 1: 0\n      0 2: 0\n      0 3: 0\n      0 4: 0\n      0 5: 0\n      0 6: 0\n      0 7: 0\n      0 8: 0\n      0 9: 0\n      0 10: 0\n      0 11: 0\n      0 12: 0\n      0 13: 0\n      0 14: 0\n      0 15: 0\n      0 16: 0\n      0 17: 0\n      0 18: 0\n      0 19: 0\n      0 20: 0\n      0 21: 0\n      0 22: 0\n      0 23: 0\n      0 24: 0\n      0 25: 0\n      0 26: 0\n      0 27: 0\n      0 28: 0\n      0 29: 0\n      0 30: 0\n      0 31: 0\n    cap 1:\n      1 0: 0\n      1 1: 0\n      1 2: 0\n      1 3: 0\n      1 4: 0\n      1 5: 0\n      1 6: 0\n      1 7: 0\n      1 8: 0\n      1 9: 0\n      1 10: 0\n      1 11: 0\n      1 12: 0\n      1 13: 0\n      1 14: 0\n      1 15: 0\n      1 16: 0\n      1 17: 0\n      1 18: 0\n      1 19: 0\n      1 20: 0\n      1 21: 0\n      1 22: 0\n      1 23: 0\n      1 24: 0\n      1 25: 0\n      1 26: 0\n      1 27: 0\n      1 28: 0\n      1 29: 0\n      1 30: 0\n      1 31: 0\n  max:\n    max 0:\n      0 0: 0\n      0 1: 0\n      0 2: 0\n      0 3: 0\n      0 4: 0\n      0 5: 0\n      0 6: 0\n      0 7: 0\n      0 8: 0\n      0 9: 0\n      0 10: 0\n      0 11: 0\n      0 12: 0\n      0 13: 0\n      0 14: 0\n      0 15: 0\n      0 16: 0\n      0 17: 0\n      0 18: 0\n      0 19: 0\n      0 20: 0\n      0 21: 0\n      0 22: 0\n      0 23: 0\n      0 24: 0\n      0 25: 0\n      0 26: 0\n      0 27: 0\n      0 28: 0\n      0 29: 0\n      0 30: 0\n      0 31: 0\n      0 32: 0\n      0 33: 0\n      0 34: 0\n      0 35: 0\n      0 36: 0\n      0 37: 0\n      0 38: 0\n      0 39: 0\n      0 40: 0\n      0 41: 0\n      0 42: 0\n      0 43: 0\n      0 44: 0\n      0 45: 0\n      0 46: 0\n      0 47: 0\n      0 48: 0\n      0 49: 0\n      0 50: 0\n      0 51: 0\n      0 52: 0\n      0 53: 0\n      0 54: 0\n      0 55: 0\n      0 56: 0\n      0 57: 0\n      0 58: 0\n      0 59: 0\n      0 60: 0\n      0 61: 0\n      0 62: 0\n      0 63: 0\n    max 1:\n      1 0: 0\n      1 1: 0\n      1 2: 0\n      1 3: 0\n      1 4: 0\n      1 5: 0\n      1 6: 0\n      1 7: 0\n      1 8: 0\n      1 9: 0\n      1 10: 0\n      1 11: 0\n      1 12: 0\n      1 13: 0\n      1 14: 0\n      1 15: 0\n      1 16: 0\n      1 17: 0\n      1 18: 0\n      1 19: 0\n      1 20: 0\n      1 21: 0\n      1 22: 0\n      1 23: 0\n      1 24: 0\n      1 25: 0\n      1 26: 0\n      1 27: 0\n      1 28: 0\n      1 29: 0\n      1 30: 0\n      1 31: 0\n      1 32: 0\n      1 33: 0\n      1 34: 0\n      1 35: 0\n      1 36: 0\n      1 37: 0\n      1 38: 0\n      1 39: 0\n      1 40: 0\n      1 41: 0\n      1 42: 0\n      1 43: 0\n      1 44: 0\n      1 45: 0\n      1 46: 0\n      1 47: 0\n      1 48: 0\n      1 49: 0\n      1 50: 0\n      1 51: 0\n      1 52: 0\n      1 53: 0\n      1 54: 0\n      1 55: 0\n      1 56: 0\n      1 57: 0\n      1 58: 0\n      1 59: 0\n      1 60: 0\n      1 61: 0\n      1 62: 0\n      1 63: 0\n  min:\n    min 0:\n      0 0: 0\n      0 1: 0\n      0 2: 0\n      0 3: 0\n      0 4: 0\n      0 5: 0\n      0 6: 0\n      0 7: 0\n      0 8: 0\n      0 9: 0\n      0 10: 0\n      0 11: 0\n      0 12: 0\n      0 13: 0\n      0 14: 0\n      0 15: 0\n      0 16: 0\n      0 17: 0\n      0 18: 0\n      0 19: 0\n      0 20: 0\n      0 21: 0\n      0 22: 0\n      0 23: 0\n      0 24: 0\n      0 25: 0\n      0 26: 0\n      0 27: 0\n      0 28: 0\n      0 29: 0\n      0 30: 0\n      0 31: 0\n      0 32: 0\n      0 33: 0\n      0 34: 0\n      0 35: 0\n      0 36: 0\n      0 37: 0\n      0 38: 0\n      0 39: 0\n      0 40: 0\n      0 41: 0\n      0 42: 0\n      0 43: 0\n      0 44: 0\n      0 45: 0\n      0 46: 0\n      0 47: 0\n      0 48: 0\n      0 49: 0\n      0 50: 0\n      0 51: 0\n      0 52: 0\n      0 53: 0\n      0 54: 0\n      0 55: 0\n      0 56: 0\n      0 57: 0\n      0 58: 0\n      0 59: 0\n      0 60: 0\n      0 61: 0\n      0 62: 0\n      0 63: 0\n    min 1:\n      1 0: 0\n      1 1: 0\n      1 2: 0\n      1 3: 0\n      1 4: 0\n      1 5: 0\n      1 6: 0\n      1 7: 0\n      1 8: 0\n      1 9: 0\n      1 10: 0\n      1 11: 0\n      1 12: 0\n      1 13: 0\n      1 14: 0\n      1 15: 0\n      1 16: 0\n      1 17: 0\n      1 18: 0\n      1 19: 0\n      1 20: 0\n      1 21: 0\n      1 22: 0\n      1 23: 0\n      1 24: 0\n      1 25: 0\n      1 26: 0\n      1 27: 0\n      1 28: 0\n      1 29: 0\n      1 30: 0\n      1 31: 0\n      1 32: 65531\n      1 33: 0\n      1 34: 5767256\n      1 35: 5767168\n      1 36: 85198100\n      1 37: 85196800\n      1 38: 216272100\n      1 39: 216268800\n      1 40: 0\n      1 41: 0\n      1 42: 0\n      1 43: 0\n      1 44: 0\n      1 45: 0\n      1 46: 0\n      1 47: 0\n      1 48: 65516\n      1 49: 0\n      1 50: 1638425\n      1 51: 1638400\n      1 52: 32768500\n      1 53: 32768000\n      1 54: 32768500\n      1 55: 32768000\n      1 56: 0\n      1 57: 0\n      1 58: 0\n      1 59: 0\n      1 60: 0\n      1 61: 0\n      1 62: 0\n      1 63: 0\n  pm_setting:\n    pm_setting 0: -5\n    pm_setting 1: 0\n    pm_setting 2: 0\n    pm_setting 3: 0\n    pm_setting 4: 105\n    pm_setting 5: 105\n    pm_setting 6: 0\n    pm_setting 7: 105\n    pm_setting 8: 6000\n    pm_setting 9: 6000\n    pm_setting 10: 0\n    pm_setting 11: 6000\n    pm_setting 12: 6000\n    pm_setting 13: 6000\n    pm_setting 14: 0\n    pm_setting 15: 6000\n    pm_setting 16: 0\n    pm_setting 17: 0\n    pm_setting 18: 0\n    pm_setting 19: 0\n    pm_setting 20: 0\n    pm_setting 21: 0\n    pm_setting 22: 0\n    pm_setting 23: 0\n    pm_setting 24: 0\n    pm_setting 25: 0\n    pm_setting 26: 0\n    pm_setting 27: 0\n    pm_setting 28: 0\n    pm_setting 29: 0\n    pm_setting 30: 0\n    pm_setting 31: 0\nsmc_pptable:\n  PFE_Settings:\n    Version: 0\n    Spare8:\n      Spare8 0: 0\n      Spare8 1: 0\n      Spare8 2: 0\n    FeaturesToRun:\n      FeaturesToRun 0: 989854971\n      FeaturesToRun 1: 76345758\n    FwDStateMask: 262143\n    DebugOverrides: 0\n    Spare:\n      Spare 0: 0\n      Spare 1: 0\n  SkuTable:\n    Version: 27\n    TotalPowerConfig: 3\n    CustomerVariant: 0\n    MemoryTemperatureTypeMask: 4\n    SmartShiftVersion: 0\n    SocketPowerLimitSpare:\n      SocketPowerLimitSpare 0: 80\n      SocketPowerLimitSpare 1: 0\n      SocketPowerLimitSpare 2: 0\n      SocketPowerLimitSpare 3: 0\n      SocketPowerLimitSpare 4: 0\n      SocketPowerLimitSpare 5: 0\n      SocketPowerLimitSpare 6: 0\n      SocketPowerLimitSpare 7: 0\n      SocketPowerLimitSpare 8: 0\n      SocketPowerLimitSpare 9: 0\n    EnableLegacyPptLimit: 0\n    UseInputTelemetry: 1\n    SmartShiftMinReportedPptinDcs: 0\n    PaddingPpt:\n      PaddingPpt 0: 0\n      PaddingPpt 1: 0\n      PaddingPpt 2: 0\n      PaddingPpt 3: 0\n      PaddingPpt 4: 0\n      PaddingPpt 5: 0\n      PaddingPpt 6: 0\n    HwCtfTempLimit: 120\n    PaddingInfra: 105\n    FitControllerFailureRateLimit: 0\n    FitControllerGfxDutyCycle: 0\n    FitControllerSocDutyCycle: 0\n    FitControllerSocOffset: 0\n    GfxApccPlusResidencyLimit: 0\n    ThrottlerControlMask: 1110514\n    UlvVoltageOffset:\n      UlvVoltageOffset 0: 100\n      UlvVoltageOffset 1: 100\n    Padding:\n      Padding 0: 0\n      Padding 1: 0\n    DeepUlvVoltageOffsetSoc: 100\n    DefaultMaxVoltage:\n      DefaultMaxVoltage 0: 4400\n      DefaultMaxVoltage 1: 4600\n    BoostMaxVoltage:\n      BoostMaxVoltage 0: 4800\n      BoostMaxVoltage 1: 4600\n    VminTempHystersis:\n      VminTempHystersis 0: 5\n      VminTempHystersis 1: 5\n    VminTempThreshold:\n      VminTempThreshold 0: 55\n      VminTempThreshold 1: 55\n    Vmin_Hot_T0:\n      Vmin_Hot_T0 0: 2800\n      Vmin_Hot_T0 1: 3300\n    Vmin_Cold_T0:\n      Vmin_Cold_T0 0: 2800\n      Vmin_Cold_T0 1: 3300\n    Vmin_Hot_Eol:\n      Vmin_Hot_Eol 0: 2800\n      Vmin_Hot_Eol 1: 3300\n    Vmin_Cold_Eol:\n      Vmin_Cold_Eol 0: 2800\n      Vmin_Cold_Eol 1: 3300\n    Vmin_Aging_Offset:\n      Vmin_Aging_Offset 0: 0\n      Vmin_Aging_Offset 1: 0\n    Spare_Vmin_Plat_Offset_Hot:\n      Spare_Vmin_Plat_Offset_Hot 0: 0\n      Spare_Vmin_Plat_Offset_Hot 1: 0\n    Spare_Vmin_Plat_Offset_Cold:\n      Spare_Vmin_Plat_Offset_Cold 0: 2800\n      Spare_Vmin_Plat_Offset_Cold 1: 2800\n    VcBtcFixedVminAgingOffset:\n      VcBtcFixedVminAgingOffset 0: 0\n      VcBtcFixedVminAgingOffset 1: 0\n    VcBtcVmin2PsmDegrationGb:\n      VcBtcVmin2PsmDegrationGb 0: 0\n      VcBtcVmin2PsmDegrationGb 1: 0\n    VcBtcPsmA:\n      VcBtcPsmA 0: 0\n      VcBtcPsmA 1: 0\n    VcBtcPsmB:\n      VcBtcPsmB 0: 0\n      VcBtcPsmB 1: 0\n    VcBtcVminA:\n      VcBtcVminA 0: 0\n      VcBtcVminA 1: 0\n    VcBtcVminB:\n      VcBtcVminB 0: 0\n      VcBtcVminB 1: 0\n    PerPartVminEnabled:\n      PerPartVminEnabled 0: 1\n      PerPartVminEnabled 1: 0\n    VcBtcEnabled:\n      VcBtcEnabled 0: 0\n      VcBtcEnabled 1: 0\n    SocketPowerLimitAcTau:\n      SocketPowerLimitAcTau 0: 0\n      SocketPowerLimitAcTau 1: 0\n      SocketPowerLimitAcTau 2: 0\n      SocketPowerLimitAcTau 3: 0\n    SocketPowerLimitDcTau:\n      SocketPowerLimitDcTau 0: 0\n      SocketPowerLimitDcTau 1: 0\n      SocketPowerLimitDcTau 2: 0\n      SocketPowerLimitDcTau 3: 0\n    Gfx_Vmin_droop:\n      a: 0\n      b: 0.07057\n      c:-0.008\n    Soc_Vmin_droop:\n      a: 0\n      b: 0\n      c: 0\n    SpareVmin:\n      SpareVmin 0: 0\n      SpareVmin 1: 0\n      SpareVmin 2: 0\n      SpareVmin 3: 0\n      SpareVmin 4: 0\n      SpareVmin 5: 0\n    DpmDescriptor:\n      DpmDescriptor 0:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 3\n        ConversionToAvfsClk:\n          m: 0\n          b: 0\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 1200\n        FoptimalAc: 1200\n        Padding2: 0\n      DpmDescriptor 1:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.2282\n          b: 0.42558\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 78643200\n          Padding3 2: 1200\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16286\n      DpmDescriptor 2:\n        Padding: 211\n        SnapToDiscrete: 1\n        NumDiscreteLevels: 6\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.2445\n          b: 0.4475\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 256\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16312\n      DpmDescriptor 3:\n        Padding: 205\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1\n          b: 0\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16256\n      DpmDescriptor 4:\n        Padding: 0\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 0.9741\n          b: 0.46397\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16263\n      DpmDescriptor 5:\n        Padding: 199\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 0.8129\n          b: 0.15068\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16221\n      DpmDescriptor 6:\n        Padding: 125\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.1566\n          b: 0.21166\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16270\n      DpmDescriptor 7:\n        Padding: 229\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.1566\n          b: 0.21166\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16270\n      DpmDescriptor 8:\n        Padding: 229\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 1\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.2897\n          b: 0.17917\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16285\n      DpmDescriptor 9:\n        Padding: 10\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.2897\n          b: 0.17917\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16285\n      DpmDescriptor 10:\n        Padding: 10\n        SnapToDiscrete: 0\n        NumDiscreteLevels: 2\n        CalculateFopt: 0\n        ConversionToAvfsClk:\n          m: 1.2897\n          b: 0.17917\n        Padding3:\n          Padding3 0: 0\n          Padding3 1: 0\n          Padding3 2: 0\n        Padding4: 0\n        FoptimalDc: 0\n        FoptimalAc: 0\n        Padding2: 16285\n    FreqTableGfx:\n      FreqTableGfx 0: 500\n      FreqTableGfx 1: 3400\n      FreqTableGfx 2: 0\n      FreqTableGfx 3: 0\n      FreqTableGfx 4: 0\n      FreqTableGfx 5: 0\n      FreqTableGfx 6: 0\n      FreqTableGfx 7: 0\n      FreqTableGfx 8: 0\n      FreqTableGfx 9: 0\n      FreqTableGfx 10: 0\n      FreqTableGfx 11: 0\n      FreqTableGfx 12: 500\n      FreqTableGfx 13: 1000\n      FreqTableGfx 14: 0\n      FreqTableGfx 15: 0\n    FreqTableVclk:\n      FreqTableVclk 0: 800\n      FreqTableVclk 1: 2934\n      FreqTableVclk 2: 0\n      FreqTableVclk 3: 0\n      FreqTableVclk 4: 0\n      FreqTableVclk 5: 0\n      FreqTableVclk 6: 0\n      FreqTableVclk 7: 0\n    FreqTableDclk:\n      FreqTableDclk 0: 800\n      FreqTableDclk 1: 2200\n      FreqTableDclk 2: 0\n      FreqTableDclk 3: 0\n      FreqTableDclk 4: 800\n      FreqTableDclk 5: 2200\n      FreqTableDclk 6: 0\n      FreqTableDclk 7: 0\n    FreqTableSocclk:\n      FreqTableSocclk 0: 418\n      FreqTableSocclk 1: 1500\n      FreqTableSocclk 2: 0\n      FreqTableSocclk 3: 0\n      FreqTableSocclk 4: 800\n      FreqTableSocclk 5: 1467\n      FreqTableSocclk 6: 0\n      FreqTableSocclk 7: 0\n    FreqTableUclk:\n      FreqTableUclk 0: 97\n      FreqTableUclk 1: 457\n      FreqTableUclk 2: 773\n      FreqTableUclk 3: 875\n      FreqTableUclk 4: 1125\n      FreqTableUclk 5: 1259\n    FreqTableShadowUclk:\n      FreqTableShadowUclk 0: 102\n      FreqTableShadowUclk 1: 435\n      FreqTableShadowUclk 2: 731\n      FreqTableShadowUclk 3: 842\n      FreqTableShadowUclk 4: 1069\n      FreqTableShadowUclk 5: 1187\n    FreqTableDispclk:\n      FreqTableDispclk 0: 148\n      FreqTableDispclk 1: 2000\n      FreqTableDispclk 2: 773\n      FreqTableDispclk 3: 1000\n      FreqTableDispclk 4: 1125\n      FreqTableDispclk 5: 1250\n      FreqTableDispclk 6: 102\n      FreqTableDispclk 7: 435\n    FreqTableDppClk:\n      FreqTableDppClk 0: 148\n      FreqTableDppClk 1: 2000\n      FreqTableDppClk 2: 1069\n      FreqTableDppClk 3: 1187\n      FreqTableDppClk 4: 148\n      FreqTableDppClk 5: 1636\n      FreqTableDppClk 6: 0\n      FreqTableDppClk 7: 0\n    FreqTableDprefclk:\n      FreqTableDprefclk 0: 720\n      FreqTableDprefclk 1: 0\n      FreqTableDprefclk 2: 0\n      FreqTableDprefclk 3: 0\n      FreqTableDprefclk 4: 148\n      FreqTableDprefclk 5: 1636\n      FreqTableDprefclk 6: 0\n      FreqTableDprefclk 7: 0\n    FreqTableDcfclk:\n      FreqTableDcfclk 0: 148\n      FreqTableDcfclk 1: 1800\n      FreqTableDcfclk 2: 0\n      FreqTableDcfclk 3: 0\n      FreqTableDcfclk 4: 720\n      FreqTableDcfclk 5: 720\n      FreqTableDcfclk 6: 0\n      FreqTableDcfclk 7: 0\n    FreqTableDtbclk:\n      FreqTableDtbclk 0: 148\n      FreqTableDtbclk 1: 1800\n      FreqTableDtbclk 2: 0\n      FreqTableDtbclk 3: 0\n      FreqTableDtbclk 4: 148\n      FreqTableDtbclk 5: 1636\n      FreqTableDtbclk 6: 0\n      FreqTableDtbclk 7: 0\n    FreqTableFclk:\n      FreqTableFclk 0: 307\n      FreqTableFclk 1: 2400\n      FreqTableFclk 2: 0\n      FreqTableFclk 3: 0\n      FreqTableFclk 4: 148\n      FreqTableFclk 5: 1636\n      FreqTableFclk 6: 0\n      FreqTableFclk 7: 0\n    DcModeMaxFreq:\n      DcModeMaxFreq 0: 3400\n      DcModeMaxFreq 1: 1500\n      DcModeMaxFreq 2: 457\n      DcModeMaxFreq 3: 2400\n      DcModeMaxFreq 4: 2200\n      DcModeMaxFreq 5: 2934\n      DcModeMaxFreq 6: 2000\n      DcModeMaxFreq 7: 2000\n      DcModeMaxFreq 8: 720\n      DcModeMaxFreq 9: 1800\n      DcModeMaxFreq 10: 1800\n    GfxclkAibFmax: 0\n    GfxDpmPadding: 0\n    GfxclkFgfxoffEntry: 1200\n    GfxclkFgfxoffExitImu: 1000\n    GfxclkFgfxoffExitRlc: 1200\n    GfxclkThrottleClock: 250\n    EnableGfxPowerStagesGpio: 1\n    GfxIdlePadding: 2\n    SmsRepairWRCKClkDivEn: 0\n    SmsRepairWRCKClkDivVal: 0\n    GfxOffEntryEarlyMGCGEn: 1\n    GfxOffEntryForceCGCGEn: 1\n    GfxOffEntryForceCGCGDelayEn: 1\n    GfxOffEntryForceCGCGDelayVal: 200\n    GfxclkFreqGfxUlv: 0\n    GfxIdlePadding2:\n      GfxIdlePadding2 0: 0\n      GfxIdlePadding2 1: 0\n    GfxOffEntryHysteresis: 10000\n    GfxoffSpare:\n      GfxoffSpare 0: 32769200\n      GfxoffSpare 1: 16385200\n      GfxoffSpare 2: 0\n      GfxoffSpare 3: 0\n      GfxoffSpare 4: 0\n      GfxoffSpare 5: 10\n      GfxoffSpare 6: 0\n      GfxoffSpare 7: 0\n      GfxoffSpare 8: 0\n      GfxoffSpare 9: 0\n      GfxoffSpare 10: 0\n      GfxoffSpare 11: 0\n      GfxoffSpare 12: 0\n      GfxoffSpare 13: 0\n      GfxoffSpare 14: 0\n    DfllMstrOscConfigA: 0\n    DfllSlvOscConfigA: 0\n    DfllBtcMasterScalerM: 0\n    DfllBtcMasterScalerB: 0\n    DfllBtcSlaveScalerM: 0\n    DfllBtcSlaveScalerB: 0\n    DfllPccAsWaitCtrl: 0\n    DfllPccAsStepCtrl: 0\n    GfxDfllSpare:\n      GfxDfllSpare 0: 0\n      GfxDfllSpare 1: 0\n      GfxDfllSpare 2: 0\n      GfxDfllSpare 3: 0\n      GfxDfllSpare 4: 0\n      GfxDfllSpare 5: 0\n      GfxDfllSpare 6: 0\n      GfxDfllSpare 7: 0\n      GfxDfllSpare 8: 0\n    DvoPsmDownThresholdVoltage: 1.45\n    DvoPsmUpThresholdVoltage: 1.4\n    DvoFmaxLowScaler: 0.94\n    PaddingDcs: 0\n    DcsMinGfxOffTime: 6\n    DcsMaxGfxOffTime: 100\n    DcsMinCreditAccum: 0\n    DcsExitHysteresis: 40\n    DcsTimeout: 100\n    DcsPfGfxFopt: 500\n    DcsPfUclkFopt: 97\n    FoptEnabled: 1\n    DcsSpare2:\n      DcsSpare2 0: 0\n      DcsSpare2 1: 100\n      DcsSpare2 2: 0\n    DcsFoptM: 0\n    DcsFoptB: 0\n    DcsSpare:\n      DcsSpare 0: 0\n      DcsSpare 1: 0\n      DcsSpare 2: 0\n      DcsSpare 3: 0\n      DcsSpare 4: 0\n      DcsSpare 5: 0\n      DcsSpare 6: 0\n      DcsSpare 7: 0\n      DcsSpare 8: 0\n    UseStrobeModeOptimizations: 1\n    PaddingMem:\n      PaddingMem 0: 0\n      PaddingMem 1: 0\n      PaddingMem 2: 0\n    UclkDpmPstates:\n      UclkDpmPstates 0: 14\n      UclkDpmPstates 1: 12\n      UclkDpmPstates 2: 8\n      UclkDpmPstates 3: 4\n      UclkDpmPstates 4: 2\n      UclkDpmPstates 5: 0\n    UclkDpmShadowPstates:\n      UclkDpmShadowPstates 0: 15\n      UclkDpmShadowPstates 1: 13\n      UclkDpmShadowPstates 2: 9\n      UclkDpmShadowPstates 3: 5\n      UclkDpmShadowPstates 4: 3\n      UclkDpmShadowPstates 5: 1\n    FreqTableUclkDiv:\n      FreqTableUclkDiv 0: 0\n      FreqTableUclkDiv 1: 2\n      FreqTableUclkDiv 2: 3\n      FreqTableUclkDiv 3: 3\n      FreqTableUclkDiv 4: 3\n      FreqTableUclkDiv 5: 3\n    FreqTableShadowUclkDiv:\n      FreqTableShadowUclkDiv 0: 0\n      FreqTableShadowUclkDiv 1: 2\n      FreqTableShadowUclkDiv 2: 3\n      FreqTableShadowUclkDiv 3: 3\n      FreqTableShadowUclkDiv 4: 3\n      FreqTableShadowUclkDiv 5: 3\n    MemVmempVoltage:\n      MemVmempVoltage 0: 2700\n      MemVmempVoltage 1: 2800\n      MemVmempVoltage 2: 3000\n      MemVmempVoltage 3: 3000\n      MemVmempVoltage 4: 3400\n      MemVmempVoltage 5: 3400\n    MemVddioVoltage:\n      MemVddioVoltage 0: 5000\n      MemVddioVoltage 1: 5000\n      MemVddioVoltage 2: 5000\n      MemVddioVoltage 3: 5000\n      MemVddioVoltage 4: 5400\n      MemVddioVoltage 5: 5400\n    DalDcModeMaxUclkFreq: 457\n    PaddingsMem:\n      PaddingsMem 0: 136\n      PaddingsMem 1: 19\n    PaddingFclk: 327680457\n    PcieGenSpeed:\n      PcieGenSpeed 0: 0\n      PcieGenSpeed 1: 3\n      PcieGenSpeed 2: 4\n    PcieLaneCount:\n      PcieLaneCount 0: 6\n      PcieLaneCount 1: 6\n      PcieLaneCount 2: 6\n    LclkFreq:\n      LclkFreq 0: 250\n      LclkFreq 1: 616\n      LclkFreq 2: 1143\n    OverrideGfxAvfsFuses: 0\n    GfxAvfsPadding:\n      GfxAvfsPadding 0: 3\n    DroopGBStDev: 15\n    SocHwRtAvfsFuses:\n      SocHwRtAvfsFuses 0: 16777216\n      SocHwRtAvfsFuses 1: 16777216\n      SocHwRtAvfsFuses 2: 16777216\n      SocHwRtAvfsFuses 3: 16777216\n      SocHwRtAvfsFuses 4: 16777216\n      SocHwRtAvfsFuses 5: 65536\n      SocHwRtAvfsFuses 6: 32768\n      SocHwRtAvfsFuses 7: 65536\n      SocHwRtAvfsFuses 8: 32768\n      SocHwRtAvfsFuses 9: 65536\n      SocHwRtAvfsFuses 10: 32768\n      SocHwRtAvfsFuses 11: 65536\n      SocHwRtAvfsFuses 12: 32768\n      SocHwRtAvfsFuses 13: 65536\n      SocHwRtAvfsFuses 14: 32768\n      SocHwRtAvfsFuses 15: 18022577\n      SocHwRtAvfsFuses 16: 19988698\n      SocHwRtAvfsFuses 17: 22544637\n      SocHwRtAvfsFuses 18: 25887007\n      SocHwRtAvfsFuses 19: 0\n      SocHwRtAvfsFuses 20: 0\n      SocHwRtAvfsFuses 21: 0\n      SocHwRtAvfsFuses 22: 0\n      SocHwRtAvfsFuses 23: 0\n      SocHwRtAvfsFuses 24: 0\n      SocHwRtAvfsFuses 25: 0\n      SocHwRtAvfsFuses 26: 0\n      SocHwRtAvfsFuses 27: 0\n      SocHwRtAvfsFuses 28: 2490406\n      SocHwRtAvfsFuses 29: 2490406\n      SocHwRtAvfsFuses 30: 38\n      SocHwRtAvfsFuses 31: 65535\n    GfxL2HwRtAvfsFuses:\n      GfxL2HwRtAvfsFuses 0: 16777216\n      GfxL2HwRtAvfsFuses 1: 16777216\n      GfxL2HwRtAvfsFuses 2: 16777216\n      GfxL2HwRtAvfsFuses 3: 16777216\n      GfxL2HwRtAvfsFuses 4: 16777216\n      GfxL2HwRtAvfsFuses 5: 2835136512\n      GfxL2HwRtAvfsFuses 6: 1141125120\n      GfxL2HwRtAvfsFuses 7: 2835136512\n      GfxL2HwRtAvfsFuses 8: 1141125120\n      GfxL2HwRtAvfsFuses 9: 2835136512\n      GfxL2HwRtAvfsFuses 10: 1141125120\n      GfxL2HwRtAvfsFuses 11: 2835136512\n      GfxL2HwRtAvfsFuses 12: 1141125120\n      GfxL2HwRtAvfsFuses 13: 2835136512\n      GfxL2HwRtAvfsFuses 14: 1141125120\n      GfxL2HwRtAvfsFuses 15: 18024390\n      GfxL2HwRtAvfsFuses 16: 19990839\n      GfxL2HwRtAvfsFuses 17: 22546964\n      GfxL2HwRtAvfsFuses 18: 25889669\n      GfxL2HwRtAvfsFuses 19: 0\n      GfxL2HwRtAvfsFuses 20: 0\n      GfxL2HwRtAvfsFuses 21: 0\n      GfxL2HwRtAvfsFuses 22: 0\n      GfxL2HwRtAvfsFuses 23: 0\n      GfxL2HwRtAvfsFuses 24: 0\n      GfxL2HwRtAvfsFuses 25: 0\n      GfxL2HwRtAvfsFuses 26: 0\n      GfxL2HwRtAvfsFuses 27: 0\n      GfxL2HwRtAvfsFuses 28: 2147844101\n      GfxL2HwRtAvfsFuses 29: 2147844101\n      GfxL2HwRtAvfsFuses 30: 32773\n      GfxL2HwRtAvfsFuses 31: 65535\n    PsmDidt_Vcross:\n      PsmDidt_Vcross 0: 850\n      PsmDidt_Vcross 1: 1000\n    PsmDidt_StaticDroop_A:\n      PsmDidt_StaticDroop_A 0: 0.8\n      PsmDidt_StaticDroop_A 1: 0.8\n      PsmDidt_StaticDroop_A 2: 0.8\n    PsmDidt_StaticDroop_B:\n      PsmDidt_StaticDroop_B 0: 0\n      PsmDidt_StaticDroop_B 1: 0\n      PsmDidt_StaticDroop_B 2: 0\n    PsmDidt_DynDroop_A:\n      PsmDidt_DynDroop_A 0: 0\n      PsmDidt_DynDroop_A 1: 0\n      PsmDidt_DynDroop_A 2: 0\n    PsmDidt_DynDroop_B:\n      PsmDidt_DynDroop_B 0: 0\n      PsmDidt_DynDroop_B 1: 0\n      PsmDidt_DynDroop_B 2: 0\n    spare_HwRtAvfsFuses:\n      spare_HwRtAvfsFuses 0: 0\n      spare_HwRtAvfsFuses 1: 0\n      spare_HwRtAvfsFuses 2: 0\n      spare_HwRtAvfsFuses 3: 0\n      spare_HwRtAvfsFuses 4: 0\n      spare_HwRtAvfsFuses 5: 0\n      spare_HwRtAvfsFuses 6: 0\n      spare_HwRtAvfsFuses 7: 0\n      spare_HwRtAvfsFuses 8: 0\n      spare_HwRtAvfsFuses 9: 0\n      spare_HwRtAvfsFuses 10: 0\n      spare_HwRtAvfsFuses 11: 0\n      spare_HwRtAvfsFuses 12: 0\n      spare_HwRtAvfsFuses 13: 0\n      spare_HwRtAvfsFuses 14: 0\n      spare_HwRtAvfsFuses 15: 0\n      spare_HwRtAvfsFuses 16: 0\n      spare_HwRtAvfsFuses 17: 0\n      spare_HwRtAvfsFuses 18: 0\n    SocCommonRtAvfs:\n      SocCommonRtAvfs 0: 700\n      SocCommonRtAvfs 1: 700\n      SocCommonRtAvfs 2: 700\n      SocCommonRtAvfs 3: 700\n      SocCommonRtAvfs 4: 700\n      SocCommonRtAvfs 5: 700\n      SocCommonRtAvfs 6: 700\n      SocCommonRtAvfs 7: 700\n      SocCommonRtAvfs 8: 0\n      SocCommonRtAvfs 9: 0\n      SocCommonRtAvfs 10: 0\n      SocCommonRtAvfs 11: 0\n      SocCommonRtAvfs 12: 0\n    GfxCommonRtAvfs:\n      GfxCommonRtAvfs 0: 700\n      GfxCommonRtAvfs 1: 700\n      GfxCommonRtAvfs 2: 700\n      GfxCommonRtAvfs 3: 700\n      GfxCommonRtAvfs 4: 700\n      GfxCommonRtAvfs 5: 700\n      GfxCommonRtAvfs 6: 700\n      GfxCommonRtAvfs 7: 700\n      GfxCommonRtAvfs 8: 0\n      GfxCommonRtAvfs 9: 0\n      GfxCommonRtAvfs 10: 0\n      GfxCommonRtAvfs 11: 0\n      GfxCommonRtAvfs 12: 0\n    SocFwRtAvfsFuses:\n      SocFwRtAvfsFuses 0: 11\n      SocFwRtAvfsFuses 1: 11\n      SocFwRtAvfsFuses 2: 9\n      SocFwRtAvfsFuses 3: 13\n      SocFwRtAvfsFuses 4: 24\n      SocFwRtAvfsFuses 5: 24\n      SocFwRtAvfsFuses 6: 0\n      SocFwRtAvfsFuses 7: 0\n      SocFwRtAvfsFuses 8: 1\n      SocFwRtAvfsFuses 9: 1\n      SocFwRtAvfsFuses 10: 0\n      SocFwRtAvfsFuses 11: 0\n      SocFwRtAvfsFuses 12: 0\n      SocFwRtAvfsFuses 13: 3000\n      SocFwRtAvfsFuses 14: 1012\n      SocFwRtAvfsFuses 15: 1012\n      SocFwRtAvfsFuses 16: 1012\n      SocFwRtAvfsFuses 17: 1012\n      SocFwRtAvfsFuses 18: 1012\n    GfxL2FwRtAvfsFuses:\n      GfxL2FwRtAvfsFuses 0: 4\n      GfxL2FwRtAvfsFuses 1: 4\n      GfxL2FwRtAvfsFuses 2: 3\n      GfxL2FwRtAvfsFuses 3: 5\n      GfxL2FwRtAvfsFuses 4: 10\n      GfxL2FwRtAvfsFuses 5: 10\n      GfxL2FwRtAvfsFuses 6: 0\n      GfxL2FwRtAvfsFuses 7: 0\n      GfxL2FwRtAvfsFuses 8: 1\n      GfxL2FwRtAvfsFuses 9: 1\n      GfxL2FwRtAvfsFuses 10: 1\n      GfxL2FwRtAvfsFuses 11: 1\n      GfxL2FwRtAvfsFuses 12: 0\n      GfxL2FwRtAvfsFuses 13: 3318\n      GfxL2FwRtAvfsFuses 14: 7374\n      GfxL2FwRtAvfsFuses 15: 7374\n      GfxL2FwRtAvfsFuses 16: 7374\n      GfxL2FwRtAvfsFuses 17: 7374\n      GfxL2FwRtAvfsFuses 18: 7374\n    spare_FwRtAvfsFuses:\n      spare_FwRtAvfsFuses 0: 0\n      spare_FwRtAvfsFuses 1: 0\n      spare_FwRtAvfsFuses 2: 0\n      spare_FwRtAvfsFuses 3: 0\n      spare_FwRtAvfsFuses 4: 0\n      spare_FwRtAvfsFuses 5: 0\n      spare_FwRtAvfsFuses 6: 0\n      spare_FwRtAvfsFuses 7: 0\n      spare_FwRtAvfsFuses 8: 0\n      spare_FwRtAvfsFuses 9: 0\n      spare_FwRtAvfsFuses 10: 0\n      spare_FwRtAvfsFuses 11: 0\n      spare_FwRtAvfsFuses 12: 0\n      spare_FwRtAvfsFuses 13: 0\n      spare_FwRtAvfsFuses 14: 0\n      spare_FwRtAvfsFuses 15: 0\n      spare_FwRtAvfsFuses 16: 0\n      spare_FwRtAvfsFuses 17: 0\n      spare_FwRtAvfsFuses 18: 0\n    Soc_Droop_PWL_F:\n      Soc_Droop_PWL_F 0: 1\n      Soc_Droop_PWL_F 1: 1.8\n      Soc_Droop_PWL_F 2: 2.7\n      Soc_Droop_PWL_F 3: 3\n      Soc_Droop_PWL_F 4: 3.6\n    Soc_Droop_PWL_a:\n      Soc_Droop_PWL_a 0: 0.06767\n      Soc_Droop_PWL_a 1: 0.06767\n      Soc_Droop_PWL_a 2: 0.06767\n      Soc_Droop_PWL_a 3: 0.06767\n      Soc_Droop_PWL_a 4: 0.06767\n    Soc_Droop_PWL_b:\n      Soc_Droop_PWL_b 0: 0.05841\n      Soc_Droop_PWL_b 1: 0.05841\n      Soc_Droop_PWL_b 2: 0.05841\n      Soc_Droop_PWL_b 3: 0.05841\n      Soc_Droop_PWL_b 4: 0.05841\n    Soc_Droop_PWL_c:\n      Soc_Droop_PWL_c 0:-0.04782\n      Soc_Droop_PWL_c 1:-0.04782\n      Soc_Droop_PWL_c 2:-0.04782\n      Soc_Droop_PWL_c 3:-0.04782\n      Soc_Droop_PWL_c 4:-0.04782\n    Gfx_Droop_PWL_F:\n      Gfx_Droop_PWL_F 0: 1\n      Gfx_Droop_PWL_F 1: 2.8\n      Gfx_Droop_PWL_F 2: 2.88\n      Gfx_Droop_PWL_F 3: 3.2\n      Gfx_Droop_PWL_F 4: 3.6\n    Gfx_Droop_PWL_a:\n      Gfx_Droop_PWL_a 0: 0.57163\n      Gfx_Droop_PWL_a 1: 0.57163\n      Gfx_Droop_PWL_a 2: 0.57163\n      Gfx_Droop_PWL_a 3: 0.39231\n      Gfx_Droop_PWL_a 4: 0.39231\n    Gfx_Droop_PWL_b:\n      Gfx_Droop_PWL_b 0: 0.02563\n      Gfx_Droop_PWL_b 1: 0.02563\n      Gfx_Droop_PWL_b 2: 0.02563\n      Gfx_Droop_PWL_b 3: 0.19319\n      Gfx_Droop_PWL_b 4: 0.19319\n    Gfx_Droop_PWL_c:\n      Gfx_Droop_PWL_c 0:-0.29534\n      Gfx_Droop_PWL_c 1:-0.28834\n      Gfx_Droop_PWL_c 2:-0.28034\n      Gfx_Droop_PWL_c 3:-0.65435\n      Gfx_Droop_PWL_c 4:-0.65435\n    Gfx_Static_PWL_Offset:\n      Gfx_Static_PWL_Offset 0: 0\n      Gfx_Static_PWL_Offset 1: 0\n      Gfx_Static_PWL_Offset 2: 0\n      Gfx_Static_PWL_Offset 3: 0\n      Gfx_Static_PWL_Offset 4: 0\n    Soc_Static_PWL_Offset:\n      Soc_Static_PWL_Offset 0: 0\n      Soc_Static_PWL_Offset 1: 0\n      Soc_Static_PWL_Offset 2: 0\n      Soc_Static_PWL_Offset 3: 0\n      Soc_Static_PWL_Offset 4: 0\n    dGbV_dT_vmin: 0\n    dGbV_dT_vmax: 0\n    PaddingV2F:\n      PaddingV2F 0: 0\n      PaddingV2F 1: 0\n      PaddingV2F 2: 0\n      PaddingV2F 3: 0\n    DcBtcGfxParams:\n      DcBtcEnabled: 0\n      Padding:\n        Padding 0: 0\n        Padding 1: 0\n        Padding 2: 0\n      DcTol: 20\n      DcBtcGb: 0\n      DcBtcMin: 0\n      DcBtcMax: 0\n      DcBtcGbScalar:\n        m: 0\n        b: 0\n    SSCurve_GFX:\n      a: 0.1116\n      b:-0.2277\n      c: 0.7467\n    GfxAvfsSpare:\n      GfxAvfsSpare 0: 1041026253\n      GfxAvfsSpare 1: 3196586453\n      GfxAvfsSpare 2: 1061281386\n      GfxAvfsSpare 3: 0\n      GfxAvfsSpare 4: 0\n      GfxAvfsSpare 5: 0\n      GfxAvfsSpare 6: 0\n      GfxAvfsSpare 7: 0\n      GfxAvfsSpare 8: 0\n      GfxAvfsSpare 9: 0\n      GfxAvfsSpare 10: 0\n      GfxAvfsSpare 11: 0\n      GfxAvfsSpare 12: 0\n      GfxAvfsSpare 13: 0\n      GfxAvfsSpare 14: 0\n      GfxAvfsSpare 15: 0\n      GfxAvfsSpare 16: 0\n      GfxAvfsSpare 17: 0\n      GfxAvfsSpare 18: 0\n      GfxAvfsSpare 19: 0\n      GfxAvfsSpare 20: 0\n      GfxAvfsSpare 21: 0\n      GfxAvfsSpare 22: 0\n      GfxAvfsSpare 23: 0\n      GfxAvfsSpare 24: 0\n      GfxAvfsSpare 25: 0\n      GfxAvfsSpare 26: 0\n      GfxAvfsSpare 27: 0\n      GfxAvfsSpare 28: 0\n    OverrideSocAvfsFuses: 0\n    MinSocAvfsRevision: 0\n    SocAvfsPadding:\n      SocAvfsPadding 0: 0\n      SocAvfsPadding 1: 0\n    SocAvfsFuseOverride:\n      SocAvfsFuseOverride 0:\n        AvfsTemp:\n          AvfsTemp 0: 0\n          AvfsTemp 1: 0\n        VftFMin: 0\n        VInversion: 0\n        qVft:\n          qVft 0:\n            a: 0\n            b: 0\n            c: 0\n          qVft 1:\n            a: 0\n            b: 0\n            c: 0\n        qAvfsGb:\n          a: 0\n          b: 0\n          c: 0\n        qAvfsGb2:\n          a: 0\n          b: 0\n          c: 0\n    dBtcGbSoc:\n      dBtcGbSoc 0:\n        a: 0\n        b: 0\n        c: 0\n    qAgingGb:\n      qAgingGb 0:\n        m: 0\n        b: 0\n    qStaticVoltageOffset:\n      qStaticVoltageOffset 0:\n        a: 0\n        b: 0\n        c: 0\n    DcBtcSocParams:\n      DcBtcSocParams 0:\n        DcBtcEnabled: 0\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n        DcTol: 20\n        DcBtcGb: 0\n        DcBtcMin: 0\n        DcBtcMax: 0\n        DcBtcGbScalar:\n          m: 0\n          b: 0\n    SSCurve_SOC:\n      a: 0.1511\n      b:-0.2654\n      c: 0.7634\n    SocAvfsSpare:\n      SocAvfsSpare 0: 3167914190\n      SocAvfsSpare 1: 1057553488\n      SocAvfsSpare 2: 0\n      SocAvfsSpare 3: 0\n      SocAvfsSpare 4: 0\n      SocAvfsSpare 5: 0\n      SocAvfsSpare 6: 0\n      SocAvfsSpare 7: 0\n      SocAvfsSpare 8: 0\n      SocAvfsSpare 9: 0\n      SocAvfsSpare 10: 0\n      SocAvfsSpare 11: 0\n      SocAvfsSpare 12: 0\n      SocAvfsSpare 13: 0\n      SocAvfsSpare 14: 0\n      SocAvfsSpare 15: 0\n      SocAvfsSpare 16: 0\n      SocAvfsSpare 17: 0\n      SocAvfsSpare 18: 0\n      SocAvfsSpare 19: 0\n      SocAvfsSpare 20: 0\n      SocAvfsSpare 21: 0\n      SocAvfsSpare 22: 0\n      SocAvfsSpare 23: 0\n      SocAvfsSpare 24: 0\n      SocAvfsSpare 25: 0\n      SocAvfsSpare 26: 0\n      SocAvfsSpare 27: 0\n      SocAvfsSpare 28: 0\n    BootValues:\n      InitImuClk: 600\n      InitSocclk: 418\n      InitMpioclk: 500\n      InitSmnclk: 500\n      InitDispClk: 600\n      InitDppClk: 600\n      InitDprefclk: 720\n      InitDcfclk: 720\n      InitDtbclk: 720\n      InitDbguSocClk: 0\n      InitGfxclk_bypass: 1000\n      InitMp1clk: 500\n      InitLclk: 1143\n      InitDbguBacoClk: 0\n      InitBaco400clk: 400\n      InitBaco1200clk_bypass: 1143\n      InitBaco700clk_bypass: 696\n      InitBaco500clk: 500\n      InitDclk0: 0\n      InitVclk0: 0\n      InitFclk: 1000\n      Padding1: 1200\n      InitUclkLevel: 5\n      Padding:\n        Padding 0: 2\n        Padding 1: 244\n        Padding 2: 1\n      InitVcoFreqPll0: 4800\n      InitVcoFreqPll1: 4500\n      InitVcoFreqPll2: 4000\n      InitVcoFreqPll3: 0\n      InitVcoFreqPll4: 2000\n      InitVcoFreqPll5: 4000\n      InitVcoFreqPll6: 4000\n      InitVcoFreqPll7: 4000\n      InitVcoFreqPll8: 4000\n      InitGfx: 0\n      InitSoc: 3300\n      InitVddIoMem: 5000\n      InitVddCiMem: 2800\n      Spare:\n        Spare 0: 4000\n        Spare 1: 183500800\n        Spare 2: 183505800\n        Spare 3: 0\n        Spare 4: 0\n        Spare 5: 0\n        Spare 6: 0\n        Spare 7: 0\n    DriverReportedClocks:\n      BaseClockAc: 1240\n      GameClockAc: 2070\n      BoostClockAc: 2520\n      BaseClockDc: 0\n      GameClockDc: 0\n      BoostClockDc: 0\n      MaxReportedClock: 3400\n      Padding: 0\n      Reserved:\n        Reserved 0: 0\n        Reserved 1: 0\n        Reserved 2: 0\n    MsgLimits:\n      Power:\n        Power 0:\n          0 0: 245\n          0 1: 245\n        Power 1:\n          1 0: 1200\n          1 1: 1200\n        Power 2:\n          2 0: 0\n          2 1: 0\n        Power 3:\n          3 0: 0\n          3 1: 0\n      Tdc:\n        Tdc 0: 330\n        Tdc 1: 84\n      Temperature:\n        Temperature 0: 110\n        Temperature 1: 110\n        Temperature 2: 0\n        Temperature 3: 0\n        Temperature 4: 108\n        Temperature 5: 115\n        Temperature 6: 115\n        Temperature 7: 115\n        Temperature 8: 115\n        Temperature 9: 0\n        Temperature 10: 0\n        Temperature 11: 0\n      PwmLimitMin: 0\n      PwmLimitMax: 255\n      FanTargetTemperature: 110\n      Spare1:\n        Spare1 0: 0\n      AcousticTargetRpmThresholdMin: 500\n      AcousticTargetRpmThresholdMax: 6000\n      AcousticLimitRpmThresholdMin: 500\n      AcousticLimitRpmThresholdMax: 6000\n      PccLimitMin: 0\n      PccLimitMax: 0\n      FanStopTempMin: 30\n      FanStopTempMax: 80\n      FanStartTempMin: 40\n      FanStartTempMax: 90\n      PowerMinPpt0:\n        PowerMinPpt0 0: 0\n        PowerMinPpt0 1: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n        Spare 5: 0\n        Spare 6: 0\n        Spare 7: 0\n        Spare 8: 0\n        Spare 9: 0\n        Spare 10: 0\n    OverDriveLimitsBasicMin:\n      FeatureCtrlMask: 6969\n      VoltageOffsetPerZoneBoundary:\n        VoltageOffsetPerZoneBoundary 0: -200\n        VoltageOffsetPerZoneBoundary 1: -200\n        VoltageOffsetPerZoneBoundary 2: -200\n        VoltageOffsetPerZoneBoundary 3: -200\n        VoltageOffsetPerZoneBoundary 4: -200\n        VoltageOffsetPerZoneBoundary 5: -200\n      VddGfxVmax: 0\n      VddSocVmax: 0\n      GfxclkFoffset: -500\n      Padding: 0\n      UclkFmin: 97\n      UclkFmax: 97\n      FclkFmin: 0\n      FclkFmax: 0\n      Ppt: -30\n      Tdc: 0\n      FanLinearPwmPoints:\n        FanLinearPwmPoints 0: 25\n        FanLinearPwmPoints 1: 25\n        FanLinearPwmPoints 2: 25\n        FanLinearPwmPoints 3: 25\n        FanLinearPwmPoints 4: 25\n        FanLinearPwmPoints 5: 25\n      FanLinearTempPoints:\n        FanLinearTempPoints 0: 25\n        FanLinearTempPoints 1: 25\n        FanLinearTempPoints 2: 25\n        FanLinearTempPoints 3: 25\n        FanLinearTempPoints 4: 25\n        FanLinearTempPoints 5: 25\n      FanMinimumPwm: 25\n      AcousticTargetRpmThreshold: 500\n      AcousticLimitRpmThreshold: 500\n      FanTargetTemperature: 25\n      FanZeroRpmEnable: 0\n      MaxOpTemp: 50\n      Padding1:\n        Padding1 0: 0\n        Padding1 1: 0\n      GfxVoltageFullCtrlMode: 0\n      SocVoltageFullCtrlMode: 0\n      GfxclkFullCtrlMode: 0\n      UclkFullCtrlMode: 0\n      FclkFullCtrlMode: 0\n      GfxEdc: 0\n      GfxPccLimitControl: 0\n      Padding2: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n    OverDriveLimitsBasicMax:\n      FeatureCtrlMask: 6969\n      VoltageOffsetPerZoneBoundary:\n        VoltageOffsetPerZoneBoundary 0: 0\n        VoltageOffsetPerZoneBoundary 1: 0\n        VoltageOffsetPerZoneBoundary 2: 0\n        VoltageOffsetPerZoneBoundary 3: 0\n        VoltageOffsetPerZoneBoundary 4: 0\n        VoltageOffsetPerZoneBoundary 5: 0\n      VddGfxVmax: 0\n      VddSocVmax: 0\n      GfxclkFoffset: 1000\n      Padding: 0\n      UclkFmin: 1500\n      UclkFmax: 1500\n      FclkFmin: 0\n      FclkFmax: 0\n      Ppt: 10\n      Tdc: 0\n      FanLinearPwmPoints:\n        FanLinearPwmPoints 0: 100\n        FanLinearPwmPoints 1: 100\n        FanLinearPwmPoints 2: 100\n        FanLinearPwmPoints 3: 100\n        FanLinearPwmPoints 4: 100\n        FanLinearPwmPoints 5: 100\n      FanLinearTempPoints:\n        FanLinearTempPoints 0: 100\n        FanLinearTempPoints 1: 100\n        FanLinearTempPoints 2: 100\n        FanLinearTempPoints 3: 100\n        FanLinearTempPoints 4: 100\n        FanLinearTempPoints 5: 100\n      FanMinimumPwm: 100\n      AcousticTargetRpmThreshold: 3650\n      AcousticLimitRpmThreshold: 3650\n      FanTargetTemperature: 105\n      FanZeroRpmEnable: 1\n      MaxOpTemp: 110\n      Padding1:\n        Padding1 0: 0\n        Padding1 1: 0\n      GfxVoltageFullCtrlMode: 0\n      SocVoltageFullCtrlMode: 0\n      GfxclkFullCtrlMode: 0\n      UclkFullCtrlMode: 0\n      FclkFullCtrlMode: 0\n      GfxEdc: 0\n      GfxPccLimitControl: 0\n      Padding2: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n    OverDriveLimitsAdvancedMin:\n      FeatureCtrlMask: 0\n      VoltageOffsetPerZoneBoundary:\n        VoltageOffsetPerZoneBoundary 0: 0\n        VoltageOffsetPerZoneBoundary 1: 0\n        VoltageOffsetPerZoneBoundary 2: 0\n        VoltageOffsetPerZoneBoundary 3: 0\n        VoltageOffsetPerZoneBoundary 4: 0\n        VoltageOffsetPerZoneBoundary 5: 0\n      VddGfxVmax: 0\n      VddSocVmax: 0\n      GfxclkFoffset: 0\n      Padding: 0\n      UclkFmin: 0\n      UclkFmax: 0\n      FclkFmin: 0\n      FclkFmax: 0\n      Ppt: 0\n      Tdc: 0\n      FanLinearPwmPoints:\n        FanLinearPwmPoints 0: 0\n        FanLinearPwmPoints 1: 0\n        FanLinearPwmPoints 2: 0\n        FanLinearPwmPoints 3: 0\n        FanLinearPwmPoints 4: 0\n        FanLinearPwmPoints 5: 0\n      FanLinearTempPoints:\n        FanLinearTempPoints 0: 0\n        FanLinearTempPoints 1: 0\n        FanLinearTempPoints 2: 0\n        FanLinearTempPoints 3: 0\n        FanLinearTempPoints 4: 0\n        FanLinearTempPoints 5: 0\n      FanMinimumPwm: 0\n      AcousticTargetRpmThreshold: 0\n      AcousticLimitRpmThreshold: 0\n      FanTargetTemperature: 0\n      FanZeroRpmEnable: 0\n      MaxOpTemp: 0\n      Padding1:\n        Padding1 0: 0\n        Padding1 1: 0\n      GfxVoltageFullCtrlMode: 0\n      SocVoltageFullCtrlMode: 0\n      GfxclkFullCtrlMode: 0\n      UclkFullCtrlMode: 0\n      FclkFullCtrlMode: 0\n      GfxEdc: 0\n      GfxPccLimitControl: 0\n      Padding2: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n    OverDriveLimitsAdvancedMax:\n      FeatureCtrlMask: 0\n      VoltageOffsetPerZoneBoundary:\n        VoltageOffsetPerZoneBoundary 0: 0\n        VoltageOffsetPerZoneBoundary 1: 0\n        VoltageOffsetPerZoneBoundary 2: 0\n        VoltageOffsetPerZoneBoundary 3: 0\n        VoltageOffsetPerZoneBoundary 4: 0\n        VoltageOffsetPerZoneBoundary 5: 0\n      VddGfxVmax: 0\n      VddSocVmax: 0\n      GfxclkFoffset: 0\n      Padding: 0\n      UclkFmin: 0\n      UclkFmax: 0\n      FclkFmin: 0\n      FclkFmax: 0\n      Ppt: 0\n      Tdc: 0\n      FanLinearPwmPoints:\n        FanLinearPwmPoints 0: 0\n        FanLinearPwmPoints 1: 0\n        FanLinearPwmPoints 2: 0\n        FanLinearPwmPoints 3: 0\n        FanLinearPwmPoints 4: 0\n        FanLinearPwmPoints 5: 0\n      FanLinearTempPoints:\n        FanLinearTempPoints 0: 0\n        FanLinearTempPoints 1: 0\n        FanLinearTempPoints 2: 0\n        FanLinearTempPoints 3: 0\n        FanLinearTempPoints 4: 0\n        FanLinearTempPoints 5: 0\n      FanMinimumPwm: 0\n      AcousticTargetRpmThreshold: 0\n      AcousticLimitRpmThreshold: 0\n      FanTargetTemperature: 0\n      FanZeroRpmEnable: 0\n      MaxOpTemp: 0\n      Padding1:\n        Padding1 0: 0\n        Padding1 1: 0\n      GfxVoltageFullCtrlMode: 0\n      SocVoltageFullCtrlMode: 0\n      GfxclkFullCtrlMode: 0\n      UclkFullCtrlMode: 0\n      FclkFullCtrlMode: 0\n      GfxEdc: 0\n      GfxPccLimitControl: 0\n      Padding2: 0\n      Spare:\n        Spare 0: 0\n        Spare 1: 0\n        Spare 2: 0\n        Spare 3: 0\n        Spare 4: 0\n    TotalBoardPowerSupport: 0\n    TotalBoardPowerPadding:\n      TotalBoardPowerPadding 0: 0\n    TotalBoardPowerRoc: 0\n    qFeffCoeffGameClock:\n      qFeffCoeffGameClock 0:\n        a: 0.01852\n        b:-2.95472\n        c: 1824.84\n      qFeffCoeffGameClock 1:\n        a: 0\n        b: 0\n        c: 0\n    qFeffCoeffBaseClock:\n      qFeffCoeffBaseClock 0:\n        a: 0.08559\n        b:-31.9188\n        c: 4128.76\n      qFeffCoeffBaseClock 1:\n        a: 0\n        b: 0\n        c: 0\n    qFeffCoeffBoostClock:\n      qFeffCoeffBoostClock 0:\n        a:-0.0121\n        b: 12.7634\n        c: 300.984\n      qFeffCoeffBoostClock 1:\n        a: 0\n        b: 0\n        c: 0\n    AptUclkGfxclkLookup:\n      AptUclkGfxclkLookup 0:\n        0 0: 0\n        0 1: 933\n        0 2: 1717\n        0 3: 2062\n        0 4: 2307\n        0 5: 2800\n      AptUclkGfxclkLookup 1:\n        1 0: 0\n        1 1: 933\n        1 2: 1717\n        1 3: 2062\n        1 4: 2307\n        1 5: 2800\n    AptUclkGfxclkLookupHyst:\n      AptUclkGfxclkLookupHyst 0:\n        0 0: 100\n        0 1: 477\n        0 2: 106\n        0 3: 389\n        0 4: 136\n        0 5: 100\n      AptUclkGfxclkLookupHyst 1:\n        1 0: 100\n        1 1: 477\n        1 2: 106\n        1 3: 389\n        1 4: 136\n        1 5: 100\n    AptPadding: 0\n    GfxXvminDidtDroopThresh:\n      a: 0\n      b: 1\n      c:-0.1\n    GfxXvminDidtResetDDWait: 80\n    GfxXvminDidtClkStopWait: 1\n    GfxXvminDidtFcsStepCtrl: 2589730\n    GfxXvminDidtFcsWaitCtrl: 983055\n    PsmModeEnabled: 9\n    P2v_a: 0\n    P2v_b: 0\n    P2v_c: 0\n    T2p_a: 0\n    T2p_b: 0\n    T2p_c: 0\n    P2vTemp: 0\n    PsmDidtStaticSettings:\n      a: 0\n      b: 0.8\n      c: 0.005\n    PsmDidtDynamicSettings:\n      a: 0\n      b: 0\n      c: 0.03\n    PsmDidtAvgDiv: 1\n    PsmDidtForceStall: 0\n    PsmDidtReleaseTimer: 16\n    PsmDidtStallPattern: 21845\n    CacEdcCacLeakageC0: 5.17\n    CacEdcCacLeakageC1:-6.91\n    CacEdcCacLeakageC2: 0.01487\n    CacEdcCacLeakageC3: 0.06567\n    CacEdcCacLeakageC4: 5.83203\n    CacEdcCacLeakageC5:-0.04901\n    CacEdcGfxClkScalar: 0\n    CacEdcGfxClkIntercept: 0\n    CacEdcCac_m: 68.8\n    CacEdcCac_b: 26.9\n    CacEdcCurrLimitGuardband: 0\n    CacEdcDynToTotalCacRatio: 0\n    XVmin_Gfx_EdcThreshScalar: 0.84\n    XVmin_Gfx_EdcEnableFreq: 0\n    XVmin_Gfx_EdcPccAsStepCtrl: 2065462\n    XVmin_Gfx_EdcPccAsWaitCtrl: 4194368\n    XVmin_Gfx_EdcThreshold: 50\n    XVmin_Gfx_EdcFiltHysWaitCtrl: 200\n    XVmin_Soc_EdcThreshScalar: 1.26\n    XVmin_Soc_EdcEnableFreq: 0\n    XVmin_Soc_EdcThreshold: 50\n    XVmin_Soc_EdcStepUpTime: 10\n    XVmin_Soc_EdcStepDownTime: 10\n    XVmin_Soc_EdcInitPccStep: 5\n    PaddingSocEdc:\n      PaddingSocEdc 0: 0\n      PaddingSocEdc 1: 0\n      PaddingSocEdc 2: 0\n    GfxXvminFuseOverride: 0\n    SocXvminFuseOverride: 0\n    PaddingXvminFuseOverride:\n      PaddingXvminFuseOverride 0: 0\n      PaddingXvminFuseOverride 1: 0\n    GfxXvminFddTempLow: 0\n    GfxXvminFddTempHigh: 0\n    SocXvminFddTempLow: 0\n    SocXvminFddTempHigh: 0\n    GfxXvminFddVolt0: 0\n    GfxXvminFddVolt1: 0\n    GfxXvminFddVolt2: 0\n    SocXvminFddVolt0: 0\n    SocXvminFddVolt1: 0\n    SocXvminFddVolt2: 0\n    GfxXvminDsFddDsm:\n      GfxXvminDsFddDsm 0: 0\n      GfxXvminDsFddDsm 1: 0\n      GfxXvminDsFddDsm 2: 0\n      GfxXvminDsFddDsm 3: 0\n      GfxXvminDsFddDsm 4: 0\n      GfxXvminDsFddDsm 5: 0\n    GfxXvminEdcFddDsm:\n      GfxXvminEdcFddDsm 0: 0\n      GfxXvminEdcFddDsm 1: 0\n      GfxXvminEdcFddDsm 2: 0\n      GfxXvminEdcFddDsm 3: 0\n      GfxXvminEdcFddDsm 4: 0\n      GfxXvminEdcFddDsm 5: 0\n    SocXvminEdcFddDsm:\n      SocXvminEdcFddDsm 0: 0\n      SocXvminEdcFddDsm 1: 0\n      SocXvminEdcFddDsm 2: 0\n      SocXvminEdcFddDsm 3: 0\n      SocXvminEdcFddDsm 4: 0\n      SocXvminEdcFddDsm 5: 0\n    Spare: 9830500\n    MmHubPadding:\n      MmHubPadding 0: 0\n      MmHubPadding 1: 0\n      MmHubPadding 2: 0\n      MmHubPadding 3: 0\n      MmHubPadding 4: 0\n      MmHubPadding 5: 0\n      MmHubPadding 6: 0\n      MmHubPadding 7: 0\n  CustomSkuTable:\n    SocketPowerLimitAc:\n      SocketPowerLimitAc 0: 220\n      SocketPowerLimitAc 1: 1200\n      SocketPowerLimitAc 2: 0\n      SocketPowerLimitAc 3: 0\n    VrTdcLimit:\n      VrTdcLimit 0: 330\n      VrTdcLimit 1: 84\n    TotalIdleBoardPowerM: 0\n    TotalIdleBoardPowerB: 0\n    TotalBoardPowerM: 0\n    TotalBoardPowerB: 0\n    TemperatureLimit:\n      TemperatureLimit 0: 110\n      TemperatureLimit 1: 110\n      TemperatureLimit 2: 0\n      TemperatureLimit 3: 0\n      TemperatureLimit 4: 108\n      TemperatureLimit 5: 105\n      TemperatureLimit 6: 105\n      TemperatureLimit 7: 105\n      TemperatureLimit 8: 105\n      TemperatureLimit 9: 0\n      TemperatureLimit 10: 0\n      TemperatureLimit 11: 0\n    FanStopTemp:\n      FanStopTemp 0: 0\n      FanStopTemp 1: 50\n      FanStopTemp 2: 0\n      FanStopTemp 3: 0\n      FanStopTemp 4: 65\n      FanStopTemp 5: 65\n      FanStopTemp 6: 65\n      FanStopTemp 7: 65\n      FanStopTemp 8: 65\n      FanStopTemp 9: 0\n      FanStopTemp 10: 0\n      FanStopTemp 11: 0\n    FanStartTemp:\n      FanStartTemp 0: 0\n      FanStartTemp 1: 60\n      FanStartTemp 2: 0\n      FanStartTemp 3: 0\n      FanStartTemp 4: 80\n      FanStartTemp 5: 80\n      FanStartTemp 6: 80\n      FanStartTemp 7: 80\n      FanStartTemp 8: 80\n      FanStartTemp 9: 0\n      FanStartTemp 10: 0\n      FanStartTemp 11: 0\n    FanGain:\n      FanGain 0: 0\n      FanGain 1: 400\n      FanGain 2: 0\n      FanGain 3: 0\n      FanGain 4: 400\n      FanGain 5: 400\n      FanGain 6: 400\n      FanGain 7: 400\n      FanGain 8: 400\n      FanGain 9: 0\n      FanGain 10: 0\n      FanGain 11: 0\n    FanPwmMin: 25\n    AcousticTargetRpmThreshold: 1300\n    AcousticLimitRpmThreshold: 3300\n    FanMaximumRpm: 3650\n    MGpuAcousticLimitRpmThreshold: 4000\n    FanTargetGfxclk: 500\n    TempInputSelectMask: 498\n    FanZeroRpmEnable: 1\n    FanTachEdgePerRev: 2\n    FanPadding: 0\n    FanTargetTemperature:\n      FanTargetTemperature 0: 0\n      FanTargetTemperature 1: 88\n      FanTargetTemperature 2: 0\n      FanTargetTemperature 3: 0\n      FanTargetTemperature 4: 88\n      FanTargetTemperature 5: 90\n      FanTargetTemperature 6: 90\n      FanTargetTemperature 7: 90\n      FanTargetTemperature 8: 90\n      FanTargetTemperature 9: 0\n      FanTargetTemperature 10: 0\n      FanTargetTemperature 11: 0\n    FuzzyFan_ErrorSetDelta: 0\n    FuzzyFan_ErrorRateSetDelta: 0\n    FuzzyFan_PwmSetDelta: 0\n    FanPadding2: 0\n    FwCtfLimit:\n      FwCtfLimit 0: 115\n      FwCtfLimit 1: 118\n      FwCtfLimit 2: 0\n      FwCtfLimit 3: 0\n      FwCtfLimit 4: 115\n      FwCtfLimit 5: 115\n      FwCtfLimit 6: 115\n      FwCtfLimit 7: 115\n      FwCtfLimit 8: 115\n      FwCtfLimit 9: 0\n      FwCtfLimit 10: 0\n      FwCtfLimit 11: 0\n    IntakeTempEnableRPM: 0\n    IntakeTempOffsetTemp: 0\n    IntakeTempReleaseTemp: 0\n    IntakeTempHighIntakeAcousticLimit: 0\n    IntakeTempAcouticLimitReleaseRate: 0\n    FanAbnormalTempLimitOffset: 0\n    FanStalledTriggerRpm: 250\n    FanAbnormalTriggerRpmCoeff: 85\n    FanSpare:\n      FanSpare 0: 1\n    FanIntakeSensorSupport: 0\n    FanIntakePadding: 0\n    FanSpare2:\n      FanSpare2 0: 0\n      FanSpare2 1: 0\n      FanSpare2 2: 0\n      FanSpare2 3: 0\n      FanSpare2 4: 0\n      FanSpare2 5: 0\n      FanSpare2 6: 0\n      FanSpare2 7: 0\n      FanSpare2 8: 0\n      FanSpare2 9: 0\n      FanSpare2 10: 0\n      FanSpare2 11: 0\n    ODFeatureCtrlMask: 0\n    TemperatureLimit_Hynix: 108\n    TemperatureLimit_Micron: 105\n    TemperatureFwCtfLimit_Hynix: 115\n    TemperatureFwCtfLimit_Micron: 113\n    PlatformTdcLimit:\n      PlatformTdcLimit 0: 330\n      PlatformTdcLimit 1: 84\n    SocketPowerLimitDc:\n      SocketPowerLimitDc 0: 220\n      SocketPowerLimitDc 1: 1200\n      SocketPowerLimitDc 2: 0\n      SocketPowerLimitDc 3: 0\n    SocketPowerLimitSmartShift2: 0\n    CustomSkuSpare16b: 0\n    CustomSkuSpare32b:\n      CustomSkuSpare32b 0: 0\n      CustomSkuSpare32b 1: 0\n      CustomSkuSpare32b 2: 0\n      CustomSkuSpare32b 3: 0\n      CustomSkuSpare32b 4: 0\n      CustomSkuSpare32b 5: 0\n      CustomSkuSpare32b 6: 0\n      CustomSkuSpare32b 7: 0\n      CustomSkuSpare32b 8: 0\n      CustomSkuSpare32b 9: 0\n    MmHubPadding:\n      MmHubPadding 0: 0\n      MmHubPadding 1: 0\n      MmHubPadding 2: 0\n      MmHubPadding 3: 0\n      MmHubPadding 4: 0\n      MmHubPadding 5: 0\n      MmHubPadding 6: 0\n      MmHubPadding 7: 0\n  BoardTable:\n    Version: 0\n    I2cControllers:\n      I2cControllers 0:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 1:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 2:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 3:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 4:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 5:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 6:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n      I2cControllers 7:\n        Enabled: 0\n        Speed: 0\n        SlaveAddress: 0\n        ControllerPort: 0\n        ControllerName: 0\n        ThermalThrotter: 0\n        I2cProtocol: 0\n        PaddingConfig: 0\n    SlaveAddrMapping:\n      SlaveAddrMapping 0: 0\n      SlaveAddrMapping 1: 0\n      SlaveAddrMapping 2: 0\n      SlaveAddrMapping 3: 0\n    VrPsiSupport:\n      VrPsiSupport 0: 0\n      VrPsiSupport 1: 0\n      VrPsiSupport 2: 0\n      VrPsiSupport 3: 0\n    Svi3SvcSpeed: 0\n    EnablePsi6:\n      EnablePsi6 0: 0\n      EnablePsi6 1: 0\n      EnablePsi6 2: 0\n      EnablePsi6 3: 0\n    Svi3RegSettings:\n      Svi3RegSettings 0:\n        SlewRateConditions: 0\n        LoadLineAdjust: 0\n        VoutOffset: 0\n        VidMax: 0\n        VidMin: 0\n        TenBitTelEn: 0\n        SixteenBitTelEn: 0\n        OcpThresh: 0\n        OcpWarnThresh: 0\n        OcpSettings: 0\n        VrhotThresh: 0\n        OtpThresh: 0\n        UvpOvpDeltaRef: 0\n        PhaseShed: 0\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n          Padding 3: 0\n          Padding 4: 0\n          Padding 5: 0\n          Padding 6: 0\n          Padding 7: 0\n          Padding 8: 0\n          Padding 9: 0\n        SettingOverrideMask: 0\n      Svi3RegSettings 1:\n        SlewRateConditions: 0\n        LoadLineAdjust: 0\n        VoutOffset: 0\n        VidMax: 0\n        VidMin: 0\n        TenBitTelEn: 0\n        SixteenBitTelEn: 0\n        OcpThresh: 0\n        OcpWarnThresh: 0\n        OcpSettings: 0\n        VrhotThresh: 0\n        OtpThresh: 0\n        UvpOvpDeltaRef: 0\n        PhaseShed: 0\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n          Padding 3: 0\n          Padding 4: 0\n          Padding 5: 0\n          Padding 6: 0\n          Padding 7: 0\n          Padding 8: 0\n          Padding 9: 0\n        SettingOverrideMask: 0\n      Svi3RegSettings 2:\n        SlewRateConditions: 0\n        LoadLineAdjust: 0\n        VoutOffset: 0\n        VidMax: 0\n        VidMin: 0\n        TenBitTelEn: 0\n        SixteenBitTelEn: 0\n        OcpThresh: 0\n        OcpWarnThresh: 0\n        OcpSettings: 0\n        VrhotThresh: 0\n        OtpThresh: 0\n        UvpOvpDeltaRef: 0\n        PhaseShed: 0\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n          Padding 3: 0\n          Padding 4: 0\n          Padding 5: 0\n          Padding 6: 0\n          Padding 7: 0\n          Padding 8: 0\n          Padding 9: 0\n        SettingOverrideMask: 0\n      Svi3RegSettings 3:\n        SlewRateConditions: 0\n        LoadLineAdjust: 0\n        VoutOffset: 0\n        VidMax: 0\n        VidMin: 0\n        TenBitTelEn: 0\n        SixteenBitTelEn: 0\n        OcpThresh: 0\n        OcpWarnThresh: 0\n        OcpSettings: 0\n        VrhotThresh: 0\n        OtpThresh: 0\n        UvpOvpDeltaRef: 0\n        PhaseShed: 0\n        Padding:\n          Padding 0: 0\n          Padding 1: 0\n          Padding 2: 0\n          Padding 3: 0\n          Padding 4: 0\n          Padding 5: 0\n          Padding 6: 0\n          Padding 7: 0\n          Padding 8: 0\n          Padding 9: 0\n        SettingOverrideMask: 0\n    LedOffGpio: 0\n    FanOffGpio: 0\n    GfxVrPowerStageOffGpio: 0\n    AcDcGpio: 0\n    AcDcPolarity: 0\n    VR0HotGpio: 0\n    VR0HotPolarity: 0\n    GthrGpio: 0\n    GthrPolarity: 0\n    LedPin0: 0\n    LedPin1: 0\n    LedPin2: 0\n    LedEnableMask: 0\n    LedPcie: 0\n    LedError: 0\n    PaddingLed: 0\n    UclkTrainingModeSpreadPercent: 0\n    UclkSpreadPadding: 0\n    UclkSpreadFreq: 0\n    UclkSpreadPercent:\n      UclkSpreadPercent 0: 0\n      UclkSpreadPercent 1: 0\n      UclkSpreadPercent 2: 0\n      UclkSpreadPercent 3: 0\n      UclkSpreadPercent 4: 0\n      UclkSpreadPercent 5: 0\n      UclkSpreadPercent 6: 0\n      UclkSpreadPercent 7: 0\n      UclkSpreadPercent 8: 0\n      UclkSpreadPercent 9: 0\n      UclkSpreadPercent 10: 0\n      UclkSpreadPercent 11: 0\n      UclkSpreadPercent 12: 0\n      UclkSpreadPercent 13: 0\n      UclkSpreadPercent 14: 0\n      UclkSpreadPercent 15: 0\n    GfxclkSpreadEnable: 0\n    FclkSpreadPercent: 0\n    FclkSpreadFreq: 0\n    DramWidth: 0\n    PaddingMem1:\n      PaddingMem1 0: 0\n      PaddingMem1 1: 0\n      PaddingMem1 2: 0\n      PaddingMem1 3: 0\n      PaddingMem1 4: 0\n      PaddingMem1 5: 0\n      PaddingMem1 6: 0\n    HsrEnabled: 0\n    VddqOffEnabled: 0\n    PaddingUmcFlags:\n      PaddingUmcFlags 0: 0\n      PaddingUmcFlags 1: 0\n    Paddign1: 0\n    BacoEntryDelay: 0\n    FuseWritePowerMuxPresent: 0\n    FuseWritePadding:\n      FuseWritePadding 0: 0\n      FuseWritePadding 1: 0\n      FuseWritePadding 2: 0\n    LoadlineGfx: 0\n    LoadlineSoc: 0\n    GfxEdcLimit: 0\n    SocEdcLimit: 0\n    RestBoardPower: 0\n    ConnectorsImpedance: 0\n    EpcsSens0: 0\n    EpcsSens1: 0\n    PaddingEpcs:\n      PaddingEpcs 0: 0\n      PaddingEpcs 1: 0\n    BoardSpare:\n      BoardSpare 0: 0\n      BoardSpare 1: 0\n      BoardSpare 2: 0\n      BoardSpare 3: 0\n      BoardSpare 4: 0\n      BoardSpare 5: 0\n      BoardSpare 6: 0\n      BoardSpare 7: 0\n      BoardSpare 8: 0\n      BoardSpare 9: 0\n      BoardSpare 10: 0\n      BoardSpare 11: 0\n      BoardSpare 12: 0\n      BoardSpare 13: 0\n      BoardSpare 14: 0\n      BoardSpare 15: 0\n      BoardSpare 16: 0\n      BoardSpare 17: 0\n      BoardSpare 18: 0\n      BoardSpare 19: 0\n      BoardSpare 20: 0\n      BoardSpare 21: 0\n      BoardSpare 22: 0\n      BoardSpare 23: 0\n      BoardSpare 24: 0\n      BoardSpare 25: 0\n      BoardSpare 26: 0\n      BoardSpare 27: 0\n      BoardSpare 28: 0\n      BoardSpare 29: 0\n      BoardSpare 30: 0\n      BoardSpare 31: 0\n      BoardSpare 32: 0\n      BoardSpare 33: 0\n      BoardSpare 34: 0\n      BoardSpare 35: 0\n      BoardSpare 36: 0\n      BoardSpare 37: 0\n      BoardSpare 38: 0\n      BoardSpare 39: 0\n      BoardSpare 40: 0\n      BoardSpare 41: 0\n      BoardSpare 42: 0\n      BoardSpare 43: 0\n      BoardSpare 44: 0\n      BoardSpare 45: 0\n      BoardSpare 46: 0\n      BoardSpare 47: 0\n      BoardSpare 48: 0\n      BoardSpare 49: 0\n      BoardSpare 50: 0\n      BoardSpare 51: 0\n    MmHubPadding:\n      MmHubPadding 0: 0\n      MmHubPadding 1: 0\n      MmHubPadding 2: 0\n      MmHubPadding 3: 0\n      MmHubPadding 4: 0\n      MmHubPadding 5: 0\n      MmHubPadding 6: 0\n      MmHubPadding 7: 0\n"
  },
  {
    "path": "test/Powercolor.RX9070.16384.241204_1.rom.rawdump",
    "content": "PowerPlay table rev 23.0 size 5812 bytes\n Offset (dec.) t Raw val. Variable name                         Decoded value\n------------------------------------------------------------------------------\n 0x0000 (0000) H     b416 structuresize                             : 5812\n 0x0002 (0002) B       17 format_revision                           : 23\n 0x0003 (0003) B       00 content_revision                          : 0\n 0x0004 (0004) B       05 table_revision                            : 5\n 0x0005 (0005) B       00 pptable_source                            : 0\n 0x0006 (0006) H     4005 pmfw_pptable_start_offset                 : 1344\n 0x0008 (0008) H     7411 pmfw_pptable_size                         : 4468\n 0x000a (0010) H     5c05 pmfw_sku_table_start_offset               : 1372\n 0x000c (0012) H     e00d pmfw_sku_table_size                       : 3552\n 0x000e (0014) H     a414 pmfw_board_table_start_offset             : 5284\n 0x0010 (0016) H     1002 pmfw_board_table_size                     : 528\n 0x0012 (0018) H     3c13 pmfw_custom_sku_table_start_offset        : 4924\n 0x0014 (0020) H     6801 pmfw_custom_sku_table_size                : 360\n 0x0016 (0022) I a6110000 golden_pp_id                              : 4518\n 0x001a (0026) I f25b0000 golden_revision                           : 23538\n 0x001e (0030) H     8800 format_id                                 : 136\n 0x0020 (0032) I 08000000 platform_caps                             : 8\n 0x0024 (0036) B       20 thermal_controller_type                   : 32\n 0x0025 (0037) H     0000 small_power_limit1                        : 0\n 0x0027 (0039) H     0000 small_power_limit2                        : 0\n 0x0029 (0041) H     0000 boost_power_limit                         : 0\n 0x002b (0043) H     7600 software_shutdown_temp                    : 118\n 0x002d (0045) B       00 reserve                                   : 0\n 0x002e (0046) B       00 reserve                                   : 0\n 0x002f (0047) B       00 reserve                                   : 0\n 0x0030 (0048) B       00 reserve                                   : 0\n 0x0031 (0049) B       00 reserve                                   : 0\n 0x0032 (0050) B       00 reserve                                   : 0\n 0x0033 (0051) B       00 reserve                                   : 0\n 0x0034 (0052) B       00 reserve                                   : 0\n 0x0035 (0053) B       00 reserve                                   : 0\n 0x0036 (0054) B       00 reserve                                   : 0\n 0x0037 (0055) B       00 reserve                                   : 0\n 0x0038 (0056) B       00 reserve                                   : 0\n 0x0039 (0057) B       00 reserve                                   : 0\n 0x003a (0058) B       00 reserve                                   : 0\n 0x003b (0059) B       00 reserve                                   : 0\n 0x003c (0060) B       02 reserve                                   : 2\n 0x003d (0061) B       00 reserve                                   : 0\n 0x003e (0062) B       00 reserve                                   : 0\n 0x003f (0063) B       00 reserve                                   : 0\n 0x0040 (0064) B       00 reserve                                   : 0\n 0x0041 (0065) B       01 reserve                                   : 1\n 0x0042 (0066) B       01 reserve                                   : 1\n 0x0043 (0067) B       01 reserve                                   : 1\n 0x0044 (0068) B       01 reserve                                   : 1\n 0x0045 (0069) B       01 reserve                                   : 1\n 0x0046 (0070) B       00 reserve                                   : 0\n 0x0047 (0071) B       00 reserve                                   : 0\n 0x0048 (0072) B       00 reserve                                   : 0\n 0x0049 (0073) B       01 reserve                                   : 1\n 0x004a (0074) B       00 reserve                                   : 0\n 0x004b (0075) B       00 reserve                                   : 0\n 0x004c (0076) B       00 reserve                                   : 0\n 0x004d (0077) B       00 reserve                                   : 0\n 0x004e (0078) B       00 reserve                                   : 0\n 0x004f (0079) B       00 reserve                                   : 0\n 0x0050 (0080) B       00 reserve                                   : 0\n 0x0051 (0081) B       00 reserve                                   : 0\n 0x0052 (0082) B       00 reserve                                   : 0\n 0x0053 (0083) B       00 reserve                                   : 0\n 0x0054 (0084) B       00 reserve                                   : 0\n 0x0055 (0085) B       00 reserve                                   : 0\n 0x0056 (0086) B       00 reserve                                   : 0\n 0x0057 (0087) B       00 reserve                                   : 0\n 0x0058 (0088) B       00 reserve                                   : 0\n 0x0059 (0089) B       00 reserve                                   : 0\n 0x005a (0090) B       00 reserve                                   : 0\n 0x005b (0091) B       00 reserve                                   : 0\n 0x005c (0092) B       00 reserve                                   : 0\n 0x005d (0093) B       00 reserve                                   : 0\n 0x005e (0094) B       00 reserve                                   : 0\n 0x005f (0095) B       00 reserve                                   : 0\n 0x0060 (0096) B       00 reserve                                   : 0\n 0x0061 (0097) B       00 reserve                                   : 0\n 0x0062 (0098) B       00 reserve                                   : 0\n 0x0063 (0099) B       00 reserve                                   : 0\n 0x0064 (0100) B       00 reserve                                   : 0\n 0x0065 (0101) B       00 reserve                                   : 0\n 0x0066 (0102) B       00 reserve                                   : 0\n 0x0067 (0103) B       00 reserve                                   : 0\n 0x0068 (0104) B       00 reserve                                   : 0\n 0x0069 (0105) B       00 reserve                                   : 0\n 0x006a (0106) B       00 reserve                                   : 0\n 0x006b (0107) B       00 reserve                                   : 0\n 0x006c (0108) B       00 reserve                                   : 0\n 0x006d (0109) B       00 reserve                                   : 0\n 0x006e (0110) B       00 reserve                                   : 0\n 0x006f (0111) B       00 reserve                                   : 0\n 0x0070 (0112) B       00 reserve                                   : 0\n 0x0071 (0113) B       00 reserve                                   : 0\n 0x0072 (0114) B       00 reserve                                   : 0\n 0x0073 (0115) B       00 reserve                                   : 0\n 0x0074 (0116) B       00 reserve                                   : 0\n 0x0075 (0117) B       00 reserve                                   : 0\n 0x0076 (0118) B       00 reserve                                   : 0\n 0x0077 (0119) B       00 reserve                                   : 0\n 0x0078 (0120) B       00 reserve                                   : 0\n 0x0079 (0121) B       00 reserve                                   : 0\n 0x007a (0122) B       00 reserve                                   : 0\n 0x007b (0123) B       00 reserve                                   : 0\n 0x007c (0124) B       00 reserve                                   : 0\n 0x007d (0125) B       00 reserve                                   : 0\n 0x007e (0126) B       00 reserve                                   : 0\n 0x007f (0127) B       00 reserve                                   : 0\n 0x0080 (0128) B       00 reserve                                   : 0\n 0x0081 (0129) B       00 reserve                                   : 0\n 0x0082 (0130) B       00 reserve                                   : 0\n 0x0083 (0131) B       00 reserve                                   : 0\n 0x0084 (0132) B       01 reserve                                   : 1\n 0x0085 (0133) B       00 reserve                                   : 0\n 0x0086 (0134) B       00 reserve                                   : 0\n 0x0087 (0135) B       00 reserve                                   : 0\n 0x0088 (0136) B       01 reserve                                   : 1\n 0x0089 (0137) B       00 reserve                                   : 0\n 0x008a (0138) B       00 reserve                                   : 0\n 0x008b (0139) B       00 reserve                                   : 0\n 0x008c (0140) B       01 reserve                                   : 1\n 0x008d (0141) B       00 reserve                                   : 0\n 0x008e (0142) B       00 reserve                                   : 0\n 0x008f (0143) B       00 reserve                                   : 0\n 0x0090 (0144) B       01 reserve                                   : 1\n 0x0091 (0145) B       00 reserve                                   : 0\n 0x0092 (0146) B       00 reserve                                   : 0\n 0x0093 (0147) B       00 reserve                                   : 0\n 0x0094 (0148) B       01 reserve                                   : 1\n 0x0095 (0149) B       00 reserve                                   : 0\n 0x0096 (0150) B       00 reserve                                   : 0\n 0x0097 (0151) B       00 reserve                                   : 0\n 0x0098 (0152) B       00 reserve                                   : 0\n 0x0099 (0153) B       00 reserve                                   : 0\n 0x009a (0154) B       00 reserve                                   : 0\n 0x009b (0155) B       00 reserve                                   : 0\n 0x009c (0156) B       00 reserve                                   : 0\n 0x009d (0157) B       00 reserve                                   : 0\n 0x009e (0158) B       00 reserve                                   : 0\n 0x009f (0159) B       00 reserve                                   : 0\n 0x00a0 (0160) B       00 reserve                                   : 0\n 0x00a1 (0161) B       00 reserve                                   : 0\n 0x00a2 (0162) B       00 reserve                                   : 0\n 0x00a3 (0163) B       00 reserve                                   : 0\n 0x00a4 (0164) B       01 reserve                                   : 1\n 0x00a5 (0165) B       00 reserve                                   : 0\n 0x00a6 (0166) B       00 reserve                                   : 0\n 0x00a7 (0167) B       00 reserve                                   : 0\n 0x00a8 (0168) B       00 reserve                                   : 0\n 0x00a9 (0169) B       00 reserve                                   : 0\n 0x00aa (0170) B       00 reserve                                   : 0\n 0x00ab (0171) B       00 reserve                                   : 0\n 0x00ac (0172) B       00 reserve                                   : 0\n 0x00ad (0173) B       00 reserve                                   : 0\n 0x00ae (0174) B       00 reserve                                   : 0\n 0x00af (0175) B       00 reserve                                   : 0\n 0x00b0 (0176) B       00 reserve                                   : 0\n 0x00b1 (0177) B       00 reserve                                   : 0\n 0x00b2 (0178) B       00 reserve                                   : 0\n 0x00b3 (0179) B       00 reserve                                   : 0\n 0x00b4 (0180) B       00 reserve                                   : 0\n 0x00b5 (0181) B       00 reserve                                   : 0\n 0x00b6 (0182) B       00 reserve                                   : 0\n 0x00b7 (0183) B       00 reserve                                   : 0\n 0x00b8 (0184) B       00 reserve                                   : 0\n 0x00b9 (0185) B       00 reserve                                   : 0\n 0x00ba (0186) B       00 reserve                                   : 0\n 0x00bb (0187) B       00 reserve                                   : 0\n 0x00bc (0188) B       00 revision                                  : 0\n 0x00bd (0189) B       00 reserve                                   : 0\n 0x00be (0190) B       00 reserve                                   : 0\n 0x00bf (0191) B       00 reserve                                   : 0\n 0x00c0 (0192) B       00 cap                                       : 0\n 0x00c1 (0193) B       00 cap                                       : 0\n 0x00c2 (0194) B       00 cap                                       : 0\n 0x00c3 (0195) B       00 cap                                       : 0\n 0x00c4 (0196) B       00 cap                                       : 0\n 0x00c5 (0197) B       00 cap                                       : 0\n 0x00c6 (0198) B       00 cap                                       : 0\n 0x00c7 (0199) B       00 cap                                       : 0\n 0x00c8 (0200) B       00 cap                                       : 0\n 0x00c9 (0201) B       00 cap                                       : 0\n 0x00ca (0202) B       00 cap                                       : 0\n 0x00cb (0203) B       00 cap                                       : 0\n 0x00cc (0204) B       00 cap                                       : 0\n 0x00cd (0205) B       00 cap                                       : 0\n 0x00ce (0206) B       00 cap                                       : 0\n 0x00cf (0207) B       00 cap                                       : 0\n 0x00d0 (0208) B       00 cap                                       : 0\n 0x00d1 (0209) B       00 cap                                       : 0\n 0x00d2 (0210) B       00 cap                                       : 0\n 0x00d3 (0211) B       00 cap                                       : 0\n 0x00d4 (0212) B       00 cap                                       : 0\n 0x00d5 (0213) B       00 cap                                       : 0\n 0x00d6 (0214) B       00 cap                                       : 0\n 0x00d7 (0215) B       00 cap                                       : 0\n 0x00d8 (0216) B       00 cap                                       : 0\n 0x00d9 (0217) B       00 cap                                       : 0\n 0x00da (0218) B       00 cap                                       : 0\n 0x00db (0219) B       00 cap                                       : 0\n 0x00dc (0220) B       00 cap                                       : 0\n 0x00dd (0221) B       00 cap                                       : 0\n 0x00de (0222) B       00 cap                                       : 0\n 0x00df (0223) B       00 cap                                       : 0\n 0x00e0 (0224) B       00 cap                                       : 0\n 0x00e1 (0225) B       00 cap                                       : 0\n 0x00e2 (0226) B       00 cap                                       : 0\n 0x00e3 (0227) B       00 cap                                       : 0\n 0x00e4 (0228) B       00 cap                                       : 0\n 0x00e5 (0229) B       00 cap                                       : 0\n 0x00e6 (0230) B       00 cap                                       : 0\n 0x00e7 (0231) B       00 cap                                       : 0\n 0x00e8 (0232) B       00 cap                                       : 0\n 0x00e9 (0233) B       00 cap                                       : 0\n 0x00ea (0234) B       00 cap                                       : 0\n 0x00eb (0235) B       00 cap                                       : 0\n 0x00ec (0236) B       00 cap                                       : 0\n 0x00ed (0237) B       00 cap                                       : 0\n 0x00ee (0238) B       00 cap                                       : 0\n 0x00ef (0239) B       00 cap                                       : 0\n 0x00f0 (0240) B       00 cap                                       : 0\n 0x00f1 (0241) B       00 cap                                       : 0\n 0x00f2 (0242) B       00 cap                                       : 0\n 0x00f3 (0243) B       00 cap                                       : 0\n 0x00f4 (0244) B       00 cap                                       : 0\n 0x00f5 (0245) B       00 cap                                       : 0\n 0x00f6 (0246) B       00 cap                                       : 0\n 0x00f7 (0247) B       00 cap                                       : 0\n 0x00f8 (0248) B       00 cap                                       : 0\n 0x00f9 (0249) B       00 cap                                       : 0\n 0x00fa (0250) B       00 cap                                       : 0\n 0x00fb (0251) B       00 cap                                       : 0\n 0x00fc (0252) B       00 cap                                       : 0\n 0x00fd (0253) B       00 cap                                       : 0\n 0x00fe (0254) B       00 cap                                       : 0\n 0x00ff (0255) B       00 cap                                       : 0\n 0x0100 (0256) i 00000000 max                                       : 0\n 0x0104 (0260) i 00000000 max                                       : 0\n 0x0108 (0264) i 00000000 max                                       : 0\n 0x010c (0268) i 00000000 max                                       : 0\n 0x0110 (0272) i 00000000 max                                       : 0\n 0x0114 (0276) i 00000000 max                                       : 0\n 0x0118 (0280) i 00000000 max                                       : 0\n 0x011c (0284) i 00000000 max                                       : 0\n 0x0120 (0288) i 00000000 max                                       : 0\n 0x0124 (0292) i 00000000 max                                       : 0\n 0x0128 (0296) i 00000000 max                                       : 0\n 0x012c (0300) i 00000000 max                                       : 0\n 0x0130 (0304) i 00000000 max                                       : 0\n 0x0134 (0308) i 00000000 max                                       : 0\n 0x0138 (0312) i 00000000 max                                       : 0\n 0x013c (0316) i 00000000 max                                       : 0\n 0x0140 (0320) i 00000000 max                                       : 0\n 0x0144 (0324) i 00000000 max                                       : 0\n 0x0148 (0328) i 00000000 max                                       : 0\n 0x014c (0332) i 00000000 max                                       : 0\n 0x0150 (0336) i 00000000 max                                       : 0\n 0x0154 (0340) i 00000000 max                                       : 0\n 0x0158 (0344) i 00000000 max                                       : 0\n 0x015c (0348) i 00000000 max                                       : 0\n 0x0160 (0352) i 00000000 max                                       : 0\n 0x0164 (0356) i 00000000 max                                       : 0\n 0x0168 (0360) i 00000000 max                                       : 0\n 0x016c (0364) i 00000000 max                                       : 0\n 0x0170 (0368) i 00000000 max                                       : 0\n 0x0174 (0372) i 00000000 max                                       : 0\n 0x0178 (0376) i 00000000 max                                       : 0\n 0x017c (0380) i 00000000 max                                       : 0\n 0x0180 (0384) i 00000000 max                                       : 0\n 0x0184 (0388) i 00000000 max                                       : 0\n 0x0188 (0392) i 00000000 max                                       : 0\n 0x018c (0396) i 00000000 max                                       : 0\n 0x0190 (0400) i 00000000 max                                       : 0\n 0x0194 (0404) i 00000000 max                                       : 0\n 0x0198 (0408) i 00000000 max                                       : 0\n 0x019c (0412) i 00000000 max                                       : 0\n 0x01a0 (0416) i 00000000 max                                       : 0\n 0x01a4 (0420) i 00000000 max                                       : 0\n 0x01a8 (0424) i 00000000 max                                       : 0\n 0x01ac (0428) i 00000000 max                                       : 0\n 0x01b0 (0432) i 00000000 max                                       : 0\n 0x01b4 (0436) i 00000000 max                                       : 0\n 0x01b8 (0440) i 00000000 max                                       : 0\n 0x01bc (0444) i 00000000 max                                       : 0\n 0x01c0 (0448) i 00000000 max                                       : 0\n 0x01c4 (0452) i 00000000 max                                       : 0\n 0x01c8 (0456) i 00000000 max                                       : 0\n 0x01cc (0460) i 00000000 max                                       : 0\n 0x01d0 (0464) i 00000000 max                                       : 0\n 0x01d4 (0468) i 00000000 max                                       : 0\n 0x01d8 (0472) i 00000000 max                                       : 0\n 0x01dc (0476) i 00000000 max                                       : 0\n 0x01e0 (0480) i 00000000 max                                       : 0\n 0x01e4 (0484) i 00000000 max                                       : 0\n 0x01e8 (0488) i 00000000 max                                       : 0\n 0x01ec (0492) i 00000000 max                                       : 0\n 0x01f0 (0496) i 00000000 max                                       : 0\n 0x01f4 (0500) i 00000000 max                                       : 0\n 0x01f8 (0504) i 00000000 max                                       : 0\n 0x01fc (0508) i 00000000 max                                       : 0\n 0x0200 (0512) i 00000000 max                                       : 0\n 0x0204 (0516) i 00000000 max                                       : 0\n 0x0208 (0520) i 00000000 max                                       : 0\n 0x020c (0524) i 00000000 max                                       : 0\n 0x0210 (0528) i 00000000 max                                       : 0\n 0x0214 (0532) i 00000000 max                                       : 0\n 0x0218 (0536) i 00000000 max                                       : 0\n 0x021c (0540) i 00000000 max                                       : 0\n 0x0220 (0544) i 00000000 max                                       : 0\n 0x0224 (0548) i 00000000 max                                       : 0\n 0x0228 (0552) i 00000000 max                                       : 0\n 0x022c (0556) i 00000000 max                                       : 0\n 0x0230 (0560) i 00000000 max                                       : 0\n 0x0234 (0564) i 00000000 max                                       : 0\n 0x0238 (0568) i 00000000 max                                       : 0\n 0x023c (0572) i 00000000 max                                       : 0\n 0x0240 (0576) i 00000000 max                                       : 0\n 0x0244 (0580) i 00000000 max                                       : 0\n 0x0248 (0584) i 00000000 max                                       : 0\n 0x024c (0588) i 00000000 max                                       : 0\n 0x0250 (0592) i 00000000 max                                       : 0\n 0x0254 (0596) i 00000000 max                                       : 0\n 0x0258 (0600) i 00000000 max                                       : 0\n 0x025c (0604) i 00000000 max                                       : 0\n 0x0260 (0608) i 00000000 max                                       : 0\n 0x0264 (0612) i 00000000 max                                       : 0\n 0x0268 (0616) i 00000000 max                                       : 0\n 0x026c (0620) i 00000000 max                                       : 0\n 0x0270 (0624) i 00000000 max                                       : 0\n 0x0274 (0628) i 00000000 max                                       : 0\n 0x0278 (0632) i 00000000 max                                       : 0\n 0x027c (0636) i 00000000 max                                       : 0\n 0x0280 (0640) i 00000000 max                                       : 0\n 0x0284 (0644) i 00000000 max                                       : 0\n 0x0288 (0648) i 00000000 max                                       : 0\n 0x028c (0652) i 00000000 max                                       : 0\n 0x0290 (0656) i 00000000 max                                       : 0\n 0x0294 (0660) i 00000000 max                                       : 0\n 0x0298 (0664) i 00000000 max                                       : 0\n 0x029c (0668) i 00000000 max                                       : 0\n 0x02a0 (0672) i 00000000 max                                       : 0\n 0x02a4 (0676) i 00000000 max                                       : 0\n 0x02a8 (0680) i 00000000 max                                       : 0\n 0x02ac (0684) i 00000000 max                                       : 0\n 0x02b0 (0688) i 00000000 max                                       : 0\n 0x02b4 (0692) i 00000000 max                                       : 0\n 0x02b8 (0696) i 00000000 max                                       : 0\n 0x02bc (0700) i 00000000 max                                       : 0\n 0x02c0 (0704) i 00000000 max                                       : 0\n 0x02c4 (0708) i 00000000 max                                       : 0\n 0x02c8 (0712) i 00000000 max                                       : 0\n 0x02cc (0716) i 00000000 max                                       : 0\n 0x02d0 (0720) i 00000000 max                                       : 0\n 0x02d4 (0724) i 00000000 max                                       : 0\n 0x02d8 (0728) i 00000000 max                                       : 0\n 0x02dc (0732) i 00000000 max                                       : 0\n 0x02e0 (0736) i 00000000 max                                       : 0\n 0x02e4 (0740) i 00000000 max                                       : 0\n 0x02e8 (0744) i 00000000 max                                       : 0\n 0x02ec (0748) i 00000000 max                                       : 0\n 0x02f0 (0752) i 00000000 max                                       : 0\n 0x02f4 (0756) i 00000000 max                                       : 0\n 0x02f8 (0760) i 00000000 max                                       : 0\n 0x02fc (0764) i 00000000 max                                       : 0\n 0x0300 (0768) i 00000000 min                                       : 0\n 0x0304 (0772) i 00000000 min                                       : 0\n 0x0308 (0776) i 00000000 min                                       : 0\n 0x030c (0780) i 00000000 min                                       : 0\n 0x0310 (0784) i 00000000 min                                       : 0\n 0x0314 (0788) i 00000000 min                                       : 0\n 0x0318 (0792) i 00000000 min                                       : 0\n 0x031c (0796) i 00000000 min                                       : 0\n 0x0320 (0800) i 00000000 min                                       : 0\n 0x0324 (0804) i 00000000 min                                       : 0\n 0x0328 (0808) i 00000000 min                                       : 0\n 0x032c (0812) i 00000000 min                                       : 0\n 0x0330 (0816) i 00000000 min                                       : 0\n 0x0334 (0820) i 00000000 min                                       : 0\n 0x0338 (0824) i 00000000 min                                       : 0\n 0x033c (0828) i 00000000 min                                       : 0\n 0x0340 (0832) i 00000000 min                                       : 0\n 0x0344 (0836) i 00000000 min                                       : 0\n 0x0348 (0840) i 00000000 min                                       : 0\n 0x034c (0844) i 00000000 min                                       : 0\n 0x0350 (0848) i 00000000 min                                       : 0\n 0x0354 (0852) i 00000000 min                                       : 0\n 0x0358 (0856) i 00000000 min                                       : 0\n 0x035c (0860) i 00000000 min                                       : 0\n 0x0360 (0864) i 00000000 min                                       : 0\n 0x0364 (0868) i 00000000 min                                       : 0\n 0x0368 (0872) i 00000000 min                                       : 0\n 0x036c (0876) i 00000000 min                                       : 0\n 0x0370 (0880) i 00000000 min                                       : 0\n 0x0374 (0884) i 00000000 min                                       : 0\n 0x0378 (0888) i 00000000 min                                       : 0\n 0x037c (0892) i 00000000 min                                       : 0\n 0x0380 (0896) i 00000000 min                                       : 0\n 0x0384 (0900) i 00000000 min                                       : 0\n 0x0388 (0904) i 00000000 min                                       : 0\n 0x038c (0908) i 00000000 min                                       : 0\n 0x0390 (0912) i 00000000 min                                       : 0\n 0x0394 (0916) i 00000000 min                                       : 0\n 0x0398 (0920) i 00000000 min                                       : 0\n 0x039c (0924) i 00000000 min                                       : 0\n 0x03a0 (0928) i 00000000 min                                       : 0\n 0x03a4 (0932) i 00000000 min                                       : 0\n 0x03a8 (0936) i 00000000 min                                       : 0\n 0x03ac (0940) i 00000000 min                                       : 0\n 0x03b0 (0944) i 00000000 min                                       : 0\n 0x03b4 (0948) i 00000000 min                                       : 0\n 0x03b8 (0952) i 00000000 min                                       : 0\n 0x03bc (0956) i 00000000 min                                       : 0\n 0x03c0 (0960) i 00000000 min                                       : 0\n 0x03c4 (0964) i 00000000 min                                       : 0\n 0x03c8 (0968) i 00000000 min                                       : 0\n 0x03cc (0972) i 00000000 min                                       : 0\n 0x03d0 (0976) i 00000000 min                                       : 0\n 0x03d4 (0980) i 00000000 min                                       : 0\n 0x03d8 (0984) i 00000000 min                                       : 0\n 0x03dc (0988) i 00000000 min                                       : 0\n 0x03e0 (0992) i 00000000 min                                       : 0\n 0x03e4 (0996) i 00000000 min                                       : 0\n 0x03e8 (1000) i 00000000 min                                       : 0\n 0x03ec (1004) i 00000000 min                                       : 0\n 0x03f0 (1008) i 00000000 min                                       : 0\n 0x03f4 (1012) i 00000000 min                                       : 0\n 0x03f8 (1016) i 00000000 min                                       : 0\n 0x03fc (1020) i 00000000 min                                       : 0\n 0x0400 (1024) i 00000000 min                                       : 0\n 0x0404 (1028) i 00000000 min                                       : 0\n 0x0408 (1032) i 00000000 min                                       : 0\n 0x040c (1036) i 00000000 min                                       : 0\n 0x0410 (1040) i 00000000 min                                       : 0\n 0x0414 (1044) i 00000000 min                                       : 0\n 0x0418 (1048) i 00000000 min                                       : 0\n 0x041c (1052) i 00000000 min                                       : 0\n 0x0420 (1056) i 00000000 min                                       : 0\n 0x0424 (1060) i 00000000 min                                       : 0\n 0x0428 (1064) i 00000000 min                                       : 0\n 0x042c (1068) i 00000000 min                                       : 0\n 0x0430 (1072) i 00000000 min                                       : 0\n 0x0434 (1076) i 00000000 min                                       : 0\n 0x0438 (1080) i 00000000 min                                       : 0\n 0x043c (1084) i 00000000 min                                       : 0\n 0x0440 (1088) i 00000000 min                                       : 0\n 0x0444 (1092) i 00000000 min                                       : 0\n 0x0448 (1096) i 00000000 min                                       : 0\n 0x044c (1100) i 00000000 min                                       : 0\n 0x0450 (1104) i 00000000 min                                       : 0\n 0x0454 (1108) i 00000000 min                                       : 0\n 0x0458 (1112) i 00000000 min                                       : 0\n 0x045c (1116) i 00000000 min                                       : 0\n 0x0460 (1120) i 00000000 min                                       : 0\n 0x0464 (1124) i 00000000 min                                       : 0\n 0x0468 (1128) i 00000000 min                                       : 0\n 0x046c (1132) i 00000000 min                                       : 0\n 0x0470 (1136) i 00000000 min                                       : 0\n 0x0474 (1140) i 00000000 min                                       : 0\n 0x0478 (1144) i 00000000 min                                       : 0\n 0x047c (1148) i 00000000 min                                       : 0\n 0x0480 (1152) i fbff0000 min                                       : 65531\n 0x0484 (1156) i 00000000 min                                       : 0\n 0x0488 (1160) i 58005800 min                                       : 5767256\n 0x048c (1164) i 00005800 min                                       : 5767168\n 0x0490 (1168) i 14051405 min                                       : 85198100\n 0x0494 (1172) i 00001405 min                                       : 85196800\n 0x0498 (1176) i e40ce40c min                                       : 216272100\n 0x049c (1180) i 0000e40c min                                       : 216268800\n 0x04a0 (1184) i 00000000 min                                       : 0\n 0x04a4 (1188) i 00000000 min                                       : 0\n 0x04a8 (1192) i 00000000 min                                       : 0\n 0x04ac (1196) i 00000000 min                                       : 0\n 0x04b0 (1200) i 00000000 min                                       : 0\n 0x04b4 (1204) i 00000000 min                                       : 0\n 0x04b8 (1208) i 00000000 min                                       : 0\n 0x04bc (1212) i 00000000 min                                       : 0\n 0x04c0 (1216) i ecff0000 min                                       : 65516\n 0x04c4 (1220) i 00000000 min                                       : 0\n 0x04c8 (1224) i 19001900 min                                       : 1638425\n 0x04cc (1228) i 00001900 min                                       : 1638400\n 0x04d0 (1232) i f401f401 min                                       : 32768500\n 0x04d4 (1236) i 0000f401 min                                       : 32768000\n 0x04d8 (1240) i f401f401 min                                       : 32768500\n 0x04dc (1244) i 0000f401 min                                       : 32768000\n 0x04e0 (1248) i 00000000 min                                       : 0\n 0x04e4 (1252) i 00000000 min                                       : 0\n 0x04e8 (1256) i 00000000 min                                       : 0\n 0x04ec (1260) i 00000000 min                                       : 0\n 0x04f0 (1264) i 00000000 min                                       : 0\n 0x04f4 (1268) i 00000000 min                                       : 0\n 0x04f8 (1272) i 00000000 min                                       : 0\n 0x04fc (1276) i 00000000 min                                       : 0\n 0x0500 (1280) h     fbff pm_setting                                :-5\n 0x0502 (1282) h     0000 pm_setting                                : 0\n 0x0504 (1284) h     0000 pm_setting                                : 0\n 0x0506 (1286) h     0000 pm_setting                                : 0\n 0x0508 (1288) h     6900 pm_setting                                : 105\n 0x050a (1290) h     6900 pm_setting                                : 105\n 0x050c (1292) h     0000 pm_setting                                : 0\n 0x050e (1294) h     6900 pm_setting                                : 105\n 0x0510 (1296) h     7017 pm_setting                                : 6000\n 0x0512 (1298) h     7017 pm_setting                                : 6000\n 0x0514 (1300) h     0000 pm_setting                                : 0\n 0x0516 (1302) h     7017 pm_setting                                : 6000\n 0x0518 (1304) h     7017 pm_setting                                : 6000\n 0x051a (1306) h     7017 pm_setting                                : 6000\n 0x051c (1308) h     0000 pm_setting                                : 0\n 0x051e (1310) h     7017 pm_setting                                : 6000\n 0x0520 (1312) h     0000 pm_setting                                : 0\n 0x0522 (1314) h     0000 pm_setting                                : 0\n 0x0524 (1316) h     0000 pm_setting                                : 0\n 0x0526 (1318) h     0000 pm_setting                                : 0\n 0x0528 (1320) h     0000 pm_setting                                : 0\n 0x052a (1322) h     0000 pm_setting                                : 0\n 0x052c (1324) h     0000 pm_setting                                : 0\n 0x052e (1326) h     0000 pm_setting                                : 0\n 0x0530 (1328) h     0000 pm_setting                                : 0\n 0x0532 (1330) h     0000 pm_setting                                : 0\n 0x0534 (1332) h     0000 pm_setting                                : 0\n 0x0536 (1334) h     0000 pm_setting                                : 0\n 0x0538 (1336) h     0000 pm_setting                                : 0\n 0x053a (1338) h     0000 pm_setting                                : 0\n 0x053c (1340) h     0000 pm_setting                                : 0\n 0x053e (1342) h     0000 pm_setting                                : 0\n 0x0540 (1344) B       00 Version                                   : 0\n 0x0541 (1345) B       00 Spare8                                    : 0\n 0x0542 (1346) B       00 Spare8                                    : 0\n 0x0543 (1347) B       00 Spare8                                    : 0\n 0x0544 (1348) I fbfcff3a FeaturesToRun                             : 989854971\n 0x0548 (1352) I 9ef18c04 FeaturesToRun                             : 76345758\n 0x054c (1356) I ffff0300 FwDStateMask                              : 262143\n 0x0550 (1360) I 00000000 DebugOverrides                            : 0\n 0x0554 (1364) I 00000000 Spare                                     : 0\n 0x0558 (1368) I 00000000 Spare                                     : 0\n 0x055c (1372) I 1b000000 Version                                   : 27\n 0x0560 (1376) B       03 TotalPowerConfig                          : 3\n 0x0561 (1377) B       00 CustomerVariant                           : 0\n 0x0562 (1378) B       04 MemoryTemperatureTypeMask                 : 4\n 0x0563 (1379) B       00 SmartShiftVersion                         : 0\n 0x0564 (1380) B       50 SocketPowerLimitSpare                     : 80\n 0x0565 (1381) B       00 SocketPowerLimitSpare                     : 0\n 0x0566 (1382) B       00 SocketPowerLimitSpare                     : 0\n 0x0567 (1383) B       00 SocketPowerLimitSpare                     : 0\n 0x0568 (1384) B       00 SocketPowerLimitSpare                     : 0\n 0x0569 (1385) B       00 SocketPowerLimitSpare                     : 0\n 0x056a (1386) B       00 SocketPowerLimitSpare                     : 0\n 0x056b (1387) B       00 SocketPowerLimitSpare                     : 0\n 0x056c (1388) B       00 SocketPowerLimitSpare                     : 0\n 0x056d (1389) B       00 SocketPowerLimitSpare                     : 0\n 0x056e (1390) B       00 EnableLegacyPptLimit                      : 0\n 0x056f (1391) B       01 UseInputTelemetry                         : 1\n 0x0570 (1392) B       00 SmartShiftMinReportedPptinDcs             : 0\n 0x0571 (1393) B       00 PaddingPpt                                : 0\n 0x0572 (1394) B       00 PaddingPpt                                : 0\n 0x0573 (1395) B       00 PaddingPpt                                : 0\n 0x0574 (1396) B       00 PaddingPpt                                : 0\n 0x0575 (1397) B       00 PaddingPpt                                : 0\n 0x0576 (1398) B       00 PaddingPpt                                : 0\n 0x0577 (1399) B       00 PaddingPpt                                : 0\n 0x0578 (1400) H     7800 HwCtfTempLimit                            : 120\n 0x057a (1402) H     6900 PaddingInfra                              : 105\n 0x057c (1404) I 00000000 FitControllerFailureRateLimit             : 0\n 0x0580 (1408) I 00000000 FitControllerGfxDutyCycle                 : 0\n 0x0584 (1412) I 00000000 FitControllerSocDutyCycle                 : 0\n 0x0588 (1416) I 00000000 FitControllerSocOffset                    : 0\n 0x058c (1420) I 00000000 GfxApccPlusResidencyLimit                 : 0\n 0x0590 (1424) I f2f11000 ThrottlerControlMask                      : 1110514\n 0x0594 (1428) H     6400 UlvVoltageOffset                          : 100\n 0x0596 (1430) H     6400 UlvVoltageOffset                          : 100\n 0x0598 (1432) B       00 Padding                                   : 0\n 0x0599 (1433) B       00 Padding                                   : 0\n 0x059a (1434) H     6400 DeepUlvVoltageOffsetSoc                   : 100\n 0x059c (1436) H     3011 DefaultMaxVoltage                         : 4400\n 0x059e (1438) H     f811 DefaultMaxVoltage                         : 4600\n 0x05a0 (1440) H     c012 BoostMaxVoltage                           : 4800\n 0x05a2 (1442) H     f811 BoostMaxVoltage                           : 4600\n 0x05a4 (1444) h     0500 VminTempHystersis                         : 5\n 0x05a6 (1446) h     0500 VminTempHystersis                         : 5\n 0x05a8 (1448) h     3700 VminTempThreshold                         : 55\n 0x05aa (1450) h     3700 VminTempThreshold                         : 55\n 0x05ac (1452) H     f00a Vmin_Hot_T0                               : 2800\n 0x05ae (1454) H     e40c Vmin_Hot_T0                               : 3300\n 0x05b0 (1456) H     f00a Vmin_Cold_T0                              : 2800\n 0x05b2 (1458) H     e40c Vmin_Cold_T0                              : 3300\n 0x05b4 (1460) H     f00a Vmin_Hot_Eol                              : 2800\n 0x05b6 (1462) H     e40c Vmin_Hot_Eol                              : 3300\n 0x05b8 (1464) H     f00a Vmin_Cold_Eol                             : 2800\n 0x05ba (1466) H     e40c Vmin_Cold_Eol                             : 3300\n 0x05bc (1468) H     0000 Vmin_Aging_Offset                         : 0\n 0x05be (1470) H     0000 Vmin_Aging_Offset                         : 0\n 0x05c0 (1472) H     0000 Spare_Vmin_Plat_Offset_Hot                : 0\n 0x05c2 (1474) H     0000 Spare_Vmin_Plat_Offset_Hot                : 0\n 0x05c4 (1476) H     f00a Spare_Vmin_Plat_Offset_Cold               : 2800\n 0x05c6 (1478) H     f00a Spare_Vmin_Plat_Offset_Cold               : 2800\n 0x05c8 (1480) H     0000 VcBtcFixedVminAgingOffset                 : 0\n 0x05ca (1482) H     0000 VcBtcFixedVminAgingOffset                 : 0\n 0x05cc (1484) H     0000 VcBtcVmin2PsmDegrationGb                  : 0\n 0x05ce (1486) H     0000 VcBtcVmin2PsmDegrationGb                  : 0\n 0x05d0 (1488) f 00000000 VcBtcPsmA                                 : 0\n 0x05d4 (1492) f 00000000 VcBtcPsmA                                 : 0\n 0x05d8 (1496) f 00000000 VcBtcPsmB                                 : 0\n 0x05dc (1500) f 00000000 VcBtcPsmB                                 : 0\n 0x05e0 (1504) f 00000000 VcBtcVminA                                : 0\n 0x05e4 (1508) f 00000000 VcBtcVminA                                : 0\n 0x05e8 (1512) f 00000000 VcBtcVminB                                : 0\n 0x05ec (1516) f 00000000 VcBtcVminB                                : 0\n 0x05f0 (1520) B       01 PerPartVminEnabled                        : 1\n 0x05f1 (1521) B       00 PerPartVminEnabled                        : 0\n 0x05f2 (1522) B       00 VcBtcEnabled                              : 0\n 0x05f3 (1523) B       00 VcBtcEnabled                              : 0\n 0x05f4 (1524) H     0000 SocketPowerLimitAcTau                     : 0\n 0x05f6 (1526) H     0000 SocketPowerLimitAcTau                     : 0\n 0x05f8 (1528) H     0000 SocketPowerLimitAcTau                     : 0\n 0x05fa (1530) H     0000 SocketPowerLimitAcTau                     : 0\n 0x05fc (1532) H     0000 SocketPowerLimitDcTau                     : 0\n 0x05fe (1534) H     0000 SocketPowerLimitDcTau                     : 0\n 0x0600 (1536) H     0000 SocketPowerLimitDcTau                     : 0\n 0x0602 (1538) H     0000 SocketPowerLimitDcTau                     : 0\n 0x0604 (1540) f 00000000 a                                         : 0\n 0x0608 (1544) f 0187903d b                                         : 0.07057\n 0x060c (1548) f 6f1203bc c                                         :-0.008\n 0x0610 (1552) f 00000000 a                                         : 0\n 0x0614 (1556) f 00000000 b                                         : 0\n 0x0618 (1560) f 00000000 c                                         : 0\n 0x061c (1564) I 00000000 SpareVmin                                 : 0\n 0x0620 (1568) I 00000000 SpareVmin                                 : 0\n 0x0624 (1572) I 00000000 SpareVmin                                 : 0\n 0x0628 (1576) I 00000000 SpareVmin                                 : 0\n 0x062c (1580) I 00000000 SpareVmin                                 : 0\n 0x0630 (1584) I 00000000 SpareVmin                                 : 0\n 0x0634 (1588) B       00 Padding                                   : 0\n 0x0635 (1589) B       00 SnapToDiscrete                            : 0\n 0x0636 (1590) B       02 NumDiscreteLevels                         : 2\n 0x0637 (1591) B       03 CalculateFopt                             : 3\n 0x0638 (1592) f 00000000 m                                         : 0\n 0x063c (1596) f 00000000 b                                         : 0\n 0x0640 (1600) I 00000000 Padding3                                  : 0\n 0x0644 (1604) I 00000000 Padding3                                  : 0\n 0x0648 (1608) I 00000000 Padding3                                  : 0\n 0x064c (1612) H     0000 Padding4                                  : 0\n 0x064e (1614) H     b004 FoptimalDc                                : 1200\n 0x0650 (1616) H     b004 FoptimalAc                                : 1200\n 0x0652 (1618) H     0000 Padding2                                  : 0\n 0x0654 (1620) B       00 Padding                                   : 0\n 0x0655 (1621) B       00 SnapToDiscrete                            : 0\n 0x0656 (1622) B       02 NumDiscreteLevels                         : 2\n 0x0657 (1623) B       00 CalculateFopt                             : 0\n 0x0658 (1624) f a8359d3f m                                         : 1.2282\n 0x065c (1628) f 9fe5d93e b                                         : 0.42558\n 0x0660 (1632) I 00000000 Padding3                                  : 0\n 0x0664 (1636) I 0000b004 Padding3                                  : 78643200\n 0x0668 (1640) I b0040000 Padding3                                  : 1200\n 0x066c (1644) H     0000 Padding4                                  : 0\n 0x066e (1646) H     0000 FoptimalDc                                : 0\n 0x0670 (1648) H     0000 FoptimalAc                                : 0\n 0x0672 (1650) H     9e3f Padding2                                  : 16286\n 0x0674 (1652) B       d3 Padding                                   : 211\n 0x0675 (1653) B       01 SnapToDiscrete                            : 1\n 0x0676 (1654) B       06 NumDiscreteLevels                         : 6\n 0x0677 (1655) B       00 CalculateFopt                             : 0\n 0x0678 (1656) f c74b9f3f m                                         : 1.2445\n 0x067c (1660) f b81ee53e b                                         : 0.4475\n 0x0680 (1664) I 00000000 Padding3                                  : 0\n 0x0684 (1668) I 00000000 Padding3                                  : 0\n 0x0688 (1672) I 00000000 Padding3                                  : 0\n 0x068c (1676) H     0001 Padding4                                  : 256\n 0x068e (1678) H     0000 FoptimalDc                                : 0\n 0x0690 (1680) H     0000 FoptimalAc                                : 0\n 0x0692 (1682) H     b83f Padding2                                  : 16312\n 0x0694 (1684) B       cd Padding                                   : 205\n 0x0695 (1685) B       00 SnapToDiscrete                            : 0\n 0x0696 (1686) B       02 NumDiscreteLevels                         : 2\n 0x0697 (1687) B       00 CalculateFopt                             : 0\n 0x0698 (1688) f 0000803f m                                         : 1\n 0x069c (1692) f 00000000 b                                         : 0\n 0x06a0 (1696) I 00000000 Padding3                                  : 0\n 0x06a4 (1700) I 00000000 Padding3                                  : 0\n 0x06a8 (1704) I 00000000 Padding3                                  : 0\n 0x06ac (1708) H     0000 Padding4                                  : 0\n 0x06ae (1710) H     0000 FoptimalDc                                : 0\n 0x06b0 (1712) H     0000 FoptimalAc                                : 0\n 0x06b2 (1714) H     803f Padding2                                  : 16256\n 0x06b4 (1716) B       00 Padding                                   : 0\n 0x06b5 (1717) B       00 SnapToDiscrete                            : 0\n 0x06b6 (1718) B       02 NumDiscreteLevels                         : 2\n 0x06b7 (1719) B       00 CalculateFopt                             : 0\n 0x06b8 (1720) f 9e5e793f m                                         : 0.9741\n 0x06bc (1724) f 7a8ded3e b                                         : 0.46397\n 0x06c0 (1728) I 00000000 Padding3                                  : 0\n 0x06c4 (1732) I 00000000 Padding3                                  : 0\n 0x06c8 (1736) I 00000000 Padding3                                  : 0\n 0x06cc (1740) H     0000 Padding4                                  : 0\n 0x06ce (1742) H     0000 FoptimalDc                                : 0\n 0x06d0 (1744) H     0000 FoptimalAc                                : 0\n 0x06d2 (1746) H     873f Padding2                                  : 16263\n 0x06d4 (1748) B       c7 Padding                                   : 199\n 0x06d5 (1749) B       00 SnapToDiscrete                            : 0\n 0x06d6 (1750) B       02 NumDiscreteLevels                         : 2\n 0x06d7 (1751) B       00 CalculateFopt                             : 0\n 0x06d8 (1752) f 371a503f m                                         : 0.8129\n 0x06dc (1756) f dc4b1a3e b                                         : 0.15068\n 0x06e0 (1760) I 00000000 Padding3                                  : 0\n 0x06e4 (1764) I 00000000 Padding3                                  : 0\n 0x06e8 (1768) I 00000000 Padding3                                  : 0\n 0x06ec (1772) H     0000 Padding4                                  : 0\n 0x06ee (1774) H     0000 FoptimalDc                                : 0\n 0x06f0 (1776) H     0000 FoptimalAc                                : 0\n 0x06f2 (1778) H     5d3f Padding2                                  : 16221\n 0x06f4 (1780) B       7d Padding                                   : 125\n 0x06f5 (1781) B       00 SnapToDiscrete                            : 0\n 0x06f6 (1782) B       02 NumDiscreteLevels                         : 2\n 0x06f7 (1783) B       00 CalculateFopt                             : 0\n 0x06f8 (1784) f 780b943f m                                         : 1.1566\n 0x06fc (1788) f 66bd583e b                                         : 0.21166\n 0x0700 (1792) I 00000000 Padding3                                  : 0\n 0x0704 (1796) I 00000000 Padding3                                  : 0\n 0x0708 (1800) I 00000000 Padding3                                  : 0\n 0x070c (1804) H     0000 Padding4                                  : 0\n 0x070e (1806) H     0000 FoptimalDc                                : 0\n 0x0710 (1808) H     0000 FoptimalAc                                : 0\n 0x0712 (1810) H     8e3f Padding2                                  : 16270\n 0x0714 (1812) B       e5 Padding                                   : 229\n 0x0715 (1813) B       00 SnapToDiscrete                            : 0\n 0x0716 (1814) B       02 NumDiscreteLevels                         : 2\n 0x0717 (1815) B       00 CalculateFopt                             : 0\n 0x0718 (1816) f 780b943f m                                         : 1.1566\n 0x071c (1820) f 66bd583e b                                         : 0.21166\n 0x0720 (1824) I 00000000 Padding3                                  : 0\n 0x0724 (1828) I 00000000 Padding3                                  : 0\n 0x0728 (1832) I 00000000 Padding3                                  : 0\n 0x072c (1836) H     0000 Padding4                                  : 0\n 0x072e (1838) H     0000 FoptimalDc                                : 0\n 0x0730 (1840) H     0000 FoptimalAc                                : 0\n 0x0732 (1842) H     8e3f Padding2                                  : 16270\n 0x0734 (1844) B       e5 Padding                                   : 229\n 0x0735 (1845) B       00 SnapToDiscrete                            : 0\n 0x0736 (1846) B       01 NumDiscreteLevels                         : 1\n 0x0737 (1847) B       00 CalculateFopt                             : 0\n 0x0738 (1848) f e414a53f m                                         : 1.2897\n 0x073c (1852) f 5778373e b                                         : 0.17917\n 0x0740 (1856) I 00000000 Padding3                                  : 0\n 0x0744 (1860) I 00000000 Padding3                                  : 0\n 0x0748 (1864) I 00000000 Padding3                                  : 0\n 0x074c (1868) H     0000 Padding4                                  : 0\n 0x074e (1870) H     0000 FoptimalDc                                : 0\n 0x0750 (1872) H     0000 FoptimalAc                                : 0\n 0x0752 (1874) H     9d3f Padding2                                  : 16285\n 0x0754 (1876) B       0a Padding                                   : 10\n 0x0755 (1877) B       00 SnapToDiscrete                            : 0\n 0x0756 (1878) B       02 NumDiscreteLevels                         : 2\n 0x0757 (1879) B       00 CalculateFopt                             : 0\n 0x0758 (1880) f e414a53f m                                         : 1.2897\n 0x075c (1884) f 5778373e b                                         : 0.17917\n 0x0760 (1888) I 00000000 Padding3                                  : 0\n 0x0764 (1892) I 00000000 Padding3                                  : 0\n 0x0768 (1896) I 00000000 Padding3                                  : 0\n 0x076c (1900) H     0000 Padding4                                  : 0\n 0x076e (1902) H     0000 FoptimalDc                                : 0\n 0x0770 (1904) H     0000 FoptimalAc                                : 0\n 0x0772 (1906) H     9d3f Padding2                                  : 16285\n 0x0774 (1908) B       0a Padding                                   : 10\n 0x0775 (1909) B       00 SnapToDiscrete                            : 0\n 0x0776 (1910) B       02 NumDiscreteLevels                         : 2\n 0x0777 (1911) B       00 CalculateFopt                             : 0\n 0x0778 (1912) f e414a53f m                                         : 1.2897\n 0x077c (1916) f 5778373e b                                         : 0.17917\n 0x0780 (1920) I 00000000 Padding3                                  : 0\n 0x0784 (1924) I 00000000 Padding3                                  : 0\n 0x0788 (1928) I 00000000 Padding3                                  : 0\n 0x078c (1932) H     0000 Padding4                                  : 0\n 0x078e (1934) H     0000 FoptimalDc                                : 0\n 0x0790 (1936) H     0000 FoptimalAc                                : 0\n 0x0792 (1938) H     9d3f Padding2                                  : 16285\n 0x0794 (1940) H     f401 FreqTableGfx                              : 500\n 0x0796 (1942) H     480d FreqTableGfx                              : 3400\n 0x0798 (1944) H     0000 FreqTableGfx                              : 0\n 0x079a (1946) H     0000 FreqTableGfx                              : 0\n 0x079c (1948) H     0000 FreqTableGfx                              : 0\n 0x079e (1950) H     0000 FreqTableGfx                              : 0\n 0x07a0 (1952) H     0000 FreqTableGfx                              : 0\n 0x07a2 (1954) H     0000 FreqTableGfx                              : 0\n 0x07a4 (1956) H     0000 FreqTableGfx                              : 0\n 0x07a6 (1958) H     0000 FreqTableGfx                              : 0\n 0x07a8 (1960) H     0000 FreqTableGfx                              : 0\n 0x07aa (1962) H     0000 FreqTableGfx                              : 0\n 0x07ac (1964) H     f401 FreqTableGfx                              : 500\n 0x07ae (1966) H     e803 FreqTableGfx                              : 1000\n 0x07b0 (1968) H     0000 FreqTableGfx                              : 0\n 0x07b2 (1970) H     0000 FreqTableGfx                              : 0\n 0x07b4 (1972) H     2003 FreqTableVclk                             : 800\n 0x07b6 (1974) H     760b FreqTableVclk                             : 2934\n 0x07b8 (1976) H     0000 FreqTableVclk                             : 0\n 0x07ba (1978) H     0000 FreqTableVclk                             : 0\n 0x07bc (1980) H     0000 FreqTableVclk                             : 0\n 0x07be (1982) H     0000 FreqTableVclk                             : 0\n 0x07c0 (1984) H     0000 FreqTableVclk                             : 0\n 0x07c2 (1986) H     0000 FreqTableVclk                             : 0\n 0x07c4 (1988) H     2003 FreqTableDclk                             : 800\n 0x07c6 (1990) H     9808 FreqTableDclk                             : 2200\n 0x07c8 (1992) H     0000 FreqTableDclk                             : 0\n 0x07ca (1994) H     0000 FreqTableDclk                             : 0\n 0x07cc (1996) H     2003 FreqTableDclk                             : 800\n 0x07ce (1998) H     9808 FreqTableDclk                             : 2200\n 0x07d0 (2000) H     0000 FreqTableDclk                             : 0\n 0x07d2 (2002) H     0000 FreqTableDclk                             : 0\n 0x07d4 (2004) H     a201 FreqTableSocclk                           : 418\n 0x07d6 (2006) H     dc05 FreqTableSocclk                           : 1500\n 0x07d8 (2008) H     0000 FreqTableSocclk                           : 0\n 0x07da (2010) H     0000 FreqTableSocclk                           : 0\n 0x07dc (2012) H     2003 FreqTableSocclk                           : 800\n 0x07de (2014) H     bb05 FreqTableSocclk                           : 1467\n 0x07e0 (2016) H     0000 FreqTableSocclk                           : 0\n 0x07e2 (2018) H     0000 FreqTableSocclk                           : 0\n 0x07e4 (2020) H     6100 FreqTableUclk                             : 97\n 0x07e6 (2022) H     c901 FreqTableUclk                             : 457\n 0x07e8 (2024) H     0503 FreqTableUclk                             : 773\n 0x07ea (2026) H     6b03 FreqTableUclk                             : 875\n 0x07ec (2028) H     6504 FreqTableUclk                             : 1125\n 0x07ee (2030) H     eb04 FreqTableUclk                             : 1259\n 0x07f0 (2032) H     6600 FreqTableShadowUclk                       : 102\n 0x07f2 (2034) H     b301 FreqTableShadowUclk                       : 435\n 0x07f4 (2036) H     db02 FreqTableShadowUclk                       : 731\n 0x07f6 (2038) H     4a03 FreqTableShadowUclk                       : 842\n 0x07f8 (2040) H     2d04 FreqTableShadowUclk                       : 1069\n 0x07fa (2042) H     a304 FreqTableShadowUclk                       : 1187\n 0x07fc (2044) H     9400 FreqTableDispclk                          : 148\n 0x07fe (2046) H     d007 FreqTableDispclk                          : 2000\n 0x0800 (2048) H     0503 FreqTableDispclk                          : 773\n 0x0802 (2050) H     e803 FreqTableDispclk                          : 1000\n 0x0804 (2052) H     6504 FreqTableDispclk                          : 1125\n 0x0806 (2054) H     e204 FreqTableDispclk                          : 1250\n 0x0808 (2056) H     6600 FreqTableDispclk                          : 102\n 0x080a (2058) H     b301 FreqTableDispclk                          : 435\n 0x080c (2060) H     9400 FreqTableDppClk                           : 148\n 0x080e (2062) H     d007 FreqTableDppClk                           : 2000\n 0x0810 (2064) H     2d04 FreqTableDppClk                           : 1069\n 0x0812 (2066) H     a304 FreqTableDppClk                           : 1187\n 0x0814 (2068) H     9400 FreqTableDppClk                           : 148\n 0x0816 (2070) H     6406 FreqTableDppClk                           : 1636\n 0x0818 (2072) H     0000 FreqTableDppClk                           : 0\n 0x081a (2074) H     0000 FreqTableDppClk                           : 0\n 0x081c (2076) H     d002 FreqTableDprefclk                         : 720\n 0x081e (2078) H     0000 FreqTableDprefclk                         : 0\n 0x0820 (2080) H     0000 FreqTableDprefclk                         : 0\n 0x0822 (2082) H     0000 FreqTableDprefclk                         : 0\n 0x0824 (2084) H     9400 FreqTableDprefclk                         : 148\n 0x0826 (2086) H     6406 FreqTableDprefclk                         : 1636\n 0x0828 (2088) H     0000 FreqTableDprefclk                         : 0\n 0x082a (2090) H     0000 FreqTableDprefclk                         : 0\n 0x082c (2092) H     9400 FreqTableDcfclk                           : 148\n 0x082e (2094) H     0807 FreqTableDcfclk                           : 1800\n 0x0830 (2096) H     0000 FreqTableDcfclk                           : 0\n 0x0832 (2098) H     0000 FreqTableDcfclk                           : 0\n 0x0834 (2100) H     d002 FreqTableDcfclk                           : 720\n 0x0836 (2102) H     d002 FreqTableDcfclk                           : 720\n 0x0838 (2104) H     0000 FreqTableDcfclk                           : 0\n 0x083a (2106) H     0000 FreqTableDcfclk                           : 0\n 0x083c (2108) H     9400 FreqTableDtbclk                           : 148\n 0x083e (2110) H     0807 FreqTableDtbclk                           : 1800\n 0x0840 (2112) H     0000 FreqTableDtbclk                           : 0\n 0x0842 (2114) H     0000 FreqTableDtbclk                           : 0\n 0x0844 (2116) H     9400 FreqTableDtbclk                           : 148\n 0x0846 (2118) H     6406 FreqTableDtbclk                           : 1636\n 0x0848 (2120) H     0000 FreqTableDtbclk                           : 0\n 0x084a (2122) H     0000 FreqTableDtbclk                           : 0\n 0x084c (2124) H     3301 FreqTableFclk                             : 307\n 0x084e (2126) H     6009 FreqTableFclk                             : 2400\n 0x0850 (2128) H     0000 FreqTableFclk                             : 0\n 0x0852 (2130) H     0000 FreqTableFclk                             : 0\n 0x0854 (2132) H     9400 FreqTableFclk                             : 148\n 0x0856 (2134) H     6406 FreqTableFclk                             : 1636\n 0x0858 (2136) H     0000 FreqTableFclk                             : 0\n 0x085a (2138) H     0000 FreqTableFclk                             : 0\n 0x085c (2140) I 480d0000 DcModeMaxFreq                             : 3400\n 0x0860 (2144) I dc050000 DcModeMaxFreq                             : 1500\n 0x0864 (2148) I c9010000 DcModeMaxFreq                             : 457\n 0x0868 (2152) I 60090000 DcModeMaxFreq                             : 2400\n 0x086c (2156) I 98080000 DcModeMaxFreq                             : 2200\n 0x0870 (2160) I 760b0000 DcModeMaxFreq                             : 2934\n 0x0874 (2164) I d0070000 DcModeMaxFreq                             : 2000\n 0x0878 (2168) I d0070000 DcModeMaxFreq                             : 2000\n 0x087c (2172) I d0020000 DcModeMaxFreq                             : 720\n 0x0880 (2176) I 08070000 DcModeMaxFreq                             : 1800\n 0x0884 (2180) I 08070000 DcModeMaxFreq                             : 1800\n 0x0888 (2184) H     0000 GfxclkAibFmax                             : 0\n 0x088a (2186) H     0000 GfxDpmPadding                             : 0\n 0x088c (2188) H     b004 GfxclkFgfxoffEntry                        : 1200\n 0x088e (2190) H     e803 GfxclkFgfxoffExitImu                      : 1000\n 0x0890 (2192) H     b004 GfxclkFgfxoffExitRlc                      : 1200\n 0x0892 (2194) H     fa00 GfxclkThrottleClock                       : 250\n 0x0894 (2196) B       01 EnableGfxPowerStagesGpio                  : 1\n 0x0895 (2197) B       02 GfxIdlePadding                            : 2\n 0x0896 (2198) B       00 SmsRepairWRCKClkDivEn                     : 0\n 0x0897 (2199) B       00 SmsRepairWRCKClkDivVal                    : 0\n 0x0898 (2200) B       01 GfxOffEntryEarlyMGCGEn                    : 1\n 0x0899 (2201) B       01 GfxOffEntryForceCGCGEn                    : 1\n 0x089a (2202) B       01 GfxOffEntryForceCGCGDelayEn               : 1\n 0x089b (2203) B       c8 GfxOffEntryForceCGCGDelayVal              : 200\n 0x089c (2204) H     0000 GfxclkFreqGfxUlv                          : 0\n 0x089e (2206) B       00 GfxIdlePadding2                           : 0\n 0x089f (2207) B       00 GfxIdlePadding2                           : 0\n 0x08a0 (2208) I 10270000 GfxOffEntryHysteresis                     : 10000\n 0x08a4 (2212) I b004f401 GfxoffSpare                               : 32769200\n 0x08a8 (2216) I b004fa00 GfxoffSpare                               : 16385200\n 0x08ac (2220) I 00000000 GfxoffSpare                               : 0\n 0x08b0 (2224) I 00000000 GfxoffSpare                               : 0\n 0x08b4 (2228) I 00000000 GfxoffSpare                               : 0\n 0x08b8 (2232) I 0a000000 GfxoffSpare                               : 10\n 0x08bc (2236) I 00000000 GfxoffSpare                               : 0\n 0x08c0 (2240) I 00000000 GfxoffSpare                               : 0\n 0x08c4 (2244) I 00000000 GfxoffSpare                               : 0\n 0x08c8 (2248) I 00000000 GfxoffSpare                               : 0\n 0x08cc (2252) I 00000000 GfxoffSpare                               : 0\n 0x08d0 (2256) I 00000000 GfxoffSpare                               : 0\n 0x08d4 (2260) I 00000000 GfxoffSpare                               : 0\n 0x08d8 (2264) I 00000000 GfxoffSpare                               : 0\n 0x08dc (2268) I 00000000 GfxoffSpare                               : 0\n 0x08e0 (2272) H     0000 DfllMstrOscConfigA                        : 0\n 0x08e2 (2274) H     0000 DfllSlvOscConfigA                         : 0\n 0x08e4 (2276) f 00000000 DfllBtcMasterScalerM                      : 0\n 0x08e8 (2280) i 00000000 DfllBtcMasterScalerB                      : 0\n 0x08ec (2284) f 00000000 DfllBtcSlaveScalerM                       : 0\n 0x08f0 (2288) i 00000000 DfllBtcSlaveScalerB                       : 0\n 0x08f4 (2292) I 00000000 DfllPccAsWaitCtrl                         : 0\n 0x08f8 (2296) I 00000000 DfllPccAsStepCtrl                         : 0\n 0x08fc (2300) I 00000000 GfxDfllSpare                              : 0\n 0x0900 (2304) I 00000000 GfxDfllSpare                              : 0\n 0x0904 (2308) I 00000000 GfxDfllSpare                              : 0\n 0x0908 (2312) I 00000000 GfxDfllSpare                              : 0\n 0x090c (2316) I 00000000 GfxDfllSpare                              : 0\n 0x0910 (2320) I 00000000 GfxDfllSpare                              : 0\n 0x0914 (2324) I 00000000 GfxDfllSpare                              : 0\n 0x0918 (2328) I 00000000 GfxDfllSpare                              : 0\n 0x091c (2332) I 00000000 GfxDfllSpare                              : 0\n 0x0920 (2336) f 9a99b93f DvoPsmDownThresholdVoltage                : 1.45\n 0x0924 (2340) f 3333b33f DvoPsmUpThresholdVoltage                  : 1.4\n 0x0928 (2344) f d7a3703f DvoFmaxLowScaler                          : 0.94\n 0x092c (2348) I 00000000 PaddingDcs                                : 0\n 0x0930 (2352) H     0600 DcsMinGfxOffTime                          : 6\n 0x0932 (2354) H     6400 DcsMaxGfxOffTime                          : 100\n 0x0934 (2356) I 00000000 DcsMinCreditAccum                         : 0\n 0x0938 (2360) H     2800 DcsExitHysteresis                         : 40\n 0x093a (2362) H     6400 DcsTimeout                                : 100\n 0x093c (2364) f 0000fa43 DcsPfGfxFopt                              : 500\n 0x0940 (2368) f 0000c242 DcsPfUclkFopt                             : 97\n 0x0944 (2372) B       01 FoptEnabled                               : 1\n 0x0945 (2373) B       00 DcsSpare2                                 : 0\n 0x0946 (2374) B       64 DcsSpare2                                 : 100\n 0x0947 (2375) B       00 DcsSpare2                                 : 0\n 0x0948 (2376) I 00000000 DcsFoptM                                  : 0\n 0x094c (2380) I 00000000 DcsFoptB                                  : 0\n 0x0950 (2384) I 00000000 DcsSpare                                  : 0\n 0x0954 (2388) I 00000000 DcsSpare                                  : 0\n 0x0958 (2392) I 00000000 DcsSpare                                  : 0\n 0x095c (2396) I 00000000 DcsSpare                                  : 0\n 0x0960 (2400) I 00000000 DcsSpare                                  : 0\n 0x0964 (2404) I 00000000 DcsSpare                                  : 0\n 0x0968 (2408) I 00000000 DcsSpare                                  : 0\n 0x096c (2412) I 00000000 DcsSpare                                  : 0\n 0x0970 (2416) I 00000000 DcsSpare                                  : 0\n 0x0974 (2420) B       01 UseStrobeModeOptimizations                : 1\n 0x0975 (2421) B       00 PaddingMem                                : 0\n 0x0976 (2422) B       00 PaddingMem                                : 0\n 0x0977 (2423) B       00 PaddingMem                                : 0\n 0x0978 (2424) B       0e UclkDpmPstates                            : 14\n 0x0979 (2425) B       0c UclkDpmPstates                            : 12\n 0x097a (2426) B       08 UclkDpmPstates                            : 8\n 0x097b (2427) B       04 UclkDpmPstates                            : 4\n 0x097c (2428) B       02 UclkDpmPstates                            : 2\n 0x097d (2429) B       00 UclkDpmPstates                            : 0\n 0x097e (2430) B       0f UclkDpmShadowPstates                      : 15\n 0x097f (2431) B       0d UclkDpmShadowPstates                      : 13\n 0x0980 (2432) B       09 UclkDpmShadowPstates                      : 9\n 0x0981 (2433) B       05 UclkDpmShadowPstates                      : 5\n 0x0982 (2434) B       03 UclkDpmShadowPstates                      : 3\n 0x0983 (2435) B       01 UclkDpmShadowPstates                      : 1\n 0x0984 (2436) B       00 FreqTableUclkDiv                          : 0\n 0x0985 (2437) B       02 FreqTableUclkDiv                          : 2\n 0x0986 (2438) B       03 FreqTableUclkDiv                          : 3\n 0x0987 (2439) B       03 FreqTableUclkDiv                          : 3\n 0x0988 (2440) B       03 FreqTableUclkDiv                          : 3\n 0x0989 (2441) B       03 FreqTableUclkDiv                          : 3\n 0x098a (2442) B       00 FreqTableShadowUclkDiv                    : 0\n 0x098b (2443) B       02 FreqTableShadowUclkDiv                    : 2\n 0x098c (2444) B       03 FreqTableShadowUclkDiv                    : 3\n 0x098d (2445) B       03 FreqTableShadowUclkDiv                    : 3\n 0x098e (2446) B       03 FreqTableShadowUclkDiv                    : 3\n 0x098f (2447) B       03 FreqTableShadowUclkDiv                    : 3\n 0x0990 (2448) H     8c0a MemVmempVoltage                           : 2700\n 0x0992 (2450) H     f00a MemVmempVoltage                           : 2800\n 0x0994 (2452) H     b80b MemVmempVoltage                           : 3000\n 0x0996 (2454) H     b80b MemVmempVoltage                           : 3000\n 0x0998 (2456) H     480d MemVmempVoltage                           : 3400\n 0x099a (2458) H     480d MemVmempVoltage                           : 3400\n 0x099c (2460) H     8813 MemVddioVoltage                           : 5000\n 0x099e (2462) H     8813 MemVddioVoltage                           : 5000\n 0x09a0 (2464) H     8813 MemVddioVoltage                           : 5000\n 0x09a2 (2466) H     8813 MemVddioVoltage                           : 5000\n 0x09a4 (2468) H     1815 MemVddioVoltage                           : 5400\n 0x09a6 (2470) H     1815 MemVddioVoltage                           : 5400\n 0x09a8 (2472) H     c901 DalDcModeMaxUclkFreq                      : 457\n 0x09aa (2474) B       88 PaddingsMem                               : 136\n 0x09ab (2475) B       13 PaddingsMem                               : 19\n 0x09ac (2476) I c9018813 PaddingFclk                               : 327680457\n 0x09b0 (2480) B       00 PcieGenSpeed                              : 0\n 0x09b1 (2481) B       03 PcieGenSpeed                              : 3\n 0x09b2 (2482) B       04 PcieGenSpeed                              : 4\n 0x09b3 (2483) B       06 PcieLaneCount                             : 6\n 0x09b4 (2484) B       06 PcieLaneCount                             : 6\n 0x09b5 (2485) B       06 PcieLaneCount                             : 6\n 0x09b6 (2486) H     fa00 LclkFreq                                  : 250\n 0x09b8 (2488) H     6802 LclkFreq                                  : 616\n 0x09ba (2490) H     7704 LclkFreq                                  : 1143\n 0x09bc (2492) B       00 OverrideGfxAvfsFuses                      : 0\n 0x09bd (2493) B       03 GfxAvfsPadding                            : 3\n 0x09be (2494) H     0f00 DroopGBStDev                              : 15\n 0x09c0 (2496) I 00000001 SocHwRtAvfsFuses                          : 16777216\n 0x09c4 (2500) I 00000001 SocHwRtAvfsFuses                          : 16777216\n 0x09c8 (2504) I 00000001 SocHwRtAvfsFuses                          : 16777216\n 0x09cc (2508) I 00000001 SocHwRtAvfsFuses                          : 16777216\n 0x09d0 (2512) I 00000001 SocHwRtAvfsFuses                          : 16777216\n 0x09d4 (2516) I 00000100 SocHwRtAvfsFuses                          : 65536\n 0x09d8 (2520) I 00800000 SocHwRtAvfsFuses                          : 32768\n 0x09dc (2524) I 00000100 SocHwRtAvfsFuses                          : 65536\n 0x09e0 (2528) I 00800000 SocHwRtAvfsFuses                          : 32768\n 0x09e4 (2532) I 00000100 SocHwRtAvfsFuses                          : 65536\n 0x09e8 (2536) I 00800000 SocHwRtAvfsFuses                          : 32768\n 0x09ec (2540) I 00000100 SocHwRtAvfsFuses                          : 65536\n 0x09f0 (2544) I 00800000 SocHwRtAvfsFuses                          : 32768\n 0x09f4 (2548) I 00000100 SocHwRtAvfsFuses                          : 65536\n 0x09f8 (2552) I 00800000 SocHwRtAvfsFuses                          : 32768\n 0x09fc (2556) I b1001301 SocHwRtAvfsFuses                          : 18022577\n 0x0a00 (2560) I da003101 SocHwRtAvfsFuses                          : 19988698\n 0x0a04 (2564) I fd005801 SocHwRtAvfsFuses                          : 22544637\n 0x0a08 (2568) I 1f018b01 SocHwRtAvfsFuses                          : 25887007\n 0x0a0c (2572) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a10 (2576) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a14 (2580) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a18 (2584) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a1c (2588) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a20 (2592) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a24 (2596) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a28 (2600) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a2c (2604) I 00000000 SocHwRtAvfsFuses                          : 0\n 0x0a30 (2608) I 26002600 SocHwRtAvfsFuses                          : 2490406\n 0x0a34 (2612) I 26002600 SocHwRtAvfsFuses                          : 2490406\n 0x0a38 (2616) I 26000000 SocHwRtAvfsFuses                          : 38\n 0x0a3c (2620) I ffff0000 SocHwRtAvfsFuses                          : 65535\n 0x0a40 (2624) I 00000001 GfxL2HwRtAvfsFuses                        : 16777216\n 0x0a44 (2628) I 00000001 GfxL2HwRtAvfsFuses                        : 16777216\n 0x0a48 (2632) I 00000001 GfxL2HwRtAvfsFuses                        : 16777216\n 0x0a4c (2636) I 00000001 GfxL2HwRtAvfsFuses                        : 16777216\n 0x0a50 (2640) I 00000001 GfxL2HwRtAvfsFuses                        : 16777216\n 0x0a54 (2644) I 00c0fca8 GfxL2HwRtAvfsFuses                        : 2835136512\n 0x0a58 (2648) I 00300444 GfxL2HwRtAvfsFuses                        : 1141125120\n 0x0a5c (2652) I 00c0fca8 GfxL2HwRtAvfsFuses                        : 2835136512\n 0x0a60 (2656) I 00300444 GfxL2HwRtAvfsFuses                        : 1141125120\n 0x0a64 (2660) I 00c0fca8 GfxL2HwRtAvfsFuses                        : 2835136512\n 0x0a68 (2664) I 00300444 GfxL2HwRtAvfsFuses                        : 1141125120\n 0x0a6c (2668) I 00c0fca8 GfxL2HwRtAvfsFuses                        : 2835136512\n 0x0a70 (2672) I 00300444 GfxL2HwRtAvfsFuses                        : 1141125120\n 0x0a74 (2676) I 00c0fca8 GfxL2HwRtAvfsFuses                        : 2835136512\n 0x0a78 (2680) I 00300444 GfxL2HwRtAvfsFuses                        : 1141125120\n 0x0a7c (2684) I c6071301 GfxL2HwRtAvfsFuses                        : 18024390\n 0x0a80 (2688) I 37093101 GfxL2HwRtAvfsFuses                        : 19990839\n 0x0a84 (2692) I 140a5801 GfxL2HwRtAvfsFuses                        : 22546964\n 0x0a88 (2696) I 850b8b01 GfxL2HwRtAvfsFuses                        : 25889669\n 0x0a8c (2700) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0a90 (2704) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0a94 (2708) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0a98 (2712) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0a9c (2716) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0aa0 (2720) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0aa4 (2724) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0aa8 (2728) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0aac (2732) I 00000000 GfxL2HwRtAvfsFuses                        : 0\n 0x0ab0 (2736) I 05800580 GfxL2HwRtAvfsFuses                        : 2147844101\n 0x0ab4 (2740) I 05800580 GfxL2HwRtAvfsFuses                        : 2147844101\n 0x0ab8 (2744) I 05800000 GfxL2HwRtAvfsFuses                        : 32773\n 0x0abc (2748) I ffff0000 GfxL2HwRtAvfsFuses                        : 65535\n 0x0ac0 (2752) H     5203 PsmDidt_Vcross                            : 850\n 0x0ac2 (2754) H     e803 PsmDidt_Vcross                            : 1000\n 0x0ac4 (2756) f cdcc4c3f PsmDidt_StaticDroop_A                     : 0.8\n 0x0ac8 (2760) f cdcc4c3f PsmDidt_StaticDroop_A                     : 0.8\n 0x0acc (2764) f cdcc4c3f PsmDidt_StaticDroop_A                     : 0.8\n 0x0ad0 (2768) f 00000000 PsmDidt_StaticDroop_B                     : 0\n 0x0ad4 (2772) f 00000000 PsmDidt_StaticDroop_B                     : 0\n 0x0ad8 (2776) f 00000000 PsmDidt_StaticDroop_B                     : 0\n 0x0adc (2780) f 00000000 PsmDidt_DynDroop_A                        : 0\n 0x0ae0 (2784) f 00000000 PsmDidt_DynDroop_A                        : 0\n 0x0ae4 (2788) f 00000000 PsmDidt_DynDroop_A                        : 0\n 0x0ae8 (2792) f 00000000 PsmDidt_DynDroop_B                        : 0\n 0x0aec (2796) f 00000000 PsmDidt_DynDroop_B                        : 0\n 0x0af0 (2800) f 00000000 PsmDidt_DynDroop_B                        : 0\n 0x0af4 (2804) I 00000000 HwRtAvfsFuses                             : 0\n 0x0af8 (2808) I 00000000 HwRtAvfsFuses                             : 0\n 0x0afc (2812) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b00 (2816) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b04 (2820) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b08 (2824) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b0c (2828) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b10 (2832) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b14 (2836) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b18 (2840) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b1c (2844) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b20 (2848) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b24 (2852) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b28 (2856) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b2c (2860) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b30 (2864) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b34 (2868) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b38 (2872) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b3c (2876) I 00000000 HwRtAvfsFuses                             : 0\n 0x0b40 (2880) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b44 (2884) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b48 (2888) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b4c (2892) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b50 (2896) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b54 (2900) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b58 (2904) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b5c (2908) I bc020000 SocCommonRtAvfs                           : 700\n 0x0b60 (2912) I 00000000 SocCommonRtAvfs                           : 0\n 0x0b64 (2916) I 00000000 SocCommonRtAvfs                           : 0\n 0x0b68 (2920) I 00000000 SocCommonRtAvfs                           : 0\n 0x0b6c (2924) I 00000000 SocCommonRtAvfs                           : 0\n 0x0b70 (2928) I 00000000 SocCommonRtAvfs                           : 0\n 0x0b74 (2932) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b78 (2936) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b7c (2940) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b80 (2944) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b84 (2948) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b88 (2952) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b8c (2956) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b90 (2960) I bc020000 GfxCommonRtAvfs                           : 700\n 0x0b94 (2964) I 00000000 GfxCommonRtAvfs                           : 0\n 0x0b98 (2968) I 00000000 GfxCommonRtAvfs                           : 0\n 0x0b9c (2972) I 00000000 GfxCommonRtAvfs                           : 0\n 0x0ba0 (2976) I 00000000 GfxCommonRtAvfs                           : 0\n 0x0ba4 (2980) I 00000000 GfxCommonRtAvfs                           : 0\n 0x0ba8 (2984) I 0b000000 SocFwRtAvfsFuses                          : 11\n 0x0bac (2988) I 0b000000 SocFwRtAvfsFuses                          : 11\n 0x0bb0 (2992) I 09000000 SocFwRtAvfsFuses                          : 9\n 0x0bb4 (2996) I 0d000000 SocFwRtAvfsFuses                          : 13\n 0x0bb8 (3000) I 18000000 SocFwRtAvfsFuses                          : 24\n 0x0bbc (3004) I 18000000 SocFwRtAvfsFuses                          : 24\n 0x0bc0 (3008) I 00000000 SocFwRtAvfsFuses                          : 0\n 0x0bc4 (3012) I 00000000 SocFwRtAvfsFuses                          : 0\n 0x0bc8 (3016) I 01000000 SocFwRtAvfsFuses                          : 1\n 0x0bcc (3020) I 01000000 SocFwRtAvfsFuses                          : 1\n 0x0bd0 (3024) I 00000000 SocFwRtAvfsFuses                          : 0\n 0x0bd4 (3028) I 00000000 SocFwRtAvfsFuses                          : 0\n 0x0bd8 (3032) I 00000000 SocFwRtAvfsFuses                          : 0\n 0x0bdc (3036) I b80b0000 SocFwRtAvfsFuses                          : 3000\n 0x0be0 (3040) I f4030000 SocFwRtAvfsFuses                          : 1012\n 0x0be4 (3044) I f4030000 SocFwRtAvfsFuses                          : 1012\n 0x0be8 (3048) I f4030000 SocFwRtAvfsFuses                          : 1012\n 0x0bec (3052) I f4030000 SocFwRtAvfsFuses                          : 1012\n 0x0bf0 (3056) I f4030000 SocFwRtAvfsFuses                          : 1012\n 0x0bf4 (3060) I 04000000 GfxL2FwRtAvfsFuses                        : 4\n 0x0bf8 (3064) I 04000000 GfxL2FwRtAvfsFuses                        : 4\n 0x0bfc (3068) I 03000000 GfxL2FwRtAvfsFuses                        : 3\n 0x0c00 (3072) I 05000000 GfxL2FwRtAvfsFuses                        : 5\n 0x0c04 (3076) I 0a000000 GfxL2FwRtAvfsFuses                        : 10\n 0x0c08 (3080) I 0a000000 GfxL2FwRtAvfsFuses                        : 10\n 0x0c0c (3084) I 00000000 GfxL2FwRtAvfsFuses                        : 0\n 0x0c10 (3088) I 00000000 GfxL2FwRtAvfsFuses                        : 0\n 0x0c14 (3092) I 01000000 GfxL2FwRtAvfsFuses                        : 1\n 0x0c18 (3096) I 01000000 GfxL2FwRtAvfsFuses                        : 1\n 0x0c1c (3100) I 01000000 GfxL2FwRtAvfsFuses                        : 1\n 0x0c20 (3104) I 01000000 GfxL2FwRtAvfsFuses                        : 1\n 0x0c24 (3108) I 00000000 GfxL2FwRtAvfsFuses                        : 0\n 0x0c28 (3112) I f60c0000 GfxL2FwRtAvfsFuses                        : 3318\n 0x0c2c (3116) I ce1c0000 GfxL2FwRtAvfsFuses                        : 7374\n 0x0c30 (3120) I ce1c0000 GfxL2FwRtAvfsFuses                        : 7374\n 0x0c34 (3124) I ce1c0000 GfxL2FwRtAvfsFuses                        : 7374\n 0x0c38 (3128) I ce1c0000 GfxL2FwRtAvfsFuses                        : 7374\n 0x0c3c (3132) I ce1c0000 GfxL2FwRtAvfsFuses                        : 7374\n 0x0c40 (3136) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c44 (3140) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c48 (3144) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c4c (3148) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c50 (3152) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c54 (3156) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c58 (3160) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c5c (3164) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c60 (3168) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c64 (3172) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c68 (3176) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c6c (3180) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c70 (3184) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c74 (3188) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c78 (3192) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c7c (3196) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c80 (3200) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c84 (3204) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c88 (3208) I 00000000 FwRtAvfsFuses                             : 0\n 0x0c8c (3212) f 0000803f Soc_Droop_PWL_F                           : 1\n 0x0c90 (3216) f 6666e63f Soc_Droop_PWL_F                           : 1.8\n 0x0c94 (3220) f cdcc2c40 Soc_Droop_PWL_F                           : 2.7\n 0x0c98 (3224) f 00004040 Soc_Droop_PWL_F                           : 3\n 0x0c9c (3228) f 66666640 Soc_Droop_PWL_F                           : 3.6\n 0x0ca0 (3232) f 92968a3d Soc_Droop_PWL_a                           : 0.06767\n 0x0ca4 (3236) f 92968a3d Soc_Droop_PWL_a                           : 0.06767\n 0x0ca8 (3240) f 92968a3d Soc_Droop_PWL_a                           : 0.06767\n 0x0cac (3244) f 92968a3d Soc_Droop_PWL_a                           : 0.06767\n 0x0cb0 (3248) f 92968a3d Soc_Droop_PWL_a                           : 0.06767\n 0x0cb4 (3252) f 533f6f3d Soc_Droop_PWL_b                           : 0.05841\n 0x0cb8 (3256) f 533f6f3d Soc_Droop_PWL_b                           : 0.05841\n 0x0cbc (3260) f 533f6f3d Soc_Droop_PWL_b                           : 0.05841\n 0x0cc0 (3264) f 533f6f3d Soc_Droop_PWL_b                           : 0.05841\n 0x0cc4 (3268) f 533f6f3d Soc_Droop_PWL_b                           : 0.05841\n 0x0cc8 (3272) f e8de43bd Soc_Droop_PWL_c                           :-0.04782\n 0x0ccc (3276) f e8de43bd Soc_Droop_PWL_c                           :-0.04782\n 0x0cd0 (3280) f e8de43bd Soc_Droop_PWL_c                           :-0.04782\n 0x0cd4 (3284) f e8de43bd Soc_Droop_PWL_c                           :-0.04782\n 0x0cd8 (3288) f e8de43bd Soc_Droop_PWL_c                           :-0.04782\n 0x0cdc (3292) f 0000803f Gfx_Droop_PWL_F                           : 1\n 0x0ce0 (3296) f 33333340 Gfx_Droop_PWL_F                           : 2.8\n 0x0ce4 (3300) f ec513840 Gfx_Droop_PWL_F                           : 2.88\n 0x0ce8 (3304) f cdcc4c40 Gfx_Droop_PWL_F                           : 3.2\n 0x0cec (3308) f 66666640 Gfx_Droop_PWL_F                           : 3.6\n 0x0cf0 (3312) f 5856123f Gfx_Droop_PWL_a                           : 0.57163\n 0x0cf4 (3316) f 5856123f Gfx_Droop_PWL_a                           : 0.57163\n 0x0cf8 (3320) f 5856123f Gfx_Droop_PWL_a                           : 0.57163\n 0x0cfc (3324) f dbdcc83e Gfx_Droop_PWL_a                           : 0.39231\n 0x0d00 (3328) f dbdcc83e Gfx_Droop_PWL_a                           : 0.39231\n 0x0d04 (3332) f 01f6d13c Gfx_Droop_PWL_b                           : 0.02563\n 0x0d08 (3336) f 01f6d13c Gfx_Droop_PWL_b                           : 0.02563\n 0x0d0c (3340) f 01f6d13c Gfx_Droop_PWL_b                           : 0.02563\n 0x0d10 (3344) f 99d3453e Gfx_Droop_PWL_b                           : 0.19319\n 0x0d14 (3348) f 99d3453e Gfx_Droop_PWL_b                           : 0.19319\n 0x0d18 (3352) f ce3697be Gfx_Droop_PWL_c                           :-0.29534\n 0x0d1c (3356) f 4da193be Gfx_Droop_PWL_c                           :-0.28834\n 0x0d20 (3360) f b9888fbe Gfx_Droop_PWL_c                           :-0.28034\n 0x0d24 (3364) f 7b8327bf Gfx_Droop_PWL_c                           :-0.65435\n 0x0d28 (3368) f 7b8327bf Gfx_Droop_PWL_c                           :-0.65435\n 0x0d2c (3372) I 00000000 Gfx_Static_PWL_Offset                     : 0\n 0x0d30 (3376) I 00000000 Gfx_Static_PWL_Offset                     : 0\n 0x0d34 (3380) I 00000000 Gfx_Static_PWL_Offset                     : 0\n 0x0d38 (3384) I 00000000 Gfx_Static_PWL_Offset                     : 0\n 0x0d3c (3388) I 00000000 Gfx_Static_PWL_Offset                     : 0\n 0x0d40 (3392) I 00000000 Soc_Static_PWL_Offset                     : 0\n 0x0d44 (3396) I 00000000 Soc_Static_PWL_Offset                     : 0\n 0x0d48 (3400) I 00000000 Soc_Static_PWL_Offset                     : 0\n 0x0d4c (3404) I 00000000 Soc_Static_PWL_Offset                     : 0\n 0x0d50 (3408) I 00000000 Soc_Static_PWL_Offset                     : 0\n 0x0d54 (3412) I 00000000 GbV_dT_vmin                               : 0\n 0x0d58 (3416) I 00000000 GbV_dT_vmax                               : 0\n 0x0d5c (3420) I 00000000 PaddingV2F                                : 0\n 0x0d60 (3424) I 00000000 PaddingV2F                                : 0\n 0x0d64 (3428) I 00000000 PaddingV2F                                : 0\n 0x0d68 (3432) I 00000000 PaddingV2F                                : 0\n 0x0d6c (3436) B       00 DcBtcEnabled                              : 0\n 0x0d6d (3437) B       00 Padding                                   : 0\n 0x0d6e (3438) B       00 Padding                                   : 0\n 0x0d6f (3439) B       00 Padding                                   : 0\n 0x0d70 (3440) H     1400 DcTol                                     : 20\n 0x0d72 (3442) H     0000 DcBtcGb                                   : 0\n 0x0d74 (3444) H     0000 DcBtcMin                                  : 0\n 0x0d76 (3446) H     0000 DcBtcMax                                  : 0\n 0x0d78 (3448) f 00000000 m                                         : 0\n 0x0d7c (3452) f 00000000 b                                         : 0\n 0x0d80 (3456) f 8a8ee43d a                                         : 0.1116\n 0x0d84 (3460) f 302a69be b                                         :-0.2277\n 0x0d88 (3464) f bb273f3f c                                         : 0.7467\n 0x0d8c (3468) I cdcc0c3e GfxAvfsSpare                              : 1041026253\n 0x0d90 (3472) I d50988be GfxAvfsSpare                              : 3196586453\n 0x0d94 (3476) I 6ade413f GfxAvfsSpare                              : 1061281386\n 0x0d98 (3480) I 00000000 GfxAvfsSpare                              : 0\n 0x0d9c (3484) I 00000000 GfxAvfsSpare                              : 0\n 0x0da0 (3488) I 00000000 GfxAvfsSpare                              : 0\n 0x0da4 (3492) I 00000000 GfxAvfsSpare                              : 0\n 0x0da8 (3496) I 00000000 GfxAvfsSpare                              : 0\n 0x0dac (3500) I 00000000 GfxAvfsSpare                              : 0\n 0x0db0 (3504) I 00000000 GfxAvfsSpare                              : 0\n 0x0db4 (3508) I 00000000 GfxAvfsSpare                              : 0\n 0x0db8 (3512) I 00000000 GfxAvfsSpare                              : 0\n 0x0dbc (3516) I 00000000 GfxAvfsSpare                              : 0\n 0x0dc0 (3520) I 00000000 GfxAvfsSpare                              : 0\n 0x0dc4 (3524) I 00000000 GfxAvfsSpare                              : 0\n 0x0dc8 (3528) I 00000000 GfxAvfsSpare                              : 0\n 0x0dcc (3532) I 00000000 GfxAvfsSpare                              : 0\n 0x0dd0 (3536) I 00000000 GfxAvfsSpare                              : 0\n 0x0dd4 (3540) I 00000000 GfxAvfsSpare                              : 0\n 0x0dd8 (3544) I 00000000 GfxAvfsSpare                              : 0\n 0x0ddc (3548) I 00000000 GfxAvfsSpare                              : 0\n 0x0de0 (3552) I 00000000 GfxAvfsSpare                              : 0\n 0x0de4 (3556) I 00000000 GfxAvfsSpare                              : 0\n 0x0de8 (3560) I 00000000 GfxAvfsSpare                              : 0\n 0x0dec (3564) I 00000000 GfxAvfsSpare                              : 0\n 0x0df0 (3568) I 00000000 GfxAvfsSpare                              : 0\n 0x0df4 (3572) I 00000000 GfxAvfsSpare                              : 0\n 0x0df8 (3576) I 00000000 GfxAvfsSpare                              : 0\n 0x0dfc (3580) I 00000000 GfxAvfsSpare                              : 0\n 0x0e00 (3584) B       00 OverrideSocAvfsFuses                      : 0\n 0x0e01 (3585) B       00 MinSocAvfsRevision                        : 0\n 0x0e02 (3586) B       00 SocAvfsPadding                            : 0\n 0x0e03 (3587) B       00 SocAvfsPadding                            : 0\n 0x0e04 (3588) H     0000 AvfsTemp                                  : 0\n 0x0e06 (3590) H     0000 AvfsTemp                                  : 0\n 0x0e08 (3592) H     0000 VftFMin                                   : 0\n 0x0e0a (3594) H     0000 VInversion                                : 0\n 0x0e0c (3596) f 00000000 a                                         : 0\n 0x0e10 (3600) f 00000000 b                                         : 0\n 0x0e14 (3604) f 00000000 c                                         : 0\n 0x0e18 (3608) f 00000000 a                                         : 0\n 0x0e1c (3612) f 00000000 b                                         : 0\n 0x0e20 (3616) f 00000000 c                                         : 0\n 0x0e24 (3620) f 00000000 a                                         : 0\n 0x0e28 (3624) f 00000000 b                                         : 0\n 0x0e2c (3628) f 00000000 c                                         : 0\n 0x0e30 (3632) f 00000000 a                                         : 0\n 0x0e34 (3636) f 00000000 b                                         : 0\n 0x0e38 (3640) f 00000000 c                                         : 0\n 0x0e3c (3644) f 00000000 a                                         : 0\n 0x0e40 (3648) f 00000000 b                                         : 0\n 0x0e44 (3652) f 00000000 c                                         : 0\n 0x0e48 (3656) f 00000000 m                                         : 0\n 0x0e4c (3660) f 00000000 b                                         : 0\n 0x0e50 (3664) f 00000000 a                                         : 0\n 0x0e54 (3668) f 00000000 b                                         : 0\n 0x0e58 (3672) f 00000000 c                                         : 0\n 0x0e5c (3676) B       00 DcBtcEnabled                              : 0\n 0x0e5d (3677) B       00 Padding                                   : 0\n 0x0e5e (3678) B       00 Padding                                   : 0\n 0x0e5f (3679) B       00 Padding                                   : 0\n 0x0e60 (3680) H     1400 DcTol                                     : 20\n 0x0e62 (3682) H     0000 DcBtcGb                                   : 0\n 0x0e64 (3684) H     0000 DcBtcMin                                  : 0\n 0x0e66 (3686) H     0000 DcBtcMax                                  : 0\n 0x0e68 (3688) f 00000000 m                                         : 0\n 0x0e6c (3692) f 00000000 b                                         : 0\n 0x0e70 (3696) f f5b91a3e a                                         : 0.1511\n 0x0e74 (3700) f 82e287be b                                         :-0.2654\n 0x0e78 (3704) f 2f6e433f c                                         : 0.7634\n 0x0e7c (3708) I ce88d2bc SocAvfsSpare                              : 3167914190\n 0x0e80 (3712) I 50fc083f SocAvfsSpare                              : 1057553488\n 0x0e84 (3716) I 00000000 SocAvfsSpare                              : 0\n 0x0e88 (3720) I 00000000 SocAvfsSpare                              : 0\n 0x0e8c (3724) I 00000000 SocAvfsSpare                              : 0\n 0x0e90 (3728) I 00000000 SocAvfsSpare                              : 0\n 0x0e94 (3732) I 00000000 SocAvfsSpare                              : 0\n 0x0e98 (3736) I 00000000 SocAvfsSpare                              : 0\n 0x0e9c (3740) I 00000000 SocAvfsSpare                              : 0\n 0x0ea0 (3744) I 00000000 SocAvfsSpare                              : 0\n 0x0ea4 (3748) I 00000000 SocAvfsSpare                              : 0\n 0x0ea8 (3752) I 00000000 SocAvfsSpare                              : 0\n 0x0eac (3756) I 00000000 SocAvfsSpare                              : 0\n 0x0eb0 (3760) I 00000000 SocAvfsSpare                              : 0\n 0x0eb4 (3764) I 00000000 SocAvfsSpare                              : 0\n 0x0eb8 (3768) I 00000000 SocAvfsSpare                              : 0\n 0x0ebc (3772) I 00000000 SocAvfsSpare                              : 0\n 0x0ec0 (3776) I 00000000 SocAvfsSpare                              : 0\n 0x0ec4 (3780) I 00000000 SocAvfsSpare                              : 0\n 0x0ec8 (3784) I 00000000 SocAvfsSpare                              : 0\n 0x0ecc (3788) I 00000000 SocAvfsSpare                              : 0\n 0x0ed0 (3792) I 00000000 SocAvfsSpare                              : 0\n 0x0ed4 (3796) I 00000000 SocAvfsSpare                              : 0\n 0x0ed8 (3800) I 00000000 SocAvfsSpare                              : 0\n 0x0edc (3804) I 00000000 SocAvfsSpare                              : 0\n 0x0ee0 (3808) I 00000000 SocAvfsSpare                              : 0\n 0x0ee4 (3812) I 00000000 SocAvfsSpare                              : 0\n 0x0ee8 (3816) I 00000000 SocAvfsSpare                              : 0\n 0x0eec (3820) I 00000000 SocAvfsSpare                              : 0\n 0x0ef0 (3824) H     5802 InitImuClk                                : 600\n 0x0ef2 (3826) H     a201 InitSocclk                                : 418\n 0x0ef4 (3828) H     f401 InitMpioclk                               : 500\n 0x0ef6 (3830) H     f401 InitSmnclk                                : 500\n 0x0ef8 (3832) H     5802 InitDispClk                               : 600\n 0x0efa (3834) H     5802 InitDppClk                                : 600\n 0x0efc (3836) H     d002 InitDprefclk                              : 720\n 0x0efe (3838) H     d002 InitDcfclk                                : 720\n 0x0f00 (3840) H     d002 InitDtbclk                                : 720\n 0x0f02 (3842) H     0000 InitDbguSocClk                            : 0\n 0x0f04 (3844) H     e803 InitGfxclk_bypass                         : 1000\n 0x0f06 (3846) H     f401 InitMp1clk                                : 500\n 0x0f08 (3848) H     7704 InitLclk                                  : 1143\n 0x0f0a (3850) H     0000 InitDbguBacoClk                           : 0\n 0x0f0c (3852) H     9001 InitBaco400clk                            : 400\n 0x0f0e (3854) H     7704 InitBaco1200clk_bypass                    : 1143\n 0x0f10 (3856) H     b802 InitBaco700clk_bypass                     : 696\n 0x0f12 (3858) H     f401 InitBaco500clk                            : 500\n 0x0f14 (3860) H     0000 InitDclk0                                 : 0\n 0x0f16 (3862) H     0000 InitVclk0                                 : 0\n 0x0f18 (3864) H     e803 InitFclk                                  : 1000\n 0x0f1a (3866) H     b004 Padding1                                  : 1200\n 0x0f1c (3868) B       05 InitUclkLevel                             : 5\n 0x0f1d (3869) B       02 Padding                                   : 2\n 0x0f1e (3870) B       f4 Padding                                   : 244\n 0x0f1f (3871) B       01 Padding                                   : 1\n 0x0f20 (3872) I c0120000 InitVcoFreqPll0                           : 4800\n 0x0f24 (3876) I 94110000 InitVcoFreqPll1                           : 4500\n 0x0f28 (3880) I a00f0000 InitVcoFreqPll2                           : 4000\n 0x0f2c (3884) I 00000000 InitVcoFreqPll3                           : 0\n 0x0f30 (3888) I d0070000 InitVcoFreqPll4                           : 2000\n 0x0f34 (3892) I a00f0000 InitVcoFreqPll5                           : 4000\n 0x0f38 (3896) I a00f0000 InitVcoFreqPll6                           : 4000\n 0x0f3c (3900) I a00f0000 InitVcoFreqPll7                           : 4000\n 0x0f40 (3904) I a00f0000 InitVcoFreqPll8                           : 4000\n 0x0f44 (3908) H     0000 InitGfx                                   : 0\n 0x0f46 (3910) H     e40c InitSoc                                   : 3300\n 0x0f48 (3912) H     8813 InitVddIoMem                              : 5000\n 0x0f4a (3914) H     f00a InitVddCiMem                              : 2800\n 0x0f4c (3916) I a00f0000 Spare                                     : 4000\n 0x0f50 (3920) I 0000f00a Spare                                     : 183500800\n 0x0f54 (3924) I 8813f00a Spare                                     : 183505800\n 0x0f58 (3928) I 00000000 Spare                                     : 0\n 0x0f5c (3932) I 00000000 Spare                                     : 0\n 0x0f60 (3936) I 00000000 Spare                                     : 0\n 0x0f64 (3940) I 00000000 Spare                                     : 0\n 0x0f68 (3944) I 00000000 Spare                                     : 0\n 0x0f6c (3948) H     d804 BaseClockAc                               : 1240\n 0x0f6e (3950) H     1608 GameClockAc                               : 2070\n 0x0f70 (3952) H     d809 BoostClockAc                              : 2520\n 0x0f72 (3954) H     0000 BaseClockDc                               : 0\n 0x0f74 (3956) H     0000 GameClockDc                               : 0\n 0x0f76 (3958) H     0000 BoostClockDc                              : 0\n 0x0f78 (3960) H     480d MaxReportedClock                          : 3400\n 0x0f7a (3962) H     0000 Padding                                   : 0\n 0x0f7c (3964) I 00000000 Reserved                                  : 0\n 0x0f80 (3968) I 00000000 Reserved                                  : 0\n 0x0f84 (3972) I 00000000 Reserved                                  : 0\n 0x0f88 (3976) H     f500 Power                                     : 245\n 0x0f8a (3978) H     f500 Power                                     : 245\n 0x0f8c (3980) H     b004 Power                                     : 1200\n 0x0f8e (3982) H     b004 Power                                     : 1200\n 0x0f90 (3984) H     0000 Power                                     : 0\n 0x0f92 (3986) H     0000 Power                                     : 0\n 0x0f94 (3988) H     0000 Power                                     : 0\n 0x0f96 (3990) H     0000 Power                                     : 0\n 0x0f98 (3992) H     4a01 Tdc                                       : 330\n 0x0f9a (3994) H     5400 Tdc                                       : 84\n 0x0f9c (3996) H     6e00 Temperature                               : 110\n 0x0f9e (3998) H     6e00 Temperature                               : 110\n 0x0fa0 (4000) H     0000 Temperature                               : 0\n 0x0fa2 (4002) H     0000 Temperature                               : 0\n 0x0fa4 (4004) H     6c00 Temperature                               : 108\n 0x0fa6 (4006) H     7300 Temperature                               : 115\n 0x0fa8 (4008) H     7300 Temperature                               : 115\n 0x0faa (4010) H     7300 Temperature                               : 115\n 0x0fac (4012) H     7300 Temperature                               : 115\n 0x0fae (4014) H     0000 Temperature                               : 0\n 0x0fb0 (4016) H     0000 Temperature                               : 0\n 0x0fb2 (4018) H     0000 Temperature                               : 0\n 0x0fb4 (4020) B       00 PwmLimitMin                               : 0\n 0x0fb5 (4021) B       ff PwmLimitMax                               : 255\n 0x0fb6 (4022) B       6e FanTargetTemperature                      : 110\n 0x0fb7 (4023) B       00 Spare1                                    : 0\n 0x0fb8 (4024) H     f401 AcousticTargetRpmThresholdMin             : 500\n 0x0fba (4026) H     7017 AcousticTargetRpmThresholdMax             : 6000\n 0x0fbc (4028) H     f401 AcousticLimitRpmThresholdMin              : 500\n 0x0fbe (4030) H     7017 AcousticLimitRpmThresholdMax              : 6000\n 0x0fc0 (4032) H     0000 PccLimitMin                               : 0\n 0x0fc2 (4034) H     0000 PccLimitMax                               : 0\n 0x0fc4 (4036) H     1e00 FanStopTempMin                            : 30\n 0x0fc6 (4038) H     5000 FanStopTempMax                            : 80\n 0x0fc8 (4040) H     2800 FanStartTempMin                           : 40\n 0x0fca (4042) H     5a00 FanStartTempMax                           : 90\n 0x0fcc (4044) H     0000 PowerMinPpt0                              : 0\n 0x0fce (4046) H     0000 PowerMinPpt0                              : 0\n 0x0fd0 (4048) I 00000000 Spare                                     : 0\n 0x0fd4 (4052) I 00000000 Spare                                     : 0\n 0x0fd8 (4056) I 00000000 Spare                                     : 0\n 0x0fdc (4060) I 00000000 Spare                                     : 0\n 0x0fe0 (4064) I 00000000 Spare                                     : 0\n 0x0fe4 (4068) I 00000000 Spare                                     : 0\n 0x0fe8 (4072) I 00000000 Spare                                     : 0\n 0x0fec (4076) I 00000000 Spare                                     : 0\n 0x0ff0 (4080) I 00000000 Spare                                     : 0\n 0x0ff4 (4084) I 00000000 Spare                                     : 0\n 0x0ff8 (4088) I 00000000 Spare                                     : 0\n 0x0ffc (4092) I 391b0000 FeatureCtrlMask                           : 6969\n 0x1000 (4096) h     38ff VoltageOffsetPerZoneBoundary              :-200\n 0x1002 (4098) h     38ff VoltageOffsetPerZoneBoundary              :-200\n 0x1004 (4100) h     38ff VoltageOffsetPerZoneBoundary              :-200\n 0x1006 (4102) h     38ff VoltageOffsetPerZoneBoundary              :-200\n 0x1008 (4104) h     38ff VoltageOffsetPerZoneBoundary              :-200\n 0x100a (4106) h     38ff VoltageOffsetPerZoneBoundary              :-200\n 0x100c (4108) H     0000 VddGfxVmax                                : 0\n 0x100e (4110) H     0000 VddSocVmax                                : 0\n 0x1010 (4112) h     0cfe GfxclkFoffset                             :-500\n 0x1012 (4114) H     0000 Padding                                   : 0\n 0x1014 (4116) H     6100 UclkFmin                                  : 97\n 0x1016 (4118) H     6100 UclkFmax                                  : 97\n 0x1018 (4120) H     0000 FclkFmin                                  : 0\n 0x101a (4122) H     0000 FclkFmax                                  : 0\n 0x101c (4124) h     e2ff Ppt                                       :-30\n 0x101e (4126) h     0000 Tdc                                       : 0\n 0x1020 (4128) B       19 FanLinearPwmPoints                        : 25\n 0x1021 (4129) B       19 FanLinearPwmPoints                        : 25\n 0x1022 (4130) B       19 FanLinearPwmPoints                        : 25\n 0x1023 (4131) B       19 FanLinearPwmPoints                        : 25\n 0x1024 (4132) B       19 FanLinearPwmPoints                        : 25\n 0x1025 (4133) B       19 FanLinearPwmPoints                        : 25\n 0x1026 (4134) B       19 FanLinearTempPoints                       : 25\n 0x1027 (4135) B       19 FanLinearTempPoints                       : 25\n 0x1028 (4136) B       19 FanLinearTempPoints                       : 25\n 0x1029 (4137) B       19 FanLinearTempPoints                       : 25\n 0x102a (4138) B       19 FanLinearTempPoints                       : 25\n 0x102b (4139) B       19 FanLinearTempPoints                       : 25\n 0x102c (4140) H     1900 FanMinimumPwm                             : 25\n 0x102e (4142) H     f401 AcousticTargetRpmThreshold                : 500\n 0x1030 (4144) H     f401 AcousticLimitRpmThreshold                 : 500\n 0x1032 (4146) H     1900 FanTargetTemperature                      : 25\n 0x1034 (4148) B       00 FanZeroRpmEnable                          : 0\n 0x1035 (4149) B       32 MaxOpTemp                                 : 50\n 0x1036 (4150) B       00 Padding1                                  : 0\n 0x1037 (4151) B       00 Padding1                                  : 0\n 0x1038 (4152) H     0000 GfxVoltageFullCtrlMode                    : 0\n 0x103a (4154) H     0000 SocVoltageFullCtrlMode                    : 0\n 0x103c (4156) H     0000 GfxclkFullCtrlMode                        : 0\n 0x103e (4158) H     0000 UclkFullCtrlMode                          : 0\n 0x1040 (4160) H     0000 FclkFullCtrlMode                          : 0\n 0x1042 (4162) h     0000 GfxEdc                                    : 0\n 0x1044 (4164) h     0000 GfxPccLimitControl                        : 0\n 0x1046 (4166) h     0000 Padding2                                  : 0\n 0x1048 (4168) I 00000000 Spare                                     : 0\n 0x104c (4172) I 00000000 Spare                                     : 0\n 0x1050 (4176) I 00000000 Spare                                     : 0\n 0x1054 (4180) I 00000000 Spare                                     : 0\n 0x1058 (4184) I 00000000 Spare                                     : 0\n 0x105c (4188) I 391b0000 FeatureCtrlMask                           : 6969\n 0x1060 (4192) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1062 (4194) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1064 (4196) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1066 (4198) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1068 (4200) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x106a (4202) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x106c (4204) H     0000 VddGfxVmax                                : 0\n 0x106e (4206) H     0000 VddSocVmax                                : 0\n 0x1070 (4208) h     e803 GfxclkFoffset                             : 1000\n 0x1072 (4210) H     0000 Padding                                   : 0\n 0x1074 (4212) H     dc05 UclkFmin                                  : 1500\n 0x1076 (4214) H     dc05 UclkFmax                                  : 1500\n 0x1078 (4216) H     0000 FclkFmin                                  : 0\n 0x107a (4218) H     0000 FclkFmax                                  : 0\n 0x107c (4220) h     0a00 Ppt                                       : 10\n 0x107e (4222) h     0000 Tdc                                       : 0\n 0x1080 (4224) B       64 FanLinearPwmPoints                        : 100\n 0x1081 (4225) B       64 FanLinearPwmPoints                        : 100\n 0x1082 (4226) B       64 FanLinearPwmPoints                        : 100\n 0x1083 (4227) B       64 FanLinearPwmPoints                        : 100\n 0x1084 (4228) B       64 FanLinearPwmPoints                        : 100\n 0x1085 (4229) B       64 FanLinearPwmPoints                        : 100\n 0x1086 (4230) B       64 FanLinearTempPoints                       : 100\n 0x1087 (4231) B       64 FanLinearTempPoints                       : 100\n 0x1088 (4232) B       64 FanLinearTempPoints                       : 100\n 0x1089 (4233) B       64 FanLinearTempPoints                       : 100\n 0x108a (4234) B       64 FanLinearTempPoints                       : 100\n 0x108b (4235) B       64 FanLinearTempPoints                       : 100\n 0x108c (4236) H     6400 FanMinimumPwm                             : 100\n 0x108e (4238) H     420e AcousticTargetRpmThreshold                : 3650\n 0x1090 (4240) H     420e AcousticLimitRpmThreshold                 : 3650\n 0x1092 (4242) H     6900 FanTargetTemperature                      : 105\n 0x1094 (4244) B       01 FanZeroRpmEnable                          : 1\n 0x1095 (4245) B       6e MaxOpTemp                                 : 110\n 0x1096 (4246) B       00 Padding1                                  : 0\n 0x1097 (4247) B       00 Padding1                                  : 0\n 0x1098 (4248) H     0000 GfxVoltageFullCtrlMode                    : 0\n 0x109a (4250) H     0000 SocVoltageFullCtrlMode                    : 0\n 0x109c (4252) H     0000 GfxclkFullCtrlMode                        : 0\n 0x109e (4254) H     0000 UclkFullCtrlMode                          : 0\n 0x10a0 (4256) H     0000 FclkFullCtrlMode                          : 0\n 0x10a2 (4258) h     0000 GfxEdc                                    : 0\n 0x10a4 (4260) h     0000 GfxPccLimitControl                        : 0\n 0x10a6 (4262) h     0000 Padding2                                  : 0\n 0x10a8 (4264) I 00000000 Spare                                     : 0\n 0x10ac (4268) I 00000000 Spare                                     : 0\n 0x10b0 (4272) I 00000000 Spare                                     : 0\n 0x10b4 (4276) I 00000000 Spare                                     : 0\n 0x10b8 (4280) I 00000000 Spare                                     : 0\n 0x10bc (4284) I 00000000 FeatureCtrlMask                           : 0\n 0x10c0 (4288) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x10c2 (4290) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x10c4 (4292) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x10c6 (4294) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x10c8 (4296) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x10ca (4298) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x10cc (4300) H     0000 VddGfxVmax                                : 0\n 0x10ce (4302) H     0000 VddSocVmax                                : 0\n 0x10d0 (4304) h     0000 GfxclkFoffset                             : 0\n 0x10d2 (4306) H     0000 Padding                                   : 0\n 0x10d4 (4308) H     0000 UclkFmin                                  : 0\n 0x10d6 (4310) H     0000 UclkFmax                                  : 0\n 0x10d8 (4312) H     0000 FclkFmin                                  : 0\n 0x10da (4314) H     0000 FclkFmax                                  : 0\n 0x10dc (4316) h     0000 Ppt                                       : 0\n 0x10de (4318) h     0000 Tdc                                       : 0\n 0x10e0 (4320) B       00 FanLinearPwmPoints                        : 0\n 0x10e1 (4321) B       00 FanLinearPwmPoints                        : 0\n 0x10e2 (4322) B       00 FanLinearPwmPoints                        : 0\n 0x10e3 (4323) B       00 FanLinearPwmPoints                        : 0\n 0x10e4 (4324) B       00 FanLinearPwmPoints                        : 0\n 0x10e5 (4325) B       00 FanLinearPwmPoints                        : 0\n 0x10e6 (4326) B       00 FanLinearTempPoints                       : 0\n 0x10e7 (4327) B       00 FanLinearTempPoints                       : 0\n 0x10e8 (4328) B       00 FanLinearTempPoints                       : 0\n 0x10e9 (4329) B       00 FanLinearTempPoints                       : 0\n 0x10ea (4330) B       00 FanLinearTempPoints                       : 0\n 0x10eb (4331) B       00 FanLinearTempPoints                       : 0\n 0x10ec (4332) H     0000 FanMinimumPwm                             : 0\n 0x10ee (4334) H     0000 AcousticTargetRpmThreshold                : 0\n 0x10f0 (4336) H     0000 AcousticLimitRpmThreshold                 : 0\n 0x10f2 (4338) H     0000 FanTargetTemperature                      : 0\n 0x10f4 (4340) B       00 FanZeroRpmEnable                          : 0\n 0x10f5 (4341) B       00 MaxOpTemp                                 : 0\n 0x10f6 (4342) B       00 Padding1                                  : 0\n 0x10f7 (4343) B       00 Padding1                                  : 0\n 0x10f8 (4344) H     0000 GfxVoltageFullCtrlMode                    : 0\n 0x10fa (4346) H     0000 SocVoltageFullCtrlMode                    : 0\n 0x10fc (4348) H     0000 GfxclkFullCtrlMode                        : 0\n 0x10fe (4350) H     0000 UclkFullCtrlMode                          : 0\n 0x1100 (4352) H     0000 FclkFullCtrlMode                          : 0\n 0x1102 (4354) h     0000 GfxEdc                                    : 0\n 0x1104 (4356) h     0000 GfxPccLimitControl                        : 0\n 0x1106 (4358) h     0000 Padding2                                  : 0\n 0x1108 (4360) I 00000000 Spare                                     : 0\n 0x110c (4364) I 00000000 Spare                                     : 0\n 0x1110 (4368) I 00000000 Spare                                     : 0\n 0x1114 (4372) I 00000000 Spare                                     : 0\n 0x1118 (4376) I 00000000 Spare                                     : 0\n 0x111c (4380) I 00000000 FeatureCtrlMask                           : 0\n 0x1120 (4384) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1122 (4386) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1124 (4388) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1126 (4390) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x1128 (4392) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x112a (4394) h     0000 VoltageOffsetPerZoneBoundary              : 0\n 0x112c (4396) H     0000 VddGfxVmax                                : 0\n 0x112e (4398) H     0000 VddSocVmax                                : 0\n 0x1130 (4400) h     0000 GfxclkFoffset                             : 0\n 0x1132 (4402) H     0000 Padding                                   : 0\n 0x1134 (4404) H     0000 UclkFmin                                  : 0\n 0x1136 (4406) H     0000 UclkFmax                                  : 0\n 0x1138 (4408) H     0000 FclkFmin                                  : 0\n 0x113a (4410) H     0000 FclkFmax                                  : 0\n 0x113c (4412) h     0000 Ppt                                       : 0\n 0x113e (4414) h     0000 Tdc                                       : 0\n 0x1140 (4416) B       00 FanLinearPwmPoints                        : 0\n 0x1141 (4417) B       00 FanLinearPwmPoints                        : 0\n 0x1142 (4418) B       00 FanLinearPwmPoints                        : 0\n 0x1143 (4419) B       00 FanLinearPwmPoints                        : 0\n 0x1144 (4420) B       00 FanLinearPwmPoints                        : 0\n 0x1145 (4421) B       00 FanLinearPwmPoints                        : 0\n 0x1146 (4422) B       00 FanLinearTempPoints                       : 0\n 0x1147 (4423) B       00 FanLinearTempPoints                       : 0\n 0x1148 (4424) B       00 FanLinearTempPoints                       : 0\n 0x1149 (4425) B       00 FanLinearTempPoints                       : 0\n 0x114a (4426) B       00 FanLinearTempPoints                       : 0\n 0x114b (4427) B       00 FanLinearTempPoints                       : 0\n 0x114c (4428) H     0000 FanMinimumPwm                             : 0\n 0x114e (4430) H     0000 AcousticTargetRpmThreshold                : 0\n 0x1150 (4432) H     0000 AcousticLimitRpmThreshold                 : 0\n 0x1152 (4434) H     0000 FanTargetTemperature                      : 0\n 0x1154 (4436) B       00 FanZeroRpmEnable                          : 0\n 0x1155 (4437) B       00 MaxOpTemp                                 : 0\n 0x1156 (4438) B       00 Padding1                                  : 0\n 0x1157 (4439) B       00 Padding1                                  : 0\n 0x1158 (4440) H     0000 GfxVoltageFullCtrlMode                    : 0\n 0x115a (4442) H     0000 SocVoltageFullCtrlMode                    : 0\n 0x115c (4444) H     0000 GfxclkFullCtrlMode                        : 0\n 0x115e (4446) H     0000 UclkFullCtrlMode                          : 0\n 0x1160 (4448) H     0000 FclkFullCtrlMode                          : 0\n 0x1162 (4450) h     0000 GfxEdc                                    : 0\n 0x1164 (4452) h     0000 GfxPccLimitControl                        : 0\n 0x1166 (4454) h     0000 Padding2                                  : 0\n 0x1168 (4456) I 00000000 Spare                                     : 0\n 0x116c (4460) I 00000000 Spare                                     : 0\n 0x1170 (4464) I 00000000 Spare                                     : 0\n 0x1174 (4468) I 00000000 Spare                                     : 0\n 0x1178 (4472) I 00000000 Spare                                     : 0\n 0x117c (4476) B       00 TotalBoardPowerSupport                    : 0\n 0x117d (4477) B       00 TotalBoardPowerPadding                    : 0\n 0x117e (4478) H     0000 TotalBoardPowerRoc                        : 0\n 0x1180 (4480) f 41b7973c a                                         : 0.01852\n 0x1184 (4484) f 221a3dc0 b                                         :-2.95472\n 0x1188 (4488) f bc1ae444 c                                         : 1824.84\n 0x118c (4492) f 00000000 a                                         : 0\n 0x1190 (4496) f 00000000 b                                         : 0\n 0x1194 (4500) f 00000000 c                                         : 0\n 0x1198 (4504) f cf49af3d a                                         : 0.08559\n 0x119c (4508) f a459ffc1 b                                         :-31.9188\n 0x11a0 (4512) f 18068145 c                                         : 4128.76\n 0x11a4 (4516) f 00000000 a                                         : 0\n 0x11a8 (4520) f 00000000 b                                         : 0\n 0x11ac (4524) f 00000000 c                                         : 0\n 0x11b0 (4528) f 143f46bc a                                         :-0.0121\n 0x11b4 (4532) f d8364c41 b                                         : 12.7634\n 0x11b8 (4536) f 007e9643 c                                         : 300.984\n 0x11bc (4540) f 00000000 a                                         : 0\n 0x11c0 (4544) f 00000000 b                                         : 0\n 0x11c4 (4548) f 00000000 c                                         : 0\n 0x11c8 (4552) i 00000000 AptUclkGfxclkLookup                       : 0\n 0x11cc (4556) i a5030000 AptUclkGfxclkLookup                       : 933\n 0x11d0 (4560) i b5060000 AptUclkGfxclkLookup                       : 1717\n 0x11d4 (4564) i 0e080000 AptUclkGfxclkLookup                       : 2062\n 0x11d8 (4568) i 03090000 AptUclkGfxclkLookup                       : 2307\n 0x11dc (4572) i f00a0000 AptUclkGfxclkLookup                       : 2800\n 0x11e0 (4576) i 00000000 AptUclkGfxclkLookup                       : 0\n 0x11e4 (4580) i a5030000 AptUclkGfxclkLookup                       : 933\n 0x11e8 (4584) i b5060000 AptUclkGfxclkLookup                       : 1717\n 0x11ec (4588) i 0e080000 AptUclkGfxclkLookup                       : 2062\n 0x11f0 (4592) i 03090000 AptUclkGfxclkLookup                       : 2307\n 0x11f4 (4596) i f00a0000 AptUclkGfxclkLookup                       : 2800\n 0x11f8 (4600) I 64000000 AptUclkGfxclkLookupHyst                   : 100\n 0x11fc (4604) I dd010000 AptUclkGfxclkLookupHyst                   : 477\n 0x1200 (4608) I 6a000000 AptUclkGfxclkLookupHyst                   : 106\n 0x1204 (4612) I 85010000 AptUclkGfxclkLookupHyst                   : 389\n 0x1208 (4616) I 88000000 AptUclkGfxclkLookupHyst                   : 136\n 0x120c (4620) I 64000000 AptUclkGfxclkLookupHyst                   : 100\n 0x1210 (4624) I 64000000 AptUclkGfxclkLookupHyst                   : 100\n 0x1214 (4628) I dd010000 AptUclkGfxclkLookupHyst                   : 477\n 0x1218 (4632) I 6a000000 AptUclkGfxclkLookupHyst                   : 106\n 0x121c (4636) I 85010000 AptUclkGfxclkLookupHyst                   : 389\n 0x1220 (4640) I 88000000 AptUclkGfxclkLookupHyst                   : 136\n 0x1224 (4644) I 64000000 AptUclkGfxclkLookupHyst                   : 100\n 0x1228 (4648) I 00000000 AptPadding                                : 0\n 0x122c (4652) f 00000000 a                                         : 0\n 0x1230 (4656) f 0000803f b                                         : 1\n 0x1234 (4660) f cdccccbd c                                         :-0.1\n 0x1238 (4664) I 50000000 GfxXvminDidtResetDDWait                   : 80\n 0x123c (4668) I 01000000 GfxXvminDidtClkStopWait                   : 1\n 0x1240 (4672) I 22842700 GfxXvminDidtFcsStepCtrl                   : 2589730\n 0x1244 (4676) I 0f000f00 GfxXvminDidtFcsWaitCtrl                   : 983055\n 0x1248 (4680) I 09000000 PsmModeEnabled                            : 9\n 0x124c (4684) I 00000000 P2v_a                                     : 0\n 0x1250 (4688) I 00000000 P2v_b                                     : 0\n 0x1254 (4692) I 00000000 P2v_c                                     : 0\n 0x1258 (4696) I 00000000 T2p_a                                     : 0\n 0x125c (4700) I 00000000 T2p_b                                     : 0\n 0x1260 (4704) I 00000000 T2p_c                                     : 0\n 0x1264 (4708) I 00000000 P2vTemp                                   : 0\n 0x1268 (4712) f 00000000 a                                         : 0\n 0x126c (4716) f cdcc4c3f b                                         : 0.8\n 0x1270 (4720) f 0ad7a33b c                                         : 0.005\n 0x1274 (4724) f 00000000 a                                         : 0\n 0x1278 (4728) f 00000000 b                                         : 0\n 0x127c (4732) f 8fc2f53c c                                         : 0.03\n 0x1280 (4736) B       01 PsmDidtAvgDiv                             : 1\n 0x1281 (4737) B       00 PsmDidtForceStall                         : 0\n 0x1282 (4738) H     1000 PsmDidtReleaseTimer                       : 16\n 0x1284 (4740) I 55550000 PsmDidtStallPattern                       : 21845\n 0x1288 (4744) f a470a540 CacEdcCacLeakageC0                        : 5.17\n 0x128c (4748) f b81eddc0 CacEdcCacLeakageC1                        :-6.91\n 0x1290 (4752) f 4da1733c CacEdcCacLeakageC2                        : 0.01487\n 0x1294 (4756) f fe7d863d CacEdcCacLeakageC3                        : 0.06567\n 0x1298 (4760) f fd9fba40 CacEdcCacLeakageC4                        : 5.83203\n 0x129c (4764) f b6be48bd CacEdcCacLeakageC5                        :-0.04901\n 0x12a0 (4768) I 00000000 CacEdcGfxClkScalar                        : 0\n 0x12a4 (4772) I 00000000 CacEdcGfxClkIntercept                     : 0\n 0x12a8 (4776) f 9a998942 CacEdcCac_m                               : 68.8\n 0x12ac (4780) f 3333d741 CacEdcCac_b                               : 26.9\n 0x12b0 (4784) I 00000000 CacEdcCurrLimitGuardband                  : 0\n 0x12b4 (4788) I 00000000 CacEdcDynToTotalCacRatio                  : 0\n 0x12b8 (4792) f 3d0a573f XVmin_Gfx_EdcThreshScalar                 : 0.84\n 0x12bc (4796) I 00000000 XVmin_Gfx_EdcEnableFreq                   : 0\n 0x12c0 (4800) I 36841f00 XVmin_Gfx_EdcPccAsStepCtrl                : 2065462\n 0x12c4 (4804) I 40004000 XVmin_Gfx_EdcPccAsWaitCtrl                : 4194368\n 0x12c8 (4808) H     3200 XVmin_Gfx_EdcThreshold                    : 50\n 0x12ca (4810) H     c800 XVmin_Gfx_EdcFiltHysWaitCtrl              : 200\n 0x12cc (4812) f ae47a13f XVmin_Soc_EdcThreshScalar                 : 1.26\n 0x12d0 (4816) I 00000000 XVmin_Soc_EdcEnableFreq                   : 0\n 0x12d4 (4820) I 32000000 XVmin_Soc_EdcThreshold                    : 50\n 0x12d8 (4824) H     0a00 XVmin_Soc_EdcStepUpTime                   : 10\n 0x12da (4826) H     0a00 XVmin_Soc_EdcStepDownTime                 : 10\n 0x12dc (4828) B       05 XVmin_Soc_EdcInitPccStep                  : 5\n 0x12dd (4829) B       00 PaddingSocEdc                             : 0\n 0x12de (4830) B       00 PaddingSocEdc                             : 0\n 0x12df (4831) B       00 PaddingSocEdc                             : 0\n 0x12e0 (4832) B       00 GfxXvminFuseOverride                      : 0\n 0x12e1 (4833) B       00 SocXvminFuseOverride                      : 0\n 0x12e2 (4834) B       00 PaddingXvminFuseOverride                  : 0\n 0x12e3 (4835) B       00 PaddingXvminFuseOverride                  : 0\n 0x12e4 (4836) B       00 GfxXvminFddTempLow                        : 0\n 0x12e5 (4837) B       00 GfxXvminFddTempHigh                       : 0\n 0x12e6 (4838) B       00 SocXvminFddTempLow                        : 0\n 0x12e7 (4839) B       00 SocXvminFddTempHigh                       : 0\n 0x12e8 (4840) H     0000 GfxXvminFddVolt0                          : 0\n 0x12ea (4842) H     0000 GfxXvminFddVolt1                          : 0\n 0x12ec (4844) H     0000 GfxXvminFddVolt2                          : 0\n 0x12ee (4846) H     0000 SocXvminFddVolt0                          : 0\n 0x12f0 (4848) H     0000 SocXvminFddVolt1                          : 0\n 0x12f2 (4850) H     0000 SocXvminFddVolt2                          : 0\n 0x12f4 (4852) H     0000 GfxXvminDsFddDsm                          : 0\n 0x12f6 (4854) H     0000 GfxXvminDsFddDsm                          : 0\n 0x12f8 (4856) H     0000 GfxXvminDsFddDsm                          : 0\n 0x12fa (4858) H     0000 GfxXvminDsFddDsm                          : 0\n 0x12fc (4860) H     0000 GfxXvminDsFddDsm                          : 0\n 0x12fe (4862) H     0000 GfxXvminDsFddDsm                          : 0\n 0x1300 (4864) H     0000 GfxXvminEdcFddDsm                         : 0\n 0x1302 (4866) H     0000 GfxXvminEdcFddDsm                         : 0\n 0x1304 (4868) H     0000 GfxXvminEdcFddDsm                         : 0\n 0x1306 (4870) H     0000 GfxXvminEdcFddDsm                         : 0\n 0x1308 (4872) H     0000 GfxXvminEdcFddDsm                         : 0\n 0x130a (4874) H     0000 GfxXvminEdcFddDsm                         : 0\n 0x130c (4876) H     0000 SocXvminEdcFddDsm                         : 0\n 0x130e (4878) H     0000 SocXvminEdcFddDsm                         : 0\n 0x1310 (4880) H     0000 SocXvminEdcFddDsm                         : 0\n 0x1312 (4882) H     0000 SocXvminEdcFddDsm                         : 0\n 0x1314 (4884) H     0000 SocXvminEdcFddDsm                         : 0\n 0x1316 (4886) H     0000 SocXvminEdcFddDsm                         : 0\n 0x1318 (4888) I 64009600 Spare                                     : 9830500\n 0x131c (4892) I 00000000 MmHubPadding                              : 0\n 0x1320 (4896) I 00000000 MmHubPadding                              : 0\n 0x1324 (4900) I 00000000 MmHubPadding                              : 0\n 0x1328 (4904) I 00000000 MmHubPadding                              : 0\n 0x132c (4908) I 00000000 MmHubPadding                              : 0\n 0x1330 (4912) I 00000000 MmHubPadding                              : 0\n 0x1334 (4916) I 00000000 MmHubPadding                              : 0\n 0x1338 (4920) I 00000000 MmHubPadding                              : 0\n 0x133c (4924) H     dc00 SocketPowerLimitAc                        : 220\n 0x133e (4926) H     b004 SocketPowerLimitAc                        : 1200\n 0x1340 (4928) H     0000 SocketPowerLimitAc                        : 0\n 0x1342 (4930) H     0000 SocketPowerLimitAc                        : 0\n 0x1344 (4932) H     4a01 VrTdcLimit                                : 330\n 0x1346 (4934) H     5400 VrTdcLimit                                : 84\n 0x1348 (4936) h     0000 TotalIdleBoardPowerM                      : 0\n 0x134a (4938) h     0000 TotalIdleBoardPowerB                      : 0\n 0x134c (4940) h     0000 TotalBoardPowerM                          : 0\n 0x134e (4942) h     0000 TotalBoardPowerB                          : 0\n 0x1350 (4944) H     6e00 TemperatureLimit                          : 110\n 0x1352 (4946) H     6e00 TemperatureLimit                          : 110\n 0x1354 (4948) H     0000 TemperatureLimit                          : 0\n 0x1356 (4950) H     0000 TemperatureLimit                          : 0\n 0x1358 (4952) H     6c00 TemperatureLimit                          : 108\n 0x135a (4954) H     6900 TemperatureLimit                          : 105\n 0x135c (4956) H     6900 TemperatureLimit                          : 105\n 0x135e (4958) H     6900 TemperatureLimit                          : 105\n 0x1360 (4960) H     6900 TemperatureLimit                          : 105\n 0x1362 (4962) H     0000 TemperatureLimit                          : 0\n 0x1364 (4964) H     0000 TemperatureLimit                          : 0\n 0x1366 (4966) H     0000 TemperatureLimit                          : 0\n 0x1368 (4968) H     0000 FanStopTemp                               : 0\n 0x136a (4970) H     3200 FanStopTemp                               : 50\n 0x136c (4972) H     0000 FanStopTemp                               : 0\n 0x136e (4974) H     0000 FanStopTemp                               : 0\n 0x1370 (4976) H     4100 FanStopTemp                               : 65\n 0x1372 (4978) H     4100 FanStopTemp                               : 65\n 0x1374 (4980) H     4100 FanStopTemp                               : 65\n 0x1376 (4982) H     4100 FanStopTemp                               : 65\n 0x1378 (4984) H     4100 FanStopTemp                               : 65\n 0x137a (4986) H     0000 FanStopTemp                               : 0\n 0x137c (4988) H     0000 FanStopTemp                               : 0\n 0x137e (4990) H     0000 FanStopTemp                               : 0\n 0x1380 (4992) H     0000 FanStartTemp                              : 0\n 0x1382 (4994) H     3c00 FanStartTemp                              : 60\n 0x1384 (4996) H     0000 FanStartTemp                              : 0\n 0x1386 (4998) H     0000 FanStartTemp                              : 0\n 0x1388 (5000) H     5000 FanStartTemp                              : 80\n 0x138a (5002) H     5000 FanStartTemp                              : 80\n 0x138c (5004) H     5000 FanStartTemp                              : 80\n 0x138e (5006) H     5000 FanStartTemp                              : 80\n 0x1390 (5008) H     5000 FanStartTemp                              : 80\n 0x1392 (5010) H     0000 FanStartTemp                              : 0\n 0x1394 (5012) H     0000 FanStartTemp                              : 0\n 0x1396 (5014) H     0000 FanStartTemp                              : 0\n 0x1398 (5016) H     0000 FanGain                                   : 0\n 0x139a (5018) H     9001 FanGain                                   : 400\n 0x139c (5020) H     0000 FanGain                                   : 0\n 0x139e (5022) H     0000 FanGain                                   : 0\n 0x13a0 (5024) H     9001 FanGain                                   : 400\n 0x13a2 (5026) H     9001 FanGain                                   : 400\n 0x13a4 (5028) H     9001 FanGain                                   : 400\n 0x13a6 (5030) H     9001 FanGain                                   : 400\n 0x13a8 (5032) H     9001 FanGain                                   : 400\n 0x13aa (5034) H     0000 FanGain                                   : 0\n 0x13ac (5036) H     0000 FanGain                                   : 0\n 0x13ae (5038) H     0000 FanGain                                   : 0\n 0x13b0 (5040) H     1900 FanPwmMin                                 : 25\n 0x13b2 (5042) H     1405 AcousticTargetRpmThreshold                : 1300\n 0x13b4 (5044) H     e40c AcousticLimitRpmThreshold                 : 3300\n 0x13b6 (5046) H     420e FanMaximumRpm                             : 3650\n 0x13b8 (5048) H     a00f MGpuAcousticLimitRpmThreshold             : 4000\n 0x13ba (5050) H     f401 FanTargetGfxclk                           : 500\n 0x13bc (5052) I f2010000 TempInputSelectMask                       : 498\n 0x13c0 (5056) B       01 FanZeroRpmEnable                          : 1\n 0x13c1 (5057) B       02 FanTachEdgePerRev                         : 2\n 0x13c2 (5058) H     0000 FanPadding                                : 0\n 0x13c4 (5060) H     0000 FanTargetTemperature                      : 0\n 0x13c6 (5062) H     5800 FanTargetTemperature                      : 88\n 0x13c8 (5064) H     0000 FanTargetTemperature                      : 0\n 0x13ca (5066) H     0000 FanTargetTemperature                      : 0\n 0x13cc (5068) H     5800 FanTargetTemperature                      : 88\n 0x13ce (5070) H     5a00 FanTargetTemperature                      : 90\n 0x13d0 (5072) H     5a00 FanTargetTemperature                      : 90\n 0x13d2 (5074) H     5a00 FanTargetTemperature                      : 90\n 0x13d4 (5076) H     5a00 FanTargetTemperature                      : 90\n 0x13d6 (5078) H     0000 FanTargetTemperature                      : 0\n 0x13d8 (5080) H     0000 FanTargetTemperature                      : 0\n 0x13da (5082) H     0000 FanTargetTemperature                      : 0\n 0x13dc (5084) h     0000 FuzzyFan_ErrorSetDelta                    : 0\n 0x13de (5086) h     0000 FuzzyFan_ErrorRateSetDelta                : 0\n 0x13e0 (5088) h     0000 FuzzyFan_PwmSetDelta                      : 0\n 0x13e2 (5090) H     0000 FanPadding2                               : 0\n 0x13e4 (5092) H     7300 FwCtfLimit                                : 115\n 0x13e6 (5094) H     7600 FwCtfLimit                                : 118\n 0x13e8 (5096) H     0000 FwCtfLimit                                : 0\n 0x13ea (5098) H     0000 FwCtfLimit                                : 0\n 0x13ec (5100) H     7300 FwCtfLimit                                : 115\n 0x13ee (5102) H     7300 FwCtfLimit                                : 115\n 0x13f0 (5104) H     7300 FwCtfLimit                                : 115\n 0x13f2 (5106) H     7300 FwCtfLimit                                : 115\n 0x13f4 (5108) H     7300 FwCtfLimit                                : 115\n 0x13f6 (5110) H     0000 FwCtfLimit                                : 0\n 0x13f8 (5112) H     0000 FwCtfLimit                                : 0\n 0x13fa (5114) H     0000 FwCtfLimit                                : 0\n 0x13fc (5116) H     0000 IntakeTempEnableRPM                       : 0\n 0x13fe (5118) h     0000 IntakeTempOffsetTemp                      : 0\n 0x1400 (5120) H     0000 IntakeTempReleaseTemp                     : 0\n 0x1402 (5122) H     0000 IntakeTempHighIntakeAcousticLimit         : 0\n 0x1404 (5124) H     0000 IntakeTempAcouticLimitReleaseRate         : 0\n 0x1406 (5126) h     0000 FanAbnormalTempLimitOffset                : 0\n 0x1408 (5128) H     fa00 FanStalledTriggerRpm                      : 250\n 0x140a (5130) H     5500 FanAbnormalTriggerRpmCoeff                : 85\n 0x140c (5132) H     0100 FanSpare                                  : 1\n 0x140e (5134) B       00 FanIntakeSensorSupport                    : 0\n 0x140f (5135) B       00 FanIntakePadding                          : 0\n 0x1410 (5136) I 00000000 FanSpare2                                 : 0\n 0x1414 (5140) I 00000000 FanSpare2                                 : 0\n 0x1418 (5144) I 00000000 FanSpare2                                 : 0\n 0x141c (5148) I 00000000 FanSpare2                                 : 0\n 0x1420 (5152) I 00000000 FanSpare2                                 : 0\n 0x1424 (5156) I 00000000 FanSpare2                                 : 0\n 0x1428 (5160) I 00000000 FanSpare2                                 : 0\n 0x142c (5164) I 00000000 FanSpare2                                 : 0\n 0x1430 (5168) I 00000000 FanSpare2                                 : 0\n 0x1434 (5172) I 00000000 FanSpare2                                 : 0\n 0x1438 (5176) I 00000000 FanSpare2                                 : 0\n 0x143c (5180) I 00000000 FanSpare2                                 : 0\n 0x1440 (5184) I 00000000 ODFeatureCtrlMask                         : 0\n 0x1444 (5188) H     6c00 TemperatureLimit_Hynix                    : 108\n 0x1446 (5190) H     6900 TemperatureLimit_Micron                   : 105\n 0x1448 (5192) H     7300 TemperatureFwCtfLimit_Hynix               : 115\n 0x144a (5194) H     7100 TemperatureFwCtfLimit_Micron              : 113\n 0x144c (5196) H     4a01 PlatformTdcLimit                          : 330\n 0x144e (5198) H     5400 PlatformTdcLimit                          : 84\n 0x1450 (5200) H     dc00 SocketPowerLimitDc                        : 220\n 0x1452 (5202) H     b004 SocketPowerLimitDc                        : 1200\n 0x1454 (5204) H     0000 SocketPowerLimitDc                        : 0\n 0x1456 (5206) H     0000 SocketPowerLimitDc                        : 0\n 0x1458 (5208) H     0000 SocketPowerLimitSmartShift2               : 0\n 0x145a (5210) H     0000 CustomSkuSpare16b                         : 0\n 0x145c (5212) I 00000000 CustomSkuSpare32b                         : 0\n 0x1460 (5216) I 00000000 CustomSkuSpare32b                         : 0\n 0x1464 (5220) I 00000000 CustomSkuSpare32b                         : 0\n 0x1468 (5224) I 00000000 CustomSkuSpare32b                         : 0\n 0x146c (5228) I 00000000 CustomSkuSpare32b                         : 0\n 0x1470 (5232) I 00000000 CustomSkuSpare32b                         : 0\n 0x1474 (5236) I 00000000 CustomSkuSpare32b                         : 0\n 0x1478 (5240) I 00000000 CustomSkuSpare32b                         : 0\n 0x147c (5244) I 00000000 CustomSkuSpare32b                         : 0\n 0x1480 (5248) I 00000000 CustomSkuSpare32b                         : 0\n 0x1484 (5252) I 00000000 MmHubPadding                              : 0\n 0x1488 (5256) I 00000000 MmHubPadding                              : 0\n 0x148c (5260) I 00000000 MmHubPadding                              : 0\n 0x1490 (5264) I 00000000 MmHubPadding                              : 0\n 0x1494 (5268) I 00000000 MmHubPadding                              : 0\n 0x1498 (5272) I 00000000 MmHubPadding                              : 0\n 0x149c (5276) I 00000000 MmHubPadding                              : 0\n 0x14a0 (5280) I 00000000 MmHubPadding                              : 0\n 0x14a4 (5284) I 00000000 Version                                   : 0\n 0x14a8 (5288) B       00 Enabled                                   : 0\n 0x14a9 (5289) B       00 Speed                                     : 0\n 0x14aa (5290) B       00 SlaveAddress                              : 0\n 0x14ab (5291) B       00 ControllerPort                            : 0\n 0x14ac (5292) B       00 ControllerName                            : 0\n 0x14ad (5293) B       00 ThermalThrotter                           : 0\n 0x14ae (5294) B       00 I2cProtocol                               : 0\n 0x14af (5295) B       00 PaddingConfig                             : 0\n 0x14b0 (5296) B       00 Enabled                                   : 0\n 0x14b1 (5297) B       00 Speed                                     : 0\n 0x14b2 (5298) B       00 SlaveAddress                              : 0\n 0x14b3 (5299) B       00 ControllerPort                            : 0\n 0x14b4 (5300) B       00 ControllerName                            : 0\n 0x14b5 (5301) B       00 ThermalThrotter                           : 0\n 0x14b6 (5302) B       00 I2cProtocol                               : 0\n 0x14b7 (5303) B       00 PaddingConfig                             : 0\n 0x14b8 (5304) B       00 Enabled                                   : 0\n 0x14b9 (5305) B       00 Speed                                     : 0\n 0x14ba (5306) B       00 SlaveAddress                              : 0\n 0x14bb (5307) B       00 ControllerPort                            : 0\n 0x14bc (5308) B       00 ControllerName                            : 0\n 0x14bd (5309) B       00 ThermalThrotter                           : 0\n 0x14be (5310) B       00 I2cProtocol                               : 0\n 0x14bf (5311) B       00 PaddingConfig                             : 0\n 0x14c0 (5312) B       00 Enabled                                   : 0\n 0x14c1 (5313) B       00 Speed                                     : 0\n 0x14c2 (5314) B       00 SlaveAddress                              : 0\n 0x14c3 (5315) B       00 ControllerPort                            : 0\n 0x14c4 (5316) B       00 ControllerName                            : 0\n 0x14c5 (5317) B       00 ThermalThrotter                           : 0\n 0x14c6 (5318) B       00 I2cProtocol                               : 0\n 0x14c7 (5319) B       00 PaddingConfig                             : 0\n 0x14c8 (5320) B       00 Enabled                                   : 0\n 0x14c9 (5321) B       00 Speed                                     : 0\n 0x14ca (5322) B       00 SlaveAddress                              : 0\n 0x14cb (5323) B       00 ControllerPort                            : 0\n 0x14cc (5324) B       00 ControllerName                            : 0\n 0x14cd (5325) B       00 ThermalThrotter                           : 0\n 0x14ce (5326) B       00 I2cProtocol                               : 0\n 0x14cf (5327) B       00 PaddingConfig                             : 0\n 0x14d0 (5328) B       00 Enabled                                   : 0\n 0x14d1 (5329) B       00 Speed                                     : 0\n 0x14d2 (5330) B       00 SlaveAddress                              : 0\n 0x14d3 (5331) B       00 ControllerPort                            : 0\n 0x14d4 (5332) B       00 ControllerName                            : 0\n 0x14d5 (5333) B       00 ThermalThrotter                           : 0\n 0x14d6 (5334) B       00 I2cProtocol                               : 0\n 0x14d7 (5335) B       00 PaddingConfig                             : 0\n 0x14d8 (5336) B       00 Enabled                                   : 0\n 0x14d9 (5337) B       00 Speed                                     : 0\n 0x14da (5338) B       00 SlaveAddress                              : 0\n 0x14db (5339) B       00 ControllerPort                            : 0\n 0x14dc (5340) B       00 ControllerName                            : 0\n 0x14dd (5341) B       00 ThermalThrotter                           : 0\n 0x14de (5342) B       00 I2cProtocol                               : 0\n 0x14df (5343) B       00 PaddingConfig                             : 0\n 0x14e0 (5344) B       00 Enabled                                   : 0\n 0x14e1 (5345) B       00 Speed                                     : 0\n 0x14e2 (5346) B       00 SlaveAddress                              : 0\n 0x14e3 (5347) B       00 ControllerPort                            : 0\n 0x14e4 (5348) B       00 ControllerName                            : 0\n 0x14e5 (5349) B       00 ThermalThrotter                           : 0\n 0x14e6 (5350) B       00 I2cProtocol                               : 0\n 0x14e7 (5351) B       00 PaddingConfig                             : 0\n 0x14e8 (5352) B       00 SlaveAddrMapping                          : 0\n 0x14e9 (5353) B       00 SlaveAddrMapping                          : 0\n 0x14ea (5354) B       00 SlaveAddrMapping                          : 0\n 0x14eb (5355) B       00 SlaveAddrMapping                          : 0\n 0x14ec (5356) B       00 VrPsiSupport                              : 0\n 0x14ed (5357) B       00 VrPsiSupport                              : 0\n 0x14ee (5358) B       00 VrPsiSupport                              : 0\n 0x14ef (5359) B       00 VrPsiSupport                              : 0\n 0x14f0 (5360) I 00000000 Svi3SvcSpeed                              : 0\n 0x14f4 (5364) B       00 EnablePsi6                                : 0\n 0x14f5 (5365) B       00 EnablePsi6                                : 0\n 0x14f6 (5366) B       00 EnablePsi6                                : 0\n 0x14f7 (5367) B       00 EnablePsi6                                : 0\n 0x14f8 (5368) B       00 SlewRateConditions                        : 0\n 0x14f9 (5369) B       00 LoadLineAdjust                            : 0\n 0x14fa (5370) B       00 VoutOffset                                : 0\n 0x14fb (5371) B       00 VidMax                                    : 0\n 0x14fc (5372) B       00 VidMin                                    : 0\n 0x14fd (5373) B       00 TenBitTelEn                               : 0\n 0x14fe (5374) B       00 SixteenBitTelEn                           : 0\n 0x14ff (5375) B       00 OcpThresh                                 : 0\n 0x1500 (5376) B       00 OcpWarnThresh                             : 0\n 0x1501 (5377) B       00 OcpSettings                               : 0\n 0x1502 (5378) B       00 VrhotThresh                               : 0\n 0x1503 (5379) B       00 OtpThresh                                 : 0\n 0x1504 (5380) B       00 UvpOvpDeltaRef                            : 0\n 0x1505 (5381) B       00 PhaseShed                                 : 0\n 0x1506 (5382) B       00 Padding                                   : 0\n 0x1507 (5383) B       00 Padding                                   : 0\n 0x1508 (5384) B       00 Padding                                   : 0\n 0x1509 (5385) B       00 Padding                                   : 0\n 0x150a (5386) B       00 Padding                                   : 0\n 0x150b (5387) B       00 Padding                                   : 0\n 0x150c (5388) B       00 Padding                                   : 0\n 0x150d (5389) B       00 Padding                                   : 0\n 0x150e (5390) B       00 Padding                                   : 0\n 0x150f (5391) B       00 Padding                                   : 0\n 0x1510 (5392) I 00000000 SettingOverrideMask                       : 0\n 0x1514 (5396) B       00 SlewRateConditions                        : 0\n 0x1515 (5397) B       00 LoadLineAdjust                            : 0\n 0x1516 (5398) B       00 VoutOffset                                : 0\n 0x1517 (5399) B       00 VidMax                                    : 0\n 0x1518 (5400) B       00 VidMin                                    : 0\n 0x1519 (5401) B       00 TenBitTelEn                               : 0\n 0x151a (5402) B       00 SixteenBitTelEn                           : 0\n 0x151b (5403) B       00 OcpThresh                                 : 0\n 0x151c (5404) B       00 OcpWarnThresh                             : 0\n 0x151d (5405) B       00 OcpSettings                               : 0\n 0x151e (5406) B       00 VrhotThresh                               : 0\n 0x151f (5407) B       00 OtpThresh                                 : 0\n 0x1520 (5408) B       00 UvpOvpDeltaRef                            : 0\n 0x1521 (5409) B       00 PhaseShed                                 : 0\n 0x1522 (5410) B       00 Padding                                   : 0\n 0x1523 (5411) B       00 Padding                                   : 0\n 0x1524 (5412) B       00 Padding                                   : 0\n 0x1525 (5413) B       00 Padding                                   : 0\n 0x1526 (5414) B       00 Padding                                   : 0\n 0x1527 (5415) B       00 Padding                                   : 0\n 0x1528 (5416) B       00 Padding                                   : 0\n 0x1529 (5417) B       00 Padding                                   : 0\n 0x152a (5418) B       00 Padding                                   : 0\n 0x152b (5419) B       00 Padding                                   : 0\n 0x152c (5420) I 00000000 SettingOverrideMask                       : 0\n 0x1530 (5424) B       00 SlewRateConditions                        : 0\n 0x1531 (5425) B       00 LoadLineAdjust                            : 0\n 0x1532 (5426) B       00 VoutOffset                                : 0\n 0x1533 (5427) B       00 VidMax                                    : 0\n 0x1534 (5428) B       00 VidMin                                    : 0\n 0x1535 (5429) B       00 TenBitTelEn                               : 0\n 0x1536 (5430) B       00 SixteenBitTelEn                           : 0\n 0x1537 (5431) B       00 OcpThresh                                 : 0\n 0x1538 (5432) B       00 OcpWarnThresh                             : 0\n 0x1539 (5433) B       00 OcpSettings                               : 0\n 0x153a (5434) B       00 VrhotThresh                               : 0\n 0x153b (5435) B       00 OtpThresh                                 : 0\n 0x153c (5436) B       00 UvpOvpDeltaRef                            : 0\n 0x153d (5437) B       00 PhaseShed                                 : 0\n 0x153e (5438) B       00 Padding                                   : 0\n 0x153f (5439) B       00 Padding                                   : 0\n 0x1540 (5440) B       00 Padding                                   : 0\n 0x1541 (5441) B       00 Padding                                   : 0\n 0x1542 (5442) B       00 Padding                                   : 0\n 0x1543 (5443) B       00 Padding                                   : 0\n 0x1544 (5444) B       00 Padding                                   : 0\n 0x1545 (5445) B       00 Padding                                   : 0\n 0x1546 (5446) B       00 Padding                                   : 0\n 0x1547 (5447) B       00 Padding                                   : 0\n 0x1548 (5448) I 00000000 SettingOverrideMask                       : 0\n 0x154c (5452) B       00 SlewRateConditions                        : 0\n 0x154d (5453) B       00 LoadLineAdjust                            : 0\n 0x154e (5454) B       00 VoutOffset                                : 0\n 0x154f (5455) B       00 VidMax                                    : 0\n 0x1550 (5456) B       00 VidMin                                    : 0\n 0x1551 (5457) B       00 TenBitTelEn                               : 0\n 0x1552 (5458) B       00 SixteenBitTelEn                           : 0\n 0x1553 (5459) B       00 OcpThresh                                 : 0\n 0x1554 (5460) B       00 OcpWarnThresh                             : 0\n 0x1555 (5461) B       00 OcpSettings                               : 0\n 0x1556 (5462) B       00 VrhotThresh                               : 0\n 0x1557 (5463) B       00 OtpThresh                                 : 0\n 0x1558 (5464) B       00 UvpOvpDeltaRef                            : 0\n 0x1559 (5465) B       00 PhaseShed                                 : 0\n 0x155a (5466) B       00 Padding                                   : 0\n 0x155b (5467) B       00 Padding                                   : 0\n 0x155c (5468) B       00 Padding                                   : 0\n 0x155d (5469) B       00 Padding                                   : 0\n 0x155e (5470) B       00 Padding                                   : 0\n 0x155f (5471) B       00 Padding                                   : 0\n 0x1560 (5472) B       00 Padding                                   : 0\n 0x1561 (5473) B       00 Padding                                   : 0\n 0x1562 (5474) B       00 Padding                                   : 0\n 0x1563 (5475) B       00 Padding                                   : 0\n 0x1564 (5476) I 00000000 SettingOverrideMask                       : 0\n 0x1568 (5480) B       00 LedOffGpio                                : 0\n 0x1569 (5481) B       00 FanOffGpio                                : 0\n 0x156a (5482) B       00 GfxVrPowerStageOffGpio                    : 0\n 0x156b (5483) B       00 AcDcGpio                                  : 0\n 0x156c (5484) B       00 AcDcPolarity                              : 0\n 0x156d (5485) B       00 VR0HotGpio                                : 0\n 0x156e (5486) B       00 VR0HotPolarity                            : 0\n 0x156f (5487) B       00 GthrGpio                                  : 0\n 0x1570 (5488) B       00 GthrPolarity                              : 0\n 0x1571 (5489) B       00 LedPin0                                   : 0\n 0x1572 (5490) B       00 LedPin1                                   : 0\n 0x1573 (5491) B       00 LedPin2                                   : 0\n 0x1574 (5492) B       00 LedEnableMask                             : 0\n 0x1575 (5493) B       00 LedPcie                                   : 0\n 0x1576 (5494) B       00 LedError                                  : 0\n 0x1577 (5495) B       00 PaddingLed                                : 0\n 0x1578 (5496) B       00 UclkTrainingModeSpreadPercent             : 0\n 0x1579 (5497) B       00 UclkSpreadPadding                         : 0\n 0x157a (5498) H     0000 UclkSpreadFreq                            : 0\n 0x157c (5500) B       00 UclkSpreadPercent                         : 0\n 0x157d (5501) B       00 UclkSpreadPercent                         : 0\n 0x157e (5502) B       00 UclkSpreadPercent                         : 0\n 0x157f (5503) B       00 UclkSpreadPercent                         : 0\n 0x1580 (5504) B       00 UclkSpreadPercent                         : 0\n 0x1581 (5505) B       00 UclkSpreadPercent                         : 0\n 0x1582 (5506) B       00 UclkSpreadPercent                         : 0\n 0x1583 (5507) B       00 UclkSpreadPercent                         : 0\n 0x1584 (5508) B       00 UclkSpreadPercent                         : 0\n 0x1585 (5509) B       00 UclkSpreadPercent                         : 0\n 0x1586 (5510) B       00 UclkSpreadPercent                         : 0\n 0x1587 (5511) B       00 UclkSpreadPercent                         : 0\n 0x1588 (5512) B       00 UclkSpreadPercent                         : 0\n 0x1589 (5513) B       00 UclkSpreadPercent                         : 0\n 0x158a (5514) B       00 UclkSpreadPercent                         : 0\n 0x158b (5515) B       00 UclkSpreadPercent                         : 0\n 0x158c (5516) B       00 GfxclkSpreadEnable                        : 0\n 0x158d (5517) B       00 FclkSpreadPercent                         : 0\n 0x158e (5518) H     0000 FclkSpreadFreq                            : 0\n 0x1590 (5520) B       00 DramWidth                                 : 0\n 0x1591 (5521) B       00 PaddingMem1                               : 0\n 0x1592 (5522) B       00 PaddingMem1                               : 0\n 0x1593 (5523) B       00 PaddingMem1                               : 0\n 0x1594 (5524) B       00 PaddingMem1                               : 0\n 0x1595 (5525) B       00 PaddingMem1                               : 0\n 0x1596 (5526) B       00 PaddingMem1                               : 0\n 0x1597 (5527) B       00 PaddingMem1                               : 0\n 0x1598 (5528) B       00 HsrEnabled                                : 0\n 0x1599 (5529) B       00 VddqOffEnabled                            : 0\n 0x159a (5530) B       00 PaddingUmcFlags                           : 0\n 0x159b (5531) B       00 PaddingUmcFlags                           : 0\n 0x159c (5532) I 00000000 Paddign1                                  : 0\n 0x15a0 (5536) I 00000000 BacoEntryDelay                            : 0\n 0x15a4 (5540) B       00 FuseWritePowerMuxPresent                  : 0\n 0x15a5 (5541) B       00 FuseWritePadding                          : 0\n 0x15a6 (5542) B       00 FuseWritePadding                          : 0\n 0x15a7 (5543) B       00 FuseWritePadding                          : 0\n 0x15a8 (5544) I 00000000 LoadlineGfx                               : 0\n 0x15ac (5548) I 00000000 LoadlineSoc                               : 0\n 0x15b0 (5552) I 00000000 GfxEdcLimit                               : 0\n 0x15b4 (5556) I 00000000 SocEdcLimit                               : 0\n 0x15b8 (5560) I 00000000 RestBoardPower                            : 0\n 0x15bc (5564) I 00000000 ConnectorsImpedance                       : 0\n 0x15c0 (5568) B       00 EpcsSens0                                 : 0\n 0x15c1 (5569) B       00 EpcsSens1                                 : 0\n 0x15c2 (5570) B       00 PaddingEpcs                               : 0\n 0x15c3 (5571) B       00 PaddingEpcs                               : 0\n 0x15c4 (5572) I 00000000 BoardSpare                                : 0\n 0x15c8 (5576) I 00000000 BoardSpare                                : 0\n 0x15cc (5580) I 00000000 BoardSpare                                : 0\n 0x15d0 (5584) I 00000000 BoardSpare                                : 0\n 0x15d4 (5588) I 00000000 BoardSpare                                : 0\n 0x15d8 (5592) I 00000000 BoardSpare                                : 0\n 0x15dc (5596) I 00000000 BoardSpare                                : 0\n 0x15e0 (5600) I 00000000 BoardSpare                                : 0\n 0x15e4 (5604) I 00000000 BoardSpare                                : 0\n 0x15e8 (5608) I 00000000 BoardSpare                                : 0\n 0x15ec (5612) I 00000000 BoardSpare                                : 0\n 0x15f0 (5616) I 00000000 BoardSpare                                : 0\n 0x15f4 (5620) I 00000000 BoardSpare                                : 0\n 0x15f8 (5624) I 00000000 BoardSpare                                : 0\n 0x15fc (5628) I 00000000 BoardSpare                                : 0\n 0x1600 (5632) I 00000000 BoardSpare                                : 0\n 0x1604 (5636) I 00000000 BoardSpare                                : 0\n 0x1608 (5640) I 00000000 BoardSpare                                : 0\n 0x160c (5644) I 00000000 BoardSpare                                : 0\n 0x1610 (5648) I 00000000 BoardSpare                                : 0\n 0x1614 (5652) I 00000000 BoardSpare                                : 0\n 0x1618 (5656) I 00000000 BoardSpare                                : 0\n 0x161c (5660) I 00000000 BoardSpare                                : 0\n 0x1620 (5664) I 00000000 BoardSpare                                : 0\n 0x1624 (5668) I 00000000 BoardSpare                                : 0\n 0x1628 (5672) I 00000000 BoardSpare                                : 0\n 0x162c (5676) I 00000000 BoardSpare                                : 0\n 0x1630 (5680) I 00000000 BoardSpare                                : 0\n 0x1634 (5684) I 00000000 BoardSpare                                : 0\n 0x1638 (5688) I 00000000 BoardSpare                                : 0\n 0x163c (5692) I 00000000 BoardSpare                                : 0\n 0x1640 (5696) I 00000000 BoardSpare                                : 0\n 0x1644 (5700) I 00000000 BoardSpare                                : 0\n 0x1648 (5704) I 00000000 BoardSpare                                : 0\n 0x164c (5708) I 00000000 BoardSpare                                : 0\n 0x1650 (5712) I 00000000 BoardSpare                                : 0\n 0x1654 (5716) I 00000000 BoardSpare                                : 0\n 0x1658 (5720) I 00000000 BoardSpare                                : 0\n 0x165c (5724) I 00000000 BoardSpare                                : 0\n 0x1660 (5728) I 00000000 BoardSpare                                : 0\n 0x1664 (5732) I 00000000 BoardSpare                                : 0\n 0x1668 (5736) I 00000000 BoardSpare                                : 0\n 0x166c (5740) I 00000000 BoardSpare                                : 0\n 0x1670 (5744) I 00000000 BoardSpare                                : 0\n 0x1674 (5748) I 00000000 BoardSpare                                : 0\n 0x1678 (5752) I 00000000 BoardSpare                                : 0\n 0x167c (5756) I 00000000 BoardSpare                                : 0\n 0x1680 (5760) I 00000000 BoardSpare                                : 0\n 0x1684 (5764) I 00000000 BoardSpare                                : 0\n 0x1688 (5768) I 00000000 BoardSpare                                : 0\n 0x168c (5772) I 00000000 BoardSpare                                : 0\n 0x1690 (5776) I 00000000 BoardSpare                                : 0\n 0x1694 (5780) I 00000000 MmHubPadding                              : 0\n 0x1698 (5784) I 00000000 MmHubPadding                              : 0\n 0x169c (5788) I 00000000 MmHubPadding                              : 0\n 0x16a0 (5792) I 00000000 MmHubPadding                              : 0\n 0x16a4 (5796) I 00000000 MmHubPadding                              : 0\n 0x16a8 (5800) I 00000000 MmHubPadding                              : 0\n 0x16ac (5804) I 00000000 MmHubPadding                              : 0\n 0x16b0 (5808) I 00000000 MmHubPadding                              : 0\n"
  },
  {
    "path": "test/test.sh",
    "content": "#!/bin/bash\n\nTPU_VBIOS_URL=https://www.techpowerup.com/vgabios\n# RX 480 8 GB\nROM_RX480=184327/AMD.RX480.8192.160603.rom\n# RX Vega 64 8 GB\nROM_VEGA64=194441/AMD.RXVega64.8176.170719.rom\n# RX Vega Frontier 16 GB\nROM_VEGAFRONTIER=224185/AMD.RXVegaFrontier.16384.170628.rom\n# Radeon VII 16 GB\nROM_RADEON7=208116/AMD.RadeonVII.16384.190116.rom\n# RX 5700 XT 8 GB\nROM_RX5700=212120/AMD.RX5700XT.8192.190616.rom\n# RX 6800 16 GB Reference\nROM_RX6800=226802/AMD.RX6800.16384.201007.rom\n# RX 6900 16 GB Reference\nROM_RX6900=230799/AMD.RX6900XT.16384.201104.rom\n# RX 7900 XTX 24GB Reference\nROM_RX7900=262809/AMD.RX7900XTX.24576.230323.rom\n# MI100\nROM_MI100=MI100_000.000.000.000.016113_113-D3431401-100.rom\n# RX 9070 PowerColor Reaper\nROM_RX9070=274452/Powercolor.RX9070.16384.241204_1.rom\n\n# Fetch ROMs not available at TechPowerUp from these links:\nROM_LINKSs=\"\nhttps://github.com/sibradzic/upp/files/15254133/arcturus_vbios.zip\n\"\n\n# ROMs to be tested:\nTEST_ROMS=\"${ROM_RX480} ${ROM_VEGA64} ${ROM_VEGAFRONTIER}\n           ${ROM_RADEON7} ${ROM_RX5700} ${ROM_RX6900} ${ROM_RX7900} ${ROM_RX9070}\n           ${ROM_MI100}\"\nTEST_ROOT=${PWD}\nROM_DIR=${PWD}/ROMs\nTMP_DIR=${PWD}/tmp\n\n[ ! -d ${ROM_DIR} ] && mkdir ${ROM_DIR}\n[ ! -d ${TMP_DIR} ] && mkdir ${TMP_DIR}\n\npushd ../src\n\n# Fetch non TehcPowerUp ROMs\nfor VBIOS in ${ROM_LINKSs}; do\n  if [ ! -r ${ROM_DIR}/${VBIOS##*/} ]; then\n    wget -P ${ROM_DIR} ${VBIOS}\n    if [[ \"${VBIOS##*.}\" == \"zip\" ]]; then\n      unzip ${ROM_DIR}/${VBIOS##*/} -d ${ROM_DIR}\n    fi\n  fi\ndone\n\n# Fetch TehcPowerUp ROMs and test all ROMs\nfor VBIOS in ${TEST_ROMS}; do\n  if [ ! -r ${ROM_DIR}/${VBIOS#*/} ]; then\n    wget -P ${ROM_DIR} ${TPU_VBIOS_URL}/${VBIOS}\n  fi\n  python3 -m upp.upp -p ${TMP_DIR}/${VBIOS#*/}.pp_table extract -r ${ROM_DIR}/${VBIOS#*/}\n  python3 -m upp.upp -p ${TMP_DIR}/${VBIOS#*/}.pp_table dump > ${TMP_DIR}/${VBIOS#*/}.dump\n  python3 -m upp.upp -p ${TMP_DIR}/${VBIOS#*/}.pp_table dump -r > ${TMP_DIR}/${VBIOS#*/}.rawdump\n  diff -s ${TEST_ROOT}/${VBIOS#*/}.dump ${TMP_DIR}/${VBIOS#*/}.dump\n  if [ $? -ne \"0\" ]; then\n    echo \"ERROR in ${TMP_DIR}/${VBIOS#*/}.dump:\"\n    diff -u ${TEST_ROOT}/${VBIOS#*/}.dump ${TMP_DIR}/${VBIOS#*/}.dump\n    printf \"\\033[1m${VBIOS#*/} dump check \\033[1;31mERROR\\033[0m\\n\"\n    exit 2\n  else\n    printf \"\\033[1m${VBIOS#*/} dump check \\033[1;32mOK\\033[0m\\n\\n\"\n  fi\n  diff -s ${TEST_ROOT}/${VBIOS#*/}.rawdump ${TMP_DIR}/${VBIOS#*/}.rawdump\n  if [ $? -ne \"0\" ]; then\n    echo \"ERROR in ${TMP_DIR}/${VBIOS#*/}.rawdump:\"\n    diff -u ${TEST_ROOT}/${VBIOS#*/}.rawdump ${TMP_DIR}/${VBIOS#*/}.rawdump\n    printf \"\\033[1m${VBIOS#*/} raw dump check \\033[1;31mERROR\\033[0m\\n\"\n    exit 2\n  else\n    printf \"\\033[1m${VBIOS#*/} raw dump check \\033[1;32mOK\\033[0m\\n\\n\"\n  fi\ndone\n\ncp ${TMP_DIR}/${ROM_RX5700#*/}.pp_table ${TMP_DIR}/${ROM_RX5700#*/}.conf.pp_table\n\n# Value write test\npython3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.pp_table set --write \\\n  smc_pptable/SocketPowerLimitAc/0=110        \\\n  smc_pptable/SocketPowerLimitDc/0=110        \\\n  smc_pptable/FanStartTemp=100                \\\n  smc_pptable/MinVoltageGfx=2800              \\\n  smc_pptable/MaxVoltageGfx=3900              \\\n  smc_pptable/MinVoltageSoc=2800              \\\n  smc_pptable/MaxVoltageSoc=3800              \\\n  smc_pptable/qStaticVoltageOffset/0/c=-0.03  \\\n  smc_pptable/UlvVoltageOffsetSoc=0           \\\n  smc_pptable/UlvVoltageOffsetGfx=0           \\\n  smc_pptable/FreqTableGfx/1=1650             \\\n  smc_pptable/MemMvddVoltage/0=4400           \\\n  smc_pptable/MemVddciVoltage/0=2600          \\\n  smc_pptable/MemMvddVoltage/1=4600           \\\n  smc_pptable/MemVddciVoltage/1=3200          \\\n  smc_pptable/MemMvddVoltage/2=4800           \\\n  smc_pptable/MemVddciVoltage/2=3200          \\\n  smc_pptable/MemMvddVoltage/3=5000           \\\n  smc_pptable/MemVddciVoltage/3=3200          \\\n  smc_pptable/FreqTableUclk/3=750\n\npython3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.pp_table get \\\n  smc_pptable/SocketPowerLimitAc/0      \\\n  smc_pptable/SocketPowerLimitDc/0      \\\n  smc_pptable/FanStartTemp              \\\n  smc_pptable/MinVoltageGfx             \\\n  smc_pptable/MaxVoltageGfx             \\\n  smc_pptable/MinVoltageSoc             \\\n  smc_pptable/MaxVoltageSoc             \\\n  smc_pptable/qStaticVoltageOffset/0/c  \\\n  smc_pptable/UlvVoltageOffsetSoc       \\\n  smc_pptable/UlvVoltageOffsetGfx       \\\n  smc_pptable/FreqTableGfx/1            \\\n  smc_pptable/MemMvddVoltage/0          \\\n  smc_pptable/MemVddciVoltage/0         \\\n  smc_pptable/MemMvddVoltage/1          \\\n  smc_pptable/MemVddciVoltage/1         \\\n  smc_pptable/MemMvddVoltage/2          \\\n  smc_pptable/MemVddciVoltage/2         \\\n  smc_pptable/MemMvddVoltage/3          \\\n  smc_pptable/MemVddciVoltage/3         \\\n  smc_pptable/FreqTableUclk/3           \\\n  >  ${TMP_DIR}/${ROM_RX5700#*/}.check\n\ndiff -s ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check\nif [ $? -ne \"0\" ]; then\n  echo \"ERROR in ${TMP_DIR}/${ROM_RX5700#*/}.check:\"\n  diff -u ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check\n  printf \"\\033[1m${ROM_RX5700#*/} value write check \\033[1;31mERROR\\033[0m\\n\"\n  exit 2\nelse\n  printf \"\\033[1m${ROM_RX5700#*/} value write check \\033[1;32mOK\\033[0m\\n\\n\"\nfi\n\n# Value write from .conf test\npython3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.conf.pp_table set \\\n  --from-conf=${TEST_ROOT}/${ROM_RX5700#*/}.conf --write\n\npython3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.conf.pp_table get \\\n  smc_pptable/SocketPowerLimitAc/0      \\\n  smc_pptable/SocketPowerLimitDc/0      \\\n  smc_pptable/FanStartTemp              \\\n  smc_pptable/MinVoltageGfx             \\\n  smc_pptable/MaxVoltageGfx             \\\n  smc_pptable/MinVoltageSoc             \\\n  smc_pptable/MaxVoltageSoc             \\\n  smc_pptable/qStaticVoltageOffset/0/c  \\\n  smc_pptable/UlvVoltageOffsetSoc       \\\n  smc_pptable/UlvVoltageOffsetGfx       \\\n  smc_pptable/FreqTableGfx/1            \\\n  smc_pptable/MemMvddVoltage/0          \\\n  smc_pptable/MemVddciVoltage/0         \\\n  smc_pptable/MemMvddVoltage/1          \\\n  smc_pptable/MemVddciVoltage/1         \\\n  smc_pptable/MemMvddVoltage/2          \\\n  smc_pptable/MemVddciVoltage/2         \\\n  smc_pptable/MemMvddVoltage/3          \\\n  smc_pptable/MemVddciVoltage/3         \\\n  smc_pptable/FreqTableUclk/3           \\\n  >  ${TMP_DIR}/${ROM_RX5700#*/}.conf.check\n\ndiff -s ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check\nif [ $? -ne \"0\" ]; then\n  echo \"ERROR in ${TMP_DIR}/${ROM_RX5700#*/}.check:\"\n  diff -u ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check\n  printf \"\\033[1m${ROM_RX5700#*/} value write from conf check \\033[1;31mERROR\\033[0m\\n\"\n  exit 2\nelse\n  printf \"\\033[1m${ROM_RX5700#*/} value write from conf check \\033[1;32mOK\\033[0m\\n\\n\"\nfi\n"
  },
  {
    "path": "upliftpowerplay@.service",
    "content": "[Unit]\nDescription=Uplift Power Play\nBefore=amdgpu-clocks.service\nWants=modprobe@amdgpu.service\n\n[Service]\nType=oneshot\nExecStartPre=/usr/bin/bash -c \"echo \"profile_peak\" > /sys/class/drm/%i/device/power_dpm_force_performance_level\"\nExecStart=/usr/bin/upp --pp-file=/sys/class/drm/%i/device/pp_table set --from-conf=/etc/upliftpowerplay/%i.conf --write\nExecStopPost=/usr/bin/bash -c \"echo \"auto\" > /sys/class/drm/%i/device/power_dpm_force_performance_level\"\n\n[Install]\nWantedBy=multi-user.target\n"
  }
]