Repository: sibradzic/upp
Branch: master
Commit: 3db7f1491021
Files: 41
Total size: 1.1 MB
Directory structure:
gitextract_265cjues/
├── .gitignore
├── LICENSE
├── README.md
├── setup.py
├── src/
│ └── upp/
│ ├── __init__.py
│ ├── atom_gen/
│ │ ├── README.md
│ │ ├── __init__.py
│ │ ├── atombios.py
│ │ ├── pptable_v1_0.py
│ │ ├── smu_v11_0_7_navi20.py
│ │ ├── smu_v11_0_arcturus.py
│ │ ├── smu_v11_0_navi10.py
│ │ ├── smu_v13_0_7_navi30.py
│ │ ├── smu_v14_0_2_navi40.py
│ │ ├── vega10_pptable.py
│ │ └── vega20_pptable.py
│ ├── decode.py
│ └── upp.py
├── test/
│ ├── AMD.RX480.8192.160603.rom.dump
│ ├── AMD.RX480.8192.160603.rom.rawdump
│ ├── AMD.RX5700XT.8192.190616.rom.check
│ ├── AMD.RX5700XT.8192.190616.rom.conf
│ ├── AMD.RX5700XT.8192.190616.rom.dump
│ ├── AMD.RX5700XT.8192.190616.rom.rawdump
│ ├── AMD.RX6900XT.16384.201104.rom.dump
│ ├── AMD.RX6900XT.16384.201104.rom.rawdump
│ ├── AMD.RX7900XTX.24576.230323.rom.dump
│ ├── AMD.RX7900XTX.24576.230323.rom.rawdump
│ ├── AMD.RXVega64.8176.170719.rom.dump
│ ├── AMD.RXVega64.8176.170719.rom.rawdump
│ ├── AMD.RXVegaFrontier.16384.170628.rom.dump
│ ├── AMD.RXVegaFrontier.16384.170628.rom.rawdump
│ ├── AMD.RadeonVII.16384.190116.rom.dump
│ ├── AMD.RadeonVII.16384.190116.rom.rawdump
│ ├── MI100_000.000.000.000.016113_113-D3431401-100.rom.dump
│ ├── MI100_000.000.000.000.016113_113-D3431401-100.rom.rawdump
│ ├── Powercolor.RX9070.16384.241204_1.rom.dump
│ ├── Powercolor.RX9070.16384.241204_1.rom.rawdump
│ ├── navi23.mpt
│ └── test.sh
└── upliftpowerplay@.service
================================================
FILE CONTENTS
================================================
================================================
FILE: .gitignore
================================================
test/ROMs/
test/tmp/
# Byte-compiled / optimized / DLL files
__pycache__/
*.py[cod]
*$py.class
# C extensions
*.so
# Distribution / packaging
.Python
build/
develop-eggs/
dist/
downloads/
eggs/
.eggs/
lib/
lib64/
parts/
sdist/
var/
wheels/
*.egg-info/
.installed.cfg
*.egg
MANIFEST
# PyInstaller
# Usually these files are written by a python script from a template
# before PyInstaller builds the exe, so as to inject date/other infos into it.
*.manifest
*.spec
# Installer logs
pip-log.txt
pip-delete-this-directory.txt
# Unit test / coverage reports
htmlcov/
.tox/
.coverage
.coverage.*
.cache
nosetests.xml
coverage.xml
*.cover
.hypothesis/
.pytest_cache/
# Translations
*.mo
*.pot
# Django stuff:
*.log
local_settings.py
db.sqlite3
# Flask stuff:
instance/
.webassets-cache
# Scrapy stuff:
.scrapy
# Sphinx documentation
docs/_build/
# PyBuilder
target/
# Jupyter Notebook
.ipynb_checkpoints
# pyenv
.python-version
# celery beat schedule file
celerybeat-schedule
# SageMath parsed files
*.sage.py
# Environments
.env
.venv
env/
venv/
ENV/
env.bak/
venv.bak/
# Spyder project settings
.spyderproject
.spyproject
# Rope project settings
.ropeproject
# mkdocs documentation
/site
# mypy
.mypy_cache/
================================================
FILE: LICENSE
================================================
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GNU General Public License, you may choose any version ever published
by the Free Software Foundation.
If the Program specifies that a proxy can decide which future
versions of the GNU General Public License can be used, that proxy's
public statement of acceptance of a version permanently authorizes you
to choose that version for the Program.
Later license versions may give you additional or different
permissions. However, no additional obligations are imposed on any
author or copyright holder as a result of your choosing to follow a
later version.
15. Disclaimer of Warranty.
THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
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IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
16. Limitation of Liability.
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THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
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PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES.
17. Interpretation of Sections 15 and 16.
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above cannot be given local legal effect according to their terms,
reviewing courts shall apply local law that most closely approximates
an absolute waiver of all civil liability in connection with the
Program, unless a warranty or assumption of liability accompanies a
copy of the Program in return for a fee.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
state the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
Copyright (C)
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see .
Also add information on how to contact you by electronic and paper mail.
If the program does terminal interaction, make it output a short
notice like this when it starts in an interactive mode:
Copyright (C)
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
.
================================================
FILE: README.md
================================================
## UPP
UPP: Uplift Power Play
A tool for parsing, dumping and modifying data in Radeon PowerPlay tables
### Introduction
UPP is able to parse and modify binary data structures of PowerPlay tables
commonly found on certain AMD Radeon GPUs. Drivers on recent AMD GPUs
allow PowerPlay tables to be dynamically modified on runtime, which may be
known as "soft" PowerPlay table. On Linux, the PowerPlay table is by default
found at: `/sys/class/drm/card0/device/pp_table`.
This tool does very minimal interpretation of actual PowerPlay table values.
By design, it is mostly up to the user to do such thing.
Alternatively, one can use this tool to get PowerPlay data by:
* Extracting PowerPlay table from Video ROM image (see extract command)
* Importing "Soft PowerPlay" table from Windows registry, directly from
offline Windows/System32/config/SYSTEM file on disk, so it would work
from Linux distro that has access to mounted Windows partition
(path to SYSTEM registry file is specified with `--from-registry` option)
* Importing "Soft PowerPlay" table from "More Powe Tool" MPT file
(path to MPT file is specified with `--from-mpt option`)
This tool currently supports parsing and modifying PowerPlay tables found
on the following AMD GPU families:
* Polaris
* Vega
* Radeon VII
* Navi 10
* Arcturus (MI100)
* Navi 12 (PRO V520)
* Navi 14
* Navi 21 (Sienna Cichlid)
* Navi 22 (Navy Flounder)
* Navi 23 (Dimgrey Cavefish)
* Navi 3x
* Navi 4x
Notes:
* iGPUs found in many recent AMD APUs are using completely different
PowerPlay control methods, this tool does not support them.
* The amdgpu kernel driver does not fully implement modifying the PowerPlay
tables on runtime for Navi 3x and Navi 4x cards.
* The amdgpu kernel driver does the incomplete PowerPlay table data dump
to the `/sys/class/drm/cardX/device/pp_table` file, for Navi 3x AND 4x.
The pp_table file is truncated to first 4095 bytes. Likely a driver bug.
**WARNING**: Authors of this tool are in no way responsible for any damage
that may happen to your expansive graphics card if you choose to modify
card voltages, power limits, or any other PowerPlay parameters. Always
remember that you are doing it entirely on your own risk!
If you have bugs to report or features to request please create an issue on:
https://github.com/sibradzic/upp
### Requirements
Python 3.7+, click library. Optionally, for reading "soft" PowerPlay table
from Windows registry: python-registry. Should work on Windows as well
(testers wanted).
### Installation
Either get it with pip:
pip install upp
or use it as is directly from the source tree:
cd src
python3 -m upp.upp --help
### Usage
At its current form this is a CLI only tool. Getting help:
upp --help
or
upp --help
Upp will only work by specifying a command which tells it what to do to one's
Radeon PowerPlay table data. Currently available commands are:
* **dump** - Dumps all PowerPlay data to console
* **extract** - Extracts PowerPlay data from full VBIOS ROM image
* **inject** - Injects PowerPlay data from file into VBIOS ROM image
* **get** - Retrieves current value of one or multiple PowerPlay parameter(s)
* **set** - Sets value to one or multiple PowerPlay parameters
* **undump** - Sets all PowerPlay parameters to pp file or registry
* **version** - Shows UPP version
So, an usage pattern would be like this:
upp [OPTIONS] COMMAND [ARGS]...
Some generic options applicable to all commands may be used, but please note
that they have to be specified *before* an actual command:
-p, --pp-file Input/output PP table binary file.
-f, --from-registry Import PP_PhmSoftPowerPlayTable from Windows
registry (overrides -p / --pp-file option).
-m, --from-mpt Import PowerPlay Table from More Power Tool
(overrides --pp-file and --from-registry optios).
-d, --debug / --no-debug Debug mode.
-h, --help Show this message and exit.
#### Dumping all data:
The **dump** command de-serializes PowerPlay binary data into a human-readable
text output. For example:
upp dump
In standard mode all data will be dumped to console, where data tree hierarchy
is indicated by indentation. In raw mode a table showing all hex and binary
data, as well as variable names and values, will be dumped.
#### Extracting PowerPlay table from Video ROM image:
Use **extract** command for this. The source video ROM binary must be specified
with `-r/--video-rom` parameter, and extracted PowerPlay table will be saved
into file specified with generic `-p/--pp-file` option. For example:
upp --pp-file=extracted.pp_table extract -r VIDEO.rom
Default output file name will be an original ROM file name with an
additional .pp_table extension.
#### Injecting PowerPlay data from file into VBIOS ROM image:
Use **inject** command for this. The input video ROM binary must be specified
with `-i/--input-rom` parameter, and the output ROM can be specified with an
optional `-o/--output-rom parameter`. For example:
upp -p modded.pp_table inject -i original.rom -o modded.rom
**WARNING**: Modified vROM image is probably not going to work if flashed as is
to your card, due to ROM signature checks on recent Radeon cards. Authors of
this tool are in no way responsible for any damage that may happen to your
expansive graphics card if you choose to flash the modified video ROM, you are
doing it entirely on your own risk.
#### Getting PowerPlay table parameter value(s):
The **get** command retrieves current value of one or multiple PowerPlay table
parameter value(s). The parameter variable path must be specified in `/`
notation, for example:
upp get smc_pptable/FreqTableGfx/1 smc_pptable/FreqTableGfx/2
1850
1400
The order of the output values will match the order of the parameter variable
paths specified.
#### Setting PowerPlay table parameter value(s):
The **set** command sets value to one or multiple PowerPlay table
parameter(s). The parameter path and value must be specified in
`/=` notation, for example:
upp -p /tmp/custom-pp_table set --write \
smc_pptable/SocketPowerLimitAc/0=100 \
smc_pptable/SocketPowerLimitDc/0=100 \
smc_pptable/FanStartTemp=100 \
smc_pptable/FreqTableGfx/1=1550
It is possible to set parameters from a configuration file with one
"/=" per line using -c/--from-conf instead of directly
passing parameters from command line
upp set --from-conf=card0.conf
Note the `--write` parameter, which has to be specified to actually commit
changes to the PowerPlay table file.
#### Undumps all PowerPlay parameters:
The **undump** command sets all values from previously dumped PowerPlay table parameter(s) back to pp_table or registry. It allows you to make changes in dumped text file and write back all changes at once. Basically it's a convenient way to set multiple values. For example:
# extract pp_table from vbios
upp --pp-file=vbios.pp_table extract -r vbios.rom
# dump powerplay table to text file
upp --pp-file=vbios.pp_table dump > vbios.pp_table.dump
# make changes in vbios.pp_table.dump
# undump all changes back into pp_table
upp --pp-file=vbios.pp_table undump -d vbios.pp_table.dump -w
Note the `--write` parameter, which has to be specified to actually commit
changes to the PowerPlay table file.
#### Getting upp version
upp version
#### Running as sudo
Note that if you need to run upp deployed with **pip** in `--user` mode with
sudo, you'll need to add some parameters to sudo command to make user env
available to super-user. For example:
sudo -E env "PATH=$PATH" upp --help
================================================
FILE: setup.py
================================================
import setuptools
with open('README.md', 'r') as fh:
long_description = fh.read()
setuptools.setup(
name='upp',
version='0.2.4',
author='Samir Ibradžić',
description='Uplift Power Play',
long_description=long_description,
long_description_content_type='text/markdown',
url='https://github.com/sibradzic/upp',
package_dir={'': 'src'},
packages=['upp', 'upp/atom_gen'],
classifiers=[
'Programming Language :: Python :: 3',
'Programming Language :: Python :: 3.7',
'Programming Language :: Python :: 3.8',
'Programming Language :: Python :: 3.9',
'Programming Language :: Python :: 3.10',
'Programming Language :: Python :: 3.11',
'Programming Language :: Python :: 3.12',
'License :: OSI Approved :: GNU General Public License v3 (GPLv3)',
'Operating System :: OS Independent',
],
python_requires='>=3.7, <4',
install_requires=[
'click',
'setuptools'
],
entry_points={
'console_scripts': [
'upp=upp.upp:main',
],
},
)
================================================
FILE: src/upp/__init__.py
================================================
================================================
FILE: src/upp/atom_gen/README.md
================================================
# How to generate Python readable ATOM C structures from Linux kernel code
## Versions
Generated against kernel commit 80e54e849 (v6.14-rc6) (Sun Mar 9 13:45:25 2025 -1000)
Generated against drm-next kernel commit 5da39dce1 tag drm-xe-next-fixes-2025-03-12
clang version 19.1.7
ctypeslib2 2.4.0
## Python Requirements
sudo apt install clang
pip3 install --user clang==19.1.7 ctypeslib2==2.4.0
or
pacman -S clang
pipx install --preinstall clang==19.1.7 ctypeslib2
## Get a particular Linux kernel release
git clone --depth=1 git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
pushd linux
# git fetch origin v6.14-rc6 --tags
# git checkout v6.14-rc6
# git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
# git fetch --tags linux-next
git remote add drm-next https://anongit.freedesktop.org/git/drm/drm.git
git fetch --tags drm-next
git checkout drm-next
popd
## Some Linux header hacks, clang2py can't deal with __counted_by()
sed -i 's| __counted_by(.*);|; //\0|' linux/drivers/gpu/drm/amd/include/pptable.h
sed -i 's| __counted_by(.*);|; //\0|' linux/drivers/gpu/drm/amd/include/atomfirmware.h
sed -i 's| __counted_by(.*);|; //\0|' linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h
sed -i 's|#include "hwmgr.h"|//\0|' linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h
## atombios.py
clang2py -k 's' --clang-args="\
--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
" \
-s struct__ATOM_COMMON_TABLE_HEADER -s struct__ATOM_MASTER_DATA_TABLE \
-s struct__ATOM_ROM_HEADER -s struct__ATOM_ROM_HEADER_V2_1 \
linux/drivers/gpu/drm/amd/include/atombios.h > atombios.py
## pptable_v1_0.py (Polaris/Tonga)
clang2py -k 'mst' \
--clang-args="\
--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atombios.h
" \
linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h > pptable_v1_0.py
## vega10_pptable.py (Vega10 aka Vega 56/64)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/include/atombios.h" \
linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h > vega10_pptable.py
## vega20_pptable.py (Vega20 aka Radeon7)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/powerplay/inc/smu11_driver_if.h " \
linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_pptable.h > vega20_pptable.py
## smu_v11_0_navi10.py (Navi10/14)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h > smu_v11_0_navi10.py
## smu_v11_0_arcturus.py (MI100)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h > smu_v11_0_arcturus.py
## smu_v11_0_navi20.py (Navi2x)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_7_pptable.h > smu_v11_0_7_navi20.py
## smu_v13_0 (Navi 3x)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0_7_pptable.h > smu_v13_0_7_navi30.py
## smu_v14_0 (Navi 4x)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h > smu_v14_0_2_navi40.py
## Linux source cleanup
pushd linux
git checkout \
drivers/gpu/drm/amd/include/pptable.h \
drivers/gpu/drm/amd/include/atomfirmware.h \
drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h
popd
================================================
FILE: src/upp/atom_gen/__init__.py
================================================
================================================
FILE: src/upp/atom_gen/atombios.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
class struct__ATOM_COMMON_TABLE_HEADER(Structure):
pass
struct__ATOM_COMMON_TABLE_HEADER._pack_ = 1 # source:False
struct__ATOM_COMMON_TABLE_HEADER._fields_ = [
('usStructureSize', ctypes.c_uint16),
('ucTableFormatRevision', ctypes.c_ubyte),
('ucTableContentRevision', ctypes.c_ubyte),
]
class struct__ATOM_ROM_HEADER(Structure):
pass
ATOM_COMMON_TABLE_HEADER = struct__ATOM_COMMON_TABLE_HEADER
struct__ATOM_ROM_HEADER._pack_ = 1 # source:False
struct__ATOM_ROM_HEADER._fields_ = [
('sHeader', ATOM_COMMON_TABLE_HEADER),
('uaFirmWareSignature', ctypes.c_ubyte * 4),
('usBiosRuntimeSegmentAddress', ctypes.c_uint16),
('usProtectedModeInfoOffset', ctypes.c_uint16),
('usConfigFilenameOffset', ctypes.c_uint16),
('usCRC_BlockOffset', ctypes.c_uint16),
('usBIOS_BootupMessageOffset', ctypes.c_uint16),
('usInt10Offset', ctypes.c_uint16),
('usPciBusDevInitCode', ctypes.c_uint16),
('usIoBaseAddress', ctypes.c_uint16),
('usSubsystemVendorID', ctypes.c_uint16),
('usSubsystemID', ctypes.c_uint16),
('usPCI_InfoOffset', ctypes.c_uint16),
('usMasterCommandTableOffset', ctypes.c_uint16),
('usMasterDataTableOffset', ctypes.c_uint16),
('ucExtendedFunctionCode', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte),
]
class struct__ATOM_ROM_HEADER_V2_1(Structure):
pass
struct__ATOM_ROM_HEADER_V2_1._pack_ = 1 # source:False
struct__ATOM_ROM_HEADER_V2_1._fields_ = [
('sHeader', ATOM_COMMON_TABLE_HEADER),
('uaFirmWareSignature', ctypes.c_ubyte * 4),
('usBiosRuntimeSegmentAddress', ctypes.c_uint16),
('usProtectedModeInfoOffset', ctypes.c_uint16),
('usConfigFilenameOffset', ctypes.c_uint16),
('usCRC_BlockOffset', ctypes.c_uint16),
('usBIOS_BootupMessageOffset', ctypes.c_uint16),
('usInt10Offset', ctypes.c_uint16),
('usPciBusDevInitCode', ctypes.c_uint16),
('usIoBaseAddress', ctypes.c_uint16),
('usSubsystemVendorID', ctypes.c_uint16),
('usSubsystemID', ctypes.c_uint16),
('usPCI_InfoOffset', ctypes.c_uint16),
('usMasterCommandTableOffset', ctypes.c_uint16),
('usMasterDataTableOffset', ctypes.c_uint16),
('ucExtendedFunctionCode', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte),
('ulPSPDirTableOffset', ctypes.c_uint32),
]
class struct__ATOM_MASTER_DATA_TABLE(Structure):
pass
class struct__ATOM_MASTER_LIST_OF_DATA_TABLES(Structure):
pass
struct__ATOM_MASTER_LIST_OF_DATA_TABLES._pack_ = 1 # source:False
struct__ATOM_MASTER_LIST_OF_DATA_TABLES._fields_ = [
('UtilityPipeLine', ctypes.c_uint16),
('MultimediaCapabilityInfo', ctypes.c_uint16),
('MultimediaConfigInfo', ctypes.c_uint16),
('StandardVESA_Timing', ctypes.c_uint16),
('FirmwareInfo', ctypes.c_uint16),
('PaletteData', ctypes.c_uint16),
('LCD_Info', ctypes.c_uint16),
('DIGTransmitterInfo', ctypes.c_uint16),
('SMU_Info', ctypes.c_uint16),
('SupportedDevicesInfo', ctypes.c_uint16),
('GPIO_I2C_Info', ctypes.c_uint16),
('VRAM_UsageByFirmware', ctypes.c_uint16),
('GPIO_Pin_LUT', ctypes.c_uint16),
('VESA_ToInternalModeLUT', ctypes.c_uint16),
('GFX_Info', ctypes.c_uint16),
('PowerPlayInfo', ctypes.c_uint16),
('GPUVirtualizationInfo', ctypes.c_uint16),
('SaveRestoreInfo', ctypes.c_uint16),
('PPLL_SS_Info', ctypes.c_uint16),
('OemInfo', ctypes.c_uint16),
('XTMDS_Info', ctypes.c_uint16),
('MclkSS_Info', ctypes.c_uint16),
('Object_Header', ctypes.c_uint16),
('IndirectIOAccess', ctypes.c_uint16),
('MC_InitParameter', ctypes.c_uint16),
('ASIC_VDDC_Info', ctypes.c_uint16),
('ASIC_InternalSS_Info', ctypes.c_uint16),
('TV_VideoMode', ctypes.c_uint16),
('VRAM_Info', ctypes.c_uint16),
('MemoryTrainingInfo', ctypes.c_uint16),
('IntegratedSystemInfo', ctypes.c_uint16),
('ASIC_ProfilingInfo', ctypes.c_uint16),
('VoltageObjectInfo', ctypes.c_uint16),
('PowerSourceInfo', ctypes.c_uint16),
('ServiceInfo', ctypes.c_uint16),
]
ATOM_MASTER_LIST_OF_DATA_TABLES = struct__ATOM_MASTER_LIST_OF_DATA_TABLES
struct__ATOM_MASTER_DATA_TABLE._pack_ = 1 # source:False
struct__ATOM_MASTER_DATA_TABLE._fields_ = [
('sHeader', ATOM_COMMON_TABLE_HEADER),
('ListOfDataTables', ATOM_MASTER_LIST_OF_DATA_TABLES),
]
__all__ = \
['ATOM_COMMON_TABLE_HEADER', 'ATOM_MASTER_LIST_OF_DATA_TABLES',
'struct__ATOM_COMMON_TABLE_HEADER',
'struct__ATOM_MASTER_DATA_TABLE',
'struct__ATOM_MASTER_LIST_OF_DATA_TABLES',
'struct__ATOM_ROM_HEADER', 'struct__ATOM_ROM_HEADER_V2_1']
================================================
FILE: src/upp/atom_gen/pptable_v1_0.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atombios.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
TONGA_PPTABLE_H = True # macro
ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK = 0x0f # macro
ATOM_TONGA_PP_FANPARAMETERS_NOFAN = 0x80 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_NONE = 0 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_LM96163 = 17 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_TONGA = 21 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_FIJI = 22 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL = 0x89 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL = 0x8D # macro
ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL = 0x1 # macro
ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY = 0x2 # macro
ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x4 # macro
ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND = 0x8 # macro
____RETIRE16____ = 0x10 # macro
ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC = 0x20 # macro
____RETIRE64____ = 0x40 # macro
____RETIRE128____ = 0x80 # macro
____RETIRE256____ = 0x100 # macro
____RETIRE512____ = 0x200 # macro
____RETIRE1024____ = 0x400 # macro
____RETIRE2048____ = 0x800 # macro
ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL = 0x1000 # macro
____RETIRE2000____ = 0x2000 # macro
____RETIRE4000____ = 0x4000 # macro
ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL = 0x8000 # macro
____RETIRE10000____ = 0x10000 # macro
ATOM_TONGA_PP_PLATFORM_CAP_BACO = 0x20000 # macro
ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 = 0x100000 # macro
ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL = 0x1000000 # macro
ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE = 0x2000000 # macro
ATOM_PPLIB_CLASSIFICATION_UI_MASK = 0x0007 # macro
ATOM_PPLIB_CLASSIFICATION_UI_SHIFT = 0 # macro
ATOM_PPLIB_CLASSIFICATION_UI_NONE = 0 # macro
ATOM_PPLIB_CLASSIFICATION_UI_BATTERY = 1 # macro
ATOM_PPLIB_CLASSIFICATION_UI_BALANCED = 3 # macro
ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE = 5 # macro
ATOM_PPLIB_CLASSIFICATION_BOOT = 0x0008 # macro
ATOM_PPLIB_CLASSIFICATION_THERMAL = 0x0010 # macro
ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE = 0x0020 # macro
ATOM_PPLIB_CLASSIFICATION_REST = 0x0040 # macro
ATOM_PPLIB_CLASSIFICATION_FORCED = 0x0080 # macro
ATOM_PPLIB_CLASSIFICATION_ACPI = 0x1000 # macro
ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 = 0x0001 # macro
ATOM_Tonga_DISALLOW_ON_DC = 0x00004000 # macro
ATOM_Tonga_ENABLE_VARIBRIGHT = 0x00008000 # macro
ATOM_Tonga_TABLE_REVISION_TONGA = 7 # macro
ATOM_PPM_A_A = 1 # macro
ATOM_PPM_A_I = 2 # macro
class struct__ATOM_Tonga_POWERPLAYTABLE(Structure):
pass
class struct__ATOM_COMMON_TABLE_HEADER(Structure):
pass
struct__ATOM_COMMON_TABLE_HEADER._pack_ = 1 # source:False
struct__ATOM_COMMON_TABLE_HEADER._fields_ = [
('usStructureSize', ctypes.c_uint16),
('ucTableFormatRevision', ctypes.c_ubyte),
('ucTableContentRevision', ctypes.c_ubyte),
]
struct__ATOM_Tonga_POWERPLAYTABLE._pack_ = 1 # source:False
struct__ATOM_Tonga_POWERPLAYTABLE._fields_ = [
('sHeader', struct__ATOM_COMMON_TABLE_HEADER),
('ucTableRevision', ctypes.c_ubyte),
('usTableSize', ctypes.c_uint16),
('ulGoldenPPID', ctypes.c_uint32),
('ulGoldenRevision', ctypes.c_uint32),
('usFormatID', ctypes.c_uint16),
('usVoltageTime', ctypes.c_uint16),
('ulPlatformCaps', ctypes.c_uint32),
('ulMaxODEngineClock', ctypes.c_uint32),
('ulMaxODMemoryClock', ctypes.c_uint32),
('usPowerControlLimit', ctypes.c_uint16),
('usUlvVoltageOffset', ctypes.c_uint16),
('usStateArrayOffset', ctypes.c_uint16),
('usFanTableOffset', ctypes.c_uint16),
('usThermalControllerOffset', ctypes.c_uint16),
('usReserv', ctypes.c_uint16),
('usMclkDependencyTableOffset', ctypes.c_uint16),
('usSclkDependencyTableOffset', ctypes.c_uint16),
('usVddcLookupTableOffset', ctypes.c_uint16),
('usVddgfxLookupTableOffset', ctypes.c_uint16),
('usMMDependencyTableOffset', ctypes.c_uint16),
('usVCEStateTableOffset', ctypes.c_uint16),
('usPPMTableOffset', ctypes.c_uint16),
('usPowerTuneTableOffset', ctypes.c_uint16),
('usHardLimitTableOffset', ctypes.c_uint16),
('usPCIETableOffset', ctypes.c_uint16),
('usGPIOTableOffset', ctypes.c_uint16),
('usReserved', ctypes.c_uint16 * 6),
]
ATOM_Tonga_POWERPLAYTABLE = struct__ATOM_Tonga_POWERPLAYTABLE
class struct__ATOM_Tonga_State(Structure):
pass
struct__ATOM_Tonga_State._pack_ = 1 # source:False
struct__ATOM_Tonga_State._fields_ = [
('ucEngineClockIndexHigh', ctypes.c_ubyte),
('ucEngineClockIndexLow', ctypes.c_ubyte),
('ucMemoryClockIndexHigh', ctypes.c_ubyte),
('ucMemoryClockIndexLow', ctypes.c_ubyte),
('ucPCIEGenLow', ctypes.c_ubyte),
('ucPCIEGenHigh', ctypes.c_ubyte),
('ucPCIELaneLow', ctypes.c_ubyte),
('ucPCIELaneHigh', ctypes.c_ubyte),
('usClassification', ctypes.c_uint16),
('ulCapsAndSettings', ctypes.c_uint32),
('usClassification2', ctypes.c_uint16),
('ucUnused', ctypes.c_ubyte * 4),
]
ATOM_Tonga_State = struct__ATOM_Tonga_State
class struct__ATOM_Tonga_State_Array(Structure):
pass
struct__ATOM_Tonga_State_Array._pack_ = 1 # source:False
struct__ATOM_Tonga_State_Array._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_State * 0),
]
ATOM_Tonga_State_Array = struct__ATOM_Tonga_State_Array
class struct__ATOM_Tonga_MCLK_Dependency_Record(Structure):
pass
struct__ATOM_Tonga_MCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_MCLK_Dependency_Record._fields_ = [
('ucVddcInd', ctypes.c_ubyte),
('usVddci', ctypes.c_uint16),
('usVddgfxOffset', ctypes.c_uint16),
('usMvdd', ctypes.c_uint16),
('ulMclk', ctypes.c_uint32),
('usReserved', ctypes.c_uint16),
]
ATOM_Tonga_MCLK_Dependency_Record = struct__ATOM_Tonga_MCLK_Dependency_Record
class struct__ATOM_Tonga_MCLK_Dependency_Table(Structure):
pass
struct__ATOM_Tonga_MCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_MCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_MCLK_Dependency_Record * 0),
]
ATOM_Tonga_MCLK_Dependency_Table = struct__ATOM_Tonga_MCLK_Dependency_Table
class struct__ATOM_Tonga_SCLK_Dependency_Record(Structure):
pass
struct__ATOM_Tonga_SCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_SCLK_Dependency_Record._fields_ = [
('ucVddInd', ctypes.c_ubyte),
('usVddcOffset', ctypes.c_uint16),
('ulSclk', ctypes.c_uint32),
('usEdcCurrent', ctypes.c_uint16),
('ucReliabilityTemperature', ctypes.c_ubyte),
('ucCKSVOffsetandDisable', ctypes.c_ubyte),
]
ATOM_Tonga_SCLK_Dependency_Record = struct__ATOM_Tonga_SCLK_Dependency_Record
class struct__ATOM_Tonga_SCLK_Dependency_Table(Structure):
pass
struct__ATOM_Tonga_SCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_SCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_SCLK_Dependency_Record * 0),
]
ATOM_Tonga_SCLK_Dependency_Table = struct__ATOM_Tonga_SCLK_Dependency_Table
class struct__ATOM_Polaris_SCLK_Dependency_Record(Structure):
pass
struct__ATOM_Polaris_SCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Polaris_SCLK_Dependency_Record._fields_ = [
('ucVddInd', ctypes.c_ubyte),
('usVddcOffset', ctypes.c_uint16),
('ulSclk', ctypes.c_uint32),
('usEdcCurrent', ctypes.c_uint16),
('ucReliabilityTemperature', ctypes.c_ubyte),
('ucCKSVOffsetandDisable', ctypes.c_ubyte),
('ulSclkOffset', ctypes.c_uint32),
]
ATOM_Polaris_SCLK_Dependency_Record = struct__ATOM_Polaris_SCLK_Dependency_Record
class struct__ATOM_Polaris_SCLK_Dependency_Table(Structure):
pass
struct__ATOM_Polaris_SCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Polaris_SCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Polaris_SCLK_Dependency_Record * 0),
]
ATOM_Polaris_SCLK_Dependency_Table = struct__ATOM_Polaris_SCLK_Dependency_Table
class struct__ATOM_Tonga_PCIE_Record(Structure):
pass
struct__ATOM_Tonga_PCIE_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_PCIE_Record._fields_ = [
('ucPCIEGenSpeed', ctypes.c_ubyte),
('usPCIELaneWidth', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte * 2),
]
ATOM_Tonga_PCIE_Record = struct__ATOM_Tonga_PCIE_Record
class struct__ATOM_Tonga_PCIE_Table(Structure):
pass
struct__ATOM_Tonga_PCIE_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_PCIE_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_PCIE_Record * 0),
]
ATOM_Tonga_PCIE_Table = struct__ATOM_Tonga_PCIE_Table
class struct__ATOM_Polaris10_PCIE_Record(Structure):
pass
struct__ATOM_Polaris10_PCIE_Record._pack_ = 1 # source:False
struct__ATOM_Polaris10_PCIE_Record._fields_ = [
('ucPCIEGenSpeed', ctypes.c_ubyte),
('usPCIELaneWidth', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte * 2),
('ulPCIE_Sclk', ctypes.c_uint32),
]
ATOM_Polaris10_PCIE_Record = struct__ATOM_Polaris10_PCIE_Record
class struct__ATOM_Polaris10_PCIE_Table(Structure):
pass
struct__ATOM_Polaris10_PCIE_Table._pack_ = 1 # source:False
struct__ATOM_Polaris10_PCIE_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Polaris10_PCIE_Record * 0),
]
ATOM_Polaris10_PCIE_Table = struct__ATOM_Polaris10_PCIE_Table
class struct__ATOM_Tonga_MM_Dependency_Record(Structure):
pass
struct__ATOM_Tonga_MM_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_MM_Dependency_Record._fields_ = [
('ucVddcInd', ctypes.c_ubyte),
('usVddgfxOffset', ctypes.c_uint16),
('ulDClk', ctypes.c_uint32),
('ulVClk', ctypes.c_uint32),
('ulEClk', ctypes.c_uint32),
('ulAClk', ctypes.c_uint32),
('ulSAMUClk', ctypes.c_uint32),
]
ATOM_Tonga_MM_Dependency_Record = struct__ATOM_Tonga_MM_Dependency_Record
class struct__ATOM_Tonga_MM_Dependency_Table(Structure):
pass
struct__ATOM_Tonga_MM_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_MM_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_MM_Dependency_Record * 0),
]
ATOM_Tonga_MM_Dependency_Table = struct__ATOM_Tonga_MM_Dependency_Table
class struct__ATOM_Tonga_Voltage_Lookup_Record(Structure):
pass
struct__ATOM_Tonga_Voltage_Lookup_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_Voltage_Lookup_Record._fields_ = [
('usVdd', ctypes.c_uint16),
('usCACLow', ctypes.c_uint16),
('usCACMid', ctypes.c_uint16),
('usCACHigh', ctypes.c_uint16),
]
ATOM_Tonga_Voltage_Lookup_Record = struct__ATOM_Tonga_Voltage_Lookup_Record
class struct__ATOM_Tonga_Voltage_Lookup_Table(Structure):
pass
struct__ATOM_Tonga_Voltage_Lookup_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_Voltage_Lookup_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_Voltage_Lookup_Record * 0),
]
ATOM_Tonga_Voltage_Lookup_Table = struct__ATOM_Tonga_Voltage_Lookup_Table
class struct__ATOM_Tonga_Fan_Table(Structure):
pass
struct__ATOM_Tonga_Fan_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_Fan_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucTHyst', ctypes.c_ubyte),
('usTMin', ctypes.c_uint16),
('usTMed', ctypes.c_uint16),
('usTHigh', ctypes.c_uint16),
('usPWMMin', ctypes.c_uint16),
('usPWMMed', ctypes.c_uint16),
('usPWMHigh', ctypes.c_uint16),
('usTMax', ctypes.c_uint16),
('ucFanControlMode', ctypes.c_ubyte),
('usFanPWMMax', ctypes.c_uint16),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanRPMMax', ctypes.c_uint16),
('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),
('ucTargetTemperature', ctypes.c_ubyte),
('ucMinimumPWMLimit', ctypes.c_ubyte),
('usReserved', ctypes.c_uint16),
]
ATOM_Tonga_Fan_Table = struct__ATOM_Tonga_Fan_Table
class struct__ATOM_Fiji_Fan_Table(Structure):
pass
struct__ATOM_Fiji_Fan_Table._pack_ = 1 # source:False
struct__ATOM_Fiji_Fan_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucTHyst', ctypes.c_ubyte),
('usTMin', ctypes.c_uint16),
('usTMed', ctypes.c_uint16),
('usTHigh', ctypes.c_uint16),
('usPWMMin', ctypes.c_uint16),
('usPWMMed', ctypes.c_uint16),
('usPWMHigh', ctypes.c_uint16),
('usTMax', ctypes.c_uint16),
('ucFanControlMode', ctypes.c_ubyte),
('usFanPWMMax', ctypes.c_uint16),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanRPMMax', ctypes.c_uint16),
('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),
('ucTargetTemperature', ctypes.c_ubyte),
('ucMinimumPWMLimit', ctypes.c_ubyte),
('usFanGainEdge', ctypes.c_uint16),
('usFanGainHotspot', ctypes.c_uint16),
('usFanGainLiquid', ctypes.c_uint16),
('usFanGainVrVddc', ctypes.c_uint16),
('usFanGainVrMvdd', ctypes.c_uint16),
('usFanGainPlx', ctypes.c_uint16),
('usFanGainHbm', ctypes.c_uint16),
('usReserved', ctypes.c_uint16),
]
ATOM_Fiji_Fan_Table = struct__ATOM_Fiji_Fan_Table
class struct__ATOM_Polaris_Fan_Table(Structure):
pass
struct__ATOM_Polaris_Fan_Table._pack_ = 1 # source:False
struct__ATOM_Polaris_Fan_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucTHyst', ctypes.c_ubyte),
('usTMin', ctypes.c_uint16),
('usTMed', ctypes.c_uint16),
('usTHigh', ctypes.c_uint16),
('usPWMMin', ctypes.c_uint16),
('usPWMMed', ctypes.c_uint16),
('usPWMHigh', ctypes.c_uint16),
('usTMax', ctypes.c_uint16),
('ucFanControlMode', ctypes.c_ubyte),
('usFanPWMMax', ctypes.c_uint16),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanRPMMax', ctypes.c_uint16),
('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),
('ucTargetTemperature', ctypes.c_ubyte),
('ucMinimumPWMLimit', ctypes.c_ubyte),
('usFanGainEdge', ctypes.c_uint16),
('usFanGainHotspot', ctypes.c_uint16),
('usFanGainLiquid', ctypes.c_uint16),
('usFanGainVrVddc', ctypes.c_uint16),
('usFanGainVrMvdd', ctypes.c_uint16),
('usFanGainPlx', ctypes.c_uint16),
('usFanGainHbm', ctypes.c_uint16),
('ucEnableZeroRPM', ctypes.c_ubyte),
('ucFanStopTemperature', ctypes.c_ubyte),
('ucFanStartTemperature', ctypes.c_ubyte),
('usReserved', ctypes.c_uint16),
]
ATOM_Polaris_Fan_Table = struct__ATOM_Polaris_Fan_Table
class struct__ATOM_Tonga_Thermal_Controller(Structure):
pass
struct__ATOM_Tonga_Thermal_Controller._pack_ = 1 # source:False
struct__ATOM_Tonga_Thermal_Controller._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucType', ctypes.c_ubyte),
('ucI2cLine', ctypes.c_ubyte),
('ucI2cAddress', ctypes.c_ubyte),
('ucFanParameters', ctypes.c_ubyte),
('ucFanMinRPM', ctypes.c_ubyte),
('ucFanMaxRPM', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte),
('ucFlags', ctypes.c_ubyte),
]
ATOM_Tonga_Thermal_Controller = struct__ATOM_Tonga_Thermal_Controller
class struct__ATOM_Tonga_VCE_State_Record(Structure):
pass
struct__ATOM_Tonga_VCE_State_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_VCE_State_Record._fields_ = [
('ucVCEClockIndex', ctypes.c_ubyte),
('ucFlag', ctypes.c_ubyte),
('ucSCLKIndex', ctypes.c_ubyte),
('ucMCLKIndex', ctypes.c_ubyte),
]
ATOM_Tonga_VCE_State_Record = struct__ATOM_Tonga_VCE_State_Record
class struct__ATOM_Tonga_VCE_State_Table(Structure):
pass
struct__ATOM_Tonga_VCE_State_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_VCE_State_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_VCE_State_Record * 0),
]
ATOM_Tonga_VCE_State_Table = struct__ATOM_Tonga_VCE_State_Table
class struct__ATOM_Tonga_PowerTune_Table(Structure):
pass
struct__ATOM_Tonga_PowerTune_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_PowerTune_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usTDP', ctypes.c_uint16),
('usConfigurableTDP', ctypes.c_uint16),
('usTDC', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usLowCACLeakage', ctypes.c_uint16),
('usHighCACLeakage', ctypes.c_uint16),
('usMaximumPowerDeliveryLimit', ctypes.c_uint16),
('usTjMax', ctypes.c_uint16),
('usPowerTuneDataSetID', ctypes.c_uint16),
('usEDCLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usClockStretchAmount', ctypes.c_uint16),
('usReserve', ctypes.c_uint16 * 2),
]
ATOM_Tonga_PowerTune_Table = struct__ATOM_Tonga_PowerTune_Table
class struct__ATOM_Fiji_PowerTune_Table(Structure):
pass
struct__ATOM_Fiji_PowerTune_Table._pack_ = 1 # source:False
struct__ATOM_Fiji_PowerTune_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usTDP', ctypes.c_uint16),
('usConfigurableTDP', ctypes.c_uint16),
('usTDC', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usLowCACLeakage', ctypes.c_uint16),
('usHighCACLeakage', ctypes.c_uint16),
('usMaximumPowerDeliveryLimit', ctypes.c_uint16),
('usTjMax', ctypes.c_uint16),
('usPowerTuneDataSetID', ctypes.c_uint16),
('usEDCLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usClockStretchAmount', ctypes.c_uint16),
('usTemperatureLimitHotspot', ctypes.c_uint16),
('usTemperatureLimitLiquid1', ctypes.c_uint16),
('usTemperatureLimitLiquid2', ctypes.c_uint16),
('usTemperatureLimitVrVddc', ctypes.c_uint16),
('usTemperatureLimitVrMvdd', ctypes.c_uint16),
('usTemperatureLimitPlx', ctypes.c_uint16),
('ucLiquid1_I2C_address', ctypes.c_ubyte),
('ucLiquid2_I2C_address', ctypes.c_ubyte),
('ucLiquid_I2C_Line', ctypes.c_ubyte),
('ucVr_I2C_address', ctypes.c_ubyte),
('ucVr_I2C_Line', ctypes.c_ubyte),
('ucPlx_I2C_address', ctypes.c_ubyte),
('ucPlx_I2C_Line', ctypes.c_ubyte),
('usReserved', ctypes.c_uint16),
]
ATOM_Fiji_PowerTune_Table = struct__ATOM_Fiji_PowerTune_Table
class struct__ATOM_Polaris_PowerTune_Table(Structure):
pass
struct__ATOM_Polaris_PowerTune_Table._pack_ = 1 # source:False
struct__ATOM_Polaris_PowerTune_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usTDP', ctypes.c_uint16),
('usConfigurableTDP', ctypes.c_uint16),
('usTDC', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usLowCACLeakage', ctypes.c_uint16),
('usHighCACLeakage', ctypes.c_uint16),
('usMaximumPowerDeliveryLimit', ctypes.c_uint16),
('usTjMax', ctypes.c_uint16),
('usPowerTuneDataSetID', ctypes.c_uint16),
('usEDCLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usClockStretchAmount', ctypes.c_uint16),
('usTemperatureLimitHotspot', ctypes.c_uint16),
('usTemperatureLimitLiquid1', ctypes.c_uint16),
('usTemperatureLimitLiquid2', ctypes.c_uint16),
('usTemperatureLimitVrVddc', ctypes.c_uint16),
('usTemperatureLimitVrMvdd', ctypes.c_uint16),
('usTemperatureLimitPlx', ctypes.c_uint16),
('ucLiquid1_I2C_address', ctypes.c_ubyte),
('ucLiquid2_I2C_address', ctypes.c_ubyte),
('ucLiquid_I2C_Line', ctypes.c_ubyte),
('ucVr_I2C_address', ctypes.c_ubyte),
('ucVr_I2C_Line', ctypes.c_ubyte),
('ucPlx_I2C_address', ctypes.c_ubyte),
('ucPlx_I2C_Line', ctypes.c_ubyte),
('usBoostPowerLimit', ctypes.c_uint16),
('ucCKS_LDO_REFSEL', ctypes.c_ubyte),
('ucHotSpotOnly', ctypes.c_ubyte),
('ucReserve', ctypes.c_ubyte),
('usReserve', ctypes.c_uint16),
]
ATOM_Polaris_PowerTune_Table = struct__ATOM_Polaris_PowerTune_Table
class struct__ATOM_Tonga_PPM_Table(Structure):
pass
struct__ATOM_Tonga_PPM_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_PPM_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucPpmDesign', ctypes.c_ubyte),
('usCpuCoreNumber', ctypes.c_uint16),
('ulPlatformTDP', ctypes.c_uint32),
('ulSmallACPlatformTDP', ctypes.c_uint32),
('ulPlatformTDC', ctypes.c_uint32),
('ulSmallACPlatformTDC', ctypes.c_uint32),
('ulApuTDP', ctypes.c_uint32),
('ulDGpuTDP', ctypes.c_uint32),
('ulDGpuUlvPower', ctypes.c_uint32),
('ulTjmax', ctypes.c_uint32),
]
ATOM_Tonga_PPM_Table = struct__ATOM_Tonga_PPM_Table
class struct__ATOM_Tonga_Hard_Limit_Record(Structure):
pass
struct__ATOM_Tonga_Hard_Limit_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_Hard_Limit_Record._fields_ = [
('ulSCLKLimit', ctypes.c_uint32),
('ulMCLKLimit', ctypes.c_uint32),
('usVddcLimit', ctypes.c_uint16),
('usVddciLimit', ctypes.c_uint16),
('usVddgfxLimit', ctypes.c_uint16),
]
ATOM_Tonga_Hard_Limit_Record = struct__ATOM_Tonga_Hard_Limit_Record
class struct__ATOM_Tonga_Hard_Limit_Table(Structure):
pass
struct__ATOM_Tonga_Hard_Limit_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_Hard_Limit_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_Hard_Limit_Record * 0),
]
ATOM_Tonga_Hard_Limit_Table = struct__ATOM_Tonga_Hard_Limit_Table
class struct__ATOM_Tonga_GPIO_Table(Structure):
pass
struct__ATOM_Tonga_GPIO_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_GPIO_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucVRHotTriggeredSclkDpmIndex', ctypes.c_ubyte),
('ucReserve', ctypes.c_ubyte * 5),
]
ATOM_Tonga_GPIO_Table = struct__ATOM_Tonga_GPIO_Table
class struct__PPTable_Generic_SubTable_Header(Structure):
pass
struct__PPTable_Generic_SubTable_Header._pack_ = 1 # source:False
struct__PPTable_Generic_SubTable_Header._fields_ = [
('ucRevId', ctypes.c_ubyte),
]
PPTable_Generic_SubTable_Header = struct__PPTable_Generic_SubTable_Header
__all__ = \
['ATOM_Fiji_Fan_Table', 'ATOM_Fiji_PowerTune_Table',
'ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2',
'ATOM_PPLIB_CLASSIFICATION_ACPI',
'ATOM_PPLIB_CLASSIFICATION_BOOT',
'ATOM_PPLIB_CLASSIFICATION_FORCED',
'ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE',
'ATOM_PPLIB_CLASSIFICATION_REST',
'ATOM_PPLIB_CLASSIFICATION_THERMAL',
'ATOM_PPLIB_CLASSIFICATION_UI_BALANCED',
'ATOM_PPLIB_CLASSIFICATION_UI_BATTERY',
'ATOM_PPLIB_CLASSIFICATION_UI_MASK',
'ATOM_PPLIB_CLASSIFICATION_UI_NONE',
'ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE',
'ATOM_PPLIB_CLASSIFICATION_UI_SHIFT', 'ATOM_PPM_A_A',
'ATOM_PPM_A_I', 'ATOM_Polaris10_PCIE_Record',
'ATOM_Polaris10_PCIE_Table', 'ATOM_Polaris_Fan_Table',
'ATOM_Polaris_PowerTune_Table',
'ATOM_Polaris_SCLK_Dependency_Record',
'ATOM_Polaris_SCLK_Dependency_Table',
'ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE',
'ATOM_TONGA_PP_FANPARAMETERS_NOFAN',
'ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK',
'ATOM_TONGA_PP_PLATFORM_CAP_BACO',
'ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND',
'ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC',
'ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL',
'ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17',
'ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY',
'ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL',
'ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL',
'ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL',
'ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL',
'ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL',
'ATOM_TONGA_PP_THERMALCONTROLLER_FIJI',
'ATOM_TONGA_PP_THERMALCONTROLLER_LM96163',
'ATOM_TONGA_PP_THERMALCONTROLLER_NONE',
'ATOM_TONGA_PP_THERMALCONTROLLER_TONGA',
'ATOM_Tonga_DISALLOW_ON_DC', 'ATOM_Tonga_ENABLE_VARIBRIGHT',
'ATOM_Tonga_Fan_Table', 'ATOM_Tonga_GPIO_Table',
'ATOM_Tonga_Hard_Limit_Record', 'ATOM_Tonga_Hard_Limit_Table',
'ATOM_Tonga_MCLK_Dependency_Record',
'ATOM_Tonga_MCLK_Dependency_Table',
'ATOM_Tonga_MM_Dependency_Record',
'ATOM_Tonga_MM_Dependency_Table', 'ATOM_Tonga_PCIE_Record',
'ATOM_Tonga_PCIE_Table', 'ATOM_Tonga_POWERPLAYTABLE',
'ATOM_Tonga_PPM_Table', 'ATOM_Tonga_PowerTune_Table',
'ATOM_Tonga_SCLK_Dependency_Record',
'ATOM_Tonga_SCLK_Dependency_Table', 'ATOM_Tonga_State',
'ATOM_Tonga_State_Array', 'ATOM_Tonga_TABLE_REVISION_TONGA',
'ATOM_Tonga_Thermal_Controller', 'ATOM_Tonga_VCE_State_Record',
'ATOM_Tonga_VCE_State_Table', 'ATOM_Tonga_Voltage_Lookup_Record',
'ATOM_Tonga_Voltage_Lookup_Table',
'PPTable_Generic_SubTable_Header', 'TONGA_PPTABLE_H',
'____RETIRE10000____', '____RETIRE1024____', '____RETIRE128____',
'____RETIRE16____', '____RETIRE2000____', '____RETIRE2048____',
'____RETIRE256____', '____RETIRE4000____', '____RETIRE512____',
'____RETIRE64____', 'struct__ATOM_COMMON_TABLE_HEADER',
'struct__ATOM_Fiji_Fan_Table',
'struct__ATOM_Fiji_PowerTune_Table',
'struct__ATOM_Polaris10_PCIE_Record',
'struct__ATOM_Polaris10_PCIE_Table',
'struct__ATOM_Polaris_Fan_Table',
'struct__ATOM_Polaris_PowerTune_Table',
'struct__ATOM_Polaris_SCLK_Dependency_Record',
'struct__ATOM_Polaris_SCLK_Dependency_Table',
'struct__ATOM_Tonga_Fan_Table', 'struct__ATOM_Tonga_GPIO_Table',
'struct__ATOM_Tonga_Hard_Limit_Record',
'struct__ATOM_Tonga_Hard_Limit_Table',
'struct__ATOM_Tonga_MCLK_Dependency_Record',
'struct__ATOM_Tonga_MCLK_Dependency_Table',
'struct__ATOM_Tonga_MM_Dependency_Record',
'struct__ATOM_Tonga_MM_Dependency_Table',
'struct__ATOM_Tonga_PCIE_Record', 'struct__ATOM_Tonga_PCIE_Table',
'struct__ATOM_Tonga_POWERPLAYTABLE',
'struct__ATOM_Tonga_PPM_Table',
'struct__ATOM_Tonga_PowerTune_Table',
'struct__ATOM_Tonga_SCLK_Dependency_Record',
'struct__ATOM_Tonga_SCLK_Dependency_Table',
'struct__ATOM_Tonga_State', 'struct__ATOM_Tonga_State_Array',
'struct__ATOM_Tonga_Thermal_Controller',
'struct__ATOM_Tonga_VCE_State_Record',
'struct__ATOM_Tonga_VCE_State_Table',
'struct__ATOM_Tonga_Voltage_Lookup_Record',
'struct__ATOM_Tonga_Voltage_Lookup_Table',
'struct__PPTable_Generic_SubTable_Header']
================================================
FILE: src/upp/atom_gen/smu_v11_0_7_navi20.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_11_0_7_PPTABLE_H = True # macro
SMU_11_0_7_TABLE_FORMAT_REVISION = 15 # macro
SMU_11_0_7_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_11_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_11_0_7_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_11_0_7_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_11_0_7_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_11_0_7_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_11_0_7_PP_THERMALCONTROLLER_SIENNA_CICHLID = 28 # macro
SMU_11_0_7_PP_OVERDRIVE_VERSION = 0x81 # macro
SMU_11_0_7_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro
SMU_11_0_7_MAX_ODFEATURE = 32 # macro
SMU_11_0_7_MAX_ODSETTING = 64 # macro
SMU_11_0_7_MAX_PMSETTING = 32 # macro
SMU_11_0_7_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_11_0_7_ODFEATURE_CAP'
SMU_11_0_7_ODFEATURE_CAP__enumvalues = {
0: 'SMU_11_0_7_ODCAP_GFXCLK_LIMITS',
1: 'SMU_11_0_7_ODCAP_GFXCLK_CURVE',
2: 'SMU_11_0_7_ODCAP_UCLK_LIMITS',
3: 'SMU_11_0_7_ODCAP_POWER_LIMIT',
4: 'SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',
5: 'SMU_11_0_7_ODCAP_FAN_SPEED_MIN',
6: 'SMU_11_0_7_ODCAP_TEMPERATURE_FAN',
7: 'SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM',
8: 'SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE',
9: 'SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',
10: 'SMU_11_0_7_ODCAP_AUTO_UV_ENGINE',
11: 'SMU_11_0_7_ODCAP_AUTO_OC_ENGINE',
12: 'SMU_11_0_7_ODCAP_AUTO_OC_MEMORY',
13: 'SMU_11_0_7_ODCAP_FAN_CURVE',
14: 'SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
15: 'SMU_11_0_7_ODCAP_POWER_MODE',
16: 'SMU_11_0_7_ODCAP_COUNT',
}
SMU_11_0_7_ODCAP_GFXCLK_LIMITS = 0
SMU_11_0_7_ODCAP_GFXCLK_CURVE = 1
SMU_11_0_7_ODCAP_UCLK_LIMITS = 2
SMU_11_0_7_ODCAP_POWER_LIMIT = 3
SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT = 4
SMU_11_0_7_ODCAP_FAN_SPEED_MIN = 5
SMU_11_0_7_ODCAP_TEMPERATURE_FAN = 6
SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM = 7
SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE = 8
SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL = 9
SMU_11_0_7_ODCAP_AUTO_UV_ENGINE = 10
SMU_11_0_7_ODCAP_AUTO_OC_ENGINE = 11
SMU_11_0_7_ODCAP_AUTO_OC_MEMORY = 12
SMU_11_0_7_ODCAP_FAN_CURVE = 13
SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 14
SMU_11_0_7_ODCAP_POWER_MODE = 15
SMU_11_0_7_ODCAP_COUNT = 16
SMU_11_0_7_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_7_ODFEATURE_ID'
SMU_11_0_7_ODFEATURE_ID__enumvalues = {
1: 'SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_11_0_7_ODFEATURE_GFXCLK_CURVE',
4: 'SMU_11_0_7_ODFEATURE_UCLK_LIMITS',
8: 'SMU_11_0_7_ODFEATURE_POWER_LIMIT',
16: 'SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',
32: 'SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN',
64: 'SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN',
128: 'SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM',
256: 'SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE',
512: 'SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',
1024: 'SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE',
2048: 'SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE',
4096: 'SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY',
8192: 'SMU_11_0_7_ODFEATURE_FAN_CURVE',
16384: 'SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
32768: 'SMU_11_0_7_ODFEATURE_POWER_MODE',
16: 'SMU_11_0_7_ODFEATURE_COUNT',
}
SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS = 1
SMU_11_0_7_ODFEATURE_GFXCLK_CURVE = 2
SMU_11_0_7_ODFEATURE_UCLK_LIMITS = 4
SMU_11_0_7_ODFEATURE_POWER_LIMIT = 8
SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16
SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN = 32
SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN = 64
SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM = 128
SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE = 256
SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512
SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE = 1024
SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE = 2048
SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY = 4096
SMU_11_0_7_ODFEATURE_FAN_CURVE = 8192
SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 16384
SMU_11_0_7_ODFEATURE_POWER_MODE = 32768
SMU_11_0_7_ODFEATURE_COUNT = 16
SMU_11_0_7_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_7_ODSETTING_ID'
SMU_11_0_7_ODSETTING_ID__enumvalues = {
0: 'SMU_11_0_7_ODSETTING_GFXCLKFMAX',
1: 'SMU_11_0_7_ODSETTING_GFXCLKFMIN',
2: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A',
3: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B',
4: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C',
5: 'SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN',
6: 'SMU_11_0_7_ODSETTING_UCLKFMIN',
7: 'SMU_11_0_7_ODSETTING_UCLKFMAX',
8: 'SMU_11_0_7_ODSETTING_POWERPERCENTAGE',
9: 'SMU_11_0_7_ODSETTING_FANRPMMIN',
10: 'SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT',
11: 'SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE',
12: 'SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX',
13: 'SMU_11_0_7_ODSETTING_ACTIMING',
14: 'SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',
15: 'SMU_11_0_7_ODSETTING_AUTOUVENGINE',
16: 'SMU_11_0_7_ODSETTING_AUTOOCENGINE',
17: 'SMU_11_0_7_ODSETTING_AUTOOCMEMORY',
18: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',
19: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1',
20: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',
21: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2',
22: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',
23: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3',
24: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',
25: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4',
26: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',
27: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5',
28: 'SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
29: 'SMU_11_0_7_ODSETTING_POWER_MODE',
30: 'SMU_11_0_7_ODSETTING_COUNT',
}
SMU_11_0_7_ODSETTING_GFXCLKFMAX = 0
SMU_11_0_7_ODSETTING_GFXCLKFMIN = 1
SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A = 2
SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B = 3
SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C = 4
SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN = 5
SMU_11_0_7_ODSETTING_UCLKFMIN = 6
SMU_11_0_7_ODSETTING_UCLKFMAX = 7
SMU_11_0_7_ODSETTING_POWERPERCENTAGE = 8
SMU_11_0_7_ODSETTING_FANRPMMIN = 9
SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT = 10
SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE = 11
SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX = 12
SMU_11_0_7_ODSETTING_ACTIMING = 13
SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL = 14
SMU_11_0_7_ODSETTING_AUTOUVENGINE = 15
SMU_11_0_7_ODSETTING_AUTOOCENGINE = 16
SMU_11_0_7_ODSETTING_AUTOOCMEMORY = 17
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1 = 18
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1 = 19
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2 = 20
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2 = 21
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3 = 22
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3 = 23
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4 = 24
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4 = 25
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5 = 26
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5 = 27
SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 28
SMU_11_0_7_ODSETTING_POWER_MODE = 29
SMU_11_0_7_ODSETTING_COUNT = 30
SMU_11_0_7_ODSETTING_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_7_PWRMODE_SETTING'
SMU_11_0_7_PWRMODE_SETTING__enumvalues = {
0: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET',
1: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE',
2: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO',
3: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE',
4: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',
5: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',
6: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',
7: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',
}
SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET = 0
SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE = 1
SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO = 2
SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE = 3
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET = 4
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO = 6
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE = 7
SMU_11_0_7_PWRMODE_SETTING = ctypes.c_uint32 # enum
class struct_smu_11_0_7_overdrive_table(Structure):
pass
struct_smu_11_0_7_overdrive_table._pack_ = 1 # source:False
struct_smu_11_0_7_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 64),
('min', ctypes.c_uint32 * 64),
('pm_setting', ctypes.c_int16 * 32),
]
# values for enumeration 'SMU_11_0_7_PPCLOCK_ID'
SMU_11_0_7_PPCLOCK_ID__enumvalues = {
0: 'SMU_11_0_7_PPCLOCK_GFXCLK',
1: 'SMU_11_0_7_PPCLOCK_SOCCLK',
2: 'SMU_11_0_7_PPCLOCK_UCLK',
3: 'SMU_11_0_7_PPCLOCK_FCLK',
4: 'SMU_11_0_7_PPCLOCK_DCLK_0',
5: 'SMU_11_0_7_PPCLOCK_VCLK_0',
6: 'SMU_11_0_7_PPCLOCK_DCLK_1',
7: 'SMU_11_0_7_PPCLOCK_VCLK_1',
8: 'SMU_11_0_7_PPCLOCK_DCEFCLK',
9: 'SMU_11_0_7_PPCLOCK_DISPCLK',
10: 'SMU_11_0_7_PPCLOCK_PIXCLK',
11: 'SMU_11_0_7_PPCLOCK_PHYCLK',
12: 'SMU_11_0_7_PPCLOCK_DTBCLK',
13: 'SMU_11_0_7_PPCLOCK_COUNT',
}
SMU_11_0_7_PPCLOCK_GFXCLK = 0
SMU_11_0_7_PPCLOCK_SOCCLK = 1
SMU_11_0_7_PPCLOCK_UCLK = 2
SMU_11_0_7_PPCLOCK_FCLK = 3
SMU_11_0_7_PPCLOCK_DCLK_0 = 4
SMU_11_0_7_PPCLOCK_VCLK_0 = 5
SMU_11_0_7_PPCLOCK_DCLK_1 = 6
SMU_11_0_7_PPCLOCK_VCLK_1 = 7
SMU_11_0_7_PPCLOCK_DCEFCLK = 8
SMU_11_0_7_PPCLOCK_DISPCLK = 9
SMU_11_0_7_PPCLOCK_PIXCLK = 10
SMU_11_0_7_PPCLOCK_PHYCLK = 11
SMU_11_0_7_PPCLOCK_DTBCLK = 12
SMU_11_0_7_PPCLOCK_COUNT = 13
SMU_11_0_7_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_7_power_saving_clock_table(Structure):
pass
struct_smu_11_0_7_power_saving_clock_table._pack_ = 1 # source:False
struct_smu_11_0_7_power_saving_clock_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('count', ctypes.c_uint32),
('max', ctypes.c_uint32 * 16),
('min', ctypes.c_uint32 * 16),
]
class struct_smu_11_0_7_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('VoltageMode', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('SsCurve', struct_QuadraticInt_t),
('SsFmin', ctypes.c_uint16),
('Padding16', ctypes.c_uint16),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_UclkDpmChangeRange_t(Structure):
pass
struct_UclkDpmChangeRange_t._pack_ = 1 # source:False
struct_UclkDpmChangeRange_t._fields_ = [
('Fmin', ctypes.c_uint16),
('Fmax', ctypes.c_uint16),
]
class struct_PiecewiseLinearDroopInt_t(Structure):
pass
struct_PiecewiseLinearDroopInt_t._pack_ = 1 # source:False
struct_PiecewiseLinearDroopInt_t._fields_ = [
('Fset', ctypes.c_uint32 * 5),
('Vdroop', ctypes.c_uint32 * 5),
]
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('SlaveAddress', ctypes.c_ubyte),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
('PaddingConfig', ctypes.c_ubyte),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('SocketPowerLimitDc', ctypes.c_uint16 * 4),
('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),
('TdcLimit', ctypes.c_uint16 * 2),
('TdcLimitTau', ctypes.c_uint16 * 2),
('TemperatureLimit', ctypes.c_uint16 * 10),
('FitLimit', ctypes.c_uint32),
('TotalPowerConfig', ctypes.c_ubyte),
('TotalPowerPadding', ctypes.c_ubyte * 3),
('ApccPlusResidencyLimit', ctypes.c_uint32),
('SmnclkDpmFreq', ctypes.c_uint16 * 2),
('SmnclkDpmVoltage', ctypes.c_uint16 * 2),
('PaddingAPCC', ctypes.c_uint32),
('PerPartDroopVsetGfxDfll', ctypes.c_uint16 * 5),
('PaddingPerPartDroop', ctypes.c_uint16),
('ThrottlerControlMask', ctypes.c_uint32),
('FwDStateMask', ctypes.c_uint32),
('UlvVoltageOffsetSoc', ctypes.c_uint16),
('UlvVoltageOffsetGfx', ctypes.c_uint16),
('MinVoltageUlvGfx', ctypes.c_uint16),
('MinVoltageUlvSoc', ctypes.c_uint16),
('SocLIVmin', ctypes.c_uint16),
('PaddingLIVmin', ctypes.c_uint16),
('GceaLinkMgrIdleThreshold', ctypes.c_ubyte),
('paddingRlcUlvParams', ctypes.c_ubyte * 3),
('MinVoltageGfx', ctypes.c_uint16),
('MinVoltageSoc', ctypes.c_uint16),
('MaxVoltageGfx', ctypes.c_uint16),
('MaxVoltageSoc', ctypes.c_uint16),
('LoadLineResistanceGfx', ctypes.c_uint16),
('LoadLineResistanceSoc', ctypes.c_uint16),
('VDDGFX_TVmin', ctypes.c_uint16),
('VDDSOC_TVmin', ctypes.c_uint16),
('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),
('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),
('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),
('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),
('VDDGFX_TVminHystersis', ctypes.c_uint16),
('VDDSOC_TVminHystersis', ctypes.c_uint16),
('DpmDescriptor', struct_DpmDescriptor_t * 13),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableDcefclk', ctypes.c_uint16 * 8),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTablePixclk', ctypes.c_uint16 * 8),
('FreqTablePhyclk', ctypes.c_uint16 * 8),
('FreqTableDtbclk', ctypes.c_uint16 * 8),
('FreqTableFclk', ctypes.c_uint16 * 8),
('Paddingclks', ctypes.c_uint32),
('PerPartDroopModelGfxDfll', struct_DroopInt_t * 5),
('DcModeMaxFreq', ctypes.c_uint32 * 13),
('FreqTableUclkDiv', ctypes.c_ubyte * 4),
('FclkBoostFreq', ctypes.c_uint16),
('FclkParamPadding', ctypes.c_uint16),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('MemVddciVoltage', ctypes.c_uint16 * 4),
('MemMvddVoltage', ctypes.c_uint16 * 4),
('GfxclkFgfxoffEntry', ctypes.c_uint16),
('GfxclkFinit', ctypes.c_uint16),
('GfxclkFidle', ctypes.c_uint16),
('GfxclkSource', ctypes.c_ubyte),
('GfxclkPadding', ctypes.c_ubyte),
('GfxGpoSubFeatureMask', ctypes.c_ubyte),
('GfxGpoEnabledWorkPolicyMask', ctypes.c_ubyte),
('GfxGpoDisabledWorkPolicyMask', ctypes.c_ubyte),
('GfxGpoPadding', ctypes.c_ubyte * 1),
('GfxGpoVotingAllow', ctypes.c_uint32),
('GfxGpoPadding32', ctypes.c_uint32 * 4),
('GfxDcsFopt', ctypes.c_uint16),
('GfxDcsFclkFopt', ctypes.c_uint16),
('GfxDcsUclkFopt', ctypes.c_uint16),
('DcsGfxOffVoltage', ctypes.c_uint16),
('DcsMinGfxOffTime', ctypes.c_uint16),
('DcsMaxGfxOffTime', ctypes.c_uint16),
('DcsMinCreditAccum', ctypes.c_uint32),
('DcsExitHysteresis', ctypes.c_uint16),
('DcsTimeout', ctypes.c_uint16),
('DcsParamPadding', ctypes.c_uint32 * 5),
('FlopsPerByteTable', ctypes.c_uint16 * 16),
('LowestUclkReservedForUlv', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 3),
('UclkDpmPstates', ctypes.c_ubyte * 4),
('UclkDpmSrcFreqRange', struct_UclkDpmChangeRange_t),
('UclkDpmTargFreqRange', struct_UclkDpmChangeRange_t),
('UclkDpmMidstepFreq', ctypes.c_uint16),
('UclkMidstepPadding', ctypes.c_uint16),
('PcieGenSpeed', ctypes.c_ubyte * 2),
('PcieLaneCount', ctypes.c_ubyte * 2),
('LclkFreq', ctypes.c_uint16 * 2),
('FanStopTemp', ctypes.c_uint16),
('FanStartTemp', ctypes.c_uint16),
('FanGain', ctypes.c_uint16 * 10),
('FanPwmMin', ctypes.c_uint16),
('FanAcousticLimitRpm', ctypes.c_uint16),
('FanThrottlingRpm', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('MGpuFanBoostLimitRpm', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('FanPadding16', ctypes.c_uint16),
('FanTempInputSelect', ctypes.c_ubyte),
('FanPadding', ctypes.c_ubyte),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('OverrideAvfsGb', ctypes.c_ubyte * 2),
('dBtcGbGfxDfllModelSelect', ctypes.c_ubyte),
('Padding8_Avfs', ctypes.c_ubyte),
('qAvfsGb', struct_QuadraticInt_t * 2),
('dBtcGbGfxPll', struct_DroopInt_t),
('dBtcGbGfxDfll', struct_DroopInt_t),
('dBtcGbSoc', struct_DroopInt_t),
('qAgingGb', struct_LinearInt_t * 2),
('PiecewiseLinearDroopIntGfxDfll', struct_PiecewiseLinearDroopInt_t),
('qStaticVoltageOffset', struct_QuadraticInt_t * 2),
('DcTol', ctypes.c_uint16 * 2),
('DcBtcEnabled', ctypes.c_ubyte * 2),
('Padding8_GfxBtc', ctypes.c_ubyte * 2),
('DcBtcMin', ctypes.c_uint16 * 2),
('DcBtcMax', ctypes.c_uint16 * 2),
('DcBtcGb', ctypes.c_uint16 * 2),
('XgmiDpmPstates', ctypes.c_ubyte * 2),
('XgmiDpmSpare', ctypes.c_ubyte * 2),
('DebugOverrides', ctypes.c_uint32),
('ReservedEquation0', struct_QuadraticInt_t),
('ReservedEquation1', struct_QuadraticInt_t),
('ReservedEquation2', struct_QuadraticInt_t),
('ReservedEquation3', struct_QuadraticInt_t),
('CustomerVariant', ctypes.c_ubyte),
('VcBtcEnabled', ctypes.c_ubyte),
('VcBtcVminT0', ctypes.c_uint16),
('VcBtcFixedVminAgingOffset', ctypes.c_uint16),
('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16),
('VcBtcPsmA', ctypes.c_uint32),
('VcBtcPsmB', ctypes.c_uint32),
('VcBtcVminA', ctypes.c_uint32),
('VcBtcVminB', ctypes.c_uint32),
('LedGpio', ctypes.c_uint16),
('GfxPowerStagesGpio', ctypes.c_uint16),
('SkuReserved', ctypes.c_uint32 * 8),
('GamingClk', ctypes.c_uint32 * 6),
('I2cControllers', struct_I2cControllerConfig_t * 16),
('GpioScl', ctypes.c_ubyte),
('GpioSda', ctypes.c_ubyte),
('FchUsbPdSlaveAddr', ctypes.c_ubyte),
('I2cSpare', ctypes.c_ubyte * 1),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMem0VrMapping', ctypes.c_ubyte),
('VddMem1VrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('SocUlvPhaseSheddingMask', ctypes.c_ubyte),
('VddciUlvPhaseSheddingMask', ctypes.c_ubyte),
('MvddUlvPhaseSheddingMask', ctypes.c_ubyte),
('GfxMaxCurrent', ctypes.c_uint16),
('GfxOffset', ctypes.c_byte),
('Padding_TelemetryGfx', ctypes.c_ubyte),
('SocMaxCurrent', ctypes.c_uint16),
('SocOffset', ctypes.c_byte),
('Padding_TelemetrySoc', ctypes.c_ubyte),
('Mem0MaxCurrent', ctypes.c_uint16),
('Mem0Offset', ctypes.c_byte),
('Padding_TelemetryMem0', ctypes.c_ubyte),
('Mem1MaxCurrent', ctypes.c_uint16),
('Mem1Offset', ctypes.c_byte),
('Padding_TelemetryMem1', ctypes.c_ubyte),
('MvddRatio', ctypes.c_uint32),
('AcDcGpio', ctypes.c_ubyte),
('AcDcPolarity', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('VR1HotGpio', ctypes.c_ubyte),
('VR1HotPolarity', ctypes.c_ubyte),
('GthrGpio', ctypes.c_ubyte),
('GthrPolarity', ctypes.c_ubyte),
('LedPin0', ctypes.c_ubyte),
('LedPin1', ctypes.c_ubyte),
('LedPin2', ctypes.c_ubyte),
('LedEnableMask', ctypes.c_ubyte),
('LedPcie', ctypes.c_ubyte),
('LedError', ctypes.c_ubyte),
('LedSpare1', ctypes.c_ubyte * 2),
('PllGfxclkSpreadEnabled', ctypes.c_ubyte),
('PllGfxclkSpreadPercent', ctypes.c_ubyte),
('PllGfxclkSpreadFreq', ctypes.c_uint16),
('DfllGfxclkSpreadEnabled', ctypes.c_ubyte),
('DfllGfxclkSpreadPercent', ctypes.c_ubyte),
('DfllGfxclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadPadding', ctypes.c_uint16),
('UclkSpreadFreq', ctypes.c_uint16),
('FclkSpreadEnabled', ctypes.c_ubyte),
('FclkSpreadPercent', ctypes.c_ubyte),
('FclkSpreadFreq', ctypes.c_uint16),
('MemoryChannelEnabled', ctypes.c_uint32),
('DramBitWidth', ctypes.c_ubyte),
('PaddingMem1', ctypes.c_ubyte * 3),
('TotalBoardPower', ctypes.c_uint16),
('BoardPowerPadding', ctypes.c_uint16),
('XgmiLinkSpeed', ctypes.c_ubyte * 4),
('XgmiLinkWidth', ctypes.c_ubyte * 4),
('XgmiFclkFreq', ctypes.c_uint16 * 4),
('XgmiSocVoltage', ctypes.c_uint16 * 4),
('HsrEnabled', ctypes.c_ubyte),
('VddqOffEnabled', ctypes.c_ubyte),
('PaddingUmcFlags', ctypes.c_ubyte * 2),
('UclkSpreadPercent', ctypes.c_ubyte * 16),
('BoardReserved', ctypes.c_uint32 * 11),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_smu_11_0_7_powerplay_table._pack_ = 1 # source:False
struct_smu_11_0_7_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_uint16 * 8),
('power_saving_clock', struct_smu_11_0_7_power_saving_clock_table),
('overdrive_table', struct_smu_11_0_7_overdrive_table),
('smc_pptable', struct_PPTable_t),
]
__all__ = \
['SMU_11_0_7_MAX_ODFEATURE', 'SMU_11_0_7_MAX_ODSETTING',
'SMU_11_0_7_MAX_PMSETTING', 'SMU_11_0_7_MAX_PPCLOCK',
'SMU_11_0_7_ODCAP_AUTO_OC_ENGINE',
'SMU_11_0_7_ODCAP_AUTO_OC_MEMORY',
'SMU_11_0_7_ODCAP_AUTO_UV_ENGINE', 'SMU_11_0_7_ODCAP_COUNT',
'SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_7_ODCAP_FAN_CURVE', 'SMU_11_0_7_ODCAP_FAN_SPEED_MIN',
'SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_7_ODCAP_GFXCLK_CURVE', 'SMU_11_0_7_ODCAP_GFXCLK_LIMITS',
'SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE',
'SMU_11_0_7_ODCAP_POWER_LIMIT', 'SMU_11_0_7_ODCAP_POWER_MODE',
'SMU_11_0_7_ODCAP_TEMPERATURE_FAN',
'SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM',
'SMU_11_0_7_ODCAP_UCLK_LIMITS',
'SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE',
'SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY',
'SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_7_ODFEATURE_CAP',
'SMU_11_0_7_ODFEATURE_COUNT',
'SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_7_ODFEATURE_FAN_CURVE',
'SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN',
'SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_7_ODFEATURE_GFXCLK_CURVE',
'SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_7_ODFEATURE_ID',
'SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_11_0_7_ODFEATURE_POWER_LIMIT',
'SMU_11_0_7_ODFEATURE_POWER_MODE',
'SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN',
'SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM',
'SMU_11_0_7_ODFEATURE_UCLK_LIMITS',
'SMU_11_0_7_ODSETTING_ACTIMING',
'SMU_11_0_7_ODSETTING_AUTOOCENGINE',
'SMU_11_0_7_ODSETTING_AUTOOCMEMORY',
'SMU_11_0_7_ODSETTING_AUTOUVENGINE',
'SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_7_ODSETTING_COUNT',
'SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN',
'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A',
'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B',
'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C',
'SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT',
'SMU_11_0_7_ODSETTING_FANRPMMIN',
'SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',
'SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_7_ODSETTING_GFXCLKFMAX',
'SMU_11_0_7_ODSETTING_GFXCLKFMIN', 'SMU_11_0_7_ODSETTING_ID',
'SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX',
'SMU_11_0_7_ODSETTING_POWERPERCENTAGE',
'SMU_11_0_7_ODSETTING_POWER_MODE',
'SMU_11_0_7_ODSETTING_UCLKFMAX', 'SMU_11_0_7_ODSETTING_UCLKFMIN',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO',
'SMU_11_0_7_PPCLOCK_COUNT', 'SMU_11_0_7_PPCLOCK_DCEFCLK',
'SMU_11_0_7_PPCLOCK_DCLK_0', 'SMU_11_0_7_PPCLOCK_DCLK_1',
'SMU_11_0_7_PPCLOCK_DISPCLK', 'SMU_11_0_7_PPCLOCK_DTBCLK',
'SMU_11_0_7_PPCLOCK_FCLK', 'SMU_11_0_7_PPCLOCK_GFXCLK',
'SMU_11_0_7_PPCLOCK_ID', 'SMU_11_0_7_PPCLOCK_PHYCLK',
'SMU_11_0_7_PPCLOCK_PIXCLK', 'SMU_11_0_7_PPCLOCK_SOCCLK',
'SMU_11_0_7_PPCLOCK_UCLK', 'SMU_11_0_7_PPCLOCK_VCLK_0',
'SMU_11_0_7_PPCLOCK_VCLK_1', 'SMU_11_0_7_PPTABLE_H',
'SMU_11_0_7_PP_OVERDRIVE_VERSION',
'SMU_11_0_7_PP_PLATFORM_CAP_BACO',
'SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_11_0_7_PP_PLATFORM_CAP_MACO',
'SMU_11_0_7_PP_PLATFORM_CAP_POWERPLAY',
'SMU_11_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_11_0_7_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_11_0_7_PP_POWERSAVINGCLOCK_VERSION',
'SMU_11_0_7_PP_THERMALCONTROLLER_NONE',
'SMU_11_0_7_PP_THERMALCONTROLLER_SIENNA_CICHLID',
'SMU_11_0_7_PWRMODE_SETTING', 'SMU_11_0_7_TABLE_FORMAT_REVISION',
'SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
'struct_DpmDescriptor_t', 'struct_DroopInt_t',
'struct_I2cControllerConfig_t', 'struct_LinearInt_t',
'struct_PPTable_t', 'struct_PiecewiseLinearDroopInt_t',
'struct_QuadraticInt_t', 'struct_UclkDpmChangeRange_t',
'struct_atom_common_table_header',
'struct_smu_11_0_7_overdrive_table',
'struct_smu_11_0_7_power_saving_clock_table',
'struct_smu_11_0_7_powerplay_table']
================================================
FILE: src/upp/atom_gen/smu_v11_0_arcturus.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_11_0_PPTABLE_H = True # macro
SMU_11_0_TABLE_FORMAT_REVISION = 12 # macro
SMU_11_0_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_11_0_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_11_0_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_11_0_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_11_0_PP_OVERDRIVE_VERSION = 0x0800 # macro
SMU_11_0_PP_POWERSAVINGCLOCK_VERSION = 0x0100 # macro
SMU_11_0_MAX_ODFEATURE = 32 # macro
SMU_11_0_MAX_ODSETTING = 32 # macro
SMU_11_0_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_11_0_ODFEATURE_CAP'
SMU_11_0_ODFEATURE_CAP__enumvalues = {
0: 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
1: 'SMU_11_0_ODCAP_GFXCLK_CURVE',
2: 'SMU_11_0_ODCAP_UCLK_MAX',
3: 'SMU_11_0_ODCAP_POWER_LIMIT',
4: 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
5: 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
6: 'SMU_11_0_ODCAP_TEMPERATURE_FAN',
7: 'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM',
8: 'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE',
9: 'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
10: 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
11: 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
12: 'SMU_11_0_ODCAP_AUTO_OC_MEMORY',
13: 'SMU_11_0_ODCAP_FAN_CURVE',
14: 'SMU_11_0_ODCAP_COUNT',
}
SMU_11_0_ODCAP_GFXCLK_LIMITS = 0
SMU_11_0_ODCAP_GFXCLK_CURVE = 1
SMU_11_0_ODCAP_UCLK_MAX = 2
SMU_11_0_ODCAP_POWER_LIMIT = 3
SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT = 4
SMU_11_0_ODCAP_FAN_SPEED_MIN = 5
SMU_11_0_ODCAP_TEMPERATURE_FAN = 6
SMU_11_0_ODCAP_TEMPERATURE_SYSTEM = 7
SMU_11_0_ODCAP_MEMORY_TIMING_TUNE = 8
SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL = 9
SMU_11_0_ODCAP_AUTO_UV_ENGINE = 10
SMU_11_0_ODCAP_AUTO_OC_ENGINE = 11
SMU_11_0_ODCAP_AUTO_OC_MEMORY = 12
SMU_11_0_ODCAP_FAN_CURVE = 13
SMU_11_0_ODCAP_COUNT = 14
SMU_11_0_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODFEATURE_ID'
SMU_11_0_ODFEATURE_ID__enumvalues = {
1: 'SMU_11_0_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
4: 'SMU_11_0_ODFEATURE_UCLK_MAX',
8: 'SMU_11_0_ODFEATURE_POWER_LIMIT',
16: 'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
32: 'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
64: 'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
128: 'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
256: 'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
512: 'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
1024: 'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE',
2048: 'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
4096: 'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
8192: 'SMU_11_0_ODFEATURE_FAN_CURVE',
14: 'SMU_11_0_ODFEATURE_COUNT',
}
SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1
SMU_11_0_ODFEATURE_GFXCLK_CURVE = 2
SMU_11_0_ODFEATURE_UCLK_MAX = 4
SMU_11_0_ODFEATURE_POWER_LIMIT = 8
SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16
SMU_11_0_ODFEATURE_FAN_SPEED_MIN = 32
SMU_11_0_ODFEATURE_TEMPERATURE_FAN = 64
SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 128
SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 256
SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512
SMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1024
SMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 2048
SMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 4096
SMU_11_0_ODFEATURE_FAN_CURVE = 8192
SMU_11_0_ODFEATURE_COUNT = 14
SMU_11_0_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODSETTING_ID'
SMU_11_0_ODSETTING_ID__enumvalues = {
0: 'SMU_11_0_ODSETTING_GFXCLKFMAX',
1: 'SMU_11_0_ODSETTING_GFXCLKFMIN',
2: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
3: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
4: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
5: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
6: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
7: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
8: 'SMU_11_0_ODSETTING_UCLKFMAX',
9: 'SMU_11_0_ODSETTING_POWERPERCENTAGE',
10: 'SMU_11_0_ODSETTING_FANRPMMIN',
11: 'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
12: 'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
13: 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
14: 'SMU_11_0_ODSETTING_ACTIMING',
15: 'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
16: 'SMU_11_0_ODSETTING_AUTOUVENGINE',
17: 'SMU_11_0_ODSETTING_AUTOOCENGINE',
18: 'SMU_11_0_ODSETTING_AUTOOCMEMORY',
19: 'SMU_11_0_ODSETTING_COUNT',
}
SMU_11_0_ODSETTING_GFXCLKFMAX = 0
SMU_11_0_ODSETTING_GFXCLKFMIN = 1
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1 = 2
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1 = 3
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2 = 4
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2 = 5
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3 = 6
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3 = 7
SMU_11_0_ODSETTING_UCLKFMAX = 8
SMU_11_0_ODSETTING_POWERPERCENTAGE = 9
SMU_11_0_ODSETTING_FANRPMMIN = 10
SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT = 11
SMU_11_0_ODSETTING_FANTARGETTEMPERATURE = 12
SMU_11_0_ODSETTING_OPERATINGTEMPMAX = 13
SMU_11_0_ODSETTING_ACTIMING = 14
SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL = 15
SMU_11_0_ODSETTING_AUTOUVENGINE = 16
SMU_11_0_ODSETTING_AUTOOCENGINE = 17
SMU_11_0_ODSETTING_AUTOOCMEMORY = 18
SMU_11_0_ODSETTING_COUNT = 19
SMU_11_0_ODSETTING_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_overdrive_table(Structure):
pass
struct_smu_11_0_overdrive_table._pack_ = 1 # source:False
struct_smu_11_0_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 32),
('min', ctypes.c_uint32 * 32),
]
# values for enumeration 'SMU_11_0_PPCLOCK_ID'
SMU_11_0_PPCLOCK_ID__enumvalues = {
0: 'SMU_11_0_PPCLOCK_GFXCLK',
1: 'SMU_11_0_PPCLOCK_VCLK',
2: 'SMU_11_0_PPCLOCK_DCLK',
3: 'SMU_11_0_PPCLOCK_ECLK',
4: 'SMU_11_0_PPCLOCK_SOCCLK',
5: 'SMU_11_0_PPCLOCK_UCLK',
6: 'SMU_11_0_PPCLOCK_DCEFCLK',
7: 'SMU_11_0_PPCLOCK_DISPCLK',
8: 'SMU_11_0_PPCLOCK_PIXCLK',
9: 'SMU_11_0_PPCLOCK_PHYCLK',
10: 'SMU_11_0_PPCLOCK_COUNT',
}
SMU_11_0_PPCLOCK_GFXCLK = 0
SMU_11_0_PPCLOCK_VCLK = 1
SMU_11_0_PPCLOCK_DCLK = 2
SMU_11_0_PPCLOCK_ECLK = 3
SMU_11_0_PPCLOCK_SOCCLK = 4
SMU_11_0_PPCLOCK_UCLK = 5
SMU_11_0_PPCLOCK_DCEFCLK = 6
SMU_11_0_PPCLOCK_DISPCLK = 7
SMU_11_0_PPCLOCK_PIXCLK = 8
SMU_11_0_PPCLOCK_PHYCLK = 9
SMU_11_0_PPCLOCK_COUNT = 10
SMU_11_0_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_power_saving_clock_table(Structure):
pass
struct_smu_11_0_power_saving_clock_table._pack_ = 1 # source:False
struct_smu_11_0_power_saving_clock_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('count', ctypes.c_uint32),
('max', ctypes.c_uint32 * 16),
('min', ctypes.c_uint32 * 16),
]
class struct_smu_11_0_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('VoltageMode', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('padding', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('SsCurve', struct_QuadraticInt_t),
('SsFmin', ctypes.c_uint16),
('Padding16', ctypes.c_uint16),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 2),
('SlaveAddress', ctypes.c_uint32),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('TdcLimitSoc', ctypes.c_uint16),
('TdcLimitSocTau', ctypes.c_uint16),
('TdcLimitGfx', ctypes.c_uint16),
('TdcLimitGfxTau', ctypes.c_uint16),
('TedgeLimit', ctypes.c_uint16),
('ThotspotLimit', ctypes.c_uint16),
('TmemLimit', ctypes.c_uint16),
('Tvr_gfxLimit', ctypes.c_uint16),
('Tvr_memLimit', ctypes.c_uint16),
('Tvr_socLimit', ctypes.c_uint16),
('FitLimit', ctypes.c_uint32),
('PpmPowerLimit', ctypes.c_uint16),
('PpmTemperatureThreshold', ctypes.c_uint16),
('ThrottlerControlMask', ctypes.c_uint32),
('UlvVoltageOffsetGfx', ctypes.c_uint16),
('UlvPadding', ctypes.c_uint16),
('UlvGfxclkBypass', ctypes.c_ubyte),
('Padding234', ctypes.c_ubyte * 3),
('MinVoltageGfx', ctypes.c_uint16),
('MinVoltageSoc', ctypes.c_uint16),
('MaxVoltageGfx', ctypes.c_uint16),
('MaxVoltageSoc', ctypes.c_uint16),
('LoadLineResistanceGfx', ctypes.c_uint16),
('LoadLineResistanceSoc', ctypes.c_uint16),
('DpmDescriptor', struct_DpmDescriptor_t * 6),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableFclk', ctypes.c_uint16 * 8),
('Paddingclks', ctypes.c_uint32 * 16),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('GfxclkFidle', ctypes.c_uint16),
('GfxclkSlewRate', ctypes.c_uint16),
('Padding567', ctypes.c_ubyte * 4),
('GfxclkDsMaxFreq', ctypes.c_uint16),
('GfxclkSource', ctypes.c_ubyte),
('Padding456', ctypes.c_ubyte),
('EnableTdpm', ctypes.c_uint16),
('TdpmHighHystTemperature', ctypes.c_uint16),
('TdpmLowHystTemperature', ctypes.c_uint16),
('GfxclkFreqHighTempLimit', ctypes.c_uint16),
('FanStopTemp', ctypes.c_uint16),
('FanStartTemp', ctypes.c_uint16),
('FanGainEdge', ctypes.c_uint16),
('FanGainHotspot', ctypes.c_uint16),
('FanGainVrGfx', ctypes.c_uint16),
('FanGainVrSoc', ctypes.c_uint16),
('FanGainVrMem', ctypes.c_uint16),
('FanGainHbm', ctypes.c_uint16),
('FanPwmMin', ctypes.c_uint16),
('FanAcousticLimitRpm', ctypes.c_uint16),
('FanThrottlingRpm', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FanTempInputSelect', ctypes.c_ubyte),
('padding8_Fan', ctypes.c_ubyte),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('OverrideAvfsGb', ctypes.c_ubyte * 2),
('Padding8_Avfs', ctypes.c_ubyte * 2),
('qAvfsGb', struct_QuadraticInt_t * 2),
('dBtcGbGfxPll', struct_DroopInt_t),
('dBtcGbGfxAfll', struct_DroopInt_t),
('dBtcGbSoc', struct_DroopInt_t),
('qAgingGb', struct_LinearInt_t * 2),
('qStaticVoltageOffset', struct_QuadraticInt_t * 2),
('DcTol', ctypes.c_uint16 * 2),
('DcBtcEnabled', ctypes.c_ubyte * 2),
('Padding8_GfxBtc', ctypes.c_ubyte * 2),
('DcBtcMin', ctypes.c_uint16 * 2),
('DcBtcMax', ctypes.c_uint16 * 2),
('DcBtcGb', ctypes.c_uint16 * 2),
('XgmiDpmPstates', ctypes.c_ubyte * 2),
('XgmiDpmSpare', ctypes.c_ubyte * 2),
('VDDGFX_TVmin', ctypes.c_uint16),
('VDDSOC_TVmin', ctypes.c_uint16),
('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),
('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),
('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),
('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),
('VDDGFX_TVminHystersis', ctypes.c_uint16),
('VDDSOC_TVminHystersis', ctypes.c_uint16),
('DebugOverrides', ctypes.c_uint32),
('ReservedEquation0', struct_QuadraticInt_t),
('ReservedEquation1', struct_QuadraticInt_t),
('ReservedEquation2', struct_QuadraticInt_t),
('ReservedEquation3', struct_QuadraticInt_t),
('MinVoltageUlvGfx', ctypes.c_uint16),
('PaddingUlv', ctypes.c_uint16),
('TotalPowerConfig', ctypes.c_ubyte),
('TotalPowerSpare1', ctypes.c_ubyte),
('TotalPowerSpare2', ctypes.c_uint16),
('PccThresholdLow', ctypes.c_uint16),
('PccThresholdHigh', ctypes.c_uint16),
('PaddingAPCC', ctypes.c_uint32 * 6),
('BasePerformanceCardPower', ctypes.c_uint16),
('MaxPerformanceCardPower', ctypes.c_uint16),
('BasePerformanceFrequencyCap', ctypes.c_uint16),
('MaxPerformanceFrequencyCap', ctypes.c_uint16),
('VDDGFX_VminLow', ctypes.c_uint16),
('VDDGFX_TVminLow', ctypes.c_uint16),
('VDDGFX_VminLow_HiTemp', ctypes.c_uint16),
('VDDGFX_VminLow_LoTemp', ctypes.c_uint16),
('Reserved', ctypes.c_uint32 * 7),
('MaxVoltageStepGfx', ctypes.c_uint16),
('MaxVoltageStepSoc', ctypes.c_uint16),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMemVrMapping', ctypes.c_ubyte),
('BoardVrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('ExternalSensorPresent', ctypes.c_ubyte),
('Padding8_V', ctypes.c_ubyte * 2),
('GfxMaxCurrent', ctypes.c_uint16),
('GfxOffset', ctypes.c_byte),
('Padding_TelemetryGfx', ctypes.c_ubyte),
('SocMaxCurrent', ctypes.c_uint16),
('SocOffset', ctypes.c_byte),
('Padding_TelemetrySoc', ctypes.c_ubyte),
('MemMaxCurrent', ctypes.c_uint16),
('MemOffset', ctypes.c_byte),
('Padding_TelemetryMem', ctypes.c_ubyte),
('BoardMaxCurrent', ctypes.c_uint16),
('BoardOffset', ctypes.c_byte),
('Padding_TelemetryBoardInput', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('VR1HotGpio', ctypes.c_ubyte),
('VR1HotPolarity', ctypes.c_ubyte),
('PllGfxclkSpreadEnabled', ctypes.c_ubyte),
('PllGfxclkSpreadPercent', ctypes.c_ubyte),
('PllGfxclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadEnabled', ctypes.c_ubyte),
('UclkSpreadPercent', ctypes.c_ubyte),
('UclkSpreadFreq', ctypes.c_uint16),
('FclkSpreadEnabled', ctypes.c_ubyte),
('FclkSpreadPercent', ctypes.c_ubyte),
('FclkSpreadFreq', ctypes.c_uint16),
('FllGfxclkSpreadEnabled', ctypes.c_ubyte),
('FllGfxclkSpreadPercent', ctypes.c_ubyte),
('FllGfxclkSpreadFreq', ctypes.c_uint16),
('I2cControllers', struct_I2cControllerConfig_t * 8),
('MemoryChannelEnabled', ctypes.c_uint32),
('DramBitWidth', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 3),
('TotalBoardPower', ctypes.c_uint16),
('BoardPadding', ctypes.c_uint16),
('XgmiLinkSpeed', ctypes.c_ubyte * 4),
('XgmiLinkWidth', ctypes.c_ubyte * 4),
('XgmiFclkFreq', ctypes.c_uint16 * 4),
('XgmiSocVoltage', ctypes.c_uint16 * 4),
('GpioI2cScl', ctypes.c_ubyte),
('GpioI2cSda', ctypes.c_ubyte),
('GpioPadding', ctypes.c_uint16),
('BoardVoltageCoeffA', ctypes.c_uint32),
('BoardVoltageCoeffB', ctypes.c_uint32),
('BoardReserved', ctypes.c_uint32 * 7),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_smu_11_0_powerplay_table._pack_ = 1 # source:False
struct_smu_11_0_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('od_turbo_power_limit', ctypes.c_uint16),
('od_power_save_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_uint16 * 6),
('power_saving_clock', struct_smu_11_0_power_saving_clock_table),
('overdrive_table', struct_smu_11_0_overdrive_table),
('smc_pptable', struct_PPTable_t),
]
__all__ = \
['SMU_11_0_MAX_ODFEATURE', 'SMU_11_0_MAX_ODSETTING',
'SMU_11_0_MAX_PPCLOCK', 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
'SMU_11_0_ODCAP_AUTO_OC_MEMORY', 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
'SMU_11_0_ODCAP_COUNT', 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODCAP_FAN_CURVE', 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODCAP_GFXCLK_CURVE', 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE', 'SMU_11_0_ODCAP_POWER_LIMIT',
'SMU_11_0_ODCAP_TEMPERATURE_FAN',
'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM', 'SMU_11_0_ODCAP_UCLK_MAX',
'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_ODFEATURE_CAP',
'SMU_11_0_ODFEATURE_COUNT',
'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODFEATURE_FAN_CURVE',
'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
'SMU_11_0_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_ODFEATURE_ID',
'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_11_0_ODFEATURE_POWER_LIMIT',
'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
'SMU_11_0_ODFEATURE_UCLK_MAX', 'SMU_11_0_ODSETTING_ACTIMING',
'SMU_11_0_ODSETTING_AUTOOCENGINE',
'SMU_11_0_ODSETTING_AUTOOCMEMORY',
'SMU_11_0_ODSETTING_AUTOUVENGINE', 'SMU_11_0_ODSETTING_COUNT',
'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
'SMU_11_0_ODSETTING_FANRPMMIN',
'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODSETTING_GFXCLKFMAX', 'SMU_11_0_ODSETTING_GFXCLKFMIN',
'SMU_11_0_ODSETTING_ID', 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
'SMU_11_0_ODSETTING_POWERPERCENTAGE',
'SMU_11_0_ODSETTING_UCLKFMAX',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
'SMU_11_0_PPCLOCK_COUNT', 'SMU_11_0_PPCLOCK_DCEFCLK',
'SMU_11_0_PPCLOCK_DCLK', 'SMU_11_0_PPCLOCK_DISPCLK',
'SMU_11_0_PPCLOCK_ECLK', 'SMU_11_0_PPCLOCK_GFXCLK',
'SMU_11_0_PPCLOCK_ID', 'SMU_11_0_PPCLOCK_PHYCLK',
'SMU_11_0_PPCLOCK_PIXCLK', 'SMU_11_0_PPCLOCK_SOCCLK',
'SMU_11_0_PPCLOCK_UCLK', 'SMU_11_0_PPCLOCK_VCLK',
'SMU_11_0_PPTABLE_H', 'SMU_11_0_PP_OVERDRIVE_VERSION',
'SMU_11_0_PP_PLATFORM_CAP_BACO',
'SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_11_0_PP_PLATFORM_CAP_MACO',
'SMU_11_0_PP_PLATFORM_CAP_POWERPLAY',
'SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_11_0_PP_POWERSAVINGCLOCK_VERSION',
'SMU_11_0_PP_THERMALCONTROLLER_NONE',
'SMU_11_0_TABLE_FORMAT_REVISION', 'struct_DpmDescriptor_t',
'struct_DroopInt_t', 'struct_I2cControllerConfig_t',
'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',
'struct_atom_common_table_header',
'struct_smu_11_0_overdrive_table',
'struct_smu_11_0_power_saving_clock_table',
'struct_smu_11_0_powerplay_table']
================================================
FILE: src/upp/atom_gen/smu_v11_0_navi10.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_11_0_PPTABLE_H = True # macro
SMU_11_0_TABLE_FORMAT_REVISION = 12 # macro
SMU_11_0_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_11_0_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_11_0_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_11_0_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_11_0_PP_OVERDRIVE_VERSION = 0x0800 # macro
SMU_11_0_PP_POWERSAVINGCLOCK_VERSION = 0x0100 # macro
SMU_11_0_MAX_ODFEATURE = 32 # macro
SMU_11_0_MAX_ODSETTING = 32 # macro
SMU_11_0_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_11_0_ODFEATURE_CAP'
SMU_11_0_ODFEATURE_CAP__enumvalues = {
0: 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
1: 'SMU_11_0_ODCAP_GFXCLK_CURVE',
2: 'SMU_11_0_ODCAP_UCLK_MAX',
3: 'SMU_11_0_ODCAP_POWER_LIMIT',
4: 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
5: 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
6: 'SMU_11_0_ODCAP_TEMPERATURE_FAN',
7: 'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM',
8: 'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE',
9: 'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
10: 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
11: 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
12: 'SMU_11_0_ODCAP_AUTO_OC_MEMORY',
13: 'SMU_11_0_ODCAP_FAN_CURVE',
14: 'SMU_11_0_ODCAP_COUNT',
}
SMU_11_0_ODCAP_GFXCLK_LIMITS = 0
SMU_11_0_ODCAP_GFXCLK_CURVE = 1
SMU_11_0_ODCAP_UCLK_MAX = 2
SMU_11_0_ODCAP_POWER_LIMIT = 3
SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT = 4
SMU_11_0_ODCAP_FAN_SPEED_MIN = 5
SMU_11_0_ODCAP_TEMPERATURE_FAN = 6
SMU_11_0_ODCAP_TEMPERATURE_SYSTEM = 7
SMU_11_0_ODCAP_MEMORY_TIMING_TUNE = 8
SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL = 9
SMU_11_0_ODCAP_AUTO_UV_ENGINE = 10
SMU_11_0_ODCAP_AUTO_OC_ENGINE = 11
SMU_11_0_ODCAP_AUTO_OC_MEMORY = 12
SMU_11_0_ODCAP_FAN_CURVE = 13
SMU_11_0_ODCAP_COUNT = 14
SMU_11_0_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODFEATURE_ID'
SMU_11_0_ODFEATURE_ID__enumvalues = {
1: 'SMU_11_0_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
4: 'SMU_11_0_ODFEATURE_UCLK_MAX',
8: 'SMU_11_0_ODFEATURE_POWER_LIMIT',
16: 'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
32: 'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
64: 'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
128: 'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
256: 'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
512: 'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
1024: 'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE',
2048: 'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
4096: 'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
8192: 'SMU_11_0_ODFEATURE_FAN_CURVE',
14: 'SMU_11_0_ODFEATURE_COUNT',
}
SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1
SMU_11_0_ODFEATURE_GFXCLK_CURVE = 2
SMU_11_0_ODFEATURE_UCLK_MAX = 4
SMU_11_0_ODFEATURE_POWER_LIMIT = 8
SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16
SMU_11_0_ODFEATURE_FAN_SPEED_MIN = 32
SMU_11_0_ODFEATURE_TEMPERATURE_FAN = 64
SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 128
SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 256
SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512
SMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1024
SMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 2048
SMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 4096
SMU_11_0_ODFEATURE_FAN_CURVE = 8192
SMU_11_0_ODFEATURE_COUNT = 14
SMU_11_0_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODSETTING_ID'
SMU_11_0_ODSETTING_ID__enumvalues = {
0: 'SMU_11_0_ODSETTING_GFXCLKFMAX',
1: 'SMU_11_0_ODSETTING_GFXCLKFMIN',
2: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
3: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
4: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
5: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
6: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
7: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
8: 'SMU_11_0_ODSETTING_UCLKFMAX',
9: 'SMU_11_0_ODSETTING_POWERPERCENTAGE',
10: 'SMU_11_0_ODSETTING_FANRPMMIN',
11: 'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
12: 'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
13: 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
14: 'SMU_11_0_ODSETTING_ACTIMING',
15: 'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
16: 'SMU_11_0_ODSETTING_AUTOUVENGINE',
17: 'SMU_11_0_ODSETTING_AUTOOCENGINE',
18: 'SMU_11_0_ODSETTING_AUTOOCMEMORY',
19: 'SMU_11_0_ODSETTING_COUNT',
}
SMU_11_0_ODSETTING_GFXCLKFMAX = 0
SMU_11_0_ODSETTING_GFXCLKFMIN = 1
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1 = 2
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1 = 3
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2 = 4
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2 = 5
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3 = 6
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3 = 7
SMU_11_0_ODSETTING_UCLKFMAX = 8
SMU_11_0_ODSETTING_POWERPERCENTAGE = 9
SMU_11_0_ODSETTING_FANRPMMIN = 10
SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT = 11
SMU_11_0_ODSETTING_FANTARGETTEMPERATURE = 12
SMU_11_0_ODSETTING_OPERATINGTEMPMAX = 13
SMU_11_0_ODSETTING_ACTIMING = 14
SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL = 15
SMU_11_0_ODSETTING_AUTOUVENGINE = 16
SMU_11_0_ODSETTING_AUTOOCENGINE = 17
SMU_11_0_ODSETTING_AUTOOCMEMORY = 18
SMU_11_0_ODSETTING_COUNT = 19
SMU_11_0_ODSETTING_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_overdrive_table(Structure):
pass
struct_smu_11_0_overdrive_table._pack_ = 1 # source:False
struct_smu_11_0_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 32),
('min', ctypes.c_uint32 * 32),
]
# values for enumeration 'SMU_11_0_PPCLOCK_ID'
SMU_11_0_PPCLOCK_ID__enumvalues = {
0: 'SMU_11_0_PPCLOCK_GFXCLK',
1: 'SMU_11_0_PPCLOCK_VCLK',
2: 'SMU_11_0_PPCLOCK_DCLK',
3: 'SMU_11_0_PPCLOCK_ECLK',
4: 'SMU_11_0_PPCLOCK_SOCCLK',
5: 'SMU_11_0_PPCLOCK_UCLK',
6: 'SMU_11_0_PPCLOCK_DCEFCLK',
7: 'SMU_11_0_PPCLOCK_DISPCLK',
8: 'SMU_11_0_PPCLOCK_PIXCLK',
9: 'SMU_11_0_PPCLOCK_PHYCLK',
10: 'SMU_11_0_PPCLOCK_COUNT',
}
SMU_11_0_PPCLOCK_GFXCLK = 0
SMU_11_0_PPCLOCK_VCLK = 1
SMU_11_0_PPCLOCK_DCLK = 2
SMU_11_0_PPCLOCK_ECLK = 3
SMU_11_0_PPCLOCK_SOCCLK = 4
SMU_11_0_PPCLOCK_UCLK = 5
SMU_11_0_PPCLOCK_DCEFCLK = 6
SMU_11_0_PPCLOCK_DISPCLK = 7
SMU_11_0_PPCLOCK_PIXCLK = 8
SMU_11_0_PPCLOCK_PHYCLK = 9
SMU_11_0_PPCLOCK_COUNT = 10
SMU_11_0_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_power_saving_clock_table(Structure):
pass
struct_smu_11_0_power_saving_clock_table._pack_ = 1 # source:False
struct_smu_11_0_power_saving_clock_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('count', ctypes.c_uint32),
('max', ctypes.c_uint32 * 16),
('min', ctypes.c_uint32 * 16),
]
class struct_smu_11_0_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('VoltageMode', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('SsCurve', struct_QuadraticInt_t),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 2),
('SlaveAddress', ctypes.c_uint32),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('SocketPowerLimitDc', ctypes.c_uint16 * 4),
('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),
('TdcLimitSoc', ctypes.c_uint16),
('TdcLimitSocTau', ctypes.c_uint16),
('TdcLimitGfx', ctypes.c_uint16),
('TdcLimitGfxTau', ctypes.c_uint16),
('TedgeLimit', ctypes.c_uint16),
('ThotspotLimit', ctypes.c_uint16),
('TmemLimit', ctypes.c_uint16),
('Tvr_gfxLimit', ctypes.c_uint16),
('Tvr_mem0Limit', ctypes.c_uint16),
('Tvr_mem1Limit', ctypes.c_uint16),
('Tvr_socLimit', ctypes.c_uint16),
('Tliquid0Limit', ctypes.c_uint16),
('Tliquid1Limit', ctypes.c_uint16),
('TplxLimit', ctypes.c_uint16),
('FitLimit', ctypes.c_uint32),
('PpmPowerLimit', ctypes.c_uint16),
('PpmTemperatureThreshold', ctypes.c_uint16),
('ThrottlerControlMask', ctypes.c_uint32),
('FwDStateMask', ctypes.c_uint32),
('UlvVoltageOffsetSoc', ctypes.c_uint16),
('UlvVoltageOffsetGfx', ctypes.c_uint16),
('GceaLinkMgrIdleThreshold', ctypes.c_ubyte),
('paddingRlcUlvParams', ctypes.c_ubyte * 3),
('UlvSmnclkDid', ctypes.c_ubyte),
('UlvMp1clkDid', ctypes.c_ubyte),
('UlvGfxclkBypass', ctypes.c_ubyte),
('Padding234', ctypes.c_ubyte),
('MinVoltageUlvGfx', ctypes.c_uint16),
('MinVoltageUlvSoc', ctypes.c_uint16),
('MinVoltageGfx', ctypes.c_uint16),
('MinVoltageSoc', ctypes.c_uint16),
('MaxVoltageGfx', ctypes.c_uint16),
('MaxVoltageSoc', ctypes.c_uint16),
('LoadLineResistanceGfx', ctypes.c_uint16),
('LoadLineResistanceSoc', ctypes.c_uint16),
('DpmDescriptor', struct_DpmDescriptor_t * 9),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableDcefclk', ctypes.c_uint16 * 8),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTablePixclk', ctypes.c_uint16 * 8),
('FreqTablePhyclk', ctypes.c_uint16 * 8),
('Paddingclks', ctypes.c_uint32 * 16),
('DcModeMaxFreq', ctypes.c_uint16 * 9),
('Padding8_Clks', ctypes.c_uint16),
('FreqTableUclkDiv', ctypes.c_ubyte * 4),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('MemVddciVoltage', ctypes.c_uint16 * 4),
('MemMvddVoltage', ctypes.c_uint16 * 4),
('GfxclkFgfxoffEntry', ctypes.c_uint16),
('GfxclkFinit', ctypes.c_uint16),
('GfxclkFidle', ctypes.c_uint16),
('GfxclkSlewRate', ctypes.c_uint16),
('GfxclkFopt', ctypes.c_uint16),
('Padding567', ctypes.c_ubyte * 2),
('GfxclkDsMaxFreq', ctypes.c_uint16),
('GfxclkSource', ctypes.c_ubyte),
('Padding456', ctypes.c_ubyte),
('LowestUclkReservedForUlv', ctypes.c_ubyte),
('paddingUclk', ctypes.c_ubyte * 3),
('MemoryType', ctypes.c_ubyte),
('MemoryChannels', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 2),
('PcieGenSpeed', ctypes.c_ubyte * 2),
('PcieLaneCount', ctypes.c_ubyte * 2),
('LclkFreq', ctypes.c_uint16 * 2),
('EnableTdpm', ctypes.c_uint16),
('TdpmHighHystTemperature', ctypes.c_uint16),
('TdpmLowHystTemperature', ctypes.c_uint16),
('GfxclkFreqHighTempLimit', ctypes.c_uint16),
('FanStopTemp', ctypes.c_uint16),
('FanStartTemp', ctypes.c_uint16),
('FanGainEdge', ctypes.c_uint16),
('FanGainHotspot', ctypes.c_uint16),
('FanGainLiquid0', ctypes.c_uint16),
('FanGainLiquid1', ctypes.c_uint16),
('FanGainVrGfx', ctypes.c_uint16),
('FanGainVrSoc', ctypes.c_uint16),
('FanGainVrMem0', ctypes.c_uint16),
('FanGainVrMem1', ctypes.c_uint16),
('FanGainPlx', ctypes.c_uint16),
('FanGainMem', ctypes.c_uint16),
('FanPwmMin', ctypes.c_uint16),
('FanAcousticLimitRpm', ctypes.c_uint16),
('FanThrottlingRpm', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('FanTempInputSelect', ctypes.c_ubyte),
('FanPadding', ctypes.c_ubyte),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('OverrideAvfsGb', ctypes.c_ubyte * 2),
('Padding8_Avfs', ctypes.c_ubyte * 2),
('qAvfsGb', struct_QuadraticInt_t * 2),
('dBtcGbGfxPll', struct_DroopInt_t),
('dBtcGbGfxDfll', struct_DroopInt_t),
('dBtcGbSoc', struct_DroopInt_t),
('qAgingGb', struct_LinearInt_t * 2),
('qStaticVoltageOffset', struct_QuadraticInt_t * 2),
('DcTol', ctypes.c_uint16 * 2),
('DcBtcEnabled', ctypes.c_ubyte * 2),
('Padding8_GfxBtc', ctypes.c_ubyte * 2),
('DcBtcMin', ctypes.c_uint16 * 2),
('DcBtcMax', ctypes.c_uint16 * 2),
('DebugOverrides', ctypes.c_uint32),
('ReservedEquation0', struct_QuadraticInt_t),
('ReservedEquation1', struct_QuadraticInt_t),
('ReservedEquation2', struct_QuadraticInt_t),
('ReservedEquation3', struct_QuadraticInt_t),
('TotalPowerConfig', ctypes.c_ubyte),
('TotalPowerSpare1', ctypes.c_ubyte),
('TotalPowerSpare2', ctypes.c_uint16),
('PccThresholdLow', ctypes.c_uint16),
('PccThresholdHigh', ctypes.c_uint16),
('MGpuFanBoostLimitRpm', ctypes.c_uint32),
('PaddingAPCC', ctypes.c_uint32 * 5),
('VDDGFX_TVmin', ctypes.c_uint16),
('VDDSOC_TVmin', ctypes.c_uint16),
('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),
('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),
('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),
('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),
('VDDGFX_TVminHystersis', ctypes.c_uint16),
('VDDSOC_TVminHystersis', ctypes.c_uint16),
('BtcConfig', ctypes.c_uint32),
('SsFmin', ctypes.c_uint16 * 10),
('DcBtcGb', ctypes.c_uint16 * 2),
('Reserved', ctypes.c_uint32 * 8),
('I2cControllers', struct_I2cControllerConfig_t * 8),
('MaxVoltageStepGfx', ctypes.c_uint16),
('MaxVoltageStepSoc', ctypes.c_uint16),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMem0VrMapping', ctypes.c_ubyte),
('VddMem1VrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('SocUlvPhaseSheddingMask', ctypes.c_ubyte),
('ExternalSensorPresent', ctypes.c_ubyte),
('Padding8_V', ctypes.c_ubyte),
('GfxMaxCurrent', ctypes.c_uint16),
('GfxOffset', ctypes.c_byte),
('Padding_TelemetryGfx', ctypes.c_ubyte),
('SocMaxCurrent', ctypes.c_uint16),
('SocOffset', ctypes.c_byte),
('Padding_TelemetrySoc', ctypes.c_ubyte),
('Mem0MaxCurrent', ctypes.c_uint16),
('Mem0Offset', ctypes.c_byte),
('Padding_TelemetryMem0', ctypes.c_ubyte),
('Mem1MaxCurrent', ctypes.c_uint16),
('Mem1Offset', ctypes.c_byte),
('Padding_TelemetryMem1', ctypes.c_ubyte),
('AcDcGpio', ctypes.c_ubyte),
('AcDcPolarity', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('VR1HotGpio', ctypes.c_ubyte),
('VR1HotPolarity', ctypes.c_ubyte),
('GthrGpio', ctypes.c_ubyte),
('GthrPolarity', ctypes.c_ubyte),
('LedPin0', ctypes.c_ubyte),
('LedPin1', ctypes.c_ubyte),
('LedPin2', ctypes.c_ubyte),
('padding8_4', ctypes.c_ubyte),
('PllGfxclkSpreadEnabled', ctypes.c_ubyte),
('PllGfxclkSpreadPercent', ctypes.c_ubyte),
('PllGfxclkSpreadFreq', ctypes.c_uint16),
('DfllGfxclkSpreadEnabled', ctypes.c_ubyte),
('DfllGfxclkSpreadPercent', ctypes.c_ubyte),
('DfllGfxclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadEnabled', ctypes.c_ubyte),
('UclkSpreadPercent', ctypes.c_ubyte),
('UclkSpreadFreq', ctypes.c_uint16),
('SoclkSpreadEnabled', ctypes.c_ubyte),
('SocclkSpreadPercent', ctypes.c_ubyte),
('SocclkSpreadFreq', ctypes.c_uint16),
('TotalBoardPower', ctypes.c_uint16),
('BoardPadding', ctypes.c_uint16),
('MvddRatio', ctypes.c_uint32),
('RenesesLoadLineEnabled', ctypes.c_ubyte),
('GfxLoadlineResistance', ctypes.c_ubyte),
('SocLoadlineResistance', ctypes.c_ubyte),
('Padding8_Loadline', ctypes.c_ubyte),
('BoardReserved', ctypes.c_uint32 * 8),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_smu_11_0_powerplay_table._pack_ = 1 # source:False
struct_smu_11_0_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('od_turbo_power_limit', ctypes.c_uint16),
('od_power_save_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_uint16 * 6),
('power_saving_clock', struct_smu_11_0_power_saving_clock_table),
('overdrive_table', struct_smu_11_0_overdrive_table),
('smc_pptable', struct_PPTable_t),
]
__all__ = \
['SMU_11_0_MAX_ODFEATURE', 'SMU_11_0_MAX_ODSETTING',
'SMU_11_0_MAX_PPCLOCK', 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
'SMU_11_0_ODCAP_AUTO_OC_MEMORY', 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
'SMU_11_0_ODCAP_COUNT', 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODCAP_FAN_CURVE', 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODCAP_GFXCLK_CURVE', 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE', 'SMU_11_0_ODCAP_POWER_LIMIT',
'SMU_11_0_ODCAP_TEMPERATURE_FAN',
'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM', 'SMU_11_0_ODCAP_UCLK_MAX',
'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_ODFEATURE_CAP',
'SMU_11_0_ODFEATURE_COUNT',
'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODFEATURE_FAN_CURVE',
'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
'SMU_11_0_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_ODFEATURE_ID',
'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_11_0_ODFEATURE_POWER_LIMIT',
'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
'SMU_11_0_ODFEATURE_UCLK_MAX', 'SMU_11_0_ODSETTING_ACTIMING',
'SMU_11_0_ODSETTING_AUTOOCENGINE',
'SMU_11_0_ODSETTING_AUTOOCMEMORY',
'SMU_11_0_ODSETTING_AUTOUVENGINE', 'SMU_11_0_ODSETTING_COUNT',
'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
'SMU_11_0_ODSETTING_FANRPMMIN',
'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODSETTING_GFXCLKFMAX', 'SMU_11_0_ODSETTING_GFXCLKFMIN',
'SMU_11_0_ODSETTING_ID', 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
'SMU_11_0_ODSETTING_POWERPERCENTAGE',
'SMU_11_0_ODSETTING_UCLKFMAX',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
'SMU_11_0_PPCLOCK_COUNT', 'SMU_11_0_PPCLOCK_DCEFCLK',
'SMU_11_0_PPCLOCK_DCLK', 'SMU_11_0_PPCLOCK_DISPCLK',
'SMU_11_0_PPCLOCK_ECLK', 'SMU_11_0_PPCLOCK_GFXCLK',
'SMU_11_0_PPCLOCK_ID', 'SMU_11_0_PPCLOCK_PHYCLK',
'SMU_11_0_PPCLOCK_PIXCLK', 'SMU_11_0_PPCLOCK_SOCCLK',
'SMU_11_0_PPCLOCK_UCLK', 'SMU_11_0_PPCLOCK_VCLK',
'SMU_11_0_PPTABLE_H', 'SMU_11_0_PP_OVERDRIVE_VERSION',
'SMU_11_0_PP_PLATFORM_CAP_BACO',
'SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_11_0_PP_PLATFORM_CAP_MACO',
'SMU_11_0_PP_PLATFORM_CAP_POWERPLAY',
'SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_11_0_PP_POWERSAVINGCLOCK_VERSION',
'SMU_11_0_PP_THERMALCONTROLLER_NONE',
'SMU_11_0_TABLE_FORMAT_REVISION', 'struct_DpmDescriptor_t',
'struct_DroopInt_t', 'struct_I2cControllerConfig_t',
'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',
'struct_atom_common_table_header',
'struct_smu_11_0_overdrive_table',
'struct_smu_11_0_power_saving_clock_table',
'struct_smu_11_0_powerplay_table']
================================================
FILE: src/upp/atom_gen/smu_v13_0_7_navi30.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_13_0_7_PPTABLE_H = True # macro
SMU_13_0_7_TABLE_FORMAT_REVISION = 15 # macro
SMU_13_0_7_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_13_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_13_0_7_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_13_0_7_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_13_0_7_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_13_0_7_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_13_0_7_PP_THERMALCONTROLLER_NAVI21 = 28 # macro
SMU_13_0_7_PP_OVERDRIVE_VERSION = 0x83 # macro
SMU_13_0_7_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro
SMU_13_0_7_MAX_ODFEATURE = 32 # macro
SMU_13_0_7_MAX_ODSETTING = 64 # macro
SMU_13_0_7_MAX_PMSETTING = 32 # macro
SMU_13_0_7_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_13_0_7_ODFEATURE_CAP'
SMU_13_0_7_ODFEATURE_CAP__enumvalues = {
0: 'SMU_13_0_7_ODCAP_GFXCLK_LIMITS',
1: 'SMU_13_0_7_ODCAP_UCLK_LIMITS',
2: 'SMU_13_0_7_ODCAP_POWER_LIMIT',
3: 'SMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',
4: 'SMU_13_0_7_ODCAP_FAN_SPEED_MIN',
5: 'SMU_13_0_7_ODCAP_TEMPERATURE_FAN',
6: 'SMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM',
7: 'SMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE',
8: 'SMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',
9: 'SMU_13_0_7_ODCAP_AUTO_UV_ENGINE',
10: 'SMU_13_0_7_ODCAP_AUTO_OC_ENGINE',
11: 'SMU_13_0_7_ODCAP_AUTO_OC_MEMORY',
12: 'SMU_13_0_7_ODCAP_FAN_CURVE',
13: 'SMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
14: 'SMU_13_0_7_ODCAP_POWER_MODE',
15: 'SMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET',
16: 'SMU_13_0_7_ODCAP_COUNT',
}
SMU_13_0_7_ODCAP_GFXCLK_LIMITS = 0
SMU_13_0_7_ODCAP_UCLK_LIMITS = 1
SMU_13_0_7_ODCAP_POWER_LIMIT = 2
SMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT = 3
SMU_13_0_7_ODCAP_FAN_SPEED_MIN = 4
SMU_13_0_7_ODCAP_TEMPERATURE_FAN = 5
SMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM = 6
SMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE = 7
SMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL = 8
SMU_13_0_7_ODCAP_AUTO_UV_ENGINE = 9
SMU_13_0_7_ODCAP_AUTO_OC_ENGINE = 10
SMU_13_0_7_ODCAP_AUTO_OC_MEMORY = 11
SMU_13_0_7_ODCAP_FAN_CURVE = 12
SMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 13
SMU_13_0_7_ODCAP_POWER_MODE = 14
SMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET = 15
SMU_13_0_7_ODCAP_COUNT = 16
SMU_13_0_7_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_13_0_7_ODFEATURE_ID'
SMU_13_0_7_ODFEATURE_ID__enumvalues = {
1: 'SMU_13_0_7_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_13_0_7_ODFEATURE_UCLK_LIMITS',
4: 'SMU_13_0_7_ODFEATURE_POWER_LIMIT',
8: 'SMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',
16: 'SMU_13_0_7_ODFEATURE_FAN_SPEED_MIN',
32: 'SMU_13_0_7_ODFEATURE_TEMPERATURE_FAN',
64: 'SMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM',
128: 'SMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE',
256: 'SMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',
512: 'SMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE',
1024: 'SMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE',
2048: 'SMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY',
4096: 'SMU_13_0_7_ODFEATURE_FAN_CURVE',
8192: 'SMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
16384: 'SMU_13_0_7_ODFEATURE_POWER_MODE',
32768: 'SMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET',
16: 'SMU_13_0_7_ODFEATURE_COUNT',
}
SMU_13_0_7_ODFEATURE_GFXCLK_LIMITS = 1
SMU_13_0_7_ODFEATURE_UCLK_LIMITS = 2
SMU_13_0_7_ODFEATURE_POWER_LIMIT = 4
SMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT = 8
SMU_13_0_7_ODFEATURE_FAN_SPEED_MIN = 16
SMU_13_0_7_ODFEATURE_TEMPERATURE_FAN = 32
SMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM = 64
SMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE = 128
SMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL = 256
SMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE = 512
SMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE = 1024
SMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY = 2048
SMU_13_0_7_ODFEATURE_FAN_CURVE = 4096
SMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 8192
SMU_13_0_7_ODFEATURE_POWER_MODE = 16384
SMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET = 32768
SMU_13_0_7_ODFEATURE_COUNT = 16
SMU_13_0_7_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_13_0_7_ODSETTING_ID'
SMU_13_0_7_ODSETTING_ID__enumvalues = {
0: 'SMU_13_0_7_ODSETTING_GFXCLKFMAX',
1: 'SMU_13_0_7_ODSETTING_GFXCLKFMIN',
2: 'SMU_13_0_7_ODSETTING_UCLKFMIN',
3: 'SMU_13_0_7_ODSETTING_UCLKFMAX',
4: 'SMU_13_0_7_ODSETTING_POWERPERCENTAGE',
5: 'SMU_13_0_7_ODSETTING_FANRPMMIN',
6: 'SMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT',
7: 'SMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE',
8: 'SMU_13_0_7_ODSETTING_OPERATINGTEMPMAX',
9: 'SMU_13_0_7_ODSETTING_ACTIMING',
10: 'SMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',
11: 'SMU_13_0_7_ODSETTING_AUTOUVENGINE',
12: 'SMU_13_0_7_ODSETTING_AUTOOCENGINE',
13: 'SMU_13_0_7_ODSETTING_AUTOOCMEMORY',
14: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',
15: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1',
16: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',
17: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2',
18: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',
19: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3',
20: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',
21: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4',
22: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',
23: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5',
24: 'SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
25: 'SMU_13_0_7_ODSETTING_POWER_MODE',
26: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1',
27: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2',
28: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3',
29: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4',
30: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5',
31: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6',
32: 'SMU_13_0_7_ODSETTING_COUNT',
}
SMU_13_0_7_ODSETTING_GFXCLKFMAX = 0
SMU_13_0_7_ODSETTING_GFXCLKFMIN = 1
SMU_13_0_7_ODSETTING_UCLKFMIN = 2
SMU_13_0_7_ODSETTING_UCLKFMAX = 3
SMU_13_0_7_ODSETTING_POWERPERCENTAGE = 4
SMU_13_0_7_ODSETTING_FANRPMMIN = 5
SMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT = 6
SMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE = 7
SMU_13_0_7_ODSETTING_OPERATINGTEMPMAX = 8
SMU_13_0_7_ODSETTING_ACTIMING = 9
SMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL = 10
SMU_13_0_7_ODSETTING_AUTOUVENGINE = 11
SMU_13_0_7_ODSETTING_AUTOOCENGINE = 12
SMU_13_0_7_ODSETTING_AUTOOCMEMORY = 13
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1 = 14
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1 = 15
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2 = 16
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2 = 17
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3 = 18
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3 = 19
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4 = 20
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4 = 21
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5 = 22
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5 = 23
SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 24
SMU_13_0_7_ODSETTING_POWER_MODE = 25
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1 = 26
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2 = 27
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3 = 28
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4 = 29
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5 = 30
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6 = 31
SMU_13_0_7_ODSETTING_COUNT = 32
SMU_13_0_7_ODSETTING_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_13_0_7_PWRMODE_SETTING'
SMU_13_0_7_PWRMODE_SETTING__enumvalues = {
0: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET',
1: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE',
2: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO',
3: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE',
4: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',
5: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',
6: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',
7: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',
8: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',
9: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',
10: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',
11: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',
12: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',
13: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',
14: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',
15: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',
}
SMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET = 0
SMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE = 1
SMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO = 2
SMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE = 3
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET = 4
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO = 6
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE = 7
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET = 8
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE = 9
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO = 10
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE = 11
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET = 12
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE = 13
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO = 14
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE = 15
SMU_13_0_7_PWRMODE_SETTING = ctypes.c_uint32 # enum
class struct_smu_13_0_7_overdrive_table(Structure):
pass
struct_smu_13_0_7_overdrive_table._pack_ = 1 # source:False
struct_smu_13_0_7_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 64),
('min', ctypes.c_uint32 * 64),
('pm_setting', ctypes.c_int16 * 32),
]
# values for enumeration 'SMU_13_0_7_PPCLOCK_ID'
SMU_13_0_7_PPCLOCK_ID__enumvalues = {
0: 'SMU_13_0_7_PPCLOCK_GFXCLK',
1: 'SMU_13_0_7_PPCLOCK_SOCCLK',
2: 'SMU_13_0_7_PPCLOCK_UCLK',
3: 'SMU_13_0_7_PPCLOCK_FCLK',
4: 'SMU_13_0_7_PPCLOCK_DCLK_0',
5: 'SMU_13_0_7_PPCLOCK_VCLK_0',
6: 'SMU_13_0_7_PPCLOCK_DCLK_1',
7: 'SMU_13_0_7_PPCLOCK_VCLK_1',
8: 'SMU_13_0_7_PPCLOCK_DCEFCLK',
9: 'SMU_13_0_7_PPCLOCK_DISPCLK',
10: 'SMU_13_0_7_PPCLOCK_PIXCLK',
11: 'SMU_13_0_7_PPCLOCK_PHYCLK',
12: 'SMU_13_0_7_PPCLOCK_DTBCLK',
13: 'SMU_13_0_7_PPCLOCK_COUNT',
}
SMU_13_0_7_PPCLOCK_GFXCLK = 0
SMU_13_0_7_PPCLOCK_SOCCLK = 1
SMU_13_0_7_PPCLOCK_UCLK = 2
SMU_13_0_7_PPCLOCK_FCLK = 3
SMU_13_0_7_PPCLOCK_DCLK_0 = 4
SMU_13_0_7_PPCLOCK_VCLK_0 = 5
SMU_13_0_7_PPCLOCK_DCLK_1 = 6
SMU_13_0_7_PPCLOCK_VCLK_1 = 7
SMU_13_0_7_PPCLOCK_DCEFCLK = 8
SMU_13_0_7_PPCLOCK_DISPCLK = 9
SMU_13_0_7_PPCLOCK_PIXCLK = 10
SMU_13_0_7_PPCLOCK_PHYCLK = 11
SMU_13_0_7_PPCLOCK_DTBCLK = 12
SMU_13_0_7_PPCLOCK_COUNT = 13
SMU_13_0_7_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_13_0_7_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_SkuTable_t(Structure):
pass
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('Padding', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('CalculateFopt', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('Padding3', ctypes.c_uint32 * 3),
('Padding4', ctypes.c_uint16),
('FoptimalDc', ctypes.c_uint16),
('FoptimalAc', ctypes.c_uint16),
('Padding2', ctypes.c_uint16),
]
class struct_AvfsDcBtcParams_t(Structure):
pass
struct_AvfsDcBtcParams_t._pack_ = 1 # source:False
struct_AvfsDcBtcParams_t._fields_ = [
('DcBtcEnabled', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 3),
('DcTol', ctypes.c_uint16),
('DcBtcGb', ctypes.c_uint16),
('DcBtcMin', ctypes.c_uint16),
('DcBtcMax', ctypes.c_uint16),
('DcBtcGbScalar', struct_LinearInt_t),
]
class struct_AvfsFuseOverride_t(Structure):
pass
struct_AvfsFuseOverride_t._pack_ = 1 # source:False
struct_AvfsFuseOverride_t._fields_ = [
('AvfsTemp', ctypes.c_uint16 * 2),
('VftFMin', ctypes.c_uint16),
('VInversion', ctypes.c_uint16),
('qVft', struct_QuadraticInt_t * 2),
('qAvfsGb', struct_QuadraticInt_t),
('qAvfsGb2', struct_QuadraticInt_t),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_BootValues_t(Structure):
pass
struct_BootValues_t._pack_ = 1 # source:False
struct_BootValues_t._fields_ = [
('InitGfxclk_bypass', ctypes.c_uint16),
('InitSocclk', ctypes.c_uint16),
('InitMp0clk', ctypes.c_uint16),
('InitMpioclk', ctypes.c_uint16),
('InitSmnclk', ctypes.c_uint16),
('InitUcpclk', ctypes.c_uint16),
('InitCsrclk', ctypes.c_uint16),
('InitDprefclk', ctypes.c_uint16),
('InitDcfclk', ctypes.c_uint16),
('InitDtbclk', ctypes.c_uint16),
('InitDclk', ctypes.c_uint16),
('InitVclk', ctypes.c_uint16),
('InitUsbdfsclk', ctypes.c_uint16),
('InitMp1clk', ctypes.c_uint16),
('InitLclk', ctypes.c_uint16),
('InitBaco400clk_bypass', ctypes.c_uint16),
('InitBaco1200clk_bypass', ctypes.c_uint16),
('InitBaco700clk_bypass', ctypes.c_uint16),
('InitFclk', ctypes.c_uint16),
('InitGfxclk_clkb', ctypes.c_uint16),
('InitUclkDPMState', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 3),
('InitVcoFreqPll0', ctypes.c_uint32),
('InitVcoFreqPll1', ctypes.c_uint32),
('InitVcoFreqPll2', ctypes.c_uint32),
('InitVcoFreqPll3', ctypes.c_uint32),
('InitVcoFreqPll4', ctypes.c_uint32),
('InitVcoFreqPll5', ctypes.c_uint32),
('InitVcoFreqPll6', ctypes.c_uint32),
('InitGfx', ctypes.c_uint16),
('InitSoc', ctypes.c_uint16),
('InitU', ctypes.c_uint16),
('Padding2', ctypes.c_uint16),
('Spare', ctypes.c_uint32 * 8),
]
class struct_DriverReportedClocks_t(Structure):
pass
struct_DriverReportedClocks_t._pack_ = 1 # source:False
struct_DriverReportedClocks_t._fields_ = [
('BaseClockAc', ctypes.c_uint16),
('GameClockAc', ctypes.c_uint16),
('BoostClockAc', ctypes.c_uint16),
('BaseClockDc', ctypes.c_uint16),
('GameClockDc', ctypes.c_uint16),
('BoostClockDc', ctypes.c_uint16),
('Reserved', ctypes.c_uint32 * 4),
]
class struct_MsgLimits_t(Structure):
pass
struct_MsgLimits_t._pack_ = 1 # source:False
struct_MsgLimits_t._fields_ = [
('Power', ctypes.c_uint16 * 2 * 4),
('Tdc', ctypes.c_uint16 * 3),
('Temperature', ctypes.c_uint16 * 13),
('PwmLimitMin', ctypes.c_ubyte),
('PwmLimitMax', ctypes.c_ubyte),
('FanTargetTemperature', ctypes.c_ubyte),
('Spare1', ctypes.c_ubyte * 1),
('AcousticTargetRpmThresholdMin', ctypes.c_uint16),
('AcousticTargetRpmThresholdMax', ctypes.c_uint16),
('AcousticLimitRpmThresholdMin', ctypes.c_uint16),
('AcousticLimitRpmThresholdMax', ctypes.c_uint16),
('PccLimitMin', ctypes.c_uint16),
('PccLimitMax', ctypes.c_uint16),
('FanStopTempMin', ctypes.c_uint16),
('FanStopTempMax', ctypes.c_uint16),
('FanStartTempMin', ctypes.c_uint16),
('FanStartTempMax', ctypes.c_uint16),
('PowerMinPpt0', ctypes.c_uint16 * 2),
('Spare', ctypes.c_uint32 * 11),
]
class struct_OverDriveLimits_t(Structure):
pass
struct_OverDriveLimits_t._pack_ = 1 # source:False
struct_OverDriveLimits_t._fields_ = [
('FeatureCtrlMask', ctypes.c_uint32),
('VoltageOffsetPerZoneBoundary', ctypes.c_int16),
('Reserved1', ctypes.c_uint16),
('Reserved2', ctypes.c_uint16),
('GfxclkFmin', ctypes.c_int16),
('GfxclkFmax', ctypes.c_int16),
('UclkFmin', ctypes.c_uint16),
('UclkFmax', ctypes.c_uint16),
('Ppt', ctypes.c_int16),
('Tdc', ctypes.c_int16),
('FanLinearPwmPoints', ctypes.c_ubyte),
('FanLinearTempPoints', ctypes.c_ubyte),
('FanMinimumPwm', ctypes.c_uint16),
('AcousticTargetRpmThreshold', ctypes.c_uint16),
('AcousticLimitRpmThreshold', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanZeroRpmStopTemp', ctypes.c_ubyte),
('FanMode', ctypes.c_ubyte),
('MaxOpTemp', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 4),
('Spare', ctypes.c_uint32 * 12),
]
struct_SkuTable_t._pack_ = 1 # source:False
struct_SkuTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('TotalPowerConfig', ctypes.c_ubyte),
('CustomerVariant', ctypes.c_ubyte),
('MemoryTemperatureTypeMask', ctypes.c_ubyte),
('SmartShiftVersion', ctypes.c_ubyte),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitDc', ctypes.c_uint16 * 4),
('SocketPowerLimitSmartShift2', ctypes.c_uint16),
('EnableLegacyPptLimit', ctypes.c_ubyte),
('UseInputTelemetry', ctypes.c_ubyte),
('SmartShiftMinReportedPptinDcs', ctypes.c_ubyte),
('PaddingPpt', ctypes.c_ubyte * 1),
('VrTdcLimit', ctypes.c_uint16 * 3),
('PlatformTdcLimit', ctypes.c_uint16 * 3),
('TemperatureLimit', ctypes.c_uint16 * 13),
('HwCtfTempLimit', ctypes.c_uint16),
('PaddingInfra', ctypes.c_uint16),
('FitControllerFailureRateLimit', ctypes.c_uint32),
('FitControllerGfxDutyCycle', ctypes.c_uint32),
('FitControllerSocDutyCycle', ctypes.c_uint32),
('FitControllerSocOffset', ctypes.c_uint32),
('GfxApccPlusResidencyLimit', ctypes.c_uint32),
('ThrottlerControlMask', ctypes.c_uint32),
('FwDStateMask', ctypes.c_uint32),
('UlvVoltageOffset', ctypes.c_uint16 * 2),
('UlvVoltageOffsetU', ctypes.c_uint16),
('DeepUlvVoltageOffsetSoc', ctypes.c_uint16),
('DefaultMaxVoltage', ctypes.c_uint16 * 2),
('BoostMaxVoltage', ctypes.c_uint16 * 2),
('VminTempHystersis', ctypes.c_int16 * 2),
('VminTempThreshold', ctypes.c_int16 * 2),
('Vmin_Hot_T0', ctypes.c_uint16 * 2),
('Vmin_Cold_T0', ctypes.c_uint16 * 2),
('Vmin_Hot_Eol', ctypes.c_uint16 * 2),
('Vmin_Cold_Eol', ctypes.c_uint16 * 2),
('Vmin_Aging_Offset', ctypes.c_uint16 * 2),
('Spare_Vmin_Plat_Offset_Hot', ctypes.c_uint16 * 2),
('Spare_Vmin_Plat_Offset_Cold', ctypes.c_uint16 * 2),
('VcBtcFixedVminAgingOffset', ctypes.c_uint16 * 2),
('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16 * 2),
('VcBtcPsmA', ctypes.c_uint32 * 2),
('VcBtcPsmB', ctypes.c_uint32 * 2),
('VcBtcVminA', ctypes.c_uint32 * 2),
('VcBtcVminB', ctypes.c_uint32 * 2),
('PerPartVminEnabled', ctypes.c_ubyte * 2),
('VcBtcEnabled', ctypes.c_ubyte * 2),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),
('Vmin_droop', struct_QuadraticInt_t),
('SpareVmin', ctypes.c_uint32 * 9),
('DpmDescriptor', struct_DpmDescriptor_t * 13),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTableDppClk', ctypes.c_uint16 * 8),
('FreqTableDprefclk', ctypes.c_uint16 * 8),
('FreqTableDcfclk', ctypes.c_uint16 * 8),
('FreqTableDtbclk', ctypes.c_uint16 * 8),
('FreqTableFclk', ctypes.c_uint16 * 8),
('DcModeMaxFreq', ctypes.c_uint32 * 13),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('GfxclkSpare', ctypes.c_ubyte * 2),
('GfxclkFreqCap', ctypes.c_uint16),
('GfxclkFgfxoffEntry', ctypes.c_uint16),
('GfxclkFgfxoffExitImu', ctypes.c_uint16),
('GfxclkFgfxoffExitRlc', ctypes.c_uint16),
('GfxclkThrottleClock', ctypes.c_uint16),
('EnableGfxPowerStagesGpio', ctypes.c_ubyte),
('GfxIdlePadding', ctypes.c_ubyte),
('SmsRepairWRCKClkDivEn', ctypes.c_ubyte),
('SmsRepairWRCKClkDivVal', ctypes.c_ubyte),
('GfxOffEntryEarlyMGCGEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGDelayEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGDelayVal', ctypes.c_ubyte),
('GfxclkFreqGfxUlv', ctypes.c_uint16),
('GfxIdlePadding2', ctypes.c_ubyte * 2),
('GfxOffEntryHysteresis', ctypes.c_uint32),
('GfxoffSpare', ctypes.c_uint32 * 15),
('DfllBtcMasterScalerM', ctypes.c_uint32),
('DfllBtcMasterScalerB', ctypes.c_int32),
('DfllBtcSlaveScalerM', ctypes.c_uint32),
('DfllBtcSlaveScalerB', ctypes.c_int32),
('DfllPccAsWaitCtrl', ctypes.c_uint32),
('DfllPccAsStepCtrl', ctypes.c_uint32),
('GfxGpoSpare', ctypes.c_uint32 * 10),
('DcsGfxOffVoltage', ctypes.c_uint16),
('PaddingDcs', ctypes.c_uint16),
('DcsMinGfxOffTime', ctypes.c_uint16),
('DcsMaxGfxOffTime', ctypes.c_uint16),
('DcsMinCreditAccum', ctypes.c_uint32),
('DcsExitHysteresis', ctypes.c_uint16),
('DcsTimeout', ctypes.c_uint16),
('DcsSpare', ctypes.c_uint32 * 14),
('ShadowFreqTableUclk', ctypes.c_uint16 * 4),
('UseStrobeModeOptimizations', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 3),
('UclkDpmPstates', ctypes.c_ubyte * 4),
('FreqTableUclkDiv', ctypes.c_ubyte * 4),
('MemVmempVoltage', ctypes.c_uint16 * 4),
('MemVddioVoltage', ctypes.c_uint16 * 4),
('FclkDpmUPstates', ctypes.c_ubyte * 8),
('FclkDpmVddU', ctypes.c_uint16 * 8),
('FclkDpmUSpeed', ctypes.c_uint16 * 8),
('FclkDpmDisallowPstateFreq', ctypes.c_uint16),
('PaddingFclk', ctypes.c_uint16),
('PcieGenSpeed', ctypes.c_ubyte * 3),
('PcieLaneCount', ctypes.c_ubyte * 3),
('LclkFreq', ctypes.c_uint16 * 3),
('FanStopTemp', ctypes.c_uint16 * 13),
('FanStartTemp', ctypes.c_uint16 * 13),
('FanGain', ctypes.c_uint16 * 13),
('FanGainPadding', ctypes.c_uint16),
('FanPwmMin', ctypes.c_uint16),
('AcousticTargetRpmThreshold', ctypes.c_uint16),
('AcousticLimitRpmThreshold', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('MGpuAcousticLimitRpmThreshold', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('TempInputSelectMask', ctypes.c_uint32),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FanTargetTemperature', ctypes.c_uint16 * 13),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('FwCtfLimit', ctypes.c_uint16 * 13),
('IntakeTempEnableRPM', ctypes.c_uint16),
('IntakeTempOffsetTemp', ctypes.c_int16),
('IntakeTempReleaseTemp', ctypes.c_uint16),
('IntakeTempHighIntakeAcousticLimit', ctypes.c_uint16),
('IntakeTempAcouticLimitReleaseRate', ctypes.c_uint16),
('FanAbnormalTempLimitOffset', ctypes.c_int16),
('FanStalledTriggerRpm', ctypes.c_uint16),
('FanAbnormalTriggerRpmCoeff', ctypes.c_uint16),
('FanAbnormalDetectionEnable', ctypes.c_uint16),
('FanIntakeSensorSupport', ctypes.c_ubyte),
('FanIntakePadding', ctypes.c_ubyte * 3),
('FanSpare', ctypes.c_uint32 * 13),
('OverrideGfxAvfsFuses', ctypes.c_ubyte),
('GfxAvfsPadding', ctypes.c_ubyte * 3),
('L2HwRtAvfsFuses', ctypes.c_uint32 * 32),
('SeHwRtAvfsFuses', ctypes.c_uint32 * 32),
('CommonRtAvfs', ctypes.c_uint32 * 13),
('L2FwRtAvfsFuses', ctypes.c_uint32 * 19),
('SeFwRtAvfsFuses', ctypes.c_uint32 * 19),
('Droop_PWL_F', ctypes.c_uint32 * 5),
('Droop_PWL_a', ctypes.c_uint32 * 5),
('Droop_PWL_b', ctypes.c_uint32 * 5),
('Droop_PWL_c', ctypes.c_uint32 * 5),
('Static_PWL_Offset', ctypes.c_uint32 * 5),
('dGbV_dT_vmin', ctypes.c_uint32),
('dGbV_dT_vmax', ctypes.c_uint32),
('V2F_vmin_range_low', ctypes.c_uint32),
('V2F_vmin_range_high', ctypes.c_uint32),
('V2F_vmax_range_low', ctypes.c_uint32),
('V2F_vmax_range_high', ctypes.c_uint32),
('DcBtcGfxParams', struct_AvfsDcBtcParams_t),
('GfxAvfsSpare', ctypes.c_uint32 * 32),
('OverrideSocAvfsFuses', ctypes.c_ubyte),
('MinSocAvfsRevision', ctypes.c_ubyte),
('SocAvfsPadding', ctypes.c_ubyte * 2),
('SocAvfsFuseOverride', struct_AvfsFuseOverride_t * 3),
('dBtcGbSoc', struct_DroopInt_t * 3),
('qAgingGb', struct_LinearInt_t * 3),
('qStaticVoltageOffset', struct_QuadraticInt_t * 3),
('DcBtcSocParams', struct_AvfsDcBtcParams_t * 3),
('SocAvfsSpare', ctypes.c_uint32 * 32),
('BootValues', struct_BootValues_t),
('DriverReportedClocks', struct_DriverReportedClocks_t),
('MsgLimits', struct_MsgLimits_t),
('OverDriveLimitsMin', struct_OverDriveLimits_t),
('OverDriveLimitsBasicMax', struct_OverDriveLimits_t),
('OverDriveLimitsAdvancedMax', struct_OverDriveLimits_t),
('DebugOverrides', ctypes.c_uint32),
('TotalBoardPowerSupport', ctypes.c_ubyte),
('TotalBoardPowerPadding', ctypes.c_ubyte * 3),
('TotalIdleBoardPowerM', ctypes.c_int16),
('TotalIdleBoardPowerB', ctypes.c_int16),
('TotalBoardPowerM', ctypes.c_int16),
('TotalBoardPowerB', ctypes.c_int16),
('qFeffCoeffGameClock', struct_QuadraticInt_t * 2),
('qFeffCoeffBaseClock', struct_QuadraticInt_t * 2),
('qFeffCoeffBoostClock', struct_QuadraticInt_t * 2),
('Spare', ctypes.c_uint32 * 43),
('MmHubPadding', ctypes.c_uint32 * 8),
]
class struct_BoardTable_t(Structure):
pass
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('SlaveAddress', ctypes.c_ubyte),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
('PaddingConfig', ctypes.c_ubyte),
]
class struct_SviTelemetryScale_t(Structure):
pass
struct_SviTelemetryScale_t._pack_ = 1 # source:False
struct_SviTelemetryScale_t._fields_ = [
('Offset', ctypes.c_byte),
('Padding', ctypes.c_ubyte),
('MaxCurrent', ctypes.c_uint16),
]
struct_BoardTable_t._pack_ = 1 # source:False
struct_BoardTable_t._fields_ = [
('Version', ctypes.c_uint32),
('I2cControllers', struct_I2cControllerConfig_t * 8),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMem0VrMapping', ctypes.c_ubyte),
('VddMem1VrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('SocUlvPhaseSheddingMask', ctypes.c_ubyte),
('VmempUlvPhaseSheddingMask', ctypes.c_ubyte),
('VddioUlvPhaseSheddingMask', ctypes.c_ubyte),
('SlaveAddrMapping', ctypes.c_ubyte * 5),
('VrPsiSupport', ctypes.c_ubyte * 5),
('PaddingPsi', ctypes.c_ubyte * 5),
('EnablePsi6', ctypes.c_ubyte * 5),
('SviTelemetryScale', struct_SviTelemetryScale_t * 5),
('VoltageTelemetryRatio', ctypes.c_uint32 * 5),
('DownSlewRateVr', ctypes.c_ubyte * 5),
('LedOffGpio', ctypes.c_ubyte),
('FanOffGpio', ctypes.c_ubyte),
('GfxVrPowerStageOffGpio', ctypes.c_ubyte),
('AcDcGpio', ctypes.c_ubyte),
('AcDcPolarity', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('GthrGpio', ctypes.c_ubyte),
('GthrPolarity', ctypes.c_ubyte),
('LedPin0', ctypes.c_ubyte),
('LedPin1', ctypes.c_ubyte),
('LedPin2', ctypes.c_ubyte),
('LedEnableMask', ctypes.c_ubyte),
('LedPcie', ctypes.c_ubyte),
('LedError', ctypes.c_ubyte),
('UclkTrainingModeSpreadPercent', ctypes.c_ubyte),
('UclkSpreadPadding', ctypes.c_ubyte),
('UclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadPercent', ctypes.c_ubyte * 16),
('FclkSpreadPadding', ctypes.c_ubyte),
('FclkSpreadPercent', ctypes.c_ubyte),
('FclkSpreadFreq', ctypes.c_uint16),
('DramWidth', ctypes.c_ubyte),
('PaddingMem1', ctypes.c_ubyte * 7),
('HsrEnabled', ctypes.c_ubyte),
('VddqOffEnabled', ctypes.c_ubyte),
('PaddingUmcFlags', ctypes.c_ubyte * 2),
('PostVoltageSetBacoDelay', ctypes.c_uint32),
('BacoEntryDelay', ctypes.c_uint32),
('FuseWritePowerMuxPresent', ctypes.c_ubyte),
('FuseWritePadding', ctypes.c_ubyte * 3),
('BoardSpare', ctypes.c_uint32 * 63),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('SkuTable', struct_SkuTable_t),
('BoardTable', struct_BoardTable_t),
]
struct_smu_13_0_7_powerplay_table._pack_ = 1 # source:False
struct_smu_13_0_7_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('padding', ctypes.c_ubyte),
('table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_uint32 * 45),
('overdrive_table', struct_smu_13_0_7_overdrive_table),
('padding1', ctypes.c_ubyte),
('smc_pptable', struct_PPTable_t),
]
__all__ = \
['SMU_13_0_7_MAX_ODFEATURE', 'SMU_13_0_7_MAX_ODSETTING',
'SMU_13_0_7_MAX_PMSETTING', 'SMU_13_0_7_MAX_PPCLOCK',
'SMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_13_0_7_ODCAP_AUTO_OC_ENGINE',
'SMU_13_0_7_ODCAP_AUTO_OC_MEMORY',
'SMU_13_0_7_ODCAP_AUTO_UV_ENGINE', 'SMU_13_0_7_ODCAP_COUNT',
'SMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',
'SMU_13_0_7_ODCAP_FAN_CURVE', 'SMU_13_0_7_ODCAP_FAN_SPEED_MIN',
'SMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',
'SMU_13_0_7_ODCAP_GFXCLK_LIMITS',
'SMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE',
'SMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET',
'SMU_13_0_7_ODCAP_POWER_LIMIT', 'SMU_13_0_7_ODCAP_POWER_MODE',
'SMU_13_0_7_ODCAP_TEMPERATURE_FAN',
'SMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM',
'SMU_13_0_7_ODCAP_UCLK_LIMITS',
'SMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE',
'SMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY',
'SMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE', 'SMU_13_0_7_ODFEATURE_CAP',
'SMU_13_0_7_ODFEATURE_COUNT',
'SMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'SMU_13_0_7_ODFEATURE_FAN_CURVE',
'SMU_13_0_7_ODFEATURE_FAN_SPEED_MIN',
'SMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'SMU_13_0_7_ODFEATURE_GFXCLK_LIMITS', 'SMU_13_0_7_ODFEATURE_ID',
'SMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET',
'SMU_13_0_7_ODFEATURE_POWER_LIMIT',
'SMU_13_0_7_ODFEATURE_POWER_MODE',
'SMU_13_0_7_ODFEATURE_TEMPERATURE_FAN',
'SMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM',
'SMU_13_0_7_ODFEATURE_UCLK_LIMITS',
'SMU_13_0_7_ODSETTING_ACTIMING',
'SMU_13_0_7_ODSETTING_AUTOOCENGINE',
'SMU_13_0_7_ODSETTING_AUTOOCMEMORY',
'SMU_13_0_7_ODSETTING_AUTOUVENGINE',
'SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_13_0_7_ODSETTING_COUNT',
'SMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT',
'SMU_13_0_7_ODSETTING_FANRPMMIN',
'SMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE',
'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1',
'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2',
'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3',
'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4',
'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5',
'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',
'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',
'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',
'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',
'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',
'SMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',
'SMU_13_0_7_ODSETTING_GFXCLKFMAX',
'SMU_13_0_7_ODSETTING_GFXCLKFMIN', 'SMU_13_0_7_ODSETTING_ID',
'SMU_13_0_7_ODSETTING_OPERATINGTEMPMAX',
'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1',
'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2',
'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3',
'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4',
'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5',
'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6',
'SMU_13_0_7_ODSETTING_POWERPERCENTAGE',
'SMU_13_0_7_ODSETTING_POWER_MODE',
'SMU_13_0_7_ODSETTING_UCLKFMAX', 'SMU_13_0_7_ODSETTING_UCLKFMIN',
'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',
'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',
'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',
'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',
'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',
'SMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE',
'SMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET',
'SMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE',
'SMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO',
'SMU_13_0_7_PPCLOCK_COUNT', 'SMU_13_0_7_PPCLOCK_DCEFCLK',
'SMU_13_0_7_PPCLOCK_DCLK_0', 'SMU_13_0_7_PPCLOCK_DCLK_1',
'SMU_13_0_7_PPCLOCK_DISPCLK', 'SMU_13_0_7_PPCLOCK_DTBCLK',
'SMU_13_0_7_PPCLOCK_FCLK', 'SMU_13_0_7_PPCLOCK_GFXCLK',
'SMU_13_0_7_PPCLOCK_ID', 'SMU_13_0_7_PPCLOCK_PHYCLK',
'SMU_13_0_7_PPCLOCK_PIXCLK', 'SMU_13_0_7_PPCLOCK_SOCCLK',
'SMU_13_0_7_PPCLOCK_UCLK', 'SMU_13_0_7_PPCLOCK_VCLK_0',
'SMU_13_0_7_PPCLOCK_VCLK_1', 'SMU_13_0_7_PPTABLE_H',
'SMU_13_0_7_PP_OVERDRIVE_VERSION',
'SMU_13_0_7_PP_PLATFORM_CAP_BACO',
'SMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_13_0_7_PP_PLATFORM_CAP_MACO',
'SMU_13_0_7_PP_PLATFORM_CAP_POWERPLAY',
'SMU_13_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_13_0_7_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_13_0_7_PP_POWERSAVINGCLOCK_VERSION',
'SMU_13_0_7_PP_THERMALCONTROLLER_NAVI21',
'SMU_13_0_7_PP_THERMALCONTROLLER_NONE',
'SMU_13_0_7_PWRMODE_SETTING', 'SMU_13_0_7_TABLE_FORMAT_REVISION',
'struct_AvfsDcBtcParams_t', 'struct_AvfsFuseOverride_t',
'struct_BoardTable_t', 'struct_BootValues_t',
'struct_DpmDescriptor_t', 'struct_DriverReportedClocks_t',
'struct_DroopInt_t', 'struct_I2cControllerConfig_t',
'struct_LinearInt_t', 'struct_MsgLimits_t',
'struct_OverDriveLimits_t', 'struct_PPTable_t',
'struct_QuadraticInt_t', 'struct_SkuTable_t',
'struct_SviTelemetryScale_t', 'struct_atom_common_table_header',
'struct_smu_13_0_7_overdrive_table',
'struct_smu_13_0_7_powerplay_table']
================================================
FILE: src/upp/atom_gen/smu_v14_0_2_navi40.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_14_0_2_PPTABLE_H = True # macro
SMU_14_0_2_TABLE_FORMAT_REVISION = 23 # macro
SMU_14_0_2_CUSTOM_TABLE_FORMAT_REVISION = 1 # macro
SMU_14_0_2_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_14_0_2_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_14_0_2_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_14_0_2_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_14_0_2_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_14_0_2_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_14_0_2_PP_PLATFORM_CAP_LEDSUPPORTED = 0x40 # macro
SMU_14_0_2_PP_PLATFORM_CAP_MOBILEOVERDRIVE = 0x80 # macro
SMU_14_0_2_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_14_0_2_PP_OVERDRIVE_VERSION = 0x1 # macro
SMU_14_0_2_PP_CUSTOM_OVERDRIVE_VERSION = 0x1 # macro
SMU_14_0_2_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro
SMU_14_0_2_MAX_ODFEATURE = 32 # macro
SMU_14_0_2_MAX_ODSETTING = 64 # macro
SMU_14_0_2_MAX_PMSETTING = 32 # macro
# values for enumeration 'SMU_14_0_2_OD_SW_FEATURE_CAP'
SMU_14_0_2_OD_SW_FEATURE_CAP__enumvalues = {
0: 'SMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
1: 'SMU_14_0_2_ODCAP_POWER_MODE',
2: 'SMU_14_0_2_ODCAP_AUTO_UV_ENGINE',
3: 'SMU_14_0_2_ODCAP_AUTO_OC_ENGINE',
4: 'SMU_14_0_2_ODCAP_AUTO_OC_MEMORY',
5: 'SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE',
6: 'SMU_14_0_2_ODCAP_MANUAL_AC_TIMING',
7: 'SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER',
8: 'SMU_14_0_2_ODCAP_AUTO_SOC_UV',
9: 'SMU_14_0_2_ODCAP_COUNT',
}
SMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 0
SMU_14_0_2_ODCAP_POWER_MODE = 1
SMU_14_0_2_ODCAP_AUTO_UV_ENGINE = 2
SMU_14_0_2_ODCAP_AUTO_OC_ENGINE = 3
SMU_14_0_2_ODCAP_AUTO_OC_MEMORY = 4
SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE = 5
SMU_14_0_2_ODCAP_MANUAL_AC_TIMING = 6
SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER = 7
SMU_14_0_2_ODCAP_AUTO_SOC_UV = 8
SMU_14_0_2_ODCAP_COUNT = 9
SMU_14_0_2_OD_SW_FEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_14_0_2_OD_SW_FEATURE_ID'
SMU_14_0_2_OD_SW_FEATURE_ID__enumvalues = {
1: 'SMU_14_0_2_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
2: 'SMU_14_0_2_ODFEATURE_POWER_MODE',
4: 'SMU_14_0_2_ODFEATURE_AUTO_UV_ENGINE',
8: 'SMU_14_0_2_ODFEATURE_AUTO_OC_ENGINE',
16: 'SMU_14_0_2_ODFEATURE_AUTO_OC_MEMORY',
32: 'SMU_14_0_2_ODFEATURE_MEMORY_TIMING_TUNE',
64: 'SMU_14_0_2_ODFEATURE_MANUAL_AC_TIMING',
128: 'SMU_14_0_2_ODFEATURE_AUTO_VF_CURVE_OPTIMIZER',
256: 'SMU_14_0_2_ODFEATURE_AUTO_SOC_UV',
}
SMU_14_0_2_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 1
SMU_14_0_2_ODFEATURE_POWER_MODE = 2
SMU_14_0_2_ODFEATURE_AUTO_UV_ENGINE = 4
SMU_14_0_2_ODFEATURE_AUTO_OC_ENGINE = 8
SMU_14_0_2_ODFEATURE_AUTO_OC_MEMORY = 16
SMU_14_0_2_ODFEATURE_MEMORY_TIMING_TUNE = 32
SMU_14_0_2_ODFEATURE_MANUAL_AC_TIMING = 64
SMU_14_0_2_ODFEATURE_AUTO_VF_CURVE_OPTIMIZER = 128
SMU_14_0_2_ODFEATURE_AUTO_SOC_UV = 256
SMU_14_0_2_OD_SW_FEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_14_0_2_OD_SW_FEATURE_SETTING_ID'
SMU_14_0_2_OD_SW_FEATURE_SETTING_ID__enumvalues = {
0: 'SMU_14_0_2_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
1: 'SMU_14_0_2_ODSETTING_POWER_MODE',
2: 'SMU_14_0_2_ODSETTING_AUTOUVENGINE',
3: 'SMU_14_0_2_ODSETTING_AUTOOCENGINE',
4: 'SMU_14_0_2_ODSETTING_AUTOOCMEMORY',
5: 'SMU_14_0_2_ODSETTING_ACTIMING',
6: 'SMU_14_0_2_ODSETTING_MANUAL_AC_TIMING',
7: 'SMU_14_0_2_ODSETTING_AUTO_VF_CURVE_OPTIMIZER',
8: 'SMU_14_0_2_ODSETTING_AUTO_SOC_UV',
9: 'SMU_14_0_2_ODSETTING_COUNT',
}
SMU_14_0_2_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 0
SMU_14_0_2_ODSETTING_POWER_MODE = 1
SMU_14_0_2_ODSETTING_AUTOUVENGINE = 2
SMU_14_0_2_ODSETTING_AUTOOCENGINE = 3
SMU_14_0_2_ODSETTING_AUTOOCMEMORY = 4
SMU_14_0_2_ODSETTING_ACTIMING = 5
SMU_14_0_2_ODSETTING_MANUAL_AC_TIMING = 6
SMU_14_0_2_ODSETTING_AUTO_VF_CURVE_OPTIMIZER = 7
SMU_14_0_2_ODSETTING_AUTO_SOC_UV = 8
SMU_14_0_2_ODSETTING_COUNT = 9
SMU_14_0_2_OD_SW_FEATURE_SETTING_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_14_0_2_PWRMODE_SETTING'
SMU_14_0_2_PWRMODE_SETTING__enumvalues = {
0: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_QUIET',
1: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_BALANCE',
2: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_TURBO',
3: 'SMU_14_0_2_PMSETTING_POWER_LIMIT_RAGE',
4: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_QUIET',
5: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_BALANCE',
6: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_TURBO',
7: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_RAGE',
8: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',
9: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',
10: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',
11: 'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',
12: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',
13: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',
14: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',
15: 'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',
16: 'SMU_14_0_2_PMSETTING_COUNT',
}
SMU_14_0_2_PMSETTING_POWER_LIMIT_QUIET = 0
SMU_14_0_2_PMSETTING_POWER_LIMIT_BALANCE = 1
SMU_14_0_2_PMSETTING_POWER_LIMIT_TURBO = 2
SMU_14_0_2_PMSETTING_POWER_LIMIT_RAGE = 3
SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_QUIET = 4
SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5
SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_TURBO = 6
SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_RAGE = 7
SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET = 8
SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE = 9
SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO = 10
SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE = 11
SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET = 12
SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE = 13
SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO = 14
SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE = 15
SMU_14_0_2_PMSETTING_COUNT = 16
SMU_14_0_2_PWRMODE_SETTING = ctypes.c_uint32 # enum
# values for enumeration 'SMU_14_0_2_overdrive_table_id'
SMU_14_0_2_overdrive_table_id__enumvalues = {
0: 'SMU_14_0_2_OVERDRIVE_TABLE_BASIC',
1: 'SMU_14_0_2_OVERDRIVE_TABLE_ADVANCED',
2: 'SMU_14_0_2_OVERDRIVE_TABLE_COUNT',
}
SMU_14_0_2_OVERDRIVE_TABLE_BASIC = 0
SMU_14_0_2_OVERDRIVE_TABLE_ADVANCED = 1
SMU_14_0_2_OVERDRIVE_TABLE_COUNT = 2
SMU_14_0_2_overdrive_table_id = ctypes.c_uint32 # enum
class struct_smu_14_0_2_overdrive_table(Structure):
pass
struct_smu_14_0_2_overdrive_table._pack_ = 1 # source:False
struct_smu_14_0_2_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('cap', ctypes.c_ubyte * 32 * 2),
('max', ctypes.c_int32 * 64 * 2),
('min', ctypes.c_int32 * 64 * 2),
('pm_setting', ctypes.c_int16 * 32),
]
# values for enumeration 'smu_14_0_3_pptable_source'
smu_14_0_3_pptable_source__enumvalues = {
0: 'PPTABLE_SOURCE_IFWI',
1: 'PPTABLE_SOURCE_DRIVER_HARDCODED',
2: 'PPTABLE_SOURCE_PPGEN_REGISTRY',
2: 'PPTABLE_SOURCE_MAX',
}
PPTABLE_SOURCE_IFWI = 0
PPTABLE_SOURCE_DRIVER_HARDCODED = 1
PPTABLE_SOURCE_PPGEN_REGISTRY = 2
PPTABLE_SOURCE_MAX = 2
smu_14_0_3_pptable_source = ctypes.c_uint32 # enum
class struct_smu_14_0_2_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_PFE_Settings_t(Structure):
pass
struct_PFE_Settings_t._pack_ = 1 # source:False
struct_PFE_Settings_t._fields_ = [
('Version', ctypes.c_ubyte),
('Spare8', ctypes.c_ubyte * 3),
('FeaturesToRun', ctypes.c_uint32 * 2),
('FwDStateMask', ctypes.c_uint32),
('DebugOverrides', ctypes.c_uint32),
('Spare', ctypes.c_uint32 * 2),
]
class struct_SkuTable_t(Structure):
pass
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('Padding', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('CalculateFopt', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('Padding3', ctypes.c_uint32 * 3),
('Padding4', ctypes.c_uint16),
('FoptimalDc', ctypes.c_uint16),
('FoptimalAc', ctypes.c_uint16),
('Padding2', ctypes.c_uint16),
]
class struct_AvfsDcBtcParams_t(Structure):
pass
struct_AvfsDcBtcParams_t._pack_ = 1 # source:False
struct_AvfsDcBtcParams_t._fields_ = [
('DcBtcEnabled', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 3),
('DcTol', ctypes.c_uint16),
('DcBtcGb', ctypes.c_uint16),
('DcBtcMin', ctypes.c_uint16),
('DcBtcMax', ctypes.c_uint16),
('DcBtcGbScalar', struct_LinearInt_t),
]
class struct_AvfsFuseOverride_t(Structure):
pass
struct_AvfsFuseOverride_t._pack_ = 1 # source:False
struct_AvfsFuseOverride_t._fields_ = [
('AvfsTemp', ctypes.c_uint16 * 2),
('VftFMin', ctypes.c_uint16),
('VInversion', ctypes.c_uint16),
('qVft', struct_QuadraticInt_t * 2),
('qAvfsGb', struct_QuadraticInt_t),
('qAvfsGb2', struct_QuadraticInt_t),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_BootValues_t(Structure):
pass
struct_BootValues_t._pack_ = 1 # source:False
struct_BootValues_t._fields_ = [
('InitImuClk', ctypes.c_uint16),
('InitSocclk', ctypes.c_uint16),
('InitMpioclk', ctypes.c_uint16),
('InitSmnclk', ctypes.c_uint16),
('InitDispClk', ctypes.c_uint16),
('InitDppClk', ctypes.c_uint16),
('InitDprefclk', ctypes.c_uint16),
('InitDcfclk', ctypes.c_uint16),
('InitDtbclk', ctypes.c_uint16),
('InitDbguSocClk', ctypes.c_uint16),
('InitGfxclk_bypass', ctypes.c_uint16),
('InitMp1clk', ctypes.c_uint16),
('InitLclk', ctypes.c_uint16),
('InitDbguBacoClk', ctypes.c_uint16),
('InitBaco400clk', ctypes.c_uint16),
('InitBaco1200clk_bypass', ctypes.c_uint16),
('InitBaco700clk_bypass', ctypes.c_uint16),
('InitBaco500clk', ctypes.c_uint16),
('InitDclk0', ctypes.c_uint16),
('InitVclk0', ctypes.c_uint16),
('InitFclk', ctypes.c_uint16),
('Padding1', ctypes.c_uint16),
('InitUclkLevel', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 3),
('InitVcoFreqPll0', ctypes.c_uint32),
('InitVcoFreqPll1', ctypes.c_uint32),
('InitVcoFreqPll2', ctypes.c_uint32),
('InitVcoFreqPll3', ctypes.c_uint32),
('InitVcoFreqPll4', ctypes.c_uint32),
('InitVcoFreqPll5', ctypes.c_uint32),
('InitVcoFreqPll6', ctypes.c_uint32),
('InitVcoFreqPll7', ctypes.c_uint32),
('InitVcoFreqPll8', ctypes.c_uint32),
('InitGfx', ctypes.c_uint16),
('InitSoc', ctypes.c_uint16),
('InitVddIoMem', ctypes.c_uint16),
('InitVddCiMem', ctypes.c_uint16),
('Spare', ctypes.c_uint32 * 8),
]
class struct_DriverReportedClocks_t(Structure):
pass
struct_DriverReportedClocks_t._pack_ = 1 # source:False
struct_DriverReportedClocks_t._fields_ = [
('BaseClockAc', ctypes.c_uint16),
('GameClockAc', ctypes.c_uint16),
('BoostClockAc', ctypes.c_uint16),
('BaseClockDc', ctypes.c_uint16),
('GameClockDc', ctypes.c_uint16),
('BoostClockDc', ctypes.c_uint16),
('MaxReportedClock', ctypes.c_uint16),
('Padding', ctypes.c_uint16),
('Reserved', ctypes.c_uint32 * 3),
]
class struct_MsgLimits_t(Structure):
pass
struct_MsgLimits_t._pack_ = 1 # source:False
struct_MsgLimits_t._fields_ = [
('Power', ctypes.c_uint16 * 2 * 4),
('Tdc', ctypes.c_uint16 * 2),
('Temperature', ctypes.c_uint16 * 12),
('PwmLimitMin', ctypes.c_ubyte),
('PwmLimitMax', ctypes.c_ubyte),
('FanTargetTemperature', ctypes.c_ubyte),
('Spare1', ctypes.c_ubyte * 1),
('AcousticTargetRpmThresholdMin', ctypes.c_uint16),
('AcousticTargetRpmThresholdMax', ctypes.c_uint16),
('AcousticLimitRpmThresholdMin', ctypes.c_uint16),
('AcousticLimitRpmThresholdMax', ctypes.c_uint16),
('PccLimitMin', ctypes.c_uint16),
('PccLimitMax', ctypes.c_uint16),
('FanStopTempMin', ctypes.c_uint16),
('FanStopTempMax', ctypes.c_uint16),
('FanStartTempMin', ctypes.c_uint16),
('FanStartTempMax', ctypes.c_uint16),
('PowerMinPpt0', ctypes.c_uint16 * 2),
('Spare', ctypes.c_uint32 * 11),
]
class struct_OverDriveLimits_t(Structure):
pass
struct_OverDriveLimits_t._pack_ = 1 # source:False
struct_OverDriveLimits_t._fields_ = [
('FeatureCtrlMask', ctypes.c_uint32),
('VoltageOffsetPerZoneBoundary', ctypes.c_int16 * 6),
('VddGfxVmax', ctypes.c_uint16),
('VddSocVmax', ctypes.c_uint16),
('GfxclkFoffset', ctypes.c_int16),
('Padding', ctypes.c_uint16),
('UclkFmin', ctypes.c_uint16),
('UclkFmax', ctypes.c_uint16),
('FclkFmin', ctypes.c_uint16),
('FclkFmax', ctypes.c_uint16),
('Ppt', ctypes.c_int16),
('Tdc', ctypes.c_int16),
('FanLinearPwmPoints', ctypes.c_ubyte * 6),
('FanLinearTempPoints', ctypes.c_ubyte * 6),
('FanMinimumPwm', ctypes.c_uint16),
('AcousticTargetRpmThreshold', ctypes.c_uint16),
('AcousticLimitRpmThreshold', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanZeroRpmEnable', ctypes.c_ubyte),
('MaxOpTemp', ctypes.c_ubyte),
('Padding1', ctypes.c_ubyte * 2),
('GfxVoltageFullCtrlMode', ctypes.c_uint16),
('SocVoltageFullCtrlMode', ctypes.c_uint16),
('GfxclkFullCtrlMode', ctypes.c_uint16),
('UclkFullCtrlMode', ctypes.c_uint16),
('FclkFullCtrlMode', ctypes.c_uint16),
('GfxEdc', ctypes.c_int16),
('GfxPccLimitControl', ctypes.c_int16),
('Padding2', ctypes.c_int16),
('Spare', ctypes.c_uint32 * 5),
]
struct_SkuTable_t._pack_ = 1 # source:False
struct_SkuTable_t._fields_ = [
('Version', ctypes.c_uint32),
('TotalPowerConfig', ctypes.c_ubyte),
('CustomerVariant', ctypes.c_ubyte),
('MemoryTemperatureTypeMask', ctypes.c_ubyte),
('SmartShiftVersion', ctypes.c_ubyte),
('SocketPowerLimitSpare', ctypes.c_ubyte * 10),
('EnableLegacyPptLimit', ctypes.c_ubyte),
('UseInputTelemetry', ctypes.c_ubyte),
('SmartShiftMinReportedPptinDcs', ctypes.c_ubyte),
('PaddingPpt', ctypes.c_ubyte * 7),
('HwCtfTempLimit', ctypes.c_uint16),
('PaddingInfra', ctypes.c_uint16),
('FitControllerFailureRateLimit', ctypes.c_uint32),
('FitControllerGfxDutyCycle', ctypes.c_uint32),
('FitControllerSocDutyCycle', ctypes.c_uint32),
('FitControllerSocOffset', ctypes.c_uint32),
('GfxApccPlusResidencyLimit', ctypes.c_uint32),
('ThrottlerControlMask', ctypes.c_uint32),
('UlvVoltageOffset', ctypes.c_uint16 * 2),
('Padding', ctypes.c_ubyte * 2),
('DeepUlvVoltageOffsetSoc', ctypes.c_uint16),
('DefaultMaxVoltage', ctypes.c_uint16 * 2),
('BoostMaxVoltage', ctypes.c_uint16 * 2),
('VminTempHystersis', ctypes.c_int16 * 2),
('VminTempThreshold', ctypes.c_int16 * 2),
('Vmin_Hot_T0', ctypes.c_uint16 * 2),
('Vmin_Cold_T0', ctypes.c_uint16 * 2),
('Vmin_Hot_Eol', ctypes.c_uint16 * 2),
('Vmin_Cold_Eol', ctypes.c_uint16 * 2),
('Vmin_Aging_Offset', ctypes.c_uint16 * 2),
('Spare_Vmin_Plat_Offset_Hot', ctypes.c_uint16 * 2),
('Spare_Vmin_Plat_Offset_Cold', ctypes.c_uint16 * 2),
('VcBtcFixedVminAgingOffset', ctypes.c_uint16 * 2),
('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16 * 2),
('VcBtcPsmA', ctypes.c_uint32 * 2),
('VcBtcPsmB', ctypes.c_uint32 * 2),
('VcBtcVminA', ctypes.c_uint32 * 2),
('VcBtcVminB', ctypes.c_uint32 * 2),
('PerPartVminEnabled', ctypes.c_ubyte * 2),
('VcBtcEnabled', ctypes.c_ubyte * 2),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),
('Gfx_Vmin_droop', struct_QuadraticInt_t),
('Soc_Vmin_droop', struct_QuadraticInt_t),
('SpareVmin', ctypes.c_uint32 * 6),
('DpmDescriptor', struct_DpmDescriptor_t * 11),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 6),
('FreqTableShadowUclk', ctypes.c_uint16 * 6),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTableDppClk', ctypes.c_uint16 * 8),
('FreqTableDprefclk', ctypes.c_uint16 * 8),
('FreqTableDcfclk', ctypes.c_uint16 * 8),
('FreqTableDtbclk', ctypes.c_uint16 * 8),
('FreqTableFclk', ctypes.c_uint16 * 8),
('DcModeMaxFreq', ctypes.c_uint32 * 11),
('GfxclkAibFmax', ctypes.c_uint16),
('GfxDpmPadding', ctypes.c_uint16),
('GfxclkFgfxoffEntry', ctypes.c_uint16),
('GfxclkFgfxoffExitImu', ctypes.c_uint16),
('GfxclkFgfxoffExitRlc', ctypes.c_uint16),
('GfxclkThrottleClock', ctypes.c_uint16),
('EnableGfxPowerStagesGpio', ctypes.c_ubyte),
('GfxIdlePadding', ctypes.c_ubyte),
('SmsRepairWRCKClkDivEn', ctypes.c_ubyte),
('SmsRepairWRCKClkDivVal', ctypes.c_ubyte),
('GfxOffEntryEarlyMGCGEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGDelayEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGDelayVal', ctypes.c_ubyte),
('GfxclkFreqGfxUlv', ctypes.c_uint16),
('GfxIdlePadding2', ctypes.c_ubyte * 2),
('GfxOffEntryHysteresis', ctypes.c_uint32),
('GfxoffSpare', ctypes.c_uint32 * 15),
('DfllMstrOscConfigA', ctypes.c_uint16),
('DfllSlvOscConfigA', ctypes.c_uint16),
('DfllBtcMasterScalerM', ctypes.c_uint32),
('DfllBtcMasterScalerB', ctypes.c_int32),
('DfllBtcSlaveScalerM', ctypes.c_uint32),
('DfllBtcSlaveScalerB', ctypes.c_int32),
('DfllPccAsWaitCtrl', ctypes.c_uint32),
('DfllPccAsStepCtrl', ctypes.c_uint32),
('GfxDfllSpare', ctypes.c_uint32 * 9),
('DvoPsmDownThresholdVoltage', ctypes.c_uint32),
('DvoPsmUpThresholdVoltage', ctypes.c_uint32),
('DvoFmaxLowScaler', ctypes.c_uint32),
('PaddingDcs', ctypes.c_uint32),
('DcsMinGfxOffTime', ctypes.c_uint16),
('DcsMaxGfxOffTime', ctypes.c_uint16),
('DcsMinCreditAccum', ctypes.c_uint32),
('DcsExitHysteresis', ctypes.c_uint16),
('DcsTimeout', ctypes.c_uint16),
('DcsPfGfxFopt', ctypes.c_uint32),
('DcsPfUclkFopt', ctypes.c_uint32),
('FoptEnabled', ctypes.c_ubyte),
('DcsSpare2', ctypes.c_ubyte * 3),
('DcsFoptM', ctypes.c_uint32),
('DcsFoptB', ctypes.c_uint32),
('DcsSpare', ctypes.c_uint32 * 9),
('UseStrobeModeOptimizations', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 3),
('UclkDpmPstates', ctypes.c_ubyte * 6),
('UclkDpmShadowPstates', ctypes.c_ubyte * 6),
('FreqTableUclkDiv', ctypes.c_ubyte * 6),
('FreqTableShadowUclkDiv', ctypes.c_ubyte * 6),
('MemVmempVoltage', ctypes.c_uint16 * 6),
('MemVddioVoltage', ctypes.c_uint16 * 6),
('DalDcModeMaxUclkFreq', ctypes.c_uint16),
('PaddingsMem', ctypes.c_ubyte * 2),
('PaddingFclk', ctypes.c_uint32),
('PcieGenSpeed', ctypes.c_ubyte * 3),
('PcieLaneCount', ctypes.c_ubyte * 3),
('LclkFreq', ctypes.c_uint16 * 3),
('OverrideGfxAvfsFuses', ctypes.c_ubyte),
('GfxAvfsPadding', ctypes.c_ubyte * 1),
('DroopGBStDev', ctypes.c_uint16),
('SocHwRtAvfsFuses', ctypes.c_uint32 * 32),
('GfxL2HwRtAvfsFuses', ctypes.c_uint32 * 32),
('PsmDidt_Vcross', ctypes.c_uint16 * 2),
('PsmDidt_StaticDroop_A', ctypes.c_uint32 * 3),
('PsmDidt_StaticDroop_B', ctypes.c_uint32 * 3),
('PsmDidt_DynDroop_A', ctypes.c_uint32 * 3),
('PsmDidt_DynDroop_B', ctypes.c_uint32 * 3),
('spare_HwRtAvfsFuses', ctypes.c_uint32 * 19),
('SocCommonRtAvfs', ctypes.c_uint32 * 13),
('GfxCommonRtAvfs', ctypes.c_uint32 * 13),
('SocFwRtAvfsFuses', ctypes.c_uint32 * 19),
('GfxL2FwRtAvfsFuses', ctypes.c_uint32 * 19),
('spare_FwRtAvfsFuses', ctypes.c_uint32 * 19),
('Soc_Droop_PWL_F', ctypes.c_uint32 * 5),
('Soc_Droop_PWL_a', ctypes.c_uint32 * 5),
('Soc_Droop_PWL_b', ctypes.c_uint32 * 5),
('Soc_Droop_PWL_c', ctypes.c_uint32 * 5),
('Gfx_Droop_PWL_F', ctypes.c_uint32 * 5),
('Gfx_Droop_PWL_a', ctypes.c_uint32 * 5),
('Gfx_Droop_PWL_b', ctypes.c_uint32 * 5),
('Gfx_Droop_PWL_c', ctypes.c_uint32 * 5),
('Gfx_Static_PWL_Offset', ctypes.c_uint32 * 5),
('Soc_Static_PWL_Offset', ctypes.c_uint32 * 5),
('dGbV_dT_vmin', ctypes.c_uint32),
('dGbV_dT_vmax', ctypes.c_uint32),
('PaddingV2F', ctypes.c_uint32 * 4),
('DcBtcGfxParams', struct_AvfsDcBtcParams_t),
('SSCurve_GFX', struct_QuadraticInt_t),
('GfxAvfsSpare', ctypes.c_uint32 * 29),
('OverrideSocAvfsFuses', ctypes.c_ubyte),
('MinSocAvfsRevision', ctypes.c_ubyte),
('SocAvfsPadding', ctypes.c_ubyte * 2),
('SocAvfsFuseOverride', struct_AvfsFuseOverride_t * 1),
('dBtcGbSoc', struct_DroopInt_t * 1),
('qAgingGb', struct_LinearInt_t * 1),
('qStaticVoltageOffset', struct_QuadraticInt_t * 1),
('DcBtcSocParams', struct_AvfsDcBtcParams_t * 1),
('SSCurve_SOC', struct_QuadraticInt_t),
('SocAvfsSpare', ctypes.c_uint32 * 29),
('BootValues', struct_BootValues_t),
('DriverReportedClocks', struct_DriverReportedClocks_t),
('MsgLimits', struct_MsgLimits_t),
('OverDriveLimitsBasicMin', struct_OverDriveLimits_t),
('OverDriveLimitsBasicMax', struct_OverDriveLimits_t),
('OverDriveLimitsAdvancedMin', struct_OverDriveLimits_t),
('OverDriveLimitsAdvancedMax', struct_OverDriveLimits_t),
('TotalBoardPowerSupport', ctypes.c_ubyte),
('TotalBoardPowerPadding', ctypes.c_ubyte * 1),
('TotalBoardPowerRoc', ctypes.c_uint16),
('qFeffCoeffGameClock', struct_QuadraticInt_t * 2),
('qFeffCoeffBaseClock', struct_QuadraticInt_t * 2),
('qFeffCoeffBoostClock', struct_QuadraticInt_t * 2),
('AptUclkGfxclkLookup', ctypes.c_int32 * 6 * 2),
('AptUclkGfxclkLookupHyst', ctypes.c_uint32 * 6 * 2),
('AptPadding', ctypes.c_uint32),
('GfxXvminDidtDroopThresh', struct_QuadraticInt_t),
('GfxXvminDidtResetDDWait', ctypes.c_uint32),
('GfxXvminDidtClkStopWait', ctypes.c_uint32),
('GfxXvminDidtFcsStepCtrl', ctypes.c_uint32),
('GfxXvminDidtFcsWaitCtrl', ctypes.c_uint32),
('PsmModeEnabled', ctypes.c_uint32),
('P2v_a', ctypes.c_uint32),
('P2v_b', ctypes.c_uint32),
('P2v_c', ctypes.c_uint32),
('T2p_a', ctypes.c_uint32),
('T2p_b', ctypes.c_uint32),
('T2p_c', ctypes.c_uint32),
('P2vTemp', ctypes.c_uint32),
('PsmDidtStaticSettings', struct_QuadraticInt_t),
('PsmDidtDynamicSettings', struct_QuadraticInt_t),
('PsmDidtAvgDiv', ctypes.c_ubyte),
('PsmDidtForceStall', ctypes.c_ubyte),
('PsmDidtReleaseTimer', ctypes.c_uint16),
('PsmDidtStallPattern', ctypes.c_uint32),
('CacEdcCacLeakageC0', ctypes.c_uint32),
('CacEdcCacLeakageC1', ctypes.c_uint32),
('CacEdcCacLeakageC2', ctypes.c_uint32),
('CacEdcCacLeakageC3', ctypes.c_uint32),
('CacEdcCacLeakageC4', ctypes.c_uint32),
('CacEdcCacLeakageC5', ctypes.c_uint32),
('CacEdcGfxClkScalar', ctypes.c_uint32),
('CacEdcGfxClkIntercept', ctypes.c_uint32),
('CacEdcCac_m', ctypes.c_uint32),
('CacEdcCac_b', ctypes.c_uint32),
('CacEdcCurrLimitGuardband', ctypes.c_uint32),
('CacEdcDynToTotalCacRatio', ctypes.c_uint32),
('XVmin_Gfx_EdcThreshScalar', ctypes.c_uint32),
('XVmin_Gfx_EdcEnableFreq', ctypes.c_uint32),
('XVmin_Gfx_EdcPccAsStepCtrl', ctypes.c_uint32),
('XVmin_Gfx_EdcPccAsWaitCtrl', ctypes.c_uint32),
('XVmin_Gfx_EdcThreshold', ctypes.c_uint16),
('XVmin_Gfx_EdcFiltHysWaitCtrl', ctypes.c_uint16),
('XVmin_Soc_EdcThreshScalar', ctypes.c_uint32),
('XVmin_Soc_EdcEnableFreq', ctypes.c_uint32),
('XVmin_Soc_EdcThreshold', ctypes.c_uint32),
('XVmin_Soc_EdcStepUpTime', ctypes.c_uint16),
('XVmin_Soc_EdcStepDownTime', ctypes.c_uint16),
('XVmin_Soc_EdcInitPccStep', ctypes.c_ubyte),
('PaddingSocEdc', ctypes.c_ubyte * 3),
('GfxXvminFuseOverride', ctypes.c_ubyte),
('SocXvminFuseOverride', ctypes.c_ubyte),
('PaddingXvminFuseOverride', ctypes.c_ubyte * 2),
('GfxXvminFddTempLow', ctypes.c_ubyte),
('GfxXvminFddTempHigh', ctypes.c_ubyte),
('SocXvminFddTempLow', ctypes.c_ubyte),
('SocXvminFddTempHigh', ctypes.c_ubyte),
('GfxXvminFddVolt0', ctypes.c_uint16),
('GfxXvminFddVolt1', ctypes.c_uint16),
('GfxXvminFddVolt2', ctypes.c_uint16),
('SocXvminFddVolt0', ctypes.c_uint16),
('SocXvminFddVolt1', ctypes.c_uint16),
('SocXvminFddVolt2', ctypes.c_uint16),
('GfxXvminDsFddDsm', ctypes.c_uint16 * 6),
('GfxXvminEdcFddDsm', ctypes.c_uint16 * 6),
('SocXvminEdcFddDsm', ctypes.c_uint16 * 6),
('Spare', ctypes.c_uint32),
('MmHubPadding', ctypes.c_uint32 * 8),
]
class struct_CustomSkuTable_t(Structure):
pass
struct_CustomSkuTable_t._pack_ = 1 # source:False
struct_CustomSkuTable_t._fields_ = [
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('VrTdcLimit', ctypes.c_uint16 * 2),
('TotalIdleBoardPowerM', ctypes.c_int16),
('TotalIdleBoardPowerB', ctypes.c_int16),
('TotalBoardPowerM', ctypes.c_int16),
('TotalBoardPowerB', ctypes.c_int16),
('TemperatureLimit', ctypes.c_uint16 * 12),
('FanStopTemp', ctypes.c_uint16 * 12),
('FanStartTemp', ctypes.c_uint16 * 12),
('FanGain', ctypes.c_uint16 * 12),
('FanPwmMin', ctypes.c_uint16),
('AcousticTargetRpmThreshold', ctypes.c_uint16),
('AcousticLimitRpmThreshold', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('MGpuAcousticLimitRpmThreshold', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('TempInputSelectMask', ctypes.c_uint32),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FanPadding', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16 * 12),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FanPadding2', ctypes.c_uint16),
('FwCtfLimit', ctypes.c_uint16 * 12),
('IntakeTempEnableRPM', ctypes.c_uint16),
('IntakeTempOffsetTemp', ctypes.c_int16),
('IntakeTempReleaseTemp', ctypes.c_uint16),
('IntakeTempHighIntakeAcousticLimit', ctypes.c_uint16),
('IntakeTempAcouticLimitReleaseRate', ctypes.c_uint16),
('FanAbnormalTempLimitOffset', ctypes.c_int16),
('FanStalledTriggerRpm', ctypes.c_uint16),
('FanAbnormalTriggerRpmCoeff', ctypes.c_uint16),
('FanSpare', ctypes.c_uint16 * 1),
('FanIntakeSensorSupport', ctypes.c_ubyte),
('FanIntakePadding', ctypes.c_ubyte),
('FanSpare2', ctypes.c_uint32 * 12),
('ODFeatureCtrlMask', ctypes.c_uint32),
('TemperatureLimit_Hynix', ctypes.c_uint16),
('TemperatureLimit_Micron', ctypes.c_uint16),
('TemperatureFwCtfLimit_Hynix', ctypes.c_uint16),
('TemperatureFwCtfLimit_Micron', ctypes.c_uint16),
('PlatformTdcLimit', ctypes.c_uint16 * 2),
('SocketPowerLimitDc', ctypes.c_uint16 * 4),
('SocketPowerLimitSmartShift2', ctypes.c_uint16),
('CustomSkuSpare16b', ctypes.c_uint16),
('CustomSkuSpare32b', ctypes.c_uint32 * 10),
('MmHubPadding', ctypes.c_uint32 * 8),
]
class struct_BoardTable_t(Structure):
pass
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('SlaveAddress', ctypes.c_ubyte),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
('PaddingConfig', ctypes.c_ubyte),
]
class struct_Svi3RegulatorSettings_t(Structure):
pass
struct_Svi3RegulatorSettings_t._pack_ = 1 # source:False
struct_Svi3RegulatorSettings_t._fields_ = [
('SlewRateConditions', ctypes.c_ubyte),
('LoadLineAdjust', ctypes.c_ubyte),
('VoutOffset', ctypes.c_ubyte),
('VidMax', ctypes.c_ubyte),
('VidMin', ctypes.c_ubyte),
('TenBitTelEn', ctypes.c_ubyte),
('SixteenBitTelEn', ctypes.c_ubyte),
('OcpThresh', ctypes.c_ubyte),
('OcpWarnThresh', ctypes.c_ubyte),
('OcpSettings', ctypes.c_ubyte),
('VrhotThresh', ctypes.c_ubyte),
('OtpThresh', ctypes.c_ubyte),
('UvpOvpDeltaRef', ctypes.c_ubyte),
('PhaseShed', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 10),
('SettingOverrideMask', ctypes.c_uint32),
]
struct_BoardTable_t._pack_ = 1 # source:False
struct_BoardTable_t._fields_ = [
('Version', ctypes.c_uint32),
('I2cControllers', struct_I2cControllerConfig_t * 8),
('SlaveAddrMapping', ctypes.c_ubyte * 4),
('VrPsiSupport', ctypes.c_ubyte * 4),
('Svi3SvcSpeed', ctypes.c_uint32),
('EnablePsi6', ctypes.c_ubyte * 4),
('Svi3RegSettings', struct_Svi3RegulatorSettings_t * 4),
('LedOffGpio', ctypes.c_ubyte),
('FanOffGpio', ctypes.c_ubyte),
('GfxVrPowerStageOffGpio', ctypes.c_ubyte),
('AcDcGpio', ctypes.c_ubyte),
('AcDcPolarity', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('GthrGpio', ctypes.c_ubyte),
('GthrPolarity', ctypes.c_ubyte),
('LedPin0', ctypes.c_ubyte),
('LedPin1', ctypes.c_ubyte),
('LedPin2', ctypes.c_ubyte),
('LedEnableMask', ctypes.c_ubyte),
('LedPcie', ctypes.c_ubyte),
('LedError', ctypes.c_ubyte),
('PaddingLed', ctypes.c_ubyte),
('UclkTrainingModeSpreadPercent', ctypes.c_ubyte),
('UclkSpreadPadding', ctypes.c_ubyte),
('UclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadPercent', ctypes.c_ubyte * 16),
('GfxclkSpreadEnable', ctypes.c_ubyte),
('FclkSpreadPercent', ctypes.c_ubyte),
('FclkSpreadFreq', ctypes.c_uint16),
('DramWidth', ctypes.c_ubyte),
('PaddingMem1', ctypes.c_ubyte * 7),
('HsrEnabled', ctypes.c_ubyte),
('VddqOffEnabled', ctypes.c_ubyte),
('PaddingUmcFlags', ctypes.c_ubyte * 2),
('Paddign1', ctypes.c_uint32),
('BacoEntryDelay', ctypes.c_uint32),
('FuseWritePowerMuxPresent', ctypes.c_ubyte),
('FuseWritePadding', ctypes.c_ubyte * 3),
('LoadlineGfx', ctypes.c_uint32),
('LoadlineSoc', ctypes.c_uint32),
('GfxEdcLimit', ctypes.c_uint32),
('SocEdcLimit', ctypes.c_uint32),
('RestBoardPower', ctypes.c_uint32),
('ConnectorsImpedance', ctypes.c_uint32),
('EpcsSens0', ctypes.c_ubyte),
('EpcsSens1', ctypes.c_ubyte),
('PaddingEpcs', ctypes.c_ubyte * 2),
('BoardSpare', ctypes.c_uint32 * 52),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('PFE_Settings', struct_PFE_Settings_t),
('SkuTable', struct_SkuTable_t),
('CustomSkuTable', struct_CustomSkuTable_t),
('BoardTable', struct_BoardTable_t),
]
struct_smu_14_0_2_powerplay_table._pack_ = 1 # source:False
struct_smu_14_0_2_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('pptable_source', ctypes.c_ubyte),
('pmfw_pptable_start_offset', ctypes.c_uint16),
('pmfw_pptable_size', ctypes.c_uint16),
('pmfw_sku_table_start_offset', ctypes.c_uint16),
('pmfw_sku_table_size', ctypes.c_uint16),
('pmfw_board_table_start_offset', ctypes.c_uint16),
('pmfw_board_table_size', ctypes.c_uint16),
('pmfw_custom_sku_table_start_offset', ctypes.c_uint16),
('pmfw_custom_sku_table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_ubyte * 143),
('overdrive_table', struct_smu_14_0_2_overdrive_table),
('smc_pptable', struct_PPTable_t),
]
# values for enumeration 'SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP'
SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP__enumvalues = {
0: 'SMU_14_0_2_CUSTOM_ODCAP_POWER_MODE',
1: 'SMU_14_0_2_CUSTOM_ODCAP_COUNT',
}
SMU_14_0_2_CUSTOM_ODCAP_POWER_MODE = 0
SMU_14_0_2_CUSTOM_ODCAP_COUNT = 1
SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID'
SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID__enumvalues = {
0: 'SMU_14_0_2_CUSTOM_ODSETTING_POWER_MODE',
1: 'SMU_14_0_2_CUSTOM_ODSETTING_COUNT',
}
SMU_14_0_2_CUSTOM_ODSETTING_POWER_MODE = 0
SMU_14_0_2_CUSTOM_ODSETTING_COUNT = 1
SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID = ctypes.c_uint32 # enum
class struct_smu_14_0_2_custom_overdrive_table(Structure):
pass
struct_smu_14_0_2_custom_overdrive_table._pack_ = 1 # source:False
struct_smu_14_0_2_custom_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('cap', ctypes.c_ubyte * 1),
('max', ctypes.c_int32 * 1),
('min', ctypes.c_int32 * 1),
('pm_setting', ctypes.c_int16 * 16),
]
class struct_smu_14_0_3_custom_powerplay_table(Structure):
pass
struct_smu_14_0_3_custom_powerplay_table._pack_ = 1 # source:False
struct_smu_14_0_3_custom_powerplay_table._fields_ = [
('custom_table_revision', ctypes.c_ubyte),
('custom_table_size', ctypes.c_uint16),
('custom_sku_table_offset', ctypes.c_uint16),
('custom_platform_caps', ctypes.c_uint32),
('software_shutdown_temp', ctypes.c_uint16),
('custom_overdrive_table', struct_smu_14_0_2_custom_overdrive_table),
('reserve', ctypes.c_uint32 * 8),
('custom_sku_table_pmfw', struct_CustomSkuTable_t),
]
__all__ = \
['PPTABLE_SOURCE_DRIVER_HARDCODED', 'PPTABLE_SOURCE_IFWI',
'PPTABLE_SOURCE_MAX', 'PPTABLE_SOURCE_PPGEN_REGISTRY',
'SMU_14_0_2_CUSTOM_ODCAP_COUNT',
'SMU_14_0_2_CUSTOM_ODCAP_POWER_MODE',
'SMU_14_0_2_CUSTOM_ODSETTING_COUNT',
'SMU_14_0_2_CUSTOM_ODSETTING_POWER_MODE',
'SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID',
'SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP',
'SMU_14_0_2_CUSTOM_TABLE_FORMAT_REVISION',
'SMU_14_0_2_MAX_ODFEATURE', 'SMU_14_0_2_MAX_ODSETTING',
'SMU_14_0_2_MAX_PMSETTING',
'SMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_14_0_2_ODCAP_AUTO_OC_ENGINE',
'SMU_14_0_2_ODCAP_AUTO_OC_MEMORY', 'SMU_14_0_2_ODCAP_AUTO_SOC_UV',
'SMU_14_0_2_ODCAP_AUTO_UV_ENGINE',
'SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER',
'SMU_14_0_2_ODCAP_COUNT', 'SMU_14_0_2_ODCAP_MANUAL_AC_TIMING',
'SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE',
'SMU_14_0_2_ODCAP_POWER_MODE',
'SMU_14_0_2_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_14_0_2_ODFEATURE_AUTO_OC_ENGINE',
'SMU_14_0_2_ODFEATURE_AUTO_OC_MEMORY',
'SMU_14_0_2_ODFEATURE_AUTO_SOC_UV',
'SMU_14_0_2_ODFEATURE_AUTO_UV_ENGINE',
'SMU_14_0_2_ODFEATURE_AUTO_VF_CURVE_OPTIMIZER',
'SMU_14_0_2_ODFEATURE_MANUAL_AC_TIMING',
'SMU_14_0_2_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_14_0_2_ODFEATURE_POWER_MODE',
'SMU_14_0_2_ODSETTING_ACTIMING',
'SMU_14_0_2_ODSETTING_AUTOOCENGINE',
'SMU_14_0_2_ODSETTING_AUTOOCMEMORY',
'SMU_14_0_2_ODSETTING_AUTOUVENGINE',
'SMU_14_0_2_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_14_0_2_ODSETTING_AUTO_SOC_UV',
'SMU_14_0_2_ODSETTING_AUTO_VF_CURVE_OPTIMIZER',
'SMU_14_0_2_ODSETTING_COUNT',
'SMU_14_0_2_ODSETTING_MANUAL_AC_TIMING',
'SMU_14_0_2_ODSETTING_POWER_MODE', 'SMU_14_0_2_OD_SW_FEATURE_CAP',
'SMU_14_0_2_OD_SW_FEATURE_ID',
'SMU_14_0_2_OD_SW_FEATURE_SETTING_ID',
'SMU_14_0_2_OVERDRIVE_TABLE_ADVANCED',
'SMU_14_0_2_OVERDRIVE_TABLE_BASIC',
'SMU_14_0_2_OVERDRIVE_TABLE_COUNT',
'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',
'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',
'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',
'SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_BALANCE',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_QUIET',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_RAGE',
'SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_TURBO',
'SMU_14_0_2_PMSETTING_COUNT',
'SMU_14_0_2_PMSETTING_POWER_LIMIT_BALANCE',
'SMU_14_0_2_PMSETTING_POWER_LIMIT_QUIET',
'SMU_14_0_2_PMSETTING_POWER_LIMIT_RAGE',
'SMU_14_0_2_PMSETTING_POWER_LIMIT_TURBO', 'SMU_14_0_2_PPTABLE_H',
'SMU_14_0_2_PP_CUSTOM_OVERDRIVE_VERSION',
'SMU_14_0_2_PP_OVERDRIVE_VERSION',
'SMU_14_0_2_PP_PLATFORM_CAP_BACO',
'SMU_14_0_2_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_14_0_2_PP_PLATFORM_CAP_LEDSUPPORTED',
'SMU_14_0_2_PP_PLATFORM_CAP_MACO',
'SMU_14_0_2_PP_PLATFORM_CAP_MOBILEOVERDRIVE',
'SMU_14_0_2_PP_PLATFORM_CAP_POWERPLAY',
'SMU_14_0_2_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_14_0_2_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_14_0_2_PP_POWERSAVINGCLOCK_VERSION',
'SMU_14_0_2_PP_THERMALCONTROLLER_NONE',
'SMU_14_0_2_PWRMODE_SETTING', 'SMU_14_0_2_TABLE_FORMAT_REVISION',
'SMU_14_0_2_overdrive_table_id', 'smu_14_0_3_pptable_source',
'struct_AvfsDcBtcParams_t', 'struct_AvfsFuseOverride_t',
'struct_BoardTable_t', 'struct_BootValues_t',
'struct_CustomSkuTable_t', 'struct_DpmDescriptor_t',
'struct_DriverReportedClocks_t', 'struct_DroopInt_t',
'struct_I2cControllerConfig_t', 'struct_LinearInt_t',
'struct_MsgLimits_t', 'struct_OverDriveLimits_t',
'struct_PFE_Settings_t', 'struct_PPTable_t',
'struct_QuadraticInt_t', 'struct_SkuTable_t',
'struct_Svi3RegulatorSettings_t',
'struct_atom_common_table_header',
'struct_smu_14_0_2_custom_overdrive_table',
'struct_smu_14_0_2_overdrive_table',
'struct_smu_14_0_2_powerplay_table',
'struct_smu_14_0_3_custom_powerplay_table']
================================================
FILE: src/upp/atom_gen/vega10_pptable.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/include/atombios.h']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
_VEGA10_PPTABLE_H_ = True # macro
ATOM_VEGA10_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK = 0x0f # macro
ATOM_VEGA10_PP_FANPARAMETERS_NOFAN = 0x80 # macro
ATOM_VEGA10_PP_THERMALCONTROLLER_NONE = 0 # macro
ATOM_VEGA10_PP_THERMALCONTROLLER_LM96163 = 17 # macro
ATOM_VEGA10_PP_THERMALCONTROLLER_VEGA10 = 24 # macro
ATOM_VEGA10_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL = 0x89 # macro
ATOM_VEGA10_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL = 0x8D # macro
ATOM_VEGA10_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
ATOM_VEGA10_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
ATOM_VEGA10_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
ATOM_VEGA10_PP_PLATFORM_CAP_BACO = 0x8 # macro
ATOM_VEGA10_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL = 0x10 # macro
ATOM_PPLIB_CLASSIFICATION_UI_MASK = 0x0007 # macro
ATOM_PPLIB_CLASSIFICATION_UI_SHIFT = 0 # macro
ATOM_PPLIB_CLASSIFICATION_UI_NONE = 0 # macro
ATOM_PPLIB_CLASSIFICATION_UI_BATTERY = 1 # macro
ATOM_PPLIB_CLASSIFICATION_UI_BALANCED = 3 # macro
ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE = 5 # macro
ATOM_PPLIB_CLASSIFICATION_BOOT = 0x0008 # macro
ATOM_PPLIB_CLASSIFICATION_THERMAL = 0x0010 # macro
ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE = 0x0020 # macro
ATOM_PPLIB_CLASSIFICATION_REST = 0x0040 # macro
ATOM_PPLIB_CLASSIFICATION_FORCED = 0x0080 # macro
ATOM_PPLIB_CLASSIFICATION_ACPI = 0x1000 # macro
ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 = 0x0001 # macro
ATOM_Vega10_DISALLOW_ON_DC = 0x00004000 # macro
ATOM_Vega10_ENABLE_VARIBRIGHT = 0x00008000 # macro
ATOM_Vega10_TABLE_REVISION_VEGA10 = 8 # macro
ATOM_Vega10_VoltageMode_AVFS_Interpolate = 0 # macro
ATOM_Vega10_VoltageMode_AVFS_WorstCase = 1 # macro
ATOM_Vega10_VoltageMode_Static = 2 # macro
class struct__ATOM_Vega10_POWERPLAYTABLE(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
struct__ATOM_Vega10_POWERPLAYTABLE._pack_ = 1 # source:False
struct__ATOM_Vega10_POWERPLAYTABLE._fields_ = [
('sHeader', struct_atom_common_table_header),
('ucTableRevision', ctypes.c_ubyte),
('usTableSize', ctypes.c_uint16),
('ulGoldenPPID', ctypes.c_uint32),
('ulGoldenRevision', ctypes.c_uint32),
('usFormatID', ctypes.c_uint16),
('ulPlatformCaps', ctypes.c_uint32),
('ulMaxODEngineClock', ctypes.c_uint32),
('ulMaxODMemoryClock', ctypes.c_uint32),
('usPowerControlLimit', ctypes.c_uint16),
('usUlvVoltageOffset', ctypes.c_uint16),
('usUlvSmnclkDid', ctypes.c_uint16),
('usUlvMp1clkDid', ctypes.c_uint16),
('usUlvGfxclkBypass', ctypes.c_uint16),
('usGfxclkSlewRate', ctypes.c_uint16),
('ucGfxVoltageMode', ctypes.c_ubyte),
('ucSocVoltageMode', ctypes.c_ubyte),
('ucUclkVoltageMode', ctypes.c_ubyte),
('ucUvdVoltageMode', ctypes.c_ubyte),
('ucVceVoltageMode', ctypes.c_ubyte),
('ucMp0VoltageMode', ctypes.c_ubyte),
('ucDcefVoltageMode', ctypes.c_ubyte),
('usStateArrayOffset', ctypes.c_uint16),
('usFanTableOffset', ctypes.c_uint16),
('usThermalControllerOffset', ctypes.c_uint16),
('usSocclkDependencyTableOffset', ctypes.c_uint16),
('usMclkDependencyTableOffset', ctypes.c_uint16),
('usGfxclkDependencyTableOffset', ctypes.c_uint16),
('usDcefclkDependencyTableOffset', ctypes.c_uint16),
('usVddcLookupTableOffset', ctypes.c_uint16),
('usVddmemLookupTableOffset', ctypes.c_uint16),
('usMMDependencyTableOffset', ctypes.c_uint16),
('usVCEStateTableOffset', ctypes.c_uint16),
('usReserve', ctypes.c_uint16),
('usPowerTuneTableOffset', ctypes.c_uint16),
('usHardLimitTableOffset', ctypes.c_uint16),
('usVddciLookupTableOffset', ctypes.c_uint16),
('usPCIETableOffset', ctypes.c_uint16),
('usPixclkDependencyTableOffset', ctypes.c_uint16),
('usDispClkDependencyTableOffset', ctypes.c_uint16),
('usPhyClkDependencyTableOffset', ctypes.c_uint16),
]
ATOM_Vega10_POWERPLAYTABLE = struct__ATOM_Vega10_POWERPLAYTABLE
class struct__ATOM_Vega10_State(Structure):
pass
struct__ATOM_Vega10_State._pack_ = 1 # source:False
struct__ATOM_Vega10_State._fields_ = [
('ucSocClockIndexHigh', ctypes.c_ubyte),
('ucSocClockIndexLow', ctypes.c_ubyte),
('ucGfxClockIndexHigh', ctypes.c_ubyte),
('ucGfxClockIndexLow', ctypes.c_ubyte),
('ucMemClockIndexHigh', ctypes.c_ubyte),
('ucMemClockIndexLow', ctypes.c_ubyte),
('usClassification', ctypes.c_uint16),
('ulCapsAndSettings', ctypes.c_uint32),
('usClassification2', ctypes.c_uint16),
]
ATOM_Vega10_State = struct__ATOM_Vega10_State
class struct__ATOM_Vega10_State_Array(Structure):
pass
struct__ATOM_Vega10_State_Array._pack_ = 1 # source:False
struct__ATOM_Vega10_State_Array._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('states', struct__ATOM_Vega10_State * 0),
]
ATOM_Vega10_State_Array = struct__ATOM_Vega10_State_Array
class struct__ATOM_Vega10_CLK_Dependency_Record(Structure):
pass
struct__ATOM_Vega10_CLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_CLK_Dependency_Record._fields_ = [
('ulClk', ctypes.c_uint32),
('ucVddInd', ctypes.c_ubyte),
]
ATOM_Vega10_CLK_Dependency_Record = struct__ATOM_Vega10_CLK_Dependency_Record
class struct__ATOM_Vega10_GFXCLK_Dependency_Record(Structure):
pass
struct__ATOM_Vega10_GFXCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_GFXCLK_Dependency_Record._fields_ = [
('ulClk', ctypes.c_uint32),
('ucVddInd', ctypes.c_ubyte),
('usCKSVOffsetandDisable', ctypes.c_uint16),
('usAVFSOffset', ctypes.c_uint16),
]
ATOM_Vega10_GFXCLK_Dependency_Record = struct__ATOM_Vega10_GFXCLK_Dependency_Record
class struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2(Structure):
pass
struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2._pack_ = 1 # source:False
struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2._fields_ = [
('ulClk', ctypes.c_uint32),
('ucVddInd', ctypes.c_ubyte),
('usCKSVOffsetandDisable', ctypes.c_uint16),
('usAVFSOffset', ctypes.c_uint16),
('ucACGEnable', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte * 3),
]
ATOM_Vega10_GFXCLK_Dependency_Record_V2 = struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2
class struct__ATOM_Vega10_MCLK_Dependency_Record(Structure):
pass
struct__ATOM_Vega10_MCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_MCLK_Dependency_Record._fields_ = [
('ulMemClk', ctypes.c_uint32),
('ucVddInd', ctypes.c_ubyte),
('ucVddMemInd', ctypes.c_ubyte),
('ucVddciInd', ctypes.c_ubyte),
]
ATOM_Vega10_MCLK_Dependency_Record = struct__ATOM_Vega10_MCLK_Dependency_Record
class struct__ATOM_Vega10_GFXCLK_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_GFXCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_GFXCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_GFXCLK_Dependency_Record * 0),
]
ATOM_Vega10_GFXCLK_Dependency_Table = struct__ATOM_Vega10_GFXCLK_Dependency_Table
class struct__ATOM_Vega10_MCLK_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_MCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_MCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_MCLK_Dependency_Record * 0),
]
ATOM_Vega10_MCLK_Dependency_Table = struct__ATOM_Vega10_MCLK_Dependency_Table
class struct__ATOM_Vega10_SOCCLK_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_SOCCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_SOCCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),
]
ATOM_Vega10_SOCCLK_Dependency_Table = struct__ATOM_Vega10_SOCCLK_Dependency_Table
class struct__ATOM_Vega10_DCEFCLK_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_DCEFCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_DCEFCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),
]
ATOM_Vega10_DCEFCLK_Dependency_Table = struct__ATOM_Vega10_DCEFCLK_Dependency_Table
class struct__ATOM_Vega10_PIXCLK_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_PIXCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_PIXCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),
]
ATOM_Vega10_PIXCLK_Dependency_Table = struct__ATOM_Vega10_PIXCLK_Dependency_Table
class struct__ATOM_Vega10_DISPCLK_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_DISPCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_DISPCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),
]
ATOM_Vega10_DISPCLK_Dependency_Table = struct__ATOM_Vega10_DISPCLK_Dependency_Table
class struct__ATOM_Vega10_PHYCLK_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_PHYCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_PHYCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_CLK_Dependency_Record * 0),
]
ATOM_Vega10_PHYCLK_Dependency_Table = struct__ATOM_Vega10_PHYCLK_Dependency_Table
class struct__ATOM_Vega10_MM_Dependency_Record(Structure):
pass
struct__ATOM_Vega10_MM_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_MM_Dependency_Record._fields_ = [
('ucVddcInd', ctypes.c_ubyte),
('ulDClk', ctypes.c_uint32),
('ulVClk', ctypes.c_uint32),
('ulEClk', ctypes.c_uint32),
('ulPSPClk', ctypes.c_uint32),
]
ATOM_Vega10_MM_Dependency_Record = struct__ATOM_Vega10_MM_Dependency_Record
class struct__ATOM_Vega10_MM_Dependency_Table(Structure):
pass
struct__ATOM_Vega10_MM_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_MM_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_MM_Dependency_Record * 0),
]
ATOM_Vega10_MM_Dependency_Table = struct__ATOM_Vega10_MM_Dependency_Table
class struct__ATOM_Vega10_PCIE_Record(Structure):
pass
struct__ATOM_Vega10_PCIE_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_PCIE_Record._fields_ = [
('ulLCLK', ctypes.c_uint32),
('ucPCIEGenSpeed', ctypes.c_ubyte),
('ucPCIELaneWidth', ctypes.c_ubyte),
]
ATOM_Vega10_PCIE_Record = struct__ATOM_Vega10_PCIE_Record
class struct__ATOM_Vega10_PCIE_Table(Structure):
pass
struct__ATOM_Vega10_PCIE_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_PCIE_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_PCIE_Record * 0),
]
ATOM_Vega10_PCIE_Table = struct__ATOM_Vega10_PCIE_Table
class struct__ATOM_Vega10_Voltage_Lookup_Record(Structure):
pass
struct__ATOM_Vega10_Voltage_Lookup_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_Voltage_Lookup_Record._fields_ = [
('usVdd', ctypes.c_uint16),
]
ATOM_Vega10_Voltage_Lookup_Record = struct__ATOM_Vega10_Voltage_Lookup_Record
class struct__ATOM_Vega10_Voltage_Lookup_Table(Structure):
pass
struct__ATOM_Vega10_Voltage_Lookup_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_Voltage_Lookup_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_Voltage_Lookup_Record * 0),
]
ATOM_Vega10_Voltage_Lookup_Table = struct__ATOM_Vega10_Voltage_Lookup_Table
class struct__ATOM_Vega10_Fan_Table(Structure):
pass
struct__ATOM_Vega10_Fan_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_Fan_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanRPMMax', ctypes.c_uint16),
('usThrottlingRPM', ctypes.c_uint16),
('usFanAcousticLimit', ctypes.c_uint16),
('usTargetTemperature', ctypes.c_uint16),
('usMinimumPWMLimit', ctypes.c_uint16),
('usTargetGfxClk', ctypes.c_uint16),
('usFanGainEdge', ctypes.c_uint16),
('usFanGainHotspot', ctypes.c_uint16),
('usFanGainLiquid', ctypes.c_uint16),
('usFanGainVrVddc', ctypes.c_uint16),
('usFanGainVrMvdd', ctypes.c_uint16),
('usFanGainPlx', ctypes.c_uint16),
('usFanGainHbm', ctypes.c_uint16),
('ucEnableZeroRPM', ctypes.c_ubyte),
('usFanStopTemperature', ctypes.c_uint16),
('usFanStartTemperature', ctypes.c_uint16),
]
ATOM_Vega10_Fan_Table = struct__ATOM_Vega10_Fan_Table
class struct__ATOM_Vega10_Fan_Table_V2(Structure):
pass
struct__ATOM_Vega10_Fan_Table_V2._pack_ = 1 # source:False
struct__ATOM_Vega10_Fan_Table_V2._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanAcousticLimitRpm', ctypes.c_uint16),
('usThrottlingRPM', ctypes.c_uint16),
('usTargetTemperature', ctypes.c_uint16),
('usMinimumPWMLimit', ctypes.c_uint16),
('usTargetGfxClk', ctypes.c_uint16),
('usFanGainEdge', ctypes.c_uint16),
('usFanGainHotspot', ctypes.c_uint16),
('usFanGainLiquid', ctypes.c_uint16),
('usFanGainVrVddc', ctypes.c_uint16),
('usFanGainVrMvdd', ctypes.c_uint16),
('usFanGainPlx', ctypes.c_uint16),
('usFanGainHbm', ctypes.c_uint16),
('ucEnableZeroRPM', ctypes.c_ubyte),
('usFanStopTemperature', ctypes.c_uint16),
('usFanStartTemperature', ctypes.c_uint16),
('ucFanParameters', ctypes.c_ubyte),
('ucFanMinRPM', ctypes.c_ubyte),
('ucFanMaxRPM', ctypes.c_ubyte),
]
ATOM_Vega10_Fan_Table_V2 = struct__ATOM_Vega10_Fan_Table_V2
class struct__ATOM_Vega10_Fan_Table_V3(Structure):
pass
struct__ATOM_Vega10_Fan_Table_V3._pack_ = 1 # source:False
struct__ATOM_Vega10_Fan_Table_V3._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanAcousticLimitRpm', ctypes.c_uint16),
('usThrottlingRPM', ctypes.c_uint16),
('usTargetTemperature', ctypes.c_uint16),
('usMinimumPWMLimit', ctypes.c_uint16),
('usTargetGfxClk', ctypes.c_uint16),
('usFanGainEdge', ctypes.c_uint16),
('usFanGainHotspot', ctypes.c_uint16),
('usFanGainLiquid', ctypes.c_uint16),
('usFanGainVrVddc', ctypes.c_uint16),
('usFanGainVrMvdd', ctypes.c_uint16),
('usFanGainPlx', ctypes.c_uint16),
('usFanGainHbm', ctypes.c_uint16),
('ucEnableZeroRPM', ctypes.c_ubyte),
('usFanStopTemperature', ctypes.c_uint16),
('usFanStartTemperature', ctypes.c_uint16),
('ucFanParameters', ctypes.c_ubyte),
('ucFanMinRPM', ctypes.c_ubyte),
('ucFanMaxRPM', ctypes.c_ubyte),
('usMGpuThrottlingRPM', ctypes.c_uint16),
]
ATOM_Vega10_Fan_Table_V3 = struct__ATOM_Vega10_Fan_Table_V3
class struct__ATOM_Vega10_Thermal_Controller(Structure):
pass
struct__ATOM_Vega10_Thermal_Controller._pack_ = 1 # source:False
struct__ATOM_Vega10_Thermal_Controller._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucType', ctypes.c_ubyte),
('ucI2cLine', ctypes.c_ubyte),
('ucI2cAddress', ctypes.c_ubyte),
('ucFanParameters', ctypes.c_ubyte),
('ucFanMinRPM', ctypes.c_ubyte),
('ucFanMaxRPM', ctypes.c_ubyte),
('ucFlags', ctypes.c_ubyte),
]
ATOM_Vega10_Thermal_Controller = struct__ATOM_Vega10_Thermal_Controller
class struct__ATOM_Vega10_VCE_State_Record(Structure):
pass
struct__ATOM_Vega10_VCE_State_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_VCE_State_Record._fields_ = [
('ucVCEClockIndex', ctypes.c_ubyte),
('ucFlag', ctypes.c_ubyte),
('ucSCLKIndex', ctypes.c_ubyte),
('ucMCLKIndex', ctypes.c_ubyte),
]
ATOM_Vega10_VCE_State_Record = struct__ATOM_Vega10_VCE_State_Record
class struct__ATOM_Vega10_VCE_State_Table(Structure):
pass
struct__ATOM_Vega10_VCE_State_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_VCE_State_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_VCE_State_Record * 0),
]
ATOM_Vega10_VCE_State_Table = struct__ATOM_Vega10_VCE_State_Table
class struct__ATOM_Vega10_PowerTune_Table(Structure):
pass
struct__ATOM_Vega10_PowerTune_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_PowerTune_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usSocketPowerLimit', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usTdcLimit', ctypes.c_uint16),
('usEdcLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usTemperatureLimitHotSpot', ctypes.c_uint16),
('usTemperatureLimitLiquid1', ctypes.c_uint16),
('usTemperatureLimitLiquid2', ctypes.c_uint16),
('usTemperatureLimitHBM', ctypes.c_uint16),
('usTemperatureLimitVrSoc', ctypes.c_uint16),
('usTemperatureLimitVrMem', ctypes.c_uint16),
('usTemperatureLimitPlx', ctypes.c_uint16),
('usLoadLineResistance', ctypes.c_uint16),
('ucLiquid1_I2C_address', ctypes.c_ubyte),
('ucLiquid2_I2C_address', ctypes.c_ubyte),
('ucVr_I2C_address', ctypes.c_ubyte),
('ucPlx_I2C_address', ctypes.c_ubyte),
('ucLiquid_I2C_LineSCL', ctypes.c_ubyte),
('ucLiquid_I2C_LineSDA', ctypes.c_ubyte),
('ucVr_I2C_LineSCL', ctypes.c_ubyte),
('ucVr_I2C_LineSDA', ctypes.c_ubyte),
('ucPlx_I2C_LineSCL', ctypes.c_ubyte),
('ucPlx_I2C_LineSDA', ctypes.c_ubyte),
('usTemperatureLimitTedge', ctypes.c_uint16),
]
ATOM_Vega10_PowerTune_Table = struct__ATOM_Vega10_PowerTune_Table
class struct__ATOM_Vega10_PowerTune_Table_V2(Structure):
pass
struct__ATOM_Vega10_PowerTune_Table_V2._pack_ = 1 # source:False
struct__ATOM_Vega10_PowerTune_Table_V2._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usSocketPowerLimit', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usTdcLimit', ctypes.c_uint16),
('usEdcLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usTemperatureLimitHotSpot', ctypes.c_uint16),
('usTemperatureLimitLiquid1', ctypes.c_uint16),
('usTemperatureLimitLiquid2', ctypes.c_uint16),
('usTemperatureLimitHBM', ctypes.c_uint16),
('usTemperatureLimitVrSoc', ctypes.c_uint16),
('usTemperatureLimitVrMem', ctypes.c_uint16),
('usTemperatureLimitPlx', ctypes.c_uint16),
('usLoadLineResistance', ctypes.c_uint16),
('ucLiquid1_I2C_address', ctypes.c_ubyte),
('ucLiquid2_I2C_address', ctypes.c_ubyte),
('ucLiquid_I2C_Line', ctypes.c_ubyte),
('ucVr_I2C_address', ctypes.c_ubyte),
('ucVr_I2C_Line', ctypes.c_ubyte),
('ucPlx_I2C_address', ctypes.c_ubyte),
('ucPlx_I2C_Line', ctypes.c_ubyte),
('usTemperatureLimitTedge', ctypes.c_uint16),
]
ATOM_Vega10_PowerTune_Table_V2 = struct__ATOM_Vega10_PowerTune_Table_V2
class struct__ATOM_Vega10_PowerTune_Table_V3(Structure):
pass
struct__ATOM_Vega10_PowerTune_Table_V3._pack_ = 1 # source:False
struct__ATOM_Vega10_PowerTune_Table_V3._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usSocketPowerLimit', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usTdcLimit', ctypes.c_uint16),
('usEdcLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usTemperatureLimitHotSpot', ctypes.c_uint16),
('usTemperatureLimitLiquid1', ctypes.c_uint16),
('usTemperatureLimitLiquid2', ctypes.c_uint16),
('usTemperatureLimitHBM', ctypes.c_uint16),
('usTemperatureLimitVrSoc', ctypes.c_uint16),
('usTemperatureLimitVrMem', ctypes.c_uint16),
('usTemperatureLimitPlx', ctypes.c_uint16),
('usLoadLineResistance', ctypes.c_uint16),
('ucLiquid1_I2C_address', ctypes.c_ubyte),
('ucLiquid2_I2C_address', ctypes.c_ubyte),
('ucLiquid_I2C_Line', ctypes.c_ubyte),
('ucVr_I2C_address', ctypes.c_ubyte),
('ucVr_I2C_Line', ctypes.c_ubyte),
('ucPlx_I2C_address', ctypes.c_ubyte),
('ucPlx_I2C_Line', ctypes.c_ubyte),
('usTemperatureLimitTedge', ctypes.c_uint16),
('usBoostStartTemperature', ctypes.c_uint16),
('usBoostStopTemperature', ctypes.c_uint16),
('ulBoostClock', ctypes.c_uint32),
('Reserved', ctypes.c_uint32 * 2),
]
ATOM_Vega10_PowerTune_Table_V3 = struct__ATOM_Vega10_PowerTune_Table_V3
class struct__ATOM_Vega10_Hard_Limit_Record(Structure):
pass
struct__ATOM_Vega10_Hard_Limit_Record._pack_ = 1 # source:False
struct__ATOM_Vega10_Hard_Limit_Record._fields_ = [
('ulSOCCLKLimit', ctypes.c_uint32),
('ulGFXCLKLimit', ctypes.c_uint32),
('ulMCLKLimit', ctypes.c_uint32),
('usVddcLimit', ctypes.c_uint16),
('usVddciLimit', ctypes.c_uint16),
('usVddMemLimit', ctypes.c_uint16),
]
ATOM_Vega10_Hard_Limit_Record = struct__ATOM_Vega10_Hard_Limit_Record
class struct__ATOM_Vega10_Hard_Limit_Table(Structure):
pass
struct__ATOM_Vega10_Hard_Limit_Table._pack_ = 1 # source:False
struct__ATOM_Vega10_Hard_Limit_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Vega10_Hard_Limit_Record * 0),
]
ATOM_Vega10_Hard_Limit_Table = struct__ATOM_Vega10_Hard_Limit_Table
class struct__Vega10_PPTable_Generic_SubTable_Header(Structure):
pass
struct__Vega10_PPTable_Generic_SubTable_Header._pack_ = 1 # source:False
struct__Vega10_PPTable_Generic_SubTable_Header._fields_ = [
('ucRevId', ctypes.c_ubyte),
]
Vega10_PPTable_Generic_SubTable_Header = struct__Vega10_PPTable_Generic_SubTable_Header
__all__ = \
['ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2',
'ATOM_PPLIB_CLASSIFICATION_ACPI',
'ATOM_PPLIB_CLASSIFICATION_BOOT',
'ATOM_PPLIB_CLASSIFICATION_FORCED',
'ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE',
'ATOM_PPLIB_CLASSIFICATION_REST',
'ATOM_PPLIB_CLASSIFICATION_THERMAL',
'ATOM_PPLIB_CLASSIFICATION_UI_BALANCED',
'ATOM_PPLIB_CLASSIFICATION_UI_BATTERY',
'ATOM_PPLIB_CLASSIFICATION_UI_MASK',
'ATOM_PPLIB_CLASSIFICATION_UI_NONE',
'ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE',
'ATOM_PPLIB_CLASSIFICATION_UI_SHIFT',
'ATOM_VEGA10_PP_FANPARAMETERS_NOFAN',
'ATOM_VEGA10_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK',
'ATOM_VEGA10_PP_PLATFORM_CAP_BACO',
'ATOM_VEGA10_PP_PLATFORM_CAP_HARDWAREDC',
'ATOM_VEGA10_PP_PLATFORM_CAP_POWERPLAY',
'ATOM_VEGA10_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'ATOM_VEGA10_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL',
'ATOM_VEGA10_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL',
'ATOM_VEGA10_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL',
'ATOM_VEGA10_PP_THERMALCONTROLLER_LM96163',
'ATOM_VEGA10_PP_THERMALCONTROLLER_NONE',
'ATOM_VEGA10_PP_THERMALCONTROLLER_VEGA10',
'ATOM_Vega10_CLK_Dependency_Record',
'ATOM_Vega10_DCEFCLK_Dependency_Table',
'ATOM_Vega10_DISALLOW_ON_DC',
'ATOM_Vega10_DISPCLK_Dependency_Table',
'ATOM_Vega10_ENABLE_VARIBRIGHT', 'ATOM_Vega10_Fan_Table',
'ATOM_Vega10_Fan_Table_V2', 'ATOM_Vega10_Fan_Table_V3',
'ATOM_Vega10_GFXCLK_Dependency_Record',
'ATOM_Vega10_GFXCLK_Dependency_Record_V2',
'ATOM_Vega10_GFXCLK_Dependency_Table',
'ATOM_Vega10_Hard_Limit_Record', 'ATOM_Vega10_Hard_Limit_Table',
'ATOM_Vega10_MCLK_Dependency_Record',
'ATOM_Vega10_MCLK_Dependency_Table',
'ATOM_Vega10_MM_Dependency_Record',
'ATOM_Vega10_MM_Dependency_Table', 'ATOM_Vega10_PCIE_Record',
'ATOM_Vega10_PCIE_Table', 'ATOM_Vega10_PHYCLK_Dependency_Table',
'ATOM_Vega10_PIXCLK_Dependency_Table',
'ATOM_Vega10_POWERPLAYTABLE', 'ATOM_Vega10_PowerTune_Table',
'ATOM_Vega10_PowerTune_Table_V2',
'ATOM_Vega10_PowerTune_Table_V3',
'ATOM_Vega10_SOCCLK_Dependency_Table', 'ATOM_Vega10_State',
'ATOM_Vega10_State_Array', 'ATOM_Vega10_TABLE_REVISION_VEGA10',
'ATOM_Vega10_Thermal_Controller', 'ATOM_Vega10_VCE_State_Record',
'ATOM_Vega10_VCE_State_Table',
'ATOM_Vega10_VoltageMode_AVFS_Interpolate',
'ATOM_Vega10_VoltageMode_AVFS_WorstCase',
'ATOM_Vega10_VoltageMode_Static',
'ATOM_Vega10_Voltage_Lookup_Record',
'ATOM_Vega10_Voltage_Lookup_Table',
'Vega10_PPTable_Generic_SubTable_Header', '_VEGA10_PPTABLE_H_',
'struct__ATOM_Vega10_CLK_Dependency_Record',
'struct__ATOM_Vega10_DCEFCLK_Dependency_Table',
'struct__ATOM_Vega10_DISPCLK_Dependency_Table',
'struct__ATOM_Vega10_Fan_Table',
'struct__ATOM_Vega10_Fan_Table_V2',
'struct__ATOM_Vega10_Fan_Table_V3',
'struct__ATOM_Vega10_GFXCLK_Dependency_Record',
'struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2',
'struct__ATOM_Vega10_GFXCLK_Dependency_Table',
'struct__ATOM_Vega10_Hard_Limit_Record',
'struct__ATOM_Vega10_Hard_Limit_Table',
'struct__ATOM_Vega10_MCLK_Dependency_Record',
'struct__ATOM_Vega10_MCLK_Dependency_Table',
'struct__ATOM_Vega10_MM_Dependency_Record',
'struct__ATOM_Vega10_MM_Dependency_Table',
'struct__ATOM_Vega10_PCIE_Record',
'struct__ATOM_Vega10_PCIE_Table',
'struct__ATOM_Vega10_PHYCLK_Dependency_Table',
'struct__ATOM_Vega10_PIXCLK_Dependency_Table',
'struct__ATOM_Vega10_POWERPLAYTABLE',
'struct__ATOM_Vega10_PowerTune_Table',
'struct__ATOM_Vega10_PowerTune_Table_V2',
'struct__ATOM_Vega10_PowerTune_Table_V3',
'struct__ATOM_Vega10_SOCCLK_Dependency_Table',
'struct__ATOM_Vega10_State', 'struct__ATOM_Vega10_State_Array',
'struct__ATOM_Vega10_Thermal_Controller',
'struct__ATOM_Vega10_VCE_State_Record',
'struct__ATOM_Vega10_VCE_State_Table',
'struct__ATOM_Vega10_Voltage_Lookup_Record',
'struct__ATOM_Vega10_Voltage_Lookup_Table',
'struct__Vega10_PPTable_Generic_SubTable_Header',
'struct_atom_common_table_header']
================================================
FILE: src/upp/atom_gen/vega20_pptable.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/powerplay/inc/smu11_driver_if.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
_VEGA20_PPTABLE_H_ = True # macro
ATOM_VEGA20_PP_THERMALCONTROLLER_NONE = 0 # macro
ATOM_VEGA20_PP_THERMALCONTROLLER_VEGA20 = 26 # macro
ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
ATOM_VEGA20_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
ATOM_VEGA20_PP_PLATFORM_CAP_BACO = 0x8 # macro
ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO = 0x10 # macro
ATOM_VEGA20_PP_PLATFORM_CAP_ENABLESHADOWPSTATE = 0x20 # macro
ATOM_VEGA20_TABLE_REVISION_VEGA20 = 11 # macro
ATOM_VEGA20_ODFEATURE_MAX_COUNT = 32 # macro
ATOM_VEGA20_ODSETTING_MAX_COUNT = 32 # macro
ATOM_VEGA20_PPCLOCK_MAX_COUNT = 16 # macro
# values for enumeration 'ATOM_VEGA20_ODFEATURE_ID'
ATOM_VEGA20_ODFEATURE_ID__enumvalues = {
0: 'ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS',
1: 'ATOM_VEGA20_ODFEATURE_GFXCLK_CURVE',
2: 'ATOM_VEGA20_ODFEATURE_UCLK_MAX',
3: 'ATOM_VEGA20_ODFEATURE_POWER_LIMIT',
4: 'ATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT',
5: 'ATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN',
6: 'ATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN',
7: 'ATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM',
8: 'ATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE',
9: 'ATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL',
10: 'ATOM_VEGA20_ODFEATURE_COUNT',
}
ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS = 0
ATOM_VEGA20_ODFEATURE_GFXCLK_CURVE = 1
ATOM_VEGA20_ODFEATURE_UCLK_MAX = 2
ATOM_VEGA20_ODFEATURE_POWER_LIMIT = 3
ATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT = 4
ATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN = 5
ATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN = 6
ATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM = 7
ATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE = 8
ATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL = 9
ATOM_VEGA20_ODFEATURE_COUNT = 10
ATOM_VEGA20_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'ATOM_VEGA20_ODSETTING_ID'
ATOM_VEGA20_ODSETTING_ID__enumvalues = {
0: 'ATOM_VEGA20_ODSETTING_GFXCLKFMAX',
1: 'ATOM_VEGA20_ODSETTING_GFXCLKFMIN',
2: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1',
3: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1',
4: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2',
5: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2',
6: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3',
7: 'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3',
8: 'ATOM_VEGA20_ODSETTING_UCLKFMAX',
9: 'ATOM_VEGA20_ODSETTING_POWERPERCENTAGE',
10: 'ATOM_VEGA20_ODSETTING_FANRPMMIN',
11: 'ATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT',
12: 'ATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE',
13: 'ATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX',
14: 'ATOM_VEGA20_ODSETTING_COUNT',
}
ATOM_VEGA20_ODSETTING_GFXCLKFMAX = 0
ATOM_VEGA20_ODSETTING_GFXCLKFMIN = 1
ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1 = 2
ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1 = 3
ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2 = 4
ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2 = 5
ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3 = 6
ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3 = 7
ATOM_VEGA20_ODSETTING_UCLKFMAX = 8
ATOM_VEGA20_ODSETTING_POWERPERCENTAGE = 9
ATOM_VEGA20_ODSETTING_FANRPMMIN = 10
ATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT = 11
ATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE = 12
ATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX = 13
ATOM_VEGA20_ODSETTING_COUNT = 14
ATOM_VEGA20_ODSETTING_ID = ctypes.c_uint32 # enum
class struct__ATOM_VEGA20_OVERDRIVE8_RECORD(Structure):
pass
struct__ATOM_VEGA20_OVERDRIVE8_RECORD._pack_ = 1 # source:False
struct__ATOM_VEGA20_OVERDRIVE8_RECORD._fields_ = [
('ucODTableRevision', ctypes.c_ubyte),
('ODFeatureCount', ctypes.c_uint32),
('ODFeatureCapabilities', ctypes.c_ubyte * 32),
('ODSettingCount', ctypes.c_uint32),
('ODSettingsMax', ctypes.c_uint32 * 32),
('ODSettingsMin', ctypes.c_uint32 * 32),
]
ATOM_VEGA20_OVERDRIVE8_RECORD = struct__ATOM_VEGA20_OVERDRIVE8_RECORD
# values for enumeration 'ATOM_VEGA20_PPCLOCK_ID'
ATOM_VEGA20_PPCLOCK_ID__enumvalues = {
0: 'ATOM_VEGA20_PPCLOCK_GFXCLK',
1: 'ATOM_VEGA20_PPCLOCK_VCLK',
2: 'ATOM_VEGA20_PPCLOCK_DCLK',
3: 'ATOM_VEGA20_PPCLOCK_ECLK',
4: 'ATOM_VEGA20_PPCLOCK_SOCCLK',
5: 'ATOM_VEGA20_PPCLOCK_UCLK',
6: 'ATOM_VEGA20_PPCLOCK_FCLK',
7: 'ATOM_VEGA20_PPCLOCK_DCEFCLK',
8: 'ATOM_VEGA20_PPCLOCK_DISPCLK',
9: 'ATOM_VEGA20_PPCLOCK_PIXCLK',
10: 'ATOM_VEGA20_PPCLOCK_PHYCLK',
11: 'ATOM_VEGA20_PPCLOCK_COUNT',
}
ATOM_VEGA20_PPCLOCK_GFXCLK = 0
ATOM_VEGA20_PPCLOCK_VCLK = 1
ATOM_VEGA20_PPCLOCK_DCLK = 2
ATOM_VEGA20_PPCLOCK_ECLK = 3
ATOM_VEGA20_PPCLOCK_SOCCLK = 4
ATOM_VEGA20_PPCLOCK_UCLK = 5
ATOM_VEGA20_PPCLOCK_FCLK = 6
ATOM_VEGA20_PPCLOCK_DCEFCLK = 7
ATOM_VEGA20_PPCLOCK_DISPCLK = 8
ATOM_VEGA20_PPCLOCK_PIXCLK = 9
ATOM_VEGA20_PPCLOCK_PHYCLK = 10
ATOM_VEGA20_PPCLOCK_COUNT = 11
ATOM_VEGA20_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD(Structure):
pass
struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD._pack_ = 1 # source:False
struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD._fields_ = [
('ucTableRevision', ctypes.c_ubyte),
('PowerSavingClockCount', ctypes.c_uint32),
('PowerSavingClockMax', ctypes.c_uint32 * 16),
('PowerSavingClockMin', ctypes.c_uint32 * 16),
]
ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD = struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD
class struct__ATOM_VEGA20_POWERPLAYTABLE(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('VoltageMode', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('padding', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('SsCurve', struct_QuadraticInt_t),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_uint32),
('SlaveAddress', ctypes.c_uint32),
('ControllerPort', ctypes.c_uint32),
('ControllerName', ctypes.c_uint32),
('ThermalThrottler', ctypes.c_uint32),
('I2cProtocol', ctypes.c_uint32),
('I2cSpeed', ctypes.c_uint32),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('SocketPowerLimitAc0', ctypes.c_uint16),
('SocketPowerLimitAc0Tau', ctypes.c_uint16),
('SocketPowerLimitAc1', ctypes.c_uint16),
('SocketPowerLimitAc1Tau', ctypes.c_uint16),
('SocketPowerLimitAc2', ctypes.c_uint16),
('SocketPowerLimitAc2Tau', ctypes.c_uint16),
('SocketPowerLimitAc3', ctypes.c_uint16),
('SocketPowerLimitAc3Tau', ctypes.c_uint16),
('SocketPowerLimitDc', ctypes.c_uint16),
('SocketPowerLimitDcTau', ctypes.c_uint16),
('TdcLimitSoc', ctypes.c_uint16),
('TdcLimitSocTau', ctypes.c_uint16),
('TdcLimitGfx', ctypes.c_uint16),
('TdcLimitGfxTau', ctypes.c_uint16),
('TedgeLimit', ctypes.c_uint16),
('ThotspotLimit', ctypes.c_uint16),
('ThbmLimit', ctypes.c_uint16),
('Tvr_gfxLimit', ctypes.c_uint16),
('Tvr_memLimit', ctypes.c_uint16),
('Tliquid1Limit', ctypes.c_uint16),
('Tliquid2Limit', ctypes.c_uint16),
('TplxLimit', ctypes.c_uint16),
('FitLimit', ctypes.c_uint32),
('PpmPowerLimit', ctypes.c_uint16),
('PpmTemperatureThreshold', ctypes.c_uint16),
('MemoryOnPackage', ctypes.c_ubyte),
('padding8_limits', ctypes.c_ubyte),
('Tvr_SocLimit', ctypes.c_uint16),
('UlvVoltageOffsetSoc', ctypes.c_uint16),
('UlvVoltageOffsetGfx', ctypes.c_uint16),
('UlvSmnclkDid', ctypes.c_ubyte),
('UlvMp1clkDid', ctypes.c_ubyte),
('UlvGfxclkBypass', ctypes.c_ubyte),
('Padding234', ctypes.c_ubyte),
('MinVoltageGfx', ctypes.c_uint16),
('MinVoltageSoc', ctypes.c_uint16),
('MaxVoltageGfx', ctypes.c_uint16),
('MaxVoltageSoc', ctypes.c_uint16),
('LoadLineResistanceGfx', ctypes.c_uint16),
('LoadLineResistanceSoc', ctypes.c_uint16),
('DpmDescriptor', struct_DpmDescriptor_t * 11),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableEclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableFclk', ctypes.c_uint16 * 8),
('FreqTableDcefclk', ctypes.c_uint16 * 8),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTablePixclk', ctypes.c_uint16 * 8),
('FreqTablePhyclk', ctypes.c_uint16 * 8),
('DcModeMaxFreq', ctypes.c_uint16 * 11),
('Padding8_Clks', ctypes.c_uint16),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('GfxclkFidle', ctypes.c_uint16),
('GfxclkSlewRate', ctypes.c_uint16),
('CksEnableFreq', ctypes.c_uint16),
('Padding789', ctypes.c_uint16),
('CksVoltageOffset', struct_QuadraticInt_t),
('Padding567', ctypes.c_ubyte * 4),
('GfxclkDsMaxFreq', ctypes.c_uint16),
('GfxclkSource', ctypes.c_ubyte),
('Padding456', ctypes.c_ubyte),
('LowestUclkReservedForUlv', ctypes.c_ubyte),
('Padding8_Uclk', ctypes.c_ubyte * 3),
('PcieGenSpeed', ctypes.c_ubyte * 2),
('PcieLaneCount', ctypes.c_ubyte * 2),
('LclkFreq', ctypes.c_uint16 * 2),
('EnableTdpm', ctypes.c_uint16),
('TdpmHighHystTemperature', ctypes.c_uint16),
('TdpmLowHystTemperature', ctypes.c_uint16),
('GfxclkFreqHighTempLimit', ctypes.c_uint16),
('FanStopTemp', ctypes.c_uint16),
('FanStartTemp', ctypes.c_uint16),
('FanGainEdge', ctypes.c_uint16),
('FanGainHotspot', ctypes.c_uint16),
('FanGainLiquid', ctypes.c_uint16),
('FanGainVrGfx', ctypes.c_uint16),
('FanGainVrSoc', ctypes.c_uint16),
('FanGainPlx', ctypes.c_uint16),
('FanGainHbm', ctypes.c_uint16),
('FanPwmMin', ctypes.c_uint16),
('FanAcousticLimitRpm', ctypes.c_uint16),
('FanThrottlingRpm', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('OverrideAvfsGb', ctypes.c_ubyte * 2),
('Padding8_Avfs', ctypes.c_ubyte * 2),
('qAvfsGb', struct_QuadraticInt_t * 2),
('dBtcGbGfxCksOn', struct_DroopInt_t),
('dBtcGbGfxCksOff', struct_DroopInt_t),
('dBtcGbGfxAfll', struct_DroopInt_t),
('dBtcGbSoc', struct_DroopInt_t),
('qAgingGb', struct_LinearInt_t * 2),
('qStaticVoltageOffset', struct_QuadraticInt_t * 2),
('DcTol', ctypes.c_uint16 * 2),
('DcBtcEnabled', ctypes.c_ubyte * 2),
('Padding8_GfxBtc', ctypes.c_ubyte * 2),
('DcBtcMin', ctypes.c_int16 * 2),
('DcBtcMax', ctypes.c_uint16 * 2),
('XgmiLinkSpeed', ctypes.c_ubyte * 2),
('XgmiLinkWidth', ctypes.c_ubyte * 2),
('XgmiFclkFreq', ctypes.c_uint16 * 2),
('XgmiUclkFreq', ctypes.c_uint16 * 2),
('XgmiSocclkFreq', ctypes.c_uint16 * 2),
('XgmiSocVoltage', ctypes.c_uint16 * 2),
('DebugOverrides', ctypes.c_uint32),
('ReservedEquation0', struct_QuadraticInt_t),
('ReservedEquation1', struct_QuadraticInt_t),
('ReservedEquation2', struct_QuadraticInt_t),
('ReservedEquation3', struct_QuadraticInt_t),
('MinVoltageUlvGfx', ctypes.c_uint16),
('MinVoltageUlvSoc', ctypes.c_uint16),
('MGpuFanBoostLimitRpm', ctypes.c_uint16),
('padding16_Fan', ctypes.c_uint16),
('FanGainVrMem0', ctypes.c_uint16),
('FanGainVrMem1', ctypes.c_uint16),
('DcBtcGb', ctypes.c_uint16 * 2),
('Reserved', ctypes.c_uint32 * 11),
('Padding32', ctypes.c_uint32 * 3),
('MaxVoltageStepGfx', ctypes.c_uint16),
('MaxVoltageStepSoc', ctypes.c_uint16),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMem0VrMapping', ctypes.c_ubyte),
('VddMem1VrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('SocUlvPhaseSheddingMask', ctypes.c_ubyte),
('ExternalSensorPresent', ctypes.c_ubyte),
('Padding8_V', ctypes.c_ubyte),
('GfxMaxCurrent', ctypes.c_uint16),
('GfxOffset', ctypes.c_byte),
('Padding_TelemetryGfx', ctypes.c_ubyte),
('SocMaxCurrent', ctypes.c_uint16),
('SocOffset', ctypes.c_byte),
('Padding_TelemetrySoc', ctypes.c_ubyte),
('Mem0MaxCurrent', ctypes.c_uint16),
('Mem0Offset', ctypes.c_byte),
('Padding_TelemetryMem0', ctypes.c_ubyte),
('Mem1MaxCurrent', ctypes.c_uint16),
('Mem1Offset', ctypes.c_byte),
('Padding_TelemetryMem1', ctypes.c_ubyte),
('AcDcGpio', ctypes.c_ubyte),
('AcDcPolarity', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('VR1HotGpio', ctypes.c_ubyte),
('VR1HotPolarity', ctypes.c_ubyte),
('Padding1', ctypes.c_ubyte),
('Padding2', ctypes.c_ubyte),
('LedPin0', ctypes.c_ubyte),
('LedPin1', ctypes.c_ubyte),
('LedPin2', ctypes.c_ubyte),
('padding8_4', ctypes.c_ubyte),
('PllGfxclkSpreadEnabled', ctypes.c_ubyte),
('PllGfxclkSpreadPercent', ctypes.c_ubyte),
('PllGfxclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadEnabled', ctypes.c_ubyte),
('UclkSpreadPercent', ctypes.c_ubyte),
('UclkSpreadFreq', ctypes.c_uint16),
('FclkSpreadEnabled', ctypes.c_ubyte),
('FclkSpreadPercent', ctypes.c_ubyte),
('FclkSpreadFreq', ctypes.c_uint16),
('FllGfxclkSpreadEnabled', ctypes.c_ubyte),
('FllGfxclkSpreadPercent', ctypes.c_ubyte),
('FllGfxclkSpreadFreq', ctypes.c_uint16),
('I2cControllers', struct_I2cControllerConfig_t * 7),
('BoardReserved', ctypes.c_uint32 * 10),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct__ATOM_VEGA20_POWERPLAYTABLE._pack_ = 1 # source:False
struct__ATOM_VEGA20_POWERPLAYTABLE._fields_ = [
('sHeader', struct_atom_common_table_header),
('ucTableRevision', ctypes.c_ubyte),
('usTableSize', ctypes.c_uint16),
('ulGoldenPPID', ctypes.c_uint32),
('ulGoldenRevision', ctypes.c_uint32),
('usFormatID', ctypes.c_uint16),
('ulPlatformCaps', ctypes.c_uint32),
('ucThermalControllerType', ctypes.c_ubyte),
('usSmallPowerLimit1', ctypes.c_uint16),
('usSmallPowerLimit2', ctypes.c_uint16),
('usBoostPowerLimit', ctypes.c_uint16),
('usODTurboPowerLimit', ctypes.c_uint16),
('usODPowerSavePowerLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('PowerSavingClockTable', ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD),
('OverDrive8Table', ATOM_VEGA20_OVERDRIVE8_RECORD),
('usReserve', ctypes.c_uint16 * 5),
('smcPPTable', struct_PPTable_t),
]
ATOM_Vega20_POWERPLAYTABLE = struct__ATOM_VEGA20_POWERPLAYTABLE
__all__ = \
['ATOM_VEGA20_ODFEATURE_COUNT',
'ATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'ATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN',
'ATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'ATOM_VEGA20_ODFEATURE_GFXCLK_CURVE',
'ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS', 'ATOM_VEGA20_ODFEATURE_ID',
'ATOM_VEGA20_ODFEATURE_MAX_COUNT',
'ATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE',
'ATOM_VEGA20_ODFEATURE_POWER_LIMIT',
'ATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN',
'ATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM',
'ATOM_VEGA20_ODFEATURE_UCLK_MAX', 'ATOM_VEGA20_ODSETTING_COUNT',
'ATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT',
'ATOM_VEGA20_ODSETTING_FANRPMMIN',
'ATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE',
'ATOM_VEGA20_ODSETTING_GFXCLKFMAX',
'ATOM_VEGA20_ODSETTING_GFXCLKFMIN', 'ATOM_VEGA20_ODSETTING_ID',
'ATOM_VEGA20_ODSETTING_MAX_COUNT',
'ATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX',
'ATOM_VEGA20_ODSETTING_POWERPERCENTAGE',
'ATOM_VEGA20_ODSETTING_UCLKFMAX',
'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1',
'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2',
'ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3',
'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1',
'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2',
'ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3',
'ATOM_VEGA20_OVERDRIVE8_RECORD',
'ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD',
'ATOM_VEGA20_PPCLOCK_COUNT', 'ATOM_VEGA20_PPCLOCK_DCEFCLK',
'ATOM_VEGA20_PPCLOCK_DCLK', 'ATOM_VEGA20_PPCLOCK_DISPCLK',
'ATOM_VEGA20_PPCLOCK_ECLK', 'ATOM_VEGA20_PPCLOCK_FCLK',
'ATOM_VEGA20_PPCLOCK_GFXCLK', 'ATOM_VEGA20_PPCLOCK_ID',
'ATOM_VEGA20_PPCLOCK_MAX_COUNT', 'ATOM_VEGA20_PPCLOCK_PHYCLK',
'ATOM_VEGA20_PPCLOCK_PIXCLK', 'ATOM_VEGA20_PPCLOCK_SOCCLK',
'ATOM_VEGA20_PPCLOCK_UCLK', 'ATOM_VEGA20_PPCLOCK_VCLK',
'ATOM_VEGA20_PP_PLATFORM_CAP_BACO',
'ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO',
'ATOM_VEGA20_PP_PLATFORM_CAP_ENABLESHADOWPSTATE',
'ATOM_VEGA20_PP_PLATFORM_CAP_HARDWAREDC',
'ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY',
'ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'ATOM_VEGA20_PP_THERMALCONTROLLER_NONE',
'ATOM_VEGA20_PP_THERMALCONTROLLER_VEGA20',
'ATOM_VEGA20_TABLE_REVISION_VEGA20', 'ATOM_Vega20_POWERPLAYTABLE',
'_VEGA20_PPTABLE_H_', 'struct_DpmDescriptor_t',
'struct_DroopInt_t', 'struct_I2cControllerConfig_t',
'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',
'struct__ATOM_VEGA20_OVERDRIVE8_RECORD',
'struct__ATOM_VEGA20_POWERPLAYTABLE',
'struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD',
'struct_atom_common_table_header']
================================================
FILE: src/upp/decode.py
================================================
import codecs
import struct
import ctypes
from upp.atom_gen import atombios
from collections import OrderedDict
from importlib import import_module
# These two used to be imported from drivers/gpu/drm/amd/amdgpu/atom.h, but
# from kernel v 6.6 the ATOM_ROM_PART_NUMBER_PTR got removed, so harcoding them
rom_tbl_ptr = 0x48
part_num_ptr = 0x6e
common_hdr = atombios.struct__ATOM_COMMON_TABLE_HEADER
master_dt_tbl_struct = atombios.struct__ATOM_MASTER_DATA_TABLE
atom_rom_header = atombios.struct__ATOM_ROM_HEADER
atom_rom_header_v2 = atombios.struct__ATOM_ROM_HEADER_V2_1
leagcy_vrom_offset = 0x40000
# Base ctypes variables, in order to distinguish from structures and arrays
primitives = [
ctypes.c_byte, ctypes.c_ubyte,
ctypes.c_int16, ctypes.c_uint16,
ctypes.c_int32, ctypes.c_uint32,
ctypes.c_float
]
# Defined as uint in kernel, but in reality these are float
float_fields = ['a', 'b', 'c', 'm',
'VcBtcPsmA', 'VcBtcPsmB', 'VcBtcVminA', 'VcBtcVminB',
'DfllBtcMasterScalerM', 'DfllBtcSlaveScalerM',
'DfllBtcMasterScalerB', 'DfllBtcSlaveScalerB',
'DvoPsmDownThresholdVoltage', 'DvoPsmUpThresholdVoltage',
'DvoFmaxLowScaler', 'DcsPfGfxFopt', 'DcsPfUclkFopt',
'CacEdcCacLeakageC0', 'CacEdcCacLeakageC1',
'CacEdcCacLeakageC2', 'CacEdcCacLeakageC3',
'CacEdcCacLeakageC4', 'CacEdcCacLeakageC5',
'CacEdcCac_m', 'CacEdcCac_b', 'XVmin_Gfx_EdcThreshScalar',
'XVmin_Soc_EdcThreshScalar'
]
float_array_patterns = ['Fset', 'Vdroop', 'VcBtcPsm',
'VcBtcVminA', 'VcBtcVminB', 'Droop_'
]
def odict(init_data=None):
"""
Returns ordered dictionary (for consistent behavior on Python 2.7 & 3.6+)
"""
if init_data:
return OrderedDict(init_data)
else:
return OrderedDict()
def _read_binary_file(filename):
f = open(filename, 'rb')
raw_data = f.read()
f.close()
return bytearray(raw_data)
def _write_binary_file(filename, raw_data):
try:
f = open(filename, 'wb')
f.write(raw_data)
f.close()
except PermissionError as e:
msg = 'ERROR: {}\n' + \
'To make PowerPlay table file writable: sudo chmod o+w {}'
print(msg.format(e, filename, filename))
print(e)
def _bytes2hex(bytes):
"""
Hex decoding helper
Does special gymnastics to ensure consistent decoding on Python 2.7 & 3.x
"""
return codecs.encode(bytes, 'hex_codec').decode()
def _checksum(rom_bytes):
checksum = 0
checksum_bytes_length = rom_bytes[0x2] * 512
for byte in rom_bytes[:checksum_bytes_length]:
checksum += byte
checksum = checksum & 0xff
return checksum
def _rom_info(vrom_file):
"""
Displays the VROM image info and returns PowerPlay table offset and size
Returns:
pp_offset, pp_length (tuple): pp_offset (int): pp table offset in vROM
pp_length (int): pp table length
"""
rom_bytes = _read_binary_file(vrom_file)
# VROM magic validation
rom_magic_bytes = rom_bytes[:2]
rom_magic_str = _bytes2hex(rom_magic_bytes).upper()
rom_offset = 0
# Since Navi 3x the UEFI VBIOS comes first, the legacy VBIOS is at 0x40000
if rom_magic_str == 'AA55':
rom_offset = leagcy_vrom_offset
msg = 'UEFIU video ROM magic detected: {}, using legacy VBIOS ' + \
'at offset 0x{:X}'
print(msg.format(rom_magic_str, rom_offset))
rom_bytes = rom_bytes[rom_offset:]
rom_magic_bytes = rom_bytes[:2]
rom_magic_str = _bytes2hex(rom_magic_bytes).upper()
if rom_magic_str != '55AA':
err_msg = 'Invalid Video ROM magic: {}, must be 55AA'
print(err_msg.format(rom_magic_str))
return None, None
# Fetching ATOM 'Common Table'
rom_tbl_offset_bytes = rom_bytes[rom_tbl_ptr:rom_tbl_ptr+2]
rom_tbl_offset = struct.unpack(' 0:
print('Found {} $PS1 magic at offset 0x{:X}'.format(card_gen,
rom_offset + ps1_magic_offset))
break
if ps1_magic_offset > 0:
pp_tbl_offset = ps1_magic_offset + 0x110
else:
print('ERROR: Can not find PowerPlay table :(')
return 0, 0
msg = 'Looking into PowerPlayInfo at offset 0x{:04X}'
print(msg.format(rom_offset + pp_tbl_offset))
pp_tbl_header_bytes = rom_bytes[pp_tbl_offset:pp_tbl_offset+5]
pp_tbl_header = common_hdr.from_buffer(pp_tbl_header_bytes)
pp_tbl_len = pp_tbl_header.usStructureSize
msg = 'Found {} bytes long PowerPlayInfo table v{}.{} at offset 0x{:04X}'
print(msg.format(pp_tbl_len, pp_tbl_header.ucTableFormatRevision,
pp_tbl_header.ucTableContentRevision,
rom_offset + pp_tbl_offset))
return rom_offset + pp_tbl_offset, pp_tbl_len
def extract_rom(vrom_file, out_pp_file):
"""
Extracts PowerPlay table from VROM image
"""
pp_tbl_offset, pp_tbl_len = _rom_info(vrom_file)
if not pp_tbl_offset:
return None
rom_bytes = _read_binary_file(vrom_file)
pp_tbl = rom_bytes[pp_tbl_offset:pp_tbl_offset+pp_tbl_len]
print('Saving PowerPlay table to {}'.format(out_pp_file))
_write_binary_file(out_pp_file, pp_tbl)
def inject_pp_table(input_rom, output_rom, pp_bin_file):
"""
Injects PowerPlay table into VROM image
"""
pp_tbl_offset, pp_tbl_len = _rom_info(input_rom)
if not pp_tbl_offset:
return None
pp_bytes = _read_binary_file(pp_bin_file)
if len(pp_bytes) != pp_tbl_len:
msg = 'ERROR: The length of {} PowerPlay table must match the ' + \
'length of PowerPlay table in {} vROM image ({} bytes)'
print(msg.format(pp_bin_file, input_rom, pp_tbl_len))
return None
rom_bytes = _read_binary_file(input_rom)
print('Replacing PowerPlay data...')
rom_bytes[pp_tbl_offset:pp_tbl_offset+pp_tbl_len] = pp_bytes
new_checksum = _checksum(rom_bytes)
print('Shifting checksum by {}...'.format(new_checksum))
rom_bytes[0x21] = (rom_bytes[0x21] - new_checksum) & 0xff
_write_binary_file(output_rom, rom_bytes)
return True
def validate_pp(header, rawbytes, rawdump):
"""
Validates PowerPlay master table header
"""
pp_frev = header.ucTableFormatRevision
pp_crev = header.ucTableContentRevision
pp_len = header.usStructureSize
rw_len = len(rawbytes)
if pp_len != rw_len and pp_frev in [20, 21, 22] and rw_len == 4095:
msg = 'WARNING: Trying to work around rev {}.{} table truncated ' + \
'at 0x{:04x}, setting all missing values to zeroes.'
print(msg.format(pp_frev, pp_crev, rw_len))
rawbytes.extend(bytearray(pp_len-rw_len))
rw_len = len(rawbytes)
if pp_len != rw_len:
msg = 'ERROR: Header length ({}) differs from file length ({}). ' + \
'Is this a valid PowerPlay table?'
print(msg.format(pp_len, rw_len))
return None
if rawdump:
msg = 'PowerPlay table rev {}.{} size {} bytes'
print(msg.format(pp_frev, pp_crev, pp_len))
return pp_frev, pp_crev
def decode_pp_table(rawdata, c_struct):
"""
De-serializes PowerPlay binary data into a ctypes structure
"""
return c_struct.from_buffer(rawdata)
def _get_bigcap_indices(string):
"""
Returns list of positions in a string where separate words start
PowerPlay sub-tables have names like 'VddcLookupTable', 'VCEStateTable' or
'PCIETable'. We need to split this into separate words, but some words are
upper-caps acronyms, followed by another word starting with upper-cap.
Here we do special gymnastics to return the starting position of all words.
"""
indices = []
i = 0
while i < len(string)-1: # yes, finish with 2nd last char in the string
is_i_big = True if string[i].isupper() else False
is_i_plus1_big = True if string[i+1].isupper() else False
is_i_plus1_small = not is_i_plus1_big
if is_i_big:
if (is_i_plus1_small and i not in indices) or i == 0:
indices.append(i)
else:
if is_i_plus1_big:
indices.append(i+1)
i = i + 1
return indices
def _print_raw_value(offset, symbol, rawbytes, name, desc, value):
hexval = _bytes2hex(rawbytes)
raw_msg = ' 0x{:04x} ({:04n}) {} {:>8} {:42s}:{: n}'
# Polaris variable names have small-caps prefixes that we don't want
big_caps = _get_bigcap_indices(name)
if big_caps:
name = name[big_caps[0]:]
if desc:
name = name + ' ' + desc
print(raw_msg.format(offset, offset, symbol, hexval, name, value))
def _get_ofst_cstruct(module, name, header_bytes, debug=False):
"""
Resolves C structure name and its size from parent table's name
For Polaris and Vega 10 generations of GPUs Linux kernel ATOM BIOS C data
structures points to nested child sub-tables using relative pointers.
Which table is behind which pointer can only be guessed by a table name in
the master PowerPlay tables. Furthermore, some nested tables come in
few different versions, depending on particular GPU chip. This function
implements logic that does this guess game, some table versioning logic as
well as nested tables size calculation. Finally, it has some workarounds
for semi-broken (or just very unusual) fields in some nested tables.
Parameters:
module (string): Points to cstruct module defining data structures for the
appropriate generation of GPUs
name (string): Name of the child table used for data structure resolution
header_bytes (bytearray): A 2-byte array where 1st byte contains the nested
table revision id and 2nd byte number of entries
debug (bool): Debugging output enabled
Returns:
cs, total_len (tuple): cs (class): resolved C structure
total_len (int): structure's data length in bytes
"""
cs = None
total_len = 0
revid = struct.unpack('B', header_bytes[:1])[0]
pp_module = import_module(module)
module_suffix = '.'.join(module.split('.')[-2:])
if module_suffix == 'atom_gen.pptable_v1_0':
family = 'Tonga'
elif module_suffix == 'atom_gen.vega10_pptable':
family = 'Vega10'
else:
print('ERROR: Module {} does not contain jump structures.', module)
return cs, total_len
# A helper for translating table names into resolvable ctype identifiers
def resolve_cstruct(name, family=family):
big_caps = _get_bigcap_indices(name)
words = []
for big_letter in big_caps:
i = big_caps.index(big_letter)
last = None if big_letter == big_caps[-1] else big_caps[i+1]
word = name[big_letter:last]
if word.endswith('clk'):
word = word.upper()
if word.startswith('Vdd'):
word = 'Voltage'
if word == 'PPM':
word = 'PowerTune'
elif word == 'Tune': # 'Power' + 'Tune' -> 'PowerTune'
words[-1] = words[-1] + word
elif word == 'Clk': # 'Disp' + 'Clk' -> 'DISPCLK'
words[-1] = words[-1].upper() + word.upper()
else:
words.append(word)
ext_cstruct = '_'.join(['ATOM', family] + words)
if debug:
print('DEBUG: Resolved external struct "{}"'.format(ext_cstruct),
'from "{}"'.format(family), 'family and', words, 'keywords')
return ext_cstruct
# These are the 'simple' version-less tables that don't depend on GPU gen.
simple_tables = [
'StateArray', 'ThermalController', 'MclkDependencyTable',
'SocclkDependencyTable', 'DcefclkDependencyTable',
'VddgfxLookupTable', 'VddcLookupTable', 'VddmemLookupTable',
'VddciLookupTable', 'PixclkDependencyTable', 'DispClkDependencyTable',
'PhyClkDependencyTable', 'MMDependencyTable', 'HardLimitTable',
'VCEStateTable', 'GPIOTable'
]
if name in simple_tables:
cs = getattr(pp_module, resolve_cstruct(name))
# The rest are 'complex' tables, that may have versions and suffixes
elif name == 'SclkDependencyTable': # ATOM_Polaris_SCLK_Dependency_Table
cs = getattr(pp_module, resolve_cstruct(name, 'Polaris'))
elif name == 'GfxclkDependencyTable':
# This by default points to ATOM_Vega10_GFXCLK_Dependency_Record but it
# needs override to ATOM_Vega10_GFXCLK_Dependency_Record_V2 for rev > 0
if revid in [0, 1]: # ATOM_Vega10_GFXCLK_Dependency_Table
cs = getattr(pp_module, resolve_cstruct(name))
entries_class = cs._fields_[-1][-1]
entry_name, entry_type = cs._fields_[-1]
assert entry_type._length_ == 0
if revid == 0:
record_struct = 'ATOM_Vega10_GFXCLK_Dependency_Record'
else:
record_struct = 'ATOM_Vega10_GFXCLK_Dependency_Record_V2'
entry_type = getattr(pp_module, record_struct)
class FixedEntriesTypeArray(ctypes.LittleEndianStructure):
_pack_ = cs._pack_
_fields_ = cs._fields_[:-1] + [(entry_name, entry_type * 1)]
cs = FixedEntriesTypeArray
else:
cs = getattr(pp_module, resolve_cstruct(name))
elif name == 'FanTable':
if revid == 8: # ATOM_Tonga_Fan_Table (v8)
cs = getattr(pp_module, resolve_cstruct(name))
elif revid == 9: # ATOM_Polaris_Fan_Table (v9)
cs = getattr(pp_module, resolve_cstruct(name, 'Polaris'))
elif revid == 10: # ATOM_Vega10_Fan_Table (v10)
cs = getattr(pp_module, resolve_cstruct(name))
elif revid == 11: # ATOM_Vega10_Fan_Table_V2 (v11)
cs = getattr(pp_module, resolve_cstruct(name) + '_V2')
else: # ATOM_Vega10_Fan_Table_V3 (v12+)
cs = getattr(pp_module, resolve_cstruct(name) + '_V3')
elif name == 'PCIETable':
if revid == 1: # ATOM_Polaris10_PCIE_Table (v1)
cs = getattr(pp_module, resolve_cstruct(name, 'Polaris10'))
else: # ATOM_Vega10_PCIE_Table (v2)
cs = getattr(pp_module, resolve_cstruct(name))
elif name in 'PPMTable': # ATOM_Tonga_PowerTune_Table (v1)
cs = getattr(pp_module, resolve_cstruct(name))
elif name in 'PowerTuneTable':
if revid == 4: # ATOM_Polaris_PowerTune_Table (v4)
cs = getattr(pp_module, resolve_cstruct(name, 'Polaris'))
elif revid == 5: # ATOM_Vega10_PowerTune_Table (v5)
cs = getattr(pp_module, resolve_cstruct(name))
elif revid == 6: # ATOM_Vega10_PowerTune_Table_V2 (v6)
cs = getattr(pp_module, resolve_cstruct(name) + '_V2')
else: # ATOM_Vega10_PowerTune_Table_V3 (v7+)
cs = getattr(pp_module, resolve_cstruct(name) + '_V3')
else:
print('ERROR: Unknown data structure {} v{}'.format(name, revid))
return cs, total_len
# Here we get the byte-length of the offset-ed C structures
if 'ucNumEntries' in cs._fields_[1]:
# Vega10 and older C structures all have number of entries set to 0, we
# override it with real value that we get from an actual pp_table data
entry_name, entry_type = cs._fields_[-1]
entry_count = struct.unpack('B', header_bytes[1:2])[0]
class FixedEntriesCountArray(ctypes.LittleEndianStructure):
_pack_ = cs._pack_
_fields_ = cs._fields_[:-1] + [(entry_name,
entry_type._type_ * entry_count)]
cs = FixedEntriesCountArray
# This workarounds the oddity of last field in ATOM_Vega10_State_Array
# being named 'states', yet all other C structs names it 'entries'
entries_field_name = cs._fields_[-1][0]
cs_entries = getattr(cs, entries_field_name)
entry_len = cs_entries.size
total_len = cs_entries.offset + cs_entries.size * entry_count
else:
total_len = 0
for field in cs._fields_:
if field[1] in primitives:
total_len += struct.calcsize(field[1]._type_)
else:
entry_len = struct.calcsize(field[1]._type_._type_)
array_size = field[1]._length_
total_len += entry_len * array_size
if debug:
print('DEBUG: Detected C structture of', len(cs._fields_),
'elements, total size of', total_len, 'bytes')
return cs, total_len
def build_data_tree(data, raw=None, decoded=None, parent_name='/',
meta=None, rawdump=False, debug=False):
"""
Converts ctypes structure into tree-like ordered dictionary
This relies heavily on ATOM BIOS C structures extracted from Linux kernel,
where variable names as well as table and array structures are defined.
Parameters:
data (ctypes instance): Contains binary data that can be referenced by C
variable names that has been decoded using ctypes
from_buffer() call
raw (bytearray): Raw PowerPlay data buffer in bytearray format
decoded (OrderedDictdict): A special tree-like structure of nested ordered
dictionaries that describes binary data
structures containing PowerPlay parameters,
used as parameter due to recursive nature of
this function
parent_name (string): Reference to a parent of data-structure currently
being processed, used for recursion
meta (dict): Containing 'size' and 'offset' keys, used for calculating
offsets & sizes for PowerPlay sub-structure tables
rawdump (bool): Shows PowerPlay data in a table format showing offsets
and hex values on a console instead of returning data dict
debug (bool): Debugging output enabled
Returns:
decoded (dict): A resulting PowerPlay data-structure in a dictionary form
"""
# Init decoded data dictionary
if decoded is None:
decoded = odict()
if rawdump:
print(' Offset (dec.) t Raw val. Variable name ' + ' '*24 +
'Decoded value\n' + '-'*78)
# Here we parse data items in C Arrays (all items are same type)
if issubclass(type(data), ctypes.Array):
d_size = meta['size'] // len(data)
d_offset = meta['ofs']
index = 0
# Base data types are parsed as is
if data._type_ in primitives:
d_symbol = data._type_._type_
for d_value in data:
d_bytes = d_value.to_bytes(d_size, 'little',
signed=(d_value < 0))
for float_match_substring in float_array_patterns:
if float_match_substring in parent_name:
d_symbol = 'f'
d_value = struct.unpack(d_symbol, d_bytes)[0]
child_key = index
decoded[child_key] = {'value': d_value,
'offset': d_offset,
'type': d_symbol}
desc = ''
if 'desc' in meta and index < len(meta['desc']) - 1:
desc = meta['desc'][index]
decoded[child_key]['desc'] = desc
if rawdump:
_print_raw_value(d_offset, d_symbol, d_bytes,
parent_name, desc, d_value)
d_offset += d_size
index += 1
# Other types are recursed back into this very same function
else:
for item in data:
if debug:
msg = 'DEBUG: Recursive dive into "{}" array, element {}'
print(msg.format(parent_name, index))
child_key = index
decoded[child_key] = odict()
r_meta = {'ofs': d_offset, 'size': d_size}
build_data_tree(item, raw, decoded[child_key], parent_name,
r_meta, rawdump, debug)
if debug:
msg = 'DEBUG: End of recursion into "{}"'
print(msg.format(parent_name))
d_offset += d_size
index += 1
# Here we parse data items in C Structures
elif issubclass(type(data), ctypes.Structure):
for name, ctyp_cls in data._fields_:
d_value = getattr(data, name)
d_meta = getattr(type(data), name)
d_size = d_meta.size
if name.startswith(('uc', 'us', 'ul')):
name = name[2:]
if 'ofs' not in meta:
d_offset = d_meta.offset
else:
d_offset = meta['ofs'] + d_meta.offset
# Base types parsed as is, exception are floats & offset tables
if ctyp_cls in primitives:
d_symbol = ctyp_cls._type_
d_size = d_meta.size
if ctyp_cls._type_ in ['b', 'h']:
d_bytes = d_value.to_bytes(d_size, 'little', signed=True)
else:
d_bytes = d_value.to_bytes(d_size, 'little')
if ctyp_cls == ctypes.c_uint and name in float_fields:
d_symbol = 'f'
d_value = struct.unpack(d_symbol, d_bytes)[0]
if rawdump:
_print_raw_value(d_offset, d_symbol, d_bytes,
name, '', d_value)
# Check if this is a pointer to an offset-ed table:
if not name.endswith(('ArrayOffset',
'TableOffset',
'ControllerOffset')):
decoded[name] = {'value': d_value,
'offset': d_offset,
'type': d_symbol}
# This part parses legacy offset-ed tables (Polaris, Vega10)
else:
name = name[:-6]
ofst = d_value
if not ofst:
decoded[name] = None
if debug:
print('DEBUG: Table', name, 'points to 0, ignore')
else:
c_struct, size = _get_ofst_cstruct(data.__module__,
name,
raw[ofst:ofst+2],
debug)
if c_struct:
top = ofst + size
array_data = c_struct.from_buffer(raw[:top], ofst)
r_meta = {'ofs': ofst, 'size': size}
if debug:
msg = 'DEBUG: Recursive jump at offset ' + \
'{} into "{}"'
print(msg.format(ofst, name))
decoded[name] = odict()
build_data_tree(array_data, raw, decoded[name],
name, r_meta, rawdump, debug)
if debug:
msg = 'DEBUG: End of recursion into "{}"'
print(msg.format(name))
# Other types are recursed back into this very same function
else:
if debug:
msg = 'DEBUG: Recursive dive from {} struct into "{}"'
print(msg.format(parent_name, name))
r_meta = {'ofs': d_offset, 'size': d_size}
if 'enum' in meta:
if name in meta['enum']:
r_meta['enum'] = {name: meta['enum'][name]}
if parent_name in meta['enum'] and name in ['min', 'max']:
r_meta['desc'] = meta['enum'][parent_name]['enum']
if parent_name in meta['enum'] and name in ['cap']:
r_meta['desc'] = meta['enum'][parent_name]['cap']
decoded[name] = odict()
build_data_tree(d_value, raw, decoded[name], name, r_meta,
rawdump, debug)
if debug:
print('DEBUG: End of recursion into "{}"'.format(name))
else:
print('ERROR: Unexpected data structure:', type(data))
return decoded
def select_pp_struct(rawbytes, rawdump=False, debug=False):
"""
Selects appropriate variant of ctype data structures for conversion
"""
pp_header = common_hdr.from_buffer(rawbytes[:4])
pp_ver = validate_pp(pp_header, rawbytes, rawdump)
enum_structs = {}
# Polaris aka RX470/RX480/RX570/RX580/RX590
if pp_ver == (7, 1):
gpugen = 'Polaris'
from upp.atom_gen import pptable_v1_0 as pp_struct
ctypes_strct = pp_struct.struct__ATOM_Tonga_POWERPLAYTABLE
# Vega 10 aka Vega 56/64
elif pp_ver == (8, 1):
gpugen = 'Vega 10'
from upp.atom_gen import vega10_pptable as pp_struct
ctypes_strct = pp_struct.struct__ATOM_Vega10_POWERPLAYTABLE
# Vega 20 aka Radeon VII
elif pp_ver == (11, 0):
gpugen = 'Vega 20'
from upp.atom_gen import vega20_pptable as pp_struct
ctypes_strct = pp_struct.struct__ATOM_VEGA20_POWERPLAYTABLE
# Navi 10 aka RX5700/RX5600(XT,M), Navi 14 aka RX5500/RX5300(XT,M)
elif pp_ver == (12, 0):
gpugen = 'Navi 10 or 14'
from upp.atom_gen import smu_v11_0_navi10 as pp_struct
ctypes_strct = pp_struct.struct_smu_11_0_powerplay_table
enum_structs = {
'power_saving_clock': {
'prefix': 'SMU_11_0_PPCLOCK_',
'struct': pp_struct.SMU_11_0_PPCLOCK_ID__enumvalues
},
'overdrive_table': {
'prefix': 'SMU_11_0_ODSETTING_',
'struct': pp_struct.SMU_11_0_ODSETTING_ID__enumvalues,
'cappfx': 'SMU_11_0_ODCAP_',
'capstr': pp_struct.SMU_11_0_ODFEATURE_CAP__enumvalues,
}
}
# Arcturus aka MI100
elif pp_ver == (13, 0):
gpugen = 'Arcturus'
from upp.atom_gen import smu_v11_0_arcturus as pp_struct
ctypes_strct = pp_struct.struct_smu_11_0_powerplay_table
# Navi 12 aka PRO V520
elif pp_ver == (14, 0):
gpugen = 'Navi 12'
from upp.atom_gen import smu_v11_0_navi10 as pp_struct
ctypes_strct = pp_struct.struct_smu_11_0_powerplay_table
# Navi 21 (Sienna Cichlid) aka RX6900XT/RX6800(XT)
# Navi 22 (Navy Flounder) aka RX6700(XT)/RX6800M
# Navi 23 (Dimgrey Cavefish) aka RX6600(XT)/RX6600M
# Navi 24 (Beige Goby) aka RX6500(XT)/RX6400
elif ((pp_ver[0] in [15, 16, 18, 19]) and pp_ver[1] == 0):
gpugen = 'Navi 2x'
from upp.atom_gen import smu_v11_0_7_navi20 as pp_struct
ctypes_strct = pp_struct.struct_smu_11_0_7_powerplay_table
enum_structs = {
'power_saving_clock': {
'prefix': 'SMU_11_0_7_PPCLOCK_',
'struct': pp_struct.SMU_11_0_7_PPCLOCK_ID__enumvalues
},
'overdrive_table': {
'prefix': 'SMU_11_0_7_ODSETTING_',
'struct': pp_struct.SMU_11_0_7_ODSETTING_ID__enumvalues,
'cappfx': 'SMU_11_0_7_ODCAP_',
'capstr': pp_struct.SMU_11_0_7_ODFEATURE_CAP__enumvalues,
}
}
# Navi 31, 32, 33
elif ((pp_ver[0] in [20, 21, 22]) and pp_ver[1] == 0):
gpugen = 'Navi 3x'
from upp.atom_gen import smu_v13_0_7_navi30 as pp_struct
ctypes_strct = pp_struct.struct_smu_13_0_7_powerplay_table
enum_structs = {
'power_saving_clock': {
'prefix': 'SMU_13_0_7_PPCLOCK_',
'struct': pp_struct.SMU_13_0_7_PPCLOCK_ID__enumvalues
},
'overdrive_table': {
'prefix': 'SMU_13_0_7_ODSETTING_',
'struct': pp_struct.SMU_13_0_7_ODSETTING_ID__enumvalues,
'cappfx': 'SMU_13_0_7_ODCAP_',
'capstr': pp_struct.SMU_13_0_7_ODFEATURE_CAP__enumvalues,
}
}
# Navi 48
elif ((pp_ver[0] in [23,]) and pp_ver[1] == 0):
gpugen = 'Navi 48'
from upp.atom_gen import smu_v14_0_2_navi40 as pp_struct
ctypes_strct = pp_struct.struct_smu_14_0_2_powerplay_table
elif pp_ver is not None:
msg = 'Can not decode PowerPlay table version {}.{}'
print(msg.format(pp_ver[0], pp_ver[1]))
return None
else:
return None
# Unpack and sanitize enm_structs, if any
if enum_structs:
for tbl in enum_structs:
prefix = enum_structs[tbl].pop('prefix')
for enum in enum_structs[tbl]['struct']:
txt = enum_structs[tbl]['struct'][enum]
enum_structs[tbl]['struct'][enum] = txt.replace(prefix, '')
enum_structs[tbl]['enum'] = enum_structs[tbl]['struct']
enum_structs[tbl].pop('struct')
if 'capstr' in enum_structs[tbl]:
cappfx = enum_structs[tbl].pop('cappfx')
for cap in enum_structs[tbl]['capstr']:
cpt = enum_structs[tbl]['capstr'][cap]
enum_structs[tbl]['capstr'][cap] = cpt.replace(cappfx, '')
enum_structs[tbl]['cap'] = enum_structs[tbl]['capstr']
enum_structs[tbl].pop('capstr')
if debug:
print('DEBUG: unpacked enumeration data:')
for table in enum_structs:
print(' min/max enum in', table, enum_structs[tbl]['enum'])
if 'cap' in enum_structs[table]:
print(' cap enum in', table, enum_structs[tbl]['cap'])
if debug:
print('DEBUG: This is a', gpugen,
'PP table, using', pp_struct.__name__)
data = decode_pp_table(rawbytes, ctypes_strct)
data_dict = build_data_tree(data, rawbytes, meta={'enum': enum_structs},
rawdump=rawdump, debug=debug)
return data_dict
def dump_pp_table(pp_bin_file, data_dict=None, indent=0, parent='',
rawdump=False, debug=False):
"""
Prints all decoded PowerPlay parameters and their values to console
"""
if data_dict is None:
pp_bytes = _read_binary_file(pp_bin_file)
data_dict = select_pp_struct(pp_bytes, rawdump, debug)
# Raw dump is handled at build_data_tree() (via select_pp_struct())
if not data_dict or rawdump:
return
for member in data_dict:
name = member
if isinstance(member, int):
name = str(parent) + ' ' + str(member)
if data_dict[member] is None:
print('{}{}: UNUSED'.format(' '*indent, member))
elif 'value' in data_dict[member]:
msg = '{}{}: {}'
if data_dict[member]['type'] == 'f':
msg = '{}{}:{: n}'
desc = ''
if 'desc' in data_dict[member]:
desc = '(' + data_dict[member]['desc'] + ')'
msg = '{}{}: {} {}'
print(msg.format(' '*indent, name,
data_dict[member]['value'], desc))
else:
print('{}{}:'.format(' '*indent, name))
dump_pp_table(None, data_dict[member], indent+2, parent=member)
def get_value(pp_bin_file, var_path, data_dict=None, debug=False):
"""
Returns value of a PowerPlay parameter specified in var_path
Parameters:
pp_bin_file (file): a file used for getting raw binary PowerPlay data
var_path (list): a list containing representing a pp_table key names.
for example:
['FanTable', 'TargetTemperature']
['VddGfxLookupTable', 7, 'Vdd']
data_dict (dict): Reuse existing PowerPlay data-structure dictionary
debug (bool): Debbuging output enabled
Returns:
dict: A descriptor of a parameter, containing decoded 'value', decimal
'offset' and struct type 'type' keys.
"""
if data_dict is None:
pp_bytes = _read_binary_file(pp_bin_file)
data = select_pp_struct(pp_bytes, debug=debug)
else:
data = data_dict.copy()
for category in var_path:
if category is not None:
# helper that allows skipping the 'entries' key name
if (isinstance(category, int)
and isinstance(data, dict) and 'entries' in data):
data = data['entries']
try:
data = data[category]
except KeyError:
msg = 'ERROR: Invalid parameter "{}", available ones are: {}'
print(msg.format(category, ', '.join([str(k) for k in data])))
return None
except (TypeError, IndexError):
if isinstance(data, list):
indices = [str(i) for i in range(len(data))]
else:
indices = []
msg = 'ERROR: Invalid parameter "{}", available ones are: {}'
print(msg.format(category, ', '.join(indices)))
return None
if data is None:
print('ERROR: Table {} does not point anywhere'.format(category))
if isinstance(data, list):
print('ERROR: Decoded data does not contain any value, you probably',
'wanna look deeper into data;',
', '.join([str(i) for i in range(len(data))]))
return None
if isinstance(data, dict) and 'value' not in data:
# helper that allows skipping the key name of the element of the array
if len(data) == 1 and isinstance(data, dict):
key = list(data.keys())[0]
if 'value' in data[key]:
return data[key]
print('ERROR: Decoded data does not contain any value, you probably',
'wanna look deeper into data;',
', '.join([str(k) for k in data.keys()]))
return None
if not isinstance(data, dict):
print('ERROR: Decoded data does not contain any final values, you',
'probably wanna go back one step into the data structure')
return None
return data
def set_value(pp_bin_file, pp_tbl_bytes, var_path, new_value,
data_dict=None, write=False, debug=False):
"""
Sets a PowerPlay parameter specified in var_path to a specified new value
This will call a get_value(var_path) first, where parameter value will
get decoded, and then the new value will be set. Finally, the new pp_table
file with updated value will be written.
Parameters:
pp_bin_file (file): a file used for reading & writting raw binary PP data
pp_tbl_bytes (bytearray): PowerPlay data bytes
var_path (list): a list containing representing a pp_table key names.
for example:
['FanTable', 'TargetTemperature']
['VddGfxLookupTable', 7, 'Vdd']
new_value (int): New value to be set
data_dict (dict): Reuse existing PowerPlay data-structure dictionary
write (bool): Actually writting data to PP-tables binary file
debug (bool): Debbuging output enabled
"""
var_pth_str = '.'.join([str(el) for el in var_path])
current_data = get_value(pp_bin_file, var_path,
data_dict=data_dict, debug=debug)
if current_data:
curr_val = current_data['value']
off = current_data['offset']
d_type = current_data['type']
d_size = struct.calcsize(d_type)
msg = 'Changing {} of type {} from {} to {} at 0x{:03x}'
print(msg.format(var_pth_str, d_type, curr_val, new_value, off))
else:
print('Can\'t decode {}'.format(var_path))
bytes_value = struct.pack(d_type, new_value)
if debug:
current_bytes_value = pp_tbl_bytes[off:off+d_size]
current_d_value = struct.unpack(d_type, current_bytes_value)[0]
dbg_msg = ' 0x{:04x} ({:04n}) {} {:>8} {:32s}: {:n} {}'
print(dbg_msg.format(off, off, d_type[-1],
_bytes2hex(current_bytes_value), var_pth_str,
current_d_value, 'CHANGES TO:'))
print(dbg_msg.format(off, off, d_type[-1], _bytes2hex(bytes_value),
var_pth_str, new_value, ''))
pp_tbl_bytes[off:off+d_size] = bytes_value
if write:
_write_binary_file(pp_bin_file, pp_tbl_bytes)
================================================
FILE: src/upp/upp.py
================================================
# To run without installing, relative imports must match the module imports,
# which is satisfied when in 'src' directory: python3 -m upp.upp --help
import click
import tempfile
from upp import decode
import importlib.metadata
import os.path
import sys
CONTEXT_SETTINGS = dict(help_option_names=['-h', '--help'])
REG_CTRL_CLASS = 'Control\\Class\\{4d36e968-e325-11ce-bfc1-08002be10318}'
REG_KEY = 'ControlSet001\\' + REG_CTRL_CLASS
REG_KEY_VAL = 'PP_PhmSoftPowerPlayTable'
REG_HEADER = 'Windows Registry Editor Version 5.00' + 2 * '\r\n' + \
'[HKEY_LOCAL_MACHINE\\SYSTEM\\CurrentControlSet\\' + \
REG_CTRL_CLASS + '\\0000]\r\n'
def _normalize_var_path(var_path_str):
var_path_list = var_path_str.strip('/').split('/')
normalized_var_path_list = [
int(item) if item.isdigit() else item for item in var_path_list]
return normalized_var_path_list
def _is_int_or_float(value):
if value.isdigit():
return True
try:
float(value)
return True
except ValueError:
pass
return False
def _validate_set_pair(set_pair):
valid = False
if '=' in set_pair and _is_int_or_float(set_pair.split('=')[-1]):
return set_pair.split('=')
else:
print("ERROR: Invalid variable assignment '{}'. ".format(set_pair),
"Assignment must be specified in = ",
"format. For example: /PowerTuneTable/TDP=75")
return None, None
def _get_pp_data_from_registry(reg_file_path):
reg_path = 'HKLM\\SYSTEM\\' + REG_KEY + ':' + REG_KEY_VAL
try:
from Registry import Registry
except ImportError as e:
print('ERROR: -f/--from-registry option requires python-registry',
'package, consider installing it with PIP.')
sys.exit(-2)
try:
reg = Registry.Registry(reg_file_path)
keys = reg.open(REG_KEY)
except Exception as e:
print('ERROR: Can not access', REG_KEY, 'in', reg_file_path)
print(e)
return None
found_data = False
for key in keys.subkeys():
index = key.name()
key_path = REG_KEY + '\\' + index
if index.startswith('0'):
try:
data_type = key.value(REG_KEY_VAL).value_type_str()
registry_data = key.value(REG_KEY_VAL).raw_data()
print('Found', data_type, 'type value', REG_KEY_VAL,
'in', key_path)
if found_data:
print('WARNING: Multiple PP tables found in the registry,',
'only using data from last table found!')
found_data = True
tmpf_prefix = 'registry_device_' + index + '_pp_table_'
tmp_pp_file = tempfile.NamedTemporaryFile(prefix=tmpf_prefix,
delete=False)
decode._write_binary_file(tmp_pp_file.name, registry_data)
print('Saved registry PP table', 'data to', tmp_pp_file.name)
tmp_pp_file.close()
except Registry.RegistryValueNotFoundException:
print("Can't find needed value", REG_KEY_VAL, 'in', key_path)
return tmp_pp_file.name
def _get_pp_data_from_mpt(mpt_filename):
try:
mpt_bytes = decode._read_binary_file(mpt_filename)
except Exception as e:
print('ERROR: Can not access', mpt_filename)
print(e)
sys.exit(-2)
mpt_table_filename = mpt_filename + '.pp_table'
print('Saving MPT PP table data to', mpt_table_filename)
decode._write_binary_file(mpt_table_filename, mpt_bytes[0x100:])
return mpt_table_filename
def _check_file_writeable(filename):
if os.path.exists(filename):
if os.path.isfile(filename):
return os.access(filename, os.W_OK)
else:
return False
pdir = os.path.dirname(filename)
if not pdir:
pdir = '.'
return os.access(pdir, os.W_OK)
def _write_pp_to_reg_file(filename, data, debug=False):
if _check_file_writeable(filename):
reg_string = REG_KEY_VAL[3:] + '"=hex:' + data.hex(',')
reg_lines = [reg_string[i:i+75] for i in range(0, len(reg_string), 75)]
reg_lines[0] = '"' + REG_KEY_VAL[:3] + reg_lines[0]
formatted_reg_string = '\\\r\n '.join(reg_lines)
reg_pp_data = REG_HEADER + formatted_reg_string + 2 * '\r\n'
if debug:
print(reg_pp_data)
decode._write_binary_file(filename, reg_pp_data.encode('utf-16'))
print('Written {} Soft PowerPlay bytes to {}'.format(len(data),
filename))
else:
print('Can not write to {}'.format(filename))
return 0
def _load_variable_set(dump_filename):
variable_set = []
with open(dump_filename, 'r') as file:
keys = []
indent = 0
prev_indent = 0
lines = file.readlines()
for line in lines:
prev_indent = indent
indent = (len(line) - len(line.lstrip()))//2
if line.strip() == '':
continue
if indent == 0:
keys.clear()
elif indent <= prev_indent:
keys = keys[0:indent]
key, value = line.split(':')
key = key.strip()
value = value.strip()
if len(value) > 0:
value = value.split()[0]
if key.find('Unused') == 0 or value.find('UNUSED') == 0:
continue
if len(keys) > 0 and key.find(keys[-1]) == 0:
key = key.split(' ')[1]
keys.append(key)
if value != '':
variable_set.append('{}={}'.format('/'.join(keys), value))
return variable_set
@click.group(context_settings=CONTEXT_SETTINGS)
@click.option('-p', '--pp-file', help='Input/output PP table binary file.',
metavar='',
default='/sys/class/drm/card0/device/pp_table')
@click.option('-f', '--from-registry',
help='Import PP_PhmSoftPowerPlayTable from Windows registry ' +
'(overrides -p / --pp-file option).',
metavar='')
@click.option('-m', '--from-mpt',
help='Import PowerPlay Table from More Power Tool ' +
'(overrides --pp-file and --from-registry optios).',
metavar='')
@click.option('--debug/--no-debug', '-d/ ', default='False',
help='Debug mode.')
@click.pass_context
def cli(ctx, debug, pp_file, from_registry, from_mpt):
"""UPP: Uplift Power Play
A tool for parsing, dumping and modifying data in Radeon PowerPlay tables.
UPP is able to parse and modify binary data structures of PowerPlay
tables commonly found on certain AMD Radeon GPUs. Drivers on recent
AMD GPUs allow PowerPlay tables to be dynamically modified on runtime,
which may be known as "soft PowerPlay tables". On Linux, the PowerPlay
table is by default found at:
\b
/sys/class/drm/card0/device/pp_table
There are also two alternative ways of getting PowerPlay data that this
tool supports:
\b
- By extracting PowerPlay table from Video ROM image (see extract command)
- Import "Soft PowerPlay" table from Windows registry, directly from
offline Windows/System32/config/SYSTEM file on disk, so it would work
from Linux distro that has acces to mounted Windows partition
(path to SYSTEM registry file is specified with --from-registry option)
- Import "Soft PowerPlay" table from "More Powe Tool" MPT file
(path to MPT file is specified with --from-mpt option)
This tool currently supports parsing and modifying PowerPlay tables
found on the following AMD GPU families:
\b
- Polaris
- Vega
- Radeon VII
- Navi 10, 12, 14
- Navi 21, 22, 23
- Navi 3x (experimental)
Note: iGPUs found in many recent AMD APUs are using completely different
PowerPlay control methods, this tool does not support them.
If you have bugs to report or features to request please check:
github.com/sibradzic/upp
"""
ctx.ensure_object(dict)
ctx.obj['DEBUG'] = debug
ctx.obj['PPBINARY'] = pp_file
ctx.obj['FROMREGISTRY'] = from_registry
ctx.obj['FROMMPT'] = from_mpt
@click.command(short_help='Show UPP version.')
def version():
"""Shows UPP version."""
version = importlib.metadata.version('upp')
click.echo(version)
@click.command(short_help='Dumps all PowerPlay parameters to console.')
@click.option('--raw/--no-raw', '-r/ ', help='Show raw binary data.',
default='False')
@click.pass_context
def dump(ctx, raw):
"""Dumps all PowerPlay data to console
De-serializes PowerPlay binary data into a human-readable text output.
For example:
\b
upp --pp-file=radeon.pp_table dump
In standard mode all data will be dumped to console, where
data tree hierarchy is indicated by indentation.
In raw mode a table showing all hex and binary data, as well
as variable names and values, will be dumped.
"""
debug = ctx.obj['DEBUG']
pp_file = ctx.obj['PPBINARY']
from_registry = ctx.obj['FROMREGISTRY']
from_mpt = ctx.obj['FROMMPT']
if from_registry:
pp_file = _get_pp_data_from_registry(from_registry)
if from_mpt:
pp_file = _get_pp_data_from_mpt(from_mpt)
decode.dump_pp_table(pp_file, rawdump=raw, debug=debug)
return 0
@click.command(short_help='Undumps all PowerPlay parameters to a binary' +
'PP Table file or a Registry')
@click.option('-d', '--dump-filename',
help='File path of dumped powerplay parameters.')
@click.option('-t', '--to-registry', metavar='',
help='Output to Windows registry .reg file.')
@click.option('-w', '--write', is_flag=True,
help='Write changes to PP binary.', default=False)
@click.pass_context
def undump(ctx, dump_filename, to_registry, write):
"""Undumps all PowerPlay data to pp file or registry
Serializes previously dumped PowerPlay text to pp file or registry.
For example:
\b
upp --pp-file=radeon.pp_table undump -d pp.dump --write
"""
variable_set = _load_variable_set(dump_filename)
ctx.invoke(set, variable_path_set=variable_set,
to_registry=to_registry, write=write)
return 0
@click.command(short_help='Extract PowerPlay table from Video BIOS ROM image.')
@click.option('-r', '--video-rom', required=True, metavar='',
help='Input Video ROM binary image file.')
@click.pass_context
def extract(ctx, video_rom):
"""Extracts PowerPlay data from full VBIOS ROM image
The source video ROM binary must be specified with -r/--video-rom
parameter, and extracted PowerPlay table will be saved into file
specified with -p/--pp-file. For example:
\b
upp --pp-file=extracted.pp_table extract -r VIDEO.rom
Default output file name will be an original ROM file name with an
additional .pp_table extension.
"""
pp_file = ctx.obj['PPBINARY']
ctx.obj['ROMBINARY'] = video_rom
# Override default, we don't want to extract any random VBIOS into sysfs
if pp_file.endswith('device/pp_table'):
pp_file = video_rom + '.pp_table'
msg = "Extracting PP table from '{}' ROM image..."
print(msg.format(video_rom))
if decode.extract_rom(video_rom, pp_file):
print('Done')
return 0
@click.command(short_help='Inject PowerPlay table into Video BIOS ROM image.')
@click.option('-i', '--input-rom', required=True, metavar='',
help='Input Video ROM binary image file.')
@click.option('-o', '--output-rom', required=False, metavar='',
help='Output Video ROM binary image file.')
@click.pass_context
def inject(ctx, input_rom, output_rom):
"""Injects PowerPlay data from file into VBIOS ROM image
The input video ROM binary must be specified with -i/--input-rom
parameter, and the output ROM can be specified with an optional
-o/--output-rom parameter.
\b
upp -p modded.pp_table inject -i original.rom -o modded.rom
The output filename defaults to .modded.
WARNING: Modified vROM image is probalby not going to work if flashed as
is to your card, due to ROM signature checks on recent Radeon cards.
Authors of this tool are in no way responsible for any damage that may
happen to your expansive graphics card if you choose to flash the modified
video ROM, you are doing it entierly on your own risk.
"""
pp_file = ctx.obj['PPBINARY']
if not output_rom:
output_rom = input_rom + '.modded'
msg = "Injecting {} PP table into {} ROM image..."
print(msg.format(pp_file, input_rom))
if decode.inject_pp_table(input_rom, output_rom, pp_file):
print('Saved modified vROM image as {}.'.format(output_rom))
return 0
@click.command(short_help='Get current value of a PowerPlay parameter(s).')
@click.argument('variable-path-set', nargs=-1, required=True)
@click.pass_context
def get(ctx, variable_path_set):
"""Retrieves current value of one or multiple PP parameters
The parameter variable path must be specified in
"/ notation", for example:
\b
upp get /FanTable/TargetTemperature /VddgfxLookupTable/7/Vdd
The raw value of the parameter will be retrieved,
decoded and displayed on console.
Multiple PP parameters can be specified at the same time.
"""
debug = ctx.obj['DEBUG']
pp_file = ctx.obj['PPBINARY']
from_registry = ctx.obj['FROMREGISTRY']
if from_registry:
pp_file = _get_pp_data_from_registry(from_registry)
pp_bytes = decode._read_binary_file(pp_file)
data = decode.select_pp_struct(pp_bytes, debug=debug)
for set_pair_str in variable_path_set:
var_path = _normalize_var_path(set_pair_str)
res = decode.get_value(pp_file, var_path, data, debug=debug)
if res:
print('{:n}'.format(res['value']))
else:
print('ERROR: Incorrect variable path:', set_pair_str)
exit(2)
return 0
@click.command(short_help='Set value to PowerPlay parameter(s).')
@click.argument('variable-path-set', nargs=-1, required=False)
@click.option('-w', '--write', is_flag=True,
help='Write changes to PP binary.', default=False)
@click.option('-t', '--to-registry', metavar='',
help='Output to Windows registry .reg file.')
@click.option('-c', '--from-conf', metavar='',
help='Input VARIABLE_PATH_SET from file.')
@click.pass_context
def set(ctx, variable_path_set, to_registry, write, from_conf):
"""Sets value to one or multiple PP parameters
The parameter path and value must be specified in
"/= notation", for example:
\b
upp set /PowerTuneTable/TDP=75 /SclkDependencyTable/7/Sclk=107000
Multiple PP parameters can be set at the same time.
The PP tables will not be changed unless additional
--write option is set.
It is possible to set parameters from a configuration file with one
"/=" per line using -c/--from-conf instead of directly
passing parameters from command line
\b
upp set --from-conf=card0.conf
Optionally, if -t/--to-registry output is specified, an additional Windows
registry format file with '.reg' extension will be generated, for example:
\b
upp set /PowerTuneTable/TDP=75 --to-registry=test
will produce the file test.reg in the current working directory.
"""
debug = ctx.obj['DEBUG']
pp_file = ctx.obj['PPBINARY']
if from_conf is not None:
if (len(variable_path_set) > 0):
print("ERROR: VARIABLE_PATH_SET found when using -c/--from-conf.")
exit(2)
if not os.path.isfile(from_conf):
print("ERROR: file {} not found.".format(from_conf))
exit(2)
with open(from_conf, 'r') as config:
variable_path_set = list(filter(''.__ne__,
config.read().splitlines()))
elif (len(variable_path_set) == 0):
print("ERROR: no parameters given to set to pp table.")
exit(2)
set_pairs = []
for set_pair_str in variable_path_set:
var, val = _validate_set_pair(set_pair_str)
if var and val:
var_path = _normalize_var_path(var)
res = decode.get_value(pp_file, var_path)
if res:
if res["type"] == 'f':
set_pairs += [var_path + [float(val)]]
else:
set_pairs += [var_path + [int(val)]]
else:
print('ERROR: Incorrect variable path:', var)
exit(2)
else:
exit(2)
pp_bytes = decode._read_binary_file(pp_file)
data = decode.select_pp_struct(pp_bytes)
for set_list in set_pairs:
decode.set_value(pp_file, pp_bytes, set_list[:-1], set_list[-1],
data_dict=data, write=False, debug=debug)
if write:
print("Committing changes to '{}'.".format(pp_file))
decode._write_binary_file(pp_file, pp_bytes)
else:
print("WARNING: Nothing was written to '{}'.".format(pp_file),
"Add --write option to commit the changes for real!")
if to_registry:
_write_pp_to_reg_file(to_registry + '.reg', pp_bytes, debug=debug)
return 0
cli.add_command(extract)
cli.add_command(inject)
cli.add_command(dump)
cli.add_command(undump)
cli.add_command(get)
cli.add_command(set)
cli.add_command(version)
def main():
cli(obj={})()
if __name__ == "__main__":
main()
================================================
FILE: test/AMD.RX480.8192.160603.rom.dump
================================================
sHeader:
StructureSize: 820
TableFormatRevision: 7
TableContentRevision: 1
TableRevision: 0
TableSize: 77
GoldenPPID: 1546
GoldenRevision: 9275
FormatID: 25
VoltageTime: 0
PlatformCaps: 16941056
MaxODEngineClock: 200000
MaxODMemoryClock: 225000
PowerControlLimit: 50
UlvVoltageOffset: 50
StateArray:
RevId: 1
NumEntries: 2
entries:
entries 0:
EngineClockIndexHigh: 0
EngineClockIndexLow: 0
MemoryClockIndexHigh: 0
MemoryClockIndexLow: 0
PCIEGenLow: 0
PCIEGenHigh: 0
PCIELaneLow: 0
PCIELaneHigh: 0
Classification: 8
CapsAndSettings: 0
Classification2: 0
Unused:
Unused 0: 0
Unused 1: 0
Unused 2: 0
Unused 3: 0
entries 1:
EngineClockIndexHigh: 7
EngineClockIndexLow: 0
MemoryClockIndexHigh: 1
MemoryClockIndexLow: 0
PCIEGenLow: 0
PCIEGenHigh: 0
PCIELaneLow: 0
PCIELaneHigh: 0
Classification: 5
CapsAndSettings: 0
Classification2: 0
Unused:
Unused 0: 0
Unused 1: 0
Unused 2: 0
Unused 3: 0
FanTable:
RevId: 9
THyst: 3
TMin: 4000
TMed: 6500
THigh: 8500
PWMMin: 2000
PWMMed: 4000
PWMHigh: 6000
TMax: 10900
FanControlMode: 1
FanPWMMax: 100
FanOutputSensitivity: 4836
FanRPMMax: 2200
MinFanSCLKAcousticLimit: 91000
TargetTemperature: 80
MinimumPWMLimit: 20
FanGainEdge: 100
FanGainHotspot: 100
FanGainLiquid: 100
FanGainVrVddc: 100
FanGainVrMvdd: 100
FanGainPlx: 100
FanGainHbm: 100
EnableZeroRPM: 0
FanStopTemperature: 50
FanStartTemperature: 60
Reserved: 0
ThermalController:
RevId: 1
Type: 23
I2cLine: 0
I2cAddress: 0
FanParameters: 2
FanMinRPM: 0
FanMaxRPM: 52
Reserved: 0
Flags: 0
Reserv: 0
MclkDependencyTable:
RevId: 0
NumEntries: 2
entries:
entries 0:
VddcInd: 0
Vddci: 850
VddgfxOffset: 0
Mvdd: 1000
Mclk: 30000
Reserved: 0
entries 1:
VddcInd: 15
Vddci: 950
VddgfxOffset: 0
Mvdd: 1000
Mclk: 200000
Reserved: 0
SclkDependencyTable:
RevId: 1
NumEntries: 8
entries:
entries 0:
VddInd: 0
VddcOffset: 0
Sclk: 30000
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 128
SclkOffset: 0
entries 1:
VddInd: 1
VddcOffset: 65510
Sclk: 60800
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 0
SclkOffset: 0
entries 2:
VddInd: 2
VddcOffset: 65510
Sclk: 91000
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 0
SclkOffset: 5000
entries 3:
VddInd: 3
VddcOffset: 65510
Sclk: 107700
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 0
SclkOffset: 0
entries 4:
VddInd: 4
VddcOffset: 65510
Sclk: 114500
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 0
SclkOffset: 0
entries 5:
VddInd: 5
VddcOffset: 65510
Sclk: 119100
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 0
SclkOffset: 0
entries 6:
VddInd: 6
VddcOffset: 65510
Sclk: 123600
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 0
SclkOffset: 0
entries 7:
VddInd: 7
VddcOffset: 0
Sclk: 126600
EdcCurrent: 0
ReliabilityTemperature: 0
CKSVOffsetandDisable: 0
SclkOffset: 0
VddcLookupTable:
RevId: 0
NumEntries: 16
entries:
entries 0:
Vdd: 800
CACLow: 0
CACMid: 0
CACHigh: 0
entries 1:
Vdd: 65282
CACLow: 0
CACMid: 0
CACHigh: 0
entries 2:
Vdd: 65283
CACLow: 0
CACMid: 0
CACHigh: 0
entries 3:
Vdd: 65284
CACLow: 0
CACMid: 0
CACHigh: 0
entries 4:
Vdd: 65285
CACLow: 0
CACMid: 0
CACHigh: 0
entries 5:
Vdd: 65286
CACLow: 0
CACMid: 0
CACHigh: 0
entries 6:
Vdd: 65287
CACLow: 0
CACMid: 0
CACHigh: 0
entries 7:
Vdd: 65288
CACLow: 0
CACMid: 0
CACHigh: 0
entries 8:
Vdd: 850
CACLow: 0
CACMid: 0
CACHigh: 0
entries 9:
Vdd: 900
CACLow: 0
CACMid: 0
CACHigh: 0
entries 10:
Vdd: 950
CACLow: 0
CACMid: 0
CACHigh: 0
entries 11:
Vdd: 1000
CACLow: 0
CACMid: 0
CACHigh: 0
entries 12:
Vdd: 1050
CACLow: 0
CACMid: 0
CACHigh: 0
entries 13:
Vdd: 1100
CACLow: 0
CACMid: 0
CACHigh: 0
entries 14:
Vdd: 1150
CACLow: 0
CACMid: 0
CACHigh: 0
entries 15:
Vdd: 975
CACLow: 0
CACMid: 0
CACHigh: 0
VddgfxLookupTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
Vdd: 900
CACLow: 0
CACMid: 0
CACHigh: 0
entries 1:
Vdd: 65282
CACLow: 0
CACMid: 0
CACHigh: 0
entries 2:
Vdd: 65283
CACLow: 0
CACMid: 0
CACHigh: 0
entries 3:
Vdd: 65284
CACLow: 0
CACMid: 0
CACHigh: 0
entries 4:
Vdd: 65285
CACLow: 0
CACMid: 0
CACHigh: 0
entries 5:
Vdd: 65286
CACLow: 0
CACMid: 0
CACHigh: 0
entries 6:
Vdd: 65287
CACLow: 0
CACMid: 0
CACHigh: 0
entries 7:
Vdd: 65288
CACLow: 0
CACMid: 0
CACHigh: 0
MMDependencyTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
VddcInd: 0
VddgfxOffset: 0
DClk: 58000
VClk: 75000
EClk: 63000
AClk: 0
SAMUClk: 57000
entries 1:
VddcInd: 8
VddgfxOffset: 65460
DClk: 63000
VClk: 80000
EClk: 69000
AClk: 0
SAMUClk: 64000
entries 2:
VddcInd: 9
VddgfxOffset: 65435
DClk: 68000
VClk: 85000
EClk: 75000
AClk: 0
SAMUClk: 70000
entries 3:
VddcInd: 10
VddgfxOffset: 65410
DClk: 73000
VClk: 89000
EClk: 81000
AClk: 0
SAMUClk: 76000
entries 4:
VddcInd: 11
VddgfxOffset: 65385
DClk: 77000
VClk: 92000
EClk: 86000
AClk: 0
SAMUClk: 81000
entries 5:
VddcInd: 12
VddgfxOffset: 65335
DClk: 80000
VClk: 95000
EClk: 91000
AClk: 0
SAMUClk: 85000
entries 6:
VddcInd: 13
VddgfxOffset: 65285
DClk: 83000
VClk: 98000
EClk: 96000
AClk: 0
SAMUClk: 88000
entries 7:
VddcInd: 14
VddgfxOffset: 0
DClk: 86000
VClk: 100000
EClk: 100000
AClk: 0
SAMUClk: 91000
VCEStateTable:
RevId: 1
NumEntries: 6
entries:
entries 0:
VCEClockIndex: 0
Flag: 0
SCLKIndex: 1
MCLKIndex: 1
entries 1:
VCEClockIndex: 0
Flag: 1
SCLKIndex: 1
MCLKIndex: 1
entries 2:
VCEClockIndex: 0
Flag: 2
SCLKIndex: 1
MCLKIndex: 1
entries 3:
VCEClockIndex: 0
Flag: 2
SCLKIndex: 1
MCLKIndex: 1
entries 4:
VCEClockIndex: 0
Flag: 2
SCLKIndex: 1
MCLKIndex: 1
entries 5:
VCEClockIndex: 0
Flag: 2
SCLKIndex: 1
MCLKIndex: 1
PPMTable: UNUSED
PowerTuneTable:
RevId: 4
TDP: 110
ConfigurableTDP: 0
TDC: 107
BatteryPowerLimit: 110
SmallPowerLimit: 110
LowCACLeakage: 0
HighCACLeakage: 0
MaximumPowerDeliveryLimit: 110
TjMax: 90
PowerTuneDataSetID: 0
EDCLimit: 0
SoftwareShutdownTemp: 94
ClockStretchAmount: 2
TemperatureLimitHotspot: 105
TemperatureLimitLiquid1: 80
TemperatureLimitLiquid2: 80
TemperatureLimitVrVddc: 115
TemperatureLimitVrMvdd: 115
TemperatureLimitPlx: 95
Liquid1_I2C_address: 0
Liquid2_I2C_address: 0
Liquid_I2C_Line: 144
Vr_I2C_address: 16
Vr_I2C_Line: 150
Plx_I2C_address: 0
Plx_I2C_Line: 144
BoostPowerLimit: 0
CKS_LDO_REFSEL: 6
HotSpotOnly: 0
Reserve: 0
HardLimitTable: UNUSED
PCIETable:
RevId: 1
NumEntries: 3
entries:
entries 0:
PCIEGenSpeed: 0
PCIELaneWidth: 16
Reserved:
Reserved 0: 0
Reserved 1: 0
PCIE_Sclk: 0
entries 1:
PCIEGenSpeed: 0
PCIELaneWidth: 16
Reserved:
Reserved 0: 0
Reserved 1: 0
PCIE_Sclk: 0
entries 2:
PCIEGenSpeed: 2
PCIELaneWidth: 16
Reserved:
Reserved 0: 0
Reserved 1: 0
PCIE_Sclk: 0
GPIOTable:
RevId: 0
VRHotTriggeredSclkDpmIndex: 1
Reserve:
Reserve 0: 0
Reserve 1: 0
Reserve 2: 0
Reserve 3: 0
Reserve 4: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
Reserved 3: 0
Reserved 4: 0
Reserved 5: 0
================================================
FILE: test/AMD.RX480.8192.160603.rom.rawdump
================================================
PowerPlay table rev 7.1 size 820 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H 3403 StructureSize : 820
0x0002 (0002) B 07 TableFormatRevision : 7
0x0003 (0003) B 01 TableContentRevision : 1
0x0004 (0004) B 00 TableRevision : 0
0x0005 (0005) H 4d00 TableSize : 77
0x0007 (0007) I 0a060000 GoldenPPID : 1546
0x000b (0011) I 3b240000 GoldenRevision : 9275
0x000f (0015) H 1900 FormatID : 25
0x0011 (0017) H 0000 VoltageTime : 0
0x0013 (0019) I 00800201 PlatformCaps : 16941056
0x0017 (0023) I 400d0300 MaxODEngineClock : 200000
0x001b (0027) I e86e0300 MaxODMemoryClock : 225000
0x001f (0031) H 3200 PowerControlLimit : 50
0x0021 (0033) H 3200 UlvVoltageOffset : 50
0x0023 (0035) H 4d00 StateArrayOffset : 77
0x004d (0077) B 01 RevId : 1
0x004e (0078) B 02 NumEntries : 2
0x004f (0079) B 00 EngineClockIndexHigh : 0
0x0050 (0080) B 00 EngineClockIndexLow : 0
0x0051 (0081) B 00 MemoryClockIndexHigh : 0
0x0052 (0082) B 00 MemoryClockIndexLow : 0
0x0053 (0083) B 00 PCIEGenLow : 0
0x0054 (0084) B 00 PCIEGenHigh : 0
0x0055 (0085) B 00 PCIELaneLow : 0
0x0056 (0086) B 00 PCIELaneHigh : 0
0x0057 (0087) H 0800 Classification : 8
0x0059 (0089) I 00000000 CapsAndSettings : 0
0x005d (0093) H 0000 Classification2 : 0
0x005f (0095) B 00 Unused : 0
0x0060 (0096) B 00 Unused : 0
0x0061 (0097) B 00 Unused : 0
0x0062 (0098) B 00 Unused : 0
0x0063 (0099) B 07 EngineClockIndexHigh : 7
0x0064 (0100) B 00 EngineClockIndexLow : 0
0x0065 (0101) B 01 MemoryClockIndexHigh : 1
0x0066 (0102) B 00 MemoryClockIndexLow : 0
0x0067 (0103) B 00 PCIEGenLow : 0
0x0068 (0104) B 00 PCIEGenHigh : 0
0x0069 (0105) B 00 PCIELaneLow : 0
0x006a (0106) B 00 PCIELaneHigh : 0
0x006b (0107) H 0500 Classification : 5
0x006d (0109) I 00000000 CapsAndSettings : 0
0x0071 (0113) H 0000 Classification2 : 0
0x0073 (0115) B 00 Unused : 0
0x0074 (0116) B 00 Unused : 0
0x0075 (0117) B 00 Unused : 0
0x0076 (0118) B 00 Unused : 0
0x0025 (0037) H 9402 FanTableOffset : 660
0x0294 (0660) B 09 RevId : 9
0x0295 (0661) B 03 THyst : 3
0x0296 (0662) H a00f TMin : 4000
0x0298 (0664) H 6419 TMed : 6500
0x029a (0666) H 3421 THigh : 8500
0x029c (0668) H d007 PWMMin : 2000
0x029e (0670) H a00f PWMMed : 4000
0x02a0 (0672) H 7017 PWMHigh : 6000
0x02a2 (0674) H 942a TMax : 10900
0x02a4 (0676) B 01 FanControlMode : 1
0x02a5 (0677) H 6400 FanPWMMax : 100
0x02a7 (0679) H e412 FanOutputSensitivity : 4836
0x02a9 (0681) H 9808 FanRPMMax : 2200
0x02ab (0683) I 78630100 MinFanSCLKAcousticLimit : 91000
0x02af (0687) B 50 TargetTemperature : 80
0x02b0 (0688) B 14 MinimumPWMLimit : 20
0x02b1 (0689) H 6400 FanGainEdge : 100
0x02b3 (0691) H 6400 FanGainHotspot : 100
0x02b5 (0693) H 6400 FanGainLiquid : 100
0x02b7 (0695) H 6400 FanGainVrVddc : 100
0x02b9 (0697) H 6400 FanGainVrMvdd : 100
0x02bb (0699) H 6400 FanGainPlx : 100
0x02bd (0701) H 6400 FanGainHbm : 100
0x02bf (0703) B 00 EnableZeroRPM : 0
0x02c0 (0704) B 32 FanStopTemperature : 50
0x02c1 (0705) B 3c FanStartTemperature : 60
0x02c2 (0706) H 0000 Reserved : 0
0x0027 (0039) H 8b02 ThermalControllerOffset : 651
0x028b (0651) B 01 RevId : 1
0x028c (0652) B 17 Type : 23
0x028d (0653) B 00 I2cLine : 0
0x028e (0654) B 00 I2cAddress : 0
0x028f (0655) B 02 FanParameters : 2
0x0290 (0656) B 00 FanMinRPM : 0
0x0291 (0657) B 34 FanMaxRPM : 52
0x0292 (0658) B 00 Reserved : 0
0x0293 (0659) B 00 Flags : 0
0x0029 (0041) H 0000 Reserv : 0
0x002b (0043) H b501 MclkDependencyTableOffset : 437
0x01b5 (0437) B 00 RevId : 0
0x01b6 (0438) B 02 NumEntries : 2
0x01b7 (0439) B 00 VddcInd : 0
0x01b8 (0440) H 5203 Vddci : 850
0x01ba (0442) H 0000 VddgfxOffset : 0
0x01bc (0444) H e803 Mvdd : 1000
0x01be (0446) I 30750000 Mclk : 30000
0x01c2 (0450) H 0000 Reserved : 0
0x01c4 (0452) B 0f VddcInd : 15
0x01c5 (0453) H b603 Vddci : 950
0x01c7 (0455) H 0000 VddgfxOffset : 0
0x01c9 (0457) H e803 Mvdd : 1000
0x01cb (0459) I 400d0300 Mclk : 200000
0x01cf (0463) H 0000 Reserved : 0
0x002d (0045) H 3b01 SclkDependencyTableOffset : 315
0x013b (0315) B 01 RevId : 1
0x013c (0316) B 08 NumEntries : 8
0x013d (0317) B 00 VddInd : 0
0x013e (0318) H 0000 VddcOffset : 0
0x0140 (0320) I 30750000 Sclk : 30000
0x0144 (0324) H 0000 EdcCurrent : 0
0x0146 (0326) B 00 ReliabilityTemperature : 0
0x0147 (0327) B 80 CKSVOffsetandDisable : 128
0x0148 (0328) I 00000000 SclkOffset : 0
0x014c (0332) B 01 VddInd : 1
0x014d (0333) H e6ff VddcOffset : 65510
0x014f (0335) I 80ed0000 Sclk : 60800
0x0153 (0339) H 0000 EdcCurrent : 0
0x0155 (0341) B 00 ReliabilityTemperature : 0
0x0156 (0342) B 00 CKSVOffsetandDisable : 0
0x0157 (0343) I 00000000 SclkOffset : 0
0x015b (0347) B 02 VddInd : 2
0x015c (0348) H e6ff VddcOffset : 65510
0x015e (0350) I 78630100 Sclk : 91000
0x0162 (0354) H 0000 EdcCurrent : 0
0x0164 (0356) B 00 ReliabilityTemperature : 0
0x0165 (0357) B 00 CKSVOffsetandDisable : 0
0x0166 (0358) I 88130000 SclkOffset : 5000
0x016a (0362) B 03 VddInd : 3
0x016b (0363) H e6ff VddcOffset : 65510
0x016d (0365) I b4a40100 Sclk : 107700
0x0171 (0369) H 0000 EdcCurrent : 0
0x0173 (0371) B 00 ReliabilityTemperature : 0
0x0174 (0372) B 00 CKSVOffsetandDisable : 0
0x0175 (0373) I 00000000 SclkOffset : 0
0x0179 (0377) B 04 VddInd : 4
0x017a (0378) H e6ff VddcOffset : 65510
0x017c (0380) I 44bf0100 Sclk : 114500
0x0180 (0384) H 0000 EdcCurrent : 0
0x0182 (0386) B 00 ReliabilityTemperature : 0
0x0183 (0387) B 00 CKSVOffsetandDisable : 0
0x0184 (0388) I 00000000 SclkOffset : 0
0x0188 (0392) B 05 VddInd : 5
0x0189 (0393) H e6ff VddcOffset : 65510
0x018b (0395) I 3cd10100 Sclk : 119100
0x018f (0399) H 0000 EdcCurrent : 0
0x0191 (0401) B 00 ReliabilityTemperature : 0
0x0192 (0402) B 00 CKSVOffsetandDisable : 0
0x0193 (0403) I 00000000 SclkOffset : 0
0x0197 (0407) B 06 VddInd : 6
0x0198 (0408) H e6ff VddcOffset : 65510
0x019a (0410) I d0e20100 Sclk : 123600
0x019e (0414) H 0000 EdcCurrent : 0
0x01a0 (0416) B 00 ReliabilityTemperature : 0
0x01a1 (0417) B 00 CKSVOffsetandDisable : 0
0x01a2 (0418) I 00000000 SclkOffset : 0
0x01a6 (0422) B 07 VddInd : 7
0x01a7 (0423) H 0000 VddcOffset : 0
0x01a9 (0425) I 88ee0100 Sclk : 126600
0x01ad (0429) H 0000 EdcCurrent : 0
0x01af (0431) B 00 ReliabilityTemperature : 0
0x01b0 (0432) B 00 CKSVOffsetandDisable : 0
0x01b1 (0433) I 00000000 SclkOffset : 0
0x002f (0047) H 7700 VddcLookupTableOffset : 119
0x0077 (0119) B 00 RevId : 0
0x0078 (0120) B 10 NumEntries : 16
0x0079 (0121) H 2003 Vdd : 800
0x007b (0123) H 0000 CACLow : 0
0x007d (0125) H 0000 CACMid : 0
0x007f (0127) H 0000 CACHigh : 0
0x0081 (0129) H 02ff Vdd : 65282
0x0083 (0131) H 0000 CACLow : 0
0x0085 (0133) H 0000 CACMid : 0
0x0087 (0135) H 0000 CACHigh : 0
0x0089 (0137) H 03ff Vdd : 65283
0x008b (0139) H 0000 CACLow : 0
0x008d (0141) H 0000 CACMid : 0
0x008f (0143) H 0000 CACHigh : 0
0x0091 (0145) H 04ff Vdd : 65284
0x0093 (0147) H 0000 CACLow : 0
0x0095 (0149) H 0000 CACMid : 0
0x0097 (0151) H 0000 CACHigh : 0
0x0099 (0153) H 05ff Vdd : 65285
0x009b (0155) H 0000 CACLow : 0
0x009d (0157) H 0000 CACMid : 0
0x009f (0159) H 0000 CACHigh : 0
0x00a1 (0161) H 06ff Vdd : 65286
0x00a3 (0163) H 0000 CACLow : 0
0x00a5 (0165) H 0000 CACMid : 0
0x00a7 (0167) H 0000 CACHigh : 0
0x00a9 (0169) H 07ff Vdd : 65287
0x00ab (0171) H 0000 CACLow : 0
0x00ad (0173) H 0000 CACMid : 0
0x00af (0175) H 0000 CACHigh : 0
0x00b1 (0177) H 08ff Vdd : 65288
0x00b3 (0179) H 0000 CACLow : 0
0x00b5 (0181) H 0000 CACMid : 0
0x00b7 (0183) H 0000 CACHigh : 0
0x00b9 (0185) H 5203 Vdd : 850
0x00bb (0187) H 0000 CACLow : 0
0x00bd (0189) H 0000 CACMid : 0
0x00bf (0191) H 0000 CACHigh : 0
0x00c1 (0193) H 8403 Vdd : 900
0x00c3 (0195) H 0000 CACLow : 0
0x00c5 (0197) H 0000 CACMid : 0
0x00c7 (0199) H 0000 CACHigh : 0
0x00c9 (0201) H b603 Vdd : 950
0x00cb (0203) H 0000 CACLow : 0
0x00cd (0205) H 0000 CACMid : 0
0x00cf (0207) H 0000 CACHigh : 0
0x00d1 (0209) H e803 Vdd : 1000
0x00d3 (0211) H 0000 CACLow : 0
0x00d5 (0213) H 0000 CACMid : 0
0x00d7 (0215) H 0000 CACHigh : 0
0x00d9 (0217) H 1a04 Vdd : 1050
0x00db (0219) H 0000 CACLow : 0
0x00dd (0221) H 0000 CACMid : 0
0x00df (0223) H 0000 CACHigh : 0
0x00e1 (0225) H 4c04 Vdd : 1100
0x00e3 (0227) H 0000 CACLow : 0
0x00e5 (0229) H 0000 CACMid : 0
0x00e7 (0231) H 0000 CACHigh : 0
0x00e9 (0233) H 7e04 Vdd : 1150
0x00eb (0235) H 0000 CACLow : 0
0x00ed (0237) H 0000 CACMid : 0
0x00ef (0239) H 0000 CACHigh : 0
0x00f1 (0241) H cf03 Vdd : 975
0x00f3 (0243) H 0000 CACLow : 0
0x00f5 (0245) H 0000 CACMid : 0
0x00f7 (0247) H 0000 CACHigh : 0
0x0031 (0049) H f900 VddgfxLookupTableOffset : 249
0x00f9 (0249) B 00 RevId : 0
0x00fa (0250) B 08 NumEntries : 8
0x00fb (0251) H 8403 Vdd : 900
0x00fd (0253) H 0000 CACLow : 0
0x00ff (0255) H 0000 CACMid : 0
0x0101 (0257) H 0000 CACHigh : 0
0x0103 (0259) H 02ff Vdd : 65282
0x0105 (0261) H 0000 CACLow : 0
0x0107 (0263) H 0000 CACMid : 0
0x0109 (0265) H 0000 CACHigh : 0
0x010b (0267) H 03ff Vdd : 65283
0x010d (0269) H 0000 CACLow : 0
0x010f (0271) H 0000 CACMid : 0
0x0111 (0273) H 0000 CACHigh : 0
0x0113 (0275) H 04ff Vdd : 65284
0x0115 (0277) H 0000 CACLow : 0
0x0117 (0279) H 0000 CACMid : 0
0x0119 (0281) H 0000 CACHigh : 0
0x011b (0283) H 05ff Vdd : 65285
0x011d (0285) H 0000 CACLow : 0
0x011f (0287) H 0000 CACMid : 0
0x0121 (0289) H 0000 CACHigh : 0
0x0123 (0291) H 06ff Vdd : 65286
0x0125 (0293) H 0000 CACLow : 0
0x0127 (0295) H 0000 CACMid : 0
0x0129 (0297) H 0000 CACHigh : 0
0x012b (0299) H 07ff Vdd : 65287
0x012d (0301) H 0000 CACLow : 0
0x012f (0303) H 0000 CACMid : 0
0x0131 (0305) H 0000 CACHigh : 0
0x0133 (0307) H 08ff Vdd : 65288
0x0135 (0309) H 0000 CACLow : 0
0x0137 (0311) H 0000 CACMid : 0
0x0139 (0313) H 0000 CACHigh : 0
0x0033 (0051) H d101 MMDependencyTableOffset : 465
0x01d1 (0465) B 00 RevId : 0
0x01d2 (0466) B 08 NumEntries : 8
0x01d3 (0467) B 00 VddcInd : 0
0x01d4 (0468) H 0000 VddgfxOffset : 0
0x01d6 (0470) I 90e20000 DClk : 58000
0x01da (0474) I f8240100 VClk : 75000
0x01de (0478) I 18f60000 EClk : 63000
0x01e2 (0482) I 00000000 AClk : 0
0x01e6 (0486) I a8de0000 SAMUClk : 57000
0x01ea (0490) B 08 VddcInd : 8
0x01eb (0491) H b4ff VddgfxOffset : 65460
0x01ed (0493) I 18f60000 DClk : 63000
0x01f1 (0497) I 80380100 VClk : 80000
0x01f5 (0501) I 880d0100 EClk : 69000
0x01f9 (0505) I 00000000 AClk : 0
0x01fd (0509) I 00fa0000 SAMUClk : 64000
0x0201 (0513) B 09 VddcInd : 9
0x0202 (0514) H 9bff VddgfxOffset : 65435
0x0204 (0516) I a0090100 DClk : 68000
0x0208 (0520) I 084c0100 VClk : 85000
0x020c (0524) I f8240100 EClk : 75000
0x0210 (0528) I 00000000 AClk : 0
0x0214 (0532) I 70110100 SAMUClk : 70000
0x0218 (0536) B 0a VddcInd : 10
0x0219 (0537) H 82ff VddgfxOffset : 65410
0x021b (0539) I 281d0100 DClk : 73000
0x021f (0543) I a85b0100 VClk : 89000
0x0223 (0547) I 683c0100 EClk : 81000
0x0227 (0551) I 00000000 AClk : 0
0x022b (0555) I e0280100 SAMUClk : 76000
0x022f (0559) B 0b VddcInd : 11
0x0230 (0560) H 69ff VddgfxOffset : 65385
0x0232 (0562) I c82c0100 DClk : 77000
0x0236 (0566) I 60670100 VClk : 92000
0x023a (0570) I f04f0100 EClk : 86000
0x023e (0574) I 00000000 AClk : 0
0x0242 (0578) I 683c0100 SAMUClk : 81000
0x0246 (0582) B 0c VddcInd : 12
0x0247 (0583) H 37ff VddgfxOffset : 65335
0x0249 (0585) I 80380100 DClk : 80000
0x024d (0589) I 18730100 VClk : 95000
0x0251 (0593) I 78630100 EClk : 91000
0x0255 (0597) I 00000000 AClk : 0
0x0259 (0601) I 084c0100 SAMUClk : 85000
0x025d (0605) B 0d VddcInd : 13
0x025e (0606) H 05ff VddgfxOffset : 65285
0x0260 (0608) I 38440100 DClk : 83000
0x0264 (0612) I d07e0100 VClk : 98000
0x0268 (0616) I 00770100 EClk : 96000
0x026c (0620) I 00000000 AClk : 0
0x0270 (0624) I c0570100 SAMUClk : 88000
0x0274 (0628) B 0e VddcInd : 14
0x0275 (0629) H 0000 VddgfxOffset : 0
0x0277 (0631) I f04f0100 DClk : 86000
0x027b (0635) I a0860100 VClk : 100000
0x027f (0639) I a0860100 EClk : 100000
0x0283 (0643) I 00000000 AClk : 0
0x0287 (0647) I 78630100 SAMUClk : 91000
0x0035 (0053) H f902 VCEStateTableOffset : 761
0x02f9 (0761) B 01 RevId : 1
0x02fa (0762) B 06 NumEntries : 6
0x02fb (0763) B 00 VCEClockIndex : 0
0x02fc (0764) B 00 Flag : 0
0x02fd (0765) B 01 SCLKIndex : 1
0x02fe (0766) B 01 MCLKIndex : 1
0x02ff (0767) B 00 VCEClockIndex : 0
0x0300 (0768) B 01 Flag : 1
0x0301 (0769) B 01 SCLKIndex : 1
0x0302 (0770) B 01 MCLKIndex : 1
0x0303 (0771) B 00 VCEClockIndex : 0
0x0304 (0772) B 02 Flag : 2
0x0305 (0773) B 01 SCLKIndex : 1
0x0306 (0774) B 01 MCLKIndex : 1
0x0307 (0775) B 00 VCEClockIndex : 0
0x0308 (0776) B 02 Flag : 2
0x0309 (0777) B 01 SCLKIndex : 1
0x030a (0778) B 01 MCLKIndex : 1
0x030b (0779) B 00 VCEClockIndex : 0
0x030c (0780) B 02 Flag : 2
0x030d (0781) B 01 SCLKIndex : 1
0x030e (0782) B 01 MCLKIndex : 1
0x030f (0783) B 00 VCEClockIndex : 0
0x0310 (0784) B 02 Flag : 2
0x0311 (0785) B 01 SCLKIndex : 1
0x0312 (0786) B 01 MCLKIndex : 1
0x0037 (0055) H 0000 PPMTableOffset : 0
0x0039 (0057) H c402 PowerTuneTableOffset : 708
0x02c4 (0708) B 04 RevId : 4
0x02c5 (0709) H 6e00 TDP : 110
0x02c7 (0711) H 0000 ConfigurableTDP : 0
0x02c9 (0713) H 6b00 TDC : 107
0x02cb (0715) H 6e00 BatteryPowerLimit : 110
0x02cd (0717) H 6e00 SmallPowerLimit : 110
0x02cf (0719) H 0000 LowCACLeakage : 0
0x02d1 (0721) H 0000 HighCACLeakage : 0
0x02d3 (0723) H 6e00 MaximumPowerDeliveryLimit : 110
0x02d5 (0725) H 5a00 TjMax : 90
0x02d7 (0727) H 0000 PowerTuneDataSetID : 0
0x02d9 (0729) H 0000 EDCLimit : 0
0x02db (0731) H 5e00 SoftwareShutdownTemp : 94
0x02dd (0733) H 0200 ClockStretchAmount : 2
0x02df (0735) H 6900 TemperatureLimitHotspot : 105
0x02e1 (0737) H 5000 TemperatureLimitLiquid1 : 80
0x02e3 (0739) H 5000 TemperatureLimitLiquid2 : 80
0x02e5 (0741) H 7300 TemperatureLimitVrVddc : 115
0x02e7 (0743) H 7300 TemperatureLimitVrMvdd : 115
0x02e9 (0745) H 5f00 TemperatureLimitPlx : 95
0x02eb (0747) B 00 Liquid1_I2C_address : 0
0x02ec (0748) B 00 Liquid2_I2C_address : 0
0x02ed (0749) B 90 Liquid_I2C_Line : 144
0x02ee (0750) B 10 Vr_I2C_address : 16
0x02ef (0751) B 96 Vr_I2C_Line : 150
0x02f0 (0752) B 00 Plx_I2C_address : 0
0x02f1 (0753) B 90 Plx_I2C_Line : 144
0x02f2 (0754) H 0000 BoostPowerLimit : 0
0x02f4 (0756) B 06 CKS_LDO_REFSEL : 6
0x02f5 (0757) B 00 HotSpotOnly : 0
0x02f6 (0758) B 00 Reserve : 0
0x02f7 (0759) H 0000 Reserve : 0
0x003b (0059) H 0000 HardLimitTableOffset : 0
0x003d (0061) H 1303 PCIETableOffset : 787
0x0313 (0787) B 01 RevId : 1
0x0314 (0788) B 03 NumEntries : 3
0x0315 (0789) B 00 PCIEGenSpeed : 0
0x0316 (0790) B 10 PCIELaneWidth : 16
0x0317 (0791) B 00 Reserved : 0
0x0318 (0792) B 00 Reserved : 0
0x0319 (0793) I 00000000 PCIE_Sclk : 0
0x031d (0797) B 00 PCIEGenSpeed : 0
0x031e (0798) B 10 PCIELaneWidth : 16
0x031f (0799) B 00 Reserved : 0
0x0320 (0800) B 00 Reserved : 0
0x0321 (0801) I 00000000 PCIE_Sclk : 0
0x0325 (0805) B 02 PCIEGenSpeed : 2
0x0326 (0806) B 10 PCIELaneWidth : 16
0x0327 (0807) B 00 Reserved : 0
0x0328 (0808) B 00 Reserved : 0
0x0329 (0809) I 00000000 PCIE_Sclk : 0
0x003f (0063) H 2d03 GPIOTableOffset : 813
0x032d (0813) B 00 RevId : 0
0x032e (0814) B 01 VRHotTriggeredSclkDpmIndex : 1
0x032f (0815) B 00 Reserve : 0
0x0330 (0816) B 00 Reserve : 0
0x0331 (0817) B 00 Reserve : 0
0x0332 (0818) B 00 Reserve : 0
0x0333 (0819) B 00 Reserve : 0
0x0041 (0065) H 0000 Reserved : 0
0x0043 (0067) H 0000 Reserved : 0
0x0045 (0069) H 0000 Reserved : 0
0x0047 (0071) H 0000 Reserved : 0
0x0049 (0073) H 0000 Reserved : 0
0x004b (0075) H 0000 Reserved : 0
================================================
FILE: test/AMD.RX5700XT.8192.190616.rom.check
================================================
110
110
100
2800
3900
2800
3800
-0.03
0
0
1650
4400
2600
4600
3200
4800
3200
5000
3200
750
================================================
FILE: test/AMD.RX5700XT.8192.190616.rom.conf
================================================
smc_pptable/SocketPowerLimitAc/0=110
smc_pptable/SocketPowerLimitDc/0=110
smc_pptable/FanStartTemp=100
smc_pptable/MinVoltageGfx=2800
smc_pptable/MaxVoltageGfx=3900
smc_pptable/MinVoltageSoc=2800
smc_pptable/MaxVoltageSoc=3800
smc_pptable/qStaticVoltageOffset/0/c=-0.03
smc_pptable/UlvVoltageOffsetSoc=0
smc_pptable/UlvVoltageOffsetGfx=0
smc_pptable/FreqTableGfx/1=1650
smc_pptable/MemMvddVoltage/0=4400
smc_pptable/MemVddciVoltage/0=2600
smc_pptable/MemMvddVoltage/1=4600
smc_pptable/MemVddciVoltage/1=3200
smc_pptable/MemMvddVoltage/2=4800
smc_pptable/MemVddciVoltage/2=3200
smc_pptable/MemMvddVoltage/3=5000
smc_pptable/MemVddciVoltage/3=3200
smc_pptable/FreqTableUclk/3=750
================================================
FILE: test/AMD.RX5700XT.8192.190616.rom.dump
================================================
header:
structuresize: 1674
format_revision: 12
content_revision: 0
table_revision: 1
table_size: 482
golden_pp_id: 2247
golden_revision: 14368
format_id: 125
platform_caps: 8
thermal_controller_type: 27
small_power_limit1: 0
small_power_limit2: 0
boost_power_limit: 0
od_turbo_power_limit: 0
od_power_save_power_limit: 0
software_shutdown_temp: 118
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
reserve 3: 0
reserve 4: 0
reserve 5: 0
power_saving_clock:
revision: 1
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
count: 10
max:
max 0: 2100 (GFXCLK)
max 1: 1267 (VCLK)
max 2: 1086 (DCLK)
max 3: 1267 (ECLK)
max 4: 1267 (SOCCLK)
max 5: 875 (UCLK)
max 6: 1267 (DCEFCLK)
max 7: 1284 (DISPCLK)
max 8: 1284 (PIXCLK)
max 9: 810 (PHYCLK)
max 10: 0
max 11: 0
max 12: 0
max 13: 0
max 14: 0
max 15: 0
min:
min 0: 300 (GFXCLK)
min 1: 100 (VCLK)
min 2: 100 (DCLK)
min 3: 100 (ECLK)
min 4: 507 (SOCCLK)
min 5: 100 (UCLK)
min 6: 507 (DCEFCLK)
min 7: 308 (DISPCLK)
min 8: 300 (PIXCLK)
min 9: 300 (PHYCLK)
min 10: 0
min 11: 0
min 12: 0
min 13: 0
min 14: 0
min 15: 0
overdrive_table:
revision: 128
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
feature_count: 14
setting_count: 30
cap:
cap 0: 1 (GFXCLK_LIMITS)
cap 1: 1 (GFXCLK_CURVE)
cap 2: 1 (UCLK_MAX)
cap 3: 1 (POWER_LIMIT)
cap 4: 1 (FAN_ACOUSTIC_LIMIT)
cap 5: 1 (FAN_SPEED_MIN)
cap 6: 1 (TEMPERATURE_FAN)
cap 7: 1 (TEMPERATURE_SYSTEM)
cap 8: 1 (MEMORY_TIMING_TUNE)
cap 9: 0 (FAN_ZERO_RPM_CONTROL)
cap 10: 1 (AUTO_UV_ENGINE)
cap 11: 1 (AUTO_OC_ENGINE)
cap 12: 1 (AUTO_OC_MEMORY)
cap 13: 1 (FAN_CURVE)
cap 14: 0
cap 15: 0
cap 16: 0
cap 17: 0
cap 18: 0
cap 19: 0
cap 20: 0
cap 21: 0
cap 22: 0
cap 23: 0
cap 24: 0
cap 25: 0
cap 26: 0
cap 27: 0
cap 28: 0
cap 29: 0
cap 30: 0
cap 31: 0
max:
max 0: 2150 (GFXCLKFMAX)
max 1: 2150 (GFXCLKFMIN)
max 2: 2150 (VDDGFXCURVEFREQ_P1)
max 3: 1200 (VDDGFXCURVEVOLTAGE_P1)
max 4: 2150 (VDDGFXCURVEFREQ_P2)
max 5: 1200 (VDDGFXCURVEVOLTAGE_P2)
max 6: 2150 (VDDGFXCURVEFREQ_P3)
max 7: 1200 (VDDGFXCURVEVOLTAGE_P3)
max 8: 950 (UCLKFMAX)
max 9: 50 (POWERPERCENTAGE)
max 10: 4950 (FANRPMMIN)
max 11: 4950 (FANRPMACOUSTICLIMIT)
max 12: 100 (FANTARGETTEMPERATURE)
max 13: 110 (OPERATINGTEMPMAX)
max 14: 2 (ACTIMING)
max 15: 0 (FAN_ZERO_RPM_CONTROL)
max 16: 1 (AUTOUVENGINE)
max 17: 1 (AUTOOCENGINE)
max 18: 1 (AUTOOCMEMORY)
max 19: 100
max 20: 100
max 21: 100
max 22: 100
max 23: 100
max 24: 100
max 25: 100
max 26: 100
max 27: 100
max 28: 100
max 29: 0
max 30: 0
max 31: 0
min:
min 0: 800 (GFXCLKFMAX)
min 1: 800 (GFXCLKFMIN)
min 2: 800 (VDDGFXCURVEFREQ_P1)
min 3: 750 (VDDGFXCURVEVOLTAGE_P1)
min 4: 800 (VDDGFXCURVEFREQ_P2)
min 5: 750 (VDDGFXCURVEVOLTAGE_P2)
min 6: 800 (VDDGFXCURVEFREQ_P3)
min 7: 750 (VDDGFXCURVEVOLTAGE_P3)
min 8: 625 (UCLKFMAX)
min 9: 50 (POWERPERCENTAGE)
min 10: 1100 (FANRPMMIN)
min 11: 1100 (FANRPMACOUSTICLIMIT)
min 12: 25 (FANTARGETTEMPERATURE)
min 13: 50 (OPERATINGTEMPMAX)
min 14: 0 (ACTIMING)
min 15: 0 (FAN_ZERO_RPM_CONTROL)
min 16: 0 (AUTOUVENGINE)
min 17: 0 (AUTOOCENGINE)
min 18: 0 (AUTOOCMEMORY)
min 19: 25
min 20: 10
min 21: 25
min 22: 10
min 23: 25
min 24: 10
min 25: 25
min 26: 10
min 27: 25
min 28: 10
min 29: 0
min 30: 0
min 31: 0
smc_pptable:
Version: 8
FeaturesToRun:
FeaturesToRun 0: 3017781247
FeaturesToRun 1: 1571
SocketPowerLimitAc:
SocketPowerLimitAc 0: 180
SocketPowerLimitAc 1: 0
SocketPowerLimitAc 2: 0
SocketPowerLimitAc 3: 0
SocketPowerLimitAcTau:
SocketPowerLimitAcTau 0: 0
SocketPowerLimitAcTau 1: 0
SocketPowerLimitAcTau 2: 0
SocketPowerLimitAcTau 3: 0
SocketPowerLimitDc:
SocketPowerLimitDc 0: 180
SocketPowerLimitDc 1: 0
SocketPowerLimitDc 2: 0
SocketPowerLimitDc 3: 0
SocketPowerLimitDcTau:
SocketPowerLimitDcTau 0: 0
SocketPowerLimitDcTau 1: 0
SocketPowerLimitDcTau 2: 0
SocketPowerLimitDcTau 3: 0
TdcLimitSoc: 14
TdcLimitSocTau: 0
TdcLimitGfx: 170
TdcLimitGfxTau: 0
TedgeLimit: 100
ThotspotLimit: 110
TmemLimit: 105
Tvr_gfxLimit: 115
Tvr_mem0Limit: 115
Tvr_mem1Limit: 115
Tvr_socLimit: 115
Tliquid0Limit: 0
Tliquid1Limit: 0
TplxLimit: 0
FitLimit: 0
PpmPowerLimit: 0
PpmTemperatureThreshold: 0
ThrottlerControlMask: 28926
FwDStateMask: 1
UlvVoltageOffsetSoc: 100
UlvVoltageOffsetGfx: 100
GceaLinkMgrIdleThreshold: 0
paddingRlcUlvParams:
paddingRlcUlvParams 0: 0
paddingRlcUlvParams 1: 0
paddingRlcUlvParams 2: 0
UlvSmnclkDid: 0
UlvMp1clkDid: 0
UlvGfxclkBypass: 0
Padding234: 0
MinVoltageUlvGfx: 2900
MinVoltageUlvSoc: 2900
MinVoltageGfx: 3000
MinVoltageSoc: 3000
MaxVoltageGfx: 4800
MaxVoltageSoc: 4800
LoadLineResistanceGfx: 76
LoadLineResistanceSoc: 0
DpmDescriptor:
DpmDescriptor 0:
VoltageMode: 1
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0
b: 0
SsCurve:
a: 0.2542
b:-0.21625
c: 0.69572
DpmDescriptor 1:
VoltageMode: 1
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1
b: 0
SsCurve:
a: 0.21751
b:-0.05852
c: 0.71468
DpmDescriptor 2:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 4
Padding: 0
ConversionToAvfsClk:
m: 1
b: 0
SsCurve:
a: 0.21751
b:-0.05852
c: 0.71468
DpmDescriptor 3:
VoltageMode: 1
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0.6443
b: 0.5349
SsCurve:
a: 0
b: 0.3851
c: 0.5678
DpmDescriptor 4:
VoltageMode: 1
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0.5094
b: 0.5925
SsCurve:
a: 0
b: 0.3307
c: 0.5685
DpmDescriptor 5:
VoltageMode: 1
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1.256
b:-0.3438
SsCurve:
a: 0
b: 0.5343
c: 0.2453
DpmDescriptor 6:
VoltageMode: 1
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0.8216
b: 0.0146
SsCurve:
a: 0
b: 0.4776
c: 0.2526
DpmDescriptor 7:
VoltageMode: 2
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0
b: 0
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 8:
VoltageMode: 2
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0
b: 0
SsCurve:
a: 0
b: 0
c: 0
FreqTableGfx:
FreqTableGfx 0: 300
FreqTableGfx 1: 2100
FreqTableGfx 2: 1400
FreqTableGfx 3: 1400
FreqTableGfx 4: 1400
FreqTableGfx 5: 1400
FreqTableGfx 6: 1400
FreqTableGfx 7: 1400
FreqTableGfx 8: 1400
FreqTableGfx 9: 1400
FreqTableGfx 10: 1400
FreqTableGfx 11: 1400
FreqTableGfx 12: 1400
FreqTableGfx 13: 1400
FreqTableGfx 14: 1400
FreqTableGfx 15: 1400
FreqTableVclk:
FreqTableVclk 0: 100
FreqTableVclk 1: 1267
FreqTableVclk 2: 1267
FreqTableVclk 3: 1267
FreqTableVclk 4: 1267
FreqTableVclk 5: 1267
FreqTableVclk 6: 1267
FreqTableVclk 7: 1267
FreqTableDclk:
FreqTableDclk 0: 100
FreqTableDclk 1: 1086
FreqTableDclk 2: 1086
FreqTableDclk 3: 1086
FreqTableDclk 4: 1086
FreqTableDclk 5: 1086
FreqTableDclk 6: 1086
FreqTableDclk 7: 1086
FreqTableSocclk:
FreqTableSocclk 0: 507
FreqTableSocclk 1: 1267
FreqTableSocclk 2: 950
FreqTableSocclk 3: 950
FreqTableSocclk 4: 950
FreqTableSocclk 5: 950
FreqTableSocclk 6: 950
FreqTableSocclk 7: 950
FreqTableUclk:
FreqTableUclk 0: 100
FreqTableUclk 1: 500
FreqTableUclk 2: 625
FreqTableUclk 3: 875
FreqTableDcefclk:
FreqTableDcefclk 0: 507
FreqTableDcefclk 1: 1267
FreqTableDcefclk 2: 1267
FreqTableDcefclk 3: 1267
FreqTableDcefclk 4: 1267
FreqTableDcefclk 5: 1267
FreqTableDcefclk 6: 1267
FreqTableDcefclk 7: 1267
FreqTableDispclk:
FreqTableDispclk 0: 308
FreqTableDispclk 1: 1284
FreqTableDispclk 2: 1284
FreqTableDispclk 3: 1284
FreqTableDispclk 4: 1284
FreqTableDispclk 5: 1284
FreqTableDispclk 6: 1284
FreqTableDispclk 7: 1284
FreqTablePixclk:
FreqTablePixclk 0: 300
FreqTablePixclk 1: 1284
FreqTablePixclk 2: 1188
FreqTablePixclk 3: 1188
FreqTablePixclk 4: 1188
FreqTablePixclk 5: 1188
FreqTablePixclk 6: 1188
FreqTablePixclk 7: 1188
FreqTablePhyclk:
FreqTablePhyclk 0: 300
FreqTablePhyclk 1: 810
FreqTablePhyclk 2: 810
FreqTablePhyclk 3: 810
FreqTablePhyclk 4: 810
FreqTablePhyclk 5: 810
FreqTablePhyclk 6: 810
FreqTablePhyclk 7: 810
Paddingclks:
Paddingclks 0: 30409168
Paddingclks 1: 30409168
Paddingclks 2: 30409168
Paddingclks 3: 30409168
Paddingclks 4: 30409168
Paddingclks 5: 30409168
Paddingclks 6: 30409168
Paddingclks 7: 30409168
Paddingclks 8: 30409168
Paddingclks 9: 30409168
Paddingclks 10: 30409168
Paddingclks 11: 30409168
Paddingclks 12: 30409168
Paddingclks 13: 30409168
Paddingclks 14: 30409168
Paddingclks 15: 30409168
DcModeMaxFreq:
DcModeMaxFreq 0: 2100
DcModeMaxFreq 1: 1267
DcModeMaxFreq 2: 875
DcModeMaxFreq 3: 1086
DcModeMaxFreq 4: 1267
DcModeMaxFreq 5: 1267
DcModeMaxFreq 6: 1284
DcModeMaxFreq 7: 1284
DcModeMaxFreq 8: 810
Padding8_Clks: 464
FreqTableUclkDiv:
FreqTableUclkDiv 0: 0
FreqTableUclkDiv 1: 3
FreqTableUclkDiv 2: 3
FreqTableUclkDiv 3: 3
Mp0clkFreq:
Mp0clkFreq 0: 304
Mp0clkFreq 1: 507
Mp0DpmVoltage:
Mp0DpmVoltage 0: 3000
Mp0DpmVoltage 1: 3000
MemVddciVoltage:
MemVddciVoltage 0: 2700
MemVddciVoltage 1: 3400
MemVddciVoltage 2: 3400
MemVddciVoltage 3: 3400
MemMvddVoltage:
MemMvddVoltage 0: 5000
MemMvddVoltage 1: 5400
MemMvddVoltage 2: 5400
MemMvddVoltage 3: 5400
GfxclkFgfxoffEntry: 800
GfxclkFinit: 800
GfxclkFidle: 800
GfxclkSlewRate: 0
GfxclkFopt: 0
Padding567:
Padding567 0: 208
Padding567 1: 1
GfxclkDsMaxFreq: 0
GfxclkSource: 1
Padding456: 2
LowestUclkReservedForUlv: 0
paddingUclk:
paddingUclk 0: 0
paddingUclk 1: 91
paddingUclk 2: 0
MemoryType: 0
MemoryChannels: 16
PaddingMem:
PaddingMem 0: 0
PaddingMem 1: 0
PcieGenSpeed:
PcieGenSpeed 0: 0
PcieGenSpeed 1: 3
PcieLaneCount:
PcieLaneCount 0: 6
PcieLaneCount 1: 6
LclkFreq:
LclkFreq 0: 619
LclkFreq 1: 619
EnableTdpm: 0
TdpmHighHystTemperature: 0
TdpmLowHystTemperature: 0
GfxclkFreqHighTempLimit: 0
FanStopTemp: 0
FanStartTemp: 0
FanGainEdge: 400
FanGainHotspot: 400
FanGainLiquid0: 400
FanGainLiquid1: 400
FanGainVrGfx: 400
FanGainVrSoc: 400
FanGainVrMem0: 400
FanGainVrMem1: 400
FanGainPlx: 400
FanGainMem: 400
FanPwmMin: 20
FanAcousticLimitRpm: 2100
FanThrottlingRpm: 2100
FanMaximumRpm: 4950
FanTargetTemperature: 90
FanTargetGfxclk: 800
FanTempInputSelect: 1
FanPadding: 0
FanZeroRpmEnable: 0
FanTachEdgePerRev: 2
FuzzyFan_ErrorSetDelta: 0
FuzzyFan_ErrorRateSetDelta: 0
FuzzyFan_PwmSetDelta: 0
FuzzyFan_Reserved: 0
OverrideAvfsGb:
OverrideAvfsGb 0: 0
OverrideAvfsGb 1: 0
Padding8_Avfs:
Padding8_Avfs 0: 0
Padding8_Avfs 1: 0
qAvfsGb:
qAvfsGb 0:
a: 0.01781
b:-0.04728
c: 0.05402
qAvfsGb 1:
a: 0
b: 0
c: 0.03
dBtcGbGfxPll:
a: 0
b: 0
c: 0
dBtcGbGfxDfll:
a: 0.09755
b: 0.04839
c:-0.07874
dBtcGbSoc:
a: 0.00234
b:-0.00239
c: 0.09239
qAgingGb:
qAgingGb 0:
m: 0
b: 0
qAgingGb 1:
m: 0
b: 0
qStaticVoltageOffset:
qStaticVoltageOffset 0:
a: 0
b: 0
c: 0
qStaticVoltageOffset 1:
a: 0
b: 0
c: 0
DcTol:
DcTol 0: 160
DcTol 1: 160
DcBtcEnabled:
DcBtcEnabled 0: 1
DcBtcEnabled 1: 1
Padding8_GfxBtc:
Padding8_GfxBtc 0: 0
Padding8_GfxBtc 1: 0
DcBtcMin:
DcBtcMin 0: 0
DcBtcMin 1: 0
DcBtcMax:
DcBtcMax 0: 160
DcBtcMax 1: 160
DebugOverrides: 512
ReservedEquation0:
a: 0
b: 0
c: 0
ReservedEquation1:
a: 0
b: 0
c: 0
ReservedEquation2:
a: 0
b: 0
c: 0
ReservedEquation3:
a: 0
b: 0
c: 0
TotalPowerConfig: 1
TotalPowerSpare1: 0
TotalPowerSpare2: 0
PccThresholdLow: 0
PccThresholdHigh: 0
MGpuFanBoostLimitRpm: 0
PaddingAPCC:
PaddingAPCC 0: 0
PaddingAPCC 1: 0
PaddingAPCC 2: 0
PaddingAPCC 3: 0
PaddingAPCC 4: 0
VDDGFX_TVmin: 0
VDDSOC_TVmin: 0
VDDGFX_Vmin_HiTemp: 0
VDDGFX_Vmin_LoTemp: 0
VDDSOC_Vmin_HiTemp: 0
VDDSOC_Vmin_LoTemp: 0
VDDGFX_TVminHystersis: 0
VDDSOC_TVminHystersis: 0
BtcConfig: 0
SsFmin:
SsFmin 0: 425
SsFmin 1: 135
SsFmin 2: 135
SsFmin 3: 0
SsFmin 4: 0
SsFmin 5: 0
SsFmin 6: 0
SsFmin 7: 0
SsFmin 8: 0
SsFmin 9: 0
DcBtcGb:
DcBtcGb 0: 25
DcBtcGb 1: 25
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
Reserved 3: 0
Reserved 4: 0
Reserved 5: 0
Reserved 6: 0
Reserved 7: 0
I2cControllers:
I2cControllers 0:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 1:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 2:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 3:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 4:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 5:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 6:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 7:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
MaxVoltageStepGfx: 0
MaxVoltageStepSoc: 0
VddGfxVrMapping: 0
VddSocVrMapping: 0
VddMem0VrMapping: 0
VddMem1VrMapping: 0
GfxUlvPhaseSheddingMask: 0
SocUlvPhaseSheddingMask: 0
ExternalSensorPresent: 0
Padding8_V: 0
GfxMaxCurrent: 0
GfxOffset: 0
Padding_TelemetryGfx: 0
SocMaxCurrent: 0
SocOffset: 0
Padding_TelemetrySoc: 0
Mem0MaxCurrent: 0
Mem0Offset: 0
Padding_TelemetryMem0: 0
Mem1MaxCurrent: 0
Mem1Offset: 0
Padding_TelemetryMem1: 0
AcDcGpio: 0
AcDcPolarity: 0
VR0HotGpio: 0
VR0HotPolarity: 0
VR1HotGpio: 0
VR1HotPolarity: 0
GthrGpio: 0
GthrPolarity: 0
LedPin0: 0
LedPin1: 0
LedPin2: 0
padding8_4: 0
PllGfxclkSpreadEnabled: 0
PllGfxclkSpreadPercent: 0
PllGfxclkSpreadFreq: 0
DfllGfxclkSpreadEnabled: 0
DfllGfxclkSpreadPercent: 0
DfllGfxclkSpreadFreq: 0
UclkSpreadEnabled: 0
UclkSpreadPercent: 0
UclkSpreadFreq: 0
SoclkSpreadEnabled: 0
SocclkSpreadPercent: 0
SocclkSpreadFreq: 0
TotalBoardPower: 0
BoardPadding: 0
MvddRatio: 0
RenesesLoadLineEnabled: 0
GfxLoadlineResistance: 0
SocLoadlineResistance: 0
Padding8_Loadline: 0
BoardReserved:
BoardReserved 0: 0
BoardReserved 1: 0
BoardReserved 2: 0
BoardReserved 3: 0
BoardReserved 4: 0
BoardReserved 5: 0
BoardReserved 6: 0
BoardReserved 7: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
================================================
FILE: test/AMD.RX5700XT.8192.190616.rom.rawdump
================================================
PowerPlay table rev 12.0 size 1674 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H 8a06 structuresize : 1674
0x0002 (0002) B 0c format_revision : 12
0x0003 (0003) B 00 content_revision : 0
0x0004 (0004) B 01 table_revision : 1
0x0005 (0005) H e201 table_size : 482
0x0007 (0007) I c7080000 golden_pp_id : 2247
0x000b (0011) I 20380000 golden_revision : 14368
0x000f (0015) H 7d00 format_id : 125
0x0011 (0017) I 08000000 platform_caps : 8
0x0015 (0021) B 1b thermal_controller_type : 27
0x0016 (0022) H 0000 small_power_limit1 : 0
0x0018 (0024) H 0000 small_power_limit2 : 0
0x001a (0026) H 0000 boost_power_limit : 0
0x001c (0028) H 0000 od_turbo_power_limit : 0
0x001e (0030) H 0000 od_power_save_power_limit : 0
0x0020 (0032) H 7600 software_shutdown_temp : 118
0x0022 (0034) H 0000 reserve : 0
0x0024 (0036) H 0000 reserve : 0
0x0026 (0038) H 0000 reserve : 0
0x0028 (0040) H 0000 reserve : 0
0x002a (0042) H 0000 reserve : 0
0x002c (0044) H 0000 reserve : 0
0x002e (0046) B 01 revision : 1
0x002f (0047) B 00 reserve : 0
0x0030 (0048) B 00 reserve : 0
0x0031 (0049) B 00 reserve : 0
0x0032 (0050) I 0a000000 count : 10
0x0036 (0054) I 34080000 max GFXCLK : 2100
0x003a (0058) I f3040000 max VCLK : 1267
0x003e (0062) I 3e040000 max DCLK : 1086
0x0042 (0066) I f3040000 max ECLK : 1267
0x0046 (0070) I f3040000 max SOCCLK : 1267
0x004a (0074) I 6b030000 max UCLK : 875
0x004e (0078) I f3040000 max DCEFCLK : 1267
0x0052 (0082) I 04050000 max DISPCLK : 1284
0x0056 (0086) I 04050000 max PIXCLK : 1284
0x005a (0090) I 2a030000 max PHYCLK : 810
0x005e (0094) I 00000000 max : 0
0x0062 (0098) I 00000000 max : 0
0x0066 (0102) I 00000000 max : 0
0x006a (0106) I 00000000 max : 0
0x006e (0110) I 00000000 max : 0
0x0072 (0114) I 00000000 max : 0
0x0076 (0118) I 2c010000 min GFXCLK : 300
0x007a (0122) I 64000000 min VCLK : 100
0x007e (0126) I 64000000 min DCLK : 100
0x0082 (0130) I 64000000 min ECLK : 100
0x0086 (0134) I fb010000 min SOCCLK : 507
0x008a (0138) I 64000000 min UCLK : 100
0x008e (0142) I fb010000 min DCEFCLK : 507
0x0092 (0146) I 34010000 min DISPCLK : 308
0x0096 (0150) I 2c010000 min PIXCLK : 300
0x009a (0154) I 2c010000 min PHYCLK : 300
0x009e (0158) I 00000000 min : 0
0x00a2 (0162) I 00000000 min : 0
0x00a6 (0166) I 00000000 min : 0
0x00aa (0170) I 00000000 min : 0
0x00ae (0174) I 00000000 min : 0
0x00b2 (0178) I 00000000 min : 0
0x00b6 (0182) B 80 revision : 128
0x00b7 (0183) B 00 reserve : 0
0x00b8 (0184) B 00 reserve : 0
0x00b9 (0185) B 00 reserve : 0
0x00ba (0186) I 0e000000 feature_count : 14
0x00be (0190) I 1e000000 setting_count : 30
0x00c2 (0194) B 01 cap GFXCLK_LIMITS : 1
0x00c3 (0195) B 01 cap GFXCLK_CURVE : 1
0x00c4 (0196) B 01 cap UCLK_MAX : 1
0x00c5 (0197) B 01 cap POWER_LIMIT : 1
0x00c6 (0198) B 01 cap FAN_ACOUSTIC_LIMIT : 1
0x00c7 (0199) B 01 cap FAN_SPEED_MIN : 1
0x00c8 (0200) B 01 cap TEMPERATURE_FAN : 1
0x00c9 (0201) B 01 cap TEMPERATURE_SYSTEM : 1
0x00ca (0202) B 01 cap MEMORY_TIMING_TUNE : 1
0x00cb (0203) B 00 cap FAN_ZERO_RPM_CONTROL : 0
0x00cc (0204) B 01 cap AUTO_UV_ENGINE : 1
0x00cd (0205) B 01 cap AUTO_OC_ENGINE : 1
0x00ce (0206) B 01 cap AUTO_OC_MEMORY : 1
0x00cf (0207) B 01 cap FAN_CURVE : 1
0x00d0 (0208) B 00 cap : 0
0x00d1 (0209) B 00 cap : 0
0x00d2 (0210) B 00 cap : 0
0x00d3 (0211) B 00 cap : 0
0x00d4 (0212) B 00 cap : 0
0x00d5 (0213) B 00 cap : 0
0x00d6 (0214) B 00 cap : 0
0x00d7 (0215) B 00 cap : 0
0x00d8 (0216) B 00 cap : 0
0x00d9 (0217) B 00 cap : 0
0x00da (0218) B 00 cap : 0
0x00db (0219) B 00 cap : 0
0x00dc (0220) B 00 cap : 0
0x00dd (0221) B 00 cap : 0
0x00de (0222) B 00 cap : 0
0x00df (0223) B 00 cap : 0
0x00e0 (0224) B 00 cap : 0
0x00e1 (0225) B 00 cap : 0
0x00e2 (0226) I 66080000 max GFXCLKFMAX : 2150
0x00e6 (0230) I 66080000 max GFXCLKFMIN : 2150
0x00ea (0234) I 66080000 max VDDGFXCURVEFREQ_P1 : 2150
0x00ee (0238) I b0040000 max VDDGFXCURVEVOLTAGE_P1 : 1200
0x00f2 (0242) I 66080000 max VDDGFXCURVEFREQ_P2 : 2150
0x00f6 (0246) I b0040000 max VDDGFXCURVEVOLTAGE_P2 : 1200
0x00fa (0250) I 66080000 max VDDGFXCURVEFREQ_P3 : 2150
0x00fe (0254) I b0040000 max VDDGFXCURVEVOLTAGE_P3 : 1200
0x0102 (0258) I b6030000 max UCLKFMAX : 950
0x0106 (0262) I 32000000 max POWERPERCENTAGE : 50
0x010a (0266) I 56130000 max FANRPMMIN : 4950
0x010e (0270) I 56130000 max FANRPMACOUSTICLIMIT : 4950
0x0112 (0274) I 64000000 max FANTARGETTEMPERATURE : 100
0x0116 (0278) I 6e000000 max OPERATINGTEMPMAX : 110
0x011a (0282) I 02000000 max ACTIMING : 2
0x011e (0286) I 00000000 max FAN_ZERO_RPM_CONTROL : 0
0x0122 (0290) I 01000000 max AUTOUVENGINE : 1
0x0126 (0294) I 01000000 max AUTOOCENGINE : 1
0x012a (0298) I 01000000 max AUTOOCMEMORY : 1
0x012e (0302) I 64000000 max : 100
0x0132 (0306) I 64000000 max : 100
0x0136 (0310) I 64000000 max : 100
0x013a (0314) I 64000000 max : 100
0x013e (0318) I 64000000 max : 100
0x0142 (0322) I 64000000 max : 100
0x0146 (0326) I 64000000 max : 100
0x014a (0330) I 64000000 max : 100
0x014e (0334) I 64000000 max : 100
0x0152 (0338) I 64000000 max : 100
0x0156 (0342) I 00000000 max : 0
0x015a (0346) I 00000000 max : 0
0x015e (0350) I 00000000 max : 0
0x0162 (0354) I 20030000 min GFXCLKFMAX : 800
0x0166 (0358) I 20030000 min GFXCLKFMIN : 800
0x016a (0362) I 20030000 min VDDGFXCURVEFREQ_P1 : 800
0x016e (0366) I ee020000 min VDDGFXCURVEVOLTAGE_P1 : 750
0x0172 (0370) I 20030000 min VDDGFXCURVEFREQ_P2 : 800
0x0176 (0374) I ee020000 min VDDGFXCURVEVOLTAGE_P2 : 750
0x017a (0378) I 20030000 min VDDGFXCURVEFREQ_P3 : 800
0x017e (0382) I ee020000 min VDDGFXCURVEVOLTAGE_P3 : 750
0x0182 (0386) I 71020000 min UCLKFMAX : 625
0x0186 (0390) I 32000000 min POWERPERCENTAGE : 50
0x018a (0394) I 4c040000 min FANRPMMIN : 1100
0x018e (0398) I 4c040000 min FANRPMACOUSTICLIMIT : 1100
0x0192 (0402) I 19000000 min FANTARGETTEMPERATURE : 25
0x0196 (0406) I 32000000 min OPERATINGTEMPMAX : 50
0x019a (0410) I 00000000 min ACTIMING : 0
0x019e (0414) I 00000000 min FAN_ZERO_RPM_CONTROL : 0
0x01a2 (0418) I 00000000 min AUTOUVENGINE : 0
0x01a6 (0422) I 00000000 min AUTOOCENGINE : 0
0x01aa (0426) I 00000000 min AUTOOCMEMORY : 0
0x01ae (0430) I 19000000 min : 25
0x01b2 (0434) I 0a000000 min : 10
0x01b6 (0438) I 19000000 min : 25
0x01ba (0442) I 0a000000 min : 10
0x01be (0446) I 19000000 min : 25
0x01c2 (0450) I 0a000000 min : 10
0x01c6 (0454) I 19000000 min : 25
0x01ca (0458) I 0a000000 min : 10
0x01ce (0462) I 19000000 min : 25
0x01d2 (0466) I 0a000000 min : 10
0x01d6 (0470) I 00000000 min : 0
0x01da (0474) I 00000000 min : 0
0x01de (0478) I 00000000 min : 0
0x01e2 (0482) I 08000000 Version : 8
0x01e6 (0486) I ffafdfb3 FeaturesToRun : 3017781247
0x01ea (0490) I 23060000 FeaturesToRun : 1571
0x01ee (0494) H b400 SocketPowerLimitAc : 180
0x01f0 (0496) H 0000 SocketPowerLimitAc : 0
0x01f2 (0498) H 0000 SocketPowerLimitAc : 0
0x01f4 (0500) H 0000 SocketPowerLimitAc : 0
0x01f6 (0502) H 0000 SocketPowerLimitAcTau : 0
0x01f8 (0504) H 0000 SocketPowerLimitAcTau : 0
0x01fa (0506) H 0000 SocketPowerLimitAcTau : 0
0x01fc (0508) H 0000 SocketPowerLimitAcTau : 0
0x01fe (0510) H b400 SocketPowerLimitDc : 180
0x0200 (0512) H 0000 SocketPowerLimitDc : 0
0x0202 (0514) H 0000 SocketPowerLimitDc : 0
0x0204 (0516) H 0000 SocketPowerLimitDc : 0
0x0206 (0518) H 0000 SocketPowerLimitDcTau : 0
0x0208 (0520) H 0000 SocketPowerLimitDcTau : 0
0x020a (0522) H 0000 SocketPowerLimitDcTau : 0
0x020c (0524) H 0000 SocketPowerLimitDcTau : 0
0x020e (0526) H 0e00 TdcLimitSoc : 14
0x0210 (0528) H 0000 TdcLimitSocTau : 0
0x0212 (0530) H aa00 TdcLimitGfx : 170
0x0214 (0532) H 0000 TdcLimitGfxTau : 0
0x0216 (0534) H 6400 TedgeLimit : 100
0x0218 (0536) H 6e00 ThotspotLimit : 110
0x021a (0538) H 6900 TmemLimit : 105
0x021c (0540) H 7300 Tvr_gfxLimit : 115
0x021e (0542) H 7300 Tvr_mem0Limit : 115
0x0220 (0544) H 7300 Tvr_mem1Limit : 115
0x0222 (0546) H 7300 Tvr_socLimit : 115
0x0224 (0548) H 0000 Tliquid0Limit : 0
0x0226 (0550) H 0000 Tliquid1Limit : 0
0x0228 (0552) H 0000 TplxLimit : 0
0x022a (0554) I 00000000 FitLimit : 0
0x022e (0558) H 0000 PpmPowerLimit : 0
0x0230 (0560) H 0000 PpmTemperatureThreshold : 0
0x0232 (0562) I fe700000 ThrottlerControlMask : 28926
0x0236 (0566) I 01000000 FwDStateMask : 1
0x023a (0570) H 6400 UlvVoltageOffsetSoc : 100
0x023c (0572) H 6400 UlvVoltageOffsetGfx : 100
0x023e (0574) B 00 GceaLinkMgrIdleThreshold : 0
0x023f (0575) B 00 RlcUlvParams : 0
0x0240 (0576) B 00 RlcUlvParams : 0
0x0241 (0577) B 00 RlcUlvParams : 0
0x0242 (0578) B 00 UlvSmnclkDid : 0
0x0243 (0579) B 00 UlvMp1clkDid : 0
0x0244 (0580) B 00 UlvGfxclkBypass : 0
0x0245 (0581) B 00 Padding234 : 0
0x0246 (0582) H 540b MinVoltageUlvGfx : 2900
0x0248 (0584) H 540b MinVoltageUlvSoc : 2900
0x024a (0586) H b80b MinVoltageGfx : 3000
0x024c (0588) H b80b MinVoltageSoc : 3000
0x024e (0590) H c012 MaxVoltageGfx : 4800
0x0250 (0592) H c012 MaxVoltageSoc : 4800
0x0252 (0594) H 4c00 LoadLineResistanceGfx : 76
0x0254 (0596) H 0000 LoadLineResistanceSoc : 0
0x0256 (0598) B 01 VoltageMode : 1
0x0257 (0599) B 00 SnapToDiscrete : 0
0x0258 (0600) B 02 NumDiscreteLevels : 2
0x0259 (0601) B 00 Padding : 0
0x025a (0602) f 00000000 m : 0
0x025e (0606) f 00000000 b : 0
0x0262 (0610) f 8126823e a : 0.2542
0x0266 (0614) f a4705dbe b :-0.21625
0x026a (0618) f b51a323f c : 0.69572
0x026e (0622) B 01 VoltageMode : 1
0x026f (0623) B 00 SnapToDiscrete : 0
0x0270 (0624) B 02 NumDiscreteLevels : 2
0x0271 (0625) B 00 Padding : 0
0x0272 (0626) f 0000803f m : 1
0x0276 (0630) f 00000000 b : 0
0x027a (0634) f f1ba5e3e a : 0.21751
0x027e (0638) f abb26fbd b :-0.05852
0x0282 (0642) f 45f5363f c : 0.71468
0x0286 (0646) B 01 VoltageMode : 1
0x0287 (0647) B 01 SnapToDiscrete : 1
0x0288 (0648) B 04 NumDiscreteLevels : 4
0x0289 (0649) B 00 Padding : 0
0x028a (0650) f 0000803f m : 1
0x028e (0654) f 00000000 b : 0
0x0292 (0658) f f1ba5e3e a : 0.21751
0x0296 (0662) f abb26fbd b :-0.05852
0x029a (0666) f 45f5363f c : 0.71468
0x029e (0670) B 01 VoltageMode : 1
0x029f (0671) B 00 SnapToDiscrete : 0
0x02a0 (0672) B 02 NumDiscreteLevels : 2
0x02a1 (0673) B 00 Padding : 0
0x02a2 (0674) f d8f0243f m : 0.6443
0x02a6 (0678) f 35ef083f b : 0.5349
0x02aa (0682) f 00000000 a : 0
0x02ae (0686) f d42bc53e b : 0.3851
0x02b2 (0690) f 575b113f c : 0.5678
0x02b6 (0694) B 01 VoltageMode : 1
0x02b7 (0695) B 00 SnapToDiscrete : 0
0x02b8 (0696) B 02 NumDiscreteLevels : 2
0x02b9 (0697) B 00 Padding : 0
0x02ba (0698) f 0a68023f m : 0.5094
0x02be (0702) f 14ae173f b : 0.5925
0x02c2 (0706) f 00000000 a : 0
0x02c6 (0710) f 8351a93e b : 0.3307
0x02ca (0714) f 3789113f c : 0.5685
0x02ce (0718) B 01 VoltageMode : 1
0x02cf (0719) B 00 SnapToDiscrete : 0
0x02d0 (0720) B 02 NumDiscreteLevels : 2
0x02d1 (0721) B 00 Padding : 0
0x02d2 (0722) f 9cc4a03f m : 1.256
0x02d6 (0726) f 8e06b0be b :-0.3438
0x02da (0730) f 00000000 a : 0
0x02de (0734) f e3c7083f b : 0.5343
0x02e2 (0738) f ec2f7b3e c : 0.2453
0x02e6 (0742) B 01 VoltageMode : 1
0x02e7 (0743) B 00 SnapToDiscrete : 0
0x02e8 (0744) B 02 NumDiscreteLevels : 2
0x02e9 (0745) B 00 Padding : 0
0x02ea (0746) f 6154523f m : 0.8216
0x02ee (0750) f d7346f3c b : 0.0146
0x02f2 (0754) f 00000000 a : 0
0x02f6 (0758) f fd87f43e b : 0.4776
0x02fa (0762) f ca54813e c : 0.2526
0x02fe (0766) B 02 VoltageMode : 2
0x02ff (0767) B 00 SnapToDiscrete : 0
0x0300 (0768) B 02 NumDiscreteLevels : 2
0x0301 (0769) B 00 Padding : 0
0x0302 (0770) f 00000000 m : 0
0x0306 (0774) f 00000000 b : 0
0x030a (0778) f 00000000 a : 0
0x030e (0782) f 00000000 b : 0
0x0312 (0786) f 00000000 c : 0
0x0316 (0790) B 02 VoltageMode : 2
0x0317 (0791) B 00 SnapToDiscrete : 0
0x0318 (0792) B 02 NumDiscreteLevels : 2
0x0319 (0793) B 00 Padding : 0
0x031a (0794) f 00000000 m : 0
0x031e (0798) f 00000000 b : 0
0x0322 (0802) f 00000000 a : 0
0x0326 (0806) f 00000000 b : 0
0x032a (0810) f 00000000 c : 0
0x032e (0814) H 2c01 FreqTableGfx : 300
0x0330 (0816) H 3408 FreqTableGfx : 2100
0x0332 (0818) H 7805 FreqTableGfx : 1400
0x0334 (0820) H 7805 FreqTableGfx : 1400
0x0336 (0822) H 7805 FreqTableGfx : 1400
0x0338 (0824) H 7805 FreqTableGfx : 1400
0x033a (0826) H 7805 FreqTableGfx : 1400
0x033c (0828) H 7805 FreqTableGfx : 1400
0x033e (0830) H 7805 FreqTableGfx : 1400
0x0340 (0832) H 7805 FreqTableGfx : 1400
0x0342 (0834) H 7805 FreqTableGfx : 1400
0x0344 (0836) H 7805 FreqTableGfx : 1400
0x0346 (0838) H 7805 FreqTableGfx : 1400
0x0348 (0840) H 7805 FreqTableGfx : 1400
0x034a (0842) H 7805 FreqTableGfx : 1400
0x034c (0844) H 7805 FreqTableGfx : 1400
0x034e (0846) H 6400 FreqTableVclk : 100
0x0350 (0848) H f304 FreqTableVclk : 1267
0x0352 (0850) H f304 FreqTableVclk : 1267
0x0354 (0852) H f304 FreqTableVclk : 1267
0x0356 (0854) H f304 FreqTableVclk : 1267
0x0358 (0856) H f304 FreqTableVclk : 1267
0x035a (0858) H f304 FreqTableVclk : 1267
0x035c (0860) H f304 FreqTableVclk : 1267
0x035e (0862) H 6400 FreqTableDclk : 100
0x0360 (0864) H 3e04 FreqTableDclk : 1086
0x0362 (0866) H 3e04 FreqTableDclk : 1086
0x0364 (0868) H 3e04 FreqTableDclk : 1086
0x0366 (0870) H 3e04 FreqTableDclk : 1086
0x0368 (0872) H 3e04 FreqTableDclk : 1086
0x036a (0874) H 3e04 FreqTableDclk : 1086
0x036c (0876) H 3e04 FreqTableDclk : 1086
0x036e (0878) H fb01 FreqTableSocclk : 507
0x0370 (0880) H f304 FreqTableSocclk : 1267
0x0372 (0882) H b603 FreqTableSocclk : 950
0x0374 (0884) H b603 FreqTableSocclk : 950
0x0376 (0886) H b603 FreqTableSocclk : 950
0x0378 (0888) H b603 FreqTableSocclk : 950
0x037a (0890) H b603 FreqTableSocclk : 950
0x037c (0892) H b603 FreqTableSocclk : 950
0x037e (0894) H 6400 FreqTableUclk : 100
0x0380 (0896) H f401 FreqTableUclk : 500
0x0382 (0898) H 7102 FreqTableUclk : 625
0x0384 (0900) H 6b03 FreqTableUclk : 875
0x0386 (0902) H fb01 FreqTableDcefclk : 507
0x0388 (0904) H f304 FreqTableDcefclk : 1267
0x038a (0906) H f304 FreqTableDcefclk : 1267
0x038c (0908) H f304 FreqTableDcefclk : 1267
0x038e (0910) H f304 FreqTableDcefclk : 1267
0x0390 (0912) H f304 FreqTableDcefclk : 1267
0x0392 (0914) H f304 FreqTableDcefclk : 1267
0x0394 (0916) H f304 FreqTableDcefclk : 1267
0x0396 (0918) H 3401 FreqTableDispclk : 308
0x0398 (0920) H 0405 FreqTableDispclk : 1284
0x039a (0922) H 0405 FreqTableDispclk : 1284
0x039c (0924) H 0405 FreqTableDispclk : 1284
0x039e (0926) H 0405 FreqTableDispclk : 1284
0x03a0 (0928) H 0405 FreqTableDispclk : 1284
0x03a2 (0930) H 0405 FreqTableDispclk : 1284
0x03a4 (0932) H 0405 FreqTableDispclk : 1284
0x03a6 (0934) H 2c01 FreqTablePixclk : 300
0x03a8 (0936) H 0405 FreqTablePixclk : 1284
0x03aa (0938) H a404 FreqTablePixclk : 1188
0x03ac (0940) H a404 FreqTablePixclk : 1188
0x03ae (0942) H a404 FreqTablePixclk : 1188
0x03b0 (0944) H a404 FreqTablePixclk : 1188
0x03b2 (0946) H a404 FreqTablePixclk : 1188
0x03b4 (0948) H a404 FreqTablePixclk : 1188
0x03b6 (0950) H 2c01 FreqTablePhyclk : 300
0x03b8 (0952) H 2a03 FreqTablePhyclk : 810
0x03ba (0954) H 2a03 FreqTablePhyclk : 810
0x03bc (0956) H 2a03 FreqTablePhyclk : 810
0x03be (0958) H 2a03 FreqTablePhyclk : 810
0x03c0 (0960) H 2a03 FreqTablePhyclk : 810
0x03c2 (0962) H 2a03 FreqTablePhyclk : 810
0x03c4 (0964) H 2a03 FreqTablePhyclk : 810
0x03c6 (0966) I d001d001 Paddingclks : 30409168
0x03ca (0970) I d001d001 Paddingclks : 30409168
0x03ce (0974) I d001d001 Paddingclks : 30409168
0x03d2 (0978) I d001d001 Paddingclks : 30409168
0x03d6 (0982) I d001d001 Paddingclks : 30409168
0x03da (0986) I d001d001 Paddingclks : 30409168
0x03de (0990) I d001d001 Paddingclks : 30409168
0x03e2 (0994) I d001d001 Paddingclks : 30409168
0x03e6 (0998) I d001d001 Paddingclks : 30409168
0x03ea (1002) I d001d001 Paddingclks : 30409168
0x03ee (1006) I d001d001 Paddingclks : 30409168
0x03f2 (1010) I d001d001 Paddingclks : 30409168
0x03f6 (1014) I d001d001 Paddingclks : 30409168
0x03fa (1018) I d001d001 Paddingclks : 30409168
0x03fe (1022) I d001d001 Paddingclks : 30409168
0x0402 (1026) I d001d001 Paddingclks : 30409168
0x0406 (1030) H 3408 DcModeMaxFreq : 2100
0x0408 (1032) H f304 DcModeMaxFreq : 1267
0x040a (1034) H 6b03 DcModeMaxFreq : 875
0x040c (1036) H 3e04 DcModeMaxFreq : 1086
0x040e (1038) H f304 DcModeMaxFreq : 1267
0x0410 (1040) H f304 DcModeMaxFreq : 1267
0x0412 (1042) H 0405 DcModeMaxFreq : 1284
0x0414 (1044) H 0405 DcModeMaxFreq : 1284
0x0416 (1046) H 2a03 DcModeMaxFreq : 810
0x0418 (1048) H d001 Padding8_Clks : 464
0x041a (1050) B 00 FreqTableUclkDiv : 0
0x041b (1051) B 03 FreqTableUclkDiv : 3
0x041c (1052) B 03 FreqTableUclkDiv : 3
0x041d (1053) B 03 FreqTableUclkDiv : 3
0x041e (1054) H 3001 Mp0clkFreq : 304
0x0420 (1056) H fb01 Mp0clkFreq : 507
0x0422 (1058) H b80b Mp0DpmVoltage : 3000
0x0424 (1060) H b80b Mp0DpmVoltage : 3000
0x0426 (1062) H 8c0a MemVddciVoltage : 2700
0x0428 (1064) H 480d MemVddciVoltage : 3400
0x042a (1066) H 480d MemVddciVoltage : 3400
0x042c (1068) H 480d MemVddciVoltage : 3400
0x042e (1070) H 8813 MemMvddVoltage : 5000
0x0430 (1072) H 1815 MemMvddVoltage : 5400
0x0432 (1074) H 1815 MemMvddVoltage : 5400
0x0434 (1076) H 1815 MemMvddVoltage : 5400
0x0436 (1078) H 2003 GfxclkFgfxoffEntry : 800
0x0438 (1080) H 2003 GfxclkFinit : 800
0x043a (1082) H 2003 GfxclkFidle : 800
0x043c (1084) H 0000 GfxclkSlewRate : 0
0x043e (1086) H 0000 GfxclkFopt : 0
0x0440 (1088) B d0 Padding567 : 208
0x0441 (1089) B 01 Padding567 : 1
0x0442 (1090) H 0000 GfxclkDsMaxFreq : 0
0x0444 (1092) B 01 GfxclkSource : 1
0x0445 (1093) B 02 Padding456 : 2
0x0446 (1094) B 00 LowestUclkReservedForUlv : 0
0x0447 (1095) B 00 Uclk : 0
0x0448 (1096) B 5b Uclk : 91
0x0449 (1097) B 00 Uclk : 0
0x044a (1098) B 00 MemoryType : 0
0x044b (1099) B 10 MemoryChannels : 16
0x044c (1100) B 00 PaddingMem : 0
0x044d (1101) B 00 PaddingMem : 0
0x044e (1102) B 00 PcieGenSpeed : 0
0x044f (1103) B 03 PcieGenSpeed : 3
0x0450 (1104) B 06 PcieLaneCount : 6
0x0451 (1105) B 06 PcieLaneCount : 6
0x0452 (1106) H 6b02 LclkFreq : 619
0x0454 (1108) H 6b02 LclkFreq : 619
0x0456 (1110) H 0000 EnableTdpm : 0
0x0458 (1112) H 0000 TdpmHighHystTemperature : 0
0x045a (1114) H 0000 TdpmLowHystTemperature : 0
0x045c (1116) H 0000 GfxclkFreqHighTempLimit : 0
0x045e (1118) H 0000 FanStopTemp : 0
0x0460 (1120) H 0000 FanStartTemp : 0
0x0462 (1122) H 9001 FanGainEdge : 400
0x0464 (1124) H 9001 FanGainHotspot : 400
0x0466 (1126) H 9001 FanGainLiquid0 : 400
0x0468 (1128) H 9001 FanGainLiquid1 : 400
0x046a (1130) H 9001 FanGainVrGfx : 400
0x046c (1132) H 9001 FanGainVrSoc : 400
0x046e (1134) H 9001 FanGainVrMem0 : 400
0x0470 (1136) H 9001 FanGainVrMem1 : 400
0x0472 (1138) H 9001 FanGainPlx : 400
0x0474 (1140) H 9001 FanGainMem : 400
0x0476 (1142) H 1400 FanPwmMin : 20
0x0478 (1144) H 3408 FanAcousticLimitRpm : 2100
0x047a (1146) H 3408 FanThrottlingRpm : 2100
0x047c (1148) H 5613 FanMaximumRpm : 4950
0x047e (1150) H 5a00 FanTargetTemperature : 90
0x0480 (1152) H 2003 FanTargetGfxclk : 800
0x0482 (1154) B 01 FanTempInputSelect : 1
0x0483 (1155) B 00 FanPadding : 0
0x0484 (1156) B 00 FanZeroRpmEnable : 0
0x0485 (1157) B 02 FanTachEdgePerRev : 2
0x0486 (1158) h 0000 FuzzyFan_ErrorSetDelta : 0
0x0488 (1160) h 0000 FuzzyFan_ErrorRateSetDelta : 0
0x048a (1162) h 0000 FuzzyFan_PwmSetDelta : 0
0x048c (1164) H 0000 FuzzyFan_Reserved : 0
0x048e (1166) B 00 OverrideAvfsGb : 0
0x048f (1167) B 00 OverrideAvfsGb : 0
0x0490 (1168) B 00 Padding8_Avfs : 0
0x0491 (1169) B 00 Padding8_Avfs : 0
0x0492 (1170) f 47e6913c a : 0.01781
0x0496 (1174) f aca841bd b :-0.04728
0x049a (1178) f 13445d3d c : 0.05402
0x049e (1182) f 00000000 a : 0
0x04a2 (1186) f 00000000 b : 0
0x04a6 (1190) f 8fc2f53c c : 0.03
0x04aa (1194) f 00000000 a : 0
0x04ae (1198) f 00000000 b : 0
0x04b2 (1202) f 00000000 c : 0
0x04b6 (1206) f 4bc8c73d a : 0.09755
0x04ba (1210) f 9834463d b : 0.04839
0x04be (1214) f 7042a1bd c :-0.07874
0x04c2 (1218) f af5a193b a : 0.00234
0x04c6 (1222) f 8ca11cbb b :-0.00239
0x04ca (1226) f f836bd3d c : 0.09239
0x04ce (1230) f 00000000 m : 0
0x04d2 (1234) f 00000000 b : 0
0x04d6 (1238) f 00000000 m : 0
0x04da (1242) f 00000000 b : 0
0x04de (1246) f 00000000 a : 0
0x04e2 (1250) f 00000000 b : 0
0x04e6 (1254) f 00000000 c : 0
0x04ea (1258) f 00000000 a : 0
0x04ee (1262) f 00000000 b : 0
0x04f2 (1266) f 00000000 c : 0
0x04f6 (1270) H a000 DcTol : 160
0x04f8 (1272) H a000 DcTol : 160
0x04fa (1274) B 01 DcBtcEnabled : 1
0x04fb (1275) B 01 DcBtcEnabled : 1
0x04fc (1276) B 00 Padding8_GfxBtc : 0
0x04fd (1277) B 00 Padding8_GfxBtc : 0
0x04fe (1278) H 0000 DcBtcMin : 0
0x0500 (1280) H 0000 DcBtcMin : 0
0x0502 (1282) H a000 DcBtcMax : 160
0x0504 (1284) H a000 DcBtcMax : 160
0x0506 (1286) I 00020000 DebugOverrides : 512
0x050a (1290) f 00000000 a : 0
0x050e (1294) f 00000000 b : 0
0x0512 (1298) f 00000000 c : 0
0x0516 (1302) f 00000000 a : 0
0x051a (1306) f 00000000 b : 0
0x051e (1310) f 00000000 c : 0
0x0522 (1314) f 00000000 a : 0
0x0526 (1318) f 00000000 b : 0
0x052a (1322) f 00000000 c : 0
0x052e (1326) f 00000000 a : 0
0x0532 (1330) f 00000000 b : 0
0x0536 (1334) f 00000000 c : 0
0x053a (1338) B 01 TotalPowerConfig : 1
0x053b (1339) B 00 TotalPowerSpare1 : 0
0x053c (1340) H 0000 TotalPowerSpare2 : 0
0x053e (1342) H 0000 PccThresholdLow : 0
0x0540 (1344) H 0000 PccThresholdHigh : 0
0x0542 (1346) I 00000000 MGpuFanBoostLimitRpm : 0
0x0546 (1350) I 00000000 PaddingAPCC : 0
0x054a (1354) I 00000000 PaddingAPCC : 0
0x054e (1358) I 00000000 PaddingAPCC : 0
0x0552 (1362) I 00000000 PaddingAPCC : 0
0x0556 (1366) I 00000000 PaddingAPCC : 0
0x055a (1370) H 0000 VDDGFX_TVmin : 0
0x055c (1372) H 0000 VDDSOC_TVmin : 0
0x055e (1374) H 0000 VDDGFX_Vmin_HiTemp : 0
0x0560 (1376) H 0000 VDDGFX_Vmin_LoTemp : 0
0x0562 (1378) H 0000 VDDSOC_Vmin_HiTemp : 0
0x0564 (1380) H 0000 VDDSOC_Vmin_LoTemp : 0
0x0566 (1382) H 0000 VDDGFX_TVminHystersis : 0
0x0568 (1384) H 0000 VDDSOC_TVminHystersis : 0
0x056a (1386) I 00000000 BtcConfig : 0
0x056e (1390) H a901 SsFmin : 425
0x0570 (1392) H 8700 SsFmin : 135
0x0572 (1394) H 8700 SsFmin : 135
0x0574 (1396) H 0000 SsFmin : 0
0x0576 (1398) H 0000 SsFmin : 0
0x0578 (1400) H 0000 SsFmin : 0
0x057a (1402) H 0000 SsFmin : 0
0x057c (1404) H 0000 SsFmin : 0
0x057e (1406) H 0000 SsFmin : 0
0x0580 (1408) H 0000 SsFmin : 0
0x0582 (1410) H 1900 DcBtcGb : 25
0x0584 (1412) H 1900 DcBtcGb : 25
0x0586 (1414) I 00000000 Reserved : 0
0x058a (1418) I 00000000 Reserved : 0
0x058e (1422) I 00000000 Reserved : 0
0x0592 (1426) I 00000000 Reserved : 0
0x0596 (1430) I 00000000 Reserved : 0
0x059a (1434) I 00000000 Reserved : 0
0x059e (1438) I 00000000 Reserved : 0
0x05a2 (1442) I 00000000 Reserved : 0
0x05a6 (1446) B 00 Enabled : 0
0x05a7 (1447) B 00 Speed : 0
0x05a8 (1448) B 00 Padding : 0
0x05a9 (1449) B 00 Padding : 0
0x05aa (1450) I 00000000 SlaveAddress : 0
0x05ae (1454) B 00 ControllerPort : 0
0x05af (1455) B 00 ControllerName : 0
0x05b0 (1456) B 00 ThermalThrotter : 0
0x05b1 (1457) B 00 I2cProtocol : 0
0x05b2 (1458) B 00 Enabled : 0
0x05b3 (1459) B 00 Speed : 0
0x05b4 (1460) B 00 Padding : 0
0x05b5 (1461) B 00 Padding : 0
0x05b6 (1462) I 00000000 SlaveAddress : 0
0x05ba (1466) B 00 ControllerPort : 0
0x05bb (1467) B 00 ControllerName : 0
0x05bc (1468) B 00 ThermalThrotter : 0
0x05bd (1469) B 00 I2cProtocol : 0
0x05be (1470) B 00 Enabled : 0
0x05bf (1471) B 00 Speed : 0
0x05c0 (1472) B 00 Padding : 0
0x05c1 (1473) B 00 Padding : 0
0x05c2 (1474) I 00000000 SlaveAddress : 0
0x05c6 (1478) B 00 ControllerPort : 0
0x05c7 (1479) B 00 ControllerName : 0
0x05c8 (1480) B 00 ThermalThrotter : 0
0x05c9 (1481) B 00 I2cProtocol : 0
0x05ca (1482) B 00 Enabled : 0
0x05cb (1483) B 00 Speed : 0
0x05cc (1484) B 00 Padding : 0
0x05cd (1485) B 00 Padding : 0
0x05ce (1486) I 00000000 SlaveAddress : 0
0x05d2 (1490) B 00 ControllerPort : 0
0x05d3 (1491) B 00 ControllerName : 0
0x05d4 (1492) B 00 ThermalThrotter : 0
0x05d5 (1493) B 00 I2cProtocol : 0
0x05d6 (1494) B 00 Enabled : 0
0x05d7 (1495) B 00 Speed : 0
0x05d8 (1496) B 00 Padding : 0
0x05d9 (1497) B 00 Padding : 0
0x05da (1498) I 00000000 SlaveAddress : 0
0x05de (1502) B 00 ControllerPort : 0
0x05df (1503) B 00 ControllerName : 0
0x05e0 (1504) B 00 ThermalThrotter : 0
0x05e1 (1505) B 00 I2cProtocol : 0
0x05e2 (1506) B 00 Enabled : 0
0x05e3 (1507) B 00 Speed : 0
0x05e4 (1508) B 00 Padding : 0
0x05e5 (1509) B 00 Padding : 0
0x05e6 (1510) I 00000000 SlaveAddress : 0
0x05ea (1514) B 00 ControllerPort : 0
0x05eb (1515) B 00 ControllerName : 0
0x05ec (1516) B 00 ThermalThrotter : 0
0x05ed (1517) B 00 I2cProtocol : 0
0x05ee (1518) B 00 Enabled : 0
0x05ef (1519) B 00 Speed : 0
0x05f0 (1520) B 00 Padding : 0
0x05f1 (1521) B 00 Padding : 0
0x05f2 (1522) I 00000000 SlaveAddress : 0
0x05f6 (1526) B 00 ControllerPort : 0
0x05f7 (1527) B 00 ControllerName : 0
0x05f8 (1528) B 00 ThermalThrotter : 0
0x05f9 (1529) B 00 I2cProtocol : 0
0x05fa (1530) B 00 Enabled : 0
0x05fb (1531) B 00 Speed : 0
0x05fc (1532) B 00 Padding : 0
0x05fd (1533) B 00 Padding : 0
0x05fe (1534) I 00000000 SlaveAddress : 0
0x0602 (1538) B 00 ControllerPort : 0
0x0603 (1539) B 00 ControllerName : 0
0x0604 (1540) B 00 ThermalThrotter : 0
0x0605 (1541) B 00 I2cProtocol : 0
0x0606 (1542) H 0000 MaxVoltageStepGfx : 0
0x0608 (1544) H 0000 MaxVoltageStepSoc : 0
0x060a (1546) B 00 VddGfxVrMapping : 0
0x060b (1547) B 00 VddSocVrMapping : 0
0x060c (1548) B 00 VddMem0VrMapping : 0
0x060d (1549) B 00 VddMem1VrMapping : 0
0x060e (1550) B 00 GfxUlvPhaseSheddingMask : 0
0x060f (1551) B 00 SocUlvPhaseSheddingMask : 0
0x0610 (1552) B 00 ExternalSensorPresent : 0
0x0611 (1553) B 00 Padding8_V : 0
0x0612 (1554) H 0000 GfxMaxCurrent : 0
0x0614 (1556) b 00 GfxOffset : 0
0x0615 (1557) B 00 Padding_TelemetryGfx : 0
0x0616 (1558) H 0000 SocMaxCurrent : 0
0x0618 (1560) b 00 SocOffset : 0
0x0619 (1561) B 00 Padding_TelemetrySoc : 0
0x061a (1562) H 0000 Mem0MaxCurrent : 0
0x061c (1564) b 00 Mem0Offset : 0
0x061d (1565) B 00 Padding_TelemetryMem0 : 0
0x061e (1566) H 0000 Mem1MaxCurrent : 0
0x0620 (1568) b 00 Mem1Offset : 0
0x0621 (1569) B 00 Padding_TelemetryMem1 : 0
0x0622 (1570) B 00 AcDcGpio : 0
0x0623 (1571) B 00 AcDcPolarity : 0
0x0624 (1572) B 00 VR0HotGpio : 0
0x0625 (1573) B 00 VR0HotPolarity : 0
0x0626 (1574) B 00 VR1HotGpio : 0
0x0627 (1575) B 00 VR1HotPolarity : 0
0x0628 (1576) B 00 GthrGpio : 0
0x0629 (1577) B 00 GthrPolarity : 0
0x062a (1578) B 00 LedPin0 : 0
0x062b (1579) B 00 LedPin1 : 0
0x062c (1580) B 00 LedPin2 : 0
0x062d (1581) B 00 padding8_4 : 0
0x062e (1582) B 00 PllGfxclkSpreadEnabled : 0
0x062f (1583) B 00 PllGfxclkSpreadPercent : 0
0x0630 (1584) H 0000 PllGfxclkSpreadFreq : 0
0x0632 (1586) B 00 DfllGfxclkSpreadEnabled : 0
0x0633 (1587) B 00 DfllGfxclkSpreadPercent : 0
0x0634 (1588) H 0000 DfllGfxclkSpreadFreq : 0
0x0636 (1590) B 00 UclkSpreadEnabled : 0
0x0637 (1591) B 00 UclkSpreadPercent : 0
0x0638 (1592) H 0000 UclkSpreadFreq : 0
0x063a (1594) B 00 SoclkSpreadEnabled : 0
0x063b (1595) B 00 SocclkSpreadPercent : 0
0x063c (1596) H 0000 SocclkSpreadFreq : 0
0x063e (1598) H 0000 TotalBoardPower : 0
0x0640 (1600) H 0000 BoardPadding : 0
0x0642 (1602) I 00000000 MvddRatio : 0
0x0646 (1606) B 00 RenesesLoadLineEnabled : 0
0x0647 (1607) B 00 GfxLoadlineResistance : 0
0x0648 (1608) B 00 SocLoadlineResistance : 0
0x0649 (1609) B 00 Padding8_Loadline : 0
0x064a (1610) I 00000000 BoardReserved : 0
0x064e (1614) I 00000000 BoardReserved : 0
0x0652 (1618) I 00000000 BoardReserved : 0
0x0656 (1622) I 00000000 BoardReserved : 0
0x065a (1626) I 00000000 BoardReserved : 0
0x065e (1630) I 00000000 BoardReserved : 0
0x0662 (1634) I 00000000 BoardReserved : 0
0x0666 (1638) I 00000000 BoardReserved : 0
0x066a (1642) I 00000000 MmHubPadding : 0
0x066e (1646) I 00000000 MmHubPadding : 0
0x0672 (1650) I 00000000 MmHubPadding : 0
0x0676 (1654) I 00000000 MmHubPadding : 0
0x067a (1658) I 00000000 MmHubPadding : 0
0x067e (1662) I 00000000 MmHubPadding : 0
0x0682 (1666) I 00000000 MmHubPadding : 0
0x0686 (1670) I 00000000 MmHubPadding : 0
================================================
FILE: test/AMD.RX6900XT.16384.201104.rom.dump
================================================
header:
structuresize: 2470
format_revision: 15
content_revision: 0
table_revision: 2
table_size: 802
golden_pp_id: 2479
golden_revision: 16503
format_id: 128
platform_caps: 24
thermal_controller_type: 28
small_power_limit1: 0
small_power_limit2: 0
boost_power_limit: 0
software_shutdown_temp: 118
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
reserve 3: 0
reserve 4: 0
reserve 5: 0
reserve 6: 1
reserve 7: 0
power_saving_clock:
revision: 1
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
count: 13
max:
max 0: 2660 (GFXCLK)
max 1: 1200 (SOCCLK)
max 2: 1000 (UCLK)
max 3: 1940 (FCLK)
max 4: 1266 (DCLK_0)
max 5: 1477 (VCLK_0)
max 6: 1266 (DCLK_1)
max 7: 1477 (VCLK_1)
max 8: 1200 (DCEFCLK)
max 9: 1217 (DISPCLK)
max 10: 1217 (PIXCLK)
max 11: 810 (PHYCLK)
max 12: 1217 (DTBCLK)
max 13: 0
max 14: 0
max 15: 0
min:
min 0: 500 (GFXCLK)
min 1: 480 (SOCCLK)
min 2: 97 (UCLK)
min 3: 550 (FCLK)
min 4: 317 (DCLK_0)
min 5: 363 (VCLK_0)
min 6: 317 (DCLK_1)
min 7: 363 (VCLK_1)
min 8: 418 (DCEFCLK)
min 9: 487 (DISPCLK)
min 10: 487 (PIXCLK)
min 11: 300 (PHYCLK)
min 12: 487 (DTBCLK)
min 13: 0
min 14: 0
min 15: 0
overdrive_table:
revision: 129
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
feature_count: 16
setting_count: 30
cap:
cap 0: 1 (GFXCLK_LIMITS)
cap 1: 1 (GFXCLK_CURVE)
cap 2: 1 (UCLK_LIMITS)
cap 3: 1 (POWER_LIMIT)
cap 4: 1 (FAN_ACOUSTIC_LIMIT)
cap 5: 1 (FAN_SPEED_MIN)
cap 6: 1 (TEMPERATURE_FAN)
cap 7: 1 (TEMPERATURE_SYSTEM)
cap 8: 1 (MEMORY_TIMING_TUNE)
cap 9: 1 (FAN_ZERO_RPM_CONTROL)
cap 10: 1 (AUTO_UV_ENGINE)
cap 11: 1 (AUTO_OC_ENGINE)
cap 12: 1 (AUTO_OC_MEMORY)
cap 13: 1 (FAN_CURVE)
cap 14: 0 (SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT)
cap 15: 1 (POWER_MODE)
cap 16: 0
cap 17: 0
cap 18: 0
cap 19: 0
cap 20: 0
cap 21: 0
cap 22: 0
cap 23: 0
cap 24: 0
cap 25: 0
cap 26: 0
cap 27: 0
cap 28: 0
cap 29: 0
cap 30: 0
cap 31: 0
max:
max 0: 3000 (GFXCLKFMAX)
max 1: 3000 (GFXCLKFMIN)
max 2: 0 (CUSTOM_GFX_VF_CURVE_A)
max 3: 0 (CUSTOM_GFX_VF_CURVE_B)
max 4: 0 (CUSTOM_GFX_VF_CURVE_C)
max 5: 3000 (CUSTOM_CURVE_VFT_FMIN)
max 6: 1075 (UCLKFMIN)
max 7: 1075 (UCLKFMAX)
max 8: 15 (POWERPERCENTAGE)
max 9: 3300 (FANRPMMIN)
max 10: 3300 (FANRPMACOUSTICLIMIT)
max 11: 100 (FANTARGETTEMPERATURE)
max 12: 110 (OPERATINGTEMPMAX)
max 13: 1 (ACTIMING)
max 14: 1 (FAN_ZERO_RPM_CONTROL)
max 15: 1 (AUTOUVENGINE)
max 16: 1 (AUTOOCENGINE)
max 17: 1 (AUTOOCMEMORY)
max 18: 100 (FAN_CURVE_TEMPERATURE_1)
max 19: 100 (FAN_CURVE_SPEED_1)
max 20: 100 (FAN_CURVE_TEMPERATURE_2)
max 21: 100 (FAN_CURVE_SPEED_2)
max 22: 100 (FAN_CURVE_TEMPERATURE_3)
max 23: 100 (FAN_CURVE_SPEED_3)
max 24: 100 (FAN_CURVE_TEMPERATURE_4)
max 25: 100 (FAN_CURVE_SPEED_4)
max 26: 100 (FAN_CURVE_TEMPERATURE_5)
max 27: 100 (FAN_CURVE_SPEED_5)
max 28: 0 (AUTO_FAN_ACOUSTIC_LIMIT)
max 29: 1 (POWER_MODE)
max 30: 0
max 31: 0
max 32: 0
max 33: 0
max 34: 0
max 35: 0
max 36: 0
max 37: 0
max 38: 0
max 39: 0
max 40: 0
max 41: 0
max 42: 0
max 43: 0
max 44: 0
max 45: 0
max 46: 0
max 47: 0
max 48: 0
max 49: 0
max 50: 0
max 51: 0
max 52: 0
max 53: 0
max 54: 0
max 55: 0
max 56: 0
max 57: 0
max 58: 0
max 59: 0
max 60: 0
max 61: 0
max 62: 0
max 63: 0
min:
min 0: 500 (GFXCLKFMAX)
min 1: 500 (GFXCLKFMIN)
min 2: 0 (CUSTOM_GFX_VF_CURVE_A)
min 3: 0 (CUSTOM_GFX_VF_CURVE_B)
min 4: 0 (CUSTOM_GFX_VF_CURVE_C)
min 5: 500 (CUSTOM_CURVE_VFT_FMIN)
min 6: 674 (UCLKFMIN)
min 7: 674 (UCLKFMAX)
min 8: 10 (POWERPERCENTAGE)
min 9: 250 (FANRPMMIN)
min 10: 1000 (FANRPMACOUSTICLIMIT)
min 11: 25 (FANTARGETTEMPERATURE)
min 12: 50 (OPERATINGTEMPMAX)
min 13: 0 (ACTIMING)
min 14: 0 (FAN_ZERO_RPM_CONTROL)
min 15: 0 (AUTOUVENGINE)
min 16: 0 (AUTOOCENGINE)
min 17: 0 (AUTOOCMEMORY)
min 18: 25 (FAN_CURVE_TEMPERATURE_1)
min 19: 10 (FAN_CURVE_SPEED_1)
min 20: 25 (FAN_CURVE_TEMPERATURE_2)
min 21: 10 (FAN_CURVE_SPEED_2)
min 22: 25 (FAN_CURVE_TEMPERATURE_3)
min 23: 10 (FAN_CURVE_SPEED_3)
min 24: 25 (FAN_CURVE_TEMPERATURE_4)
min 25: 10 (FAN_CURVE_SPEED_4)
min 26: 25 (FAN_CURVE_TEMPERATURE_5)
min 27: 10 (FAN_CURVE_SPEED_5)
min 28: 0 (AUTO_FAN_ACOUSTIC_LIMIT)
min 29: 0 (POWER_MODE)
min 30: 0
min 31: 0
min 32: 0
min 33: 0
min 34: 0
min 35: 0
min 36: 0
min 37: 0
min 38: 0
min 39: 0
min 40: 0
min 41: 0
min 42: 0
min 43: 0
min 44: 0
min 45: 0
min 46: 0
min 47: 0
min 48: 0
min 49: 0
min 50: 0
min 51: 0
min 52: 0
min 53: 0
min 54: 0
min 55: 0
min 56: 0
min 57: 0
min 58: 0
min 59: 0
min 60: 0
min 61: 0
min 62: 0
min 63: 0
pm_setting:
pm_setting 0: 6
pm_setting 1: 0
pm_setting 2: 6
pm_setting 3: 6
pm_setting 4: 95
pm_setting 5: 95
pm_setting 6: 95
pm_setting 7: 95
pm_setting 8: 1650
pm_setting 9: 1650
pm_setting 10: 1750
pm_setting 11: 1750
pm_setting 12: 2000
pm_setting 13: 2000
pm_setting 14: 2250
pm_setting 15: 2250
pm_setting 16: 0
pm_setting 17: 0
pm_setting 18: 0
pm_setting 19: 0
pm_setting 20: 0
pm_setting 21: 0
pm_setting 22: 0
pm_setting 23: 0
pm_setting 24: 0
pm_setting 25: 0
pm_setting 26: 0
pm_setting 27: 0
pm_setting 28: 0
pm_setting 29: 0
pm_setting 30: 0
pm_setting 31: 0
smc_pptable:
Version: 6
FeaturesToRun:
FeaturesToRun 0: 2743074303
FeaturesToRun 1: 14179
SocketPowerLimitAc:
SocketPowerLimitAc 0: 255
SocketPowerLimitAc 1: 0
SocketPowerLimitAc 2: 0
SocketPowerLimitAc 3: 0
SocketPowerLimitAcTau:
SocketPowerLimitAcTau 0: 0
SocketPowerLimitAcTau 1: 0
SocketPowerLimitAcTau 2: 0
SocketPowerLimitAcTau 3: 0
SocketPowerLimitDc:
SocketPowerLimitDc 0: 255
SocketPowerLimitDc 1: 0
SocketPowerLimitDc 2: 0
SocketPowerLimitDc 3: 0
SocketPowerLimitDcTau:
SocketPowerLimitDcTau 0: 0
SocketPowerLimitDcTau 1: 0
SocketPowerLimitDcTau 2: 0
SocketPowerLimitDcTau 3: 0
TdcLimit:
TdcLimit 0: 320
TdcLimit 1: 55
TdcLimitTau:
TdcLimitTau 0: 0
TdcLimitTau 1: 0
TemperatureLimit:
TemperatureLimit 0: 100
TemperatureLimit 1: 110
TemperatureLimit 2: 100
TemperatureLimit 3: 115
TemperatureLimit 4: 115
TemperatureLimit 5: 115
TemperatureLimit 6: 115
TemperatureLimit 7: 0
TemperatureLimit 8: 0
TemperatureLimit 9: 0
FitLimit: 0
TotalPowerConfig: 1
TotalPowerPadding:
TotalPowerPadding 0: 0
TotalPowerPadding 1: 0
TotalPowerPadding 2: 0
ApccPlusResidencyLimit: 10
SmnclkDpmFreq:
SmnclkDpmFreq 0: 0
SmnclkDpmFreq 1: 0
SmnclkDpmVoltage:
SmnclkDpmVoltage 0: 0
SmnclkDpmVoltage 1: 0
PaddingAPCC: 0
PerPartDroopVsetGfxDfll:
PerPartDroopVsetGfxDfll 0: 0
PerPartDroopVsetGfxDfll 1: 0
PerPartDroopVsetGfxDfll 2: 0
PerPartDroopVsetGfxDfll 3: 0
PerPartDroopVsetGfxDfll 4: 0
PaddingPerPartDroop: 0
ThrottlerControlMask: 14590
FwDStateMask: 3955
UlvVoltageOffsetSoc: 100
UlvVoltageOffsetGfx: 100
MinVoltageUlvGfx: 3100
MinVoltageUlvSoc: 3200
SocLIVmin: 0
PaddingLIVmin: 0
GceaLinkMgrIdleThreshold: 0
paddingRlcUlvParams:
paddingRlcUlvParams 0: 0
paddingRlcUlvParams 1: 0
paddingRlcUlvParams 2: 0
MinVoltageGfx: 3300
MinVoltageSoc: 3300
MaxVoltageGfx: 4700
MaxVoltageSoc: 4600
LoadLineResistanceGfx: 64
LoadLineResistanceSoc: 256
VDDGFX_TVmin: 50
VDDSOC_TVmin: 60
VDDGFX_Vmin_HiTemp: 3200
VDDGFX_Vmin_LoTemp: 3200
VDDSOC_Vmin_HiTemp: 3200
VDDSOC_Vmin_LoTemp: 3200
VDDGFX_TVminHystersis: 20
VDDSOC_TVminHystersis: 20
DpmDescriptor:
DpmDescriptor 0:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1
b: 0
SsCurve:
a: 0.3598
b:-0.90277
c: 1.30665
SsFmin: 1163
Padding16: 0
DpmDescriptor 1:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1.121
b: 0.259
SsCurve:
a: 0.30118
b:-0.13445
c: 0.71117
SsFmin: 241
Padding16: 0
DpmDescriptor 2:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 4
Padding: 0
ConversionToAvfsClk:
m: 1.35
b:-0.076
SsCurve:
a: 0.4463
b:-0.39971
c: 0.78566
SsFmin: 448
Padding16: 0
DpmDescriptor 3:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1
b: 0
SsCurve:
a: 0.24489
b:-0.25886
c: 0.76457
SsFmin: 529
Padding16: 0
DpmDescriptor 4:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1.3714
b:-0.035
SsCurve:
a: 0.46056
b:-0.37851
c: 0.77393
SsFmin: 411
Padding16: 0
DpmDescriptor 5:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1.0771
b: 0.13
SsCurve:
a: 0.2841
b:-0.21024
c: 0.73506
SsFmin: 371
Padding16: 0
DpmDescriptor 6:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1.3714
b:-0.035
SsCurve:
a: 0.46056
b:-0.37851
c: 0.77393
SsFmin: 411
Padding16: 0
DpmDescriptor 7:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1.0771
b: 0.13
SsCurve:
a: 0.2841
b:-0.21024
c: 0.73506
SsFmin: 371
Padding16: 0
DpmDescriptor 8:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 1.166
b: 0.131
SsCurve:
a: 0.33294
b:-0.22702
c: 0.73486
SsFmin: 341
Padding16: 0
DpmDescriptor 9:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0.956
b: 0.22
SsCurve:
a: 0.22381
b:-0.14446
c: 0.71948
SsFmin: 323
Padding16: 0
DpmDescriptor 10:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0.956
b: 0.22
SsCurve:
a: 0.22381
b:-0.14446
c: 0.71948
SsFmin: 323
Padding16: 0
DpmDescriptor 11:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0.571
b: 0.425
SsCurve:
a: 0.07984
b:-0.02895
c: 0.69879
SsFmin: 182
Padding16: 0
DpmDescriptor 12:
VoltageMode: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
Padding: 0
ConversionToAvfsClk:
m: 0.956
b: 0.22
SsCurve:
a: 0.22381
b:-0.14446
c: 0.71948
SsFmin: 323
Padding16: 0
FreqTableGfx:
FreqTableGfx 0: 500
FreqTableGfx 1: 2660
FreqTableGfx 2: 0
FreqTableGfx 3: 0
FreqTableGfx 4: 0
FreqTableGfx 5: 0
FreqTableGfx 6: 0
FreqTableGfx 7: 0
FreqTableGfx 8: 0
FreqTableGfx 9: 0
FreqTableGfx 10: 0
FreqTableGfx 11: 0
FreqTableGfx 12: 0
FreqTableGfx 13: 0
FreqTableGfx 14: 0
FreqTableGfx 15: 0
FreqTableVclk:
FreqTableVclk 0: 363
FreqTableVclk 1: 1477
FreqTableVclk 2: 0
FreqTableVclk 3: 0
FreqTableVclk 4: 0
FreqTableVclk 5: 0
FreqTableVclk 6: 0
FreqTableVclk 7: 0
FreqTableDclk:
FreqTableDclk 0: 317
FreqTableDclk 1: 1266
FreqTableDclk 2: 0
FreqTableDclk 3: 0
FreqTableDclk 4: 0
FreqTableDclk 5: 0
FreqTableDclk 6: 0
FreqTableDclk 7: 0
FreqTableSocclk:
FreqTableSocclk 0: 480
FreqTableSocclk 1: 1200
FreqTableSocclk 2: 0
FreqTableSocclk 3: 0
FreqTableSocclk 4: 0
FreqTableSocclk 5: 0
FreqTableSocclk 6: 0
FreqTableSocclk 7: 0
FreqTableUclk:
FreqTableUclk 0: 97
FreqTableUclk 1: 457
FreqTableUclk 2: 674
FreqTableUclk 3: 1000
FreqTableDcefclk:
FreqTableDcefclk 0: 418
FreqTableDcefclk 1: 1200
FreqTableDcefclk 2: 0
FreqTableDcefclk 3: 0
FreqTableDcefclk 4: 0
FreqTableDcefclk 5: 0
FreqTableDcefclk 6: 0
FreqTableDcefclk 7: 0
FreqTableDispclk:
FreqTableDispclk 0: 487
FreqTableDispclk 1: 1217
FreqTableDispclk 2: 0
FreqTableDispclk 3: 0
FreqTableDispclk 4: 0
FreqTableDispclk 5: 0
FreqTableDispclk 6: 0
FreqTableDispclk 7: 0
FreqTablePixclk:
FreqTablePixclk 0: 487
FreqTablePixclk 1: 1217
FreqTablePixclk 2: 0
FreqTablePixclk 3: 0
FreqTablePixclk 4: 0
FreqTablePixclk 5: 0
FreqTablePixclk 6: 0
FreqTablePixclk 7: 0
FreqTablePhyclk:
FreqTablePhyclk 0: 300
FreqTablePhyclk 1: 810
FreqTablePhyclk 2: 0
FreqTablePhyclk 3: 0
FreqTablePhyclk 4: 0
FreqTablePhyclk 5: 0
FreqTablePhyclk 6: 0
FreqTablePhyclk 7: 0
FreqTableDtbclk:
FreqTableDtbclk 0: 487
FreqTableDtbclk 1: 1217
FreqTableDtbclk 2: 0
FreqTableDtbclk 3: 0
FreqTableDtbclk 4: 0
FreqTableDtbclk 5: 0
FreqTableDtbclk 6: 0
FreqTableDtbclk 7: 0
FreqTableFclk:
FreqTableFclk 0: 550
FreqTableFclk 1: 1940
FreqTableFclk 2: 0
FreqTableFclk 3: 0
FreqTableFclk 4: 0
FreqTableFclk 5: 0
FreqTableFclk 6: 0
FreqTableFclk 7: 0
Paddingclks: 0
PerPartDroopModelGfxDfll:
PerPartDroopModelGfxDfll 0:
a: 0
b: 0
c: 0
PerPartDroopModelGfxDfll 1:
a: 0
b: 0
c: 0
PerPartDroopModelGfxDfll 2:
a: 0
b: 0
c: 0
PerPartDroopModelGfxDfll 3:
a: 0
b: 0
c: 0
PerPartDroopModelGfxDfll 4:
a: 0
b: 0
c: 0
DcModeMaxFreq:
DcModeMaxFreq 0: 2660
DcModeMaxFreq 1: 1200
DcModeMaxFreq 2: 1000
DcModeMaxFreq 3: 1940
DcModeMaxFreq 4: 1266
DcModeMaxFreq 5: 1477
DcModeMaxFreq 6: 1266
DcModeMaxFreq 7: 1477
DcModeMaxFreq 8: 1200
DcModeMaxFreq 9: 1217
DcModeMaxFreq 10: 1217
DcModeMaxFreq 11: 810
DcModeMaxFreq 12: 1217
FreqTableUclkDiv:
FreqTableUclkDiv 0: 0
FreqTableUclkDiv 1: 2
FreqTableUclkDiv 2: 3
FreqTableUclkDiv 3: 3
FclkBoostFreq: 1400
FclkParamPadding: 0
Mp0clkFreq:
Mp0clkFreq 0: 332
Mp0clkFreq 1: 506
Mp0DpmVoltage:
Mp0DpmVoltage 0: 2800
Mp0DpmVoltage 1: 3200
MemVddciVoltage:
MemVddciVoltage 0: 2700
MemVddciVoltage 1: 3200
MemVddciVoltage 2: 3400
MemVddciVoltage 3: 3400
MemMvddVoltage:
MemMvddVoltage 0: 5000
MemMvddVoltage 1: 5400
MemMvddVoltage 2: 5400
MemMvddVoltage 3: 5400
GfxclkFgfxoffEntry: 500
GfxclkFinit: 800
GfxclkFidle: 500
GfxclkSource: 1
GfxclkPadding: 0
GfxGpoSubFeatureMask: 1
GfxGpoEnabledWorkPolicyMask: 2
GfxGpoDisabledWorkPolicyMask: 93
GfxGpoPadding:
GfxGpoPadding 0: 0
GfxGpoVotingAllow: 1
GfxGpoPadding32:
GfxGpoPadding32 0: 0
GfxGpoPadding32 1: 0
GfxGpoPadding32 2: 0
GfxGpoPadding32 3: 0
GfxDcsFopt: 0
GfxDcsFclkFopt: 0
GfxDcsUclkFopt: 0
DcsGfxOffVoltage: 0
DcsMinGfxOffTime: 0
DcsMaxGfxOffTime: 0
DcsMinCreditAccum: 0
DcsExitHysteresis: 0
DcsTimeout: 0
DcsParamPadding:
DcsParamPadding 0: 0
DcsParamPadding 1: 0
DcsParamPadding 2: 0
DcsParamPadding 3: 0
DcsParamPadding 4: 0
FlopsPerByteTable:
FlopsPerByteTable 0: 5674
FlopsPerByteTable 1: 5591
FlopsPerByteTable 2: 5508
FlopsPerByteTable 3: 5424
FlopsPerByteTable 4: 5341
FlopsPerByteTable 5: 5258
FlopsPerByteTable 6: 5174
FlopsPerByteTable 7: 5091
FlopsPerByteTable 8: 5008
FlopsPerByteTable 9: 4925
FlopsPerByteTable 10: 4841
FlopsPerByteTable 11: 4758
FlopsPerByteTable 12: 4529
FlopsPerByteTable 13: 4300
FlopsPerByteTable 14: 4071
FlopsPerByteTable 15: 3842
LowestUclkReservedForUlv: 0
PaddingMem:
PaddingMem 0: 0
PaddingMem 1: 0
PaddingMem 2: 0
UclkDpmPstates:
UclkDpmPstates 0: 3
UclkDpmPstates 1: 2
UclkDpmPstates 2: 1
UclkDpmPstates 3: 0
UclkDpmSrcFreqRange:
Fmin: 0
Fmax: 0
UclkDpmTargFreqRange:
Fmin: 0
Fmax: 0
UclkDpmMidstepFreq: 0
UclkMidstepPadding: 0
PcieGenSpeed:
PcieGenSpeed 0: 0
PcieGenSpeed 1: 3
PcieLaneCount:
PcieLaneCount 0: 1
PcieLaneCount 1: 6
LclkFreq:
LclkFreq 0: 310
LclkFreq 1: 619
FanStopTemp: 55
FanStartTemp: 70
FanGain:
FanGain 0: 400
FanGain 1: 400
FanGain 2: 400
FanGain 3: 400
FanGain 4: 400
FanGain 5: 400
FanGain 6: 400
FanGain 7: 400
FanGain 8: 400
FanGain 9: 400
FanPwmMin: 25
FanAcousticLimitRpm: 1650
FanThrottlingRpm: 2000
FanMaximumRpm: 3300
MGpuFanBoostLimitRpm: 0
FanTargetTemperature: 95
FanTargetGfxclk: 500
FanPadding16: 0
FanTempInputSelect: 1
FanPadding: 0
FanZeroRpmEnable: 1
FanTachEdgePerRev: 2
FuzzyFan_ErrorSetDelta: 0
FuzzyFan_ErrorRateSetDelta: 0
FuzzyFan_PwmSetDelta: 0
FuzzyFan_Reserved: 0
OverrideAvfsGb:
OverrideAvfsGb 0: 0
OverrideAvfsGb 1: 0
dBtcGbGfxDfllModelSelect: 1
Padding8_Avfs: 0
qAvfsGb:
qAvfsGb 0:
a: 0
b: 0
c: 0
qAvfsGb 1:
a: 0
b: 0
c: 0
dBtcGbGfxPll:
a: 0.06559
b:-0.10255
c: 0.14502
dBtcGbGfxDfll:
a: 0
b: 0
c: 0
dBtcGbSoc:
a: 0
b: 0
c: 0
qAgingGb:
qAgingGb 0:
m: 0
b: 0
qAgingGb 1:
m: 0
b: 0
PiecewiseLinearDroopIntGfxDfll:
Fset:
Fset 0: 0.3
Fset 1: 1.5
Fset 2: 2.3
Fset 3: 2.5
Fset 4: 3.1
Vdroop:
Vdroop 0: 0.04
Vdroop 1: 0.0655
Vdroop 2: 0.089
Vdroop 3: 0.098
Vdroop 4: 0.358
qStaticVoltageOffset:
qStaticVoltageOffset 0:
a: 0.0745
b:-0.2595
c: 0.2447
qStaticVoltageOffset 1:
a:-0.0394
b: 0.278
c:-0.16743
DcTol:
DcTol 0: 192
DcTol 1: 192
DcBtcEnabled:
DcBtcEnabled 0: 1
DcBtcEnabled 1: 1
Padding8_GfxBtc:
Padding8_GfxBtc 0: 0
Padding8_GfxBtc 1: 0
DcBtcMin:
DcBtcMin 0: 0
DcBtcMin 1: 0
DcBtcMax:
DcBtcMax 0: 192
DcBtcMax 1: 192
DcBtcGb:
DcBtcGb 0: 25
DcBtcGb 1: 25
XgmiDpmPstates:
XgmiDpmPstates 0: 0
XgmiDpmPstates 1: 0
XgmiDpmSpare:
XgmiDpmSpare 0: 0
XgmiDpmSpare 1: 0
DebugOverrides: 0
ReservedEquation0:
a: 0
b: 0
c: 0
ReservedEquation1:
a: 0
b: 0
c: 0
ReservedEquation2:
a: 0
b: 0
c: 0
ReservedEquation3:
a: 0
b: 0
c: 0
CustomerVariant: 0
VcBtcEnabled: 1
VcBtcVminT0: 2875
VcBtcFixedVminAgingOffset: 325
VcBtcVmin2PsmDegrationGb: 0
VcBtcPsmA: 0.0028
VcBtcPsmB: 0.4017
VcBtcVminA: 0.0116
VcBtcVminB: 0.4855
LedGpio: 0
GfxPowerStagesGpio: 1
SkuReserved:
SkuReserved 0: 0
SkuReserved 1: 0
SkuReserved 2: 0
SkuReserved 3: 0
SkuReserved 4: 0
SkuReserved 5: 0
SkuReserved 6: 0
SkuReserved 7: 0
GamingClk:
GamingClk 0: 0
GamingClk 1: 0
GamingClk 2: 0
GamingClk 3: 0
GamingClk 4: 0
GamingClk 5: 0
I2cControllers:
I2cControllers 0:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 1:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 2:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 3:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 4:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 5:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 6:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 7:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 8:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 9:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 10:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 11:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 12:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 13:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 14:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 15:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
GpioScl: 0
GpioSda: 0
FchUsbPdSlaveAddr: 0
I2cSpare:
I2cSpare 0: 0
VddGfxVrMapping: 0
VddSocVrMapping: 0
VddMem0VrMapping: 0
VddMem1VrMapping: 0
GfxUlvPhaseSheddingMask: 0
SocUlvPhaseSheddingMask: 0
VddciUlvPhaseSheddingMask: 0
MvddUlvPhaseSheddingMask: 0
GfxMaxCurrent: 0
GfxOffset: 0
Padding_TelemetryGfx: 0
SocMaxCurrent: 0
SocOffset: 0
Padding_TelemetrySoc: 0
Mem0MaxCurrent: 0
Mem0Offset: 0
Padding_TelemetryMem0: 0
Mem1MaxCurrent: 0
Mem1Offset: 0
Padding_TelemetryMem1: 0
MvddRatio: 0
AcDcGpio: 0
AcDcPolarity: 0
VR0HotGpio: 0
VR0HotPolarity: 0
VR1HotGpio: 0
VR1HotPolarity: 0
GthrGpio: 0
GthrPolarity: 0
LedPin0: 0
LedPin1: 0
LedPin2: 0
LedEnableMask: 0
LedPcie: 0
LedError: 0
LedSpare1:
LedSpare1 0: 0
LedSpare1 1: 1
PllGfxclkSpreadEnabled: 0
PllGfxclkSpreadPercent: 0
PllGfxclkSpreadFreq: 0
DfllGfxclkSpreadEnabled: 0
DfllGfxclkSpreadPercent: 0
DfllGfxclkSpreadFreq: 0
UclkSpreadPadding: 0
UclkSpreadFreq: 0
FclkSpreadEnabled: 0
FclkSpreadPercent: 0
FclkSpreadFreq: 0
MemoryChannelEnabled: 0
DramBitWidth: 0
PaddingMem1:
PaddingMem1 0: 0
PaddingMem1 1: 0
PaddingMem1 2: 0
TotalBoardPower: 0
BoardPowerPadding: 0
XgmiLinkSpeed:
XgmiLinkSpeed 0: 0
XgmiLinkSpeed 1: 0
XgmiLinkSpeed 2: 0
XgmiLinkSpeed 3: 0
XgmiLinkWidth:
XgmiLinkWidth 0: 0
XgmiLinkWidth 1: 0
XgmiLinkWidth 2: 0
XgmiLinkWidth 3: 0
XgmiFclkFreq:
XgmiFclkFreq 0: 0
XgmiFclkFreq 1: 0
XgmiFclkFreq 2: 0
XgmiFclkFreq 3: 0
XgmiSocVoltage:
XgmiSocVoltage 0: 0
XgmiSocVoltage 1: 0
XgmiSocVoltage 2: 0
XgmiSocVoltage 3: 0
HsrEnabled: 0
VddqOffEnabled: 0
PaddingUmcFlags:
PaddingUmcFlags 0: 0
PaddingUmcFlags 1: 0
UclkSpreadPercent:
UclkSpreadPercent 0: 0
UclkSpreadPercent 1: 0
UclkSpreadPercent 2: 0
UclkSpreadPercent 3: 0
UclkSpreadPercent 4: 0
UclkSpreadPercent 5: 0
UclkSpreadPercent 6: 0
UclkSpreadPercent 7: 0
UclkSpreadPercent 8: 0
UclkSpreadPercent 9: 0
UclkSpreadPercent 10: 0
UclkSpreadPercent 11: 0
UclkSpreadPercent 12: 0
UclkSpreadPercent 13: 0
UclkSpreadPercent 14: 0
UclkSpreadPercent 15: 0
BoardReserved:
BoardReserved 0: 0
BoardReserved 1: 0
BoardReserved 2: 0
BoardReserved 3: 0
BoardReserved 4: 0
BoardReserved 5: 0
BoardReserved 6: 0
BoardReserved 7: 0
BoardReserved 8: 0
BoardReserved 9: 0
BoardReserved 10: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 102629376
================================================
FILE: test/AMD.RX6900XT.16384.201104.rom.rawdump
================================================
PowerPlay table rev 15.0 size 2470 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H a609 structuresize : 2470
0x0002 (0002) B 0f format_revision : 15
0x0003 (0003) B 00 content_revision : 0
0x0004 (0004) B 02 table_revision : 2
0x0005 (0005) H 2203 table_size : 802
0x0007 (0007) I af090000 golden_pp_id : 2479
0x000b (0011) I 77400000 golden_revision : 16503
0x000f (0015) H 8000 format_id : 128
0x0011 (0017) I 18000000 platform_caps : 24
0x0015 (0021) B 1c thermal_controller_type : 28
0x0016 (0022) H 0000 small_power_limit1 : 0
0x0018 (0024) H 0000 small_power_limit2 : 0
0x001a (0026) H 0000 boost_power_limit : 0
0x001c (0028) H 7600 software_shutdown_temp : 118
0x001e (0030) H 0000 reserve : 0
0x0020 (0032) H 0000 reserve : 0
0x0022 (0034) H 0000 reserve : 0
0x0024 (0036) H 0000 reserve : 0
0x0026 (0038) H 0000 reserve : 0
0x0028 (0040) H 0000 reserve : 0
0x002a (0042) H 0100 reserve : 1
0x002c (0044) H 0000 reserve : 0
0x002e (0046) B 01 revision : 1
0x002f (0047) B 00 reserve : 0
0x0030 (0048) B 00 reserve : 0
0x0031 (0049) B 00 reserve : 0
0x0032 (0050) I 0d000000 count : 13
0x0036 (0054) I 640a0000 max GFXCLK : 2660
0x003a (0058) I b0040000 max SOCCLK : 1200
0x003e (0062) I e8030000 max UCLK : 1000
0x0042 (0066) I 94070000 max FCLK : 1940
0x0046 (0070) I f2040000 max DCLK_0 : 1266
0x004a (0074) I c5050000 max VCLK_0 : 1477
0x004e (0078) I f2040000 max DCLK_1 : 1266
0x0052 (0082) I c5050000 max VCLK_1 : 1477
0x0056 (0086) I b0040000 max DCEFCLK : 1200
0x005a (0090) I c1040000 max DISPCLK : 1217
0x005e (0094) I c1040000 max PIXCLK : 1217
0x0062 (0098) I 2a030000 max PHYCLK : 810
0x0066 (0102) I c1040000 max DTBCLK : 1217
0x006a (0106) I 00000000 max : 0
0x006e (0110) I 00000000 max : 0
0x0072 (0114) I 00000000 max : 0
0x0076 (0118) I f4010000 min GFXCLK : 500
0x007a (0122) I e0010000 min SOCCLK : 480
0x007e (0126) I 61000000 min UCLK : 97
0x0082 (0130) I 26020000 min FCLK : 550
0x0086 (0134) I 3d010000 min DCLK_0 : 317
0x008a (0138) I 6b010000 min VCLK_0 : 363
0x008e (0142) I 3d010000 min DCLK_1 : 317
0x0092 (0146) I 6b010000 min VCLK_1 : 363
0x0096 (0150) I a2010000 min DCEFCLK : 418
0x009a (0154) I e7010000 min DISPCLK : 487
0x009e (0158) I e7010000 min PIXCLK : 487
0x00a2 (0162) I 2c010000 min PHYCLK : 300
0x00a6 (0166) I e7010000 min DTBCLK : 487
0x00aa (0170) I 00000000 min : 0
0x00ae (0174) I 00000000 min : 0
0x00b2 (0178) I 00000000 min : 0
0x00b6 (0182) B 81 revision : 129
0x00b7 (0183) B 00 reserve : 0
0x00b8 (0184) B 00 reserve : 0
0x00b9 (0185) B 00 reserve : 0
0x00ba (0186) I 10000000 feature_count : 16
0x00be (0190) I 1e000000 setting_count : 30
0x00c2 (0194) B 01 cap GFXCLK_LIMITS : 1
0x00c3 (0195) B 01 cap GFXCLK_CURVE : 1
0x00c4 (0196) B 01 cap UCLK_LIMITS : 1
0x00c5 (0197) B 01 cap POWER_LIMIT : 1
0x00c6 (0198) B 01 cap FAN_ACOUSTIC_LIMIT : 1
0x00c7 (0199) B 01 cap FAN_SPEED_MIN : 1
0x00c8 (0200) B 01 cap TEMPERATURE_FAN : 1
0x00c9 (0201) B 01 cap TEMPERATURE_SYSTEM : 1
0x00ca (0202) B 01 cap MEMORY_TIMING_TUNE : 1
0x00cb (0203) B 01 cap FAN_ZERO_RPM_CONTROL : 1
0x00cc (0204) B 01 cap AUTO_UV_ENGINE : 1
0x00cd (0205) B 01 cap AUTO_OC_ENGINE : 1
0x00ce (0206) B 01 cap AUTO_OC_MEMORY : 1
0x00cf (0207) B 01 cap FAN_CURVE : 1
0x00d0 (0208) B 00 cap SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT: 0
0x00d1 (0209) B 01 cap POWER_MODE : 1
0x00d2 (0210) B 00 cap : 0
0x00d3 (0211) B 00 cap : 0
0x00d4 (0212) B 00 cap : 0
0x00d5 (0213) B 00 cap : 0
0x00d6 (0214) B 00 cap : 0
0x00d7 (0215) B 00 cap : 0
0x00d8 (0216) B 00 cap : 0
0x00d9 (0217) B 00 cap : 0
0x00da (0218) B 00 cap : 0
0x00db (0219) B 00 cap : 0
0x00dc (0220) B 00 cap : 0
0x00dd (0221) B 00 cap : 0
0x00de (0222) B 00 cap : 0
0x00df (0223) B 00 cap : 0
0x00e0 (0224) B 00 cap : 0
0x00e1 (0225) B 00 cap : 0
0x00e2 (0226) I b80b0000 max GFXCLKFMAX : 3000
0x00e6 (0230) I b80b0000 max GFXCLKFMIN : 3000
0x00ea (0234) I 00000000 max CUSTOM_GFX_VF_CURVE_A : 0
0x00ee (0238) I 00000000 max CUSTOM_GFX_VF_CURVE_B : 0
0x00f2 (0242) I 00000000 max CUSTOM_GFX_VF_CURVE_C : 0
0x00f6 (0246) I b80b0000 max CUSTOM_CURVE_VFT_FMIN : 3000
0x00fa (0250) I 33040000 max UCLKFMIN : 1075
0x00fe (0254) I 33040000 max UCLKFMAX : 1075
0x0102 (0258) I 0f000000 max POWERPERCENTAGE : 15
0x0106 (0262) I e40c0000 max FANRPMMIN : 3300
0x010a (0266) I e40c0000 max FANRPMACOUSTICLIMIT : 3300
0x010e (0270) I 64000000 max FANTARGETTEMPERATURE : 100
0x0112 (0274) I 6e000000 max OPERATINGTEMPMAX : 110
0x0116 (0278) I 01000000 max ACTIMING : 1
0x011a (0282) I 01000000 max FAN_ZERO_RPM_CONTROL : 1
0x011e (0286) I 01000000 max AUTOUVENGINE : 1
0x0122 (0290) I 01000000 max AUTOOCENGINE : 1
0x0126 (0294) I 01000000 max AUTOOCMEMORY : 1
0x012a (0298) I 64000000 max FAN_CURVE_TEMPERATURE_1 : 100
0x012e (0302) I 64000000 max FAN_CURVE_SPEED_1 : 100
0x0132 (0306) I 64000000 max FAN_CURVE_TEMPERATURE_2 : 100
0x0136 (0310) I 64000000 max FAN_CURVE_SPEED_2 : 100
0x013a (0314) I 64000000 max FAN_CURVE_TEMPERATURE_3 : 100
0x013e (0318) I 64000000 max FAN_CURVE_SPEED_3 : 100
0x0142 (0322) I 64000000 max FAN_CURVE_TEMPERATURE_4 : 100
0x0146 (0326) I 64000000 max FAN_CURVE_SPEED_4 : 100
0x014a (0330) I 64000000 max FAN_CURVE_TEMPERATURE_5 : 100
0x014e (0334) I 64000000 max FAN_CURVE_SPEED_5 : 100
0x0152 (0338) I 00000000 max AUTO_FAN_ACOUSTIC_LIMIT : 0
0x0156 (0342) I 01000000 max POWER_MODE : 1
0x015a (0346) I 00000000 max : 0
0x015e (0350) I 00000000 max : 0
0x0162 (0354) I 00000000 max : 0
0x0166 (0358) I 00000000 max : 0
0x016a (0362) I 00000000 max : 0
0x016e (0366) I 00000000 max : 0
0x0172 (0370) I 00000000 max : 0
0x0176 (0374) I 00000000 max : 0
0x017a (0378) I 00000000 max : 0
0x017e (0382) I 00000000 max : 0
0x0182 (0386) I 00000000 max : 0
0x0186 (0390) I 00000000 max : 0
0x018a (0394) I 00000000 max : 0
0x018e (0398) I 00000000 max : 0
0x0192 (0402) I 00000000 max : 0
0x0196 (0406) I 00000000 max : 0
0x019a (0410) I 00000000 max : 0
0x019e (0414) I 00000000 max : 0
0x01a2 (0418) I 00000000 max : 0
0x01a6 (0422) I 00000000 max : 0
0x01aa (0426) I 00000000 max : 0
0x01ae (0430) I 00000000 max : 0
0x01b2 (0434) I 00000000 max : 0
0x01b6 (0438) I 00000000 max : 0
0x01ba (0442) I 00000000 max : 0
0x01be (0446) I 00000000 max : 0
0x01c2 (0450) I 00000000 max : 0
0x01c6 (0454) I 00000000 max : 0
0x01ca (0458) I 00000000 max : 0
0x01ce (0462) I 00000000 max : 0
0x01d2 (0466) I 00000000 max : 0
0x01d6 (0470) I 00000000 max : 0
0x01da (0474) I 00000000 max : 0
0x01de (0478) I 00000000 max : 0
0x01e2 (0482) I f4010000 min GFXCLKFMAX : 500
0x01e6 (0486) I f4010000 min GFXCLKFMIN : 500
0x01ea (0490) I 00000000 min CUSTOM_GFX_VF_CURVE_A : 0
0x01ee (0494) I 00000000 min CUSTOM_GFX_VF_CURVE_B : 0
0x01f2 (0498) I 00000000 min CUSTOM_GFX_VF_CURVE_C : 0
0x01f6 (0502) I f4010000 min CUSTOM_CURVE_VFT_FMIN : 500
0x01fa (0506) I a2020000 min UCLKFMIN : 674
0x01fe (0510) I a2020000 min UCLKFMAX : 674
0x0202 (0514) I 0a000000 min POWERPERCENTAGE : 10
0x0206 (0518) I fa000000 min FANRPMMIN : 250
0x020a (0522) I e8030000 min FANRPMACOUSTICLIMIT : 1000
0x020e (0526) I 19000000 min FANTARGETTEMPERATURE : 25
0x0212 (0530) I 32000000 min OPERATINGTEMPMAX : 50
0x0216 (0534) I 00000000 min ACTIMING : 0
0x021a (0538) I 00000000 min FAN_ZERO_RPM_CONTROL : 0
0x021e (0542) I 00000000 min AUTOUVENGINE : 0
0x0222 (0546) I 00000000 min AUTOOCENGINE : 0
0x0226 (0550) I 00000000 min AUTOOCMEMORY : 0
0x022a (0554) I 19000000 min FAN_CURVE_TEMPERATURE_1 : 25
0x022e (0558) I 0a000000 min FAN_CURVE_SPEED_1 : 10
0x0232 (0562) I 19000000 min FAN_CURVE_TEMPERATURE_2 : 25
0x0236 (0566) I 0a000000 min FAN_CURVE_SPEED_2 : 10
0x023a (0570) I 19000000 min FAN_CURVE_TEMPERATURE_3 : 25
0x023e (0574) I 0a000000 min FAN_CURVE_SPEED_3 : 10
0x0242 (0578) I 19000000 min FAN_CURVE_TEMPERATURE_4 : 25
0x0246 (0582) I 0a000000 min FAN_CURVE_SPEED_4 : 10
0x024a (0586) I 19000000 min FAN_CURVE_TEMPERATURE_5 : 25
0x024e (0590) I 0a000000 min FAN_CURVE_SPEED_5 : 10
0x0252 (0594) I 00000000 min AUTO_FAN_ACOUSTIC_LIMIT : 0
0x0256 (0598) I 00000000 min POWER_MODE : 0
0x025a (0602) I 00000000 min : 0
0x025e (0606) I 00000000 min : 0
0x0262 (0610) I 00000000 min : 0
0x0266 (0614) I 00000000 min : 0
0x026a (0618) I 00000000 min : 0
0x026e (0622) I 00000000 min : 0
0x0272 (0626) I 00000000 min : 0
0x0276 (0630) I 00000000 min : 0
0x027a (0634) I 00000000 min : 0
0x027e (0638) I 00000000 min : 0
0x0282 (0642) I 00000000 min : 0
0x0286 (0646) I 00000000 min : 0
0x028a (0650) I 00000000 min : 0
0x028e (0654) I 00000000 min : 0
0x0292 (0658) I 00000000 min : 0
0x0296 (0662) I 00000000 min : 0
0x029a (0666) I 00000000 min : 0
0x029e (0670) I 00000000 min : 0
0x02a2 (0674) I 00000000 min : 0
0x02a6 (0678) I 00000000 min : 0
0x02aa (0682) I 00000000 min : 0
0x02ae (0686) I 00000000 min : 0
0x02b2 (0690) I 00000000 min : 0
0x02b6 (0694) I 00000000 min : 0
0x02ba (0698) I 00000000 min : 0
0x02be (0702) I 00000000 min : 0
0x02c2 (0706) I 00000000 min : 0
0x02c6 (0710) I 00000000 min : 0
0x02ca (0714) I 00000000 min : 0
0x02ce (0718) I 00000000 min : 0
0x02d2 (0722) I 00000000 min : 0
0x02d6 (0726) I 00000000 min : 0
0x02da (0730) I 00000000 min : 0
0x02de (0734) I 00000000 min : 0
0x02e2 (0738) h 0600 pm_setting : 6
0x02e4 (0740) h 0000 pm_setting : 0
0x02e6 (0742) h 0600 pm_setting : 6
0x02e8 (0744) h 0600 pm_setting : 6
0x02ea (0746) h 5f00 pm_setting : 95
0x02ec (0748) h 5f00 pm_setting : 95
0x02ee (0750) h 5f00 pm_setting : 95
0x02f0 (0752) h 5f00 pm_setting : 95
0x02f2 (0754) h 7206 pm_setting : 1650
0x02f4 (0756) h 7206 pm_setting : 1650
0x02f6 (0758) h d606 pm_setting : 1750
0x02f8 (0760) h d606 pm_setting : 1750
0x02fa (0762) h d007 pm_setting : 2000
0x02fc (0764) h d007 pm_setting : 2000
0x02fe (0766) h ca08 pm_setting : 2250
0x0300 (0768) h ca08 pm_setting : 2250
0x0302 (0770) h 0000 pm_setting : 0
0x0304 (0772) h 0000 pm_setting : 0
0x0306 (0774) h 0000 pm_setting : 0
0x0308 (0776) h 0000 pm_setting : 0
0x030a (0778) h 0000 pm_setting : 0
0x030c (0780) h 0000 pm_setting : 0
0x030e (0782) h 0000 pm_setting : 0
0x0310 (0784) h 0000 pm_setting : 0
0x0312 (0786) h 0000 pm_setting : 0
0x0314 (0788) h 0000 pm_setting : 0
0x0316 (0790) h 0000 pm_setting : 0
0x0318 (0792) h 0000 pm_setting : 0
0x031a (0794) h 0000 pm_setting : 0
0x031c (0796) h 0000 pm_setting : 0
0x031e (0798) h 0000 pm_setting : 0
0x0320 (0800) h 0000 pm_setting : 0
0x0322 (0802) I 06000000 Version : 6
0x0326 (0806) I fffd7fa3 FeaturesToRun : 2743074303
0x032a (0810) I 63370000 FeaturesToRun : 14179
0x032e (0814) H ff00 SocketPowerLimitAc : 255
0x0330 (0816) H 0000 SocketPowerLimitAc : 0
0x0332 (0818) H 0000 SocketPowerLimitAc : 0
0x0334 (0820) H 0000 SocketPowerLimitAc : 0
0x0336 (0822) H 0000 SocketPowerLimitAcTau : 0
0x0338 (0824) H 0000 SocketPowerLimitAcTau : 0
0x033a (0826) H 0000 SocketPowerLimitAcTau : 0
0x033c (0828) H 0000 SocketPowerLimitAcTau : 0
0x033e (0830) H ff00 SocketPowerLimitDc : 255
0x0340 (0832) H 0000 SocketPowerLimitDc : 0
0x0342 (0834) H 0000 SocketPowerLimitDc : 0
0x0344 (0836) H 0000 SocketPowerLimitDc : 0
0x0346 (0838) H 0000 SocketPowerLimitDcTau : 0
0x0348 (0840) H 0000 SocketPowerLimitDcTau : 0
0x034a (0842) H 0000 SocketPowerLimitDcTau : 0
0x034c (0844) H 0000 SocketPowerLimitDcTau : 0
0x034e (0846) H 4001 TdcLimit : 320
0x0350 (0848) H 3700 TdcLimit : 55
0x0352 (0850) H 0000 TdcLimitTau : 0
0x0354 (0852) H 0000 TdcLimitTau : 0
0x0356 (0854) H 6400 TemperatureLimit : 100
0x0358 (0856) H 6e00 TemperatureLimit : 110
0x035a (0858) H 6400 TemperatureLimit : 100
0x035c (0860) H 7300 TemperatureLimit : 115
0x035e (0862) H 7300 TemperatureLimit : 115
0x0360 (0864) H 7300 TemperatureLimit : 115
0x0362 (0866) H 7300 TemperatureLimit : 115
0x0364 (0868) H 0000 TemperatureLimit : 0
0x0366 (0870) H 0000 TemperatureLimit : 0
0x0368 (0872) H 0000 TemperatureLimit : 0
0x036a (0874) I 00000000 FitLimit : 0
0x036e (0878) B 01 TotalPowerConfig : 1
0x036f (0879) B 00 TotalPowerPadding : 0
0x0370 (0880) B 00 TotalPowerPadding : 0
0x0371 (0881) B 00 TotalPowerPadding : 0
0x0372 (0882) I 0a000000 ApccPlusResidencyLimit : 10
0x0376 (0886) H 0000 SmnclkDpmFreq : 0
0x0378 (0888) H 0000 SmnclkDpmFreq : 0
0x037a (0890) H 0000 SmnclkDpmVoltage : 0
0x037c (0892) H 0000 SmnclkDpmVoltage : 0
0x037e (0894) I 00000000 PaddingAPCC : 0
0x0382 (0898) H 0000 PerPartDroopVsetGfxDfll : 0
0x0384 (0900) H 0000 PerPartDroopVsetGfxDfll : 0
0x0386 (0902) H 0000 PerPartDroopVsetGfxDfll : 0
0x0388 (0904) H 0000 PerPartDroopVsetGfxDfll : 0
0x038a (0906) H 0000 PerPartDroopVsetGfxDfll : 0
0x038c (0908) H 0000 PaddingPerPartDroop : 0
0x038e (0910) I fe380000 ThrottlerControlMask : 14590
0x0392 (0914) I 730f0000 FwDStateMask : 3955
0x0396 (0918) H 6400 UlvVoltageOffsetSoc : 100
0x0398 (0920) H 6400 UlvVoltageOffsetGfx : 100
0x039a (0922) H 1c0c MinVoltageUlvGfx : 3100
0x039c (0924) H 800c MinVoltageUlvSoc : 3200
0x039e (0926) H 0000 SocLIVmin : 0
0x03a0 (0928) H 0000 PaddingLIVmin : 0
0x03a2 (0930) B 00 GceaLinkMgrIdleThreshold : 0
0x03a3 (0931) B 00 RlcUlvParams : 0
0x03a4 (0932) B 00 RlcUlvParams : 0
0x03a5 (0933) B 00 RlcUlvParams : 0
0x03a6 (0934) H e40c MinVoltageGfx : 3300
0x03a8 (0936) H e40c MinVoltageSoc : 3300
0x03aa (0938) H 5c12 MaxVoltageGfx : 4700
0x03ac (0940) H f811 MaxVoltageSoc : 4600
0x03ae (0942) H 4000 LoadLineResistanceGfx : 64
0x03b0 (0944) H 0001 LoadLineResistanceSoc : 256
0x03b2 (0946) H 3200 VDDGFX_TVmin : 50
0x03b4 (0948) H 3c00 VDDSOC_TVmin : 60
0x03b6 (0950) H 800c VDDGFX_Vmin_HiTemp : 3200
0x03b8 (0952) H 800c VDDGFX_Vmin_LoTemp : 3200
0x03ba (0954) H 800c VDDSOC_Vmin_HiTemp : 3200
0x03bc (0956) H 800c VDDSOC_Vmin_LoTemp : 3200
0x03be (0958) H 1400 VDDGFX_TVminHystersis : 20
0x03c0 (0960) H 1400 VDDSOC_TVminHystersis : 20
0x03c2 (0962) B 00 VoltageMode : 0
0x03c3 (0963) B 00 SnapToDiscrete : 0
0x03c4 (0964) B 02 NumDiscreteLevels : 2
0x03c5 (0965) B 00 Padding : 0
0x03c6 (0966) f 0000803f m : 1
0x03ca (0970) f 00000000 b : 0
0x03ce (0974) f b537b83e a : 0.3598
0x03d2 (0978) f ef1b67bf b :-0.90277
0x03d6 (0982) f 4f40a73f c : 1.30665
0x03da (0986) H 8b04 SsFmin : 1163
0x03dc (0988) H 0000 Padding16 : 0
0x03de (0990) B 00 VoltageMode : 0
0x03df (0991) B 00 SnapToDiscrete : 0
0x03e0 (0992) B 02 NumDiscreteLevels : 2
0x03e1 (0993) B 00 Padding : 0
0x03e2 (0994) f ee7c8f3f m : 1.121
0x03e6 (0998) f a69b843e b : 0.259
0x03ea (1002) f 44349a3e a : 0.30118
0x03ee (1006) f 43ad09be b :-0.13445
0x03f2 (1010) f 3d0f363f c : 0.71117
0x03f6 (1014) H f100 SsFmin : 241
0x03f8 (1016) H 0000 Padding16 : 0
0x03fa (1018) B 00 VoltageMode : 0
0x03fb (1019) B 01 SnapToDiscrete : 1
0x03fc (1020) B 04 NumDiscreteLevels : 4
0x03fd (1021) B 00 Padding : 0
0x03fe (1022) f cdccac3f m : 1.35
0x0402 (1026) f e3a59bbd b :-0.076
0x0406 (1030) f 6f81e43e a : 0.4463
0x040a (1034) f caa6ccbe b :-0.39971
0x040e (1038) f 0421493f c : 0.78566
0x0412 (1042) H c001 SsFmin : 448
0x0414 (1044) H 0000 Padding16 : 0
0x0416 (1046) B 00 VoltageMode : 0
0x0417 (1047) B 00 SnapToDiscrete : 0
0x0418 (1048) B 02 NumDiscreteLevels : 2
0x0419 (1049) B 00 Padding : 0
0x041a (1050) f 0000803f m : 1
0x041e (1054) f 00000000 b : 0
0x0422 (1058) f 72c47a3e a : 0.24489
0x0426 (1062) f 4c8984be b :-0.25886
0x042a (1066) f dcba433f c : 0.76457
0x042e (1070) H 1102 SsFmin : 529
0x0430 (1072) H 0000 Padding16 : 0
0x0432 (1074) B 00 VoltageMode : 0
0x0433 (1075) B 00 SnapToDiscrete : 0
0x0434 (1076) B 02 NumDiscreteLevels : 2
0x0435 (1077) B 00 Padding : 0
0x0436 (1078) f 098aaf3f m : 1.3714
0x043a (1082) f 295c0fbd b :-0.035
0x043e (1086) f 85ceeb3e a : 0.46056
0x0442 (1090) f 10ccc1be b :-0.37851
0x0446 (1094) f 4720463f c : 0.77393
0x044a (1098) H 9b01 SsFmin : 411
0x044c (1100) H 0000 Padding16 : 0
0x044e (1102) B 00 VoltageMode : 0
0x044f (1103) B 00 SnapToDiscrete : 0
0x0450 (1104) B 02 NumDiscreteLevels : 2
0x0451 (1105) B 00 Padding : 0
0x0452 (1106) f 6ade893f m : 1.0771
0x0456 (1110) f b81e053e b : 0.13
0x045a (1114) f 8e75913e a : 0.2841
0x045e (1118) f 284957be b :-0.21024
0x0462 (1122) f e42c3c3f c : 0.73506
0x0466 (1126) H 7301 SsFmin : 371
0x0468 (1128) H 0000 Padding16 : 0
0x046a (1130) B 00 VoltageMode : 0
0x046b (1131) B 00 SnapToDiscrete : 0
0x046c (1132) B 02 NumDiscreteLevels : 2
0x046d (1133) B 00 Padding : 0
0x046e (1134) f 098aaf3f m : 1.3714
0x0472 (1138) f 295c0fbd b :-0.035
0x0476 (1142) f 85ceeb3e a : 0.46056
0x047a (1146) f 10ccc1be b :-0.37851
0x047e (1150) f 4720463f c : 0.77393
0x0482 (1154) H 9b01 SsFmin : 411
0x0484 (1156) H 0000 Padding16 : 0
0x0486 (1158) B 00 VoltageMode : 0
0x0487 (1159) B 00 SnapToDiscrete : 0
0x0488 (1160) B 02 NumDiscreteLevels : 2
0x0489 (1161) B 00 Padding : 0
0x048a (1162) f 6ade893f m : 1.0771
0x048e (1166) f b81e053e b : 0.13
0x0492 (1170) f 8e75913e a : 0.2841
0x0496 (1174) f 284957be b :-0.21024
0x049a (1178) f e42c3c3f c : 0.73506
0x049e (1182) H 7301 SsFmin : 371
0x04a0 (1184) H 0000 Padding16 : 0
0x04a2 (1186) B 00 VoltageMode : 0
0x04a3 (1187) B 00 SnapToDiscrete : 0
0x04a4 (1188) B 02 NumDiscreteLevels : 2
0x04a5 (1189) B 00 Padding : 0
0x04a6 (1190) f 7d3f953f m : 1.166
0x04aa (1194) f dd24063e b : 0.131
0x04ae (1198) f 1d77aa3e a : 0.33294
0x04b2 (1202) f ee7768be b :-0.22702
0x04b6 (1206) f c91f3c3f c : 0.73486
0x04ba (1210) H 5501 SsFmin : 341
0x04bc (1212) H 0000 Padding16 : 0
0x04be (1214) B 00 VoltageMode : 0
0x04bf (1215) B 00 SnapToDiscrete : 0
0x04c0 (1216) B 02 NumDiscreteLevels : 2
0x04c1 (1217) B 00 Padding : 0
0x04c2 (1218) f 6abc743f m : 0.956
0x04c6 (1222) f ae47613e b : 0.22
0x04ca (1226) f 732e653e a : 0.22381
0x04ce (1230) f 52ed13be b :-0.14446
0x04d2 (1234) f d72f383f c : 0.71948
0x04d6 (1238) H 4301 SsFmin : 323
0x04d8 (1240) H 0000 Padding16 : 0
0x04da (1242) B 00 VoltageMode : 0
0x04db (1243) B 00 SnapToDiscrete : 0
0x04dc (1244) B 02 NumDiscreteLevels : 2
0x04dd (1245) B 00 Padding : 0
0x04de (1246) f 6abc743f m : 0.956
0x04e2 (1250) f ae47613e b : 0.22
0x04e6 (1254) f 732e653e a : 0.22381
0x04ea (1258) f 52ed13be b :-0.14446
0x04ee (1262) f d72f383f c : 0.71948
0x04f2 (1266) H 4301 SsFmin : 323
0x04f4 (1268) H 0000 Padding16 : 0
0x04f6 (1270) B 00 VoltageMode : 0
0x04f7 (1271) B 00 SnapToDiscrete : 0
0x04f8 (1272) B 02 NumDiscreteLevels : 2
0x04f9 (1273) B 00 Padding : 0
0x04fa (1274) f 0e2d123f m : 0.571
0x04fe (1278) f 9a99d93e b : 0.425
0x0502 (1282) f 2783a33d a : 0.07984
0x0506 (1286) f 8d28edbc b :-0.02895
0x050a (1290) f e7e3323f c : 0.69879
0x050e (1294) H b600 SsFmin : 182
0x0510 (1296) H 0000 Padding16 : 0
0x0512 (1298) B 00 VoltageMode : 0
0x0513 (1299) B 00 SnapToDiscrete : 0
0x0514 (1300) B 02 NumDiscreteLevels : 2
0x0515 (1301) B 00 Padding : 0
0x0516 (1302) f 6abc743f m : 0.956
0x051a (1306) f ae47613e b : 0.22
0x051e (1310) f 732e653e a : 0.22381
0x0522 (1314) f 52ed13be b :-0.14446
0x0526 (1318) f d72f383f c : 0.71948
0x052a (1322) H 4301 SsFmin : 323
0x052c (1324) H 0000 Padding16 : 0
0x052e (1326) H f401 FreqTableGfx : 500
0x0530 (1328) H 640a FreqTableGfx : 2660
0x0532 (1330) H 0000 FreqTableGfx : 0
0x0534 (1332) H 0000 FreqTableGfx : 0
0x0536 (1334) H 0000 FreqTableGfx : 0
0x0538 (1336) H 0000 FreqTableGfx : 0
0x053a (1338) H 0000 FreqTableGfx : 0
0x053c (1340) H 0000 FreqTableGfx : 0
0x053e (1342) H 0000 FreqTableGfx : 0
0x0540 (1344) H 0000 FreqTableGfx : 0
0x0542 (1346) H 0000 FreqTableGfx : 0
0x0544 (1348) H 0000 FreqTableGfx : 0
0x0546 (1350) H 0000 FreqTableGfx : 0
0x0548 (1352) H 0000 FreqTableGfx : 0
0x054a (1354) H 0000 FreqTableGfx : 0
0x054c (1356) H 0000 FreqTableGfx : 0
0x054e (1358) H 6b01 FreqTableVclk : 363
0x0550 (1360) H c505 FreqTableVclk : 1477
0x0552 (1362) H 0000 FreqTableVclk : 0
0x0554 (1364) H 0000 FreqTableVclk : 0
0x0556 (1366) H 0000 FreqTableVclk : 0
0x0558 (1368) H 0000 FreqTableVclk : 0
0x055a (1370) H 0000 FreqTableVclk : 0
0x055c (1372) H 0000 FreqTableVclk : 0
0x055e (1374) H 3d01 FreqTableDclk : 317
0x0560 (1376) H f204 FreqTableDclk : 1266
0x0562 (1378) H 0000 FreqTableDclk : 0
0x0564 (1380) H 0000 FreqTableDclk : 0
0x0566 (1382) H 0000 FreqTableDclk : 0
0x0568 (1384) H 0000 FreqTableDclk : 0
0x056a (1386) H 0000 FreqTableDclk : 0
0x056c (1388) H 0000 FreqTableDclk : 0
0x056e (1390) H e001 FreqTableSocclk : 480
0x0570 (1392) H b004 FreqTableSocclk : 1200
0x0572 (1394) H 0000 FreqTableSocclk : 0
0x0574 (1396) H 0000 FreqTableSocclk : 0
0x0576 (1398) H 0000 FreqTableSocclk : 0
0x0578 (1400) H 0000 FreqTableSocclk : 0
0x057a (1402) H 0000 FreqTableSocclk : 0
0x057c (1404) H 0000 FreqTableSocclk : 0
0x057e (1406) H 6100 FreqTableUclk : 97
0x0580 (1408) H c901 FreqTableUclk : 457
0x0582 (1410) H a202 FreqTableUclk : 674
0x0584 (1412) H e803 FreqTableUclk : 1000
0x0586 (1414) H a201 FreqTableDcefclk : 418
0x0588 (1416) H b004 FreqTableDcefclk : 1200
0x058a (1418) H 0000 FreqTableDcefclk : 0
0x058c (1420) H 0000 FreqTableDcefclk : 0
0x058e (1422) H 0000 FreqTableDcefclk : 0
0x0590 (1424) H 0000 FreqTableDcefclk : 0
0x0592 (1426) H 0000 FreqTableDcefclk : 0
0x0594 (1428) H 0000 FreqTableDcefclk : 0
0x0596 (1430) H e701 FreqTableDispclk : 487
0x0598 (1432) H c104 FreqTableDispclk : 1217
0x059a (1434) H 0000 FreqTableDispclk : 0
0x059c (1436) H 0000 FreqTableDispclk : 0
0x059e (1438) H 0000 FreqTableDispclk : 0
0x05a0 (1440) H 0000 FreqTableDispclk : 0
0x05a2 (1442) H 0000 FreqTableDispclk : 0
0x05a4 (1444) H 0000 FreqTableDispclk : 0
0x05a6 (1446) H e701 FreqTablePixclk : 487
0x05a8 (1448) H c104 FreqTablePixclk : 1217
0x05aa (1450) H 0000 FreqTablePixclk : 0
0x05ac (1452) H 0000 FreqTablePixclk : 0
0x05ae (1454) H 0000 FreqTablePixclk : 0
0x05b0 (1456) H 0000 FreqTablePixclk : 0
0x05b2 (1458) H 0000 FreqTablePixclk : 0
0x05b4 (1460) H 0000 FreqTablePixclk : 0
0x05b6 (1462) H 2c01 FreqTablePhyclk : 300
0x05b8 (1464) H 2a03 FreqTablePhyclk : 810
0x05ba (1466) H 0000 FreqTablePhyclk : 0
0x05bc (1468) H 0000 FreqTablePhyclk : 0
0x05be (1470) H 0000 FreqTablePhyclk : 0
0x05c0 (1472) H 0000 FreqTablePhyclk : 0
0x05c2 (1474) H 0000 FreqTablePhyclk : 0
0x05c4 (1476) H 0000 FreqTablePhyclk : 0
0x05c6 (1478) H e701 FreqTableDtbclk : 487
0x05c8 (1480) H c104 FreqTableDtbclk : 1217
0x05ca (1482) H 0000 FreqTableDtbclk : 0
0x05cc (1484) H 0000 FreqTableDtbclk : 0
0x05ce (1486) H 0000 FreqTableDtbclk : 0
0x05d0 (1488) H 0000 FreqTableDtbclk : 0
0x05d2 (1490) H 0000 FreqTableDtbclk : 0
0x05d4 (1492) H 0000 FreqTableDtbclk : 0
0x05d6 (1494) H 2602 FreqTableFclk : 550
0x05d8 (1496) H 9407 FreqTableFclk : 1940
0x05da (1498) H 0000 FreqTableFclk : 0
0x05dc (1500) H 0000 FreqTableFclk : 0
0x05de (1502) H 0000 FreqTableFclk : 0
0x05e0 (1504) H 0000 FreqTableFclk : 0
0x05e2 (1506) H 0000 FreqTableFclk : 0
0x05e4 (1508) H 0000 FreqTableFclk : 0
0x05e6 (1510) I 00000000 Paddingclks : 0
0x05ea (1514) f 00000000 a : 0
0x05ee (1518) f 00000000 b : 0
0x05f2 (1522) f 00000000 c : 0
0x05f6 (1526) f 00000000 a : 0
0x05fa (1530) f 00000000 b : 0
0x05fe (1534) f 00000000 c : 0
0x0602 (1538) f 00000000 a : 0
0x0606 (1542) f 00000000 b : 0
0x060a (1546) f 00000000 c : 0
0x060e (1550) f 00000000 a : 0
0x0612 (1554) f 00000000 b : 0
0x0616 (1558) f 00000000 c : 0
0x061a (1562) f 00000000 a : 0
0x061e (1566) f 00000000 b : 0
0x0622 (1570) f 00000000 c : 0
0x0626 (1574) I 640a0000 DcModeMaxFreq : 2660
0x062a (1578) I b0040000 DcModeMaxFreq : 1200
0x062e (1582) I e8030000 DcModeMaxFreq : 1000
0x0632 (1586) I 94070000 DcModeMaxFreq : 1940
0x0636 (1590) I f2040000 DcModeMaxFreq : 1266
0x063a (1594) I c5050000 DcModeMaxFreq : 1477
0x063e (1598) I f2040000 DcModeMaxFreq : 1266
0x0642 (1602) I c5050000 DcModeMaxFreq : 1477
0x0646 (1606) I b0040000 DcModeMaxFreq : 1200
0x064a (1610) I c1040000 DcModeMaxFreq : 1217
0x064e (1614) I c1040000 DcModeMaxFreq : 1217
0x0652 (1618) I 2a030000 DcModeMaxFreq : 810
0x0656 (1622) I c1040000 DcModeMaxFreq : 1217
0x065a (1626) B 00 FreqTableUclkDiv : 0
0x065b (1627) B 02 FreqTableUclkDiv : 2
0x065c (1628) B 03 FreqTableUclkDiv : 3
0x065d (1629) B 03 FreqTableUclkDiv : 3
0x065e (1630) H 7805 FclkBoostFreq : 1400
0x0660 (1632) H 0000 FclkParamPadding : 0
0x0662 (1634) H 4c01 Mp0clkFreq : 332
0x0664 (1636) H fa01 Mp0clkFreq : 506
0x0666 (1638) H f00a Mp0DpmVoltage : 2800
0x0668 (1640) H 800c Mp0DpmVoltage : 3200
0x066a (1642) H 8c0a MemVddciVoltage : 2700
0x066c (1644) H 800c MemVddciVoltage : 3200
0x066e (1646) H 480d MemVddciVoltage : 3400
0x0670 (1648) H 480d MemVddciVoltage : 3400
0x0672 (1650) H 8813 MemMvddVoltage : 5000
0x0674 (1652) H 1815 MemMvddVoltage : 5400
0x0676 (1654) H 1815 MemMvddVoltage : 5400
0x0678 (1656) H 1815 MemMvddVoltage : 5400
0x067a (1658) H f401 GfxclkFgfxoffEntry : 500
0x067c (1660) H 2003 GfxclkFinit : 800
0x067e (1662) H f401 GfxclkFidle : 500
0x0680 (1664) B 01 GfxclkSource : 1
0x0681 (1665) B 00 GfxclkPadding : 0
0x0682 (1666) B 01 GfxGpoSubFeatureMask : 1
0x0683 (1667) B 02 GfxGpoEnabledWorkPolicyMask : 2
0x0684 (1668) B 5d GfxGpoDisabledWorkPolicyMask : 93
0x0685 (1669) B 00 GfxGpoPadding : 0
0x0686 (1670) I 01000000 GfxGpoVotingAllow : 1
0x068a (1674) I 00000000 GfxGpoPadding32 : 0
0x068e (1678) I 00000000 GfxGpoPadding32 : 0
0x0692 (1682) I 00000000 GfxGpoPadding32 : 0
0x0696 (1686) I 00000000 GfxGpoPadding32 : 0
0x069a (1690) H 0000 GfxDcsFopt : 0
0x069c (1692) H 0000 GfxDcsFclkFopt : 0
0x069e (1694) H 0000 GfxDcsUclkFopt : 0
0x06a0 (1696) H 0000 DcsGfxOffVoltage : 0
0x06a2 (1698) H 0000 DcsMinGfxOffTime : 0
0x06a4 (1700) H 0000 DcsMaxGfxOffTime : 0
0x06a6 (1702) I 00000000 DcsMinCreditAccum : 0
0x06aa (1706) H 0000 DcsExitHysteresis : 0
0x06ac (1708) H 0000 DcsTimeout : 0
0x06ae (1710) I 00000000 DcsParamPadding : 0
0x06b2 (1714) I 00000000 DcsParamPadding : 0
0x06b6 (1718) I 00000000 DcsParamPadding : 0
0x06ba (1722) I 00000000 DcsParamPadding : 0
0x06be (1726) I 00000000 DcsParamPadding : 0
0x06c2 (1730) H 2a16 FlopsPerByteTable : 5674
0x06c4 (1732) H d715 FlopsPerByteTable : 5591
0x06c6 (1734) H 8415 FlopsPerByteTable : 5508
0x06c8 (1736) H 3015 FlopsPerByteTable : 5424
0x06ca (1738) H dd14 FlopsPerByteTable : 5341
0x06cc (1740) H 8a14 FlopsPerByteTable : 5258
0x06ce (1742) H 3614 FlopsPerByteTable : 5174
0x06d0 (1744) H e313 FlopsPerByteTable : 5091
0x06d2 (1746) H 9013 FlopsPerByteTable : 5008
0x06d4 (1748) H 3d13 FlopsPerByteTable : 4925
0x06d6 (1750) H e912 FlopsPerByteTable : 4841
0x06d8 (1752) H 9612 FlopsPerByteTable : 4758
0x06da (1754) H b111 FlopsPerByteTable : 4529
0x06dc (1756) H cc10 FlopsPerByteTable : 4300
0x06de (1758) H e70f FlopsPerByteTable : 4071
0x06e0 (1760) H 020f FlopsPerByteTable : 3842
0x06e2 (1762) B 00 LowestUclkReservedForUlv : 0
0x06e3 (1763) B 00 PaddingMem : 0
0x06e4 (1764) B 00 PaddingMem : 0
0x06e5 (1765) B 00 PaddingMem : 0
0x06e6 (1766) B 03 UclkDpmPstates : 3
0x06e7 (1767) B 02 UclkDpmPstates : 2
0x06e8 (1768) B 01 UclkDpmPstates : 1
0x06e9 (1769) B 00 UclkDpmPstates : 0
0x06ea (1770) H 0000 Fmin : 0
0x06ec (1772) H 0000 Fmax : 0
0x06ee (1774) H 0000 Fmin : 0
0x06f0 (1776) H 0000 Fmax : 0
0x06f2 (1778) H 0000 UclkDpmMidstepFreq : 0
0x06f4 (1780) H 0000 UclkMidstepPadding : 0
0x06f6 (1782) B 00 PcieGenSpeed : 0
0x06f7 (1783) B 03 PcieGenSpeed : 3
0x06f8 (1784) B 01 PcieLaneCount : 1
0x06f9 (1785) B 06 PcieLaneCount : 6
0x06fa (1786) H 3601 LclkFreq : 310
0x06fc (1788) H 6b02 LclkFreq : 619
0x06fe (1790) H 3700 FanStopTemp : 55
0x0700 (1792) H 4600 FanStartTemp : 70
0x0702 (1794) H 9001 FanGain : 400
0x0704 (1796) H 9001 FanGain : 400
0x0706 (1798) H 9001 FanGain : 400
0x0708 (1800) H 9001 FanGain : 400
0x070a (1802) H 9001 FanGain : 400
0x070c (1804) H 9001 FanGain : 400
0x070e (1806) H 9001 FanGain : 400
0x0710 (1808) H 9001 FanGain : 400
0x0712 (1810) H 9001 FanGain : 400
0x0714 (1812) H 9001 FanGain : 400
0x0716 (1814) H 1900 FanPwmMin : 25
0x0718 (1816) H 7206 FanAcousticLimitRpm : 1650
0x071a (1818) H d007 FanThrottlingRpm : 2000
0x071c (1820) H e40c FanMaximumRpm : 3300
0x071e (1822) H 0000 MGpuFanBoostLimitRpm : 0
0x0720 (1824) H 5f00 FanTargetTemperature : 95
0x0722 (1826) H f401 FanTargetGfxclk : 500
0x0724 (1828) H 0000 FanPadding16 : 0
0x0726 (1830) B 01 FanTempInputSelect : 1
0x0727 (1831) B 00 FanPadding : 0
0x0728 (1832) B 01 FanZeroRpmEnable : 1
0x0729 (1833) B 02 FanTachEdgePerRev : 2
0x072a (1834) h 0000 FuzzyFan_ErrorSetDelta : 0
0x072c (1836) h 0000 FuzzyFan_ErrorRateSetDelta : 0
0x072e (1838) h 0000 FuzzyFan_PwmSetDelta : 0
0x0730 (1840) H 0000 FuzzyFan_Reserved : 0
0x0732 (1842) B 00 OverrideAvfsGb : 0
0x0733 (1843) B 00 OverrideAvfsGb : 0
0x0734 (1844) B 01 BtcGbGfxDfllModelSelect : 1
0x0735 (1845) B 00 Padding8_Avfs : 0
0x0736 (1846) f 00000000 a : 0
0x073a (1850) f 00000000 b : 0
0x073e (1854) f 00000000 c : 0
0x0742 (1858) f 00000000 a : 0
0x0746 (1862) f 00000000 b : 0
0x074a (1866) f 00000000 c : 0
0x074e (1870) f 0d54863d a : 0.06559
0x0752 (1874) f bc05d2bd b :-0.10255
0x0756 (1878) f 1f80143e c : 0.14502
0x075a (1882) f 00000000 a : 0
0x075e (1886) f 00000000 b : 0
0x0762 (1890) f 00000000 c : 0
0x0766 (1894) f 00000000 a : 0
0x076a (1898) f 00000000 b : 0
0x076e (1902) f 00000000 c : 0
0x0772 (1906) f 00000000 m : 0
0x0776 (1910) f 00000000 b : 0
0x077a (1914) f 00000000 m : 0
0x077e (1918) f 00000000 b : 0
0x0782 (1922) f 9a99993e Fset : 0.3
0x0786 (1926) f 0000c03f Fset : 1.5
0x078a (1930) f 33331340 Fset : 2.3
0x078e (1934) f 00002040 Fset : 2.5
0x0792 (1938) f 66664640 Fset : 3.1
0x0796 (1942) f 0ad7233d Vdroop : 0.04
0x079a (1946) f dd24863d Vdroop : 0.0655
0x079e (1950) f a245b63d Vdroop : 0.089
0x07a2 (1954) f 39b4c83d Vdroop : 0.098
0x07a6 (1958) f c74bb73e Vdroop : 0.358
0x07aa (1962) f 7593983d a : 0.0745
0x07ae (1966) f 2fdd84be b :-0.2595
0x07b2 (1970) f a3927a3e c : 0.2447
0x07b6 (1974) f e56121bd a :-0.0394
0x07ba (1978) f 04568e3e b : 0.278
0x07be (1982) f c5722bbe c :-0.16743
0x07c2 (1986) H c000 DcTol : 192
0x07c4 (1988) H c000 DcTol : 192
0x07c6 (1990) B 01 DcBtcEnabled : 1
0x07c7 (1991) B 01 DcBtcEnabled : 1
0x07c8 (1992) B 00 Padding8_GfxBtc : 0
0x07c9 (1993) B 00 Padding8_GfxBtc : 0
0x07ca (1994) H 0000 DcBtcMin : 0
0x07cc (1996) H 0000 DcBtcMin : 0
0x07ce (1998) H c000 DcBtcMax : 192
0x07d0 (2000) H c000 DcBtcMax : 192
0x07d2 (2002) H 1900 DcBtcGb : 25
0x07d4 (2004) H 1900 DcBtcGb : 25
0x07d6 (2006) B 00 XgmiDpmPstates : 0
0x07d7 (2007) B 00 XgmiDpmPstates : 0
0x07d8 (2008) B 00 XgmiDpmSpare : 0
0x07d9 (2009) B 00 XgmiDpmSpare : 0
0x07da (2010) I 00000000 DebugOverrides : 0
0x07de (2014) f 00000000 a : 0
0x07e2 (2018) f 00000000 b : 0
0x07e6 (2022) f 00000000 c : 0
0x07ea (2026) f 00000000 a : 0
0x07ee (2030) f 00000000 b : 0
0x07f2 (2034) f 00000000 c : 0
0x07f6 (2038) f 00000000 a : 0
0x07fa (2042) f 00000000 b : 0
0x07fe (2046) f 00000000 c : 0
0x0802 (2050) f 00000000 a : 0
0x0806 (2054) f 00000000 b : 0
0x080a (2058) f 00000000 c : 0
0x080e (2062) B 00 CustomerVariant : 0
0x080f (2063) B 01 VcBtcEnabled : 1
0x0810 (2064) H 3b0b VcBtcVminT0 : 2875
0x0812 (2066) H 4501 VcBtcFixedVminAgingOffset : 325
0x0814 (2068) H 0000 VcBtcVmin2PsmDegrationGb : 0
0x0816 (2070) f 3480373b VcBtcPsmA : 0.0028
0x081a (2074) f 9fabcd3e VcBtcPsmB : 0.4017
0x081e (2078) f ed0d3e3c VcBtcVminA : 0.0116
0x0822 (2082) f 7593f83e VcBtcVminB : 0.4855
0x0826 (2086) H 0000 LedGpio : 0
0x0828 (2088) H 0100 GfxPowerStagesGpio : 1
0x082a (2090) I 00000000 SkuReserved : 0
0x082e (2094) I 00000000 SkuReserved : 0
0x0832 (2098) I 00000000 SkuReserved : 0
0x0836 (2102) I 00000000 SkuReserved : 0
0x083a (2106) I 00000000 SkuReserved : 0
0x083e (2110) I 00000000 SkuReserved : 0
0x0842 (2114) I 00000000 SkuReserved : 0
0x0846 (2118) I 00000000 SkuReserved : 0
0x084a (2122) I 00000000 GamingClk : 0
0x084e (2126) I 00000000 GamingClk : 0
0x0852 (2130) I 00000000 GamingClk : 0
0x0856 (2134) I 00000000 GamingClk : 0
0x085a (2138) I 00000000 GamingClk : 0
0x085e (2142) I 00000000 GamingClk : 0
0x0862 (2146) B 00 Enabled : 0
0x0863 (2147) B 00 Speed : 0
0x0864 (2148) B 00 SlaveAddress : 0
0x0865 (2149) B 00 ControllerPort : 0
0x0866 (2150) B 00 ControllerName : 0
0x0867 (2151) B 00 ThermalThrotter : 0
0x0868 (2152) B 00 I2cProtocol : 0
0x0869 (2153) B 00 PaddingConfig : 0
0x086a (2154) B 00 Enabled : 0
0x086b (2155) B 00 Speed : 0
0x086c (2156) B 00 SlaveAddress : 0
0x086d (2157) B 00 ControllerPort : 0
0x086e (2158) B 00 ControllerName : 0
0x086f (2159) B 00 ThermalThrotter : 0
0x0870 (2160) B 00 I2cProtocol : 0
0x0871 (2161) B 00 PaddingConfig : 0
0x0872 (2162) B 00 Enabled : 0
0x0873 (2163) B 00 Speed : 0
0x0874 (2164) B 00 SlaveAddress : 0
0x0875 (2165) B 00 ControllerPort : 0
0x0876 (2166) B 00 ControllerName : 0
0x0877 (2167) B 00 ThermalThrotter : 0
0x0878 (2168) B 00 I2cProtocol : 0
0x0879 (2169) B 00 PaddingConfig : 0
0x087a (2170) B 00 Enabled : 0
0x087b (2171) B 00 Speed : 0
0x087c (2172) B 00 SlaveAddress : 0
0x087d (2173) B 00 ControllerPort : 0
0x087e (2174) B 00 ControllerName : 0
0x087f (2175) B 00 ThermalThrotter : 0
0x0880 (2176) B 00 I2cProtocol : 0
0x0881 (2177) B 00 PaddingConfig : 0
0x0882 (2178) B 00 Enabled : 0
0x0883 (2179) B 00 Speed : 0
0x0884 (2180) B 00 SlaveAddress : 0
0x0885 (2181) B 00 ControllerPort : 0
0x0886 (2182) B 00 ControllerName : 0
0x0887 (2183) B 00 ThermalThrotter : 0
0x0888 (2184) B 00 I2cProtocol : 0
0x0889 (2185) B 00 PaddingConfig : 0
0x088a (2186) B 00 Enabled : 0
0x088b (2187) B 00 Speed : 0
0x088c (2188) B 00 SlaveAddress : 0
0x088d (2189) B 00 ControllerPort : 0
0x088e (2190) B 00 ControllerName : 0
0x088f (2191) B 00 ThermalThrotter : 0
0x0890 (2192) B 00 I2cProtocol : 0
0x0891 (2193) B 00 PaddingConfig : 0
0x0892 (2194) B 00 Enabled : 0
0x0893 (2195) B 00 Speed : 0
0x0894 (2196) B 00 SlaveAddress : 0
0x0895 (2197) B 00 ControllerPort : 0
0x0896 (2198) B 00 ControllerName : 0
0x0897 (2199) B 00 ThermalThrotter : 0
0x0898 (2200) B 00 I2cProtocol : 0
0x0899 (2201) B 00 PaddingConfig : 0
0x089a (2202) B 00 Enabled : 0
0x089b (2203) B 00 Speed : 0
0x089c (2204) B 00 SlaveAddress : 0
0x089d (2205) B 00 ControllerPort : 0
0x089e (2206) B 00 ControllerName : 0
0x089f (2207) B 00 ThermalThrotter : 0
0x08a0 (2208) B 00 I2cProtocol : 0
0x08a1 (2209) B 00 PaddingConfig : 0
0x08a2 (2210) B 00 Enabled : 0
0x08a3 (2211) B 00 Speed : 0
0x08a4 (2212) B 00 SlaveAddress : 0
0x08a5 (2213) B 00 ControllerPort : 0
0x08a6 (2214) B 00 ControllerName : 0
0x08a7 (2215) B 00 ThermalThrotter : 0
0x08a8 (2216) B 00 I2cProtocol : 0
0x08a9 (2217) B 00 PaddingConfig : 0
0x08aa (2218) B 00 Enabled : 0
0x08ab (2219) B 00 Speed : 0
0x08ac (2220) B 00 SlaveAddress : 0
0x08ad (2221) B 00 ControllerPort : 0
0x08ae (2222) B 00 ControllerName : 0
0x08af (2223) B 00 ThermalThrotter : 0
0x08b0 (2224) B 00 I2cProtocol : 0
0x08b1 (2225) B 00 PaddingConfig : 0
0x08b2 (2226) B 00 Enabled : 0
0x08b3 (2227) B 00 Speed : 0
0x08b4 (2228) B 00 SlaveAddress : 0
0x08b5 (2229) B 00 ControllerPort : 0
0x08b6 (2230) B 00 ControllerName : 0
0x08b7 (2231) B 00 ThermalThrotter : 0
0x08b8 (2232) B 00 I2cProtocol : 0
0x08b9 (2233) B 00 PaddingConfig : 0
0x08ba (2234) B 00 Enabled : 0
0x08bb (2235) B 00 Speed : 0
0x08bc (2236) B 00 SlaveAddress : 0
0x08bd (2237) B 00 ControllerPort : 0
0x08be (2238) B 00 ControllerName : 0
0x08bf (2239) B 00 ThermalThrotter : 0
0x08c0 (2240) B 00 I2cProtocol : 0
0x08c1 (2241) B 00 PaddingConfig : 0
0x08c2 (2242) B 00 Enabled : 0
0x08c3 (2243) B 00 Speed : 0
0x08c4 (2244) B 00 SlaveAddress : 0
0x08c5 (2245) B 00 ControllerPort : 0
0x08c6 (2246) B 00 ControllerName : 0
0x08c7 (2247) B 00 ThermalThrotter : 0
0x08c8 (2248) B 00 I2cProtocol : 0
0x08c9 (2249) B 00 PaddingConfig : 0
0x08ca (2250) B 00 Enabled : 0
0x08cb (2251) B 00 Speed : 0
0x08cc (2252) B 00 SlaveAddress : 0
0x08cd (2253) B 00 ControllerPort : 0
0x08ce (2254) B 00 ControllerName : 0
0x08cf (2255) B 00 ThermalThrotter : 0
0x08d0 (2256) B 00 I2cProtocol : 0
0x08d1 (2257) B 00 PaddingConfig : 0
0x08d2 (2258) B 00 Enabled : 0
0x08d3 (2259) B 00 Speed : 0
0x08d4 (2260) B 00 SlaveAddress : 0
0x08d5 (2261) B 00 ControllerPort : 0
0x08d6 (2262) B 00 ControllerName : 0
0x08d7 (2263) B 00 ThermalThrotter : 0
0x08d8 (2264) B 00 I2cProtocol : 0
0x08d9 (2265) B 00 PaddingConfig : 0
0x08da (2266) B 00 Enabled : 0
0x08db (2267) B 00 Speed : 0
0x08dc (2268) B 00 SlaveAddress : 0
0x08dd (2269) B 00 ControllerPort : 0
0x08de (2270) B 00 ControllerName : 0
0x08df (2271) B 00 ThermalThrotter : 0
0x08e0 (2272) B 00 I2cProtocol : 0
0x08e1 (2273) B 00 PaddingConfig : 0
0x08e2 (2274) B 00 GpioScl : 0
0x08e3 (2275) B 00 GpioSda : 0
0x08e4 (2276) B 00 FchUsbPdSlaveAddr : 0
0x08e5 (2277) B 00 I2cSpare : 0
0x08e6 (2278) B 00 VddGfxVrMapping : 0
0x08e7 (2279) B 00 VddSocVrMapping : 0
0x08e8 (2280) B 00 VddMem0VrMapping : 0
0x08e9 (2281) B 00 VddMem1VrMapping : 0
0x08ea (2282) B 00 GfxUlvPhaseSheddingMask : 0
0x08eb (2283) B 00 SocUlvPhaseSheddingMask : 0
0x08ec (2284) B 00 VddciUlvPhaseSheddingMask : 0
0x08ed (2285) B 00 MvddUlvPhaseSheddingMask : 0
0x08ee (2286) H 0000 GfxMaxCurrent : 0
0x08f0 (2288) b 00 GfxOffset : 0
0x08f1 (2289) B 00 Padding_TelemetryGfx : 0
0x08f2 (2290) H 0000 SocMaxCurrent : 0
0x08f4 (2292) b 00 SocOffset : 0
0x08f5 (2293) B 00 Padding_TelemetrySoc : 0
0x08f6 (2294) H 0000 Mem0MaxCurrent : 0
0x08f8 (2296) b 00 Mem0Offset : 0
0x08f9 (2297) B 00 Padding_TelemetryMem0 : 0
0x08fa (2298) H 0000 Mem1MaxCurrent : 0
0x08fc (2300) b 00 Mem1Offset : 0
0x08fd (2301) B 00 Padding_TelemetryMem1 : 0
0x08fe (2302) I 00000000 MvddRatio : 0
0x0902 (2306) B 00 AcDcGpio : 0
0x0903 (2307) B 00 AcDcPolarity : 0
0x0904 (2308) B 00 VR0HotGpio : 0
0x0905 (2309) B 00 VR0HotPolarity : 0
0x0906 (2310) B 00 VR1HotGpio : 0
0x0907 (2311) B 00 VR1HotPolarity : 0
0x0908 (2312) B 00 GthrGpio : 0
0x0909 (2313) B 00 GthrPolarity : 0
0x090a (2314) B 00 LedPin0 : 0
0x090b (2315) B 00 LedPin1 : 0
0x090c (2316) B 00 LedPin2 : 0
0x090d (2317) B 00 LedEnableMask : 0
0x090e (2318) B 00 LedPcie : 0
0x090f (2319) B 00 LedError : 0
0x0910 (2320) B 00 LedSpare1 : 0
0x0911 (2321) B 01 LedSpare1 : 1
0x0912 (2322) B 00 PllGfxclkSpreadEnabled : 0
0x0913 (2323) B 00 PllGfxclkSpreadPercent : 0
0x0914 (2324) H 0000 PllGfxclkSpreadFreq : 0
0x0916 (2326) B 00 DfllGfxclkSpreadEnabled : 0
0x0917 (2327) B 00 DfllGfxclkSpreadPercent : 0
0x0918 (2328) H 0000 DfllGfxclkSpreadFreq : 0
0x091a (2330) H 0000 UclkSpreadPadding : 0
0x091c (2332) H 0000 UclkSpreadFreq : 0
0x091e (2334) B 00 FclkSpreadEnabled : 0
0x091f (2335) B 00 FclkSpreadPercent : 0
0x0920 (2336) H 0000 FclkSpreadFreq : 0
0x0922 (2338) I 00000000 MemoryChannelEnabled : 0
0x0926 (2342) B 00 DramBitWidth : 0
0x0927 (2343) B 00 PaddingMem1 : 0
0x0928 (2344) B 00 PaddingMem1 : 0
0x0929 (2345) B 00 PaddingMem1 : 0
0x092a (2346) H 0000 TotalBoardPower : 0
0x092c (2348) H 0000 BoardPowerPadding : 0
0x092e (2350) B 00 XgmiLinkSpeed : 0
0x092f (2351) B 00 XgmiLinkSpeed : 0
0x0930 (2352) B 00 XgmiLinkSpeed : 0
0x0931 (2353) B 00 XgmiLinkSpeed : 0
0x0932 (2354) B 00 XgmiLinkWidth : 0
0x0933 (2355) B 00 XgmiLinkWidth : 0
0x0934 (2356) B 00 XgmiLinkWidth : 0
0x0935 (2357) B 00 XgmiLinkWidth : 0
0x0936 (2358) H 0000 XgmiFclkFreq : 0
0x0938 (2360) H 0000 XgmiFclkFreq : 0
0x093a (2362) H 0000 XgmiFclkFreq : 0
0x093c (2364) H 0000 XgmiFclkFreq : 0
0x093e (2366) H 0000 XgmiSocVoltage : 0
0x0940 (2368) H 0000 XgmiSocVoltage : 0
0x0942 (2370) H 0000 XgmiSocVoltage : 0
0x0944 (2372) H 0000 XgmiSocVoltage : 0
0x0946 (2374) B 00 HsrEnabled : 0
0x0947 (2375) B 00 VddqOffEnabled : 0
0x0948 (2376) B 00 PaddingUmcFlags : 0
0x0949 (2377) B 00 PaddingUmcFlags : 0
0x094a (2378) B 00 UclkSpreadPercent : 0
0x094b (2379) B 00 UclkSpreadPercent : 0
0x094c (2380) B 00 UclkSpreadPercent : 0
0x094d (2381) B 00 UclkSpreadPercent : 0
0x094e (2382) B 00 UclkSpreadPercent : 0
0x094f (2383) B 00 UclkSpreadPercent : 0
0x0950 (2384) B 00 UclkSpreadPercent : 0
0x0951 (2385) B 00 UclkSpreadPercent : 0
0x0952 (2386) B 00 UclkSpreadPercent : 0
0x0953 (2387) B 00 UclkSpreadPercent : 0
0x0954 (2388) B 00 UclkSpreadPercent : 0
0x0955 (2389) B 00 UclkSpreadPercent : 0
0x0956 (2390) B 00 UclkSpreadPercent : 0
0x0957 (2391) B 00 UclkSpreadPercent : 0
0x0958 (2392) B 00 UclkSpreadPercent : 0
0x0959 (2393) B 00 UclkSpreadPercent : 0
0x095a (2394) I 00000000 BoardReserved : 0
0x095e (2398) I 00000000 BoardReserved : 0
0x0962 (2402) I 00000000 BoardReserved : 0
0x0966 (2406) I 00000000 BoardReserved : 0
0x096a (2410) I 00000000 BoardReserved : 0
0x096e (2414) I 00000000 BoardReserved : 0
0x0972 (2418) I 00000000 BoardReserved : 0
0x0976 (2422) I 00000000 BoardReserved : 0
0x097a (2426) I 00000000 BoardReserved : 0
0x097e (2430) I 00000000 BoardReserved : 0
0x0982 (2434) I 00000000 BoardReserved : 0
0x0986 (2438) I 00000000 MmHubPadding : 0
0x098a (2442) I 00000000 MmHubPadding : 0
0x098e (2446) I 00000000 MmHubPadding : 0
0x0992 (2450) I 00000000 MmHubPadding : 0
0x0996 (2454) I 00000000 MmHubPadding : 0
0x099a (2458) I 00000000 MmHubPadding : 0
0x099e (2462) I 00000000 MmHubPadding : 0
0x09a2 (2466) I 00001e06 MmHubPadding : 102629376
================================================
FILE: test/AMD.RX7900XTX.24576.230323.rom.dump
================================================
header:
structuresize: 5424
format_revision: 20
content_revision: 0
table_revision: 3
padding: 0
table_size: 832
golden_pp_id: 3900
golden_revision: 21521
format_id: 133
platform_caps: 8
thermal_controller_type: 29
small_power_limit1: 0
small_power_limit2: 0
boost_power_limit: 0
software_shutdown_temp: 118
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
reserve 3: 0
reserve 4: 0
reserve 5: 0
reserve 6: 0
reserve 7: 0
reserve 8: 0
reserve 9: 0
reserve 10: 0
reserve 11: 0
reserve 12: 0
reserve 13: 0
reserve 14: 0
reserve 15: 0
reserve 16: 0
reserve 17: 0
reserve 18: 0
reserve 19: 0
reserve 20: 0
reserve 21: 0
reserve 22: 0
reserve 23: 0
reserve 24: 0
reserve 25: 0
reserve 26: 0
reserve 27: 0
reserve 28: 0
reserve 29: 0
reserve 30: 0
reserve 31: 0
reserve 32: 0
reserve 33: 0
reserve 34: 0
reserve 35: 0
reserve 36: 0
reserve 37: 0
reserve 38: 0
reserve 39: 0
reserve 40: 0
reserve 41: 0
reserve 42: 0
reserve 43: 0
reserve 44: 0
overdrive_table:
revision: 131
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
feature_count: 22
setting_count: 41
cap:
cap 0: 1 (GFXCLK_LIMITS)
cap 1: 1 (UCLK_LIMITS)
cap 2: 1 (POWER_LIMIT)
cap 3: 1 (FAN_ACOUSTIC_LIMIT)
cap 4: 1 (FAN_SPEED_MIN)
cap 5: 1 (TEMPERATURE_FAN)
cap 6: 1 (TEMPERATURE_SYSTEM)
cap 7: 1 (MEMORY_TIMING_TUNE)
cap 8: 1 (FAN_ZERO_RPM_CONTROL)
cap 9: 1 (AUTO_UV_ENGINE)
cap 10: 1 (AUTO_OC_ENGINE)
cap 11: 1 (AUTO_OC_MEMORY)
cap 12: 1 (FAN_CURVE)
cap 13: 0 (AUTO_FAN_ACOUSTIC_LIMIT)
cap 14: 1 (POWER_MODE)
cap 15: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET)
cap 16: 0
cap 17: 1
cap 18: 0
cap 19: 0
cap 20: 0
cap 21: 0
cap 22: 0
cap 23: 0
cap 24: 0
cap 25: 0
cap 26: 0
cap 27: 0
cap 28: 0
cap 29: 0
cap 30: 0
cap 31: 0
max:
max 0: 5000 (GFXCLKFMAX)
max 1: 5000 (GFXCLKFMIN)
max 2: 1500 (UCLKFMIN)
max 3: 1500 (UCLKFMAX)
max 4: 15 (POWERPERCENTAGE)
max 5: 3300 (FANRPMMIN)
max 6: 3300 (FANRPMACOUSTICLIMIT)
max 7: 105 (FANTARGETTEMPERATURE)
max 8: 110 (OPERATINGTEMPMAX)
max 9: 1 (ACTIMING)
max 10: 1 (FAN_ZERO_RPM_CONTROL)
max 11: 1 (AUTOUVENGINE)
max 12: 1 (AUTOOCENGINE)
max 13: 1 (AUTOOCMEMORY)
max 14: 100 (FAN_CURVE_TEMPERATURE_1)
max 15: 100 (FAN_CURVE_SPEED_1)
max 16: 100 (FAN_CURVE_TEMPERATURE_2)
max 17: 100 (FAN_CURVE_SPEED_2)
max 18: 100 (FAN_CURVE_TEMPERATURE_3)
max 19: 100 (FAN_CURVE_SPEED_3)
max 20: 100 (FAN_CURVE_TEMPERATURE_4)
max 21: 100 (FAN_CURVE_SPEED_4)
max 22: 100 (FAN_CURVE_TEMPERATURE_5)
max 23: 100 (FAN_CURVE_SPEED_5)
max 24: 0 (AUTO_FAN_ACOUSTIC_LIMIT)
max 25: 1 (POWER_MODE)
max 26: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1)
max 27: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2)
max 28: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3)
max 29: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4)
max 30: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5)
max 31: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6)
max 32: 0
max 33: 0
max 34: 0
max 35: 0
max 36: 0
max 37: 0
max 38: 0
max 39: 0
max 40: 0
max 41: 0
max 42: 0
max 43: 0
max 44: 0
max 45: 0
max 46: 0
max 47: 0
max 48: 0
max 49: 0
max 50: 0
max 51: 0
max 52: 0
max 53: 0
max 54: 0
max 55: 0
max 56: 0
max 57: 0
max 58: 0
max 59: 0
max 60: 0
max 61: 0
max 62: 0
max 63: 0
min:
min 0: 500 (GFXCLKFMAX)
min 1: 500 (GFXCLKFMIN)
min 2: 97 (UCLKFMIN)
min 3: 97 (UCLKFMAX)
min 4: 10 (POWERPERCENTAGE)
min 5: 500 (FANRPMMIN)
min 6: 500 (FANRPMACOUSTICLIMIT)
min 7: 25 (FANTARGETTEMPERATURE)
min 8: 50 (OPERATINGTEMPMAX)
min 9: 0 (ACTIMING)
min 10: 0 (FAN_ZERO_RPM_CONTROL)
min 11: 0 (AUTOUVENGINE)
min 12: 0 (AUTOOCENGINE)
min 13: 0 (AUTOOCMEMORY)
min 14: 25 (FAN_CURVE_TEMPERATURE_1)
min 15: 15 (FAN_CURVE_SPEED_1)
min 16: 25 (FAN_CURVE_TEMPERATURE_2)
min 17: 15 (FAN_CURVE_SPEED_2)
min 18: 25 (FAN_CURVE_TEMPERATURE_3)
min 19: 15 (FAN_CURVE_SPEED_3)
min 20: 25 (FAN_CURVE_TEMPERATURE_4)
min 21: 15 (FAN_CURVE_SPEED_4)
min 22: 25 (FAN_CURVE_TEMPERATURE_5)
min 23: 15 (FAN_CURVE_SPEED_5)
min 24: 0 (AUTO_FAN_ACOUSTIC_LIMIT)
min 25: 0 (POWER_MODE)
min 26: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1)
min 27: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2)
min 28: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3)
min 29: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4)
min 30: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5)
min 31: 0 (PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6)
min 32: 0
min 33: 10
min 34: 0
min 35: 0
min 36: 0
min 37: 0
min 38: 0
min 39: 0
min 40: 0
min 41: 0
min 42: 0
min 43: 0
min 44: 0
min 45: 0
min 46: 0
min 47: 0
min 48: 0
min 49: 0
min 50: 0
min 51: 0
min 52: 0
min 53: 0
min 54: 0
min 55: 0
min 56: 0
min 57: 0
min 58: 0
min 59: 0
min 60: 0
min 61: 0
min 62: 0
min 63: 0
pm_setting:
pm_setting 0: 0
pm_setting 1: 0
pm_setting 2: 0
pm_setting 3: 10
pm_setting 4: 105
pm_setting 5: 95
pm_setting 6: 0
pm_setting 7: 75
pm_setting 8: 1550
pm_setting 9: 1700
pm_setting 10: 0
pm_setting 11: 3000
pm_setting 12: 1550
pm_setting 13: 3000
pm_setting 14: 0
pm_setting 15: 3000
pm_setting 16: 0
pm_setting 17: 0
pm_setting 18: 0
pm_setting 19: 0
pm_setting 20: 0
pm_setting 21: 0
pm_setting 22: 0
pm_setting 23: 0
pm_setting 24: 0
pm_setting 25: 0
pm_setting 26: 0
pm_setting 27: 0
pm_setting 28: 0
pm_setting 29: 0
pm_setting 30: 0
pm_setting 31: 0
padding1: 0
smc_pptable:
SkuTable:
Version: 41
FeaturesToRun:
FeaturesToRun 0: 1912602623
FeaturesToRun 1: 256952
TotalPowerConfig: 1
CustomerVariant: 0
MemoryTemperatureTypeMask: 4
SmartShiftVersion: 0
SocketPowerLimitAc:
SocketPowerLimitAc 0: 327
SocketPowerLimitAc 1: 1200
SocketPowerLimitAc 2: 0
SocketPowerLimitAc 3: 0
SocketPowerLimitDc:
SocketPowerLimitDc 0: 0
SocketPowerLimitDc 1: 0
SocketPowerLimitDc 2: 0
SocketPowerLimitDc 3: 0
SocketPowerLimitSmartShift2: 0
EnableLegacyPptLimit: 0
UseInputTelemetry: 0
SmartShiftMinReportedPptinDcs: 0
PaddingPpt:
PaddingPpt 0: 0
VrTdcLimit:
VrTdcLimit 0: 315
VrTdcLimit 1: 82
VrTdcLimit 2: 86
PlatformTdcLimit:
PlatformTdcLimit 0: 448
PlatformTdcLimit 1: 82
PlatformTdcLimit 2: 86
TemperatureLimit:
TemperatureLimit 0: 100
TemperatureLimit 1: 110
TemperatureLimit 2: 110
TemperatureLimit 3: 110
TemperatureLimit 4: 108
TemperatureLimit 5: 115
TemperatureLimit 6: 115
TemperatureLimit 7: 115
TemperatureLimit 8: 115
TemperatureLimit 9: 115
TemperatureLimit 10: 0
TemperatureLimit 11: 0
TemperatureLimit 12: 0
HwCtfTempLimit: 120
PaddingInfra: 0
FitControllerFailureRateLimit: 0
FitControllerGfxDutyCycle: 0
FitControllerSocDutyCycle: 0
FitControllerSocOffset: 0
GfxApccPlusResidencyLimit: 0
ThrottlerControlMask: 254962
FwDStateMask: 27000831
UlvVoltageOffset:
UlvVoltageOffset 0: 100
UlvVoltageOffset 1: 100
UlvVoltageOffsetU: 100
DeepUlvVoltageOffsetSoc: 100
DefaultMaxVoltage:
DefaultMaxVoltage 0: 4600
DefaultMaxVoltage 1: 4800
BoostMaxVoltage:
BoostMaxVoltage 0: 4600
BoostMaxVoltage 1: 4800
VminTempHystersis:
VminTempHystersis 0: 5
VminTempHystersis 1: 5
VminTempThreshold:
VminTempThreshold 0: 55
VminTempThreshold 1: 55
Vmin_Hot_T0:
Vmin_Hot_T0 0: 2800
Vmin_Hot_T0 1: 2800
Vmin_Cold_T0:
Vmin_Cold_T0 0: 2800
Vmin_Cold_T0 1: 2800
Vmin_Hot_Eol:
Vmin_Hot_Eol 0: 2800
Vmin_Hot_Eol 1: 2800
Vmin_Cold_Eol:
Vmin_Cold_Eol 0: 2800
Vmin_Cold_Eol 1: 2800
Vmin_Aging_Offset:
Vmin_Aging_Offset 0: 0
Vmin_Aging_Offset 1: 0
Spare_Vmin_Plat_Offset_Hot:
Spare_Vmin_Plat_Offset_Hot 0: 0
Spare_Vmin_Plat_Offset_Hot 1: 0
Spare_Vmin_Plat_Offset_Cold:
Spare_Vmin_Plat_Offset_Cold 0: 0
Spare_Vmin_Plat_Offset_Cold 1: 0
VcBtcFixedVminAgingOffset:
VcBtcFixedVminAgingOffset 0: 0
VcBtcFixedVminAgingOffset 1: 0
VcBtcVmin2PsmDegrationGb:
VcBtcVmin2PsmDegrationGb 0: 0
VcBtcVmin2PsmDegrationGb 1: 0
VcBtcPsmA:
VcBtcPsmA 0: 0
VcBtcPsmA 1: 0
VcBtcPsmB:
VcBtcPsmB 0: 0
VcBtcPsmB 1: 0
VcBtcVminA:
VcBtcVminA 0: 0
VcBtcVminA 1: 0
VcBtcVminB:
VcBtcVminB 0: 0
VcBtcVminB 1: 0
PerPartVminEnabled:
PerPartVminEnabled 0: 1
PerPartVminEnabled 1: 0
VcBtcEnabled:
VcBtcEnabled 0: 0
VcBtcEnabled 1: 0
SocketPowerLimitAcTau:
SocketPowerLimitAcTau 0: 100
SocketPowerLimitAcTau 1: 10
SocketPowerLimitAcTau 2: 0
SocketPowerLimitAcTau 3: 0
SocketPowerLimitDcTau:
SocketPowerLimitDcTau 0: 0
SocketPowerLimitDcTau 1: 0
SocketPowerLimitDcTau 2: 0
SocketPowerLimitDcTau 3: 0
Vmin_droop:
a: 0
b: 0.075
c:-0.01
SpareVmin:
SpareVmin 0: 0
SpareVmin 1: 0
SpareVmin 2: 0
SpareVmin 3: 0
SpareVmin 4: 0
SpareVmin 5: 0
SpareVmin 6: 131072
SpareVmin 7: 0
SpareVmin 8: 0
DpmDescriptor:
DpmDescriptor 0:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 3
ConversionToAvfsClk:
m: 1
b: 0
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 500
Padding2: 0
DpmDescriptor 1:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.313
b: 0.194
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 262400
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 2:
Padding: 0
SnapToDiscrete: 1
NumDiscreteLevels: 4
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.523
b: 0.0967
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 3:
Padding: 0
SnapToDiscrete: 1
NumDiscreteLevels: 8
CalculateFopt: 3
ConversionToAvfsClk:
m: 1
b: 0
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 2300
Padding2: 0
DpmDescriptor 4:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.0204
b: 0.342
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 5:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 0.9045
b:-0.1883
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 6:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.0204
b: 0.342
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 7:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 0.9045
b:-0.1883
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 8:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 0.7845
b: 0.746
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 9:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 0.7845
b: 0.746
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 10:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.269
b: 0.188
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 11:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.108
b: 0.555
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
DpmDescriptor 12:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.269
b: 0.188
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 131072500
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 0
FreqTableGfx:
FreqTableGfx 0: 500
FreqTableGfx 1: 3218
FreqTableGfx 2: 0
FreqTableGfx 3: 0
FreqTableGfx 4: 0
FreqTableGfx 5: 0
FreqTableGfx 6: 0
FreqTableGfx 7: 0
FreqTableGfx 8: 0
FreqTableGfx 9: 0
FreqTableGfx 10: 0
FreqTableGfx 11: 0
FreqTableGfx 12: 0
FreqTableGfx 13: 0
FreqTableGfx 14: 0
FreqTableGfx 15: 0
FreqTableVclk:
FreqTableVclk 0: 513
FreqTableVclk 1: 2934
FreqTableVclk 2: 0
FreqTableVclk 3: 0
FreqTableVclk 4: 0
FreqTableVclk 5: 0
FreqTableVclk 6: 0
FreqTableVclk 7: 0
FreqTableDclk:
FreqTableDclk 0: 513
FreqTableDclk 1: 2200
FreqTableDclk 2: 0
FreqTableDclk 3: 0
FreqTableDclk 4: 0
FreqTableDclk 5: 0
FreqTableDclk 6: 0
FreqTableDclk 7: 0
FreqTableSocclk:
FreqTableSocclk 0: 500
FreqTableSocclk 1: 1500
FreqTableSocclk 2: 97
FreqTableSocclk 3: 457
FreqTableSocclk 4: 685
FreqTableSocclk 5: 1000
FreqTableSocclk 6: 0
FreqTableSocclk 7: 0
FreqTableUclk:
FreqTableUclk 0: 97
FreqTableUclk 1: 457
FreqTableUclk 2: 773
FreqTableUclk 3: 1250
FreqTableDispclk:
FreqTableDispclk 0: 148
FreqTableDispclk 1: 2150
FreqTableDispclk 2: 0
FreqTableDispclk 3: 0
FreqTableDispclk 4: 0
FreqTableDispclk 5: 0
FreqTableDispclk 6: 0
FreqTableDispclk 7: 0
FreqTableDppClk:
FreqTableDppClk 0: 148
FreqTableDppClk 1: 2150
FreqTableDppClk 2: 0
FreqTableDppClk 3: 0
FreqTableDppClk 4: 0
FreqTableDppClk 5: 0
FreqTableDppClk 6: 0
FreqTableDppClk 7: 0
FreqTableDprefclk:
FreqTableDprefclk 0: 717
FreqTableDprefclk 1: 717
FreqTableDprefclk 2: 0
FreqTableDprefclk 3: 0
FreqTableDprefclk 4: 0
FreqTableDprefclk 5: 0
FreqTableDprefclk 6: 0
FreqTableDprefclk 7: 0
FreqTableDcfclk:
FreqTableDcfclk 0: 148
FreqTableDcfclk 1: 1564
FreqTableDcfclk 2: 0
FreqTableDcfclk 3: 0
FreqTableDcfclk 4: 0
FreqTableDcfclk 5: 0
FreqTableDcfclk 6: 0
FreqTableDcfclk 7: 0
FreqTableDtbclk:
FreqTableDtbclk 0: 148
FreqTableDtbclk 1: 1564
FreqTableDtbclk 2: 0
FreqTableDtbclk 3: 0
FreqTableDtbclk 4: 0
FreqTableDtbclk 5: 0
FreqTableDtbclk 6: 0
FreqTableDtbclk 7: 0
FreqTableFclk:
FreqTableFclk 0: 600
FreqTableFclk 1: 1000
FreqTableFclk 2: 1200
FreqTableFclk 3: 1600
FreqTableFclk 4: 2000
FreqTableFclk 5: 2200
FreqTableFclk 6: 2250
FreqTableFclk 7: 2300
DcModeMaxFreq:
DcModeMaxFreq 0: 3218
DcModeMaxFreq 1: 1500
DcModeMaxFreq 2: 1250
DcModeMaxFreq 3: 2300
DcModeMaxFreq 4: 2200
DcModeMaxFreq 5: 2934
DcModeMaxFreq 6: 2200
DcModeMaxFreq 7: 2934
DcModeMaxFreq 8: 2150
DcModeMaxFreq 9: 2150
DcModeMaxFreq 10: 717
DcModeMaxFreq 11: 1564
DcModeMaxFreq 12: 1564
Mp0clkFreq:
Mp0clkFreq 0: 500
Mp0clkFreq 1: 700
Mp0DpmVoltage:
Mp0DpmVoltage 0: 2800
Mp0DpmVoltage 1: 3200
GfxclkSpare:
GfxclkSpare 0: 0
GfxclkSpare 1: 0
GfxclkFreqCap: 0
GfxclkFgfxoffEntry: 800
GfxclkFgfxoffExitImu: 1200
GfxclkFgfxoffExitRlc: 800
GfxclkThrottleClock: 250
EnableGfxPowerStagesGpio: 1
GfxIdlePadding: 0
SmsRepairWRCKClkDivEn: 1
SmsRepairWRCKClkDivVal: 4
GfxOffEntryEarlyMGCGEn: 1
GfxOffEntryForceCGCGEn: 0
GfxOffEntryForceCGCGDelayEn: 0
GfxOffEntryForceCGCGDelayVal: 0
GfxclkFreqGfxUlv: 1300
GfxIdlePadding2:
GfxIdlePadding2 0: 0
GfxIdlePadding2 1: 0
GfxOffEntryHysteresis: 60000
GfxoffSpare:
GfxoffSpare 0: 0
GfxoffSpare 1: 0
GfxoffSpare 2: 0
GfxoffSpare 3: 0
GfxoffSpare 4: 0
GfxoffSpare 5: 0
GfxoffSpare 6: 0
GfxoffSpare 7: 0
GfxoffSpare 8: 0
GfxoffSpare 9: 0
GfxoffSpare 10: 0
GfxoffSpare 11: 0
GfxoffSpare 12: 0
GfxoffSpare 13: 0
GfxoffSpare 14: 0
DfllBtcMasterScalerM: 1
DfllBtcMasterScalerB: 0
DfllBtcSlaveScalerM: 1.1
DfllBtcSlaveScalerB: 0
DfllPccAsWaitCtrl: 6553700
DfllPccAsStepCtrl: 2065455
GfxGpoSpare:
GfxGpoSpare 0: 1066024305
GfxGpoSpare 1: 0
GfxGpoSpare 2: 0
GfxGpoSpare 3: 0
GfxGpoSpare 4: 0
GfxGpoSpare 5: 0
GfxGpoSpare 6: 0
GfxGpoSpare 7: 0
GfxGpoSpare 8: 0
GfxGpoSpare 9: 0
DcsGfxOffVoltage: 0
PaddingDcs: 0
DcsMinGfxOffTime: 0
DcsMaxGfxOffTime: 0
DcsMinCreditAccum: 0
DcsExitHysteresis: 0
DcsTimeout: 0
DcsSpare:
DcsSpare 0: 0
DcsSpare 1: 0
DcsSpare 2: 0
DcsSpare 3: 0
DcsSpare 4: 0
DcsSpare 5: 0
DcsSpare 6: 0
DcsSpare 7: 0
DcsSpare 8: 0
DcsSpare 9: 0
DcsSpare 10: 0
DcsSpare 11: 0
DcsSpare 12: 0
DcsSpare 13: 0
ShadowFreqTableUclk:
ShadowFreqTableUclk 0: 100
ShadowFreqTableUclk 1: 438
ShadowFreqTableUclk 2: 731
ShadowFreqTableUclk 3: 1187
UseStrobeModeOptimizations: 1
PaddingMem:
PaddingMem 0: 10
PaddingMem 1: 240
PaddingMem 2: 10
UclkDpmPstates:
UclkDpmPstates 0: 3
UclkDpmPstates 1: 2
UclkDpmPstates 2: 1
UclkDpmPstates 3: 0
FreqTableUclkDiv:
FreqTableUclkDiv 0: 0
FreqTableUclkDiv 1: 2
FreqTableUclkDiv 2: 3
FreqTableUclkDiv 3: 3
MemVmempVoltage:
MemVmempVoltage 0: 2700
MemVmempVoltage 1: 2800
MemVmempVoltage 2: 3000
MemVmempVoltage 3: 3200
MemVddioVoltage:
MemVddioVoltage 0: 5000
MemVddioVoltage 1: 5400
MemVddioVoltage 2: 5400
MemVddioVoltage 3: 5400
FclkDpmUPstates:
FclkDpmUPstates 0: 0
FclkDpmUPstates 1: 1
FclkDpmUPstates 2: 2
FclkDpmUPstates 3: 3
FclkDpmUPstates 4: 4
FclkDpmUPstates 5: 5
FclkDpmUPstates 6: 6
FclkDpmUPstates 7: 7
FclkDpmVddU:
FclkDpmVddU 0: 3000
FclkDpmVddU 1: 3000
FclkDpmVddU 2: 3000
FclkDpmVddU 3: 3000
FclkDpmVddU 4: 3000
FclkDpmVddU 5: 3400
FclkDpmVddU 6: 3400
FclkDpmVddU 7: 3400
FclkDpmUSpeed:
FclkDpmUSpeed 0: 2400
FclkDpmUSpeed 1: 4000
FclkDpmUSpeed 2: 4800
FclkDpmUSpeed 3: 6400
FclkDpmUSpeed 4: 8000
FclkDpmUSpeed 5: 8800
FclkDpmUSpeed 6: 9000
FclkDpmUSpeed 7: 9200
FclkDpmDisallowPstateFreq: 0
PaddingFclk: 0
PcieGenSpeed:
PcieGenSpeed 0: 0
PcieGenSpeed 1: 1
PcieGenSpeed 2: 3
PcieLaneCount:
PcieLaneCount 0: 1
PcieLaneCount 1: 3
PcieLaneCount 2: 6
LclkFreq:
LclkFreq 0: 78
LclkFreq 1: 156
LclkFreq 2: 623
FanStopTemp:
FanStopTemp 0: 0
FanStopTemp 1: 50
FanStopTemp 2: 50
FanStopTemp 3: 50
FanStopTemp 4: 60
FanStopTemp 5: 50
FanStopTemp 6: 50
FanStopTemp 7: 50
FanStopTemp 8: 50
FanStopTemp 9: 50
FanStopTemp 10: 0
FanStopTemp 11: 0
FanStopTemp 12: 0
FanStartTemp:
FanStartTemp 0: 0
FanStartTemp 1: 60
FanStartTemp 2: 60
FanStartTemp 3: 60
FanStartTemp 4: 70
FanStartTemp 5: 60
FanStartTemp 6: 60
FanStartTemp 7: 60
FanStartTemp 8: 60
FanStartTemp 9: 60
FanStartTemp 10: 0
FanStartTemp 11: 0
FanStartTemp 12: 0
FanGain:
FanGain 0: 0
FanGain 1: 400
FanGain 2: 400
FanGain 3: 400
FanGain 4: 400
FanGain 5: 400
FanGain 6: 400
FanGain 7: 400
FanGain 8: 400
FanGain 9: 400
FanGain 10: 0
FanGain 11: 0
FanGain 12: 0
FanGainPadding: 4900
FanPwmMin: 15
AcousticTargetRpmThreshold: 1600
AcousticLimitRpmThreshold: 3300
FanMaximumRpm: 3300
MGpuAcousticLimitRpmThreshold: 3000
FanTargetGfxclk: 500
TempInputSelectMask: 1010
FanZeroRpmEnable: 1
FanTachEdgePerRev: 2
FanTargetTemperature:
FanTargetTemperature 0: 0
FanTargetTemperature 1: 82
FanTargetTemperature 2: 82
FanTargetTemperature 3: 82
FanTargetTemperature 4: 90
FanTargetTemperature 5: 100
FanTargetTemperature 6: 100
FanTargetTemperature 7: 100
FanTargetTemperature 8: 100
FanTargetTemperature 9: 100
FanTargetTemperature 10: 0
FanTargetTemperature 11: 0
FanTargetTemperature 12: 0
FuzzyFan_ErrorSetDelta: 0
FuzzyFan_ErrorRateSetDelta: 0
FuzzyFan_PwmSetDelta: 0
FuzzyFan_Reserved: 125
FwCtfLimit:
FwCtfLimit 0: 0
FwCtfLimit 1: 118
FwCtfLimit 2: 118
FwCtfLimit 3: 118
FwCtfLimit 4: 113
FwCtfLimit 5: 125
FwCtfLimit 6: 125
FwCtfLimit 7: 125
FwCtfLimit 8: 125
FwCtfLimit 9: 125
FwCtfLimit 10: 0
FwCtfLimit 11: 0
FwCtfLimit 12: 0
IntakeTempEnableRPM: 1000
IntakeTempOffsetTemp: 200
IntakeTempReleaseTemp: 45
IntakeTempHighIntakeAcousticLimit: 3000
IntakeTempAcouticLimitReleaseRate: 100
FanAbnormalTempLimitOffset: -20
FanStalledTriggerRpm: 250
FanAbnormalTriggerRpmCoeff: 85
FanAbnormalDetectionEnable: 0
FanIntakeSensorSupport: 1
FanIntakePadding:
FanIntakePadding 0: 0
FanIntakePadding 1: 0
FanIntakePadding 2: 0
FanSpare:
FanSpare 0: 0
FanSpare 1: 0
FanSpare 2: 0
FanSpare 3: 0
FanSpare 4: 0
FanSpare 5: 0
FanSpare 6: 0
FanSpare 7: 0
FanSpare 8: 0
FanSpare 9: 0
FanSpare 10: 0
FanSpare 11: 0
FanSpare 12: 0
OverrideGfxAvfsFuses: 0
GfxAvfsPadding:
GfxAvfsPadding 0: 0
GfxAvfsPadding 1: 0
GfxAvfsPadding 2: 0
L2HwRtAvfsFuses:
L2HwRtAvfsFuses 0: 16777216
L2HwRtAvfsFuses 1: 16777216
L2HwRtAvfsFuses 2: 16777216
L2HwRtAvfsFuses 3: 16777216
L2HwRtAvfsFuses 4: 16777216
L2HwRtAvfsFuses 5: 33555776
L2HwRtAvfsFuses 6: 4096
L2HwRtAvfsFuses 7: 33555776
L2HwRtAvfsFuses 8: 4096
L2HwRtAvfsFuses 9: 33555776
L2HwRtAvfsFuses 10: 4096
L2HwRtAvfsFuses 11: 33555776
L2HwRtAvfsFuses 12: 4096
L2HwRtAvfsFuses 13: 33555776
L2HwRtAvfsFuses 14: 4096
L2HwRtAvfsFuses 15: 18022631
L2HwRtAvfsFuses 16: 19988788
L2HwRtAvfsFuses 17: 22544768
L2HwRtAvfsFuses 18: 25887181
L2HwRtAvfsFuses 19: 0
L2HwRtAvfsFuses 20: 0
L2HwRtAvfsFuses 21: 0
L2HwRtAvfsFuses 22: 0
L2HwRtAvfsFuses 23: 0
L2HwRtAvfsFuses 24: 0
L2HwRtAvfsFuses 25: 0
L2HwRtAvfsFuses 26: 0
L2HwRtAvfsFuses 27: 0
L2HwRtAvfsFuses 28: 2148565008
L2HwRtAvfsFuses 29: 2148565008
L2HwRtAvfsFuses 30: 32784
L2HwRtAvfsFuses 31: 65535
SeHwRtAvfsFuses:
SeHwRtAvfsFuses 0: 16777216
SeHwRtAvfsFuses 1: 16777216
SeHwRtAvfsFuses 2: 16777216
SeHwRtAvfsFuses 3: 16777216
SeHwRtAvfsFuses 4: 16777216
SeHwRtAvfsFuses 5: 33555776
SeHwRtAvfsFuses 6: 4096
SeHwRtAvfsFuses 7: 33555776
SeHwRtAvfsFuses 8: 4096
SeHwRtAvfsFuses 9: 33555776
SeHwRtAvfsFuses 10: 4096
SeHwRtAvfsFuses 11: 33555776
SeHwRtAvfsFuses 12: 4096
SeHwRtAvfsFuses 13: 33555776
SeHwRtAvfsFuses 14: 4096
SeHwRtAvfsFuses 15: 18022631
SeHwRtAvfsFuses 16: 19988788
SeHwRtAvfsFuses 17: 22544768
SeHwRtAvfsFuses 18: 25887181
SeHwRtAvfsFuses 19: 0
SeHwRtAvfsFuses 20: 0
SeHwRtAvfsFuses 21: 0
SeHwRtAvfsFuses 22: 0
SeHwRtAvfsFuses 23: 0
SeHwRtAvfsFuses 24: 0
SeHwRtAvfsFuses 25: 0
SeHwRtAvfsFuses 26: 0
SeHwRtAvfsFuses 27: 0
SeHwRtAvfsFuses 28: 2148565008
SeHwRtAvfsFuses 29: 2148565008
SeHwRtAvfsFuses 30: 32784
SeHwRtAvfsFuses 31: 65535
CommonRtAvfs:
CommonRtAvfs 0: 700
CommonRtAvfs 1: 700
CommonRtAvfs 2: 700
CommonRtAvfs 3: 700
CommonRtAvfs 4: 700
CommonRtAvfs 5: 700
CommonRtAvfs 6: 700
CommonRtAvfs 7: 700
CommonRtAvfs 8: 0
CommonRtAvfs 9: 682
CommonRtAvfs 10: 682
CommonRtAvfs 11: 682
CommonRtAvfs 12: 682
L2FwRtAvfsFuses:
L2FwRtAvfsFuses 0: 0
L2FwRtAvfsFuses 1: 0
L2FwRtAvfsFuses 2: 0
L2FwRtAvfsFuses 3: 0
L2FwRtAvfsFuses 4: 0
L2FwRtAvfsFuses 5: 0
L2FwRtAvfsFuses 6: 0
L2FwRtAvfsFuses 7: 0
L2FwRtAvfsFuses 8: 0
L2FwRtAvfsFuses 9: 0
L2FwRtAvfsFuses 10: 0
L2FwRtAvfsFuses 11: 0
L2FwRtAvfsFuses 12: 50
L2FwRtAvfsFuses 13: 3000
L2FwRtAvfsFuses 14: 1538
L2FwRtAvfsFuses 15: 1538
L2FwRtAvfsFuses 16: 1538
L2FwRtAvfsFuses 17: 1538
L2FwRtAvfsFuses 18: 1538
SeFwRtAvfsFuses:
SeFwRtAvfsFuses 0: 0
SeFwRtAvfsFuses 1: 0
SeFwRtAvfsFuses 2: 0
SeFwRtAvfsFuses 3: 0
SeFwRtAvfsFuses 4: 0
SeFwRtAvfsFuses 5: 0
SeFwRtAvfsFuses 6: 0
SeFwRtAvfsFuses 7: 0
SeFwRtAvfsFuses 8: 0
SeFwRtAvfsFuses 9: 0
SeFwRtAvfsFuses 10: 0
SeFwRtAvfsFuses 11: 0
SeFwRtAvfsFuses 12: 50
SeFwRtAvfsFuses 13: 3000
SeFwRtAvfsFuses 14: 1538
SeFwRtAvfsFuses 15: 1538
SeFwRtAvfsFuses 16: 1538
SeFwRtAvfsFuses 17: 1538
SeFwRtAvfsFuses 18: 1538
Droop_PWL_F:
Droop_PWL_F 0: 0
Droop_PWL_F 1: 2
Droop_PWL_F 2: 2.5
Droop_PWL_F 3: 3
Droop_PWL_F 4: 3.5
Droop_PWL_a:
Droop_PWL_a 0: 0.08164
Droop_PWL_a 1: 0.08164
Droop_PWL_a 2: 0.08164
Droop_PWL_a 3: 0.08164
Droop_PWL_a 4: 0.08164
Droop_PWL_b:
Droop_PWL_b 0: 0.07288
Droop_PWL_b 1: 0.07288
Droop_PWL_b 2: 0.09488
Droop_PWL_b 3: 0.07288
Droop_PWL_b 4: 0.07288
Droop_PWL_c:
Droop_PWL_c 0:-0.10281
Droop_PWL_c 1:-0.10281
Droop_PWL_c 2:-0.12781
Droop_PWL_c 3:-0.03831
Droop_PWL_c 4:-0.03831
Static_PWL_Offset:
Static_PWL_Offset 0: 1008981770
Static_PWL_Offset 1: 1008981770
Static_PWL_Offset 2: 1008981770
Static_PWL_Offset 3: 1008981770
Static_PWL_Offset 4: 1008981770
dGbV_dT_vmin: 0
dGbV_dT_vmax: 0
V2F_vmin_range_low: 600
V2F_vmin_range_high: 700
V2F_vmax_range_low: 1100
V2F_vmax_range_high: 1200
DcBtcGfxParams:
DcBtcEnabled: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
DcTol: 24
DcBtcGb: 0
DcBtcMin: 0
DcBtcMax: 0
DcBtcGbScalar:
m: 0
b: 0
GfxAvfsSpare:
GfxAvfsSpare 0: 0
GfxAvfsSpare 1: 0
GfxAvfsSpare 2: 0
GfxAvfsSpare 3: 0
GfxAvfsSpare 4: 0
GfxAvfsSpare 5: 0
GfxAvfsSpare 6: 0
GfxAvfsSpare 7: 0
GfxAvfsSpare 8: 0
GfxAvfsSpare 9: 0
GfxAvfsSpare 10: 0
GfxAvfsSpare 11: 0
GfxAvfsSpare 12: 0
GfxAvfsSpare 13: 0
GfxAvfsSpare 14: 0
GfxAvfsSpare 15: 0
GfxAvfsSpare 16: 0
GfxAvfsSpare 17: 0
GfxAvfsSpare 18: 0
GfxAvfsSpare 19: 0
GfxAvfsSpare 20: 0
GfxAvfsSpare 21: 0
GfxAvfsSpare 22: 0
GfxAvfsSpare 23: 0
GfxAvfsSpare 24: 0
GfxAvfsSpare 25: 0
GfxAvfsSpare 26: 0
GfxAvfsSpare 27: 0
GfxAvfsSpare 28: 0
GfxAvfsSpare 29: 0
GfxAvfsSpare 30: 0
GfxAvfsSpare 31: 0
OverrideSocAvfsFuses: 0
MinSocAvfsRevision: 1
SocAvfsPadding:
SocAvfsPadding 0: 0
SocAvfsPadding 1: 0
SocAvfsFuseOverride:
SocAvfsFuseOverride 0:
AvfsTemp:
AvfsTemp 0: 0
AvfsTemp 1: 85
VftFMin: 300
VInversion: 2800
qVft:
qVft 0:
a: 0.0317
b: 0.06094
c: 0.46387
qVft 1:
a: 0.04119
b: 0.05521
c: 0.42941
qAvfsGb:
a: 0
b: 0
c: 0.048
qAvfsGb2:
a: 0
b: 0
c: 0
SocAvfsFuseOverride 1:
AvfsTemp:
AvfsTemp 0: 0
AvfsTemp 1: 85
VftFMin: 300
VInversion: 2800
qVft:
qVft 0:
a: 0.0317
b: 0.06094
c: 0.46387
qVft 1:
a: 0.04119
b: 0.05521
c: 0.42941
qAvfsGb:
a: 0
b: 0
c: 0.048
qAvfsGb2:
a: 0
b: 0
c: 0
SocAvfsFuseOverride 2:
AvfsTemp:
AvfsTemp 0: 0
AvfsTemp 1: 85
VftFMin: 300
VInversion: 2800
qVft:
qVft 0:
a: 0.0317
b: 0.06094
c: 0.46387
qVft 1:
a: 0.04119
b: 0.05521
c: 0.42941
qAvfsGb:
a: 0
b: 0
c: 0.048
qAvfsGb2:
a: 0
b: 0
c: 0
dBtcGbSoc:
dBtcGbSoc 0:
a: 1.5
b:-0.0774
c:-0.753
dBtcGbSoc 1:
a: 1.5
b:-0.0774
c:-0.753
dBtcGbSoc 2:
a: 1.5
b:-0.0774
c:-0.753
qAgingGb:
qAgingGb 0:
m: 0
b: 0
qAgingGb 1:
m: 0
b: 0
qAgingGb 2:
m: 0
b: 0
qStaticVoltageOffset:
qStaticVoltageOffset 0:
a: 0
b: 0
c: 0
qStaticVoltageOffset 1:
a: 0
b: 0
c: 0
qStaticVoltageOffset 2:
a: 0
b: 0
c: 0
DcBtcSocParams:
DcBtcSocParams 0:
DcBtcEnabled: 1
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
DcTol: 180
DcBtcGb: 24
DcBtcMin: 0
DcBtcMax: 180
DcBtcGbScalar:
m: 2.5
b: 0
DcBtcSocParams 1:
DcBtcEnabled: 1
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
DcTol: 180
DcBtcGb: 24
DcBtcMin: 0
DcBtcMax: 180
DcBtcGbScalar:
m: 4.5
b: 0
DcBtcSocParams 2:
DcBtcEnabled: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
DcTol: 0
DcBtcGb: 0
DcBtcMin: 0
DcBtcMax: 0
DcBtcGbScalar:
m: 0
b: 0
SocAvfsSpare:
SocAvfsSpare 0: 0
SocAvfsSpare 1: 0
SocAvfsSpare 2: 0
SocAvfsSpare 3: 0
SocAvfsSpare 4: 0
SocAvfsSpare 5: 0
SocAvfsSpare 6: 0
SocAvfsSpare 7: 0
SocAvfsSpare 8: 0
SocAvfsSpare 9: 0
SocAvfsSpare 10: 0
SocAvfsSpare 11: 0
SocAvfsSpare 12: 0
SocAvfsSpare 13: 0
SocAvfsSpare 14: 0
SocAvfsSpare 15: 0
SocAvfsSpare 16: 0
SocAvfsSpare 17: 0
SocAvfsSpare 18: 0
SocAvfsSpare 19: 0
SocAvfsSpare 20: 0
SocAvfsSpare 21: 0
SocAvfsSpare 22: 0
SocAvfsSpare 23: 0
SocAvfsSpare 24: 0
SocAvfsSpare 25: 0
SocAvfsSpare 26: 0
SocAvfsSpare 27: 0
SocAvfsSpare 28: 0
SocAvfsSpare 29: 0
SocAvfsSpare 30: 0
SocAvfsSpare 31: 0
BootValues:
InitGfxclk_bypass: 1200
InitSocclk: 600
InitMp0clk: 720
InitMpioclk: 500
InitSmnclk: 500
InitUcpclk: 1000
InitCsrclk: 400
InitDprefclk: 717
InitDcfclk: 662
InitDtbclk: 0
InitDclk: 513
InitVclk: 513
InitUsbdfsclk: 672
InitMp1clk: 509
InitLclk: 623
InitBaco400clk_bypass: 400
InitBaco1200clk_bypass: 1200
InitBaco700clk_bypass: 700
InitFclk: 1000
InitGfxclk_clkb: 0
InitUclkDPMState: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
InitVcoFreqPll0: 4500
InitVcoFreqPll1: 4300
InitVcoFreqPll2: 0
InitVcoFreqPll3: 4100
InitVcoFreqPll4: 4000
InitVcoFreqPll5: 4200
InitVcoFreqPll6: 0
InitGfx: 0
InitSoc: 3200
InitU: 3400
Padding2: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
Spare 5: 0
Spare 6: 0
Spare 7: 0
DriverReportedClocks:
BaseClockAc: 2075
GameClockAc: 2515
BoostClockAc: 2617
BaseClockDc: 0
GameClockDc: 0
BoostClockDc: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
Reserved 3: 0
MsgLimits:
Power:
Power 0:
0 0: 350
0 1: 0
Power 1:
1 0: 1200
1 1: 0
Power 2:
2 0: 0
2 1: 0
Power 3:
3 0: 0
3 1: 0
Tdc:
Tdc 0: 448
Tdc 1: 82
Tdc 2: 86
Temperature:
Temperature 0: 100
Temperature 1: 110
Temperature 2: 110
Temperature 3: 110
Temperature 4: 110
Temperature 5: 115
Temperature 6: 115
Temperature 7: 115
Temperature 8: 115
Temperature 9: 115
Temperature 10: 0
Temperature 11: 0
Temperature 12: 0
PwmLimitMin: 0
PwmLimitMax: 255
FanTargetTemperature: 110
Spare1:
Spare1 0: 0
AcousticTargetRpmThresholdMin: 500
AcousticTargetRpmThresholdMax: 6000
AcousticLimitRpmThresholdMin: 500
AcousticLimitRpmThresholdMax: 6000
PccLimitMin: 0
PccLimitMax: 450
FanStopTempMin: 25
FanStopTempMax: 100
FanStartTempMin: 25
FanStartTempMax: 100
PowerMinPpt0:
PowerMinPpt0 0: 0
PowerMinPpt0 1: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
Spare 5: 0
Spare 6: 0
Spare 7: 0
Spare 8: 0
Spare 9: 0
Spare 10: 0
OverDriveLimitsMin:
FeatureCtrlMask: 1997
VoltageOffsetPerZoneBoundary: -450
Reserved1: 0
Reserved2: 0
GfxclkFmin: 500
GfxclkFmax: 500
UclkFmin: 97
UclkFmax: 97
Ppt: -10
Tdc: -10
FanLinearPwmPoints: 15
FanLinearTempPoints: 25
FanMinimumPwm: 15
AcousticTargetRpmThreshold: 500
AcousticLimitRpmThreshold: 500
FanTargetTemperature: 25
FanZeroRpmEnable: 0
FanZeroRpmStopTemp: 25
FanMode: 0
MaxOpTemp: 50
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
Padding 3: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
Spare 5: 0
Spare 6: 0
Spare 7: 0
Spare 8: 0
Spare 9: 0
Spare 10: 0
Spare 11: 0
OverDriveLimitsBasicMax:
FeatureCtrlMask: 1997
VoltageOffsetPerZoneBoundary: 0
Reserved1: 0
Reserved2: 0
GfxclkFmin: 5000
GfxclkFmax: 5000
UclkFmin: 1500
UclkFmax: 1500
Ppt: 15
Tdc: 0
FanLinearPwmPoints: 100
FanLinearTempPoints: 100
FanMinimumPwm: 100
AcousticTargetRpmThreshold: 3300
AcousticLimitRpmThreshold: 3300
FanTargetTemperature: 105
FanZeroRpmEnable: 1
FanZeroRpmStopTemp: 100
FanMode: 1
MaxOpTemp: 110
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
Padding 3: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
Spare 5: 0
Spare 6: 0
Spare 7: 0
Spare 8: 39322800
Spare 9: 32768720
Spare 10: 65536500
Spare 11: 45875600
OverDriveLimitsAdvancedMax:
FeatureCtrlMask: 0
VoltageOffsetPerZoneBoundary: 0
Reserved1: 0
Reserved2: 0
GfxclkFmin: 0
GfxclkFmax: 0
UclkFmin: 0
UclkFmax: 0
Ppt: 0
Tdc: 0
FanLinearPwmPoints: 0
FanLinearTempPoints: 0
FanMinimumPwm: 0
AcousticTargetRpmThreshold: 0
AcousticLimitRpmThreshold: 0
FanTargetTemperature: 0
FanZeroRpmEnable: 0
FanZeroRpmStopTemp: 0
FanMode: 0
MaxOpTemp: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
Padding 3: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 4200
Spare 3: 0
Spare 4: 45875200
Spare 5: 750
Spare 6: 0
Spare 7: 0
Spare 8: 0
Spare 9: 0
Spare 10: 0
Spare 11: 0
DebugOverrides: 0
TotalBoardPowerSupport: 1
TotalBoardPowerPadding:
TotalBoardPowerPadding 0: 0
TotalBoardPowerPadding 1: 0
TotalBoardPowerPadding 2: 0
TotalIdleBoardPowerM: 877
TotalIdleBoardPowerB: 0
TotalBoardPowerM: 1179
TotalBoardPowerB: 4019
qFeffCoeffGameClock:
qFeffCoeffGameClock 0:
a:-0.06944
b: 47.0833
c:-5455.62
qFeffCoeffGameClock 1:
a: 0
b: 0
c: 0
qFeffCoeffBaseClock:
qFeffCoeffBaseClock 0:
a:-0.00744
b: 8.64583
c: 43.9866
qFeffCoeffBaseClock 1:
a: 0
b: 0
c: 0
qFeffCoeffBoostClock:
qFeffCoeffBoostClock 0:
a: 0.04216
b:-22.7708
c: 5555.08
qFeffCoeffBoostClock 1:
a: 0
b: 0
c: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
Spare 5: 0
Spare 6: 0
Spare 7: 0
Spare 8: 0
Spare 9: 0
Spare 10: 0
Spare 11: 0
Spare 12: 0
Spare 13: 0
Spare 14: 0
Spare 15: 0
Spare 16: 0
Spare 17: 0
Spare 18: 0
Spare 19: 0
Spare 20: 0
Spare 21: 0
Spare 22: 0
Spare 23: 0
Spare 24: 0
Spare 25: 0
Spare 26: 0
Spare 27: 0
Spare 28: 0
Spare 29: 0
Spare 30: 0
Spare 31: 0
Spare 32: 0
Spare 33: 0
Spare 34: 0
Spare 35: 0
Spare 36: 0
Spare 37: 0
Spare 38: 0
Spare 39: 0
Spare 40: 0
Spare 41: 0
Spare 42: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
BoardTable:
Version: 38
I2cControllers:
I2cControllers 0:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 1:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 2:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 3:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 4:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 5:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 6:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 7:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
VddGfxVrMapping: 0
VddSocVrMapping: 0
VddMem0VrMapping: 0
VddMem1VrMapping: 0
GfxUlvPhaseSheddingMask: 0
SocUlvPhaseSheddingMask: 0
VmempUlvPhaseSheddingMask: 0
VddioUlvPhaseSheddingMask: 0
SlaveAddrMapping:
SlaveAddrMapping 0: 0
SlaveAddrMapping 1: 0
SlaveAddrMapping 2: 0
SlaveAddrMapping 3: 0
SlaveAddrMapping 4: 0
VrPsiSupport:
VrPsiSupport 0: 0
VrPsiSupport 1: 0
VrPsiSupport 2: 0
VrPsiSupport 3: 1
VrPsiSupport 4: 0
PaddingPsi:
PaddingPsi 0: 0
PaddingPsi 1: 0
PaddingPsi 2: 0
PaddingPsi 3: 0
PaddingPsi 4: 0
EnablePsi6:
EnablePsi6 0: 0
EnablePsi6 1: 0
EnablePsi6 2: 0
EnablePsi6 3: 0
EnablePsi6 4: 0
SviTelemetryScale:
SviTelemetryScale 0:
Offset: 0
Padding: 0
MaxCurrent: 0
SviTelemetryScale 1:
Offset: 0
Padding: 0
MaxCurrent: 0
SviTelemetryScale 2:
Offset: 0
Padding: 0
MaxCurrent: 0
SviTelemetryScale 3:
Offset: 0
Padding: 0
MaxCurrent: 0
SviTelemetryScale 4:
Offset: 0
Padding: 0
MaxCurrent: 0
VoltageTelemetryRatio:
VoltageTelemetryRatio 0: 0
VoltageTelemetryRatio 1: 0
VoltageTelemetryRatio 2: 0
VoltageTelemetryRatio 3: 0
VoltageTelemetryRatio 4: 0
DownSlewRateVr:
DownSlewRateVr 0: 0
DownSlewRateVr 1: 0
DownSlewRateVr 2: 0
DownSlewRateVr 3: 0
DownSlewRateVr 4: 0
LedOffGpio: 0
FanOffGpio: 0
GfxVrPowerStageOffGpio: 0
AcDcGpio: 0
AcDcPolarity: 0
VR0HotGpio: 0
VR0HotPolarity: 0
GthrGpio: 0
GthrPolarity: 0
LedPin0: 0
LedPin1: 0
LedPin2: 0
LedEnableMask: 0
LedPcie: 0
LedError: 0
UclkTrainingModeSpreadPercent: 0
UclkSpreadPadding: 0
UclkSpreadFreq: 0
UclkSpreadPercent:
UclkSpreadPercent 0: 0
UclkSpreadPercent 1: 0
UclkSpreadPercent 2: 0
UclkSpreadPercent 3: 0
UclkSpreadPercent 4: 0
UclkSpreadPercent 5: 0
UclkSpreadPercent 6: 0
UclkSpreadPercent 7: 0
UclkSpreadPercent 8: 0
UclkSpreadPercent 9: 0
UclkSpreadPercent 10: 0
UclkSpreadPercent 11: 0
UclkSpreadPercent 12: 0
UclkSpreadPercent 13: 0
UclkSpreadPercent 14: 0
UclkSpreadPercent 15: 0
FclkSpreadPadding: 0
FclkSpreadPercent: 0
FclkSpreadFreq: 0
DramWidth: 0
PaddingMem1:
PaddingMem1 0: 0
PaddingMem1 1: 0
PaddingMem1 2: 0
PaddingMem1 3: 0
PaddingMem1 4: 0
PaddingMem1 5: 0
PaddingMem1 6: 0
HsrEnabled: 0
VddqOffEnabled: 0
PaddingUmcFlags:
PaddingUmcFlags 0: 0
PaddingUmcFlags 1: 0
PostVoltageSetBacoDelay: 0
BacoEntryDelay: 0
FuseWritePowerMuxPresent: 0
FuseWritePadding:
FuseWritePadding 0: 0
FuseWritePadding 1: 0
FuseWritePadding 2: 0
BoardSpare:
BoardSpare 0: 0
BoardSpare 1: 0
BoardSpare 2: 0
BoardSpare 3: 0
BoardSpare 4: 0
BoardSpare 5: 0
BoardSpare 6: 0
BoardSpare 7: 0
BoardSpare 8: 0
BoardSpare 9: 0
BoardSpare 10: 0
BoardSpare 11: 0
BoardSpare 12: 0
BoardSpare 13: 0
BoardSpare 14: 0
BoardSpare 15: 0
BoardSpare 16: 0
BoardSpare 17: 0
BoardSpare 18: 0
BoardSpare 19: 0
BoardSpare 20: 0
BoardSpare 21: 0
BoardSpare 22: 0
BoardSpare 23: 0
BoardSpare 24: 0
BoardSpare 25: 0
BoardSpare 26: 0
BoardSpare 27: 0
BoardSpare 28: 0
BoardSpare 29: 0
BoardSpare 30: 0
BoardSpare 31: 0
BoardSpare 32: 0
BoardSpare 33: 0
BoardSpare 34: 0
BoardSpare 35: 0
BoardSpare 36: 0
BoardSpare 37: 0
BoardSpare 38: 0
BoardSpare 39: 0
BoardSpare 40: 0
BoardSpare 41: 0
BoardSpare 42: 0
BoardSpare 43: 0
BoardSpare 44: 0
BoardSpare 45: 0
BoardSpare 46: 0
BoardSpare 47: 0
BoardSpare 48: 0
BoardSpare 49: 0
BoardSpare 50: 0
BoardSpare 51: 0
BoardSpare 52: 0
BoardSpare 53: 0
BoardSpare 54: 0
BoardSpare 55: 0
BoardSpare 56: 0
BoardSpare 57: 0
BoardSpare 58: 0
BoardSpare 59: 0
BoardSpare 60: 0
BoardSpare 61: 0
BoardSpare 62: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
================================================
FILE: test/AMD.RX7900XTX.24576.230323.rom.rawdump
================================================
PowerPlay table rev 20.0 size 5424 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H 3015 structuresize : 5424
0x0002 (0002) B 14 format_revision : 20
0x0003 (0003) B 00 content_revision : 0
0x0004 (0004) B 03 table_revision : 3
0x0005 (0005) B 00 padding : 0
0x0006 (0006) H 4003 table_size : 832
0x0008 (0008) I 3c0f0000 golden_pp_id : 3900
0x000c (0012) I 11540000 golden_revision : 21521
0x0010 (0016) H 8500 format_id : 133
0x0012 (0018) I 08000000 platform_caps : 8
0x0016 (0022) B 1d thermal_controller_type : 29
0x0017 (0023) H 0000 small_power_limit1 : 0
0x0019 (0025) H 0000 small_power_limit2 : 0
0x001b (0027) H 0000 boost_power_limit : 0
0x001d (0029) H 7600 software_shutdown_temp : 118
0x001f (0031) I 00000000 reserve : 0
0x0023 (0035) I 00000000 reserve : 0
0x0027 (0039) I 00000000 reserve : 0
0x002b (0043) I 00000000 reserve : 0
0x002f (0047) I 00000000 reserve : 0
0x0033 (0051) I 00000000 reserve : 0
0x0037 (0055) I 00000000 reserve : 0
0x003b (0059) I 00000000 reserve : 0
0x003f (0063) I 00000000 reserve : 0
0x0043 (0067) I 00000000 reserve : 0
0x0047 (0071) I 00000000 reserve : 0
0x004b (0075) I 00000000 reserve : 0
0x004f (0079) I 00000000 reserve : 0
0x0053 (0083) I 00000000 reserve : 0
0x0057 (0087) I 00000000 reserve : 0
0x005b (0091) I 00000000 reserve : 0
0x005f (0095) I 00000000 reserve : 0
0x0063 (0099) I 00000000 reserve : 0
0x0067 (0103) I 00000000 reserve : 0
0x006b (0107) I 00000000 reserve : 0
0x006f (0111) I 00000000 reserve : 0
0x0073 (0115) I 00000000 reserve : 0
0x0077 (0119) I 00000000 reserve : 0
0x007b (0123) I 00000000 reserve : 0
0x007f (0127) I 00000000 reserve : 0
0x0083 (0131) I 00000000 reserve : 0
0x0087 (0135) I 00000000 reserve : 0
0x008b (0139) I 00000000 reserve : 0
0x008f (0143) I 00000000 reserve : 0
0x0093 (0147) I 00000000 reserve : 0
0x0097 (0151) I 00000000 reserve : 0
0x009b (0155) I 00000000 reserve : 0
0x009f (0159) I 00000000 reserve : 0
0x00a3 (0163) I 00000000 reserve : 0
0x00a7 (0167) I 00000000 reserve : 0
0x00ab (0171) I 00000000 reserve : 0
0x00af (0175) I 00000000 reserve : 0
0x00b3 (0179) I 00000000 reserve : 0
0x00b7 (0183) I 00000000 reserve : 0
0x00bb (0187) I 00000000 reserve : 0
0x00bf (0191) I 00000000 reserve : 0
0x00c3 (0195) I 00000000 reserve : 0
0x00c7 (0199) I 00000000 reserve : 0
0x00cb (0203) I 00000000 reserve : 0
0x00cf (0207) I 00000000 reserve : 0
0x00d3 (0211) B 83 revision : 131
0x00d4 (0212) B 00 reserve : 0
0x00d5 (0213) B 00 reserve : 0
0x00d6 (0214) B 00 reserve : 0
0x00d7 (0215) I 16000000 feature_count : 22
0x00db (0219) I 29000000 setting_count : 41
0x00df (0223) B 01 cap GFXCLK_LIMITS : 1
0x00e0 (0224) B 01 cap UCLK_LIMITS : 1
0x00e1 (0225) B 01 cap POWER_LIMIT : 1
0x00e2 (0226) B 01 cap FAN_ACOUSTIC_LIMIT : 1
0x00e3 (0227) B 01 cap FAN_SPEED_MIN : 1
0x00e4 (0228) B 01 cap TEMPERATURE_FAN : 1
0x00e5 (0229) B 01 cap TEMPERATURE_SYSTEM : 1
0x00e6 (0230) B 01 cap MEMORY_TIMING_TUNE : 1
0x00e7 (0231) B 01 cap FAN_ZERO_RPM_CONTROL : 1
0x00e8 (0232) B 01 cap AUTO_UV_ENGINE : 1
0x00e9 (0233) B 01 cap AUTO_OC_ENGINE : 1
0x00ea (0234) B 01 cap AUTO_OC_MEMORY : 1
0x00eb (0235) B 01 cap FAN_CURVE : 1
0x00ec (0236) B 00 cap AUTO_FAN_ACOUSTIC_LIMIT : 0
0x00ed (0237) B 01 cap POWER_MODE : 1
0x00ee (0238) B 00 cap PER_ZONE_GFX_VOLTAGE_OFFSET : 0
0x00ef (0239) B 00 cap : 0
0x00f0 (0240) B 01 cap : 1
0x00f1 (0241) B 00 cap : 0
0x00f2 (0242) B 00 cap : 0
0x00f3 (0243) B 00 cap : 0
0x00f4 (0244) B 00 cap : 0
0x00f5 (0245) B 00 cap : 0
0x00f6 (0246) B 00 cap : 0
0x00f7 (0247) B 00 cap : 0
0x00f8 (0248) B 00 cap : 0
0x00f9 (0249) B 00 cap : 0
0x00fa (0250) B 00 cap : 0
0x00fb (0251) B 00 cap : 0
0x00fc (0252) B 00 cap : 0
0x00fd (0253) B 00 cap : 0
0x00fe (0254) B 00 cap : 0
0x00ff (0255) I 88130000 max GFXCLKFMAX : 5000
0x0103 (0259) I 88130000 max GFXCLKFMIN : 5000
0x0107 (0263) I dc050000 max UCLKFMIN : 1500
0x010b (0267) I dc050000 max UCLKFMAX : 1500
0x010f (0271) I 0f000000 max POWERPERCENTAGE : 15
0x0113 (0275) I e40c0000 max FANRPMMIN : 3300
0x0117 (0279) I e40c0000 max FANRPMACOUSTICLIMIT : 3300
0x011b (0283) I 69000000 max FANTARGETTEMPERATURE : 105
0x011f (0287) I 6e000000 max OPERATINGTEMPMAX : 110
0x0123 (0291) I 01000000 max ACTIMING : 1
0x0127 (0295) I 01000000 max FAN_ZERO_RPM_CONTROL : 1
0x012b (0299) I 01000000 max AUTOUVENGINE : 1
0x012f (0303) I 01000000 max AUTOOCENGINE : 1
0x0133 (0307) I 01000000 max AUTOOCMEMORY : 1
0x0137 (0311) I 64000000 max FAN_CURVE_TEMPERATURE_1 : 100
0x013b (0315) I 64000000 max FAN_CURVE_SPEED_1 : 100
0x013f (0319) I 64000000 max FAN_CURVE_TEMPERATURE_2 : 100
0x0143 (0323) I 64000000 max FAN_CURVE_SPEED_2 : 100
0x0147 (0327) I 64000000 max FAN_CURVE_TEMPERATURE_3 : 100
0x014b (0331) I 64000000 max FAN_CURVE_SPEED_3 : 100
0x014f (0335) I 64000000 max FAN_CURVE_TEMPERATURE_4 : 100
0x0153 (0339) I 64000000 max FAN_CURVE_SPEED_4 : 100
0x0157 (0343) I 64000000 max FAN_CURVE_TEMPERATURE_5 : 100
0x015b (0347) I 64000000 max FAN_CURVE_SPEED_5 : 100
0x015f (0351) I 00000000 max AUTO_FAN_ACOUSTIC_LIMIT : 0
0x0163 (0355) I 01000000 max POWER_MODE : 1
0x0167 (0359) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1 : 0
0x016b (0363) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2 : 0
0x016f (0367) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3 : 0
0x0173 (0371) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4 : 0
0x0177 (0375) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5 : 0
0x017b (0379) I 00000000 max PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6 : 0
0x017f (0383) I 00000000 max : 0
0x0183 (0387) I 00000000 max : 0
0x0187 (0391) I 00000000 max : 0
0x018b (0395) I 00000000 max : 0
0x018f (0399) I 00000000 max : 0
0x0193 (0403) I 00000000 max : 0
0x0197 (0407) I 00000000 max : 0
0x019b (0411) I 00000000 max : 0
0x019f (0415) I 00000000 max : 0
0x01a3 (0419) I 00000000 max : 0
0x01a7 (0423) I 00000000 max : 0
0x01ab (0427) I 00000000 max : 0
0x01af (0431) I 00000000 max : 0
0x01b3 (0435) I 00000000 max : 0
0x01b7 (0439) I 00000000 max : 0
0x01bb (0443) I 00000000 max : 0
0x01bf (0447) I 00000000 max : 0
0x01c3 (0451) I 00000000 max : 0
0x01c7 (0455) I 00000000 max : 0
0x01cb (0459) I 00000000 max : 0
0x01cf (0463) I 00000000 max : 0
0x01d3 (0467) I 00000000 max : 0
0x01d7 (0471) I 00000000 max : 0
0x01db (0475) I 00000000 max : 0
0x01df (0479) I 00000000 max : 0
0x01e3 (0483) I 00000000 max : 0
0x01e7 (0487) I 00000000 max : 0
0x01eb (0491) I 00000000 max : 0
0x01ef (0495) I 00000000 max : 0
0x01f3 (0499) I 00000000 max : 0
0x01f7 (0503) I 00000000 max : 0
0x01fb (0507) I 00000000 max : 0
0x01ff (0511) I f4010000 min GFXCLKFMAX : 500
0x0203 (0515) I f4010000 min GFXCLKFMIN : 500
0x0207 (0519) I 61000000 min UCLKFMIN : 97
0x020b (0523) I 61000000 min UCLKFMAX : 97
0x020f (0527) I 0a000000 min POWERPERCENTAGE : 10
0x0213 (0531) I f4010000 min FANRPMMIN : 500
0x0217 (0535) I f4010000 min FANRPMACOUSTICLIMIT : 500
0x021b (0539) I 19000000 min FANTARGETTEMPERATURE : 25
0x021f (0543) I 32000000 min OPERATINGTEMPMAX : 50
0x0223 (0547) I 00000000 min ACTIMING : 0
0x0227 (0551) I 00000000 min FAN_ZERO_RPM_CONTROL : 0
0x022b (0555) I 00000000 min AUTOUVENGINE : 0
0x022f (0559) I 00000000 min AUTOOCENGINE : 0
0x0233 (0563) I 00000000 min AUTOOCMEMORY : 0
0x0237 (0567) I 19000000 min FAN_CURVE_TEMPERATURE_1 : 25
0x023b (0571) I 0f000000 min FAN_CURVE_SPEED_1 : 15
0x023f (0575) I 19000000 min FAN_CURVE_TEMPERATURE_2 : 25
0x0243 (0579) I 0f000000 min FAN_CURVE_SPEED_2 : 15
0x0247 (0583) I 19000000 min FAN_CURVE_TEMPERATURE_3 : 25
0x024b (0587) I 0f000000 min FAN_CURVE_SPEED_3 : 15
0x024f (0591) I 19000000 min FAN_CURVE_TEMPERATURE_4 : 25
0x0253 (0595) I 0f000000 min FAN_CURVE_SPEED_4 : 15
0x0257 (0599) I 19000000 min FAN_CURVE_TEMPERATURE_5 : 25
0x025b (0603) I 0f000000 min FAN_CURVE_SPEED_5 : 15
0x025f (0607) I 00000000 min AUTO_FAN_ACOUSTIC_LIMIT : 0
0x0263 (0611) I 00000000 min POWER_MODE : 0
0x0267 (0615) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1 : 0
0x026b (0619) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2 : 0
0x026f (0623) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3 : 0
0x0273 (0627) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4 : 0
0x0277 (0631) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5 : 0
0x027b (0635) I 00000000 min PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6 : 0
0x027f (0639) I 00000000 min : 0
0x0283 (0643) I 0a000000 min : 10
0x0287 (0647) I 00000000 min : 0
0x028b (0651) I 00000000 min : 0
0x028f (0655) I 00000000 min : 0
0x0293 (0659) I 00000000 min : 0
0x0297 (0663) I 00000000 min : 0
0x029b (0667) I 00000000 min : 0
0x029f (0671) I 00000000 min : 0
0x02a3 (0675) I 00000000 min : 0
0x02a7 (0679) I 00000000 min : 0
0x02ab (0683) I 00000000 min : 0
0x02af (0687) I 00000000 min : 0
0x02b3 (0691) I 00000000 min : 0
0x02b7 (0695) I 00000000 min : 0
0x02bb (0699) I 00000000 min : 0
0x02bf (0703) I 00000000 min : 0
0x02c3 (0707) I 00000000 min : 0
0x02c7 (0711) I 00000000 min : 0
0x02cb (0715) I 00000000 min : 0
0x02cf (0719) I 00000000 min : 0
0x02d3 (0723) I 00000000 min : 0
0x02d7 (0727) I 00000000 min : 0
0x02db (0731) I 00000000 min : 0
0x02df (0735) I 00000000 min : 0
0x02e3 (0739) I 00000000 min : 0
0x02e7 (0743) I 00000000 min : 0
0x02eb (0747) I 00000000 min : 0
0x02ef (0751) I 00000000 min : 0
0x02f3 (0755) I 00000000 min : 0
0x02f7 (0759) I 00000000 min : 0
0x02fb (0763) I 00000000 min : 0
0x02ff (0767) h 0000 pm_setting : 0
0x0301 (0769) h 0000 pm_setting : 0
0x0303 (0771) h 0000 pm_setting : 0
0x0305 (0773) h 0a00 pm_setting : 10
0x0307 (0775) h 6900 pm_setting : 105
0x0309 (0777) h 5f00 pm_setting : 95
0x030b (0779) h 0000 pm_setting : 0
0x030d (0781) h 4b00 pm_setting : 75
0x030f (0783) h 0e06 pm_setting : 1550
0x0311 (0785) h a406 pm_setting : 1700
0x0313 (0787) h 0000 pm_setting : 0
0x0315 (0789) h b80b pm_setting : 3000
0x0317 (0791) h 0e06 pm_setting : 1550
0x0319 (0793) h b80b pm_setting : 3000
0x031b (0795) h 0000 pm_setting : 0
0x031d (0797) h b80b pm_setting : 3000
0x031f (0799) h 0000 pm_setting : 0
0x0321 (0801) h 0000 pm_setting : 0
0x0323 (0803) h 0000 pm_setting : 0
0x0325 (0805) h 0000 pm_setting : 0
0x0327 (0807) h 0000 pm_setting : 0
0x0329 (0809) h 0000 pm_setting : 0
0x032b (0811) h 0000 pm_setting : 0
0x032d (0813) h 0000 pm_setting : 0
0x032f (0815) h 0000 pm_setting : 0
0x0331 (0817) h 0000 pm_setting : 0
0x0333 (0819) h 0000 pm_setting : 0
0x0335 (0821) h 0000 pm_setting : 0
0x0337 (0823) h 0000 pm_setting : 0
0x0339 (0825) h 0000 pm_setting : 0
0x033b (0827) h 0000 pm_setting : 0
0x033d (0829) h 0000 pm_setting : 0
0x033f (0831) B 00 padding1 : 0
0x0340 (0832) I 29000000 Version : 41
0x0344 (0836) I ffffff71 FeaturesToRun : 1912602623
0x0348 (0840) I b8eb0300 FeaturesToRun : 256952
0x034c (0844) B 01 TotalPowerConfig : 1
0x034d (0845) B 00 CustomerVariant : 0
0x034e (0846) B 04 MemoryTemperatureTypeMask : 4
0x034f (0847) B 00 SmartShiftVersion : 0
0x0350 (0848) H 4701 SocketPowerLimitAc : 327
0x0352 (0850) H b004 SocketPowerLimitAc : 1200
0x0354 (0852) H 0000 SocketPowerLimitAc : 0
0x0356 (0854) H 0000 SocketPowerLimitAc : 0
0x0358 (0856) H 0000 SocketPowerLimitDc : 0
0x035a (0858) H 0000 SocketPowerLimitDc : 0
0x035c (0860) H 0000 SocketPowerLimitDc : 0
0x035e (0862) H 0000 SocketPowerLimitDc : 0
0x0360 (0864) H 0000 SocketPowerLimitSmartShift2 : 0
0x0362 (0866) B 00 EnableLegacyPptLimit : 0
0x0363 (0867) B 00 UseInputTelemetry : 0
0x0364 (0868) B 00 SmartShiftMinReportedPptinDcs : 0
0x0365 (0869) B 00 PaddingPpt : 0
0x0366 (0870) H 3b01 VrTdcLimit : 315
0x0368 (0872) H 5200 VrTdcLimit : 82
0x036a (0874) H 5600 VrTdcLimit : 86
0x036c (0876) H c001 PlatformTdcLimit : 448
0x036e (0878) H 5200 PlatformTdcLimit : 82
0x0370 (0880) H 5600 PlatformTdcLimit : 86
0x0372 (0882) H 6400 TemperatureLimit : 100
0x0374 (0884) H 6e00 TemperatureLimit : 110
0x0376 (0886) H 6e00 TemperatureLimit : 110
0x0378 (0888) H 6e00 TemperatureLimit : 110
0x037a (0890) H 6c00 TemperatureLimit : 108
0x037c (0892) H 7300 TemperatureLimit : 115
0x037e (0894) H 7300 TemperatureLimit : 115
0x0380 (0896) H 7300 TemperatureLimit : 115
0x0382 (0898) H 7300 TemperatureLimit : 115
0x0384 (0900) H 7300 TemperatureLimit : 115
0x0386 (0902) H 0000 TemperatureLimit : 0
0x0388 (0904) H 0000 TemperatureLimit : 0
0x038a (0906) H 0000 TemperatureLimit : 0
0x038c (0908) H 7800 HwCtfTempLimit : 120
0x038e (0910) H 0000 PaddingInfra : 0
0x0390 (0912) I 00000000 FitControllerFailureRateLimit : 0
0x0394 (0916) I 00000000 FitControllerGfxDutyCycle : 0
0x0398 (0920) I 00000000 FitControllerSocDutyCycle : 0
0x039c (0924) I 00000000 FitControllerSocOffset : 0
0x03a0 (0928) I 00000000 GfxApccPlusResidencyLimit : 0
0x03a4 (0932) I f2e30300 ThrottlerControlMask : 254962
0x03a8 (0936) I ffff9b01 FwDStateMask : 27000831
0x03ac (0940) H 6400 UlvVoltageOffset : 100
0x03ae (0942) H 6400 UlvVoltageOffset : 100
0x03b0 (0944) H 6400 UlvVoltageOffsetU : 100
0x03b2 (0946) H 6400 DeepUlvVoltageOffsetSoc : 100
0x03b4 (0948) H f811 DefaultMaxVoltage : 4600
0x03b6 (0950) H c012 DefaultMaxVoltage : 4800
0x03b8 (0952) H f811 BoostMaxVoltage : 4600
0x03ba (0954) H c012 BoostMaxVoltage : 4800
0x03bc (0956) h 0500 VminTempHystersis : 5
0x03be (0958) h 0500 VminTempHystersis : 5
0x03c0 (0960) h 3700 VminTempThreshold : 55
0x03c2 (0962) h 3700 VminTempThreshold : 55
0x03c4 (0964) H f00a Vmin_Hot_T0 : 2800
0x03c6 (0966) H f00a Vmin_Hot_T0 : 2800
0x03c8 (0968) H f00a Vmin_Cold_T0 : 2800
0x03ca (0970) H f00a Vmin_Cold_T0 : 2800
0x03cc (0972) H f00a Vmin_Hot_Eol : 2800
0x03ce (0974) H f00a Vmin_Hot_Eol : 2800
0x03d0 (0976) H f00a Vmin_Cold_Eol : 2800
0x03d2 (0978) H f00a Vmin_Cold_Eol : 2800
0x03d4 (0980) H 0000 Vmin_Aging_Offset : 0
0x03d6 (0982) H 0000 Vmin_Aging_Offset : 0
0x03d8 (0984) H 0000 Spare_Vmin_Plat_Offset_Hot : 0
0x03da (0986) H 0000 Spare_Vmin_Plat_Offset_Hot : 0
0x03dc (0988) H 0000 Spare_Vmin_Plat_Offset_Cold : 0
0x03de (0990) H 0000 Spare_Vmin_Plat_Offset_Cold : 0
0x03e0 (0992) H 0000 VcBtcFixedVminAgingOffset : 0
0x03e2 (0994) H 0000 VcBtcFixedVminAgingOffset : 0
0x03e4 (0996) H 0000 VcBtcVmin2PsmDegrationGb : 0
0x03e6 (0998) H 0000 VcBtcVmin2PsmDegrationGb : 0
0x03e8 (1000) f 00000000 VcBtcPsmA : 0
0x03ec (1004) f 00000000 VcBtcPsmA : 0
0x03f0 (1008) f 00000000 VcBtcPsmB : 0
0x03f4 (1012) f 00000000 VcBtcPsmB : 0
0x03f8 (1016) f 00000000 VcBtcVminA : 0
0x03fc (1020) f 00000000 VcBtcVminA : 0
0x0400 (1024) f 00000000 VcBtcVminB : 0
0x0404 (1028) f 00000000 VcBtcVminB : 0
0x0408 (1032) B 01 PerPartVminEnabled : 1
0x0409 (1033) B 00 PerPartVminEnabled : 0
0x040a (1034) B 00 VcBtcEnabled : 0
0x040b (1035) B 00 VcBtcEnabled : 0
0x040c (1036) H 6400 SocketPowerLimitAcTau : 100
0x040e (1038) H 0a00 SocketPowerLimitAcTau : 10
0x0410 (1040) H 0000 SocketPowerLimitAcTau : 0
0x0412 (1042) H 0000 SocketPowerLimitAcTau : 0
0x0414 (1044) H 0000 SocketPowerLimitDcTau : 0
0x0416 (1046) H 0000 SocketPowerLimitDcTau : 0
0x0418 (1048) H 0000 SocketPowerLimitDcTau : 0
0x041a (1050) H 0000 SocketPowerLimitDcTau : 0
0x041c (1052) f 00000000 a : 0
0x0420 (1056) f 9a99993d b : 0.075
0x0424 (1060) f 0ad723bc c :-0.01
0x0428 (1064) I 00000000 SpareVmin : 0
0x042c (1068) I 00000000 SpareVmin : 0
0x0430 (1072) I 00000000 SpareVmin : 0
0x0434 (1076) I 00000000 SpareVmin : 0
0x0438 (1080) I 00000000 SpareVmin : 0
0x043c (1084) I 00000000 SpareVmin : 0
0x0440 (1088) I 00000200 SpareVmin : 131072
0x0444 (1092) I 00000000 SpareVmin : 0
0x0448 (1096) I 00000000 SpareVmin : 0
0x044c (1100) B 00 Padding : 0
0x044d (1101) B 00 SnapToDiscrete : 0
0x044e (1102) B 02 NumDiscreteLevels : 2
0x044f (1103) B 03 CalculateFopt : 3
0x0450 (1104) f 0000803f m : 1
0x0454 (1108) f 00000000 b : 0
0x0458 (1112) I 00000000 Padding3 : 0
0x045c (1116) I 00000000 Padding3 : 0
0x0460 (1120) I 00000000 Padding3 : 0
0x0464 (1124) H 0000 Padding4 : 0
0x0466 (1126) H 0000 FoptimalDc : 0
0x0468 (1128) H f401 FoptimalAc : 500
0x046a (1130) H 0000 Padding2 : 0
0x046c (1132) B 00 Padding : 0
0x046d (1133) B 00 SnapToDiscrete : 0
0x046e (1134) B 02 NumDiscreteLevels : 2
0x046f (1135) B 00 CalculateFopt : 0
0x0470 (1136) f 6210a83f m : 1.313
0x0474 (1140) f f0a7463e b : 0.194
0x0478 (1144) I 00000000 Padding3 : 0
0x047c (1148) I 00000000 Padding3 : 0
0x0480 (1152) I 00010400 Padding3 : 262400
0x0484 (1156) H 0000 Padding4 : 0
0x0486 (1158) H 0000 FoptimalDc : 0
0x0488 (1160) H 0000 FoptimalAc : 0
0x048a (1162) H 0000 Padding2 : 0
0x048c (1164) B 00 Padding : 0
0x048d (1165) B 01 SnapToDiscrete : 1
0x048e (1166) B 04 NumDiscreteLevels : 4
0x048f (1167) B 00 CalculateFopt : 0
0x0490 (1168) f aaf1c23f m : 1.523
0x0494 (1172) f a60ac63d b : 0.0967
0x0498 (1176) I 00000000 Padding3 : 0
0x049c (1180) I 00000000 Padding3 : 0
0x04a0 (1184) I 00000000 Padding3 : 0
0x04a4 (1188) H 0000 Padding4 : 0
0x04a6 (1190) H 0000 FoptimalDc : 0
0x04a8 (1192) H 0000 FoptimalAc : 0
0x04aa (1194) H 0000 Padding2 : 0
0x04ac (1196) B 00 Padding : 0
0x04ad (1197) B 01 SnapToDiscrete : 1
0x04ae (1198) B 08 NumDiscreteLevels : 8
0x04af (1199) B 03 CalculateFopt : 3
0x04b0 (1200) f 0000803f m : 1
0x04b4 (1204) f 00000000 b : 0
0x04b8 (1208) I 00000000 Padding3 : 0
0x04bc (1212) I 00000000 Padding3 : 0
0x04c0 (1216) I 00000000 Padding3 : 0
0x04c4 (1220) H 0000 Padding4 : 0
0x04c6 (1222) H 0000 FoptimalDc : 0
0x04c8 (1224) H fc08 FoptimalAc : 2300
0x04ca (1226) H 0000 Padding2 : 0
0x04cc (1228) B 00 Padding : 0
0x04cd (1229) B 00 SnapToDiscrete : 0
0x04ce (1230) B 02 NumDiscreteLevels : 2
0x04cf (1231) B 00 CalculateFopt : 0
0x04d0 (1232) f 789c823f m : 1.0204
0x04d4 (1236) f a01aaf3e b : 0.342
0x04d8 (1240) I 00000000 Padding3 : 0
0x04dc (1244) I 00000000 Padding3 : 0
0x04e0 (1248) I 00000000 Padding3 : 0
0x04e4 (1252) H 0000 Padding4 : 0
0x04e6 (1254) H 0000 FoptimalDc : 0
0x04e8 (1256) H 0000 FoptimalAc : 0
0x04ea (1258) H 0000 Padding2 : 0
0x04ec (1260) B 00 Padding : 0
0x04ed (1261) B 00 SnapToDiscrete : 0
0x04ee (1262) B 02 NumDiscreteLevels : 2
0x04ef (1263) B 00 CalculateFopt : 0
0x04f0 (1264) f 508d673f m : 0.9045
0x04f4 (1268) f b7d140be b :-0.1883
0x04f8 (1272) I 00000000 Padding3 : 0
0x04fc (1276) I 00000000 Padding3 : 0
0x0500 (1280) I 00000000 Padding3 : 0
0x0504 (1284) H 0000 Padding4 : 0
0x0506 (1286) H 0000 FoptimalDc : 0
0x0508 (1288) H 0000 FoptimalAc : 0
0x050a (1290) H 0000 Padding2 : 0
0x050c (1292) B 00 Padding : 0
0x050d (1293) B 00 SnapToDiscrete : 0
0x050e (1294) B 02 NumDiscreteLevels : 2
0x050f (1295) B 00 CalculateFopt : 0
0x0510 (1296) f 789c823f m : 1.0204
0x0514 (1300) f a01aaf3e b : 0.342
0x0518 (1304) I 00000000 Padding3 : 0
0x051c (1308) I 00000000 Padding3 : 0
0x0520 (1312) I 00000000 Padding3 : 0
0x0524 (1316) H 0000 Padding4 : 0
0x0526 (1318) H 0000 FoptimalDc : 0
0x0528 (1320) H 0000 FoptimalAc : 0
0x052a (1322) H 0000 Padding2 : 0
0x052c (1324) B 00 Padding : 0
0x052d (1325) B 00 SnapToDiscrete : 0
0x052e (1326) B 02 NumDiscreteLevels : 2
0x052f (1327) B 00 CalculateFopt : 0
0x0530 (1328) f 508d673f m : 0.9045
0x0534 (1332) f b7d140be b :-0.1883
0x0538 (1336) I 00000000 Padding3 : 0
0x053c (1340) I 00000000 Padding3 : 0
0x0540 (1344) I 00000000 Padding3 : 0
0x0544 (1348) H 0000 Padding4 : 0
0x0546 (1350) H 0000 FoptimalDc : 0
0x0548 (1352) H 0000 FoptimalAc : 0
0x054a (1354) H 0000 Padding2 : 0
0x054c (1356) B 00 Padding : 0
0x054d (1357) B 00 SnapToDiscrete : 0
0x054e (1358) B 02 NumDiscreteLevels : 2
0x054f (1359) B 00 CalculateFopt : 0
0x0550 (1360) f fed4483f m : 0.7845
0x0554 (1364) f dbf93e3f b : 0.746
0x0558 (1368) I 00000000 Padding3 : 0
0x055c (1372) I 00000000 Padding3 : 0
0x0560 (1376) I 00000000 Padding3 : 0
0x0564 (1380) H 0000 Padding4 : 0
0x0566 (1382) H 0000 FoptimalDc : 0
0x0568 (1384) H 0000 FoptimalAc : 0
0x056a (1386) H 0000 Padding2 : 0
0x056c (1388) B 00 Padding : 0
0x056d (1389) B 00 SnapToDiscrete : 0
0x056e (1390) B 02 NumDiscreteLevels : 2
0x056f (1391) B 00 CalculateFopt : 0
0x0570 (1392) f fed4483f m : 0.7845
0x0574 (1396) f dbf93e3f b : 0.746
0x0578 (1400) I 00000000 Padding3 : 0
0x057c (1404) I 00000000 Padding3 : 0
0x0580 (1408) I 00000000 Padding3 : 0
0x0584 (1412) H 0000 Padding4 : 0
0x0586 (1414) H 0000 FoptimalDc : 0
0x0588 (1416) H 0000 FoptimalAc : 0
0x058a (1418) H 0000 Padding2 : 0
0x058c (1420) B 00 Padding : 0
0x058d (1421) B 00 SnapToDiscrete : 0
0x058e (1422) B 02 NumDiscreteLevels : 2
0x058f (1423) B 00 CalculateFopt : 0
0x0590 (1424) f 986ea23f m : 1.269
0x0594 (1428) f 1283403e b : 0.188
0x0598 (1432) I 00000000 Padding3 : 0
0x059c (1436) I 00000000 Padding3 : 0
0x05a0 (1440) I 00000000 Padding3 : 0
0x05a4 (1444) H 0000 Padding4 : 0
0x05a6 (1446) H 0000 FoptimalDc : 0
0x05a8 (1448) H 0000 FoptimalAc : 0
0x05aa (1450) H 0000 Padding2 : 0
0x05ac (1452) B 00 Padding : 0
0x05ad (1453) B 00 SnapToDiscrete : 0
0x05ae (1454) B 02 NumDiscreteLevels : 2
0x05af (1455) B 00 CalculateFopt : 0
0x05b0 (1456) f f2d28d3f m : 1.108
0x05b4 (1460) f 7b140e3f b : 0.555
0x05b8 (1464) I 00000000 Padding3 : 0
0x05bc (1468) I 00000000 Padding3 : 0
0x05c0 (1472) I 00000000 Padding3 : 0
0x05c4 (1476) H 0000 Padding4 : 0
0x05c6 (1478) H 0000 FoptimalDc : 0
0x05c8 (1480) H 0000 FoptimalAc : 0
0x05ca (1482) H 0000 Padding2 : 0
0x05cc (1484) B 00 Padding : 0
0x05cd (1485) B 00 SnapToDiscrete : 0
0x05ce (1486) B 02 NumDiscreteLevels : 2
0x05cf (1487) B 00 CalculateFopt : 0
0x05d0 (1488) f 986ea23f m : 1.269
0x05d4 (1492) f 1283403e b : 0.188
0x05d8 (1496) I 00000000 Padding3 : 0
0x05dc (1500) I 00000000 Padding3 : 0
0x05e0 (1504) I f401d007 Padding3 : 131072500
0x05e4 (1508) H 0000 Padding4 : 0
0x05e6 (1510) H 0000 FoptimalDc : 0
0x05e8 (1512) H 0000 FoptimalAc : 0
0x05ea (1514) H 0000 Padding2 : 0
0x05ec (1516) H f401 FreqTableGfx : 500
0x05ee (1518) H 920c FreqTableGfx : 3218
0x05f0 (1520) H 0000 FreqTableGfx : 0
0x05f2 (1522) H 0000 FreqTableGfx : 0
0x05f4 (1524) H 0000 FreqTableGfx : 0
0x05f6 (1526) H 0000 FreqTableGfx : 0
0x05f8 (1528) H 0000 FreqTableGfx : 0
0x05fa (1530) H 0000 FreqTableGfx : 0
0x05fc (1532) H 0000 FreqTableGfx : 0
0x05fe (1534) H 0000 FreqTableGfx : 0
0x0600 (1536) H 0000 FreqTableGfx : 0
0x0602 (1538) H 0000 FreqTableGfx : 0
0x0604 (1540) H 0000 FreqTableGfx : 0
0x0606 (1542) H 0000 FreqTableGfx : 0
0x0608 (1544) H 0000 FreqTableGfx : 0
0x060a (1546) H 0000 FreqTableGfx : 0
0x060c (1548) H 0102 FreqTableVclk : 513
0x060e (1550) H 760b FreqTableVclk : 2934
0x0610 (1552) H 0000 FreqTableVclk : 0
0x0612 (1554) H 0000 FreqTableVclk : 0
0x0614 (1556) H 0000 FreqTableVclk : 0
0x0616 (1558) H 0000 FreqTableVclk : 0
0x0618 (1560) H 0000 FreqTableVclk : 0
0x061a (1562) H 0000 FreqTableVclk : 0
0x061c (1564) H 0102 FreqTableDclk : 513
0x061e (1566) H 9808 FreqTableDclk : 2200
0x0620 (1568) H 0000 FreqTableDclk : 0
0x0622 (1570) H 0000 FreqTableDclk : 0
0x0624 (1572) H 0000 FreqTableDclk : 0
0x0626 (1574) H 0000 FreqTableDclk : 0
0x0628 (1576) H 0000 FreqTableDclk : 0
0x062a (1578) H 0000 FreqTableDclk : 0
0x062c (1580) H f401 FreqTableSocclk : 500
0x062e (1582) H dc05 FreqTableSocclk : 1500
0x0630 (1584) H 6100 FreqTableSocclk : 97
0x0632 (1586) H c901 FreqTableSocclk : 457
0x0634 (1588) H ad02 FreqTableSocclk : 685
0x0636 (1590) H e803 FreqTableSocclk : 1000
0x0638 (1592) H 0000 FreqTableSocclk : 0
0x063a (1594) H 0000 FreqTableSocclk : 0
0x063c (1596) H 6100 FreqTableUclk : 97
0x063e (1598) H c901 FreqTableUclk : 457
0x0640 (1600) H 0503 FreqTableUclk : 773
0x0642 (1602) H e204 FreqTableUclk : 1250
0x0644 (1604) H 9400 FreqTableDispclk : 148
0x0646 (1606) H 6608 FreqTableDispclk : 2150
0x0648 (1608) H 0000 FreqTableDispclk : 0
0x064a (1610) H 0000 FreqTableDispclk : 0
0x064c (1612) H 0000 FreqTableDispclk : 0
0x064e (1614) H 0000 FreqTableDispclk : 0
0x0650 (1616) H 0000 FreqTableDispclk : 0
0x0652 (1618) H 0000 FreqTableDispclk : 0
0x0654 (1620) H 9400 FreqTableDppClk : 148
0x0656 (1622) H 6608 FreqTableDppClk : 2150
0x0658 (1624) H 0000 FreqTableDppClk : 0
0x065a (1626) H 0000 FreqTableDppClk : 0
0x065c (1628) H 0000 FreqTableDppClk : 0
0x065e (1630) H 0000 FreqTableDppClk : 0
0x0660 (1632) H 0000 FreqTableDppClk : 0
0x0662 (1634) H 0000 FreqTableDppClk : 0
0x0664 (1636) H cd02 FreqTableDprefclk : 717
0x0666 (1638) H cd02 FreqTableDprefclk : 717
0x0668 (1640) H 0000 FreqTableDprefclk : 0
0x066a (1642) H 0000 FreqTableDprefclk : 0
0x066c (1644) H 0000 FreqTableDprefclk : 0
0x066e (1646) H 0000 FreqTableDprefclk : 0
0x0670 (1648) H 0000 FreqTableDprefclk : 0
0x0672 (1650) H 0000 FreqTableDprefclk : 0
0x0674 (1652) H 9400 FreqTableDcfclk : 148
0x0676 (1654) H 1c06 FreqTableDcfclk : 1564
0x0678 (1656) H 0000 FreqTableDcfclk : 0
0x067a (1658) H 0000 FreqTableDcfclk : 0
0x067c (1660) H 0000 FreqTableDcfclk : 0
0x067e (1662) H 0000 FreqTableDcfclk : 0
0x0680 (1664) H 0000 FreqTableDcfclk : 0
0x0682 (1666) H 0000 FreqTableDcfclk : 0
0x0684 (1668) H 9400 FreqTableDtbclk : 148
0x0686 (1670) H 1c06 FreqTableDtbclk : 1564
0x0688 (1672) H 0000 FreqTableDtbclk : 0
0x068a (1674) H 0000 FreqTableDtbclk : 0
0x068c (1676) H 0000 FreqTableDtbclk : 0
0x068e (1678) H 0000 FreqTableDtbclk : 0
0x0690 (1680) H 0000 FreqTableDtbclk : 0
0x0692 (1682) H 0000 FreqTableDtbclk : 0
0x0694 (1684) H 5802 FreqTableFclk : 600
0x0696 (1686) H e803 FreqTableFclk : 1000
0x0698 (1688) H b004 FreqTableFclk : 1200
0x069a (1690) H 4006 FreqTableFclk : 1600
0x069c (1692) H d007 FreqTableFclk : 2000
0x069e (1694) H 9808 FreqTableFclk : 2200
0x06a0 (1696) H ca08 FreqTableFclk : 2250
0x06a2 (1698) H fc08 FreqTableFclk : 2300
0x06a4 (1700) I 920c0000 DcModeMaxFreq : 3218
0x06a8 (1704) I dc050000 DcModeMaxFreq : 1500
0x06ac (1708) I e2040000 DcModeMaxFreq : 1250
0x06b0 (1712) I fc080000 DcModeMaxFreq : 2300
0x06b4 (1716) I 98080000 DcModeMaxFreq : 2200
0x06b8 (1720) I 760b0000 DcModeMaxFreq : 2934
0x06bc (1724) I 98080000 DcModeMaxFreq : 2200
0x06c0 (1728) I 760b0000 DcModeMaxFreq : 2934
0x06c4 (1732) I 66080000 DcModeMaxFreq : 2150
0x06c8 (1736) I 66080000 DcModeMaxFreq : 2150
0x06cc (1740) I cd020000 DcModeMaxFreq : 717
0x06d0 (1744) I 1c060000 DcModeMaxFreq : 1564
0x06d4 (1748) I 1c060000 DcModeMaxFreq : 1564
0x06d8 (1752) H f401 Mp0clkFreq : 500
0x06da (1754) H bc02 Mp0clkFreq : 700
0x06dc (1756) H f00a Mp0DpmVoltage : 2800
0x06de (1758) H 800c Mp0DpmVoltage : 3200
0x06e0 (1760) B 00 GfxclkSpare : 0
0x06e1 (1761) B 00 GfxclkSpare : 0
0x06e2 (1762) H 0000 GfxclkFreqCap : 0
0x06e4 (1764) H 2003 GfxclkFgfxoffEntry : 800
0x06e6 (1766) H b004 GfxclkFgfxoffExitImu : 1200
0x06e8 (1768) H 2003 GfxclkFgfxoffExitRlc : 800
0x06ea (1770) H fa00 GfxclkThrottleClock : 250
0x06ec (1772) B 01 EnableGfxPowerStagesGpio : 1
0x06ed (1773) B 00 GfxIdlePadding : 0
0x06ee (1774) B 01 SmsRepairWRCKClkDivEn : 1
0x06ef (1775) B 04 SmsRepairWRCKClkDivVal : 4
0x06f0 (1776) B 01 GfxOffEntryEarlyMGCGEn : 1
0x06f1 (1777) B 00 GfxOffEntryForceCGCGEn : 0
0x06f2 (1778) B 00 GfxOffEntryForceCGCGDelayEn : 0
0x06f3 (1779) B 00 GfxOffEntryForceCGCGDelayVal : 0
0x06f4 (1780) H 1405 GfxclkFreqGfxUlv : 1300
0x06f6 (1782) B 00 GfxIdlePadding2 : 0
0x06f7 (1783) B 00 GfxIdlePadding2 : 0
0x06f8 (1784) I 60ea0000 GfxOffEntryHysteresis : 60000
0x06fc (1788) I 00000000 GfxoffSpare : 0
0x0700 (1792) I 00000000 GfxoffSpare : 0
0x0704 (1796) I 00000000 GfxoffSpare : 0
0x0708 (1800) I 00000000 GfxoffSpare : 0
0x070c (1804) I 00000000 GfxoffSpare : 0
0x0710 (1808) I 00000000 GfxoffSpare : 0
0x0714 (1812) I 00000000 GfxoffSpare : 0
0x0718 (1816) I 00000000 GfxoffSpare : 0
0x071c (1820) I 00000000 GfxoffSpare : 0
0x0720 (1824) I 00000000 GfxoffSpare : 0
0x0724 (1828) I 00000000 GfxoffSpare : 0
0x0728 (1832) I 00000000 GfxoffSpare : 0
0x072c (1836) I 00000000 GfxoffSpare : 0
0x0730 (1840) I 00000000 GfxoffSpare : 0
0x0734 (1844) I 00000000 GfxoffSpare : 0
0x0738 (1848) f 0000803f DfllBtcMasterScalerM : 1
0x073c (1852) i 00000000 DfllBtcMasterScalerB : 0
0x0740 (1856) f cdcc8c3f DfllBtcSlaveScalerM : 1.1
0x0744 (1860) i 00000000 DfllBtcSlaveScalerB : 0
0x0748 (1864) I 64006400 DfllPccAsWaitCtrl : 6553700
0x074c (1868) I 2f841f00 DfllPccAsStepCtrl : 2065455
0x0750 (1872) I 713d8a3f GfxGpoSpare : 1066024305
0x0754 (1876) I 00000000 GfxGpoSpare : 0
0x0758 (1880) I 00000000 GfxGpoSpare : 0
0x075c (1884) I 00000000 GfxGpoSpare : 0
0x0760 (1888) I 00000000 GfxGpoSpare : 0
0x0764 (1892) I 00000000 GfxGpoSpare : 0
0x0768 (1896) I 00000000 GfxGpoSpare : 0
0x076c (1900) I 00000000 GfxGpoSpare : 0
0x0770 (1904) I 00000000 GfxGpoSpare : 0
0x0774 (1908) I 00000000 GfxGpoSpare : 0
0x0778 (1912) H 0000 DcsGfxOffVoltage : 0
0x077a (1914) H 0000 PaddingDcs : 0
0x077c (1916) H 0000 DcsMinGfxOffTime : 0
0x077e (1918) H 0000 DcsMaxGfxOffTime : 0
0x0780 (1920) I 00000000 DcsMinCreditAccum : 0
0x0784 (1924) H 0000 DcsExitHysteresis : 0
0x0786 (1926) H 0000 DcsTimeout : 0
0x0788 (1928) I 00000000 DcsSpare : 0
0x078c (1932) I 00000000 DcsSpare : 0
0x0790 (1936) I 00000000 DcsSpare : 0
0x0794 (1940) I 00000000 DcsSpare : 0
0x0798 (1944) I 00000000 DcsSpare : 0
0x079c (1948) I 00000000 DcsSpare : 0
0x07a0 (1952) I 00000000 DcsSpare : 0
0x07a4 (1956) I 00000000 DcsSpare : 0
0x07a8 (1960) I 00000000 DcsSpare : 0
0x07ac (1964) I 00000000 DcsSpare : 0
0x07b0 (1968) I 00000000 DcsSpare : 0
0x07b4 (1972) I 00000000 DcsSpare : 0
0x07b8 (1976) I 00000000 DcsSpare : 0
0x07bc (1980) I 00000000 DcsSpare : 0
0x07c0 (1984) H 6400 ShadowFreqTableUclk : 100
0x07c2 (1986) H b601 ShadowFreqTableUclk : 438
0x07c4 (1988) H db02 ShadowFreqTableUclk : 731
0x07c6 (1990) H a304 ShadowFreqTableUclk : 1187
0x07c8 (1992) B 01 UseStrobeModeOptimizations : 1
0x07c9 (1993) B 0a PaddingMem : 10
0x07ca (1994) B f0 PaddingMem : 240
0x07cb (1995) B 0a PaddingMem : 10
0x07cc (1996) B 03 UclkDpmPstates : 3
0x07cd (1997) B 02 UclkDpmPstates : 2
0x07ce (1998) B 01 UclkDpmPstates : 1
0x07cf (1999) B 00 UclkDpmPstates : 0
0x07d0 (2000) B 00 FreqTableUclkDiv : 0
0x07d1 (2001) B 02 FreqTableUclkDiv : 2
0x07d2 (2002) B 03 FreqTableUclkDiv : 3
0x07d3 (2003) B 03 FreqTableUclkDiv : 3
0x07d4 (2004) H 8c0a MemVmempVoltage : 2700
0x07d6 (2006) H f00a MemVmempVoltage : 2800
0x07d8 (2008) H b80b MemVmempVoltage : 3000
0x07da (2010) H 800c MemVmempVoltage : 3200
0x07dc (2012) H 8813 MemVddioVoltage : 5000
0x07de (2014) H 1815 MemVddioVoltage : 5400
0x07e0 (2016) H 1815 MemVddioVoltage : 5400
0x07e2 (2018) H 1815 MemVddioVoltage : 5400
0x07e4 (2020) B 00 FclkDpmUPstates : 0
0x07e5 (2021) B 01 FclkDpmUPstates : 1
0x07e6 (2022) B 02 FclkDpmUPstates : 2
0x07e7 (2023) B 03 FclkDpmUPstates : 3
0x07e8 (2024) B 04 FclkDpmUPstates : 4
0x07e9 (2025) B 05 FclkDpmUPstates : 5
0x07ea (2026) B 06 FclkDpmUPstates : 6
0x07eb (2027) B 07 FclkDpmUPstates : 7
0x07ec (2028) H b80b FclkDpmVddU : 3000
0x07ee (2030) H b80b FclkDpmVddU : 3000
0x07f0 (2032) H b80b FclkDpmVddU : 3000
0x07f2 (2034) H b80b FclkDpmVddU : 3000
0x07f4 (2036) H b80b FclkDpmVddU : 3000
0x07f6 (2038) H 480d FclkDpmVddU : 3400
0x07f8 (2040) H 480d FclkDpmVddU : 3400
0x07fa (2042) H 480d FclkDpmVddU : 3400
0x07fc (2044) H 6009 FclkDpmUSpeed : 2400
0x07fe (2046) H a00f FclkDpmUSpeed : 4000
0x0800 (2048) H c012 FclkDpmUSpeed : 4800
0x0802 (2050) H 0019 FclkDpmUSpeed : 6400
0x0804 (2052) H 401f FclkDpmUSpeed : 8000
0x0806 (2054) H 6022 FclkDpmUSpeed : 8800
0x0808 (2056) H 2823 FclkDpmUSpeed : 9000
0x080a (2058) H f023 FclkDpmUSpeed : 9200
0x080c (2060) H 0000 FclkDpmDisallowPstateFreq : 0
0x080e (2062) H 0000 PaddingFclk : 0
0x0810 (2064) B 00 PcieGenSpeed : 0
0x0811 (2065) B 01 PcieGenSpeed : 1
0x0812 (2066) B 03 PcieGenSpeed : 3
0x0813 (2067) B 01 PcieLaneCount : 1
0x0814 (2068) B 03 PcieLaneCount : 3
0x0815 (2069) B 06 PcieLaneCount : 6
0x0816 (2070) H 4e00 LclkFreq : 78
0x0818 (2072) H 9c00 LclkFreq : 156
0x081a (2074) H 6f02 LclkFreq : 623
0x081c (2076) H 0000 FanStopTemp : 0
0x081e (2078) H 3200 FanStopTemp : 50
0x0820 (2080) H 3200 FanStopTemp : 50
0x0822 (2082) H 3200 FanStopTemp : 50
0x0824 (2084) H 3c00 FanStopTemp : 60
0x0826 (2086) H 3200 FanStopTemp : 50
0x0828 (2088) H 3200 FanStopTemp : 50
0x082a (2090) H 3200 FanStopTemp : 50
0x082c (2092) H 3200 FanStopTemp : 50
0x082e (2094) H 3200 FanStopTemp : 50
0x0830 (2096) H 0000 FanStopTemp : 0
0x0832 (2098) H 0000 FanStopTemp : 0
0x0834 (2100) H 0000 FanStopTemp : 0
0x0836 (2102) H 0000 FanStartTemp : 0
0x0838 (2104) H 3c00 FanStartTemp : 60
0x083a (2106) H 3c00 FanStartTemp : 60
0x083c (2108) H 3c00 FanStartTemp : 60
0x083e (2110) H 4600 FanStartTemp : 70
0x0840 (2112) H 3c00 FanStartTemp : 60
0x0842 (2114) H 3c00 FanStartTemp : 60
0x0844 (2116) H 3c00 FanStartTemp : 60
0x0846 (2118) H 3c00 FanStartTemp : 60
0x0848 (2120) H 3c00 FanStartTemp : 60
0x084a (2122) H 0000 FanStartTemp : 0
0x084c (2124) H 0000 FanStartTemp : 0
0x084e (2126) H 0000 FanStartTemp : 0
0x0850 (2128) H 0000 FanGain : 0
0x0852 (2130) H 9001 FanGain : 400
0x0854 (2132) H 9001 FanGain : 400
0x0856 (2134) H 9001 FanGain : 400
0x0858 (2136) H 9001 FanGain : 400
0x085a (2138) H 9001 FanGain : 400
0x085c (2140) H 9001 FanGain : 400
0x085e (2142) H 9001 FanGain : 400
0x0860 (2144) H 9001 FanGain : 400
0x0862 (2146) H 9001 FanGain : 400
0x0864 (2148) H 0000 FanGain : 0
0x0866 (2150) H 0000 FanGain : 0
0x0868 (2152) H 0000 FanGain : 0
0x086a (2154) H 2413 FanGainPadding : 4900
0x086c (2156) H 0f00 FanPwmMin : 15
0x086e (2158) H 4006 AcousticTargetRpmThreshold : 1600
0x0870 (2160) H e40c AcousticLimitRpmThreshold : 3300
0x0872 (2162) H e40c FanMaximumRpm : 3300
0x0874 (2164) H b80b MGpuAcousticLimitRpmThreshold : 3000
0x0876 (2166) H f401 FanTargetGfxclk : 500
0x0878 (2168) I f2030000 TempInputSelectMask : 1010
0x087c (2172) B 01 FanZeroRpmEnable : 1
0x087d (2173) B 02 FanTachEdgePerRev : 2
0x087e (2174) H 0000 FanTargetTemperature : 0
0x0880 (2176) H 5200 FanTargetTemperature : 82
0x0882 (2178) H 5200 FanTargetTemperature : 82
0x0884 (2180) H 5200 FanTargetTemperature : 82
0x0886 (2182) H 5a00 FanTargetTemperature : 90
0x0888 (2184) H 6400 FanTargetTemperature : 100
0x088a (2186) H 6400 FanTargetTemperature : 100
0x088c (2188) H 6400 FanTargetTemperature : 100
0x088e (2190) H 6400 FanTargetTemperature : 100
0x0890 (2192) H 6400 FanTargetTemperature : 100
0x0892 (2194) H 0000 FanTargetTemperature : 0
0x0894 (2196) H 0000 FanTargetTemperature : 0
0x0896 (2198) H 0000 FanTargetTemperature : 0
0x0898 (2200) h 0000 FuzzyFan_ErrorSetDelta : 0
0x089a (2202) h 0000 FuzzyFan_ErrorRateSetDelta : 0
0x089c (2204) h 0000 FuzzyFan_PwmSetDelta : 0
0x089e (2206) H 7d00 FuzzyFan_Reserved : 125
0x08a0 (2208) H 0000 FwCtfLimit : 0
0x08a2 (2210) H 7600 FwCtfLimit : 118
0x08a4 (2212) H 7600 FwCtfLimit : 118
0x08a6 (2214) H 7600 FwCtfLimit : 118
0x08a8 (2216) H 7100 FwCtfLimit : 113
0x08aa (2218) H 7d00 FwCtfLimit : 125
0x08ac (2220) H 7d00 FwCtfLimit : 125
0x08ae (2222) H 7d00 FwCtfLimit : 125
0x08b0 (2224) H 7d00 FwCtfLimit : 125
0x08b2 (2226) H 7d00 FwCtfLimit : 125
0x08b4 (2228) H 0000 FwCtfLimit : 0
0x08b6 (2230) H 0000 FwCtfLimit : 0
0x08b8 (2232) H 0000 FwCtfLimit : 0
0x08ba (2234) H e803 IntakeTempEnableRPM : 1000
0x08bc (2236) h c800 IntakeTempOffsetTemp : 200
0x08be (2238) H 2d00 IntakeTempReleaseTemp : 45
0x08c0 (2240) H b80b IntakeTempHighIntakeAcousticLimit : 3000
0x08c2 (2242) H 6400 IntakeTempAcouticLimitReleaseRate : 100
0x08c4 (2244) h ecff FanAbnormalTempLimitOffset :-20
0x08c6 (2246) H fa00 FanStalledTriggerRpm : 250
0x08c8 (2248) H 5500 FanAbnormalTriggerRpmCoeff : 85
0x08ca (2250) H 0000 FanAbnormalDetectionEnable : 0
0x08cc (2252) B 01 FanIntakeSensorSupport : 1
0x08cd (2253) B 00 FanIntakePadding : 0
0x08ce (2254) B 00 FanIntakePadding : 0
0x08cf (2255) B 00 FanIntakePadding : 0
0x08d0 (2256) I 00000000 FanSpare : 0
0x08d4 (2260) I 00000000 FanSpare : 0
0x08d8 (2264) I 00000000 FanSpare : 0
0x08dc (2268) I 00000000 FanSpare : 0
0x08e0 (2272) I 00000000 FanSpare : 0
0x08e4 (2276) I 00000000 FanSpare : 0
0x08e8 (2280) I 00000000 FanSpare : 0
0x08ec (2284) I 00000000 FanSpare : 0
0x08f0 (2288) I 00000000 FanSpare : 0
0x08f4 (2292) I 00000000 FanSpare : 0
0x08f8 (2296) I 00000000 FanSpare : 0
0x08fc (2300) I 00000000 FanSpare : 0
0x0900 (2304) I 00000000 FanSpare : 0
0x0904 (2308) B 00 OverrideGfxAvfsFuses : 0
0x0905 (2309) B 00 GfxAvfsPadding : 0
0x0906 (2310) B 00 GfxAvfsPadding : 0
0x0907 (2311) B 00 GfxAvfsPadding : 0
0x0908 (2312) I 00000001 L2HwRtAvfsFuses : 16777216
0x090c (2316) I 00000001 L2HwRtAvfsFuses : 16777216
0x0910 (2320) I 00000001 L2HwRtAvfsFuses : 16777216
0x0914 (2324) I 00000001 L2HwRtAvfsFuses : 16777216
0x0918 (2328) I 00000001 L2HwRtAvfsFuses : 16777216
0x091c (2332) I 40050002 L2HwRtAvfsFuses : 33555776
0x0920 (2336) I 00100000 L2HwRtAvfsFuses : 4096
0x0924 (2340) I 40050002 L2HwRtAvfsFuses : 33555776
0x0928 (2344) I 00100000 L2HwRtAvfsFuses : 4096
0x092c (2348) I 40050002 L2HwRtAvfsFuses : 33555776
0x0930 (2352) I 00100000 L2HwRtAvfsFuses : 4096
0x0934 (2356) I 40050002 L2HwRtAvfsFuses : 33555776
0x0938 (2360) I 00100000 L2HwRtAvfsFuses : 4096
0x093c (2364) I 40050002 L2HwRtAvfsFuses : 33555776
0x0940 (2368) I 00100000 L2HwRtAvfsFuses : 4096
0x0944 (2372) I e7001301 L2HwRtAvfsFuses : 18022631
0x0948 (2376) I 34013101 L2HwRtAvfsFuses : 19988788
0x094c (2380) I 80015801 L2HwRtAvfsFuses : 22544768
0x0950 (2384) I cd018b01 L2HwRtAvfsFuses : 25887181
0x0954 (2388) I 00000000 L2HwRtAvfsFuses : 0
0x0958 (2392) I 00000000 L2HwRtAvfsFuses : 0
0x095c (2396) I 00000000 L2HwRtAvfsFuses : 0
0x0960 (2400) I 00000000 L2HwRtAvfsFuses : 0
0x0964 (2404) I 00000000 L2HwRtAvfsFuses : 0
0x0968 (2408) I 00000000 L2HwRtAvfsFuses : 0
0x096c (2412) I 00000000 L2HwRtAvfsFuses : 0
0x0970 (2416) I 00000000 L2HwRtAvfsFuses : 0
0x0974 (2420) I 00000000 L2HwRtAvfsFuses : 0
0x0978 (2424) I 10801080 L2HwRtAvfsFuses : 2148565008
0x097c (2428) I 10801080 L2HwRtAvfsFuses : 2148565008
0x0980 (2432) I 10800000 L2HwRtAvfsFuses : 32784
0x0984 (2436) I ffff0000 L2HwRtAvfsFuses : 65535
0x0988 (2440) I 00000001 SeHwRtAvfsFuses : 16777216
0x098c (2444) I 00000001 SeHwRtAvfsFuses : 16777216
0x0990 (2448) I 00000001 SeHwRtAvfsFuses : 16777216
0x0994 (2452) I 00000001 SeHwRtAvfsFuses : 16777216
0x0998 (2456) I 00000001 SeHwRtAvfsFuses : 16777216
0x099c (2460) I 40050002 SeHwRtAvfsFuses : 33555776
0x09a0 (2464) I 00100000 SeHwRtAvfsFuses : 4096
0x09a4 (2468) I 40050002 SeHwRtAvfsFuses : 33555776
0x09a8 (2472) I 00100000 SeHwRtAvfsFuses : 4096
0x09ac (2476) I 40050002 SeHwRtAvfsFuses : 33555776
0x09b0 (2480) I 00100000 SeHwRtAvfsFuses : 4096
0x09b4 (2484) I 40050002 SeHwRtAvfsFuses : 33555776
0x09b8 (2488) I 00100000 SeHwRtAvfsFuses : 4096
0x09bc (2492) I 40050002 SeHwRtAvfsFuses : 33555776
0x09c0 (2496) I 00100000 SeHwRtAvfsFuses : 4096
0x09c4 (2500) I e7001301 SeHwRtAvfsFuses : 18022631
0x09c8 (2504) I 34013101 SeHwRtAvfsFuses : 19988788
0x09cc (2508) I 80015801 SeHwRtAvfsFuses : 22544768
0x09d0 (2512) I cd018b01 SeHwRtAvfsFuses : 25887181
0x09d4 (2516) I 00000000 SeHwRtAvfsFuses : 0
0x09d8 (2520) I 00000000 SeHwRtAvfsFuses : 0
0x09dc (2524) I 00000000 SeHwRtAvfsFuses : 0
0x09e0 (2528) I 00000000 SeHwRtAvfsFuses : 0
0x09e4 (2532) I 00000000 SeHwRtAvfsFuses : 0
0x09e8 (2536) I 00000000 SeHwRtAvfsFuses : 0
0x09ec (2540) I 00000000 SeHwRtAvfsFuses : 0
0x09f0 (2544) I 00000000 SeHwRtAvfsFuses : 0
0x09f4 (2548) I 00000000 SeHwRtAvfsFuses : 0
0x09f8 (2552) I 10801080 SeHwRtAvfsFuses : 2148565008
0x09fc (2556) I 10801080 SeHwRtAvfsFuses : 2148565008
0x0a00 (2560) I 10800000 SeHwRtAvfsFuses : 32784
0x0a04 (2564) I ffff0000 SeHwRtAvfsFuses : 65535
0x0a08 (2568) I bc020000 CommonRtAvfs : 700
0x0a0c (2572) I bc020000 CommonRtAvfs : 700
0x0a10 (2576) I bc020000 CommonRtAvfs : 700
0x0a14 (2580) I bc020000 CommonRtAvfs : 700
0x0a18 (2584) I bc020000 CommonRtAvfs : 700
0x0a1c (2588) I bc020000 CommonRtAvfs : 700
0x0a20 (2592) I bc020000 CommonRtAvfs : 700
0x0a24 (2596) I bc020000 CommonRtAvfs : 700
0x0a28 (2600) I 00000000 CommonRtAvfs : 0
0x0a2c (2604) I aa020000 CommonRtAvfs : 682
0x0a30 (2608) I aa020000 CommonRtAvfs : 682
0x0a34 (2612) I aa020000 CommonRtAvfs : 682
0x0a38 (2616) I aa020000 CommonRtAvfs : 682
0x0a3c (2620) I 00000000 L2FwRtAvfsFuses : 0
0x0a40 (2624) I 00000000 L2FwRtAvfsFuses : 0
0x0a44 (2628) I 00000000 L2FwRtAvfsFuses : 0
0x0a48 (2632) I 00000000 L2FwRtAvfsFuses : 0
0x0a4c (2636) I 00000000 L2FwRtAvfsFuses : 0
0x0a50 (2640) I 00000000 L2FwRtAvfsFuses : 0
0x0a54 (2644) I 00000000 L2FwRtAvfsFuses : 0
0x0a58 (2648) I 00000000 L2FwRtAvfsFuses : 0
0x0a5c (2652) I 00000000 L2FwRtAvfsFuses : 0
0x0a60 (2656) I 00000000 L2FwRtAvfsFuses : 0
0x0a64 (2660) I 00000000 L2FwRtAvfsFuses : 0
0x0a68 (2664) I 00000000 L2FwRtAvfsFuses : 0
0x0a6c (2668) I 32000000 L2FwRtAvfsFuses : 50
0x0a70 (2672) I b80b0000 L2FwRtAvfsFuses : 3000
0x0a74 (2676) I 02060000 L2FwRtAvfsFuses : 1538
0x0a78 (2680) I 02060000 L2FwRtAvfsFuses : 1538
0x0a7c (2684) I 02060000 L2FwRtAvfsFuses : 1538
0x0a80 (2688) I 02060000 L2FwRtAvfsFuses : 1538
0x0a84 (2692) I 02060000 L2FwRtAvfsFuses : 1538
0x0a88 (2696) I 00000000 SeFwRtAvfsFuses : 0
0x0a8c (2700) I 00000000 SeFwRtAvfsFuses : 0
0x0a90 (2704) I 00000000 SeFwRtAvfsFuses : 0
0x0a94 (2708) I 00000000 SeFwRtAvfsFuses : 0
0x0a98 (2712) I 00000000 SeFwRtAvfsFuses : 0
0x0a9c (2716) I 00000000 SeFwRtAvfsFuses : 0
0x0aa0 (2720) I 00000000 SeFwRtAvfsFuses : 0
0x0aa4 (2724) I 00000000 SeFwRtAvfsFuses : 0
0x0aa8 (2728) I 00000000 SeFwRtAvfsFuses : 0
0x0aac (2732) I 00000000 SeFwRtAvfsFuses : 0
0x0ab0 (2736) I 00000000 SeFwRtAvfsFuses : 0
0x0ab4 (2740) I 00000000 SeFwRtAvfsFuses : 0
0x0ab8 (2744) I 32000000 SeFwRtAvfsFuses : 50
0x0abc (2748) I b80b0000 SeFwRtAvfsFuses : 3000
0x0ac0 (2752) I 02060000 SeFwRtAvfsFuses : 1538
0x0ac4 (2756) I 02060000 SeFwRtAvfsFuses : 1538
0x0ac8 (2760) I 02060000 SeFwRtAvfsFuses : 1538
0x0acc (2764) I 02060000 SeFwRtAvfsFuses : 1538
0x0ad0 (2768) I 02060000 SeFwRtAvfsFuses : 1538
0x0ad4 (2772) f 00000000 Droop_PWL_F : 0
0x0ad8 (2776) f 00000040 Droop_PWL_F : 2
0x0adc (2780) f 00002040 Droop_PWL_F : 2.5
0x0ae0 (2784) f 00004040 Droop_PWL_F : 3
0x0ae4 (2788) f 00006040 Droop_PWL_F : 3.5
0x0ae8 (2792) f df32a73d Droop_PWL_a : 0.08164
0x0aec (2796) f df32a73d Droop_PWL_a : 0.08164
0x0af0 (2800) f df32a73d Droop_PWL_a : 0.08164
0x0af4 (2804) f df32a73d Droop_PWL_a : 0.08164
0x0af8 (2808) f df32a73d Droop_PWL_a : 0.08164
0x0afc (2812) f 1c42953d Droop_PWL_b : 0.07288
0x0b00 (2816) f 1c42953d Droop_PWL_b : 0.07288
0x0b04 (2820) f 7250c23d Droop_PWL_b : 0.09488
0x0b08 (2824) f 1c42953d Droop_PWL_b : 0.07288
0x0b0c (2828) f 1c42953d Droop_PWL_b : 0.07288
0x0b10 (2832) f 0d8ed2bd Droop_PWL_c :-0.10281
0x0b14 (2836) f 0d8ed2bd Droop_PWL_c :-0.10281
0x0b18 (2840) f a0e002be Droop_PWL_c :-0.12781
0x0b1c (2844) f f2ea1cbd Droop_PWL_c :-0.03831
0x0b20 (2848) f f2ea1cbd Droop_PWL_c :-0.03831
0x0b24 (2852) I 0ad7233c Static_PWL_Offset : 1008981770
0x0b28 (2856) I 0ad7233c Static_PWL_Offset : 1008981770
0x0b2c (2860) I 0ad7233c Static_PWL_Offset : 1008981770
0x0b30 (2864) I 0ad7233c Static_PWL_Offset : 1008981770
0x0b34 (2868) I 0ad7233c Static_PWL_Offset : 1008981770
0x0b38 (2872) I 00000000 GbV_dT_vmin : 0
0x0b3c (2876) I 00000000 GbV_dT_vmax : 0
0x0b40 (2880) I 58020000 V2F_vmin_range_low : 600
0x0b44 (2884) I bc020000 V2F_vmin_range_high : 700
0x0b48 (2888) I 4c040000 V2F_vmax_range_low : 1100
0x0b4c (2892) I b0040000 V2F_vmax_range_high : 1200
0x0b50 (2896) B 00 DcBtcEnabled : 0
0x0b51 (2897) B 00 Padding : 0
0x0b52 (2898) B 00 Padding : 0
0x0b53 (2899) B 00 Padding : 0
0x0b54 (2900) H 1800 DcTol : 24
0x0b56 (2902) H 0000 DcBtcGb : 0
0x0b58 (2904) H 0000 DcBtcMin : 0
0x0b5a (2906) H 0000 DcBtcMax : 0
0x0b5c (2908) f 00000000 m : 0
0x0b60 (2912) f 00000000 b : 0
0x0b64 (2916) I 00000000 GfxAvfsSpare : 0
0x0b68 (2920) I 00000000 GfxAvfsSpare : 0
0x0b6c (2924) I 00000000 GfxAvfsSpare : 0
0x0b70 (2928) I 00000000 GfxAvfsSpare : 0
0x0b74 (2932) I 00000000 GfxAvfsSpare : 0
0x0b78 (2936) I 00000000 GfxAvfsSpare : 0
0x0b7c (2940) I 00000000 GfxAvfsSpare : 0
0x0b80 (2944) I 00000000 GfxAvfsSpare : 0
0x0b84 (2948) I 00000000 GfxAvfsSpare : 0
0x0b88 (2952) I 00000000 GfxAvfsSpare : 0
0x0b8c (2956) I 00000000 GfxAvfsSpare : 0
0x0b90 (2960) I 00000000 GfxAvfsSpare : 0
0x0b94 (2964) I 00000000 GfxAvfsSpare : 0
0x0b98 (2968) I 00000000 GfxAvfsSpare : 0
0x0b9c (2972) I 00000000 GfxAvfsSpare : 0
0x0ba0 (2976) I 00000000 GfxAvfsSpare : 0
0x0ba4 (2980) I 00000000 GfxAvfsSpare : 0
0x0ba8 (2984) I 00000000 GfxAvfsSpare : 0
0x0bac (2988) I 00000000 GfxAvfsSpare : 0
0x0bb0 (2992) I 00000000 GfxAvfsSpare : 0
0x0bb4 (2996) I 00000000 GfxAvfsSpare : 0
0x0bb8 (3000) I 00000000 GfxAvfsSpare : 0
0x0bbc (3004) I 00000000 GfxAvfsSpare : 0
0x0bc0 (3008) I 00000000 GfxAvfsSpare : 0
0x0bc4 (3012) I 00000000 GfxAvfsSpare : 0
0x0bc8 (3016) I 00000000 GfxAvfsSpare : 0
0x0bcc (3020) I 00000000 GfxAvfsSpare : 0
0x0bd0 (3024) I 00000000 GfxAvfsSpare : 0
0x0bd4 (3028) I 00000000 GfxAvfsSpare : 0
0x0bd8 (3032) I 00000000 GfxAvfsSpare : 0
0x0bdc (3036) I 00000000 GfxAvfsSpare : 0
0x0be0 (3040) I 00000000 GfxAvfsSpare : 0
0x0be4 (3044) B 00 OverrideSocAvfsFuses : 0
0x0be5 (3045) B 01 MinSocAvfsRevision : 1
0x0be6 (3046) B 00 SocAvfsPadding : 0
0x0be7 (3047) B 00 SocAvfsPadding : 0
0x0be8 (3048) H 0000 AvfsTemp : 0
0x0bea (3050) H 5500 AvfsTemp : 85
0x0bec (3052) H 2c01 VftFMin : 300
0x0bee (3054) H f00a VInversion : 2800
0x0bf0 (3056) f dcd7013d a : 0.0317
0x0bf4 (3060) f 399c793d b : 0.06094
0x0bf8 (3064) f 5e80ed3e c : 0.46387
0x0bfc (3068) f d8b6283d a : 0.04119
0x0c00 (3072) f e223623d b : 0.05521
0x0c04 (3076) f a1dbdb3e c : 0.42941
0x0c08 (3080) f 00000000 a : 0
0x0c0c (3084) f 00000000 b : 0
0x0c10 (3088) f a69b443d c : 0.048
0x0c14 (3092) f 00000000 a : 0
0x0c18 (3096) f 00000000 b : 0
0x0c1c (3100) f 00000000 c : 0
0x0c20 (3104) H 0000 AvfsTemp : 0
0x0c22 (3106) H 5500 AvfsTemp : 85
0x0c24 (3108) H 2c01 VftFMin : 300
0x0c26 (3110) H f00a VInversion : 2800
0x0c28 (3112) f dcd7013d a : 0.0317
0x0c2c (3116) f 399c793d b : 0.06094
0x0c30 (3120) f 5e80ed3e c : 0.46387
0x0c34 (3124) f d8b6283d a : 0.04119
0x0c38 (3128) f e223623d b : 0.05521
0x0c3c (3132) f a1dbdb3e c : 0.42941
0x0c40 (3136) f 00000000 a : 0
0x0c44 (3140) f 00000000 b : 0
0x0c48 (3144) f a69b443d c : 0.048
0x0c4c (3148) f 00000000 a : 0
0x0c50 (3152) f 00000000 b : 0
0x0c54 (3156) f 00000000 c : 0
0x0c58 (3160) H 0000 AvfsTemp : 0
0x0c5a (3162) H 5500 AvfsTemp : 85
0x0c5c (3164) H 2c01 VftFMin : 300
0x0c5e (3166) H f00a VInversion : 2800
0x0c60 (3168) f dcd7013d a : 0.0317
0x0c64 (3172) f 399c793d b : 0.06094
0x0c68 (3176) f 5e80ed3e c : 0.46387
0x0c6c (3180) f d8b6283d a : 0.04119
0x0c70 (3184) f e223623d b : 0.05521
0x0c74 (3188) f a1dbdb3e c : 0.42941
0x0c78 (3192) f 00000000 a : 0
0x0c7c (3196) f 00000000 b : 0
0x0c80 (3200) f a69b443d c : 0.048
0x0c84 (3204) f 00000000 a : 0
0x0c88 (3208) f 00000000 b : 0
0x0c8c (3212) f 00000000 c : 0
0x0c90 (3216) f 0000c03f a : 1.5
0x0c94 (3220) f e4839ebd b :-0.0774
0x0c98 (3224) f 9cc440bf c :-0.753
0x0c9c (3228) f 0000c03f a : 1.5
0x0ca0 (3232) f e4839ebd b :-0.0774
0x0ca4 (3236) f 9cc440bf c :-0.753
0x0ca8 (3240) f 0000c03f a : 1.5
0x0cac (3244) f e4839ebd b :-0.0774
0x0cb0 (3248) f 9cc440bf c :-0.753
0x0cb4 (3252) f 00000000 m : 0
0x0cb8 (3256) f 00000000 b : 0
0x0cbc (3260) f 00000000 m : 0
0x0cc0 (3264) f 00000000 b : 0
0x0cc4 (3268) f 00000000 m : 0
0x0cc8 (3272) f 00000000 b : 0
0x0ccc (3276) f 00000000 a : 0
0x0cd0 (3280) f 00000000 b : 0
0x0cd4 (3284) f 00000000 c : 0
0x0cd8 (3288) f 00000000 a : 0
0x0cdc (3292) f 00000000 b : 0
0x0ce0 (3296) f 00000000 c : 0
0x0ce4 (3300) f 00000000 a : 0
0x0ce8 (3304) f 00000000 b : 0
0x0cec (3308) f 00000000 c : 0
0x0cf0 (3312) B 01 DcBtcEnabled : 1
0x0cf1 (3313) B 00 Padding : 0
0x0cf2 (3314) B 00 Padding : 0
0x0cf3 (3315) B 00 Padding : 0
0x0cf4 (3316) H b400 DcTol : 180
0x0cf6 (3318) H 1800 DcBtcGb : 24
0x0cf8 (3320) H 0000 DcBtcMin : 0
0x0cfa (3322) H b400 DcBtcMax : 180
0x0cfc (3324) f 00002040 m : 2.5
0x0d00 (3328) f 00000000 b : 0
0x0d04 (3332) B 01 DcBtcEnabled : 1
0x0d05 (3333) B 00 Padding : 0
0x0d06 (3334) B 00 Padding : 0
0x0d07 (3335) B 00 Padding : 0
0x0d08 (3336) H b400 DcTol : 180
0x0d0a (3338) H 1800 DcBtcGb : 24
0x0d0c (3340) H 0000 DcBtcMin : 0
0x0d0e (3342) H b400 DcBtcMax : 180
0x0d10 (3344) f 00009040 m : 4.5
0x0d14 (3348) f 00000000 b : 0
0x0d18 (3352) B 00 DcBtcEnabled : 0
0x0d19 (3353) B 00 Padding : 0
0x0d1a (3354) B 00 Padding : 0
0x0d1b (3355) B 00 Padding : 0
0x0d1c (3356) H 0000 DcTol : 0
0x0d1e (3358) H 0000 DcBtcGb : 0
0x0d20 (3360) H 0000 DcBtcMin : 0
0x0d22 (3362) H 0000 DcBtcMax : 0
0x0d24 (3364) f 00000000 m : 0
0x0d28 (3368) f 00000000 b : 0
0x0d2c (3372) I 00000000 SocAvfsSpare : 0
0x0d30 (3376) I 00000000 SocAvfsSpare : 0
0x0d34 (3380) I 00000000 SocAvfsSpare : 0
0x0d38 (3384) I 00000000 SocAvfsSpare : 0
0x0d3c (3388) I 00000000 SocAvfsSpare : 0
0x0d40 (3392) I 00000000 SocAvfsSpare : 0
0x0d44 (3396) I 00000000 SocAvfsSpare : 0
0x0d48 (3400) I 00000000 SocAvfsSpare : 0
0x0d4c (3404) I 00000000 SocAvfsSpare : 0
0x0d50 (3408) I 00000000 SocAvfsSpare : 0
0x0d54 (3412) I 00000000 SocAvfsSpare : 0
0x0d58 (3416) I 00000000 SocAvfsSpare : 0
0x0d5c (3420) I 00000000 SocAvfsSpare : 0
0x0d60 (3424) I 00000000 SocAvfsSpare : 0
0x0d64 (3428) I 00000000 SocAvfsSpare : 0
0x0d68 (3432) I 00000000 SocAvfsSpare : 0
0x0d6c (3436) I 00000000 SocAvfsSpare : 0
0x0d70 (3440) I 00000000 SocAvfsSpare : 0
0x0d74 (3444) I 00000000 SocAvfsSpare : 0
0x0d78 (3448) I 00000000 SocAvfsSpare : 0
0x0d7c (3452) I 00000000 SocAvfsSpare : 0
0x0d80 (3456) I 00000000 SocAvfsSpare : 0
0x0d84 (3460) I 00000000 SocAvfsSpare : 0
0x0d88 (3464) I 00000000 SocAvfsSpare : 0
0x0d8c (3468) I 00000000 SocAvfsSpare : 0
0x0d90 (3472) I 00000000 SocAvfsSpare : 0
0x0d94 (3476) I 00000000 SocAvfsSpare : 0
0x0d98 (3480) I 00000000 SocAvfsSpare : 0
0x0d9c (3484) I 00000000 SocAvfsSpare : 0
0x0da0 (3488) I 00000000 SocAvfsSpare : 0
0x0da4 (3492) I 00000000 SocAvfsSpare : 0
0x0da8 (3496) I 00000000 SocAvfsSpare : 0
0x0dac (3500) H b004 InitGfxclk_bypass : 1200
0x0dae (3502) H 5802 InitSocclk : 600
0x0db0 (3504) H d002 InitMp0clk : 720
0x0db2 (3506) H f401 InitMpioclk : 500
0x0db4 (3508) H f401 InitSmnclk : 500
0x0db6 (3510) H e803 InitUcpclk : 1000
0x0db8 (3512) H 9001 InitCsrclk : 400
0x0dba (3514) H cd02 InitDprefclk : 717
0x0dbc (3516) H 9602 InitDcfclk : 662
0x0dbe (3518) H 0000 InitDtbclk : 0
0x0dc0 (3520) H 0102 InitDclk : 513
0x0dc2 (3522) H 0102 InitVclk : 513
0x0dc4 (3524) H a002 InitUsbdfsclk : 672
0x0dc6 (3526) H fd01 InitMp1clk : 509
0x0dc8 (3528) H 6f02 InitLclk : 623
0x0dca (3530) H 9001 InitBaco400clk_bypass : 400
0x0dcc (3532) H b004 InitBaco1200clk_bypass : 1200
0x0dce (3534) H bc02 InitBaco700clk_bypass : 700
0x0dd0 (3536) H e803 InitFclk : 1000
0x0dd2 (3538) H 0000 InitGfxclk_clkb : 0
0x0dd4 (3540) B 00 InitUclkDPMState : 0
0x0dd5 (3541) B 00 Padding : 0
0x0dd6 (3542) B 00 Padding : 0
0x0dd7 (3543) B 00 Padding : 0
0x0dd8 (3544) I 94110000 InitVcoFreqPll0 : 4500
0x0ddc (3548) I cc100000 InitVcoFreqPll1 : 4300
0x0de0 (3552) I 00000000 InitVcoFreqPll2 : 0
0x0de4 (3556) I 04100000 InitVcoFreqPll3 : 4100
0x0de8 (3560) I a00f0000 InitVcoFreqPll4 : 4000
0x0dec (3564) I 68100000 InitVcoFreqPll5 : 4200
0x0df0 (3568) I 00000000 InitVcoFreqPll6 : 0
0x0df4 (3572) H 0000 InitGfx : 0
0x0df6 (3574) H 800c InitSoc : 3200
0x0df8 (3576) H 480d InitU : 3400
0x0dfa (3578) H 0000 Padding2 : 0
0x0dfc (3580) I 00000000 Spare : 0
0x0e00 (3584) I 00000000 Spare : 0
0x0e04 (3588) I 00000000 Spare : 0
0x0e08 (3592) I 00000000 Spare : 0
0x0e0c (3596) I 00000000 Spare : 0
0x0e10 (3600) I 00000000 Spare : 0
0x0e14 (3604) I 00000000 Spare : 0
0x0e18 (3608) I 00000000 Spare : 0
0x0e1c (3612) H 1b08 BaseClockAc : 2075
0x0e1e (3614) H d309 GameClockAc : 2515
0x0e20 (3616) H 390a BoostClockAc : 2617
0x0e22 (3618) H 0000 BaseClockDc : 0
0x0e24 (3620) H 0000 GameClockDc : 0
0x0e26 (3622) H 0000 BoostClockDc : 0
0x0e28 (3624) I 00000000 Reserved : 0
0x0e2c (3628) I 00000000 Reserved : 0
0x0e30 (3632) I 00000000 Reserved : 0
0x0e34 (3636) I 00000000 Reserved : 0
0x0e38 (3640) H 5e01 Power : 350
0x0e3a (3642) H 0000 Power : 0
0x0e3c (3644) H b004 Power : 1200
0x0e3e (3646) H 0000 Power : 0
0x0e40 (3648) H 0000 Power : 0
0x0e42 (3650) H 0000 Power : 0
0x0e44 (3652) H 0000 Power : 0
0x0e46 (3654) H 0000 Power : 0
0x0e48 (3656) H c001 Tdc : 448
0x0e4a (3658) H 5200 Tdc : 82
0x0e4c (3660) H 5600 Tdc : 86
0x0e4e (3662) H 6400 Temperature : 100
0x0e50 (3664) H 6e00 Temperature : 110
0x0e52 (3666) H 6e00 Temperature : 110
0x0e54 (3668) H 6e00 Temperature : 110
0x0e56 (3670) H 6e00 Temperature : 110
0x0e58 (3672) H 7300 Temperature : 115
0x0e5a (3674) H 7300 Temperature : 115
0x0e5c (3676) H 7300 Temperature : 115
0x0e5e (3678) H 7300 Temperature : 115
0x0e60 (3680) H 7300 Temperature : 115
0x0e62 (3682) H 0000 Temperature : 0
0x0e64 (3684) H 0000 Temperature : 0
0x0e66 (3686) H 0000 Temperature : 0
0x0e68 (3688) B 00 PwmLimitMin : 0
0x0e69 (3689) B ff PwmLimitMax : 255
0x0e6a (3690) B 6e FanTargetTemperature : 110
0x0e6b (3691) B 00 Spare1 : 0
0x0e6c (3692) H f401 AcousticTargetRpmThresholdMin : 500
0x0e6e (3694) H 7017 AcousticTargetRpmThresholdMax : 6000
0x0e70 (3696) H f401 AcousticLimitRpmThresholdMin : 500
0x0e72 (3698) H 7017 AcousticLimitRpmThresholdMax : 6000
0x0e74 (3700) H 0000 PccLimitMin : 0
0x0e76 (3702) H c201 PccLimitMax : 450
0x0e78 (3704) H 1900 FanStopTempMin : 25
0x0e7a (3706) H 6400 FanStopTempMax : 100
0x0e7c (3708) H 1900 FanStartTempMin : 25
0x0e7e (3710) H 6400 FanStartTempMax : 100
0x0e80 (3712) H 0000 PowerMinPpt0 : 0
0x0e82 (3714) H 0000 PowerMinPpt0 : 0
0x0e84 (3716) I 00000000 Spare : 0
0x0e88 (3720) I 00000000 Spare : 0
0x0e8c (3724) I 00000000 Spare : 0
0x0e90 (3728) I 00000000 Spare : 0
0x0e94 (3732) I 00000000 Spare : 0
0x0e98 (3736) I 00000000 Spare : 0
0x0e9c (3740) I 00000000 Spare : 0
0x0ea0 (3744) I 00000000 Spare : 0
0x0ea4 (3748) I 00000000 Spare : 0
0x0ea8 (3752) I 00000000 Spare : 0
0x0eac (3756) I 00000000 Spare : 0
0x0eb0 (3760) I cd070000 FeatureCtrlMask : 1997
0x0eb4 (3764) h 3efe VoltageOffsetPerZoneBoundary :-450
0x0eb6 (3766) H 0000 Reserved1 : 0
0x0eb8 (3768) H 0000 Reserved2 : 0
0x0eba (3770) h f401 GfxclkFmin : 500
0x0ebc (3772) h f401 GfxclkFmax : 500
0x0ebe (3774) H 6100 UclkFmin : 97
0x0ec0 (3776) H 6100 UclkFmax : 97
0x0ec2 (3778) h f6ff Ppt :-10
0x0ec4 (3780) h f6ff Tdc :-10
0x0ec6 (3782) B 0f FanLinearPwmPoints : 15
0x0ec7 (3783) B 19 FanLinearTempPoints : 25
0x0ec8 (3784) H 0f00 FanMinimumPwm : 15
0x0eca (3786) H f401 AcousticTargetRpmThreshold : 500
0x0ecc (3788) H f401 AcousticLimitRpmThreshold : 500
0x0ece (3790) H 1900 FanTargetTemperature : 25
0x0ed0 (3792) B 00 FanZeroRpmEnable : 0
0x0ed1 (3793) B 19 FanZeroRpmStopTemp : 25
0x0ed2 (3794) B 00 FanMode : 0
0x0ed3 (3795) B 32 MaxOpTemp : 50
0x0ed4 (3796) B 00 Padding : 0
0x0ed5 (3797) B 00 Padding : 0
0x0ed6 (3798) B 00 Padding : 0
0x0ed7 (3799) B 00 Padding : 0
0x0ed8 (3800) I 00000000 Spare : 0
0x0edc (3804) I 00000000 Spare : 0
0x0ee0 (3808) I 00000000 Spare : 0
0x0ee4 (3812) I 00000000 Spare : 0
0x0ee8 (3816) I 00000000 Spare : 0
0x0eec (3820) I 00000000 Spare : 0
0x0ef0 (3824) I 00000000 Spare : 0
0x0ef4 (3828) I 00000000 Spare : 0
0x0ef8 (3832) I 00000000 Spare : 0
0x0efc (3836) I 00000000 Spare : 0
0x0f00 (3840) I 00000000 Spare : 0
0x0f04 (3844) I 00000000 Spare : 0
0x0f08 (3848) I cd070000 FeatureCtrlMask : 1997
0x0f0c (3852) h 0000 VoltageOffsetPerZoneBoundary : 0
0x0f0e (3854) H 0000 Reserved1 : 0
0x0f10 (3856) H 0000 Reserved2 : 0
0x0f12 (3858) h 8813 GfxclkFmin : 5000
0x0f14 (3860) h 8813 GfxclkFmax : 5000
0x0f16 (3862) H dc05 UclkFmin : 1500
0x0f18 (3864) H dc05 UclkFmax : 1500
0x0f1a (3866) h 0f00 Ppt : 15
0x0f1c (3868) h 0000 Tdc : 0
0x0f1e (3870) B 64 FanLinearPwmPoints : 100
0x0f1f (3871) B 64 FanLinearTempPoints : 100
0x0f20 (3872) H 6400 FanMinimumPwm : 100
0x0f22 (3874) H e40c AcousticTargetRpmThreshold : 3300
0x0f24 (3876) H e40c AcousticLimitRpmThreshold : 3300
0x0f26 (3878) H 6900 FanTargetTemperature : 105
0x0f28 (3880) B 01 FanZeroRpmEnable : 1
0x0f29 (3881) B 64 FanZeroRpmStopTemp : 100
0x0f2a (3882) B 01 FanMode : 1
0x0f2b (3883) B 6e MaxOpTemp : 110
0x0f2c (3884) B 00 Padding : 0
0x0f2d (3885) B 00 Padding : 0
0x0f2e (3886) B 00 Padding : 0
0x0f2f (3887) B 00 Padding : 0
0x0f30 (3888) I 00000000 Spare : 0
0x0f34 (3892) I 00000000 Spare : 0
0x0f38 (3896) I 00000000 Spare : 0
0x0f3c (3900) I 00000000 Spare : 0
0x0f40 (3904) I 00000000 Spare : 0
0x0f44 (3908) I 00000000 Spare : 0
0x0f48 (3912) I 00000000 Spare : 0
0x0f4c (3916) I 00000000 Spare : 0
0x0f50 (3920) I b0045802 Spare : 39322800
0x0f54 (3924) I d002f401 Spare : 32768720
0x0f58 (3928) I f401e803 Spare : 65536500
0x0f5c (3932) I 9001bc02 Spare : 45875600
0x0f60 (3936) I 00000000 FeatureCtrlMask : 0
0x0f64 (3940) h 0000 VoltageOffsetPerZoneBoundary : 0
0x0f66 (3942) H 0000 Reserved1 : 0
0x0f68 (3944) H 0000 Reserved2 : 0
0x0f6a (3946) h 0000 GfxclkFmin : 0
0x0f6c (3948) h 0000 GfxclkFmax : 0
0x0f6e (3950) H 0000 UclkFmin : 0
0x0f70 (3952) H 0000 UclkFmax : 0
0x0f72 (3954) h 0000 Ppt : 0
0x0f74 (3956) h 0000 Tdc : 0
0x0f76 (3958) B 00 FanLinearPwmPoints : 0
0x0f77 (3959) B 00 FanLinearTempPoints : 0
0x0f78 (3960) H 0000 FanMinimumPwm : 0
0x0f7a (3962) H 0000 AcousticTargetRpmThreshold : 0
0x0f7c (3964) H 0000 AcousticLimitRpmThreshold : 0
0x0f7e (3966) H 0000 FanTargetTemperature : 0
0x0f80 (3968) B 00 FanZeroRpmEnable : 0
0x0f81 (3969) B 00 FanZeroRpmStopTemp : 0
0x0f82 (3970) B 00 FanMode : 0
0x0f83 (3971) B 00 MaxOpTemp : 0
0x0f84 (3972) B 00 Padding : 0
0x0f85 (3973) B 00 Padding : 0
0x0f86 (3974) B 00 Padding : 0
0x0f87 (3975) B 00 Padding : 0
0x0f88 (3976) I 00000000 Spare : 0
0x0f8c (3980) I 00000000 Spare : 0
0x0f90 (3984) I 68100000 Spare : 4200
0x0f94 (3988) I 00000000 Spare : 0
0x0f98 (3992) I 0000bc02 Spare : 45875200
0x0f9c (3996) I ee020000 Spare : 750
0x0fa0 (4000) I 00000000 Spare : 0
0x0fa4 (4004) I 00000000 Spare : 0
0x0fa8 (4008) I 00000000 Spare : 0
0x0fac (4012) I 00000000 Spare : 0
0x0fb0 (4016) I 00000000 Spare : 0
0x0fb4 (4020) I 00000000 Spare : 0
0x0fb8 (4024) I 00000000 DebugOverrides : 0
0x0fbc (4028) B 01 TotalBoardPowerSupport : 1
0x0fbd (4029) B 00 TotalBoardPowerPadding : 0
0x0fbe (4030) B 00 TotalBoardPowerPadding : 0
0x0fbf (4031) B 00 TotalBoardPowerPadding : 0
0x0fc0 (4032) h 6d03 TotalIdleBoardPowerM : 877
0x0fc2 (4034) h 0000 TotalIdleBoardPowerB : 0
0x0fc4 (4036) h 9b04 TotalBoardPowerM : 1179
0x0fc6 (4038) h b30f TotalBoardPowerB : 4019
0x0fc8 (4040) f 8f368ebd a :-0.06944
0x0fcc (4044) f 54553c42 b : 47.0833
0x0fd0 (4048) f 007daac5 c :-5455.62
0x0fd4 (4052) f 00000000 a : 0
0x0fd8 (4056) f 00000000 b : 0
0x0fdc (4060) f 00000000 c : 0
0x0fe0 (4064) f 3ecbf3bb a :-0.00744
0x0fe4 (4068) f 52550a41 b : 8.64583
0x0fe8 (4072) f 4af22f42 c : 43.9866
0x0fec (4076) f 00000000 a : 0
0x0ff0 (4080) f 00000000 b : 0
0x0ff4 (4084) f 00000000 c : 0
0x0ff8 (4088) f f7af2c3d a : 0.04216
0x0ffc (4092) f a92ab6c1 b :-22.7708
0x1000 (4096) f 9b98ad45 c : 5555.08
0x1004 (4100) f 00000000 a : 0
0x1008 (4104) f 00000000 b : 0
0x100c (4108) f 00000000 c : 0
0x1010 (4112) I 00000000 Spare : 0
0x1014 (4116) I 00000000 Spare : 0
0x1018 (4120) I 00000000 Spare : 0
0x101c (4124) I 00000000 Spare : 0
0x1020 (4128) I 00000000 Spare : 0
0x1024 (4132) I 00000000 Spare : 0
0x1028 (4136) I 00000000 Spare : 0
0x102c (4140) I 00000000 Spare : 0
0x1030 (4144) I 00000000 Spare : 0
0x1034 (4148) I 00000000 Spare : 0
0x1038 (4152) I 00000000 Spare : 0
0x103c (4156) I 00000000 Spare : 0
0x1040 (4160) I 00000000 Spare : 0
0x1044 (4164) I 00000000 Spare : 0
0x1048 (4168) I 00000000 Spare : 0
0x104c (4172) I 00000000 Spare : 0
0x1050 (4176) I 00000000 Spare : 0
0x1054 (4180) I 00000000 Spare : 0
0x1058 (4184) I 00000000 Spare : 0
0x105c (4188) I 00000000 Spare : 0
0x1060 (4192) I 00000000 Spare : 0
0x1064 (4196) I 00000000 Spare : 0
0x1068 (4200) I 00000000 Spare : 0
0x106c (4204) I 00000000 Spare : 0
0x1070 (4208) I 00000000 Spare : 0
0x1074 (4212) I 00000000 Spare : 0
0x1078 (4216) I 00000000 Spare : 0
0x107c (4220) I 00000000 Spare : 0
0x1080 (4224) I 00000000 Spare : 0
0x1084 (4228) I 00000000 Spare : 0
0x1088 (4232) I 00000000 Spare : 0
0x108c (4236) I 00000000 Spare : 0
0x1090 (4240) I 00000000 Spare : 0
0x1094 (4244) I 00000000 Spare : 0
0x1098 (4248) I 00000000 Spare : 0
0x109c (4252) I 00000000 Spare : 0
0x10a0 (4256) I 00000000 Spare : 0
0x10a4 (4260) I 00000000 Spare : 0
0x10a8 (4264) I 00000000 Spare : 0
0x10ac (4268) I 00000000 Spare : 0
0x10b0 (4272) I 00000000 Spare : 0
0x10b4 (4276) I 00000000 Spare : 0
0x10b8 (4280) I 00000000 Spare : 0
0x10bc (4284) I 00000000 MmHubPadding : 0
0x10c0 (4288) I 00000000 MmHubPadding : 0
0x10c4 (4292) I 00000000 MmHubPadding : 0
0x10c8 (4296) I 00000000 MmHubPadding : 0
0x10cc (4300) I 00000000 MmHubPadding : 0
0x10d0 (4304) I 00000000 MmHubPadding : 0
0x10d4 (4308) I 00000000 MmHubPadding : 0
0x10d8 (4312) I 00000000 MmHubPadding : 0
0x10dc (4316) I 26000000 Version : 38
0x10e0 (4320) B 00 Enabled : 0
0x10e1 (4321) B 00 Speed : 0
0x10e2 (4322) B 00 SlaveAddress : 0
0x10e3 (4323) B 00 ControllerPort : 0
0x10e4 (4324) B 00 ControllerName : 0
0x10e5 (4325) B 00 ThermalThrotter : 0
0x10e6 (4326) B 00 I2cProtocol : 0
0x10e7 (4327) B 00 PaddingConfig : 0
0x10e8 (4328) B 00 Enabled : 0
0x10e9 (4329) B 00 Speed : 0
0x10ea (4330) B 00 SlaveAddress : 0
0x10eb (4331) B 00 ControllerPort : 0
0x10ec (4332) B 00 ControllerName : 0
0x10ed (4333) B 00 ThermalThrotter : 0
0x10ee (4334) B 00 I2cProtocol : 0
0x10ef (4335) B 00 PaddingConfig : 0
0x10f0 (4336) B 00 Enabled : 0
0x10f1 (4337) B 00 Speed : 0
0x10f2 (4338) B 00 SlaveAddress : 0
0x10f3 (4339) B 00 ControllerPort : 0
0x10f4 (4340) B 00 ControllerName : 0
0x10f5 (4341) B 00 ThermalThrotter : 0
0x10f6 (4342) B 00 I2cProtocol : 0
0x10f7 (4343) B 00 PaddingConfig : 0
0x10f8 (4344) B 00 Enabled : 0
0x10f9 (4345) B 00 Speed : 0
0x10fa (4346) B 00 SlaveAddress : 0
0x10fb (4347) B 00 ControllerPort : 0
0x10fc (4348) B 00 ControllerName : 0
0x10fd (4349) B 00 ThermalThrotter : 0
0x10fe (4350) B 00 I2cProtocol : 0
0x10ff (4351) B 00 PaddingConfig : 0
0x1100 (4352) B 00 Enabled : 0
0x1101 (4353) B 00 Speed : 0
0x1102 (4354) B 00 SlaveAddress : 0
0x1103 (4355) B 00 ControllerPort : 0
0x1104 (4356) B 00 ControllerName : 0
0x1105 (4357) B 00 ThermalThrotter : 0
0x1106 (4358) B 00 I2cProtocol : 0
0x1107 (4359) B 00 PaddingConfig : 0
0x1108 (4360) B 00 Enabled : 0
0x1109 (4361) B 00 Speed : 0
0x110a (4362) B 00 SlaveAddress : 0
0x110b (4363) B 00 ControllerPort : 0
0x110c (4364) B 00 ControllerName : 0
0x110d (4365) B 00 ThermalThrotter : 0
0x110e (4366) B 00 I2cProtocol : 0
0x110f (4367) B 00 PaddingConfig : 0
0x1110 (4368) B 00 Enabled : 0
0x1111 (4369) B 00 Speed : 0
0x1112 (4370) B 00 SlaveAddress : 0
0x1113 (4371) B 00 ControllerPort : 0
0x1114 (4372) B 00 ControllerName : 0
0x1115 (4373) B 00 ThermalThrotter : 0
0x1116 (4374) B 00 I2cProtocol : 0
0x1117 (4375) B 00 PaddingConfig : 0
0x1118 (4376) B 00 Enabled : 0
0x1119 (4377) B 00 Speed : 0
0x111a (4378) B 00 SlaveAddress : 0
0x111b (4379) B 00 ControllerPort : 0
0x111c (4380) B 00 ControllerName : 0
0x111d (4381) B 00 ThermalThrotter : 0
0x111e (4382) B 00 I2cProtocol : 0
0x111f (4383) B 00 PaddingConfig : 0
0x1120 (4384) B 00 VddGfxVrMapping : 0
0x1121 (4385) B 00 VddSocVrMapping : 0
0x1122 (4386) B 00 VddMem0VrMapping : 0
0x1123 (4387) B 00 VddMem1VrMapping : 0
0x1124 (4388) B 00 GfxUlvPhaseSheddingMask : 0
0x1125 (4389) B 00 SocUlvPhaseSheddingMask : 0
0x1126 (4390) B 00 VmempUlvPhaseSheddingMask : 0
0x1127 (4391) B 00 VddioUlvPhaseSheddingMask : 0
0x1128 (4392) B 00 SlaveAddrMapping : 0
0x1129 (4393) B 00 SlaveAddrMapping : 0
0x112a (4394) B 00 SlaveAddrMapping : 0
0x112b (4395) B 00 SlaveAddrMapping : 0
0x112c (4396) B 00 SlaveAddrMapping : 0
0x112d (4397) B 00 VrPsiSupport : 0
0x112e (4398) B 00 VrPsiSupport : 0
0x112f (4399) B 00 VrPsiSupport : 0
0x1130 (4400) B 01 VrPsiSupport : 1
0x1131 (4401) B 00 VrPsiSupport : 0
0x1132 (4402) B 00 PaddingPsi : 0
0x1133 (4403) B 00 PaddingPsi : 0
0x1134 (4404) B 00 PaddingPsi : 0
0x1135 (4405) B 00 PaddingPsi : 0
0x1136 (4406) B 00 PaddingPsi : 0
0x1137 (4407) B 00 EnablePsi6 : 0
0x1138 (4408) B 00 EnablePsi6 : 0
0x1139 (4409) B 00 EnablePsi6 : 0
0x113a (4410) B 00 EnablePsi6 : 0
0x113b (4411) B 00 EnablePsi6 : 0
0x113c (4412) b 00 Offset : 0
0x113d (4413) B 00 Padding : 0
0x113e (4414) H 0000 MaxCurrent : 0
0x1140 (4416) b 00 Offset : 0
0x1141 (4417) B 00 Padding : 0
0x1142 (4418) H 0000 MaxCurrent : 0
0x1144 (4420) b 00 Offset : 0
0x1145 (4421) B 00 Padding : 0
0x1146 (4422) H 0000 MaxCurrent : 0
0x1148 (4424) b 00 Offset : 0
0x1149 (4425) B 00 Padding : 0
0x114a (4426) H 0000 MaxCurrent : 0
0x114c (4428) b 00 Offset : 0
0x114d (4429) B 00 Padding : 0
0x114e (4430) H 0000 MaxCurrent : 0
0x1150 (4432) I 00000000 VoltageTelemetryRatio : 0
0x1154 (4436) I 00000000 VoltageTelemetryRatio : 0
0x1158 (4440) I 00000000 VoltageTelemetryRatio : 0
0x115c (4444) I 00000000 VoltageTelemetryRatio : 0
0x1160 (4448) I 00000000 VoltageTelemetryRatio : 0
0x1164 (4452) B 00 DownSlewRateVr : 0
0x1165 (4453) B 00 DownSlewRateVr : 0
0x1166 (4454) B 00 DownSlewRateVr : 0
0x1167 (4455) B 00 DownSlewRateVr : 0
0x1168 (4456) B 00 DownSlewRateVr : 0
0x1169 (4457) B 00 LedOffGpio : 0
0x116a (4458) B 00 FanOffGpio : 0
0x116b (4459) B 00 GfxVrPowerStageOffGpio : 0
0x116c (4460) B 00 AcDcGpio : 0
0x116d (4461) B 00 AcDcPolarity : 0
0x116e (4462) B 00 VR0HotGpio : 0
0x116f (4463) B 00 VR0HotPolarity : 0
0x1170 (4464) B 00 GthrGpio : 0
0x1171 (4465) B 00 GthrPolarity : 0
0x1172 (4466) B 00 LedPin0 : 0
0x1173 (4467) B 00 LedPin1 : 0
0x1174 (4468) B 00 LedPin2 : 0
0x1175 (4469) B 00 LedEnableMask : 0
0x1176 (4470) B 00 LedPcie : 0
0x1177 (4471) B 00 LedError : 0
0x1178 (4472) B 00 UclkTrainingModeSpreadPercent : 0
0x1179 (4473) B 00 UclkSpreadPadding : 0
0x117a (4474) H 0000 UclkSpreadFreq : 0
0x117c (4476) B 00 UclkSpreadPercent : 0
0x117d (4477) B 00 UclkSpreadPercent : 0
0x117e (4478) B 00 UclkSpreadPercent : 0
0x117f (4479) B 00 UclkSpreadPercent : 0
0x1180 (4480) B 00 UclkSpreadPercent : 0
0x1181 (4481) B 00 UclkSpreadPercent : 0
0x1182 (4482) B 00 UclkSpreadPercent : 0
0x1183 (4483) B 00 UclkSpreadPercent : 0
0x1184 (4484) B 00 UclkSpreadPercent : 0
0x1185 (4485) B 00 UclkSpreadPercent : 0
0x1186 (4486) B 00 UclkSpreadPercent : 0
0x1187 (4487) B 00 UclkSpreadPercent : 0
0x1188 (4488) B 00 UclkSpreadPercent : 0
0x1189 (4489) B 00 UclkSpreadPercent : 0
0x118a (4490) B 00 UclkSpreadPercent : 0
0x118b (4491) B 00 UclkSpreadPercent : 0
0x118c (4492) B 00 FclkSpreadPadding : 0
0x118d (4493) B 00 FclkSpreadPercent : 0
0x118e (4494) H 0000 FclkSpreadFreq : 0
0x1190 (4496) B 00 DramWidth : 0
0x1191 (4497) B 00 PaddingMem1 : 0
0x1192 (4498) B 00 PaddingMem1 : 0
0x1193 (4499) B 00 PaddingMem1 : 0
0x1194 (4500) B 00 PaddingMem1 : 0
0x1195 (4501) B 00 PaddingMem1 : 0
0x1196 (4502) B 00 PaddingMem1 : 0
0x1197 (4503) B 00 PaddingMem1 : 0
0x1198 (4504) B 00 HsrEnabled : 0
0x1199 (4505) B 00 VddqOffEnabled : 0
0x119a (4506) B 00 PaddingUmcFlags : 0
0x119b (4507) B 00 PaddingUmcFlags : 0
0x119c (4508) I 00000000 PostVoltageSetBacoDelay : 0
0x11a0 (4512) I 00000000 BacoEntryDelay : 0
0x11a4 (4516) B 00 FuseWritePowerMuxPresent : 0
0x11a5 (4517) B 00 FuseWritePadding : 0
0x11a6 (4518) B 00 FuseWritePadding : 0
0x11a7 (4519) B 00 FuseWritePadding : 0
0x11a8 (4520) I 00000000 BoardSpare : 0
0x11ac (4524) I 00000000 BoardSpare : 0
0x11b0 (4528) I 00000000 BoardSpare : 0
0x11b4 (4532) I 00000000 BoardSpare : 0
0x11b8 (4536) I 00000000 BoardSpare : 0
0x11bc (4540) I 00000000 BoardSpare : 0
0x11c0 (4544) I 00000000 BoardSpare : 0
0x11c4 (4548) I 00000000 BoardSpare : 0
0x11c8 (4552) I 00000000 BoardSpare : 0
0x11cc (4556) I 00000000 BoardSpare : 0
0x11d0 (4560) I 00000000 BoardSpare : 0
0x11d4 (4564) I 00000000 BoardSpare : 0
0x11d8 (4568) I 00000000 BoardSpare : 0
0x11dc (4572) I 00000000 BoardSpare : 0
0x11e0 (4576) I 00000000 BoardSpare : 0
0x11e4 (4580) I 00000000 BoardSpare : 0
0x11e8 (4584) I 00000000 BoardSpare : 0
0x11ec (4588) I 00000000 BoardSpare : 0
0x11f0 (4592) I 00000000 BoardSpare : 0
0x11f4 (4596) I 00000000 BoardSpare : 0
0x11f8 (4600) I 00000000 BoardSpare : 0
0x11fc (4604) I 00000000 BoardSpare : 0
0x1200 (4608) I 00000000 BoardSpare : 0
0x1204 (4612) I 00000000 BoardSpare : 0
0x1208 (4616) I 00000000 BoardSpare : 0
0x120c (4620) I 00000000 BoardSpare : 0
0x1210 (4624) I 00000000 BoardSpare : 0
0x1214 (4628) I 00000000 BoardSpare : 0
0x1218 (4632) I 00000000 BoardSpare : 0
0x121c (4636) I 00000000 BoardSpare : 0
0x1220 (4640) I 00000000 BoardSpare : 0
0x1224 (4644) I 00000000 BoardSpare : 0
0x1228 (4648) I 00000000 BoardSpare : 0
0x122c (4652) I 00000000 BoardSpare : 0
0x1230 (4656) I 00000000 BoardSpare : 0
0x1234 (4660) I 00000000 BoardSpare : 0
0x1238 (4664) I 00000000 BoardSpare : 0
0x123c (4668) I 00000000 BoardSpare : 0
0x1240 (4672) I 00000000 BoardSpare : 0
0x1244 (4676) I 00000000 BoardSpare : 0
0x1248 (4680) I 00000000 BoardSpare : 0
0x124c (4684) I 00000000 BoardSpare : 0
0x1250 (4688) I 00000000 BoardSpare : 0
0x1254 (4692) I 00000000 BoardSpare : 0
0x1258 (4696) I 00000000 BoardSpare : 0
0x125c (4700) I 00000000 BoardSpare : 0
0x1260 (4704) I 00000000 BoardSpare : 0
0x1264 (4708) I 00000000 BoardSpare : 0
0x1268 (4712) I 00000000 BoardSpare : 0
0x126c (4716) I 00000000 BoardSpare : 0
0x1270 (4720) I 00000000 BoardSpare : 0
0x1274 (4724) I 00000000 BoardSpare : 0
0x1278 (4728) I 00000000 BoardSpare : 0
0x127c (4732) I 00000000 BoardSpare : 0
0x1280 (4736) I 00000000 BoardSpare : 0
0x1284 (4740) I 00000000 BoardSpare : 0
0x1288 (4744) I 00000000 BoardSpare : 0
0x128c (4748) I 00000000 BoardSpare : 0
0x1290 (4752) I 00000000 BoardSpare : 0
0x1294 (4756) I 00000000 BoardSpare : 0
0x1298 (4760) I 00000000 BoardSpare : 0
0x129c (4764) I 00000000 BoardSpare : 0
0x12a0 (4768) I 00000000 BoardSpare : 0
0x12a4 (4772) I 00000000 MmHubPadding : 0
0x12a8 (4776) I 00000000 MmHubPadding : 0
0x12ac (4780) I 00000000 MmHubPadding : 0
0x12b0 (4784) I 00000000 MmHubPadding : 0
0x12b4 (4788) I 00000000 MmHubPadding : 0
0x12b8 (4792) I 00000000 MmHubPadding : 0
0x12bc (4796) I 00000000 MmHubPadding : 0
0x12c0 (4800) I 00000000 MmHubPadding : 0
================================================
FILE: test/AMD.RXVega64.8176.170719.rom.dump
================================================
sHeader:
structuresize: 694
format_revision: 8
content_revision: 1
TableRevision: 0
TableSize: 92
GoldenPPID: 1761
GoldenRevision: 11246
FormatID: 27
PlatformCaps: 72
MaxODEngineClock: 240000
MaxODMemoryClock: 150000
PowerControlLimit: 50
UlvVoltageOffset: 8
UlvSmnclkDid: 0
UlvMp1clkDid: 0
UlvGfxclkBypass: 0
GfxclkSlewRate: 0
GfxVoltageMode: 0
SocVoltageMode: 0
UclkVoltageMode: 0
UvdVoltageMode: 0
VceVoltageMode: 0
Mp0VoltageMode: 2
DcefVoltageMode: 1
StateArray:
RevId: 2
NumEntries: 2
states:
states 0:
SocClockIndexHigh: 0
SocClockIndexLow: 0
GfxClockIndexHigh: 0
GfxClockIndexLow: 0
MemClockIndexHigh: 0
MemClockIndexLow: 0
Classification: 8
CapsAndSettings: 0
Classification2: 0
states 1:
SocClockIndexHigh: 5
SocClockIndexLow: 0
GfxClockIndexHigh: 7
GfxClockIndexLow: 0
MemClockIndexHigh: 3
MemClockIndexLow: 0
Classification: 5
CapsAndSettings: 0
Classification2: 0
FanTable:
RevId: 11
FanOutputSensitivity: 4836
FanAcousticLimitRpm: 2400
ThrottlingRPM: 2400
TargetTemperature: 75
MinimumPWMLimit: 10
TargetGfxClk: 852
FanGainEdge: 400
FanGainHotspot: 400
FanGainLiquid: 400
FanGainVrVddc: 400
FanGainVrMvdd: 400
FanGainPlx: 400
FanGainHbm: 400
EnableZeroRPM: 0
FanStopTemperature: 0
FanStartTemperature: 0
FanParameters: 2
FanMinRPM: 4
FanMaxRPM: 49
ThermalController:
RevId: 1
Type: 24
I2cLine: 0
I2cAddress: 0
FanParameters: 0
FanMinRPM: 0
FanMaxRPM: 0
Flags: 0
SocclkDependencyTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
Clk: 60000
VddInd: 0
entries 1:
Clk: 72000
VddInd: 1
entries 2:
Clk: 80000
VddInd: 2
entries 3:
Clk: 84700
VddInd: 3
entries 4:
Clk: 90000
VddInd: 4
entries 5:
Clk: 96000
VddInd: 5
entries 6:
Clk: 102800
VddInd: 6
entries 7:
Clk: 110700
VddInd: 7
MclkDependencyTable:
RevId: 1
NumEntries: 4
entries:
entries 0:
MemClk: 16700
VddInd: 0
VddMemInd: 0
VddciInd: 0
entries 1:
MemClk: 50000
VddInd: 0
VddMemInd: 0
VddciInd: 0
entries 2:
MemClk: 80000
VddInd: 2
VddMemInd: 0
VddciInd: 0
entries 3:
MemClk: 94500
VddInd: 4
VddMemInd: 0
VddciInd: 0
GfxclkDependencyTable:
RevId: 1
NumEntries: 8
entries:
entries 0:
Clk: 85200
VddInd: 0
CKSVOffsetandDisable: 32768
AVFSOffset: 0
ACGEnable: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
entries 1:
Clk: 99100
VddInd: 1
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
entries 2:
Clk: 108400
VddInd: 2
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
entries 3:
Clk: 113800
VddInd: 3
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
entries 4:
Clk: 120000
VddInd: 4
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
entries 5:
Clk: 140100
VddInd: 5
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 1
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
entries 6:
Clk: 153600
VddInd: 6
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 1
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
entries 7:
Clk: 163000
VddInd: 7
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 1
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
DcefclkDependencyTable:
RevId: 0
NumEntries: 5
entries:
entries 0:
Clk: 60000
VddInd: 0
entries 1:
Clk: 72000
VddInd: 0
entries 2:
Clk: 80000
VddInd: 0
entries 3:
Clk: 84700
VddInd: 0
entries 4:
Clk: 90000
VddInd: 0
VddcLookupTable:
RevId: 1
NumEntries: 8
entries:
entries 0:
Vdd: 800
entries 1:
Vdd: 900
entries 2:
Vdd: 950
entries 3:
Vdd: 1000
entries 4:
Vdd: 1050
entries 5:
Vdd: 1100
entries 6:
Vdd: 1150
entries 7:
Vdd: 1200
VddmemLookupTable:
RevId: 1
NumEntries: 1
entries:
entries 0:
Vdd: 1350
MMDependencyTable:
RevId: 1
NumEntries: 8
entries:
entries 0:
VddcInd: 0
DClk: 34200
VClk: 46400
EClk: 60000
PSPClk: 50000
entries 1:
VddcInd: 1
DClk: 48000
VClk: 60000
EClk: 68500
PSPClk: 50000
entries 2:
VddcInd: 2
DClk: 57600
VClk: 68500
EClk: 72000
PSPClk: 50000
entries 3:
VddcInd: 3
DClk: 65400
VClk: 72000
EClk: 75400
PSPClk: 50000
entries 4:
VddcInd: 4
DClk: 72000
VClk: 80000
EClk: 80000
PSPClk: 50000
entries 5:
VddcInd: 5
DClk: 80000
VClk: 84700
EClk: 84700
PSPClk: 50000
entries 6:
VddcInd: 6
DClk: 96000
VClk: 96000
EClk: 90000
PSPClk: 50000
entries 7:
VddcInd: 7
DClk: 102800
VClk: 102800
EClk: 96000
PSPClk: 50000
VCEStateTable: UNUSED
Reserve: 0
PowerTuneTable:
RevId: 7
SocketPowerLimit: 220
BatteryPowerLimit: 220
SmallPowerLimit: 220
TdcLimit: 300
EdcLimit: 0
SoftwareShutdownTemp: 89
TemperatureLimitHotSpot: 105
TemperatureLimitLiquid1: 74
TemperatureLimitLiquid2: 74
TemperatureLimitHBM: 95
TemperatureLimitVrSoc: 115
TemperatureLimitVrMem: 115
TemperatureLimitPlx: 100
LoadLineResistance: 64
Liquid1_I2C_address: 144
Liquid2_I2C_address: 146
Liquid_I2C_Line: 151
Vr_I2C_address: 96
Vr_I2C_Line: 150
Plx_I2C_address: 0
Plx_I2C_Line: 144
TemperatureLimitTedge: 85
BoostStartTemperature: 0
BoostStopTemperature: 0
BoostClock: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
HardLimitTable: UNUSED
VddciLookupTable:
RevId: 1
NumEntries: 1
entries:
entries 0:
Vdd: 900
PCIETable:
RevId: 2
NumEntries: 2
entries:
entries 0:
LCLK: 12500
PCIEGenSpeed: 2
PCIELaneWidth: 16
entries 1:
LCLK: 60000
PCIEGenSpeed: 2
PCIELaneWidth: 16
PixclkDependencyTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
Clk: 14700
VddInd: 0
entries 1:
Clk: 24100
VddInd: 1
entries 2:
Clk: 34300
VddInd: 2
entries 3:
Clk: 48300
VddInd: 3
entries 4:
Clk: 53300
VddInd: 4
entries 5:
Clk: 93800
VddInd: 5
entries 6:
Clk: 104200
VddInd: 6
entries 7:
Clk: 107500
VddInd: 7
DispClkDependencyTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
Clk: 28200
VddInd: 0
entries 1:
Clk: 51500
VddInd: 1
entries 2:
Clk: 68600
VddInd: 2
entries 3:
Clk: 80000
VddInd: 3
entries 4:
Clk: 90000
VddInd: 4
entries 5:
Clk: 102900
VddInd: 5
entries 6:
Clk: 110800
VddInd: 6
entries 7:
Clk: 120000
VddInd: 7
PhyClkDependencyTable:
RevId: 0
NumEntries: 1
entries:
entries 0:
Clk: 81000
VddInd: 0
================================================
FILE: test/AMD.RXVega64.8176.170719.rom.rawdump
================================================
PowerPlay table rev 8.1 size 694 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H b602 structuresize : 694
0x0002 (0002) B 08 format_revision : 8
0x0003 (0003) B 01 content_revision : 1
0x0004 (0004) B 00 TableRevision : 0
0x0005 (0005) H 5c00 TableSize : 92
0x0007 (0007) I e1060000 GoldenPPID : 1761
0x000b (0011) I ee2b0000 GoldenRevision : 11246
0x000f (0015) H 1b00 FormatID : 27
0x0011 (0017) I 48000000 PlatformCaps : 72
0x0015 (0021) I 80a90300 MaxODEngineClock : 240000
0x0019 (0025) I f0490200 MaxODMemoryClock : 150000
0x001d (0029) H 3200 PowerControlLimit : 50
0x001f (0031) H 0800 UlvVoltageOffset : 8
0x0021 (0033) H 0000 UlvSmnclkDid : 0
0x0023 (0035) H 0000 UlvMp1clkDid : 0
0x0025 (0037) H 0000 UlvGfxclkBypass : 0
0x0027 (0039) H 0000 GfxclkSlewRate : 0
0x0029 (0041) B 00 GfxVoltageMode : 0
0x002a (0042) B 00 SocVoltageMode : 0
0x002b (0043) B 00 UclkVoltageMode : 0
0x002c (0044) B 00 UvdVoltageMode : 0
0x002d (0045) B 00 VceVoltageMode : 0
0x002e (0046) B 02 Mp0VoltageMode : 2
0x002f (0047) B 01 DcefVoltageMode : 1
0x0030 (0048) H 5c00 StateArrayOffset : 92
0x005c (0092) B 02 RevId : 2
0x005d (0093) B 02 NumEntries : 2
0x005e (0094) B 00 SocClockIndexHigh : 0
0x005f (0095) B 00 SocClockIndexLow : 0
0x0060 (0096) B 00 GfxClockIndexHigh : 0
0x0061 (0097) B 00 GfxClockIndexLow : 0
0x0062 (0098) B 00 MemClockIndexHigh : 0
0x0063 (0099) B 00 MemClockIndexLow : 0
0x0064 (0100) H 0800 Classification : 8
0x0066 (0102) I 00000000 CapsAndSettings : 0
0x006a (0106) H 0000 Classification2 : 0
0x006c (0108) B 05 SocClockIndexHigh : 5
0x006d (0109) B 00 SocClockIndexLow : 0
0x006e (0110) B 07 GfxClockIndexHigh : 7
0x006f (0111) B 00 GfxClockIndexLow : 0
0x0070 (0112) B 03 MemClockIndexHigh : 3
0x0071 (0113) B 00 MemClockIndexLow : 0
0x0072 (0114) H 0500 Classification : 5
0x0074 (0116) I 00000000 CapsAndSettings : 0
0x0078 (0120) H 0000 Classification2 : 0
0x0032 (0050) H 4f02 FanTableOffset : 591
0x024f (0591) B 0b RevId : 11
0x0250 (0592) H e412 FanOutputSensitivity : 4836
0x0252 (0594) H 6009 FanAcousticLimitRpm : 2400
0x0254 (0596) H 6009 ThrottlingRPM : 2400
0x0256 (0598) H 4b00 TargetTemperature : 75
0x0258 (0600) H 0a00 MinimumPWMLimit : 10
0x025a (0602) H 5403 TargetGfxClk : 852
0x025c (0604) H 9001 FanGainEdge : 400
0x025e (0606) H 9001 FanGainHotspot : 400
0x0260 (0608) H 9001 FanGainLiquid : 400
0x0262 (0610) H 9001 FanGainVrVddc : 400
0x0264 (0612) H 9001 FanGainVrMvdd : 400
0x0266 (0614) H 9001 FanGainPlx : 400
0x0268 (0616) H 9001 FanGainHbm : 400
0x026a (0618) B 00 EnableZeroRPM : 0
0x026b (0619) H 0000 FanStopTemperature : 0
0x026d (0621) H 0000 FanStartTemperature : 0
0x026f (0623) B 02 FanParameters : 2
0x0270 (0624) B 04 FanMinRPM : 4
0x0271 (0625) B 31 FanMaxRPM : 49
0x0034 (0052) H 4602 ThermalControllerOffset : 582
0x0246 (0582) B 01 RevId : 1
0x0247 (0583) B 18 Type : 24
0x0248 (0584) B 00 I2cLine : 0
0x0249 (0585) B 00 I2cAddress : 0
0x024a (0586) B 00 FanParameters : 0
0x024b (0587) B 00 FanMinRPM : 0
0x024c (0588) B 00 FanMaxRPM : 0
0x024d (0589) B 00 Flags : 0
0x0036 (0054) H 9400 SocclkDependencyTableOffset : 148
0x0094 (0148) B 00 RevId : 0
0x0095 (0149) B 08 NumEntries : 8
0x0096 (0150) I 60ea0000 Clk : 60000
0x009a (0154) B 00 VddInd : 0
0x009b (0155) I 40190100 Clk : 72000
0x009f (0159) B 01 VddInd : 1
0x00a0 (0160) I 80380100 Clk : 80000
0x00a4 (0164) B 02 VddInd : 2
0x00a5 (0165) I dc4a0100 Clk : 84700
0x00a9 (0169) B 03 VddInd : 3
0x00aa (0170) I 905f0100 Clk : 90000
0x00ae (0174) B 04 VddInd : 4
0x00af (0175) I 00770100 Clk : 96000
0x00b3 (0179) B 05 VddInd : 5
0x00b4 (0180) I 90910100 Clk : 102800
0x00b8 (0184) B 06 VddInd : 6
0x00b9 (0185) I 6cb00100 Clk : 110700
0x00bd (0189) B 07 VddInd : 7
0x0038 (0056) H 9e01 MclkDependencyTableOffset : 414
0x019e (0414) B 01 RevId : 1
0x019f (0415) B 04 NumEntries : 4
0x01a0 (0416) I 3c410000 MemClk : 16700
0x01a4 (0420) B 00 VddInd : 0
0x01a5 (0421) B 00 VddMemInd : 0
0x01a6 (0422) B 00 VddciInd : 0
0x01a7 (0423) I 50c30000 MemClk : 50000
0x01ab (0427) B 00 VddInd : 0
0x01ac (0428) B 00 VddMemInd : 0
0x01ad (0429) B 00 VddciInd : 0
0x01ae (0430) I 80380100 MemClk : 80000
0x01b2 (0434) B 02 VddInd : 2
0x01b3 (0435) B 00 VddMemInd : 0
0x01b4 (0436) B 00 VddciInd : 0
0x01b5 (0437) I 24710100 MemClk : 94500
0x01b9 (0441) B 04 VddInd : 4
0x01ba (0442) B 00 VddMemInd : 0
0x01bb (0443) B 00 VddciInd : 0
0x003a (0058) H be00 GfxclkDependencyTableOffset : 190
0x00be (0190) B 01 RevId : 1
0x00bf (0191) B 08 NumEntries : 8
0x00c0 (0192) I d04c0100 Clk : 85200
0x00c4 (0196) B 00 VddInd : 0
0x00c5 (0197) H 0080 CKSVOffsetandDisable : 32768
0x00c7 (0199) H 0000 AVFSOffset : 0
0x00c9 (0201) B 00 ACGEnable : 0
0x00ca (0202) B 00 Reserved : 0
0x00cb (0203) B 00 Reserved : 0
0x00cc (0204) B 00 Reserved : 0
0x00cd (0205) I 1c830100 Clk : 99100
0x00d1 (0209) B 01 VddInd : 1
0x00d2 (0210) H 0000 CKSVOffsetandDisable : 0
0x00d4 (0212) H 0000 AVFSOffset : 0
0x00d6 (0214) B 00 ACGEnable : 0
0x00d7 (0215) B 00 Reserved : 0
0x00d8 (0216) B 00 Reserved : 0
0x00d9 (0217) B 00 Reserved : 0
0x00da (0218) I 70a70100 Clk : 108400
0x00de (0222) B 02 VddInd : 2
0x00df (0223) H 0000 CKSVOffsetandDisable : 0
0x00e1 (0225) H 0000 AVFSOffset : 0
0x00e3 (0227) B 00 ACGEnable : 0
0x00e4 (0228) B 00 Reserved : 0
0x00e5 (0229) B 00 Reserved : 0
0x00e6 (0230) B 00 Reserved : 0
0x00e7 (0231) I 88bc0100 Clk : 113800
0x00eb (0235) B 03 VddInd : 3
0x00ec (0236) H 0000 CKSVOffsetandDisable : 0
0x00ee (0238) H 0000 AVFSOffset : 0
0x00f0 (0240) B 00 ACGEnable : 0
0x00f1 (0241) B 00 Reserved : 0
0x00f2 (0242) B 00 Reserved : 0
0x00f3 (0243) B 00 Reserved : 0
0x00f4 (0244) I c0d40100 Clk : 120000
0x00f8 (0248) B 04 VddInd : 4
0x00f9 (0249) H 0000 CKSVOffsetandDisable : 0
0x00fb (0251) H 0000 AVFSOffset : 0
0x00fd (0253) B 00 ACGEnable : 0
0x00fe (0254) B 00 Reserved : 0
0x00ff (0255) B 00 Reserved : 0
0x0100 (0256) B 00 Reserved : 0
0x0101 (0257) I 44230200 Clk : 140100
0x0105 (0261) B 05 VddInd : 5
0x0106 (0262) H 0000 CKSVOffsetandDisable : 0
0x0108 (0264) H 0000 AVFSOffset : 0
0x010a (0266) B 01 ACGEnable : 1
0x010b (0267) B 00 Reserved : 0
0x010c (0268) B 00 Reserved : 0
0x010d (0269) B 00 Reserved : 0
0x010e (0270) I 00580200 Clk : 153600
0x0112 (0274) B 06 VddInd : 6
0x0113 (0275) H 0000 CKSVOffsetandDisable : 0
0x0115 (0277) H 0000 AVFSOffset : 0
0x0117 (0279) B 01 ACGEnable : 1
0x0118 (0280) B 00 Reserved : 0
0x0119 (0281) B 00 Reserved : 0
0x011a (0282) B 00 Reserved : 0
0x011b (0283) I b87c0200 Clk : 163000
0x011f (0287) B 07 VddInd : 7
0x0120 (0288) H 0000 CKSVOffsetandDisable : 0
0x0122 (0290) H 0000 AVFSOffset : 0
0x0124 (0292) B 01 ACGEnable : 1
0x0125 (0293) B 00 Reserved : 0
0x0126 (0294) B 00 Reserved : 0
0x0127 (0295) B 00 Reserved : 0
0x003c (0060) H 2801 DcefclkDependencyTableOffset : 296
0x0128 (0296) B 00 RevId : 0
0x0129 (0297) B 05 NumEntries : 5
0x012a (0298) I 60ea0000 Clk : 60000
0x012e (0302) B 00 VddInd : 0
0x012f (0303) I 40190100 Clk : 72000
0x0133 (0307) B 00 VddInd : 0
0x0134 (0308) I 80380100 Clk : 80000
0x0138 (0312) B 00 VddInd : 0
0x0139 (0313) I dc4a0100 Clk : 84700
0x013d (0317) B 00 VddInd : 0
0x013e (0318) I 905f0100 Clk : 90000
0x0142 (0322) B 00 VddInd : 0
0x003e (0062) H 7a00 VddcLookupTableOffset : 122
0x007a (0122) B 01 RevId : 1
0x007b (0123) B 08 NumEntries : 8
0x007c (0124) H 2003 Vdd : 800
0x007e (0126) H 8403 Vdd : 900
0x0080 (0128) H b603 Vdd : 950
0x0082 (0130) H e803 Vdd : 1000
0x0084 (0132) H 1a04 Vdd : 1050
0x0086 (0134) H 4c04 Vdd : 1100
0x0088 (0136) H 7e04 Vdd : 1150
0x008a (0138) H b004 Vdd : 1200
0x0040 (0064) H 8c00 VddmemLookupTableOffset : 140
0x008c (0140) B 01 RevId : 1
0x008d (0141) B 01 NumEntries : 1
0x008e (0142) H 4605 Vdd : 1350
0x0042 (0066) H bc01 MMDependencyTableOffset : 444
0x01bc (0444) B 01 RevId : 1
0x01bd (0445) B 08 NumEntries : 8
0x01be (0446) B 00 VddcInd : 0
0x01bf (0447) I 98850000 DClk : 34200
0x01c3 (0451) I 40b50000 VClk : 46400
0x01c7 (0455) I 60ea0000 EClk : 60000
0x01cb (0459) I 50c30000 PSPClk : 50000
0x01cf (0463) B 01 VddcInd : 1
0x01d0 (0464) I 80bb0000 DClk : 48000
0x01d4 (0468) I 60ea0000 VClk : 60000
0x01d8 (0472) I 940b0100 EClk : 68500
0x01dc (0476) I 50c30000 PSPClk : 50000
0x01e0 (0480) B 02 VddcInd : 2
0x01e1 (0481) I 00e10000 DClk : 57600
0x01e5 (0485) I 940b0100 VClk : 68500
0x01e9 (0489) I 40190100 EClk : 72000
0x01ed (0493) I 50c30000 PSPClk : 50000
0x01f1 (0497) B 03 VddcInd : 3
0x01f2 (0498) I 78ff0000 DClk : 65400
0x01f6 (0502) I 40190100 VClk : 72000
0x01fa (0506) I 88260100 EClk : 75400
0x01fe (0510) I 50c30000 PSPClk : 50000
0x0202 (0514) B 04 VddcInd : 4
0x0203 (0515) I 40190100 DClk : 72000
0x0207 (0519) I 80380100 VClk : 80000
0x020b (0523) I 80380100 EClk : 80000
0x020f (0527) I 50c30000 PSPClk : 50000
0x0213 (0531) B 05 VddcInd : 5
0x0214 (0532) I 80380100 DClk : 80000
0x0218 (0536) I dc4a0100 VClk : 84700
0x021c (0540) I dc4a0100 EClk : 84700
0x0220 (0544) I 50c30000 PSPClk : 50000
0x0224 (0548) B 06 VddcInd : 6
0x0225 (0549) I 00770100 DClk : 96000
0x0229 (0553) I 00770100 VClk : 96000
0x022d (0557) I 905f0100 EClk : 90000
0x0231 (0561) I 50c30000 PSPClk : 50000
0x0235 (0565) B 07 VddcInd : 7
0x0236 (0566) I 90910100 DClk : 102800
0x023a (0570) I 90910100 VClk : 102800
0x023e (0574) I 00770100 EClk : 96000
0x0242 (0578) I 50c30000 PSPClk : 50000
0x0044 (0068) H 0000 VCEStateTableOffset : 0
0x0046 (0070) H 0000 Reserve : 0
0x0048 (0072) H 7202 PowerTuneTableOffset : 626
0x0272 (0626) B 07 RevId : 7
0x0273 (0627) H dc00 SocketPowerLimit : 220
0x0275 (0629) H dc00 BatteryPowerLimit : 220
0x0277 (0631) H dc00 SmallPowerLimit : 220
0x0279 (0633) H 2c01 TdcLimit : 300
0x027b (0635) H 0000 EdcLimit : 0
0x027d (0637) H 5900 SoftwareShutdownTemp : 89
0x027f (0639) H 6900 TemperatureLimitHotSpot : 105
0x0281 (0641) H 4a00 TemperatureLimitLiquid1 : 74
0x0283 (0643) H 4a00 TemperatureLimitLiquid2 : 74
0x0285 (0645) H 5f00 TemperatureLimitHBM : 95
0x0287 (0647) H 7300 TemperatureLimitVrSoc : 115
0x0289 (0649) H 7300 TemperatureLimitVrMem : 115
0x028b (0651) H 6400 TemperatureLimitPlx : 100
0x028d (0653) H 4000 LoadLineResistance : 64
0x028f (0655) B 90 Liquid1_I2C_address : 144
0x0290 (0656) B 92 Liquid2_I2C_address : 146
0x0291 (0657) B 97 Liquid_I2C_Line : 151
0x0292 (0658) B 60 Vr_I2C_address : 96
0x0293 (0659) B 96 Vr_I2C_Line : 150
0x0294 (0660) B 00 Plx_I2C_address : 0
0x0295 (0661) B 90 Plx_I2C_Line : 144
0x0296 (0662) H 5500 TemperatureLimitTedge : 85
0x0298 (0664) H 0000 BoostStartTemperature : 0
0x029a (0666) H 0000 BoostStopTemperature : 0
0x029c (0668) I 00000000 BoostClock : 0
0x02a0 (0672) I 00000000 Reserved : 0
0x02a4 (0676) I 00000000 Reserved : 0
0x004a (0074) H 0000 HardLimitTableOffset : 0
0x004c (0076) H 9000 VddciLookupTableOffset : 144
0x0090 (0144) B 01 RevId : 1
0x0091 (0145) B 01 NumEntries : 1
0x0092 (0146) H 8403 Vdd : 900
0x004e (0078) H a802 PCIETableOffset : 680
0x02a8 (0680) B 02 RevId : 2
0x02a9 (0681) B 02 NumEntries : 2
0x02aa (0682) I d4300000 LCLK : 12500
0x02ae (0686) B 02 PCIEGenSpeed : 2
0x02af (0687) B 10 PCIELaneWidth : 16
0x02b0 (0688) I 60ea0000 LCLK : 60000
0x02b4 (0692) B 02 PCIEGenSpeed : 2
0x02b5 (0693) B 10 PCIELaneWidth : 16
0x0050 (0080) H 6d01 PixclkDependencyTableOffset : 365
0x016d (0365) B 00 RevId : 0
0x016e (0366) B 08 NumEntries : 8
0x016f (0367) I 6c390000 Clk : 14700
0x0173 (0371) B 00 VddInd : 0
0x0174 (0372) I 245e0000 Clk : 24100
0x0178 (0376) B 01 VddInd : 1
0x0179 (0377) I fc850000 Clk : 34300
0x017d (0381) B 02 VddInd : 2
0x017e (0382) I acbc0000 Clk : 48300
0x0182 (0386) B 03 VddInd : 3
0x0183 (0387) I 34d00000 Clk : 53300
0x0187 (0391) B 04 VddInd : 4
0x0188 (0392) I 686e0100 Clk : 93800
0x018c (0396) B 05 VddInd : 5
0x018d (0397) I 08970100 Clk : 104200
0x0191 (0401) B 06 VddInd : 6
0x0192 (0402) I eca30100 Clk : 107500
0x0196 (0406) B 07 VddInd : 7
0x0052 (0082) H 4301 DispClkDependencyTableOffset : 323
0x0143 (0323) B 00 RevId : 0
0x0144 (0324) B 08 NumEntries : 8
0x0145 (0325) I 286e0000 Clk : 28200
0x0149 (0329) B 00 VddInd : 0
0x014a (0330) I 2cc90000 Clk : 51500
0x014e (0334) B 01 VddInd : 1
0x014f (0335) I f80b0100 Clk : 68600
0x0153 (0339) B 02 VddInd : 2
0x0154 (0340) I 80380100 Clk : 80000
0x0158 (0344) B 03 VddInd : 3
0x0159 (0345) I 905f0100 Clk : 90000
0x015d (0349) B 04 VddInd : 4
0x015e (0350) I f4910100 Clk : 102900
0x0162 (0354) B 05 VddInd : 5
0x0163 (0355) I d0b00100 Clk : 110800
0x0167 (0359) B 06 VddInd : 6
0x0168 (0360) I c0d40100 Clk : 120000
0x016c (0364) B 07 VddInd : 7
0x0054 (0084) H 9701 PhyClkDependencyTableOffset : 407
0x0197 (0407) B 00 RevId : 0
0x0198 (0408) B 01 NumEntries : 1
0x0199 (0409) I 683c0100 Clk : 81000
0x019d (0413) B 00 VddInd : 0
================================================
FILE: test/AMD.RXVegaFrontier.16384.170628.rom.dump
================================================
sHeader:
structuresize: 642
format_revision: 8
content_revision: 1
TableRevision: 0
TableSize: 92
GoldenPPID: 1810
GoldenRevision: 11069
FormatID: 27
PlatformCaps: 72
MaxODEngineClock: 240000
MaxODMemoryClock: 150000
PowerControlLimit: 50
UlvVoltageOffset: 8
UlvSmnclkDid: 0
UlvMp1clkDid: 0
UlvGfxclkBypass: 0
GfxclkSlewRate: 0
GfxVoltageMode: 0
SocVoltageMode: 0
UclkVoltageMode: 0
UvdVoltageMode: 0
VceVoltageMode: 0
Mp0VoltageMode: 2
DcefVoltageMode: 1
StateArray:
RevId: 2
NumEntries: 2
states:
states 0:
SocClockIndexHigh: 0
SocClockIndexLow: 0
GfxClockIndexHigh: 0
GfxClockIndexLow: 0
MemClockIndexHigh: 0
MemClockIndexLow: 0
Classification: 8
CapsAndSettings: 0
Classification2: 0
states 1:
SocClockIndexHigh: 5
SocClockIndexLow: 0
GfxClockIndexHigh: 7
GfxClockIndexLow: 0
MemClockIndexHigh: 3
MemClockIndexLow: 0
Classification: 5
CapsAndSettings: 0
Classification2: 0
FanTable:
RevId: 11
FanOutputSensitivity: 4836
FanAcousticLimitRpm: 1500
ThrottlingRPM: 2300
TargetTemperature: 65
MinimumPWMLimit: 15
TargetGfxClk: 852
FanGainEdge: 400
FanGainHotspot: 400
FanGainLiquid: 400
FanGainVrVddc: 400
FanGainVrMvdd: 400
FanGainPlx: 400
FanGainHbm: 400
EnableZeroRPM: 0
FanStopTemperature: 0
FanStartTemperature: 0
FanParameters: 2
FanMinRPM: 4
FanMaxRPM: 33
ThermalController:
RevId: 1
Type: 24
I2cLine: 0
I2cAddress: 0
FanParameters: 0
FanMinRPM: 0
FanMaxRPM: 0
Flags: 0
SocclkDependencyTable:
RevId: 0
NumEntries: 6
entries:
entries 0:
Clk: 60000
VddInd: 0
entries 1:
Clk: 72000
VddInd: 1
entries 2:
Clk: 84700
VddInd: 2
entries 3:
Clk: 96000
VddInd: 3
entries 4:
Clk: 102800
VddInd: 4
entries 5:
Clk: 110700
VddInd: 5
MclkDependencyTable:
RevId: 1
NumEntries: 4
entries:
entries 0:
MemClk: 16700
VddInd: 0
VddMemInd: 0
VddciInd: 0
entries 1:
MemClk: 50000
VddInd: 1
VddMemInd: 0
VddciInd: 0
entries 2:
MemClk: 80000
VddInd: 2
VddMemInd: 0
VddciInd: 0
entries 3:
MemClk: 94500
VddInd: 3
VddMemInd: 0
VddciInd: 0
GfxclkDependencyTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
Clk: 85200
VddInd: 0
CKSVOffsetandDisable: 32768
AVFSOffset: 0
entries 1:
Clk: 99100
VddInd: 1
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 2:
Clk: 113800
VddInd: 2
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 3:
Clk: 126900
VddInd: 3
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 4:
Clk: 134800
VddInd: 4
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 5:
Clk: 144000
VddInd: 5
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 6:
Clk: 152800
VddInd: 6
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 7:
Clk: 160000
VddInd: 7
CKSVOffsetandDisable: 0
AVFSOffset: 0
DcefclkDependencyTable:
RevId: 0
NumEntries: 3
entries:
entries 0:
Clk: 60000
VddInd: 0
entries 1:
Clk: 72000
VddInd: 0
entries 2:
Clk: 80000
VddInd: 0
VddcLookupTable:
RevId: 1
NumEntries: 8
entries:
entries 0:
Vdd: 800
entries 1:
Vdd: 900
entries 2:
Vdd: 950
entries 3:
Vdd: 1000
entries 4:
Vdd: 1050
entries 5:
Vdd: 1100
entries 6:
Vdd: 1150
entries 7:
Vdd: 1200
VddmemLookupTable:
RevId: 1
NumEntries: 1
entries:
entries 0:
Vdd: 1350
MMDependencyTable:
RevId: 1
NumEntries: 8
entries:
entries 0:
VddcInd: 0
DClk: 34200
VClk: 46200
EClk: 60000
PSPClk: 50000
entries 1:
VddcInd: 1
DClk: 48000
VClk: 60000
EClk: 68500
PSPClk: 50000
entries 2:
VddcInd: 2
DClk: 65400
VClk: 72000
EClk: 75700
PSPClk: 50000
entries 3:
VddcInd: 3
DClk: 75700
VClk: 84700
EClk: 84700
PSPClk: 50000
entries 4:
VddcInd: 4
DClk: 84700
VClk: 90000
EClk: 90000
PSPClk: 50000
entries 5:
VddcInd: 5
DClk: 96000
VClk: 102800
EClk: 96000
PSPClk: 50000
entries 6:
VddcInd: 6
DClk: 102800
VClk: 110700
EClk: 96000
PSPClk: 50000
entries 7:
VddcInd: 7
DClk: 110700
VClk: 110700
EClk: 102800
PSPClk: 50000
VCEStateTable: UNUSED
Reserve: 0
PowerTuneTable:
RevId: 7
SocketPowerLimit: 220
BatteryPowerLimit: 220
SmallPowerLimit: 220
TdcLimit: 300
EdcLimit: 0
SoftwareShutdownTemp: 74
TemperatureLimitHotSpot: 105
TemperatureLimitLiquid1: 74
TemperatureLimitLiquid2: 74
TemperatureLimitHBM: 95
TemperatureLimitVrSoc: 115
TemperatureLimitVrMem: 115
TemperatureLimitPlx: 100
LoadLineResistance: 64
Liquid1_I2C_address: 144
Liquid2_I2C_address: 146
Liquid_I2C_Line: 151
Vr_I2C_address: 96
Vr_I2C_Line: 150
Plx_I2C_address: 0
Plx_I2C_Line: 144
TemperatureLimitTedge: 70
BoostStartTemperature: 0
BoostStopTemperature: 0
BoostClock: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
HardLimitTable: UNUSED
VddciLookupTable:
RevId: 1
NumEntries: 1
entries:
entries 0:
Vdd: 900
PCIETable:
RevId: 2
NumEntries: 2
entries:
entries 0:
LCLK: 12500
PCIEGenSpeed: 2
PCIELaneWidth: 16
entries 1:
LCLK: 60000
PCIEGenSpeed: 2
PCIELaneWidth: 16
PixclkDependencyTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
Clk: 14700
VddInd: 0
entries 1:
Clk: 24100
VddInd: 1
entries 2:
Clk: 34300
VddInd: 2
entries 3:
Clk: 48300
VddInd: 3
entries 4:
Clk: 53300
VddInd: 4
entries 5:
Clk: 93800
VddInd: 5
entries 6:
Clk: 104200
VddInd: 6
entries 7:
Clk: 107500
VddInd: 7
DispClkDependencyTable:
RevId: 0
NumEntries: 8
entries:
entries 0:
Clk: 28200
VddInd: 0
entries 1:
Clk: 51500
VddInd: 1
entries 2:
Clk: 68600
VddInd: 2
entries 3:
Clk: 80000
VddInd: 3
entries 4:
Clk: 90000
VddInd: 4
entries 5:
Clk: 102900
VddInd: 5
entries 6:
Clk: 110800
VddInd: 6
entries 7:
Clk: 120000
VddInd: 7
PhyClkDependencyTable:
RevId: 0
NumEntries: 1
entries:
entries 0:
Clk: 81000
VddInd: 0
================================================
FILE: test/AMD.RXVegaFrontier.16384.170628.rom.rawdump
================================================
PowerPlay table rev 8.1 size 642 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H 8202 structuresize : 642
0x0002 (0002) B 08 format_revision : 8
0x0003 (0003) B 01 content_revision : 1
0x0004 (0004) B 00 TableRevision : 0
0x0005 (0005) H 5c00 TableSize : 92
0x0007 (0007) I 12070000 GoldenPPID : 1810
0x000b (0011) I 3d2b0000 GoldenRevision : 11069
0x000f (0015) H 1b00 FormatID : 27
0x0011 (0017) I 48000000 PlatformCaps : 72
0x0015 (0021) I 80a90300 MaxODEngineClock : 240000
0x0019 (0025) I f0490200 MaxODMemoryClock : 150000
0x001d (0029) H 3200 PowerControlLimit : 50
0x001f (0031) H 0800 UlvVoltageOffset : 8
0x0021 (0033) H 0000 UlvSmnclkDid : 0
0x0023 (0035) H 0000 UlvMp1clkDid : 0
0x0025 (0037) H 0000 UlvGfxclkBypass : 0
0x0027 (0039) H 0000 GfxclkSlewRate : 0
0x0029 (0041) B 00 GfxVoltageMode : 0
0x002a (0042) B 00 SocVoltageMode : 0
0x002b (0043) B 00 UclkVoltageMode : 0
0x002c (0044) B 00 UvdVoltageMode : 0
0x002d (0045) B 00 VceVoltageMode : 0
0x002e (0046) B 02 Mp0VoltageMode : 2
0x002f (0047) B 01 DcefVoltageMode : 1
0x0030 (0048) H 5c00 StateArrayOffset : 92
0x005c (0092) B 02 RevId : 2
0x005d (0093) B 02 NumEntries : 2
0x005e (0094) B 00 SocClockIndexHigh : 0
0x005f (0095) B 00 SocClockIndexLow : 0
0x0060 (0096) B 00 GfxClockIndexHigh : 0
0x0061 (0097) B 00 GfxClockIndexLow : 0
0x0062 (0098) B 00 MemClockIndexHigh : 0
0x0063 (0099) B 00 MemClockIndexLow : 0
0x0064 (0100) H 0800 Classification : 8
0x0066 (0102) I 00000000 CapsAndSettings : 0
0x006a (0106) H 0000 Classification2 : 0
0x006c (0108) B 05 SocClockIndexHigh : 5
0x006d (0109) B 00 SocClockIndexLow : 0
0x006e (0110) B 07 GfxClockIndexHigh : 7
0x006f (0111) B 00 GfxClockIndexLow : 0
0x0070 (0112) B 03 MemClockIndexHigh : 3
0x0071 (0113) B 00 MemClockIndexLow : 0
0x0072 (0114) H 0500 Classification : 5
0x0074 (0116) I 00000000 CapsAndSettings : 0
0x0078 (0120) H 0000 Classification2 : 0
0x0032 (0050) H 1b02 FanTableOffset : 539
0x021b (0539) B 0b RevId : 11
0x021c (0540) H e412 FanOutputSensitivity : 4836
0x021e (0542) H dc05 FanAcousticLimitRpm : 1500
0x0220 (0544) H fc08 ThrottlingRPM : 2300
0x0222 (0546) H 4100 TargetTemperature : 65
0x0224 (0548) H 0f00 MinimumPWMLimit : 15
0x0226 (0550) H 5403 TargetGfxClk : 852
0x0228 (0552) H 9001 FanGainEdge : 400
0x022a (0554) H 9001 FanGainHotspot : 400
0x022c (0556) H 9001 FanGainLiquid : 400
0x022e (0558) H 9001 FanGainVrVddc : 400
0x0230 (0560) H 9001 FanGainVrMvdd : 400
0x0232 (0562) H 9001 FanGainPlx : 400
0x0234 (0564) H 9001 FanGainHbm : 400
0x0236 (0566) B 00 EnableZeroRPM : 0
0x0237 (0567) H 0000 FanStopTemperature : 0
0x0239 (0569) H 0000 FanStartTemperature : 0
0x023b (0571) B 02 FanParameters : 2
0x023c (0572) B 04 FanMinRPM : 4
0x023d (0573) B 21 FanMaxRPM : 33
0x0034 (0052) H 1202 ThermalControllerOffset : 530
0x0212 (0530) B 01 RevId : 1
0x0213 (0531) B 18 Type : 24
0x0214 (0532) B 00 I2cLine : 0
0x0215 (0533) B 00 I2cAddress : 0
0x0216 (0534) B 00 FanParameters : 0
0x0217 (0535) B 00 FanMinRPM : 0
0x0218 (0536) B 00 FanMaxRPM : 0
0x0219 (0537) B 00 Flags : 0
0x0036 (0054) H 9400 SocclkDependencyTableOffset : 148
0x0094 (0148) B 00 RevId : 0
0x0095 (0149) B 06 NumEntries : 6
0x0096 (0150) I 60ea0000 Clk : 60000
0x009a (0154) B 00 VddInd : 0
0x009b (0155) I 40190100 Clk : 72000
0x009f (0159) B 01 VddInd : 1
0x00a0 (0160) I dc4a0100 Clk : 84700
0x00a4 (0164) B 02 VddInd : 2
0x00a5 (0165) I 00770100 Clk : 96000
0x00a9 (0169) B 03 VddInd : 3
0x00aa (0170) I 90910100 Clk : 102800
0x00ae (0174) B 04 VddInd : 4
0x00af (0175) I 6cb00100 Clk : 110700
0x00b3 (0179) B 05 VddInd : 5
0x0038 (0056) H 6a01 MclkDependencyTableOffset : 362
0x016a (0362) B 01 RevId : 1
0x016b (0363) B 04 NumEntries : 4
0x016c (0364) I 3c410000 MemClk : 16700
0x0170 (0368) B 00 VddInd : 0
0x0171 (0369) B 00 VddMemInd : 0
0x0172 (0370) B 00 VddciInd : 0
0x0173 (0371) I 50c30000 MemClk : 50000
0x0177 (0375) B 01 VddInd : 1
0x0178 (0376) B 00 VddMemInd : 0
0x0179 (0377) B 00 VddciInd : 0
0x017a (0378) I 80380100 MemClk : 80000
0x017e (0382) B 02 VddInd : 2
0x017f (0383) B 00 VddMemInd : 0
0x0180 (0384) B 00 VddciInd : 0
0x0181 (0385) I 24710100 MemClk : 94500
0x0185 (0389) B 03 VddInd : 3
0x0186 (0390) B 00 VddMemInd : 0
0x0187 (0391) B 00 VddciInd : 0
0x003a (0058) H b400 GfxclkDependencyTableOffset : 180
0x00b4 (0180) B 00 RevId : 0
0x00b5 (0181) B 08 NumEntries : 8
0x00b6 (0182) I d04c0100 Clk : 85200
0x00ba (0186) B 00 VddInd : 0
0x00bb (0187) H 0080 CKSVOffsetandDisable : 32768
0x00bd (0189) H 0000 AVFSOffset : 0
0x00bf (0191) I 1c830100 Clk : 99100
0x00c3 (0195) B 01 VddInd : 1
0x00c4 (0196) H 0000 CKSVOffsetandDisable : 0
0x00c6 (0198) H 0000 AVFSOffset : 0
0x00c8 (0200) I 88bc0100 Clk : 113800
0x00cc (0204) B 02 VddInd : 2
0x00cd (0205) H 0000 CKSVOffsetandDisable : 0
0x00cf (0207) H 0000 AVFSOffset : 0
0x00d1 (0209) I b4ef0100 Clk : 126900
0x00d5 (0213) B 03 VddInd : 3
0x00d6 (0214) H 0000 CKSVOffsetandDisable : 0
0x00d8 (0216) H 0000 AVFSOffset : 0
0x00da (0218) I 900e0200 Clk : 134800
0x00de (0222) B 04 VddInd : 4
0x00df (0223) H 0000 CKSVOffsetandDisable : 0
0x00e1 (0225) H 0000 AVFSOffset : 0
0x00e3 (0227) I 80320200 Clk : 144000
0x00e7 (0231) B 05 VddInd : 5
0x00e8 (0232) H 0000 CKSVOffsetandDisable : 0
0x00ea (0234) H 0000 AVFSOffset : 0
0x00ec (0236) I e0540200 Clk : 152800
0x00f0 (0240) B 06 VddInd : 6
0x00f1 (0241) H 0000 CKSVOffsetandDisable : 0
0x00f3 (0243) H 0000 AVFSOffset : 0
0x00f5 (0245) I 00710200 Clk : 160000
0x00f9 (0249) B 07 VddInd : 7
0x00fa (0250) H 0000 CKSVOffsetandDisable : 0
0x00fc (0252) H 0000 AVFSOffset : 0
0x003c (0060) H fe00 DcefclkDependencyTableOffset : 254
0x00fe (0254) B 00 RevId : 0
0x00ff (0255) B 03 NumEntries : 3
0x0100 (0256) I 60ea0000 Clk : 60000
0x0104 (0260) B 00 VddInd : 0
0x0105 (0261) I 40190100 Clk : 72000
0x0109 (0265) B 00 VddInd : 0
0x010a (0266) I 80380100 Clk : 80000
0x010e (0270) B 00 VddInd : 0
0x003e (0062) H 7a00 VddcLookupTableOffset : 122
0x007a (0122) B 01 RevId : 1
0x007b (0123) B 08 NumEntries : 8
0x007c (0124) H 2003 Vdd : 800
0x007e (0126) H 8403 Vdd : 900
0x0080 (0128) H b603 Vdd : 950
0x0082 (0130) H e803 Vdd : 1000
0x0084 (0132) H 1a04 Vdd : 1050
0x0086 (0134) H 4c04 Vdd : 1100
0x0088 (0136) H 7e04 Vdd : 1150
0x008a (0138) H b004 Vdd : 1200
0x0040 (0064) H 8c00 VddmemLookupTableOffset : 140
0x008c (0140) B 01 RevId : 1
0x008d (0141) B 01 NumEntries : 1
0x008e (0142) H 4605 Vdd : 1350
0x0042 (0066) H 8801 MMDependencyTableOffset : 392
0x0188 (0392) B 01 RevId : 1
0x0189 (0393) B 08 NumEntries : 8
0x018a (0394) B 00 VddcInd : 0
0x018b (0395) I 98850000 DClk : 34200
0x018f (0399) I 78b40000 VClk : 46200
0x0193 (0403) I 60ea0000 EClk : 60000
0x0197 (0407) I 50c30000 PSPClk : 50000
0x019b (0411) B 01 VddcInd : 1
0x019c (0412) I 80bb0000 DClk : 48000
0x01a0 (0416) I 60ea0000 VClk : 60000
0x01a4 (0420) I 940b0100 EClk : 68500
0x01a8 (0424) I 50c30000 PSPClk : 50000
0x01ac (0428) B 02 VddcInd : 2
0x01ad (0429) I 78ff0000 DClk : 65400
0x01b1 (0433) I 40190100 VClk : 72000
0x01b5 (0437) I b4270100 EClk : 75700
0x01b9 (0441) I 50c30000 PSPClk : 50000
0x01bd (0445) B 03 VddcInd : 3
0x01be (0446) I b4270100 DClk : 75700
0x01c2 (0450) I dc4a0100 VClk : 84700
0x01c6 (0454) I dc4a0100 EClk : 84700
0x01ca (0458) I 50c30000 PSPClk : 50000
0x01ce (0462) B 04 VddcInd : 4
0x01cf (0463) I dc4a0100 DClk : 84700
0x01d3 (0467) I 905f0100 VClk : 90000
0x01d7 (0471) I 905f0100 EClk : 90000
0x01db (0475) I 50c30000 PSPClk : 50000
0x01df (0479) B 05 VddcInd : 5
0x01e0 (0480) I 00770100 DClk : 96000
0x01e4 (0484) I 90910100 VClk : 102800
0x01e8 (0488) I 00770100 EClk : 96000
0x01ec (0492) I 50c30000 PSPClk : 50000
0x01f0 (0496) B 06 VddcInd : 6
0x01f1 (0497) I 90910100 DClk : 102800
0x01f5 (0501) I 6cb00100 VClk : 110700
0x01f9 (0505) I 00770100 EClk : 96000
0x01fd (0509) I 50c30000 PSPClk : 50000
0x0201 (0513) B 07 VddcInd : 7
0x0202 (0514) I 6cb00100 DClk : 110700
0x0206 (0518) I 6cb00100 VClk : 110700
0x020a (0522) I 90910100 EClk : 102800
0x020e (0526) I 50c30000 PSPClk : 50000
0x0044 (0068) H 0000 VCEStateTableOffset : 0
0x0046 (0070) H 0000 Reserve : 0
0x0048 (0072) H 3e02 PowerTuneTableOffset : 574
0x023e (0574) B 07 RevId : 7
0x023f (0575) H dc00 SocketPowerLimit : 220
0x0241 (0577) H dc00 BatteryPowerLimit : 220
0x0243 (0579) H dc00 SmallPowerLimit : 220
0x0245 (0581) H 2c01 TdcLimit : 300
0x0247 (0583) H 0000 EdcLimit : 0
0x0249 (0585) H 4a00 SoftwareShutdownTemp : 74
0x024b (0587) H 6900 TemperatureLimitHotSpot : 105
0x024d (0589) H 4a00 TemperatureLimitLiquid1 : 74
0x024f (0591) H 4a00 TemperatureLimitLiquid2 : 74
0x0251 (0593) H 5f00 TemperatureLimitHBM : 95
0x0253 (0595) H 7300 TemperatureLimitVrSoc : 115
0x0255 (0597) H 7300 TemperatureLimitVrMem : 115
0x0257 (0599) H 6400 TemperatureLimitPlx : 100
0x0259 (0601) H 4000 LoadLineResistance : 64
0x025b (0603) B 90 Liquid1_I2C_address : 144
0x025c (0604) B 92 Liquid2_I2C_address : 146
0x025d (0605) B 97 Liquid_I2C_Line : 151
0x025e (0606) B 60 Vr_I2C_address : 96
0x025f (0607) B 96 Vr_I2C_Line : 150
0x0260 (0608) B 00 Plx_I2C_address : 0
0x0261 (0609) B 90 Plx_I2C_Line : 144
0x0262 (0610) H 4600 TemperatureLimitTedge : 70
0x0264 (0612) H 0000 BoostStartTemperature : 0
0x0266 (0614) H 0000 BoostStopTemperature : 0
0x0268 (0616) I 00000000 BoostClock : 0
0x026c (0620) I 00000000 Reserved : 0
0x0270 (0624) I 00000000 Reserved : 0
0x004a (0074) H 0000 HardLimitTableOffset : 0
0x004c (0076) H 9000 VddciLookupTableOffset : 144
0x0090 (0144) B 01 RevId : 1
0x0091 (0145) B 01 NumEntries : 1
0x0092 (0146) H 8403 Vdd : 900
0x004e (0078) H 7402 PCIETableOffset : 628
0x0274 (0628) B 02 RevId : 2
0x0275 (0629) B 02 NumEntries : 2
0x0276 (0630) I d4300000 LCLK : 12500
0x027a (0634) B 02 PCIEGenSpeed : 2
0x027b (0635) B 10 PCIELaneWidth : 16
0x027c (0636) I 60ea0000 LCLK : 60000
0x0280 (0640) B 02 PCIEGenSpeed : 2
0x0281 (0641) B 10 PCIELaneWidth : 16
0x0050 (0080) H 3901 PixclkDependencyTableOffset : 313
0x0139 (0313) B 00 RevId : 0
0x013a (0314) B 08 NumEntries : 8
0x013b (0315) I 6c390000 Clk : 14700
0x013f (0319) B 00 VddInd : 0
0x0140 (0320) I 245e0000 Clk : 24100
0x0144 (0324) B 01 VddInd : 1
0x0145 (0325) I fc850000 Clk : 34300
0x0149 (0329) B 02 VddInd : 2
0x014a (0330) I acbc0000 Clk : 48300
0x014e (0334) B 03 VddInd : 3
0x014f (0335) I 34d00000 Clk : 53300
0x0153 (0339) B 04 VddInd : 4
0x0154 (0340) I 686e0100 Clk : 93800
0x0158 (0344) B 05 VddInd : 5
0x0159 (0345) I 08970100 Clk : 104200
0x015d (0349) B 06 VddInd : 6
0x015e (0350) I eca30100 Clk : 107500
0x0162 (0354) B 07 VddInd : 7
0x0052 (0082) H 0f01 DispClkDependencyTableOffset : 271
0x010f (0271) B 00 RevId : 0
0x0110 (0272) B 08 NumEntries : 8
0x0111 (0273) I 286e0000 Clk : 28200
0x0115 (0277) B 00 VddInd : 0
0x0116 (0278) I 2cc90000 Clk : 51500
0x011a (0282) B 01 VddInd : 1
0x011b (0283) I f80b0100 Clk : 68600
0x011f (0287) B 02 VddInd : 2
0x0120 (0288) I 80380100 Clk : 80000
0x0124 (0292) B 03 VddInd : 3
0x0125 (0293) I 905f0100 Clk : 90000
0x0129 (0297) B 04 VddInd : 4
0x012a (0298) I f4910100 Clk : 102900
0x012e (0302) B 05 VddInd : 5
0x012f (0303) I d0b00100 Clk : 110800
0x0133 (0307) B 06 VddInd : 6
0x0134 (0308) I c0d40100 Clk : 120000
0x0138 (0312) B 07 VddInd : 7
0x0054 (0084) H 6301 PhyClkDependencyTableOffset : 355
0x0163 (0355) B 00 RevId : 0
0x0164 (0356) B 01 NumEntries : 1
0x0165 (0357) I 683c0100 Clk : 81000
0x0169 (0361) B 00 VddInd : 0
================================================
FILE: test/AMD.RadeonVII.16384.190116.rom.dump
================================================
sHeader:
structuresize: 1730
format_revision: 11
content_revision: 0
TableRevision: 2
TableSize: 1730
GoldenPPID: 2100
GoldenRevision: 13732
FormatID: 124
PlatformCaps: 9
ThermalControllerType: 26
SmallPowerLimit1: 250
SmallPowerLimit2: 250
BoostPowerLimit: 250
ODTurboPowerLimit: 0
ODPowerSavePowerLimit: 0
SoftwareShutdownTemp: 118
PowerSavingClockTable:
TableRevision: 1
PowerSavingClockCount: 11
PowerSavingClockMax:
PowerSavingClockMax 0: 1801
PowerSavingClockMax 1: 1134
PowerSavingClockMax 2: 972
PowerSavingClockMax 3: 972
PowerSavingClockMax 4: 972
PowerSavingClockMax 5: 1000
PowerSavingClockMax 6: 1225
PowerSavingClockMax 7: 1134
PowerSavingClockMax 8: 1134
PowerSavingClockMax 9: 1076
PowerSavingClockMax 10: 810
PowerSavingClockMax 11: 0
PowerSavingClockMax 12: 0
PowerSavingClockMax 13: 0
PowerSavingClockMax 14: 0
PowerSavingClockMax 15: 0
PowerSavingClockMin:
PowerSavingClockMin 0: 700
PowerSavingClockMin 1: 358
PowerSavingClockMin 2: 310
PowerSavingClockMin 3: 310
PowerSavingClockMin 4: 310
PowerSavingClockMin 5: 350
PowerSavingClockMin 6: 550
PowerSavingClockMin 7: 358
PowerSavingClockMin 8: 358
PowerSavingClockMin 9: 147
PowerSavingClockMin 10: 270
PowerSavingClockMin 11: 0
PowerSavingClockMin 12: 0
PowerSavingClockMin 13: 0
PowerSavingClockMin 14: 0
PowerSavingClockMin 15: 0
OverDrive8Table:
ODTableRevision: 1
ODFeatureCount: 14
ODFeatureCapabilities:
ODFeatureCapabilities 0: 1
ODFeatureCapabilities 1: 1
ODFeatureCapabilities 2: 1
ODFeatureCapabilities 3: 1
ODFeatureCapabilities 4: 1
ODFeatureCapabilities 5: 1
ODFeatureCapabilities 6: 1
ODFeatureCapabilities 7: 1
ODFeatureCapabilities 8: 1
ODFeatureCapabilities 9: 0
ODFeatureCapabilities 10: 1
ODFeatureCapabilities 11: 1
ODFeatureCapabilities 12: 1
ODFeatureCapabilities 13: 1
ODFeatureCapabilities 14: 0
ODFeatureCapabilities 15: 0
ODFeatureCapabilities 16: 0
ODFeatureCapabilities 17: 0
ODFeatureCapabilities 18: 0
ODFeatureCapabilities 19: 0
ODFeatureCapabilities 20: 0
ODFeatureCapabilities 21: 0
ODFeatureCapabilities 22: 0
ODFeatureCapabilities 23: 0
ODFeatureCapabilities 24: 0
ODFeatureCapabilities 25: 0
ODFeatureCapabilities 26: 0
ODFeatureCapabilities 27: 0
ODFeatureCapabilities 28: 0
ODFeatureCapabilities 29: 0
ODFeatureCapabilities 30: 0
ODFeatureCapabilities 31: 0
ODSettingCount: 29
ODSettingsMax:
ODSettingsMax 0: 2200
ODSettingsMax 1: 2200
ODSettingsMax 2: 2200
ODSettingsMax 3: 1218
ODSettingsMax 4: 2200
ODSettingsMax 5: 1218
ODSettingsMax 6: 2200
ODSettingsMax 7: 1218
ODSettingsMax 8: 1200
ODSettingsMax 9: 20
ODSettingsMax 10: 3850
ODSettingsMax 11: 3850
ODSettingsMax 12: 95
ODSettingsMax 13: 110
ODSettingsMax 14: 2
ODSettingsMax 15: 0
ODSettingsMax 16: 1
ODSettingsMax 17: 1
ODSettingsMax 18: 1
ODSettingsMax 19: 95
ODSettingsMax 20: 100
ODSettingsMax 21: 95
ODSettingsMax 22: 100
ODSettingsMax 23: 95
ODSettingsMax 24: 100
ODSettingsMax 25: 95
ODSettingsMax 26: 100
ODSettingsMax 27: 95
ODSettingsMax 28: 100
ODSettingsMax 29: 0
ODSettingsMax 30: 0
ODSettingsMax 31: 0
ODSettingsMin:
ODSettingsMin 0: 808
ODSettingsMin 1: 808
ODSettingsMin 2: 808
ODSettingsMin 3: 738
ODSettingsMin 4: 808
ODSettingsMin 5: 738
ODSettingsMin 6: 808
ODSettingsMin 7: 738
ODSettingsMin 8: 350
ODSettingsMin 9: 20
ODSettingsMin 10: 450
ODSettingsMin 11: 450
ODSettingsMin 12: 25
ODSettingsMin 13: 50
ODSettingsMin 14: 0
ODSettingsMin 15: 0
ODSettingsMin 16: 0
ODSettingsMin 17: 0
ODSettingsMin 18: 0
ODSettingsMin 19: 25
ODSettingsMin 20: 20
ODSettingsMin 21: 25
ODSettingsMin 22: 20
ODSettingsMin 23: 25
ODSettingsMin 24: 20
ODSettingsMin 25: 25
ODSettingsMin 26: 20
ODSettingsMin 27: 25
ODSettingsMin 28: 20
ODSettingsMin 29: 0
ODSettingsMin 30: 0
ODSettingsMin 31: 0
Reserve:
Reserve 0: 0
Reserve 1: 0
Reserve 2: 0
Reserve 3: 0
Reserve 4: 0
smcPPTable:
Version: 3
FeaturesToRun:
FeaturesToRun 0: 972353535
FeaturesToRun 1: 0
SocketPowerLimitAc0: 250
SocketPowerLimitAc0Tau: 0
SocketPowerLimitAc1: 0
SocketPowerLimitAc1Tau: 0
SocketPowerLimitAc2: 0
SocketPowerLimitAc2Tau: 0
SocketPowerLimitAc3: 0
SocketPowerLimitAc3Tau: 0
SocketPowerLimitDc: 250
SocketPowerLimitDcTau: 0
TdcLimitSoc: 50
TdcLimitSocTau: 0
TdcLimitGfx: 330
TdcLimitGfxTau: 0
TedgeLimit: 100
ThotspotLimit: 110
ThbmLimit: 94
Tvr_gfxLimit: 115
Tvr_memLimit: 115
Tliquid1Limit: 65535
Tliquid2Limit: 65535
TplxLimit: 65535
FitLimit: 0
PpmPowerLimit: 0
PpmTemperatureThreshold: 0
MemoryOnPackage: 1
padding8_limits: 0
Tvr_SocLimit: 115
UlvVoltageOffsetSoc: 0
UlvVoltageOffsetGfx: 0
UlvSmnclkDid: 0
UlvMp1clkDid: 0
UlvGfxclkBypass: 0
Padding234: 0
MinVoltageGfx: 2950
MinVoltageSoc: 2850
MaxVoltageGfx: 4875
MaxVoltageSoc: 4675
LoadLineResistanceGfx: 38
LoadLineResistanceSoc: 0
DpmDescriptor:
DpmDescriptor 0:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 9
padding: 0
ConversionToAvfsClk:
m: 0
b: 0
SsCurve:
a: 0.3744
b:-0.485
c: 0.8207
DpmDescriptor 1:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1.244
b:-0.08099
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 2:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1.206
b: 0.17013
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 3:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1.3784
b: 0.03667
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 4:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1.2608
b:-0.05297
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 5:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 3
padding: 0
ConversionToAvfsClk:
m: 1.0241
b: 0.15026
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 6:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1.0486
b: 0.1726
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 7:
VoltageMode: 0
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 0.8545
b: 0.11896
SsCurve:
a: 0
b: 0
c: 0
DpmDescriptor 8:
VoltageMode: 2
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 0
b: 0
SsCurve:
a: 1.105
b:-1.0397
c: 0.69885
DpmDescriptor 9:
VoltageMode: 2
SnapToDiscrete: 1
NumDiscreteLevels: 3
padding: 0
ConversionToAvfsClk:
m: 0
b: 0
SsCurve:
a: 0
b: 0
c: 0.69885
DpmDescriptor 10:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1
b: 0
SsCurve:
a: 0.4933
b:-0.67
c: 0.95885
FreqTableGfx:
FreqTableGfx 0: 700
FreqTableGfx 1: 808
FreqTableGfx 2: 1134
FreqTableGfx 3: 1372
FreqTableGfx 4: 1546
FreqTableGfx 5: 1683
FreqTableGfx 6: 1749
FreqTableGfx 7: 1773
FreqTableGfx 8: 1801
FreqTableGfx 9: 0
FreqTableGfx 10: 0
FreqTableGfx 11: 0
FreqTableGfx 12: 0
FreqTableGfx 13: 0
FreqTableGfx 14: 0
FreqTableGfx 15: 0
FreqTableVclk:
FreqTableVclk 0: 358
FreqTableVclk 1: 486
FreqTableVclk 2: 619
FreqTableVclk 3: 756
FreqTableVclk 4: 850
FreqTableVclk 5: 972
FreqTableVclk 6: 1134
FreqTableVclk 7: 1134
FreqTableDclk:
FreqTableDclk 0: 310
FreqTableDclk 1: 400
FreqTableDclk 2: 524
FreqTableDclk 3: 619
FreqTableDclk 4: 680
FreqTableDclk 5: 756
FreqTableDclk 6: 850
FreqTableDclk 7: 972
FreqTableEclk:
FreqTableEclk 0: 310
FreqTableEclk 1: 400
FreqTableEclk 2: 524
FreqTableEclk 3: 619
FreqTableEclk 4: 680
FreqTableEclk 5: 756
FreqTableEclk 6: 850
FreqTableEclk 7: 972
FreqTableSocclk:
FreqTableSocclk 0: 310
FreqTableSocclk 1: 524
FreqTableSocclk 2: 567
FreqTableSocclk 3: 619
FreqTableSocclk 4: 680
FreqTableSocclk 5: 756
FreqTableSocclk 6: 850
FreqTableSocclk 7: 972
FreqTableUclk:
FreqTableUclk 0: 350
FreqTableUclk 1: 800
FreqTableUclk 2: 1000
FreqTableUclk 3: 1000
FreqTableFclk:
FreqTableFclk 0: 550
FreqTableFclk 1: 610
FreqTableFclk 2: 690
FreqTableFclk 3: 760
FreqTableFclk 4: 870
FreqTableFclk 5: 960
FreqTableFclk 6: 1080
FreqTableFclk 7: 1225
FreqTableDcefclk:
FreqTableDcefclk 0: 358
FreqTableDcefclk 1: 454
FreqTableDcefclk 2: 567
FreqTableDcefclk 3: 680
FreqTableDcefclk 4: 756
FreqTableDcefclk 5: 850
FreqTableDcefclk 6: 972
FreqTableDcefclk 7: 1134
FreqTableDispclk:
FreqTableDispclk 0: 358
FreqTableDispclk 1: 454
FreqTableDispclk 2: 567
FreqTableDispclk 3: 680
FreqTableDispclk 4: 756
FreqTableDispclk 5: 850
FreqTableDispclk 6: 972
FreqTableDispclk 7: 1134
FreqTablePixclk:
FreqTablePixclk 0: 147
FreqTablePixclk 1: 242
FreqTablePixclk 2: 344
FreqTablePixclk 3: 484
FreqTablePixclk 4: 533
FreqTablePixclk 5: 938
FreqTablePixclk 6: 1043
FreqTablePixclk 7: 1076
FreqTablePhyclk:
FreqTablePhyclk 0: 270
FreqTablePhyclk 1: 540
FreqTablePhyclk 2: 810
FreqTablePhyclk 3: 0
FreqTablePhyclk 4: 0
FreqTablePhyclk 5: 0
FreqTablePhyclk 6: 0
FreqTablePhyclk 7: 0
DcModeMaxFreq:
DcModeMaxFreq 0: 1801
DcModeMaxFreq 1: 1134
DcModeMaxFreq 2: 972
DcModeMaxFreq 3: 972
DcModeMaxFreq 4: 972
DcModeMaxFreq 5: 1000
DcModeMaxFreq 6: 1134
DcModeMaxFreq 7: 1134
DcModeMaxFreq 8: 1076
DcModeMaxFreq 9: 810
DcModeMaxFreq 10: 1225
Padding8_Clks: 0
Mp0clkFreq:
Mp0clkFreq 0: 200
Mp0clkFreq 1: 300
Mp0DpmVoltage:
Mp0DpmVoltage 0: 2400
Mp0DpmVoltage 1: 2800
GfxclkFidle: 808
GfxclkSlewRate: 0
CksEnableFreq: 0
Padding789: 0
CksVoltageOffset:
a: 0
b: 0
c: 0
Padding567:
Padding567 0: 0
Padding567 1: 0
Padding567 2: 0
Padding567 3: 0
GfxclkDsMaxFreq: 1801
GfxclkSource: 1
Padding456: 0
LowestUclkReservedForUlv: 0
Padding8_Uclk:
Padding8_Uclk 0: 0
Padding8_Uclk 1: 0
Padding8_Uclk 2: 0
PcieGenSpeed:
PcieGenSpeed 0: 0
PcieGenSpeed 1: 2
PcieLaneCount:
PcieLaneCount 0: 6
PcieLaneCount 1: 6
LclkFreq:
LclkFreq 0: 80
LclkFreq 1: 308
EnableTdpm: 0
TdpmHighHystTemperature: 0
TdpmLowHystTemperature: 0
GfxclkFreqHighTempLimit: 0
FanStopTemp: 0
FanStartTemp: 0
FanGainEdge: 400
FanGainHotspot: 400
FanGainLiquid: 400
FanGainVrGfx: 400
FanGainVrSoc: 400
FanGainPlx: 400
FanGainHbm: 400
FanPwmMin: 20
FanAcousticLimitRpm: 2900
FanThrottlingRpm: 2900
FanMaximumRpm: 3850
FanTargetTemperature: 95
FanTargetGfxclk: 0
FanZeroRpmEnable: 0
FanTachEdgePerRev: 2
FuzzyFan_ErrorSetDelta: 0
FuzzyFan_ErrorRateSetDelta: 0
FuzzyFan_PwmSetDelta: 0
FuzzyFan_Reserved: 0
OverrideAvfsGb:
OverrideAvfsGb 0: 0
OverrideAvfsGb 1: 1
Padding8_Avfs:
Padding8_Avfs 0: 0
Padding8_Avfs 1: 0
qAvfsGb:
qAvfsGb 0:
a: 0
b: 0.0185
c: 0.005
qAvfsGb 1:
a: 0
b: 0.01864
c: 0.04703
dBtcGbGfxCksOn:
a: 0
b: 0
c: 0
dBtcGbGfxCksOff:
a: 0
b: 0
c: 0
dBtcGbGfxAfll:
a: 0
b: 0
c: 0
dBtcGbSoc:
a: 0
b: 0
c: 0
qAgingGb:
qAgingGb 0:
m: 0
b: 0
qAgingGb 1:
m: 0
b: 0
qStaticVoltageOffset:
qStaticVoltageOffset 0:
a: 0
b: 0
c: 0
qStaticVoltageOffset 1:
a: 0
b: 0
c: 0
DcTol:
DcTol 0: 0
DcTol 1: 160
DcBtcEnabled:
DcBtcEnabled 0: 1
DcBtcEnabled 1: 0
Padding8_GfxBtc:
Padding8_GfxBtc 0: 0
Padding8_GfxBtc 1: 0
DcBtcMin:
DcBtcMin 0: 0
DcBtcMin 1: 0
DcBtcMax:
DcBtcMax 0: 160
DcBtcMax 1: 0
XgmiLinkSpeed:
XgmiLinkSpeed 0: 8
XgmiLinkSpeed 1: 16
XgmiLinkWidth:
XgmiLinkWidth 0: 2
XgmiLinkWidth 1: 16
XgmiFclkFreq:
XgmiFclkFreq 0: 1050
XgmiFclkFreq 1: 1100
XgmiUclkFreq:
XgmiUclkFreq 0: 1000
XgmiUclkFreq 1: 1000
XgmiSocclkFreq:
XgmiSocclkFreq 0: 1000
XgmiSocclkFreq 1: 1000
XgmiSocVoltage:
XgmiSocVoltage 0: 0
XgmiSocVoltage 1: 0
DebugOverrides: 0
ReservedEquation0:
a: 0
b: 0
c: 0
ReservedEquation1:
a: 0
b: 0
c: 0
ReservedEquation2:
a: 0
b: 0
c: 0
ReservedEquation3:
a: 0
b: 0
c: 0
MinVoltageUlvGfx: 2950
MinVoltageUlvSoc: 2850
MGpuFanBoostLimitRpm: 2900
padding16_Fan: 0
FanGainVrMem0: 400
FanGainVrMem1: 400
DcBtcGb:
DcBtcGb 0: 56
DcBtcGb 1: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
Reserved 3: 0
Reserved 4: 0
Reserved 5: 0
Reserved 6: 0
Reserved 7: 0
Reserved 8: 0
Reserved 9: 0
Reserved 10: 0
Padding32:
Padding32 0: 0
Padding32 1: 0
Padding32 2: 0
MaxVoltageStepGfx: 0
MaxVoltageStepSoc: 0
VddGfxVrMapping: 0
VddSocVrMapping: 0
VddMem0VrMapping: 0
VddMem1VrMapping: 0
GfxUlvPhaseSheddingMask: 0
SocUlvPhaseSheddingMask: 0
ExternalSensorPresent: 0
Padding8_V: 0
GfxMaxCurrent: 0
GfxOffset: 0
Padding_TelemetryGfx: 0
SocMaxCurrent: 0
SocOffset: 0
Padding_TelemetrySoc: 0
Mem0MaxCurrent: 0
Mem0Offset: 0
Padding_TelemetryMem0: 0
Mem1MaxCurrent: 0
Mem1Offset: 0
Padding_TelemetryMem1: 0
AcDcGpio: 0
AcDcPolarity: 0
VR0HotGpio: 0
VR0HotPolarity: 0
VR1HotGpio: 0
VR1HotPolarity: 0
Padding1: 0
Padding2: 0
LedPin0: 0
LedPin1: 0
LedPin2: 0
padding8_4: 0
PllGfxclkSpreadEnabled: 0
PllGfxclkSpreadPercent: 0
PllGfxclkSpreadFreq: 0
UclkSpreadEnabled: 0
UclkSpreadPercent: 0
UclkSpreadFreq: 0
FclkSpreadEnabled: 0
FclkSpreadPercent: 0
FclkSpreadFreq: 0
FllGfxclkSpreadEnabled: 0
FllGfxclkSpreadPercent: 0
FllGfxclkSpreadFreq: 0
I2cControllers:
I2cControllers 0:
Enabled: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrottler: 0
I2cProtocol: 0
I2cSpeed: 0
I2cControllers 1:
Enabled: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrottler: 0
I2cProtocol: 0
I2cSpeed: 0
I2cControllers 2:
Enabled: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrottler: 0
I2cProtocol: 0
I2cSpeed: 0
I2cControllers 3:
Enabled: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrottler: 0
I2cProtocol: 0
I2cSpeed: 0
I2cControllers 4:
Enabled: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrottler: 0
I2cProtocol: 0
I2cSpeed: 0
I2cControllers 5:
Enabled: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrottler: 0
I2cProtocol: 0
I2cSpeed: 0
I2cControllers 6:
Enabled: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrottler: 0
I2cProtocol: 0
I2cSpeed: 0
BoardReserved:
BoardReserved 0: 0
BoardReserved 1: 0
BoardReserved 2: 0
BoardReserved 3: 0
BoardReserved 4: 0
BoardReserved 5: 0
BoardReserved 6: 0
BoardReserved 7: 0
BoardReserved 8: 0
BoardReserved 9: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
================================================
FILE: test/AMD.RadeonVII.16384.190116.rom.rawdump
================================================
PowerPlay table rev 11.0 size 1730 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H c206 structuresize : 1730
0x0002 (0002) B 0b format_revision : 11
0x0003 (0003) B 00 content_revision : 0
0x0004 (0004) B 02 TableRevision : 2
0x0005 (0005) H c206 TableSize : 1730
0x0007 (0007) I 34080000 GoldenPPID : 2100
0x000b (0011) I a4350000 GoldenRevision : 13732
0x000f (0015) H 7c00 FormatID : 124
0x0011 (0017) I 09000000 PlatformCaps : 9
0x0015 (0021) B 1a ThermalControllerType : 26
0x0016 (0022) H fa00 SmallPowerLimit1 : 250
0x0018 (0024) H fa00 SmallPowerLimit2 : 250
0x001a (0026) H fa00 BoostPowerLimit : 250
0x001c (0028) H 0000 ODTurboPowerLimit : 0
0x001e (0030) H 0000 ODPowerSavePowerLimit : 0
0x0020 (0032) H 7600 SoftwareShutdownTemp : 118
0x0022 (0034) B 01 TableRevision : 1
0x0023 (0035) I 0b000000 PowerSavingClockCount : 11
0x0027 (0039) I 09070000 PowerSavingClockMax : 1801
0x002b (0043) I 6e040000 PowerSavingClockMax : 1134
0x002f (0047) I cc030000 PowerSavingClockMax : 972
0x0033 (0051) I cc030000 PowerSavingClockMax : 972
0x0037 (0055) I cc030000 PowerSavingClockMax : 972
0x003b (0059) I e8030000 PowerSavingClockMax : 1000
0x003f (0063) I c9040000 PowerSavingClockMax : 1225
0x0043 (0067) I 6e040000 PowerSavingClockMax : 1134
0x0047 (0071) I 6e040000 PowerSavingClockMax : 1134
0x004b (0075) I 34040000 PowerSavingClockMax : 1076
0x004f (0079) I 2a030000 PowerSavingClockMax : 810
0x0053 (0083) I 00000000 PowerSavingClockMax : 0
0x0057 (0087) I 00000000 PowerSavingClockMax : 0
0x005b (0091) I 00000000 PowerSavingClockMax : 0
0x005f (0095) I 00000000 PowerSavingClockMax : 0
0x0063 (0099) I 00000000 PowerSavingClockMax : 0
0x0067 (0103) I bc020000 PowerSavingClockMin : 700
0x006b (0107) I 66010000 PowerSavingClockMin : 358
0x006f (0111) I 36010000 PowerSavingClockMin : 310
0x0073 (0115) I 36010000 PowerSavingClockMin : 310
0x0077 (0119) I 36010000 PowerSavingClockMin : 310
0x007b (0123) I 5e010000 PowerSavingClockMin : 350
0x007f (0127) I 26020000 PowerSavingClockMin : 550
0x0083 (0131) I 66010000 PowerSavingClockMin : 358
0x0087 (0135) I 66010000 PowerSavingClockMin : 358
0x008b (0139) I 93000000 PowerSavingClockMin : 147
0x008f (0143) I 0e010000 PowerSavingClockMin : 270
0x0093 (0147) I 00000000 PowerSavingClockMin : 0
0x0097 (0151) I 00000000 PowerSavingClockMin : 0
0x009b (0155) I 00000000 PowerSavingClockMin : 0
0x009f (0159) I 00000000 PowerSavingClockMin : 0
0x00a3 (0163) I 00000000 PowerSavingClockMin : 0
0x00a7 (0167) B 01 ODTableRevision : 1
0x00a8 (0168) I 0e000000 ODFeatureCount : 14
0x00ac (0172) B 01 ODFeatureCapabilities : 1
0x00ad (0173) B 01 ODFeatureCapabilities : 1
0x00ae (0174) B 01 ODFeatureCapabilities : 1
0x00af (0175) B 01 ODFeatureCapabilities : 1
0x00b0 (0176) B 01 ODFeatureCapabilities : 1
0x00b1 (0177) B 01 ODFeatureCapabilities : 1
0x00b2 (0178) B 01 ODFeatureCapabilities : 1
0x00b3 (0179) B 01 ODFeatureCapabilities : 1
0x00b4 (0180) B 01 ODFeatureCapabilities : 1
0x00b5 (0181) B 00 ODFeatureCapabilities : 0
0x00b6 (0182) B 01 ODFeatureCapabilities : 1
0x00b7 (0183) B 01 ODFeatureCapabilities : 1
0x00b8 (0184) B 01 ODFeatureCapabilities : 1
0x00b9 (0185) B 01 ODFeatureCapabilities : 1
0x00ba (0186) B 00 ODFeatureCapabilities : 0
0x00bb (0187) B 00 ODFeatureCapabilities : 0
0x00bc (0188) B 00 ODFeatureCapabilities : 0
0x00bd (0189) B 00 ODFeatureCapabilities : 0
0x00be (0190) B 00 ODFeatureCapabilities : 0
0x00bf (0191) B 00 ODFeatureCapabilities : 0
0x00c0 (0192) B 00 ODFeatureCapabilities : 0
0x00c1 (0193) B 00 ODFeatureCapabilities : 0
0x00c2 (0194) B 00 ODFeatureCapabilities : 0
0x00c3 (0195) B 00 ODFeatureCapabilities : 0
0x00c4 (0196) B 00 ODFeatureCapabilities : 0
0x00c5 (0197) B 00 ODFeatureCapabilities : 0
0x00c6 (0198) B 00 ODFeatureCapabilities : 0
0x00c7 (0199) B 00 ODFeatureCapabilities : 0
0x00c8 (0200) B 00 ODFeatureCapabilities : 0
0x00c9 (0201) B 00 ODFeatureCapabilities : 0
0x00ca (0202) B 00 ODFeatureCapabilities : 0
0x00cb (0203) B 00 ODFeatureCapabilities : 0
0x00cc (0204) I 1d000000 ODSettingCount : 29
0x00d0 (0208) I 98080000 ODSettingsMax : 2200
0x00d4 (0212) I 98080000 ODSettingsMax : 2200
0x00d8 (0216) I 98080000 ODSettingsMax : 2200
0x00dc (0220) I c2040000 ODSettingsMax : 1218
0x00e0 (0224) I 98080000 ODSettingsMax : 2200
0x00e4 (0228) I c2040000 ODSettingsMax : 1218
0x00e8 (0232) I 98080000 ODSettingsMax : 2200
0x00ec (0236) I c2040000 ODSettingsMax : 1218
0x00f0 (0240) I b0040000 ODSettingsMax : 1200
0x00f4 (0244) I 14000000 ODSettingsMax : 20
0x00f8 (0248) I 0a0f0000 ODSettingsMax : 3850
0x00fc (0252) I 0a0f0000 ODSettingsMax : 3850
0x0100 (0256) I 5f000000 ODSettingsMax : 95
0x0104 (0260) I 6e000000 ODSettingsMax : 110
0x0108 (0264) I 02000000 ODSettingsMax : 2
0x010c (0268) I 00000000 ODSettingsMax : 0
0x0110 (0272) I 01000000 ODSettingsMax : 1
0x0114 (0276) I 01000000 ODSettingsMax : 1
0x0118 (0280) I 01000000 ODSettingsMax : 1
0x011c (0284) I 5f000000 ODSettingsMax : 95
0x0120 (0288) I 64000000 ODSettingsMax : 100
0x0124 (0292) I 5f000000 ODSettingsMax : 95
0x0128 (0296) I 64000000 ODSettingsMax : 100
0x012c (0300) I 5f000000 ODSettingsMax : 95
0x0130 (0304) I 64000000 ODSettingsMax : 100
0x0134 (0308) I 5f000000 ODSettingsMax : 95
0x0138 (0312) I 64000000 ODSettingsMax : 100
0x013c (0316) I 5f000000 ODSettingsMax : 95
0x0140 (0320) I 64000000 ODSettingsMax : 100
0x0144 (0324) I 00000000 ODSettingsMax : 0
0x0148 (0328) I 00000000 ODSettingsMax : 0
0x014c (0332) I 00000000 ODSettingsMax : 0
0x0150 (0336) I 28030000 ODSettingsMin : 808
0x0154 (0340) I 28030000 ODSettingsMin : 808
0x0158 (0344) I 28030000 ODSettingsMin : 808
0x015c (0348) I e2020000 ODSettingsMin : 738
0x0160 (0352) I 28030000 ODSettingsMin : 808
0x0164 (0356) I e2020000 ODSettingsMin : 738
0x0168 (0360) I 28030000 ODSettingsMin : 808
0x016c (0364) I e2020000 ODSettingsMin : 738
0x0170 (0368) I 5e010000 ODSettingsMin : 350
0x0174 (0372) I 14000000 ODSettingsMin : 20
0x0178 (0376) I c2010000 ODSettingsMin : 450
0x017c (0380) I c2010000 ODSettingsMin : 450
0x0180 (0384) I 19000000 ODSettingsMin : 25
0x0184 (0388) I 32000000 ODSettingsMin : 50
0x0188 (0392) I 00000000 ODSettingsMin : 0
0x018c (0396) I 00000000 ODSettingsMin : 0
0x0190 (0400) I 00000000 ODSettingsMin : 0
0x0194 (0404) I 00000000 ODSettingsMin : 0
0x0198 (0408) I 00000000 ODSettingsMin : 0
0x019c (0412) I 19000000 ODSettingsMin : 25
0x01a0 (0416) I 14000000 ODSettingsMin : 20
0x01a4 (0420) I 19000000 ODSettingsMin : 25
0x01a8 (0424) I 14000000 ODSettingsMin : 20
0x01ac (0428) I 19000000 ODSettingsMin : 25
0x01b0 (0432) I 14000000 ODSettingsMin : 20
0x01b4 (0436) I 19000000 ODSettingsMin : 25
0x01b8 (0440) I 14000000 ODSettingsMin : 20
0x01bc (0444) I 19000000 ODSettingsMin : 25
0x01c0 (0448) I 14000000 ODSettingsMin : 20
0x01c4 (0452) I 00000000 ODSettingsMin : 0
0x01c8 (0456) I 00000000 ODSettingsMin : 0
0x01cc (0460) I 00000000 ODSettingsMin : 0
0x01d0 (0464) H 0000 Reserve : 0
0x01d2 (0466) H 0000 Reserve : 0
0x01d4 (0468) H 0000 Reserve : 0
0x01d6 (0470) H 0000 Reserve : 0
0x01d8 (0472) H 0000 Reserve : 0
0x01da (0474) I 03000000 Version : 3
0x01de (0478) I ffeff439 FeaturesToRun : 972353535
0x01e2 (0482) I 00000000 FeaturesToRun : 0
0x01e6 (0486) H fa00 SocketPowerLimitAc0 : 250
0x01e8 (0488) H 0000 SocketPowerLimitAc0Tau : 0
0x01ea (0490) H 0000 SocketPowerLimitAc1 : 0
0x01ec (0492) H 0000 SocketPowerLimitAc1Tau : 0
0x01ee (0494) H 0000 SocketPowerLimitAc2 : 0
0x01f0 (0496) H 0000 SocketPowerLimitAc2Tau : 0
0x01f2 (0498) H 0000 SocketPowerLimitAc3 : 0
0x01f4 (0500) H 0000 SocketPowerLimitAc3Tau : 0
0x01f6 (0502) H fa00 SocketPowerLimitDc : 250
0x01f8 (0504) H 0000 SocketPowerLimitDcTau : 0
0x01fa (0506) H 3200 TdcLimitSoc : 50
0x01fc (0508) H 0000 TdcLimitSocTau : 0
0x01fe (0510) H 4a01 TdcLimitGfx : 330
0x0200 (0512) H 0000 TdcLimitGfxTau : 0
0x0202 (0514) H 6400 TedgeLimit : 100
0x0204 (0516) H 6e00 ThotspotLimit : 110
0x0206 (0518) H 5e00 ThbmLimit : 94
0x0208 (0520) H 7300 Tvr_gfxLimit : 115
0x020a (0522) H 7300 Tvr_memLimit : 115
0x020c (0524) H ffff Tliquid1Limit : 65535
0x020e (0526) H ffff Tliquid2Limit : 65535
0x0210 (0528) H ffff TplxLimit : 65535
0x0212 (0530) I 00000000 FitLimit : 0
0x0216 (0534) H 0000 PpmPowerLimit : 0
0x0218 (0536) H 0000 PpmTemperatureThreshold : 0
0x021a (0538) B 01 MemoryOnPackage : 1
0x021b (0539) B 00 padding8_limits : 0
0x021c (0540) H 7300 Tvr_SocLimit : 115
0x021e (0542) H 0000 UlvVoltageOffsetSoc : 0
0x0220 (0544) H 0000 UlvVoltageOffsetGfx : 0
0x0222 (0546) B 00 UlvSmnclkDid : 0
0x0223 (0547) B 00 UlvMp1clkDid : 0
0x0224 (0548) B 00 UlvGfxclkBypass : 0
0x0225 (0549) B 00 Padding234 : 0
0x0226 (0550) H 860b MinVoltageGfx : 2950
0x0228 (0552) H 220b MinVoltageSoc : 2850
0x022a (0554) H 0b13 MaxVoltageGfx : 4875
0x022c (0556) H 4312 MaxVoltageSoc : 4675
0x022e (0558) H 2600 LoadLineResistanceGfx : 38
0x0230 (0560) H 0000 LoadLineResistanceSoc : 0
0x0232 (0562) B 01 VoltageMode : 1
0x0233 (0563) B 01 SnapToDiscrete : 1
0x0234 (0564) B 09 NumDiscreteLevels : 9
0x0235 (0565) B 00 padding : 0
0x0236 (0566) f 00000000 m : 0
0x023a (0570) f 00000000 b : 0
0x023e (0574) f 5bb1bf3e a : 0.3744
0x0242 (0578) f ec51f8be b :-0.485
0x0246 (0582) f 6519523f c : 0.8207
0x024a (0586) B 00 VoltageMode : 0
0x024b (0587) B 01 SnapToDiscrete : 1
0x024c (0588) B 08 NumDiscreteLevels : 8
0x024d (0589) B 00 padding : 0
0x024e (0590) f 643b9f3f m : 1.244
0x0252 (0594) f 16dea5bd b :-0.08099
0x0256 (0598) f 00000000 a : 0
0x025a (0602) f 00000000 b : 0
0x025e (0606) f 00000000 c : 0
0x0262 (0610) B 00 VoltageMode : 0
0x0263 (0611) B 01 SnapToDiscrete : 1
0x0264 (0612) B 08 NumDiscreteLevels : 8
0x0265 (0613) B 00 padding : 0
0x0266 (0614) f 355e9a3f m : 1.206
0x026a (0618) f 8f362e3e b : 0.17013
0x026e (0622) f 00000000 a : 0
0x0272 (0626) f 00000000 b : 0
0x0276 (0630) f 00000000 c : 0
0x027a (0634) B 00 VoltageMode : 0
0x027b (0635) B 01 SnapToDiscrete : 1
0x027c (0636) B 08 NumDiscreteLevels : 8
0x027d (0637) B 00 padding : 0
0x027e (0638) f 696fb03f m : 1.3784
0x0282 (0642) f 4833163d b : 0.03667
0x0286 (0646) f 00000000 a : 0
0x028a (0650) f 00000000 b : 0
0x028e (0654) f 00000000 c : 0
0x0292 (0658) B 00 VoltageMode : 0
0x0293 (0659) B 01 SnapToDiscrete : 1
0x0294 (0660) B 08 NumDiscreteLevels : 8
0x0295 (0661) B 00 padding : 0
0x0296 (0662) f e561a13f m : 1.2608
0x029a (0666) f 12f758bd b :-0.05297
0x029e (0670) f 00000000 a : 0
0x02a2 (0674) f 00000000 b : 0
0x02a6 (0678) f 00000000 c : 0
0x02aa (0682) B 00 VoltageMode : 0
0x02ab (0683) B 01 SnapToDiscrete : 1
0x02ac (0684) B 03 NumDiscreteLevels : 3
0x02ad (0685) B 00 padding : 0
0x02ae (0686) f b515833f m : 1.0241
0x02b2 (0690) f c2dd193e b : 0.15026
0x02b6 (0694) f 00000000 a : 0
0x02ba (0698) f 00000000 b : 0
0x02be (0702) f 00000000 c : 0
0x02c2 (0706) B 00 VoltageMode : 0
0x02c3 (0707) B 01 SnapToDiscrete : 1
0x02c4 (0708) B 08 NumDiscreteLevels : 8
0x02c5 (0709) B 00 padding : 0
0x02c6 (0710) f 8638863f m : 1.0486
0x02ca (0714) f 0ebe303e b : 0.1726
0x02ce (0718) f 00000000 a : 0
0x02d2 (0722) f 00000000 b : 0
0x02d6 (0726) f 00000000 c : 0
0x02da (0730) B 00 VoltageMode : 0
0x02db (0731) B 01 SnapToDiscrete : 1
0x02dc (0732) B 08 NumDiscreteLevels : 8
0x02dd (0733) B 00 padding : 0
0x02de (0734) f 83c05a3f m : 0.8545
0x02e2 (0738) f 4da1f33d b : 0.11896
0x02e6 (0742) f 00000000 a : 0
0x02ea (0746) f 00000000 b : 0
0x02ee (0750) f 00000000 c : 0
0x02f2 (0754) B 02 VoltageMode : 2
0x02f3 (0755) B 01 SnapToDiscrete : 1
0x02f4 (0756) B 08 NumDiscreteLevels : 8
0x02f5 (0757) B 00 padding : 0
0x02f6 (0758) f 00000000 m : 0
0x02fa (0762) f 00000000 b : 0
0x02fe (0766) f a4708d3f a : 1.105
0x0302 (0770) f e41485bf b :-1.0397
0x0306 (0774) f d5e7323f c : 0.69885
0x030a (0778) B 02 VoltageMode : 2
0x030b (0779) B 01 SnapToDiscrete : 1
0x030c (0780) B 03 NumDiscreteLevels : 3
0x030d (0781) B 00 padding : 0
0x030e (0782) f 00000000 m : 0
0x0312 (0786) f 00000000 b : 0
0x0316 (0790) f 00000000 a : 0
0x031a (0794) f 00000000 b : 0
0x031e (0798) f d5e7323f c : 0.69885
0x0322 (0802) B 01 VoltageMode : 1
0x0323 (0803) B 01 SnapToDiscrete : 1
0x0324 (0804) B 08 NumDiscreteLevels : 8
0x0325 (0805) B 00 padding : 0
0x0326 (0806) f 0000803f m : 1
0x032a (0810) f 00000000 b : 0
0x032e (0814) f d191fc3e a : 0.4933
0x0332 (0818) f 1f852bbf b :-0.67
0x0336 (0822) f 3277753f c : 0.95885
0x033a (0826) H bc02 FreqTableGfx : 700
0x033c (0828) H 2803 FreqTableGfx : 808
0x033e (0830) H 6e04 FreqTableGfx : 1134
0x0340 (0832) H 5c05 FreqTableGfx : 1372
0x0342 (0834) H 0a06 FreqTableGfx : 1546
0x0344 (0836) H 9306 FreqTableGfx : 1683
0x0346 (0838) H d506 FreqTableGfx : 1749
0x0348 (0840) H ed06 FreqTableGfx : 1773
0x034a (0842) H 0907 FreqTableGfx : 1801
0x034c (0844) H 0000 FreqTableGfx : 0
0x034e (0846) H 0000 FreqTableGfx : 0
0x0350 (0848) H 0000 FreqTableGfx : 0
0x0352 (0850) H 0000 FreqTableGfx : 0
0x0354 (0852) H 0000 FreqTableGfx : 0
0x0356 (0854) H 0000 FreqTableGfx : 0
0x0358 (0856) H 0000 FreqTableGfx : 0
0x035a (0858) H 6601 FreqTableVclk : 358
0x035c (0860) H e601 FreqTableVclk : 486
0x035e (0862) H 6b02 FreqTableVclk : 619
0x0360 (0864) H f402 FreqTableVclk : 756
0x0362 (0866) H 5203 FreqTableVclk : 850
0x0364 (0868) H cc03 FreqTableVclk : 972
0x0366 (0870) H 6e04 FreqTableVclk : 1134
0x0368 (0872) H 6e04 FreqTableVclk : 1134
0x036a (0874) H 3601 FreqTableDclk : 310
0x036c (0876) H 9001 FreqTableDclk : 400
0x036e (0878) H 0c02 FreqTableDclk : 524
0x0370 (0880) H 6b02 FreqTableDclk : 619
0x0372 (0882) H a802 FreqTableDclk : 680
0x0374 (0884) H f402 FreqTableDclk : 756
0x0376 (0886) H 5203 FreqTableDclk : 850
0x0378 (0888) H cc03 FreqTableDclk : 972
0x037a (0890) H 3601 FreqTableEclk : 310
0x037c (0892) H 9001 FreqTableEclk : 400
0x037e (0894) H 0c02 FreqTableEclk : 524
0x0380 (0896) H 6b02 FreqTableEclk : 619
0x0382 (0898) H a802 FreqTableEclk : 680
0x0384 (0900) H f402 FreqTableEclk : 756
0x0386 (0902) H 5203 FreqTableEclk : 850
0x0388 (0904) H cc03 FreqTableEclk : 972
0x038a (0906) H 3601 FreqTableSocclk : 310
0x038c (0908) H 0c02 FreqTableSocclk : 524
0x038e (0910) H 3702 FreqTableSocclk : 567
0x0390 (0912) H 6b02 FreqTableSocclk : 619
0x0392 (0914) H a802 FreqTableSocclk : 680
0x0394 (0916) H f402 FreqTableSocclk : 756
0x0396 (0918) H 5203 FreqTableSocclk : 850
0x0398 (0920) H cc03 FreqTableSocclk : 972
0x039a (0922) H 5e01 FreqTableUclk : 350
0x039c (0924) H 2003 FreqTableUclk : 800
0x039e (0926) H e803 FreqTableUclk : 1000
0x03a0 (0928) H e803 FreqTableUclk : 1000
0x03a2 (0930) H 2602 FreqTableFclk : 550
0x03a4 (0932) H 6202 FreqTableFclk : 610
0x03a6 (0934) H b202 FreqTableFclk : 690
0x03a8 (0936) H f802 FreqTableFclk : 760
0x03aa (0938) H 6603 FreqTableFclk : 870
0x03ac (0940) H c003 FreqTableFclk : 960
0x03ae (0942) H 3804 FreqTableFclk : 1080
0x03b0 (0944) H c904 FreqTableFclk : 1225
0x03b2 (0946) H 6601 FreqTableDcefclk : 358
0x03b4 (0948) H c601 FreqTableDcefclk : 454
0x03b6 (0950) H 3702 FreqTableDcefclk : 567
0x03b8 (0952) H a802 FreqTableDcefclk : 680
0x03ba (0954) H f402 FreqTableDcefclk : 756
0x03bc (0956) H 5203 FreqTableDcefclk : 850
0x03be (0958) H cc03 FreqTableDcefclk : 972
0x03c0 (0960) H 6e04 FreqTableDcefclk : 1134
0x03c2 (0962) H 6601 FreqTableDispclk : 358
0x03c4 (0964) H c601 FreqTableDispclk : 454
0x03c6 (0966) H 3702 FreqTableDispclk : 567
0x03c8 (0968) H a802 FreqTableDispclk : 680
0x03ca (0970) H f402 FreqTableDispclk : 756
0x03cc (0972) H 5203 FreqTableDispclk : 850
0x03ce (0974) H cc03 FreqTableDispclk : 972
0x03d0 (0976) H 6e04 FreqTableDispclk : 1134
0x03d2 (0978) H 9300 FreqTablePixclk : 147
0x03d4 (0980) H f200 FreqTablePixclk : 242
0x03d6 (0982) H 5801 FreqTablePixclk : 344
0x03d8 (0984) H e401 FreqTablePixclk : 484
0x03da (0986) H 1502 FreqTablePixclk : 533
0x03dc (0988) H aa03 FreqTablePixclk : 938
0x03de (0990) H 1304 FreqTablePixclk : 1043
0x03e0 (0992) H 3404 FreqTablePixclk : 1076
0x03e2 (0994) H 0e01 FreqTablePhyclk : 270
0x03e4 (0996) H 1c02 FreqTablePhyclk : 540
0x03e6 (0998) H 2a03 FreqTablePhyclk : 810
0x03e8 (1000) H 0000 FreqTablePhyclk : 0
0x03ea (1002) H 0000 FreqTablePhyclk : 0
0x03ec (1004) H 0000 FreqTablePhyclk : 0
0x03ee (1006) H 0000 FreqTablePhyclk : 0
0x03f0 (1008) H 0000 FreqTablePhyclk : 0
0x03f2 (1010) H 0907 DcModeMaxFreq : 1801
0x03f4 (1012) H 6e04 DcModeMaxFreq : 1134
0x03f6 (1014) H cc03 DcModeMaxFreq : 972
0x03f8 (1016) H cc03 DcModeMaxFreq : 972
0x03fa (1018) H cc03 DcModeMaxFreq : 972
0x03fc (1020) H e803 DcModeMaxFreq : 1000
0x03fe (1022) H 6e04 DcModeMaxFreq : 1134
0x0400 (1024) H 6e04 DcModeMaxFreq : 1134
0x0402 (1026) H 3404 DcModeMaxFreq : 1076
0x0404 (1028) H 2a03 DcModeMaxFreq : 810
0x0406 (1030) H c904 DcModeMaxFreq : 1225
0x0408 (1032) H 0000 Padding8_Clks : 0
0x040a (1034) H c800 Mp0clkFreq : 200
0x040c (1036) H 2c01 Mp0clkFreq : 300
0x040e (1038) H 6009 Mp0DpmVoltage : 2400
0x0410 (1040) H f00a Mp0DpmVoltage : 2800
0x0412 (1042) H 2803 GfxclkFidle : 808
0x0414 (1044) H 0000 GfxclkSlewRate : 0
0x0416 (1046) H 0000 CksEnableFreq : 0
0x0418 (1048) H 0000 Padding789 : 0
0x041a (1050) f 00000000 a : 0
0x041e (1054) f 00000000 b : 0
0x0422 (1058) f 00000000 c : 0
0x0426 (1062) B 00 Padding567 : 0
0x0427 (1063) B 00 Padding567 : 0
0x0428 (1064) B 00 Padding567 : 0
0x0429 (1065) B 00 Padding567 : 0
0x042a (1066) H 0907 GfxclkDsMaxFreq : 1801
0x042c (1068) B 01 GfxclkSource : 1
0x042d (1069) B 00 Padding456 : 0
0x042e (1070) B 00 LowestUclkReservedForUlv : 0
0x042f (1071) B 00 Padding8_Uclk : 0
0x0430 (1072) B 00 Padding8_Uclk : 0
0x0431 (1073) B 00 Padding8_Uclk : 0
0x0432 (1074) B 00 PcieGenSpeed : 0
0x0433 (1075) B 02 PcieGenSpeed : 2
0x0434 (1076) B 06 PcieLaneCount : 6
0x0435 (1077) B 06 PcieLaneCount : 6
0x0436 (1078) H 5000 LclkFreq : 80
0x0438 (1080) H 3401 LclkFreq : 308
0x043a (1082) H 0000 EnableTdpm : 0
0x043c (1084) H 0000 TdpmHighHystTemperature : 0
0x043e (1086) H 0000 TdpmLowHystTemperature : 0
0x0440 (1088) H 0000 GfxclkFreqHighTempLimit : 0
0x0442 (1090) H 0000 FanStopTemp : 0
0x0444 (1092) H 0000 FanStartTemp : 0
0x0446 (1094) H 9001 FanGainEdge : 400
0x0448 (1096) H 9001 FanGainHotspot : 400
0x044a (1098) H 9001 FanGainLiquid : 400
0x044c (1100) H 9001 FanGainVrGfx : 400
0x044e (1102) H 9001 FanGainVrSoc : 400
0x0450 (1104) H 9001 FanGainPlx : 400
0x0452 (1106) H 9001 FanGainHbm : 400
0x0454 (1108) H 1400 FanPwmMin : 20
0x0456 (1110) H 540b FanAcousticLimitRpm : 2900
0x0458 (1112) H 540b FanThrottlingRpm : 2900
0x045a (1114) H 0a0f FanMaximumRpm : 3850
0x045c (1116) H 5f00 FanTargetTemperature : 95
0x045e (1118) H 0000 FanTargetGfxclk : 0
0x0460 (1120) B 00 FanZeroRpmEnable : 0
0x0461 (1121) B 02 FanTachEdgePerRev : 2
0x0462 (1122) h 0000 FuzzyFan_ErrorSetDelta : 0
0x0464 (1124) h 0000 FuzzyFan_ErrorRateSetDelta : 0
0x0466 (1126) h 0000 FuzzyFan_PwmSetDelta : 0
0x0468 (1128) H 0000 FuzzyFan_Reserved : 0
0x046a (1130) B 00 OverrideAvfsGb : 0
0x046b (1131) B 01 OverrideAvfsGb : 1
0x046c (1132) B 00 Padding8_Avfs : 0
0x046d (1133) B 00 Padding8_Avfs : 0
0x046e (1134) f 00000000 a : 0
0x0472 (1138) f 508d973c b : 0.0185
0x0476 (1142) f 0ad7a33b c : 0.005
0x047a (1146) f 00000000 a : 0
0x047e (1150) f eab2983c b : 0.01864
0x0482 (1154) f 87a2403d c : 0.04703
0x0486 (1158) f 00000000 a : 0
0x048a (1162) f 00000000 b : 0
0x048e (1166) f 00000000 c : 0
0x0492 (1170) f 00000000 a : 0
0x0496 (1174) f 00000000 b : 0
0x049a (1178) f 00000000 c : 0
0x049e (1182) f 00000000 a : 0
0x04a2 (1186) f 00000000 b : 0
0x04a6 (1190) f 00000000 c : 0
0x04aa (1194) f 00000000 a : 0
0x04ae (1198) f 00000000 b : 0
0x04b2 (1202) f 00000000 c : 0
0x04b6 (1206) f 00000000 m : 0
0x04ba (1210) f 00000000 b : 0
0x04be (1214) f 00000000 m : 0
0x04c2 (1218) f 00000000 b : 0
0x04c6 (1222) f 00000000 a : 0
0x04ca (1226) f 00000000 b : 0
0x04ce (1230) f 00000000 c : 0
0x04d2 (1234) f 00000000 a : 0
0x04d6 (1238) f 00000000 b : 0
0x04da (1242) f 00000000 c : 0
0x04de (1246) H 0000 DcTol : 0
0x04e0 (1248) H a000 DcTol : 160
0x04e2 (1250) B 01 DcBtcEnabled : 1
0x04e3 (1251) B 00 DcBtcEnabled : 0
0x04e4 (1252) B 00 Padding8_GfxBtc : 0
0x04e5 (1253) B 00 Padding8_GfxBtc : 0
0x04e6 (1254) h 0000 DcBtcMin : 0
0x04e8 (1256) h 0000 DcBtcMin : 0
0x04ea (1258) H a000 DcBtcMax : 160
0x04ec (1260) H 0000 DcBtcMax : 0
0x04ee (1262) B 08 XgmiLinkSpeed : 8
0x04ef (1263) B 10 XgmiLinkSpeed : 16
0x04f0 (1264) B 02 XgmiLinkWidth : 2
0x04f1 (1265) B 10 XgmiLinkWidth : 16
0x04f2 (1266) H 1a04 XgmiFclkFreq : 1050
0x04f4 (1268) H 4c04 XgmiFclkFreq : 1100
0x04f6 (1270) H e803 XgmiUclkFreq : 1000
0x04f8 (1272) H e803 XgmiUclkFreq : 1000
0x04fa (1274) H e803 XgmiSocclkFreq : 1000
0x04fc (1276) H e803 XgmiSocclkFreq : 1000
0x04fe (1278) H 0000 XgmiSocVoltage : 0
0x0500 (1280) H 0000 XgmiSocVoltage : 0
0x0502 (1282) I 00000000 DebugOverrides : 0
0x0506 (1286) f 00000000 a : 0
0x050a (1290) f 00000000 b : 0
0x050e (1294) f 00000000 c : 0
0x0512 (1298) f 00000000 a : 0
0x0516 (1302) f 00000000 b : 0
0x051a (1306) f 00000000 c : 0
0x051e (1310) f 00000000 a : 0
0x0522 (1314) f 00000000 b : 0
0x0526 (1318) f 00000000 c : 0
0x052a (1322) f 00000000 a : 0
0x052e (1326) f 00000000 b : 0
0x0532 (1330) f 00000000 c : 0
0x0536 (1334) H 860b MinVoltageUlvGfx : 2950
0x0538 (1336) H 220b MinVoltageUlvSoc : 2850
0x053a (1338) H 540b MGpuFanBoostLimitRpm : 2900
0x053c (1340) H 0000 Fan : 0
0x053e (1342) H 9001 FanGainVrMem0 : 400
0x0540 (1344) H 9001 FanGainVrMem1 : 400
0x0542 (1346) H 3800 DcBtcGb : 56
0x0544 (1348) H 0000 DcBtcGb : 0
0x0546 (1350) I 00000000 Reserved : 0
0x054a (1354) I 00000000 Reserved : 0
0x054e (1358) I 00000000 Reserved : 0
0x0552 (1362) I 00000000 Reserved : 0
0x0556 (1366) I 00000000 Reserved : 0
0x055a (1370) I 00000000 Reserved : 0
0x055e (1374) I 00000000 Reserved : 0
0x0562 (1378) I 00000000 Reserved : 0
0x0566 (1382) I 00000000 Reserved : 0
0x056a (1386) I 00000000 Reserved : 0
0x056e (1390) I 00000000 Reserved : 0
0x0572 (1394) I 00000000 Padding32 : 0
0x0576 (1398) I 00000000 Padding32 : 0
0x057a (1402) I 00000000 Padding32 : 0
0x057e (1406) H 0000 MaxVoltageStepGfx : 0
0x0580 (1408) H 0000 MaxVoltageStepSoc : 0
0x0582 (1410) B 00 VddGfxVrMapping : 0
0x0583 (1411) B 00 VddSocVrMapping : 0
0x0584 (1412) B 00 VddMem0VrMapping : 0
0x0585 (1413) B 00 VddMem1VrMapping : 0
0x0586 (1414) B 00 GfxUlvPhaseSheddingMask : 0
0x0587 (1415) B 00 SocUlvPhaseSheddingMask : 0
0x0588 (1416) B 00 ExternalSensorPresent : 0
0x0589 (1417) B 00 Padding8_V : 0
0x058a (1418) H 0000 GfxMaxCurrent : 0
0x058c (1420) b 00 GfxOffset : 0
0x058d (1421) B 00 Padding_TelemetryGfx : 0
0x058e (1422) H 0000 SocMaxCurrent : 0
0x0590 (1424) b 00 SocOffset : 0
0x0591 (1425) B 00 Padding_TelemetrySoc : 0
0x0592 (1426) H 0000 Mem0MaxCurrent : 0
0x0594 (1428) b 00 Mem0Offset : 0
0x0595 (1429) B 00 Padding_TelemetryMem0 : 0
0x0596 (1430) H 0000 Mem1MaxCurrent : 0
0x0598 (1432) b 00 Mem1Offset : 0
0x0599 (1433) B 00 Padding_TelemetryMem1 : 0
0x059a (1434) B 00 AcDcGpio : 0
0x059b (1435) B 00 AcDcPolarity : 0
0x059c (1436) B 00 VR0HotGpio : 0
0x059d (1437) B 00 VR0HotPolarity : 0
0x059e (1438) B 00 VR1HotGpio : 0
0x059f (1439) B 00 VR1HotPolarity : 0
0x05a0 (1440) B 00 Padding1 : 0
0x05a1 (1441) B 00 Padding2 : 0
0x05a2 (1442) B 00 LedPin0 : 0
0x05a3 (1443) B 00 LedPin1 : 0
0x05a4 (1444) B 00 LedPin2 : 0
0x05a5 (1445) B 00 padding8_4 : 0
0x05a6 (1446) B 00 PllGfxclkSpreadEnabled : 0
0x05a7 (1447) B 00 PllGfxclkSpreadPercent : 0
0x05a8 (1448) H 0000 PllGfxclkSpreadFreq : 0
0x05aa (1450) B 00 UclkSpreadEnabled : 0
0x05ab (1451) B 00 UclkSpreadPercent : 0
0x05ac (1452) H 0000 UclkSpreadFreq : 0
0x05ae (1454) B 00 FclkSpreadEnabled : 0
0x05af (1455) B 00 FclkSpreadPercent : 0
0x05b0 (1456) H 0000 FclkSpreadFreq : 0
0x05b2 (1458) B 00 FllGfxclkSpreadEnabled : 0
0x05b3 (1459) B 00 FllGfxclkSpreadPercent : 0
0x05b4 (1460) H 0000 FllGfxclkSpreadFreq : 0
0x05b6 (1462) I 00000000 Enabled : 0
0x05ba (1466) I 00000000 SlaveAddress : 0
0x05be (1470) I 00000000 ControllerPort : 0
0x05c2 (1474) I 00000000 ControllerName : 0
0x05c6 (1478) I 00000000 ThermalThrottler : 0
0x05ca (1482) I 00000000 I2cProtocol : 0
0x05ce (1486) I 00000000 I2cSpeed : 0
0x05d2 (1490) I 00000000 Enabled : 0
0x05d6 (1494) I 00000000 SlaveAddress : 0
0x05da (1498) I 00000000 ControllerPort : 0
0x05de (1502) I 00000000 ControllerName : 0
0x05e2 (1506) I 00000000 ThermalThrottler : 0
0x05e6 (1510) I 00000000 I2cProtocol : 0
0x05ea (1514) I 00000000 I2cSpeed : 0
0x05ee (1518) I 00000000 Enabled : 0
0x05f2 (1522) I 00000000 SlaveAddress : 0
0x05f6 (1526) I 00000000 ControllerPort : 0
0x05fa (1530) I 00000000 ControllerName : 0
0x05fe (1534) I 00000000 ThermalThrottler : 0
0x0602 (1538) I 00000000 I2cProtocol : 0
0x0606 (1542) I 00000000 I2cSpeed : 0
0x060a (1546) I 00000000 Enabled : 0
0x060e (1550) I 00000000 SlaveAddress : 0
0x0612 (1554) I 00000000 ControllerPort : 0
0x0616 (1558) I 00000000 ControllerName : 0
0x061a (1562) I 00000000 ThermalThrottler : 0
0x061e (1566) I 00000000 I2cProtocol : 0
0x0622 (1570) I 00000000 I2cSpeed : 0
0x0626 (1574) I 00000000 Enabled : 0
0x062a (1578) I 00000000 SlaveAddress : 0
0x062e (1582) I 00000000 ControllerPort : 0
0x0632 (1586) I 00000000 ControllerName : 0
0x0636 (1590) I 00000000 ThermalThrottler : 0
0x063a (1594) I 00000000 I2cProtocol : 0
0x063e (1598) I 00000000 I2cSpeed : 0
0x0642 (1602) I 00000000 Enabled : 0
0x0646 (1606) I 00000000 SlaveAddress : 0
0x064a (1610) I 00000000 ControllerPort : 0
0x064e (1614) I 00000000 ControllerName : 0
0x0652 (1618) I 00000000 ThermalThrottler : 0
0x0656 (1622) I 00000000 I2cProtocol : 0
0x065a (1626) I 00000000 I2cSpeed : 0
0x065e (1630) I 00000000 Enabled : 0
0x0662 (1634) I 00000000 SlaveAddress : 0
0x0666 (1638) I 00000000 ControllerPort : 0
0x066a (1642) I 00000000 ControllerName : 0
0x066e (1646) I 00000000 ThermalThrottler : 0
0x0672 (1650) I 00000000 I2cProtocol : 0
0x0676 (1654) I 00000000 I2cSpeed : 0
0x067a (1658) I 00000000 BoardReserved : 0
0x067e (1662) I 00000000 BoardReserved : 0
0x0682 (1666) I 00000000 BoardReserved : 0
0x0686 (1670) I 00000000 BoardReserved : 0
0x068a (1674) I 00000000 BoardReserved : 0
0x068e (1678) I 00000000 BoardReserved : 0
0x0692 (1682) I 00000000 BoardReserved : 0
0x0696 (1686) I 00000000 BoardReserved : 0
0x069a (1690) I 00000000 BoardReserved : 0
0x069e (1694) I 00000000 BoardReserved : 0
0x06a2 (1698) I 00000000 MmHubPadding : 0
0x06a6 (1702) I 00000000 MmHubPadding : 0
0x06aa (1706) I 00000000 MmHubPadding : 0
0x06ae (1710) I 00000000 MmHubPadding : 0
0x06b2 (1714) I 00000000 MmHubPadding : 0
0x06b6 (1718) I 00000000 MmHubPadding : 0
0x06ba (1722) I 00000000 MmHubPadding : 0
0x06be (1726) I 00000000 MmHubPadding : 0
================================================
FILE: test/MI100_000.000.000.000.016113_113-D3431401-100.rom.dump
================================================
header:
structuresize: 1494
format_revision: 13
content_revision: 0
table_revision: 1
table_size: 482
golden_pp_id: 2462
golden_revision: 16007
format_id: 126
platform_caps: 8
thermal_controller_type: 28
small_power_limit1: 290
small_power_limit2: 290
boost_power_limit: 290
od_turbo_power_limit: 0
od_power_save_power_limit: 0
software_shutdown_temp: 108
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
reserve 3: 0
reserve 4: 0
reserve 5: 0
power_saving_clock:
revision: 1
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
count: 10
max:
max 0: 0
max 1: 0
max 2: 0
max 3: 0
max 4: 0
max 5: 0
max 6: 0
max 7: 0
max 8: 0
max 9: 0
max 10: 0
max 11: 0
max 12: 0
max 13: 0
max 14: 0
max 15: 0
min:
min 0: 0
min 1: 0
min 2: 0
min 3: 0
min 4: 0
min 5: 0
min 6: 0
min 7: 0
min 8: 0
min 9: 0
min 10: 0
min 11: 0
min 12: 0
min 13: 0
min 14: 0
min 15: 0
overdrive_table:
revision: 128
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
feature_count: 14
setting_count: 19
cap:
cap 0: 0
cap 1: 0
cap 2: 0
cap 3: 0
cap 4: 0
cap 5: 0
cap 6: 0
cap 7: 0
cap 8: 0
cap 9: 0
cap 10: 0
cap 11: 0
cap 12: 0
cap 13: 0
cap 14: 0
cap 15: 0
cap 16: 0
cap 17: 0
cap 18: 0
cap 19: 0
cap 20: 0
cap 21: 0
cap 22: 0
cap 23: 0
cap 24: 0
cap 25: 0
cap 26: 0
cap 27: 0
cap 28: 0
cap 29: 0
cap 30: 0
cap 31: 0
max:
max 0: 0
max 1: 0
max 2: 0
max 3: 0
max 4: 0
max 5: 0
max 6: 0
max 7: 0
max 8: 0
max 9: 0
max 10: 0
max 11: 0
max 12: 0
max 13: 0
max 14: 0
max 15: 0
max 16: 0
max 17: 0
max 18: 0
max 19: 0
max 20: 0
max 21: 0
max 22: 0
max 23: 0
max 24: 0
max 25: 0
max 26: 0
max 27: 0
max 28: 0
max 29: 0
max 30: 0
max 31: 0
min:
min 0: 0
min 1: 0
min 2: 0
min 3: 0
min 4: 0
min 5: 0
min 6: 0
min 7: 0
min 8: 0
min 9: 0
min 10: 0
min 11: 0
min 12: 0
min 13: 0
min 14: 0
min 15: 0
min 16: 0
min 17: 0
min 18: 0
min 19: 0
min 20: 0
min 21: 0
min 22: 0
min 23: 0
min 24: 0
min 25: 0
min 26: 0
min 27: 0
min 28: 0
min 29: 0
min 30: 0
min 31: 0
smc_pptable:
Version: 4
FeaturesToRun:
FeaturesToRun 0: 95155971
FeaturesToRun 1: 0
SocketPowerLimitAc:
SocketPowerLimitAc 0: 290
SocketPowerLimitAc 1: 391
SocketPowerLimitAc 2: 0
SocketPowerLimitAc 3: 0
SocketPowerLimitAcTau:
SocketPowerLimitAcTau 0: 5
SocketPowerLimitAcTau 1: 1
SocketPowerLimitAcTau 2: 0
SocketPowerLimitAcTau 3: 0
TdcLimitSoc: 50
TdcLimitSocTau: 0
TdcLimitGfx: 320
TdcLimitGfxTau: 0
TedgeLimit: 100
ThotspotLimit: 100
TmemLimit: 94
Tvr_gfxLimit: 103
Tvr_memLimit: 103
Tvr_socLimit: 103
FitLimit: 0
PpmPowerLimit: 0
PpmTemperatureThreshold: 0
ThrottlerControlMask: 2044
UlvVoltageOffsetGfx: 0
UlvPadding: 0
UlvGfxclkBypass: 0
Padding234:
Padding234 0: 0
Padding234 1: 0
Padding234 2: 0
MinVoltageGfx: 2700
MinVoltageSoc: 3500
MaxVoltageGfx: 4150
MaxVoltageSoc: 4200
LoadLineResistanceGfx: 25
LoadLineResistanceSoc: 0
DpmDescriptor:
DpmDescriptor 0:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 16
padding: 0
ConversionToAvfsClk:
m: 0
b: 0
SsCurve:
a: 0.17702
b: 0.0013
c: 0.60972
SsFmin: 300
Padding16: 0
DpmDescriptor 1:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 0.7374
b: 0.2015
SsCurve:
a: 0.2395
b:-0.198
c: 0.7078
SsFmin: 413
Padding16: 0
DpmDescriptor 2:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1.114
b: 0.03267
SsCurve:
a: 0.4971
b:-0.419
c: 0.7549
SsFmin: 421
Padding16: 0
DpmDescriptor 3:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1.075
b: 0.0286
SsCurve:
a: 0.4573
b:-0.432
c: 0.8233
SsFmin: 472
Padding16: 0
DpmDescriptor 4:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 4
padding: 0
ConversionToAvfsClk:
m: 1.2161
b:-0.05914
SsCurve:
a: 0.5357
b:-0.549
c: 0.8838
SsFmin: 512
Padding16: 0
DpmDescriptor 5:
VoltageMode: 1
SnapToDiscrete: 1
NumDiscreteLevels: 8
padding: 0
ConversionToAvfsClk:
m: 1
b: 0
SsCurve:
a: 0.4561
b:-0.576
c: 0.9238
SsFmin: 631
Padding16: 0
FreqTableGfx:
FreqTableGfx 0: 300
FreqTableGfx 1: 495
FreqTableGfx 2: 731
FreqTableGfx 3: 962
FreqTableGfx 4: 1029
FreqTableGfx 5: 1086
FreqTableGfx 6: 1146
FreqTableGfx 7: 1188
FreqTableGfx 8: 1235
FreqTableGfx 9: 1283
FreqTableGfx 10: 1318
FreqTableGfx 11: 1363
FreqTableGfx 12: 1404
FreqTableGfx 13: 1430
FreqTableGfx 14: 1471
FreqTableGfx 15: 1502
FreqTableVclk:
FreqTableVclk 0: 600
FreqTableVclk 1: 706
FreqTableVclk 2: 800
FreqTableVclk 3: 858
FreqTableVclk 4: 924
FreqTableVclk 5: 1091
FreqTableVclk 6: 1200
FreqTableVclk 7: 1334
FreqTableDclk:
FreqTableDclk 0: 546
FreqTableDclk 1: 600
FreqTableDclk 2: 706
FreqTableDclk 3: 750
FreqTableDclk 4: 800
FreqTableDclk 5: 924
FreqTableDclk 6: 1000
FreqTableDclk 7: 1091
FreqTableSocclk:
FreqTableSocclk 0: 600
FreqTableSocclk 1: 667
FreqTableSocclk 2: 706
FreqTableSocclk 3: 750
FreqTableSocclk 4: 800
FreqTableSocclk 5: 858
FreqTableSocclk 6: 924
FreqTableSocclk 7: 1000
FreqTableUclk:
FreqTableUclk 0: 600
FreqTableUclk 1: 800
FreqTableUclk 2: 1000
FreqTableUclk 3: 1200
FreqTableFclk:
FreqTableFclk 0: 650
FreqTableFclk 1: 848
FreqTableFclk 2: 955
FreqTableFclk 3: 1060
FreqTableFclk 4: 1179
FreqTableFclk 5: 1236
FreqTableFclk 6: 1291
FreqTableFclk 7: 1403
Paddingclks:
Paddingclks 0: 0
Paddingclks 1: 0
Paddingclks 2: 0
Paddingclks 3: 0
Paddingclks 4: 0
Paddingclks 5: 0
Paddingclks 6: 0
Paddingclks 7: 0
Paddingclks 8: 0
Paddingclks 9: 0
Paddingclks 10: 0
Paddingclks 11: 0
Paddingclks 12: 0
Paddingclks 13: 0
Paddingclks 14: 0
Paddingclks 15: 0
Mp0clkFreq:
Mp0clkFreq 0: 300
Mp0clkFreq 1: 500
Mp0DpmVoltage:
Mp0DpmVoltage 0: 2850
Mp0DpmVoltage 1: 2850
GfxclkFidle: 300
GfxclkSlewRate: 0
Padding567:
Padding567 0: 0
Padding567 1: 0
Padding567 2: 0
Padding567 3: 0
GfxclkDsMaxFreq: 1502
GfxclkSource: 1
Padding456: 0
EnableTdpm: 0
TdpmHighHystTemperature: 0
TdpmLowHystTemperature: 0
GfxclkFreqHighTempLimit: 0
FanStopTemp: 0
FanStartTemp: 0
FanGainEdge: 0
FanGainHotspot: 400
FanGainVrGfx: 400
FanGainVrSoc: 400
FanGainVrMem: 400
FanGainHbm: 400
FanPwmMin: 20
FanAcousticLimitRpm: 2900
FanThrottlingRpm: 2900
FanMaximumRpm: 3850
FanTargetTemperature: 90
FanTargetGfxclk: 300
FanZeroRpmEnable: 0
FanTachEdgePerRev: 2
FanTempInputSelect: 1
padding8_Fan: 0
FuzzyFan_ErrorSetDelta: 0
FuzzyFan_ErrorRateSetDelta: 0
FuzzyFan_PwmSetDelta: 0
FuzzyFan_Reserved: 0
OverrideAvfsGb:
OverrideAvfsGb 0: 1
OverrideAvfsGb 1: 1
Padding8_Avfs:
Padding8_Avfs 0: 0
Padding8_Avfs 1: 0
qAvfsGb:
qAvfsGb 0:
a: 0.03647
b:-0.03839
c: 0.03198
qAvfsGb 1:
a: 0
b: 0
c: 0.04
dBtcGbGfxPll:
a: 0
b: 0
c: 0
dBtcGbGfxAfll:
a:-0.0336
b: 0.0957
c:-0.06153
dBtcGbSoc:
a: 0.16426
b: 0.03781
c:-0.07586
qAgingGb:
qAgingGb 0:
m: 0
b: 0
qAgingGb 1:
m: 0
b: 0
qStaticVoltageOffset:
qStaticVoltageOffset 0:
a: 0
b: 0
c: 0
qStaticVoltageOffset 1:
a: 0
b: 0
c: 0
DcTol:
DcTol 0: 308
DcTol 1: 308
DcBtcEnabled:
DcBtcEnabled 0: 1
DcBtcEnabled 1: 1
Padding8_GfxBtc:
Padding8_GfxBtc 0: 0
Padding8_GfxBtc 1: 0
DcBtcMin:
DcBtcMin 0: 95
DcBtcMin 1: 95
DcBtcMax:
DcBtcMax 0: 308
DcBtcMax 1: 308
DcBtcGb:
DcBtcGb 0: 25
DcBtcGb 1: 25
XgmiDpmPstates:
XgmiDpmPstates 0: 3
XgmiDpmPstates 1: 0
XgmiDpmSpare:
XgmiDpmSpare 0: 0
XgmiDpmSpare 1: 0
VDDGFX_TVmin: 0
VDDSOC_TVmin: 0
VDDGFX_Vmin_HiTemp: 0
VDDGFX_Vmin_LoTemp: 0
VDDSOC_Vmin_HiTemp: 0
VDDSOC_Vmin_LoTemp: 0
VDDGFX_TVminHystersis: 0
VDDSOC_TVminHystersis: 0
DebugOverrides: 0
ReservedEquation0:
a: 0
b: 0
c: 0
ReservedEquation1:
a: 0
b: 0
c: 0
ReservedEquation2:
a: 0
b: 0
c: 0
ReservedEquation3:
a: 0
b: 0
c: 0
MinVoltageUlvGfx: 2700
PaddingUlv: 0
TotalPowerConfig: 3
TotalPowerSpare1: 0
TotalPowerSpare2: 0
PccThresholdLow: 0
PccThresholdHigh: 0
PaddingAPCC:
PaddingAPCC 0: 0
PaddingAPCC 1: 0
PaddingAPCC 2: 0
PaddingAPCC 3: 0
PaddingAPCC 4: 0
PaddingAPCC 5: 0
BasePerformanceCardPower: 300
MaxPerformanceCardPower: 300
BasePerformanceFrequencyCap: 0
MaxPerformanceFrequencyCap: 0
VDDGFX_VminLow: 2550
VDDGFX_TVminLow: 0
VDDGFX_VminLow_HiTemp: 0
VDDGFX_VminLow_LoTemp: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
Reserved 3: 0
Reserved 4: 0
Reserved 5: 0
Reserved 6: 0
MaxVoltageStepGfx: 0
MaxVoltageStepSoc: 0
VddGfxVrMapping: 0
VddSocVrMapping: 0
VddMemVrMapping: 0
BoardVrMapping: 0
GfxUlvPhaseSheddingMask: 0
ExternalSensorPresent: 0
Padding8_V:
Padding8_V 0: 0
Padding8_V 1: 0
GfxMaxCurrent: 0
GfxOffset: 0
Padding_TelemetryGfx: 0
SocMaxCurrent: 0
SocOffset: 0
Padding_TelemetrySoc: 0
MemMaxCurrent: 0
MemOffset: 0
Padding_TelemetryMem: 0
BoardMaxCurrent: 0
BoardOffset: 0
Padding_TelemetryBoardInput: 0
VR0HotGpio: 0
VR0HotPolarity: 0
VR1HotGpio: 0
VR1HotPolarity: 0
PllGfxclkSpreadEnabled: 0
PllGfxclkSpreadPercent: 0
PllGfxclkSpreadFreq: 0
UclkSpreadEnabled: 0
UclkSpreadPercent: 0
UclkSpreadFreq: 0
FclkSpreadEnabled: 0
FclkSpreadPercent: 0
FclkSpreadFreq: 0
FllGfxclkSpreadEnabled: 0
FllGfxclkSpreadPercent: 0
FllGfxclkSpreadFreq: 0
I2cControllers:
I2cControllers 0:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 1:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 2:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 3:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 4:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 5:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 6:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
I2cControllers 7:
Enabled: 0
Speed: 0
Padding:
Padding 0: 0
Padding 1: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
MemoryChannelEnabled: 0
DramBitWidth: 0
PaddingMem:
PaddingMem 0: 0
PaddingMem 1: 0
PaddingMem 2: 0
TotalBoardPower: 0
BoardPadding: 0
XgmiLinkSpeed:
XgmiLinkSpeed 0: 0
XgmiLinkSpeed 1: 0
XgmiLinkSpeed 2: 0
XgmiLinkSpeed 3: 0
XgmiLinkWidth:
XgmiLinkWidth 0: 0
XgmiLinkWidth 1: 0
XgmiLinkWidth 2: 0
XgmiLinkWidth 3: 0
XgmiFclkFreq:
XgmiFclkFreq 0: 0
XgmiFclkFreq 1: 0
XgmiFclkFreq 2: 0
XgmiFclkFreq 3: 0
XgmiSocVoltage:
XgmiSocVoltage 0: 0
XgmiSocVoltage 1: 0
XgmiSocVoltage 2: 0
XgmiSocVoltage 3: 0
GpioI2cScl: 0
GpioI2cSda: 0
GpioPadding: 0
BoardVoltageCoeffA: 0
BoardVoltageCoeffB: 0
BoardReserved:
BoardReserved 0: 0
BoardReserved 1: 0
BoardReserved 2: 0
BoardReserved 3: 0
BoardReserved 4: 0
BoardReserved 5: 0
BoardReserved 6: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
================================================
FILE: test/MI100_000.000.000.000.016113_113-D3431401-100.rom.rawdump
================================================
PowerPlay table rev 13.0 size 1494 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H d605 structuresize : 1494
0x0002 (0002) B 0d format_revision : 13
0x0003 (0003) B 00 content_revision : 0
0x0004 (0004) B 01 table_revision : 1
0x0005 (0005) H e201 table_size : 482
0x0007 (0007) I 9e090000 golden_pp_id : 2462
0x000b (0011) I 873e0000 golden_revision : 16007
0x000f (0015) H 7e00 format_id : 126
0x0011 (0017) I 08000000 platform_caps : 8
0x0015 (0021) B 1c thermal_controller_type : 28
0x0016 (0022) H 2201 small_power_limit1 : 290
0x0018 (0024) H 2201 small_power_limit2 : 290
0x001a (0026) H 2201 boost_power_limit : 290
0x001c (0028) H 0000 od_turbo_power_limit : 0
0x001e (0030) H 0000 od_power_save_power_limit : 0
0x0020 (0032) H 6c00 software_shutdown_temp : 108
0x0022 (0034) H 0000 reserve : 0
0x0024 (0036) H 0000 reserve : 0
0x0026 (0038) H 0000 reserve : 0
0x0028 (0040) H 0000 reserve : 0
0x002a (0042) H 0000 reserve : 0
0x002c (0044) H 0000 reserve : 0
0x002e (0046) B 01 revision : 1
0x002f (0047) B 00 reserve : 0
0x0030 (0048) B 00 reserve : 0
0x0031 (0049) B 00 reserve : 0
0x0032 (0050) I 0a000000 count : 10
0x0036 (0054) I 00000000 max : 0
0x003a (0058) I 00000000 max : 0
0x003e (0062) I 00000000 max : 0
0x0042 (0066) I 00000000 max : 0
0x0046 (0070) I 00000000 max : 0
0x004a (0074) I 00000000 max : 0
0x004e (0078) I 00000000 max : 0
0x0052 (0082) I 00000000 max : 0
0x0056 (0086) I 00000000 max : 0
0x005a (0090) I 00000000 max : 0
0x005e (0094) I 00000000 max : 0
0x0062 (0098) I 00000000 max : 0
0x0066 (0102) I 00000000 max : 0
0x006a (0106) I 00000000 max : 0
0x006e (0110) I 00000000 max : 0
0x0072 (0114) I 00000000 max : 0
0x0076 (0118) I 00000000 min : 0
0x007a (0122) I 00000000 min : 0
0x007e (0126) I 00000000 min : 0
0x0082 (0130) I 00000000 min : 0
0x0086 (0134) I 00000000 min : 0
0x008a (0138) I 00000000 min : 0
0x008e (0142) I 00000000 min : 0
0x0092 (0146) I 00000000 min : 0
0x0096 (0150) I 00000000 min : 0
0x009a (0154) I 00000000 min : 0
0x009e (0158) I 00000000 min : 0
0x00a2 (0162) I 00000000 min : 0
0x00a6 (0166) I 00000000 min : 0
0x00aa (0170) I 00000000 min : 0
0x00ae (0174) I 00000000 min : 0
0x00b2 (0178) I 00000000 min : 0
0x00b6 (0182) B 80 revision : 128
0x00b7 (0183) B 00 reserve : 0
0x00b8 (0184) B 00 reserve : 0
0x00b9 (0185) B 00 reserve : 0
0x00ba (0186) I 0e000000 feature_count : 14
0x00be (0190) I 13000000 setting_count : 19
0x00c2 (0194) B 00 cap : 0
0x00c3 (0195) B 00 cap : 0
0x00c4 (0196) B 00 cap : 0
0x00c5 (0197) B 00 cap : 0
0x00c6 (0198) B 00 cap : 0
0x00c7 (0199) B 00 cap : 0
0x00c8 (0200) B 00 cap : 0
0x00c9 (0201) B 00 cap : 0
0x00ca (0202) B 00 cap : 0
0x00cb (0203) B 00 cap : 0
0x00cc (0204) B 00 cap : 0
0x00cd (0205) B 00 cap : 0
0x00ce (0206) B 00 cap : 0
0x00cf (0207) B 00 cap : 0
0x00d0 (0208) B 00 cap : 0
0x00d1 (0209) B 00 cap : 0
0x00d2 (0210) B 00 cap : 0
0x00d3 (0211) B 00 cap : 0
0x00d4 (0212) B 00 cap : 0
0x00d5 (0213) B 00 cap : 0
0x00d6 (0214) B 00 cap : 0
0x00d7 (0215) B 00 cap : 0
0x00d8 (0216) B 00 cap : 0
0x00d9 (0217) B 00 cap : 0
0x00da (0218) B 00 cap : 0
0x00db (0219) B 00 cap : 0
0x00dc (0220) B 00 cap : 0
0x00dd (0221) B 00 cap : 0
0x00de (0222) B 00 cap : 0
0x00df (0223) B 00 cap : 0
0x00e0 (0224) B 00 cap : 0
0x00e1 (0225) B 00 cap : 0
0x00e2 (0226) I 00000000 max : 0
0x00e6 (0230) I 00000000 max : 0
0x00ea (0234) I 00000000 max : 0
0x00ee (0238) I 00000000 max : 0
0x00f2 (0242) I 00000000 max : 0
0x00f6 (0246) I 00000000 max : 0
0x00fa (0250) I 00000000 max : 0
0x00fe (0254) I 00000000 max : 0
0x0102 (0258) I 00000000 max : 0
0x0106 (0262) I 00000000 max : 0
0x010a (0266) I 00000000 max : 0
0x010e (0270) I 00000000 max : 0
0x0112 (0274) I 00000000 max : 0
0x0116 (0278) I 00000000 max : 0
0x011a (0282) I 00000000 max : 0
0x011e (0286) I 00000000 max : 0
0x0122 (0290) I 00000000 max : 0
0x0126 (0294) I 00000000 max : 0
0x012a (0298) I 00000000 max : 0
0x012e (0302) I 00000000 max : 0
0x0132 (0306) I 00000000 max : 0
0x0136 (0310) I 00000000 max : 0
0x013a (0314) I 00000000 max : 0
0x013e (0318) I 00000000 max : 0
0x0142 (0322) I 00000000 max : 0
0x0146 (0326) I 00000000 max : 0
0x014a (0330) I 00000000 max : 0
0x014e (0334) I 00000000 max : 0
0x0152 (0338) I 00000000 max : 0
0x0156 (0342) I 00000000 max : 0
0x015a (0346) I 00000000 max : 0
0x015e (0350) I 00000000 max : 0
0x0162 (0354) I 00000000 min : 0
0x0166 (0358) I 00000000 min : 0
0x016a (0362) I 00000000 min : 0
0x016e (0366) I 00000000 min : 0
0x0172 (0370) I 00000000 min : 0
0x0176 (0374) I 00000000 min : 0
0x017a (0378) I 00000000 min : 0
0x017e (0382) I 00000000 min : 0
0x0182 (0386) I 00000000 min : 0
0x0186 (0390) I 00000000 min : 0
0x018a (0394) I 00000000 min : 0
0x018e (0398) I 00000000 min : 0
0x0192 (0402) I 00000000 min : 0
0x0196 (0406) I 00000000 min : 0
0x019a (0410) I 00000000 min : 0
0x019e (0414) I 00000000 min : 0
0x01a2 (0418) I 00000000 min : 0
0x01a6 (0422) I 00000000 min : 0
0x01aa (0426) I 00000000 min : 0
0x01ae (0430) I 00000000 min : 0
0x01b2 (0434) I 00000000 min : 0
0x01b6 (0438) I 00000000 min : 0
0x01ba (0442) I 00000000 min : 0
0x01be (0446) I 00000000 min : 0
0x01c2 (0450) I 00000000 min : 0
0x01c6 (0454) I 00000000 min : 0
0x01ca (0458) I 00000000 min : 0
0x01ce (0462) I 00000000 min : 0
0x01d2 (0466) I 00000000 min : 0
0x01d6 (0470) I 00000000 min : 0
0x01da (0474) I 00000000 min : 0
0x01de (0478) I 00000000 min : 0
0x01e2 (0482) I 04000000 Version : 4
0x01e6 (0486) I 03f7ab05 FeaturesToRun : 95155971
0x01ea (0490) I 00000000 FeaturesToRun : 0
0x01ee (0494) H 2201 SocketPowerLimitAc : 290
0x01f0 (0496) H 8701 SocketPowerLimitAc : 391
0x01f2 (0498) H 0000 SocketPowerLimitAc : 0
0x01f4 (0500) H 0000 SocketPowerLimitAc : 0
0x01f6 (0502) H 0500 SocketPowerLimitAcTau : 5
0x01f8 (0504) H 0100 SocketPowerLimitAcTau : 1
0x01fa (0506) H 0000 SocketPowerLimitAcTau : 0
0x01fc (0508) H 0000 SocketPowerLimitAcTau : 0
0x01fe (0510) H 3200 TdcLimitSoc : 50
0x0200 (0512) H 0000 TdcLimitSocTau : 0
0x0202 (0514) H 4001 TdcLimitGfx : 320
0x0204 (0516) H 0000 TdcLimitGfxTau : 0
0x0206 (0518) H 6400 TedgeLimit : 100
0x0208 (0520) H 6400 ThotspotLimit : 100
0x020a (0522) H 5e00 TmemLimit : 94
0x020c (0524) H 6700 Tvr_gfxLimit : 103
0x020e (0526) H 6700 Tvr_memLimit : 103
0x0210 (0528) H 6700 Tvr_socLimit : 103
0x0212 (0530) I 00000000 FitLimit : 0
0x0216 (0534) H 0000 PpmPowerLimit : 0
0x0218 (0536) H 0000 PpmTemperatureThreshold : 0
0x021a (0538) I fc070000 ThrottlerControlMask : 2044
0x021e (0542) H 0000 UlvVoltageOffsetGfx : 0
0x0220 (0544) H 0000 UlvPadding : 0
0x0222 (0546) B 00 UlvGfxclkBypass : 0
0x0223 (0547) B 00 Padding234 : 0
0x0224 (0548) B 00 Padding234 : 0
0x0225 (0549) B 00 Padding234 : 0
0x0226 (0550) H 8c0a MinVoltageGfx : 2700
0x0228 (0552) H ac0d MinVoltageSoc : 3500
0x022a (0554) H 3610 MaxVoltageGfx : 4150
0x022c (0556) H 6810 MaxVoltageSoc : 4200
0x022e (0558) H 1900 LoadLineResistanceGfx : 25
0x0230 (0560) H 0000 LoadLineResistanceSoc : 0
0x0232 (0562) B 01 VoltageMode : 1
0x0233 (0563) B 01 SnapToDiscrete : 1
0x0234 (0564) B 10 NumDiscreteLevels : 16
0x0235 (0565) B 00 padding : 0
0x0236 (0566) f 00000000 m : 0
0x023a (0570) f 00000000 b : 0
0x023e (0574) f bb44353e a : 0.17702
0x0242 (0578) f c364aa3a b : 0.0013
0x0246 (0582) f 9c161c3f c : 0.60972
0x024a (0586) H 2c01 SsFmin : 300
0x024c (0588) H 0000 Padding16 : 0
0x024e (0590) B 01 VoltageMode : 1
0x024f (0591) B 01 SnapToDiscrete : 1
0x0250 (0592) B 08 NumDiscreteLevels : 8
0x0251 (0593) B 00 padding : 0
0x0252 (0594) f 3fc63c3f m : 0.7374
0x0256 (0598) f 04564e3e b : 0.2015
0x025a (0602) f 7d3f753e a : 0.2395
0x025e (0606) f 83c04abe b :-0.198
0x0262 (0610) f 6132353f c : 0.7078
0x0266 (0614) H 9d01 SsFmin : 413
0x0268 (0616) H 0000 Padding16 : 0
0x026a (0618) B 01 VoltageMode : 1
0x026b (0619) B 01 SnapToDiscrete : 1
0x026c (0620) B 08 NumDiscreteLevels : 8
0x026d (0621) B 00 padding : 0
0x026e (0622) f 8d978e3f m : 1.114
0x0272 (0626) f fad0053d b : 0.03267
0x0276 (0630) f e483fe3e a : 0.4971
0x027a (0634) f 2b87d6be b :-0.419
0x027e (0638) f 2041413f c : 0.7549
0x0282 (0642) H a501 SsFmin : 421
0x0284 (0644) H 0000 Padding16 : 0
0x0286 (0646) B 01 VoltageMode : 1
0x0287 (0647) B 01 SnapToDiscrete : 1
0x0288 (0648) B 08 NumDiscreteLevels : 8
0x0289 (0649) B 00 padding : 0
0x028a (0650) f 9a99893f m : 1.075
0x028e (0654) f 8c4aea3c b : 0.0286
0x0292 (0658) f 3a23ea3e a : 0.4573
0x0296 (0662) f 1b2fddbe b :-0.432
0x029a (0666) f cac3523f c : 0.8233
0x029e (0670) H d801 SsFmin : 472
0x02a0 (0672) H 0000 Padding16 : 0
0x02a2 (0674) B 01 VoltageMode : 1
0x02a3 (0675) B 01 SnapToDiscrete : 1
0x02a4 (0676) B 04 NumDiscreteLevels : 4
0x02a5 (0677) B 00 padding : 0
0x02a6 (0678) f 2aa99b3f m : 1.2161
0x02aa (0682) f c93c72bd b :-0.05914
0x02ae (0686) f a323093f a : 0.5357
0x02b2 (0690) f 448b0cbf b :-0.549
0x02b6 (0694) f b840623f c : 0.8838
0x02ba (0698) H 0002 SsFmin : 512
0x02bc (0700) H 0000 Padding16 : 0
0x02be (0702) B 01 VoltageMode : 1
0x02bf (0703) B 01 SnapToDiscrete : 1
0x02c0 (0704) B 08 NumDiscreteLevels : 8
0x02c1 (0705) B 00 padding : 0
0x02c2 (0706) f 0000803f m : 1
0x02c6 (0710) f 00000000 b : 0
0x02ca (0714) f f085e93e a : 0.4561
0x02ce (0718) f bc7413bf b :-0.576
0x02d2 (0722) f 287e6c3f c : 0.9238
0x02d6 (0726) H 7702 SsFmin : 631
0x02d8 (0728) H 0000 Padding16 : 0
0x02da (0730) H 2c01 FreqTableGfx : 300
0x02dc (0732) H ef01 FreqTableGfx : 495
0x02de (0734) H db02 FreqTableGfx : 731
0x02e0 (0736) H c203 FreqTableGfx : 962
0x02e2 (0738) H 0504 FreqTableGfx : 1029
0x02e4 (0740) H 3e04 FreqTableGfx : 1086
0x02e6 (0742) H 7a04 FreqTableGfx : 1146
0x02e8 (0744) H a404 FreqTableGfx : 1188
0x02ea (0746) H d304 FreqTableGfx : 1235
0x02ec (0748) H 0305 FreqTableGfx : 1283
0x02ee (0750) H 2605 FreqTableGfx : 1318
0x02f0 (0752) H 5305 FreqTableGfx : 1363
0x02f2 (0754) H 7c05 FreqTableGfx : 1404
0x02f4 (0756) H 9605 FreqTableGfx : 1430
0x02f6 (0758) H bf05 FreqTableGfx : 1471
0x02f8 (0760) H de05 FreqTableGfx : 1502
0x02fa (0762) H 5802 FreqTableVclk : 600
0x02fc (0764) H c202 FreqTableVclk : 706
0x02fe (0766) H 2003 FreqTableVclk : 800
0x0300 (0768) H 5a03 FreqTableVclk : 858
0x0302 (0770) H 9c03 FreqTableVclk : 924
0x0304 (0772) H 4304 FreqTableVclk : 1091
0x0306 (0774) H b004 FreqTableVclk : 1200
0x0308 (0776) H 3605 FreqTableVclk : 1334
0x030a (0778) H 2202 FreqTableDclk : 546
0x030c (0780) H 5802 FreqTableDclk : 600
0x030e (0782) H c202 FreqTableDclk : 706
0x0310 (0784) H ee02 FreqTableDclk : 750
0x0312 (0786) H 2003 FreqTableDclk : 800
0x0314 (0788) H 9c03 FreqTableDclk : 924
0x0316 (0790) H e803 FreqTableDclk : 1000
0x0318 (0792) H 4304 FreqTableDclk : 1091
0x031a (0794) H 5802 FreqTableSocclk : 600
0x031c (0796) H 9b02 FreqTableSocclk : 667
0x031e (0798) H c202 FreqTableSocclk : 706
0x0320 (0800) H ee02 FreqTableSocclk : 750
0x0322 (0802) H 2003 FreqTableSocclk : 800
0x0324 (0804) H 5a03 FreqTableSocclk : 858
0x0326 (0806) H 9c03 FreqTableSocclk : 924
0x0328 (0808) H e803 FreqTableSocclk : 1000
0x032a (0810) H 5802 FreqTableUclk : 600
0x032c (0812) H 2003 FreqTableUclk : 800
0x032e (0814) H e803 FreqTableUclk : 1000
0x0330 (0816) H b004 FreqTableUclk : 1200
0x0332 (0818) H 8a02 FreqTableFclk : 650
0x0334 (0820) H 5003 FreqTableFclk : 848
0x0336 (0822) H bb03 FreqTableFclk : 955
0x0338 (0824) H 2404 FreqTableFclk : 1060
0x033a (0826) H 9b04 FreqTableFclk : 1179
0x033c (0828) H d404 FreqTableFclk : 1236
0x033e (0830) H 0b05 FreqTableFclk : 1291
0x0340 (0832) H 7b05 FreqTableFclk : 1403
0x0342 (0834) I 00000000 Paddingclks : 0
0x0346 (0838) I 00000000 Paddingclks : 0
0x034a (0842) I 00000000 Paddingclks : 0
0x034e (0846) I 00000000 Paddingclks : 0
0x0352 (0850) I 00000000 Paddingclks : 0
0x0356 (0854) I 00000000 Paddingclks : 0
0x035a (0858) I 00000000 Paddingclks : 0
0x035e (0862) I 00000000 Paddingclks : 0
0x0362 (0866) I 00000000 Paddingclks : 0
0x0366 (0870) I 00000000 Paddingclks : 0
0x036a (0874) I 00000000 Paddingclks : 0
0x036e (0878) I 00000000 Paddingclks : 0
0x0372 (0882) I 00000000 Paddingclks : 0
0x0376 (0886) I 00000000 Paddingclks : 0
0x037a (0890) I 00000000 Paddingclks : 0
0x037e (0894) I 00000000 Paddingclks : 0
0x0382 (0898) H 2c01 Mp0clkFreq : 300
0x0384 (0900) H f401 Mp0clkFreq : 500
0x0386 (0902) H 220b Mp0DpmVoltage : 2850
0x0388 (0904) H 220b Mp0DpmVoltage : 2850
0x038a (0906) H 2c01 GfxclkFidle : 300
0x038c (0908) H 0000 GfxclkSlewRate : 0
0x038e (0910) B 00 Padding567 : 0
0x038f (0911) B 00 Padding567 : 0
0x0390 (0912) B 00 Padding567 : 0
0x0391 (0913) B 00 Padding567 : 0
0x0392 (0914) H de05 GfxclkDsMaxFreq : 1502
0x0394 (0916) B 01 GfxclkSource : 1
0x0395 (0917) B 00 Padding456 : 0
0x0396 (0918) H 0000 EnableTdpm : 0
0x0398 (0920) H 0000 TdpmHighHystTemperature : 0
0x039a (0922) H 0000 TdpmLowHystTemperature : 0
0x039c (0924) H 0000 GfxclkFreqHighTempLimit : 0
0x039e (0926) H 0000 FanStopTemp : 0
0x03a0 (0928) H 0000 FanStartTemp : 0
0x03a2 (0930) H 0000 FanGainEdge : 0
0x03a4 (0932) H 9001 FanGainHotspot : 400
0x03a6 (0934) H 9001 FanGainVrGfx : 400
0x03a8 (0936) H 9001 FanGainVrSoc : 400
0x03aa (0938) H 9001 FanGainVrMem : 400
0x03ac (0940) H 9001 FanGainHbm : 400
0x03ae (0942) H 1400 FanPwmMin : 20
0x03b0 (0944) H 540b FanAcousticLimitRpm : 2900
0x03b2 (0946) H 540b FanThrottlingRpm : 2900
0x03b4 (0948) H 0a0f FanMaximumRpm : 3850
0x03b6 (0950) H 5a00 FanTargetTemperature : 90
0x03b8 (0952) H 2c01 FanTargetGfxclk : 300
0x03ba (0954) B 00 FanZeroRpmEnable : 0
0x03bb (0955) B 02 FanTachEdgePerRev : 2
0x03bc (0956) B 01 FanTempInputSelect : 1
0x03bd (0957) B 00 Fan : 0
0x03be (0958) h 0000 FuzzyFan_ErrorSetDelta : 0
0x03c0 (0960) h 0000 FuzzyFan_ErrorRateSetDelta : 0
0x03c2 (0962) h 0000 FuzzyFan_PwmSetDelta : 0
0x03c4 (0964) H 0000 FuzzyFan_Reserved : 0
0x03c6 (0966) B 01 OverrideAvfsGb : 1
0x03c7 (0967) B 01 OverrideAvfsGb : 1
0x03c8 (0968) B 00 Padding8_Avfs : 0
0x03c9 (0969) B 00 Padding8_Avfs : 0
0x03ca (0970) f 9161153d a : 0.03647
0x03ce (0974) f d53e1dbd b :-0.03839
0x03d2 (0978) f 76fd023d c : 0.03198
0x03d6 (0982) f 00000000 a : 0
0x03da (0986) f 00000000 b : 0
0x03de (0990) f 0ad7233d c : 0.04
0x03e2 (0994) f 00000000 a : 0
0x03e6 (0998) f 00000000 b : 0
0x03ea (1002) f 00000000 c : 0
0x03ee (1006) f 27a009bd a :-0.0336
0x03f2 (1010) f 5dfec33d b : 0.0957
0x03f6 (1014) f e2067cbd c :-0.06153
0x03fa (1018) f c633283e a : 0.16426
0x03fe (1022) f a9de1a3d b : 0.03781
0x0402 (1026) f 7d5c9bbd c :-0.07586
0x0406 (1030) f 00000000 m : 0
0x040a (1034) f 00000000 b : 0
0x040e (1038) f 00000000 m : 0
0x0412 (1042) f 00000000 b : 0
0x0416 (1046) f 00000000 a : 0
0x041a (1050) f 00000000 b : 0
0x041e (1054) f 00000000 c : 0
0x0422 (1058) f 00000000 a : 0
0x0426 (1062) f 00000000 b : 0
0x042a (1066) f 00000000 c : 0
0x042e (1070) H 3401 DcTol : 308
0x0430 (1072) H 3401 DcTol : 308
0x0432 (1074) B 01 DcBtcEnabled : 1
0x0433 (1075) B 01 DcBtcEnabled : 1
0x0434 (1076) B 00 Padding8_GfxBtc : 0
0x0435 (1077) B 00 Padding8_GfxBtc : 0
0x0436 (1078) H 5f00 DcBtcMin : 95
0x0438 (1080) H 5f00 DcBtcMin : 95
0x043a (1082) H 3401 DcBtcMax : 308
0x043c (1084) H 3401 DcBtcMax : 308
0x043e (1086) H 1900 DcBtcGb : 25
0x0440 (1088) H 1900 DcBtcGb : 25
0x0442 (1090) B 03 XgmiDpmPstates : 3
0x0443 (1091) B 00 XgmiDpmPstates : 0
0x0444 (1092) B 00 XgmiDpmSpare : 0
0x0445 (1093) B 00 XgmiDpmSpare : 0
0x0446 (1094) H 0000 VDDGFX_TVmin : 0
0x0448 (1096) H 0000 VDDSOC_TVmin : 0
0x044a (1098) H 0000 VDDGFX_Vmin_HiTemp : 0
0x044c (1100) H 0000 VDDGFX_Vmin_LoTemp : 0
0x044e (1102) H 0000 VDDSOC_Vmin_HiTemp : 0
0x0450 (1104) H 0000 VDDSOC_Vmin_LoTemp : 0
0x0452 (1106) H 0000 VDDGFX_TVminHystersis : 0
0x0454 (1108) H 0000 VDDSOC_TVminHystersis : 0
0x0456 (1110) I 00000000 DebugOverrides : 0
0x045a (1114) f 00000000 a : 0
0x045e (1118) f 00000000 b : 0
0x0462 (1122) f 00000000 c : 0
0x0466 (1126) f 00000000 a : 0
0x046a (1130) f 00000000 b : 0
0x046e (1134) f 00000000 c : 0
0x0472 (1138) f 00000000 a : 0
0x0476 (1142) f 00000000 b : 0
0x047a (1146) f 00000000 c : 0
0x047e (1150) f 00000000 a : 0
0x0482 (1154) f 00000000 b : 0
0x0486 (1158) f 00000000 c : 0
0x048a (1162) H 8c0a MinVoltageUlvGfx : 2700
0x048c (1164) H 0000 PaddingUlv : 0
0x048e (1166) B 03 TotalPowerConfig : 3
0x048f (1167) B 00 TotalPowerSpare1 : 0
0x0490 (1168) H 0000 TotalPowerSpare2 : 0
0x0492 (1170) H 0000 PccThresholdLow : 0
0x0494 (1172) H 0000 PccThresholdHigh : 0
0x0496 (1174) I 00000000 PaddingAPCC : 0
0x049a (1178) I 00000000 PaddingAPCC : 0
0x049e (1182) I 00000000 PaddingAPCC : 0
0x04a2 (1186) I 00000000 PaddingAPCC : 0
0x04a6 (1190) I 00000000 PaddingAPCC : 0
0x04aa (1194) I 00000000 PaddingAPCC : 0
0x04ae (1198) H 2c01 BasePerformanceCardPower : 300
0x04b0 (1200) H 2c01 MaxPerformanceCardPower : 300
0x04b2 (1202) H 0000 BasePerformanceFrequencyCap : 0
0x04b4 (1204) H 0000 MaxPerformanceFrequencyCap : 0
0x04b6 (1206) H f609 VDDGFX_VminLow : 2550
0x04b8 (1208) H 0000 VDDGFX_TVminLow : 0
0x04ba (1210) H 0000 VDDGFX_VminLow_HiTemp : 0
0x04bc (1212) H 0000 VDDGFX_VminLow_LoTemp : 0
0x04be (1214) I 00000000 Reserved : 0
0x04c2 (1218) I 00000000 Reserved : 0
0x04c6 (1222) I 00000000 Reserved : 0
0x04ca (1226) I 00000000 Reserved : 0
0x04ce (1230) I 00000000 Reserved : 0
0x04d2 (1234) I 00000000 Reserved : 0
0x04d6 (1238) I 00000000 Reserved : 0
0x04da (1242) H 0000 MaxVoltageStepGfx : 0
0x04dc (1244) H 0000 MaxVoltageStepSoc : 0
0x04de (1246) B 00 VddGfxVrMapping : 0
0x04df (1247) B 00 VddSocVrMapping : 0
0x04e0 (1248) B 00 VddMemVrMapping : 0
0x04e1 (1249) B 00 BoardVrMapping : 0
0x04e2 (1250) B 00 GfxUlvPhaseSheddingMask : 0
0x04e3 (1251) B 00 ExternalSensorPresent : 0
0x04e4 (1252) B 00 Padding8_V : 0
0x04e5 (1253) B 00 Padding8_V : 0
0x04e6 (1254) H 0000 GfxMaxCurrent : 0
0x04e8 (1256) b 00 GfxOffset : 0
0x04e9 (1257) B 00 Padding_TelemetryGfx : 0
0x04ea (1258) H 0000 SocMaxCurrent : 0
0x04ec (1260) b 00 SocOffset : 0
0x04ed (1261) B 00 Padding_TelemetrySoc : 0
0x04ee (1262) H 0000 MemMaxCurrent : 0
0x04f0 (1264) b 00 MemOffset : 0
0x04f1 (1265) B 00 Padding_TelemetryMem : 0
0x04f2 (1266) H 0000 BoardMaxCurrent : 0
0x04f4 (1268) b 00 BoardOffset : 0
0x04f5 (1269) B 00 Padding_TelemetryBoardInput : 0
0x04f6 (1270) B 00 VR0HotGpio : 0
0x04f7 (1271) B 00 VR0HotPolarity : 0
0x04f8 (1272) B 00 VR1HotGpio : 0
0x04f9 (1273) B 00 VR1HotPolarity : 0
0x04fa (1274) B 00 PllGfxclkSpreadEnabled : 0
0x04fb (1275) B 00 PllGfxclkSpreadPercent : 0
0x04fc (1276) H 0000 PllGfxclkSpreadFreq : 0
0x04fe (1278) B 00 UclkSpreadEnabled : 0
0x04ff (1279) B 00 UclkSpreadPercent : 0
0x0500 (1280) H 0000 UclkSpreadFreq : 0
0x0502 (1282) B 00 FclkSpreadEnabled : 0
0x0503 (1283) B 00 FclkSpreadPercent : 0
0x0504 (1284) H 0000 FclkSpreadFreq : 0
0x0506 (1286) B 00 FllGfxclkSpreadEnabled : 0
0x0507 (1287) B 00 FllGfxclkSpreadPercent : 0
0x0508 (1288) H 0000 FllGfxclkSpreadFreq : 0
0x050a (1290) B 00 Enabled : 0
0x050b (1291) B 00 Speed : 0
0x050c (1292) B 00 Padding : 0
0x050d (1293) B 00 Padding : 0
0x050e (1294) I 00000000 SlaveAddress : 0
0x0512 (1298) B 00 ControllerPort : 0
0x0513 (1299) B 00 ControllerName : 0
0x0514 (1300) B 00 ThermalThrotter : 0
0x0515 (1301) B 00 I2cProtocol : 0
0x0516 (1302) B 00 Enabled : 0
0x0517 (1303) B 00 Speed : 0
0x0518 (1304) B 00 Padding : 0
0x0519 (1305) B 00 Padding : 0
0x051a (1306) I 00000000 SlaveAddress : 0
0x051e (1310) B 00 ControllerPort : 0
0x051f (1311) B 00 ControllerName : 0
0x0520 (1312) B 00 ThermalThrotter : 0
0x0521 (1313) B 00 I2cProtocol : 0
0x0522 (1314) B 00 Enabled : 0
0x0523 (1315) B 00 Speed : 0
0x0524 (1316) B 00 Padding : 0
0x0525 (1317) B 00 Padding : 0
0x0526 (1318) I 00000000 SlaveAddress : 0
0x052a (1322) B 00 ControllerPort : 0
0x052b (1323) B 00 ControllerName : 0
0x052c (1324) B 00 ThermalThrotter : 0
0x052d (1325) B 00 I2cProtocol : 0
0x052e (1326) B 00 Enabled : 0
0x052f (1327) B 00 Speed : 0
0x0530 (1328) B 00 Padding : 0
0x0531 (1329) B 00 Padding : 0
0x0532 (1330) I 00000000 SlaveAddress : 0
0x0536 (1334) B 00 ControllerPort : 0
0x0537 (1335) B 00 ControllerName : 0
0x0538 (1336) B 00 ThermalThrotter : 0
0x0539 (1337) B 00 I2cProtocol : 0
0x053a (1338) B 00 Enabled : 0
0x053b (1339) B 00 Speed : 0
0x053c (1340) B 00 Padding : 0
0x053d (1341) B 00 Padding : 0
0x053e (1342) I 00000000 SlaveAddress : 0
0x0542 (1346) B 00 ControllerPort : 0
0x0543 (1347) B 00 ControllerName : 0
0x0544 (1348) B 00 ThermalThrotter : 0
0x0545 (1349) B 00 I2cProtocol : 0
0x0546 (1350) B 00 Enabled : 0
0x0547 (1351) B 00 Speed : 0
0x0548 (1352) B 00 Padding : 0
0x0549 (1353) B 00 Padding : 0
0x054a (1354) I 00000000 SlaveAddress : 0
0x054e (1358) B 00 ControllerPort : 0
0x054f (1359) B 00 ControllerName : 0
0x0550 (1360) B 00 ThermalThrotter : 0
0x0551 (1361) B 00 I2cProtocol : 0
0x0552 (1362) B 00 Enabled : 0
0x0553 (1363) B 00 Speed : 0
0x0554 (1364) B 00 Padding : 0
0x0555 (1365) B 00 Padding : 0
0x0556 (1366) I 00000000 SlaveAddress : 0
0x055a (1370) B 00 ControllerPort : 0
0x055b (1371) B 00 ControllerName : 0
0x055c (1372) B 00 ThermalThrotter : 0
0x055d (1373) B 00 I2cProtocol : 0
0x055e (1374) B 00 Enabled : 0
0x055f (1375) B 00 Speed : 0
0x0560 (1376) B 00 Padding : 0
0x0561 (1377) B 00 Padding : 0
0x0562 (1378) I 00000000 SlaveAddress : 0
0x0566 (1382) B 00 ControllerPort : 0
0x0567 (1383) B 00 ControllerName : 0
0x0568 (1384) B 00 ThermalThrotter : 0
0x0569 (1385) B 00 I2cProtocol : 0
0x056a (1386) I 00000000 MemoryChannelEnabled : 0
0x056e (1390) B 00 DramBitWidth : 0
0x056f (1391) B 00 PaddingMem : 0
0x0570 (1392) B 00 PaddingMem : 0
0x0571 (1393) B 00 PaddingMem : 0
0x0572 (1394) H 0000 TotalBoardPower : 0
0x0574 (1396) H 0000 BoardPadding : 0
0x0576 (1398) B 00 XgmiLinkSpeed : 0
0x0577 (1399) B 00 XgmiLinkSpeed : 0
0x0578 (1400) B 00 XgmiLinkSpeed : 0
0x0579 (1401) B 00 XgmiLinkSpeed : 0
0x057a (1402) B 00 XgmiLinkWidth : 0
0x057b (1403) B 00 XgmiLinkWidth : 0
0x057c (1404) B 00 XgmiLinkWidth : 0
0x057d (1405) B 00 XgmiLinkWidth : 0
0x057e (1406) H 0000 XgmiFclkFreq : 0
0x0580 (1408) H 0000 XgmiFclkFreq : 0
0x0582 (1410) H 0000 XgmiFclkFreq : 0
0x0584 (1412) H 0000 XgmiFclkFreq : 0
0x0586 (1414) H 0000 XgmiSocVoltage : 0
0x0588 (1416) H 0000 XgmiSocVoltage : 0
0x058a (1418) H 0000 XgmiSocVoltage : 0
0x058c (1420) H 0000 XgmiSocVoltage : 0
0x058e (1422) B 00 GpioI2cScl : 0
0x058f (1423) B 00 GpioI2cSda : 0
0x0590 (1424) H 0000 GpioPadding : 0
0x0592 (1426) I 00000000 BoardVoltageCoeffA : 0
0x0596 (1430) I 00000000 BoardVoltageCoeffB : 0
0x059a (1434) I 00000000 BoardReserved : 0
0x059e (1438) I 00000000 BoardReserved : 0
0x05a2 (1442) I 00000000 BoardReserved : 0
0x05a6 (1446) I 00000000 BoardReserved : 0
0x05aa (1450) I 00000000 BoardReserved : 0
0x05ae (1454) I 00000000 BoardReserved : 0
0x05b2 (1458) I 00000000 BoardReserved : 0
0x05b6 (1462) I 00000000 MmHubPadding : 0
0x05ba (1466) I 00000000 MmHubPadding : 0
0x05be (1470) I 00000000 MmHubPadding : 0
0x05c2 (1474) I 00000000 MmHubPadding : 0
0x05c6 (1478) I 00000000 MmHubPadding : 0
0x05ca (1482) I 00000000 MmHubPadding : 0
0x05ce (1486) I 00000000 MmHubPadding : 0
0x05d2 (1490) I 00000000 MmHubPadding : 0
================================================
FILE: test/Powercolor.RX9070.16384.241204_1.rom.dump
================================================
header:
structuresize: 5812
format_revision: 23
content_revision: 0
table_revision: 5
pptable_source: 0
pmfw_pptable_start_offset: 1344
pmfw_pptable_size: 4468
pmfw_sku_table_start_offset: 1372
pmfw_sku_table_size: 3552
pmfw_board_table_start_offset: 5284
pmfw_board_table_size: 528
pmfw_custom_sku_table_start_offset: 4924
pmfw_custom_sku_table_size: 360
golden_pp_id: 4518
golden_revision: 23538
format_id: 136
platform_caps: 8
thermal_controller_type: 32
small_power_limit1: 0
small_power_limit2: 0
boost_power_limit: 0
software_shutdown_temp: 118
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
reserve 3: 0
reserve 4: 0
reserve 5: 0
reserve 6: 0
reserve 7: 0
reserve 8: 0
reserve 9: 0
reserve 10: 0
reserve 11: 0
reserve 12: 0
reserve 13: 0
reserve 14: 0
reserve 15: 2
reserve 16: 0
reserve 17: 0
reserve 18: 0
reserve 19: 0
reserve 20: 1
reserve 21: 1
reserve 22: 1
reserve 23: 1
reserve 24: 1
reserve 25: 0
reserve 26: 0
reserve 27: 0
reserve 28: 1
reserve 29: 0
reserve 30: 0
reserve 31: 0
reserve 32: 0
reserve 33: 0
reserve 34: 0
reserve 35: 0
reserve 36: 0
reserve 37: 0
reserve 38: 0
reserve 39: 0
reserve 40: 0
reserve 41: 0
reserve 42: 0
reserve 43: 0
reserve 44: 0
reserve 45: 0
reserve 46: 0
reserve 47: 0
reserve 48: 0
reserve 49: 0
reserve 50: 0
reserve 51: 0
reserve 52: 0
reserve 53: 0
reserve 54: 0
reserve 55: 0
reserve 56: 0
reserve 57: 0
reserve 58: 0
reserve 59: 0
reserve 60: 0
reserve 61: 0
reserve 62: 0
reserve 63: 0
reserve 64: 0
reserve 65: 0
reserve 66: 0
reserve 67: 0
reserve 68: 0
reserve 69: 0
reserve 70: 0
reserve 71: 0
reserve 72: 0
reserve 73: 0
reserve 74: 0
reserve 75: 0
reserve 76: 0
reserve 77: 0
reserve 78: 0
reserve 79: 0
reserve 80: 0
reserve 81: 0
reserve 82: 0
reserve 83: 0
reserve 84: 0
reserve 85: 0
reserve 86: 0
reserve 87: 1
reserve 88: 0
reserve 89: 0
reserve 90: 0
reserve 91: 1
reserve 92: 0
reserve 93: 0
reserve 94: 0
reserve 95: 1
reserve 96: 0
reserve 97: 0
reserve 98: 0
reserve 99: 1
reserve 100: 0
reserve 101: 0
reserve 102: 0
reserve 103: 1
reserve 104: 0
reserve 105: 0
reserve 106: 0
reserve 107: 0
reserve 108: 0
reserve 109: 0
reserve 110: 0
reserve 111: 0
reserve 112: 0
reserve 113: 0
reserve 114: 0
reserve 115: 0
reserve 116: 0
reserve 117: 0
reserve 118: 0
reserve 119: 1
reserve 120: 0
reserve 121: 0
reserve 122: 0
reserve 123: 0
reserve 124: 0
reserve 125: 0
reserve 126: 0
reserve 127: 0
reserve 128: 0
reserve 129: 0
reserve 130: 0
reserve 131: 0
reserve 132: 0
reserve 133: 0
reserve 134: 0
reserve 135: 0
reserve 136: 0
reserve 137: 0
reserve 138: 0
reserve 139: 0
reserve 140: 0
reserve 141: 0
reserve 142: 0
overdrive_table:
revision: 0
reserve:
reserve 0: 0
reserve 1: 0
reserve 2: 0
cap:
cap 0:
0 0: 0
0 1: 0
0 2: 0
0 3: 0
0 4: 0
0 5: 0
0 6: 0
0 7: 0
0 8: 0
0 9: 0
0 10: 0
0 11: 0
0 12: 0
0 13: 0
0 14: 0
0 15: 0
0 16: 0
0 17: 0
0 18: 0
0 19: 0
0 20: 0
0 21: 0
0 22: 0
0 23: 0
0 24: 0
0 25: 0
0 26: 0
0 27: 0
0 28: 0
0 29: 0
0 30: 0
0 31: 0
cap 1:
1 0: 0
1 1: 0
1 2: 0
1 3: 0
1 4: 0
1 5: 0
1 6: 0
1 7: 0
1 8: 0
1 9: 0
1 10: 0
1 11: 0
1 12: 0
1 13: 0
1 14: 0
1 15: 0
1 16: 0
1 17: 0
1 18: 0
1 19: 0
1 20: 0
1 21: 0
1 22: 0
1 23: 0
1 24: 0
1 25: 0
1 26: 0
1 27: 0
1 28: 0
1 29: 0
1 30: 0
1 31: 0
max:
max 0:
0 0: 0
0 1: 0
0 2: 0
0 3: 0
0 4: 0
0 5: 0
0 6: 0
0 7: 0
0 8: 0
0 9: 0
0 10: 0
0 11: 0
0 12: 0
0 13: 0
0 14: 0
0 15: 0
0 16: 0
0 17: 0
0 18: 0
0 19: 0
0 20: 0
0 21: 0
0 22: 0
0 23: 0
0 24: 0
0 25: 0
0 26: 0
0 27: 0
0 28: 0
0 29: 0
0 30: 0
0 31: 0
0 32: 0
0 33: 0
0 34: 0
0 35: 0
0 36: 0
0 37: 0
0 38: 0
0 39: 0
0 40: 0
0 41: 0
0 42: 0
0 43: 0
0 44: 0
0 45: 0
0 46: 0
0 47: 0
0 48: 0
0 49: 0
0 50: 0
0 51: 0
0 52: 0
0 53: 0
0 54: 0
0 55: 0
0 56: 0
0 57: 0
0 58: 0
0 59: 0
0 60: 0
0 61: 0
0 62: 0
0 63: 0
max 1:
1 0: 0
1 1: 0
1 2: 0
1 3: 0
1 4: 0
1 5: 0
1 6: 0
1 7: 0
1 8: 0
1 9: 0
1 10: 0
1 11: 0
1 12: 0
1 13: 0
1 14: 0
1 15: 0
1 16: 0
1 17: 0
1 18: 0
1 19: 0
1 20: 0
1 21: 0
1 22: 0
1 23: 0
1 24: 0
1 25: 0
1 26: 0
1 27: 0
1 28: 0
1 29: 0
1 30: 0
1 31: 0
1 32: 0
1 33: 0
1 34: 0
1 35: 0
1 36: 0
1 37: 0
1 38: 0
1 39: 0
1 40: 0
1 41: 0
1 42: 0
1 43: 0
1 44: 0
1 45: 0
1 46: 0
1 47: 0
1 48: 0
1 49: 0
1 50: 0
1 51: 0
1 52: 0
1 53: 0
1 54: 0
1 55: 0
1 56: 0
1 57: 0
1 58: 0
1 59: 0
1 60: 0
1 61: 0
1 62: 0
1 63: 0
min:
min 0:
0 0: 0
0 1: 0
0 2: 0
0 3: 0
0 4: 0
0 5: 0
0 6: 0
0 7: 0
0 8: 0
0 9: 0
0 10: 0
0 11: 0
0 12: 0
0 13: 0
0 14: 0
0 15: 0
0 16: 0
0 17: 0
0 18: 0
0 19: 0
0 20: 0
0 21: 0
0 22: 0
0 23: 0
0 24: 0
0 25: 0
0 26: 0
0 27: 0
0 28: 0
0 29: 0
0 30: 0
0 31: 0
0 32: 0
0 33: 0
0 34: 0
0 35: 0
0 36: 0
0 37: 0
0 38: 0
0 39: 0
0 40: 0
0 41: 0
0 42: 0
0 43: 0
0 44: 0
0 45: 0
0 46: 0
0 47: 0
0 48: 0
0 49: 0
0 50: 0
0 51: 0
0 52: 0
0 53: 0
0 54: 0
0 55: 0
0 56: 0
0 57: 0
0 58: 0
0 59: 0
0 60: 0
0 61: 0
0 62: 0
0 63: 0
min 1:
1 0: 0
1 1: 0
1 2: 0
1 3: 0
1 4: 0
1 5: 0
1 6: 0
1 7: 0
1 8: 0
1 9: 0
1 10: 0
1 11: 0
1 12: 0
1 13: 0
1 14: 0
1 15: 0
1 16: 0
1 17: 0
1 18: 0
1 19: 0
1 20: 0
1 21: 0
1 22: 0
1 23: 0
1 24: 0
1 25: 0
1 26: 0
1 27: 0
1 28: 0
1 29: 0
1 30: 0
1 31: 0
1 32: 65531
1 33: 0
1 34: 5767256
1 35: 5767168
1 36: 85198100
1 37: 85196800
1 38: 216272100
1 39: 216268800
1 40: 0
1 41: 0
1 42: 0
1 43: 0
1 44: 0
1 45: 0
1 46: 0
1 47: 0
1 48: 65516
1 49: 0
1 50: 1638425
1 51: 1638400
1 52: 32768500
1 53: 32768000
1 54: 32768500
1 55: 32768000
1 56: 0
1 57: 0
1 58: 0
1 59: 0
1 60: 0
1 61: 0
1 62: 0
1 63: 0
pm_setting:
pm_setting 0: -5
pm_setting 1: 0
pm_setting 2: 0
pm_setting 3: 0
pm_setting 4: 105
pm_setting 5: 105
pm_setting 6: 0
pm_setting 7: 105
pm_setting 8: 6000
pm_setting 9: 6000
pm_setting 10: 0
pm_setting 11: 6000
pm_setting 12: 6000
pm_setting 13: 6000
pm_setting 14: 0
pm_setting 15: 6000
pm_setting 16: 0
pm_setting 17: 0
pm_setting 18: 0
pm_setting 19: 0
pm_setting 20: 0
pm_setting 21: 0
pm_setting 22: 0
pm_setting 23: 0
pm_setting 24: 0
pm_setting 25: 0
pm_setting 26: 0
pm_setting 27: 0
pm_setting 28: 0
pm_setting 29: 0
pm_setting 30: 0
pm_setting 31: 0
smc_pptable:
PFE_Settings:
Version: 0
Spare8:
Spare8 0: 0
Spare8 1: 0
Spare8 2: 0
FeaturesToRun:
FeaturesToRun 0: 989854971
FeaturesToRun 1: 76345758
FwDStateMask: 262143
DebugOverrides: 0
Spare:
Spare 0: 0
Spare 1: 0
SkuTable:
Version: 27
TotalPowerConfig: 3
CustomerVariant: 0
MemoryTemperatureTypeMask: 4
SmartShiftVersion: 0
SocketPowerLimitSpare:
SocketPowerLimitSpare 0: 80
SocketPowerLimitSpare 1: 0
SocketPowerLimitSpare 2: 0
SocketPowerLimitSpare 3: 0
SocketPowerLimitSpare 4: 0
SocketPowerLimitSpare 5: 0
SocketPowerLimitSpare 6: 0
SocketPowerLimitSpare 7: 0
SocketPowerLimitSpare 8: 0
SocketPowerLimitSpare 9: 0
EnableLegacyPptLimit: 0
UseInputTelemetry: 1
SmartShiftMinReportedPptinDcs: 0
PaddingPpt:
PaddingPpt 0: 0
PaddingPpt 1: 0
PaddingPpt 2: 0
PaddingPpt 3: 0
PaddingPpt 4: 0
PaddingPpt 5: 0
PaddingPpt 6: 0
HwCtfTempLimit: 120
PaddingInfra: 105
FitControllerFailureRateLimit: 0
FitControllerGfxDutyCycle: 0
FitControllerSocDutyCycle: 0
FitControllerSocOffset: 0
GfxApccPlusResidencyLimit: 0
ThrottlerControlMask: 1110514
UlvVoltageOffset:
UlvVoltageOffset 0: 100
UlvVoltageOffset 1: 100
Padding:
Padding 0: 0
Padding 1: 0
DeepUlvVoltageOffsetSoc: 100
DefaultMaxVoltage:
DefaultMaxVoltage 0: 4400
DefaultMaxVoltage 1: 4600
BoostMaxVoltage:
BoostMaxVoltage 0: 4800
BoostMaxVoltage 1: 4600
VminTempHystersis:
VminTempHystersis 0: 5
VminTempHystersis 1: 5
VminTempThreshold:
VminTempThreshold 0: 55
VminTempThreshold 1: 55
Vmin_Hot_T0:
Vmin_Hot_T0 0: 2800
Vmin_Hot_T0 1: 3300
Vmin_Cold_T0:
Vmin_Cold_T0 0: 2800
Vmin_Cold_T0 1: 3300
Vmin_Hot_Eol:
Vmin_Hot_Eol 0: 2800
Vmin_Hot_Eol 1: 3300
Vmin_Cold_Eol:
Vmin_Cold_Eol 0: 2800
Vmin_Cold_Eol 1: 3300
Vmin_Aging_Offset:
Vmin_Aging_Offset 0: 0
Vmin_Aging_Offset 1: 0
Spare_Vmin_Plat_Offset_Hot:
Spare_Vmin_Plat_Offset_Hot 0: 0
Spare_Vmin_Plat_Offset_Hot 1: 0
Spare_Vmin_Plat_Offset_Cold:
Spare_Vmin_Plat_Offset_Cold 0: 2800
Spare_Vmin_Plat_Offset_Cold 1: 2800
VcBtcFixedVminAgingOffset:
VcBtcFixedVminAgingOffset 0: 0
VcBtcFixedVminAgingOffset 1: 0
VcBtcVmin2PsmDegrationGb:
VcBtcVmin2PsmDegrationGb 0: 0
VcBtcVmin2PsmDegrationGb 1: 0
VcBtcPsmA:
VcBtcPsmA 0: 0
VcBtcPsmA 1: 0
VcBtcPsmB:
VcBtcPsmB 0: 0
VcBtcPsmB 1: 0
VcBtcVminA:
VcBtcVminA 0: 0
VcBtcVminA 1: 0
VcBtcVminB:
VcBtcVminB 0: 0
VcBtcVminB 1: 0
PerPartVminEnabled:
PerPartVminEnabled 0: 1
PerPartVminEnabled 1: 0
VcBtcEnabled:
VcBtcEnabled 0: 0
VcBtcEnabled 1: 0
SocketPowerLimitAcTau:
SocketPowerLimitAcTau 0: 0
SocketPowerLimitAcTau 1: 0
SocketPowerLimitAcTau 2: 0
SocketPowerLimitAcTau 3: 0
SocketPowerLimitDcTau:
SocketPowerLimitDcTau 0: 0
SocketPowerLimitDcTau 1: 0
SocketPowerLimitDcTau 2: 0
SocketPowerLimitDcTau 3: 0
Gfx_Vmin_droop:
a: 0
b: 0.07057
c:-0.008
Soc_Vmin_droop:
a: 0
b: 0
c: 0
SpareVmin:
SpareVmin 0: 0
SpareVmin 1: 0
SpareVmin 2: 0
SpareVmin 3: 0
SpareVmin 4: 0
SpareVmin 5: 0
DpmDescriptor:
DpmDescriptor 0:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 3
ConversionToAvfsClk:
m: 0
b: 0
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 1200
FoptimalAc: 1200
Padding2: 0
DpmDescriptor 1:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.2282
b: 0.42558
Padding3:
Padding3 0: 0
Padding3 1: 78643200
Padding3 2: 1200
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16286
DpmDescriptor 2:
Padding: 211
SnapToDiscrete: 1
NumDiscreteLevels: 6
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.2445
b: 0.4475
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 256
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16312
DpmDescriptor 3:
Padding: 205
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1
b: 0
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16256
DpmDescriptor 4:
Padding: 0
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 0.9741
b: 0.46397
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16263
DpmDescriptor 5:
Padding: 199
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 0.8129
b: 0.15068
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16221
DpmDescriptor 6:
Padding: 125
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.1566
b: 0.21166
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16270
DpmDescriptor 7:
Padding: 229
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.1566
b: 0.21166
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16270
DpmDescriptor 8:
Padding: 229
SnapToDiscrete: 0
NumDiscreteLevels: 1
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.2897
b: 0.17917
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16285
DpmDescriptor 9:
Padding: 10
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.2897
b: 0.17917
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16285
DpmDescriptor 10:
Padding: 10
SnapToDiscrete: 0
NumDiscreteLevels: 2
CalculateFopt: 0
ConversionToAvfsClk:
m: 1.2897
b: 0.17917
Padding3:
Padding3 0: 0
Padding3 1: 0
Padding3 2: 0
Padding4: 0
FoptimalDc: 0
FoptimalAc: 0
Padding2: 16285
FreqTableGfx:
FreqTableGfx 0: 500
FreqTableGfx 1: 3400
FreqTableGfx 2: 0
FreqTableGfx 3: 0
FreqTableGfx 4: 0
FreqTableGfx 5: 0
FreqTableGfx 6: 0
FreqTableGfx 7: 0
FreqTableGfx 8: 0
FreqTableGfx 9: 0
FreqTableGfx 10: 0
FreqTableGfx 11: 0
FreqTableGfx 12: 500
FreqTableGfx 13: 1000
FreqTableGfx 14: 0
FreqTableGfx 15: 0
FreqTableVclk:
FreqTableVclk 0: 800
FreqTableVclk 1: 2934
FreqTableVclk 2: 0
FreqTableVclk 3: 0
FreqTableVclk 4: 0
FreqTableVclk 5: 0
FreqTableVclk 6: 0
FreqTableVclk 7: 0
FreqTableDclk:
FreqTableDclk 0: 800
FreqTableDclk 1: 2200
FreqTableDclk 2: 0
FreqTableDclk 3: 0
FreqTableDclk 4: 800
FreqTableDclk 5: 2200
FreqTableDclk 6: 0
FreqTableDclk 7: 0
FreqTableSocclk:
FreqTableSocclk 0: 418
FreqTableSocclk 1: 1500
FreqTableSocclk 2: 0
FreqTableSocclk 3: 0
FreqTableSocclk 4: 800
FreqTableSocclk 5: 1467
FreqTableSocclk 6: 0
FreqTableSocclk 7: 0
FreqTableUclk:
FreqTableUclk 0: 97
FreqTableUclk 1: 457
FreqTableUclk 2: 773
FreqTableUclk 3: 875
FreqTableUclk 4: 1125
FreqTableUclk 5: 1259
FreqTableShadowUclk:
FreqTableShadowUclk 0: 102
FreqTableShadowUclk 1: 435
FreqTableShadowUclk 2: 731
FreqTableShadowUclk 3: 842
FreqTableShadowUclk 4: 1069
FreqTableShadowUclk 5: 1187
FreqTableDispclk:
FreqTableDispclk 0: 148
FreqTableDispclk 1: 2000
FreqTableDispclk 2: 773
FreqTableDispclk 3: 1000
FreqTableDispclk 4: 1125
FreqTableDispclk 5: 1250
FreqTableDispclk 6: 102
FreqTableDispclk 7: 435
FreqTableDppClk:
FreqTableDppClk 0: 148
FreqTableDppClk 1: 2000
FreqTableDppClk 2: 1069
FreqTableDppClk 3: 1187
FreqTableDppClk 4: 148
FreqTableDppClk 5: 1636
FreqTableDppClk 6: 0
FreqTableDppClk 7: 0
FreqTableDprefclk:
FreqTableDprefclk 0: 720
FreqTableDprefclk 1: 0
FreqTableDprefclk 2: 0
FreqTableDprefclk 3: 0
FreqTableDprefclk 4: 148
FreqTableDprefclk 5: 1636
FreqTableDprefclk 6: 0
FreqTableDprefclk 7: 0
FreqTableDcfclk:
FreqTableDcfclk 0: 148
FreqTableDcfclk 1: 1800
FreqTableDcfclk 2: 0
FreqTableDcfclk 3: 0
FreqTableDcfclk 4: 720
FreqTableDcfclk 5: 720
FreqTableDcfclk 6: 0
FreqTableDcfclk 7: 0
FreqTableDtbclk:
FreqTableDtbclk 0: 148
FreqTableDtbclk 1: 1800
FreqTableDtbclk 2: 0
FreqTableDtbclk 3: 0
FreqTableDtbclk 4: 148
FreqTableDtbclk 5: 1636
FreqTableDtbclk 6: 0
FreqTableDtbclk 7: 0
FreqTableFclk:
FreqTableFclk 0: 307
FreqTableFclk 1: 2400
FreqTableFclk 2: 0
FreqTableFclk 3: 0
FreqTableFclk 4: 148
FreqTableFclk 5: 1636
FreqTableFclk 6: 0
FreqTableFclk 7: 0
DcModeMaxFreq:
DcModeMaxFreq 0: 3400
DcModeMaxFreq 1: 1500
DcModeMaxFreq 2: 457
DcModeMaxFreq 3: 2400
DcModeMaxFreq 4: 2200
DcModeMaxFreq 5: 2934
DcModeMaxFreq 6: 2000
DcModeMaxFreq 7: 2000
DcModeMaxFreq 8: 720
DcModeMaxFreq 9: 1800
DcModeMaxFreq 10: 1800
GfxclkAibFmax: 0
GfxDpmPadding: 0
GfxclkFgfxoffEntry: 1200
GfxclkFgfxoffExitImu: 1000
GfxclkFgfxoffExitRlc: 1200
GfxclkThrottleClock: 250
EnableGfxPowerStagesGpio: 1
GfxIdlePadding: 2
SmsRepairWRCKClkDivEn: 0
SmsRepairWRCKClkDivVal: 0
GfxOffEntryEarlyMGCGEn: 1
GfxOffEntryForceCGCGEn: 1
GfxOffEntryForceCGCGDelayEn: 1
GfxOffEntryForceCGCGDelayVal: 200
GfxclkFreqGfxUlv: 0
GfxIdlePadding2:
GfxIdlePadding2 0: 0
GfxIdlePadding2 1: 0
GfxOffEntryHysteresis: 10000
GfxoffSpare:
GfxoffSpare 0: 32769200
GfxoffSpare 1: 16385200
GfxoffSpare 2: 0
GfxoffSpare 3: 0
GfxoffSpare 4: 0
GfxoffSpare 5: 10
GfxoffSpare 6: 0
GfxoffSpare 7: 0
GfxoffSpare 8: 0
GfxoffSpare 9: 0
GfxoffSpare 10: 0
GfxoffSpare 11: 0
GfxoffSpare 12: 0
GfxoffSpare 13: 0
GfxoffSpare 14: 0
DfllMstrOscConfigA: 0
DfllSlvOscConfigA: 0
DfllBtcMasterScalerM: 0
DfllBtcMasterScalerB: 0
DfllBtcSlaveScalerM: 0
DfllBtcSlaveScalerB: 0
DfllPccAsWaitCtrl: 0
DfllPccAsStepCtrl: 0
GfxDfllSpare:
GfxDfllSpare 0: 0
GfxDfllSpare 1: 0
GfxDfllSpare 2: 0
GfxDfllSpare 3: 0
GfxDfllSpare 4: 0
GfxDfllSpare 5: 0
GfxDfllSpare 6: 0
GfxDfllSpare 7: 0
GfxDfllSpare 8: 0
DvoPsmDownThresholdVoltage: 1.45
DvoPsmUpThresholdVoltage: 1.4
DvoFmaxLowScaler: 0.94
PaddingDcs: 0
DcsMinGfxOffTime: 6
DcsMaxGfxOffTime: 100
DcsMinCreditAccum: 0
DcsExitHysteresis: 40
DcsTimeout: 100
DcsPfGfxFopt: 500
DcsPfUclkFopt: 97
FoptEnabled: 1
DcsSpare2:
DcsSpare2 0: 0
DcsSpare2 1: 100
DcsSpare2 2: 0
DcsFoptM: 0
DcsFoptB: 0
DcsSpare:
DcsSpare 0: 0
DcsSpare 1: 0
DcsSpare 2: 0
DcsSpare 3: 0
DcsSpare 4: 0
DcsSpare 5: 0
DcsSpare 6: 0
DcsSpare 7: 0
DcsSpare 8: 0
UseStrobeModeOptimizations: 1
PaddingMem:
PaddingMem 0: 0
PaddingMem 1: 0
PaddingMem 2: 0
UclkDpmPstates:
UclkDpmPstates 0: 14
UclkDpmPstates 1: 12
UclkDpmPstates 2: 8
UclkDpmPstates 3: 4
UclkDpmPstates 4: 2
UclkDpmPstates 5: 0
UclkDpmShadowPstates:
UclkDpmShadowPstates 0: 15
UclkDpmShadowPstates 1: 13
UclkDpmShadowPstates 2: 9
UclkDpmShadowPstates 3: 5
UclkDpmShadowPstates 4: 3
UclkDpmShadowPstates 5: 1
FreqTableUclkDiv:
FreqTableUclkDiv 0: 0
FreqTableUclkDiv 1: 2
FreqTableUclkDiv 2: 3
FreqTableUclkDiv 3: 3
FreqTableUclkDiv 4: 3
FreqTableUclkDiv 5: 3
FreqTableShadowUclkDiv:
FreqTableShadowUclkDiv 0: 0
FreqTableShadowUclkDiv 1: 2
FreqTableShadowUclkDiv 2: 3
FreqTableShadowUclkDiv 3: 3
FreqTableShadowUclkDiv 4: 3
FreqTableShadowUclkDiv 5: 3
MemVmempVoltage:
MemVmempVoltage 0: 2700
MemVmempVoltage 1: 2800
MemVmempVoltage 2: 3000
MemVmempVoltage 3: 3000
MemVmempVoltage 4: 3400
MemVmempVoltage 5: 3400
MemVddioVoltage:
MemVddioVoltage 0: 5000
MemVddioVoltage 1: 5000
MemVddioVoltage 2: 5000
MemVddioVoltage 3: 5000
MemVddioVoltage 4: 5400
MemVddioVoltage 5: 5400
DalDcModeMaxUclkFreq: 457
PaddingsMem:
PaddingsMem 0: 136
PaddingsMem 1: 19
PaddingFclk: 327680457
PcieGenSpeed:
PcieGenSpeed 0: 0
PcieGenSpeed 1: 3
PcieGenSpeed 2: 4
PcieLaneCount:
PcieLaneCount 0: 6
PcieLaneCount 1: 6
PcieLaneCount 2: 6
LclkFreq:
LclkFreq 0: 250
LclkFreq 1: 616
LclkFreq 2: 1143
OverrideGfxAvfsFuses: 0
GfxAvfsPadding:
GfxAvfsPadding 0: 3
DroopGBStDev: 15
SocHwRtAvfsFuses:
SocHwRtAvfsFuses 0: 16777216
SocHwRtAvfsFuses 1: 16777216
SocHwRtAvfsFuses 2: 16777216
SocHwRtAvfsFuses 3: 16777216
SocHwRtAvfsFuses 4: 16777216
SocHwRtAvfsFuses 5: 65536
SocHwRtAvfsFuses 6: 32768
SocHwRtAvfsFuses 7: 65536
SocHwRtAvfsFuses 8: 32768
SocHwRtAvfsFuses 9: 65536
SocHwRtAvfsFuses 10: 32768
SocHwRtAvfsFuses 11: 65536
SocHwRtAvfsFuses 12: 32768
SocHwRtAvfsFuses 13: 65536
SocHwRtAvfsFuses 14: 32768
SocHwRtAvfsFuses 15: 18022577
SocHwRtAvfsFuses 16: 19988698
SocHwRtAvfsFuses 17: 22544637
SocHwRtAvfsFuses 18: 25887007
SocHwRtAvfsFuses 19: 0
SocHwRtAvfsFuses 20: 0
SocHwRtAvfsFuses 21: 0
SocHwRtAvfsFuses 22: 0
SocHwRtAvfsFuses 23: 0
SocHwRtAvfsFuses 24: 0
SocHwRtAvfsFuses 25: 0
SocHwRtAvfsFuses 26: 0
SocHwRtAvfsFuses 27: 0
SocHwRtAvfsFuses 28: 2490406
SocHwRtAvfsFuses 29: 2490406
SocHwRtAvfsFuses 30: 38
SocHwRtAvfsFuses 31: 65535
GfxL2HwRtAvfsFuses:
GfxL2HwRtAvfsFuses 0: 16777216
GfxL2HwRtAvfsFuses 1: 16777216
GfxL2HwRtAvfsFuses 2: 16777216
GfxL2HwRtAvfsFuses 3: 16777216
GfxL2HwRtAvfsFuses 4: 16777216
GfxL2HwRtAvfsFuses 5: 2835136512
GfxL2HwRtAvfsFuses 6: 1141125120
GfxL2HwRtAvfsFuses 7: 2835136512
GfxL2HwRtAvfsFuses 8: 1141125120
GfxL2HwRtAvfsFuses 9: 2835136512
GfxL2HwRtAvfsFuses 10: 1141125120
GfxL2HwRtAvfsFuses 11: 2835136512
GfxL2HwRtAvfsFuses 12: 1141125120
GfxL2HwRtAvfsFuses 13: 2835136512
GfxL2HwRtAvfsFuses 14: 1141125120
GfxL2HwRtAvfsFuses 15: 18024390
GfxL2HwRtAvfsFuses 16: 19990839
GfxL2HwRtAvfsFuses 17: 22546964
GfxL2HwRtAvfsFuses 18: 25889669
GfxL2HwRtAvfsFuses 19: 0
GfxL2HwRtAvfsFuses 20: 0
GfxL2HwRtAvfsFuses 21: 0
GfxL2HwRtAvfsFuses 22: 0
GfxL2HwRtAvfsFuses 23: 0
GfxL2HwRtAvfsFuses 24: 0
GfxL2HwRtAvfsFuses 25: 0
GfxL2HwRtAvfsFuses 26: 0
GfxL2HwRtAvfsFuses 27: 0
GfxL2HwRtAvfsFuses 28: 2147844101
GfxL2HwRtAvfsFuses 29: 2147844101
GfxL2HwRtAvfsFuses 30: 32773
GfxL2HwRtAvfsFuses 31: 65535
PsmDidt_Vcross:
PsmDidt_Vcross 0: 850
PsmDidt_Vcross 1: 1000
PsmDidt_StaticDroop_A:
PsmDidt_StaticDroop_A 0: 0.8
PsmDidt_StaticDroop_A 1: 0.8
PsmDidt_StaticDroop_A 2: 0.8
PsmDidt_StaticDroop_B:
PsmDidt_StaticDroop_B 0: 0
PsmDidt_StaticDroop_B 1: 0
PsmDidt_StaticDroop_B 2: 0
PsmDidt_DynDroop_A:
PsmDidt_DynDroop_A 0: 0
PsmDidt_DynDroop_A 1: 0
PsmDidt_DynDroop_A 2: 0
PsmDidt_DynDroop_B:
PsmDidt_DynDroop_B 0: 0
PsmDidt_DynDroop_B 1: 0
PsmDidt_DynDroop_B 2: 0
spare_HwRtAvfsFuses:
spare_HwRtAvfsFuses 0: 0
spare_HwRtAvfsFuses 1: 0
spare_HwRtAvfsFuses 2: 0
spare_HwRtAvfsFuses 3: 0
spare_HwRtAvfsFuses 4: 0
spare_HwRtAvfsFuses 5: 0
spare_HwRtAvfsFuses 6: 0
spare_HwRtAvfsFuses 7: 0
spare_HwRtAvfsFuses 8: 0
spare_HwRtAvfsFuses 9: 0
spare_HwRtAvfsFuses 10: 0
spare_HwRtAvfsFuses 11: 0
spare_HwRtAvfsFuses 12: 0
spare_HwRtAvfsFuses 13: 0
spare_HwRtAvfsFuses 14: 0
spare_HwRtAvfsFuses 15: 0
spare_HwRtAvfsFuses 16: 0
spare_HwRtAvfsFuses 17: 0
spare_HwRtAvfsFuses 18: 0
SocCommonRtAvfs:
SocCommonRtAvfs 0: 700
SocCommonRtAvfs 1: 700
SocCommonRtAvfs 2: 700
SocCommonRtAvfs 3: 700
SocCommonRtAvfs 4: 700
SocCommonRtAvfs 5: 700
SocCommonRtAvfs 6: 700
SocCommonRtAvfs 7: 700
SocCommonRtAvfs 8: 0
SocCommonRtAvfs 9: 0
SocCommonRtAvfs 10: 0
SocCommonRtAvfs 11: 0
SocCommonRtAvfs 12: 0
GfxCommonRtAvfs:
GfxCommonRtAvfs 0: 700
GfxCommonRtAvfs 1: 700
GfxCommonRtAvfs 2: 700
GfxCommonRtAvfs 3: 700
GfxCommonRtAvfs 4: 700
GfxCommonRtAvfs 5: 700
GfxCommonRtAvfs 6: 700
GfxCommonRtAvfs 7: 700
GfxCommonRtAvfs 8: 0
GfxCommonRtAvfs 9: 0
GfxCommonRtAvfs 10: 0
GfxCommonRtAvfs 11: 0
GfxCommonRtAvfs 12: 0
SocFwRtAvfsFuses:
SocFwRtAvfsFuses 0: 11
SocFwRtAvfsFuses 1: 11
SocFwRtAvfsFuses 2: 9
SocFwRtAvfsFuses 3: 13
SocFwRtAvfsFuses 4: 24
SocFwRtAvfsFuses 5: 24
SocFwRtAvfsFuses 6: 0
SocFwRtAvfsFuses 7: 0
SocFwRtAvfsFuses 8: 1
SocFwRtAvfsFuses 9: 1
SocFwRtAvfsFuses 10: 0
SocFwRtAvfsFuses 11: 0
SocFwRtAvfsFuses 12: 0
SocFwRtAvfsFuses 13: 3000
SocFwRtAvfsFuses 14: 1012
SocFwRtAvfsFuses 15: 1012
SocFwRtAvfsFuses 16: 1012
SocFwRtAvfsFuses 17: 1012
SocFwRtAvfsFuses 18: 1012
GfxL2FwRtAvfsFuses:
GfxL2FwRtAvfsFuses 0: 4
GfxL2FwRtAvfsFuses 1: 4
GfxL2FwRtAvfsFuses 2: 3
GfxL2FwRtAvfsFuses 3: 5
GfxL2FwRtAvfsFuses 4: 10
GfxL2FwRtAvfsFuses 5: 10
GfxL2FwRtAvfsFuses 6: 0
GfxL2FwRtAvfsFuses 7: 0
GfxL2FwRtAvfsFuses 8: 1
GfxL2FwRtAvfsFuses 9: 1
GfxL2FwRtAvfsFuses 10: 1
GfxL2FwRtAvfsFuses 11: 1
GfxL2FwRtAvfsFuses 12: 0
GfxL2FwRtAvfsFuses 13: 3318
GfxL2FwRtAvfsFuses 14: 7374
GfxL2FwRtAvfsFuses 15: 7374
GfxL2FwRtAvfsFuses 16: 7374
GfxL2FwRtAvfsFuses 17: 7374
GfxL2FwRtAvfsFuses 18: 7374
spare_FwRtAvfsFuses:
spare_FwRtAvfsFuses 0: 0
spare_FwRtAvfsFuses 1: 0
spare_FwRtAvfsFuses 2: 0
spare_FwRtAvfsFuses 3: 0
spare_FwRtAvfsFuses 4: 0
spare_FwRtAvfsFuses 5: 0
spare_FwRtAvfsFuses 6: 0
spare_FwRtAvfsFuses 7: 0
spare_FwRtAvfsFuses 8: 0
spare_FwRtAvfsFuses 9: 0
spare_FwRtAvfsFuses 10: 0
spare_FwRtAvfsFuses 11: 0
spare_FwRtAvfsFuses 12: 0
spare_FwRtAvfsFuses 13: 0
spare_FwRtAvfsFuses 14: 0
spare_FwRtAvfsFuses 15: 0
spare_FwRtAvfsFuses 16: 0
spare_FwRtAvfsFuses 17: 0
spare_FwRtAvfsFuses 18: 0
Soc_Droop_PWL_F:
Soc_Droop_PWL_F 0: 1
Soc_Droop_PWL_F 1: 1.8
Soc_Droop_PWL_F 2: 2.7
Soc_Droop_PWL_F 3: 3
Soc_Droop_PWL_F 4: 3.6
Soc_Droop_PWL_a:
Soc_Droop_PWL_a 0: 0.06767
Soc_Droop_PWL_a 1: 0.06767
Soc_Droop_PWL_a 2: 0.06767
Soc_Droop_PWL_a 3: 0.06767
Soc_Droop_PWL_a 4: 0.06767
Soc_Droop_PWL_b:
Soc_Droop_PWL_b 0: 0.05841
Soc_Droop_PWL_b 1: 0.05841
Soc_Droop_PWL_b 2: 0.05841
Soc_Droop_PWL_b 3: 0.05841
Soc_Droop_PWL_b 4: 0.05841
Soc_Droop_PWL_c:
Soc_Droop_PWL_c 0:-0.04782
Soc_Droop_PWL_c 1:-0.04782
Soc_Droop_PWL_c 2:-0.04782
Soc_Droop_PWL_c 3:-0.04782
Soc_Droop_PWL_c 4:-0.04782
Gfx_Droop_PWL_F:
Gfx_Droop_PWL_F 0: 1
Gfx_Droop_PWL_F 1: 2.8
Gfx_Droop_PWL_F 2: 2.88
Gfx_Droop_PWL_F 3: 3.2
Gfx_Droop_PWL_F 4: 3.6
Gfx_Droop_PWL_a:
Gfx_Droop_PWL_a 0: 0.57163
Gfx_Droop_PWL_a 1: 0.57163
Gfx_Droop_PWL_a 2: 0.57163
Gfx_Droop_PWL_a 3: 0.39231
Gfx_Droop_PWL_a 4: 0.39231
Gfx_Droop_PWL_b:
Gfx_Droop_PWL_b 0: 0.02563
Gfx_Droop_PWL_b 1: 0.02563
Gfx_Droop_PWL_b 2: 0.02563
Gfx_Droop_PWL_b 3: 0.19319
Gfx_Droop_PWL_b 4: 0.19319
Gfx_Droop_PWL_c:
Gfx_Droop_PWL_c 0:-0.29534
Gfx_Droop_PWL_c 1:-0.28834
Gfx_Droop_PWL_c 2:-0.28034
Gfx_Droop_PWL_c 3:-0.65435
Gfx_Droop_PWL_c 4:-0.65435
Gfx_Static_PWL_Offset:
Gfx_Static_PWL_Offset 0: 0
Gfx_Static_PWL_Offset 1: 0
Gfx_Static_PWL_Offset 2: 0
Gfx_Static_PWL_Offset 3: 0
Gfx_Static_PWL_Offset 4: 0
Soc_Static_PWL_Offset:
Soc_Static_PWL_Offset 0: 0
Soc_Static_PWL_Offset 1: 0
Soc_Static_PWL_Offset 2: 0
Soc_Static_PWL_Offset 3: 0
Soc_Static_PWL_Offset 4: 0
dGbV_dT_vmin: 0
dGbV_dT_vmax: 0
PaddingV2F:
PaddingV2F 0: 0
PaddingV2F 1: 0
PaddingV2F 2: 0
PaddingV2F 3: 0
DcBtcGfxParams:
DcBtcEnabled: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
DcTol: 20
DcBtcGb: 0
DcBtcMin: 0
DcBtcMax: 0
DcBtcGbScalar:
m: 0
b: 0
SSCurve_GFX:
a: 0.1116
b:-0.2277
c: 0.7467
GfxAvfsSpare:
GfxAvfsSpare 0: 1041026253
GfxAvfsSpare 1: 3196586453
GfxAvfsSpare 2: 1061281386
GfxAvfsSpare 3: 0
GfxAvfsSpare 4: 0
GfxAvfsSpare 5: 0
GfxAvfsSpare 6: 0
GfxAvfsSpare 7: 0
GfxAvfsSpare 8: 0
GfxAvfsSpare 9: 0
GfxAvfsSpare 10: 0
GfxAvfsSpare 11: 0
GfxAvfsSpare 12: 0
GfxAvfsSpare 13: 0
GfxAvfsSpare 14: 0
GfxAvfsSpare 15: 0
GfxAvfsSpare 16: 0
GfxAvfsSpare 17: 0
GfxAvfsSpare 18: 0
GfxAvfsSpare 19: 0
GfxAvfsSpare 20: 0
GfxAvfsSpare 21: 0
GfxAvfsSpare 22: 0
GfxAvfsSpare 23: 0
GfxAvfsSpare 24: 0
GfxAvfsSpare 25: 0
GfxAvfsSpare 26: 0
GfxAvfsSpare 27: 0
GfxAvfsSpare 28: 0
OverrideSocAvfsFuses: 0
MinSocAvfsRevision: 0
SocAvfsPadding:
SocAvfsPadding 0: 0
SocAvfsPadding 1: 0
SocAvfsFuseOverride:
SocAvfsFuseOverride 0:
AvfsTemp:
AvfsTemp 0: 0
AvfsTemp 1: 0
VftFMin: 0
VInversion: 0
qVft:
qVft 0:
a: 0
b: 0
c: 0
qVft 1:
a: 0
b: 0
c: 0
qAvfsGb:
a: 0
b: 0
c: 0
qAvfsGb2:
a: 0
b: 0
c: 0
dBtcGbSoc:
dBtcGbSoc 0:
a: 0
b: 0
c: 0
qAgingGb:
qAgingGb 0:
m: 0
b: 0
qStaticVoltageOffset:
qStaticVoltageOffset 0:
a: 0
b: 0
c: 0
DcBtcSocParams:
DcBtcSocParams 0:
DcBtcEnabled: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
DcTol: 20
DcBtcGb: 0
DcBtcMin: 0
DcBtcMax: 0
DcBtcGbScalar:
m: 0
b: 0
SSCurve_SOC:
a: 0.1511
b:-0.2654
c: 0.7634
SocAvfsSpare:
SocAvfsSpare 0: 3167914190
SocAvfsSpare 1: 1057553488
SocAvfsSpare 2: 0
SocAvfsSpare 3: 0
SocAvfsSpare 4: 0
SocAvfsSpare 5: 0
SocAvfsSpare 6: 0
SocAvfsSpare 7: 0
SocAvfsSpare 8: 0
SocAvfsSpare 9: 0
SocAvfsSpare 10: 0
SocAvfsSpare 11: 0
SocAvfsSpare 12: 0
SocAvfsSpare 13: 0
SocAvfsSpare 14: 0
SocAvfsSpare 15: 0
SocAvfsSpare 16: 0
SocAvfsSpare 17: 0
SocAvfsSpare 18: 0
SocAvfsSpare 19: 0
SocAvfsSpare 20: 0
SocAvfsSpare 21: 0
SocAvfsSpare 22: 0
SocAvfsSpare 23: 0
SocAvfsSpare 24: 0
SocAvfsSpare 25: 0
SocAvfsSpare 26: 0
SocAvfsSpare 27: 0
SocAvfsSpare 28: 0
BootValues:
InitImuClk: 600
InitSocclk: 418
InitMpioclk: 500
InitSmnclk: 500
InitDispClk: 600
InitDppClk: 600
InitDprefclk: 720
InitDcfclk: 720
InitDtbclk: 720
InitDbguSocClk: 0
InitGfxclk_bypass: 1000
InitMp1clk: 500
InitLclk: 1143
InitDbguBacoClk: 0
InitBaco400clk: 400
InitBaco1200clk_bypass: 1143
InitBaco700clk_bypass: 696
InitBaco500clk: 500
InitDclk0: 0
InitVclk0: 0
InitFclk: 1000
Padding1: 1200
InitUclkLevel: 5
Padding:
Padding 0: 2
Padding 1: 244
Padding 2: 1
InitVcoFreqPll0: 4800
InitVcoFreqPll1: 4500
InitVcoFreqPll2: 4000
InitVcoFreqPll3: 0
InitVcoFreqPll4: 2000
InitVcoFreqPll5: 4000
InitVcoFreqPll6: 4000
InitVcoFreqPll7: 4000
InitVcoFreqPll8: 4000
InitGfx: 0
InitSoc: 3300
InitVddIoMem: 5000
InitVddCiMem: 2800
Spare:
Spare 0: 4000
Spare 1: 183500800
Spare 2: 183505800
Spare 3: 0
Spare 4: 0
Spare 5: 0
Spare 6: 0
Spare 7: 0
DriverReportedClocks:
BaseClockAc: 1240
GameClockAc: 2070
BoostClockAc: 2520
BaseClockDc: 0
GameClockDc: 0
BoostClockDc: 0
MaxReportedClock: 3400
Padding: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
MsgLimits:
Power:
Power 0:
0 0: 245
0 1: 245
Power 1:
1 0: 1200
1 1: 1200
Power 2:
2 0: 0
2 1: 0
Power 3:
3 0: 0
3 1: 0
Tdc:
Tdc 0: 330
Tdc 1: 84
Temperature:
Temperature 0: 110
Temperature 1: 110
Temperature 2: 0
Temperature 3: 0
Temperature 4: 108
Temperature 5: 115
Temperature 6: 115
Temperature 7: 115
Temperature 8: 115
Temperature 9: 0
Temperature 10: 0
Temperature 11: 0
PwmLimitMin: 0
PwmLimitMax: 255
FanTargetTemperature: 110
Spare1:
Spare1 0: 0
AcousticTargetRpmThresholdMin: 500
AcousticTargetRpmThresholdMax: 6000
AcousticLimitRpmThresholdMin: 500
AcousticLimitRpmThresholdMax: 6000
PccLimitMin: 0
PccLimitMax: 0
FanStopTempMin: 30
FanStopTempMax: 80
FanStartTempMin: 40
FanStartTempMax: 90
PowerMinPpt0:
PowerMinPpt0 0: 0
PowerMinPpt0 1: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
Spare 5: 0
Spare 6: 0
Spare 7: 0
Spare 8: 0
Spare 9: 0
Spare 10: 0
OverDriveLimitsBasicMin:
FeatureCtrlMask: 6969
VoltageOffsetPerZoneBoundary:
VoltageOffsetPerZoneBoundary 0: -200
VoltageOffsetPerZoneBoundary 1: -200
VoltageOffsetPerZoneBoundary 2: -200
VoltageOffsetPerZoneBoundary 3: -200
VoltageOffsetPerZoneBoundary 4: -200
VoltageOffsetPerZoneBoundary 5: -200
VddGfxVmax: 0
VddSocVmax: 0
GfxclkFoffset: -500
Padding: 0
UclkFmin: 97
UclkFmax: 97
FclkFmin: 0
FclkFmax: 0
Ppt: -30
Tdc: 0
FanLinearPwmPoints:
FanLinearPwmPoints 0: 25
FanLinearPwmPoints 1: 25
FanLinearPwmPoints 2: 25
FanLinearPwmPoints 3: 25
FanLinearPwmPoints 4: 25
FanLinearPwmPoints 5: 25
FanLinearTempPoints:
FanLinearTempPoints 0: 25
FanLinearTempPoints 1: 25
FanLinearTempPoints 2: 25
FanLinearTempPoints 3: 25
FanLinearTempPoints 4: 25
FanLinearTempPoints 5: 25
FanMinimumPwm: 25
AcousticTargetRpmThreshold: 500
AcousticLimitRpmThreshold: 500
FanTargetTemperature: 25
FanZeroRpmEnable: 0
MaxOpTemp: 50
Padding1:
Padding1 0: 0
Padding1 1: 0
GfxVoltageFullCtrlMode: 0
SocVoltageFullCtrlMode: 0
GfxclkFullCtrlMode: 0
UclkFullCtrlMode: 0
FclkFullCtrlMode: 0
GfxEdc: 0
GfxPccLimitControl: 0
Padding2: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
OverDriveLimitsBasicMax:
FeatureCtrlMask: 6969
VoltageOffsetPerZoneBoundary:
VoltageOffsetPerZoneBoundary 0: 0
VoltageOffsetPerZoneBoundary 1: 0
VoltageOffsetPerZoneBoundary 2: 0
VoltageOffsetPerZoneBoundary 3: 0
VoltageOffsetPerZoneBoundary 4: 0
VoltageOffsetPerZoneBoundary 5: 0
VddGfxVmax: 0
VddSocVmax: 0
GfxclkFoffset: 1000
Padding: 0
UclkFmin: 1500
UclkFmax: 1500
FclkFmin: 0
FclkFmax: 0
Ppt: 10
Tdc: 0
FanLinearPwmPoints:
FanLinearPwmPoints 0: 100
FanLinearPwmPoints 1: 100
FanLinearPwmPoints 2: 100
FanLinearPwmPoints 3: 100
FanLinearPwmPoints 4: 100
FanLinearPwmPoints 5: 100
FanLinearTempPoints:
FanLinearTempPoints 0: 100
FanLinearTempPoints 1: 100
FanLinearTempPoints 2: 100
FanLinearTempPoints 3: 100
FanLinearTempPoints 4: 100
FanLinearTempPoints 5: 100
FanMinimumPwm: 100
AcousticTargetRpmThreshold: 3650
AcousticLimitRpmThreshold: 3650
FanTargetTemperature: 105
FanZeroRpmEnable: 1
MaxOpTemp: 110
Padding1:
Padding1 0: 0
Padding1 1: 0
GfxVoltageFullCtrlMode: 0
SocVoltageFullCtrlMode: 0
GfxclkFullCtrlMode: 0
UclkFullCtrlMode: 0
FclkFullCtrlMode: 0
GfxEdc: 0
GfxPccLimitControl: 0
Padding2: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
OverDriveLimitsAdvancedMin:
FeatureCtrlMask: 0
VoltageOffsetPerZoneBoundary:
VoltageOffsetPerZoneBoundary 0: 0
VoltageOffsetPerZoneBoundary 1: 0
VoltageOffsetPerZoneBoundary 2: 0
VoltageOffsetPerZoneBoundary 3: 0
VoltageOffsetPerZoneBoundary 4: 0
VoltageOffsetPerZoneBoundary 5: 0
VddGfxVmax: 0
VddSocVmax: 0
GfxclkFoffset: 0
Padding: 0
UclkFmin: 0
UclkFmax: 0
FclkFmin: 0
FclkFmax: 0
Ppt: 0
Tdc: 0
FanLinearPwmPoints:
FanLinearPwmPoints 0: 0
FanLinearPwmPoints 1: 0
FanLinearPwmPoints 2: 0
FanLinearPwmPoints 3: 0
FanLinearPwmPoints 4: 0
FanLinearPwmPoints 5: 0
FanLinearTempPoints:
FanLinearTempPoints 0: 0
FanLinearTempPoints 1: 0
FanLinearTempPoints 2: 0
FanLinearTempPoints 3: 0
FanLinearTempPoints 4: 0
FanLinearTempPoints 5: 0
FanMinimumPwm: 0
AcousticTargetRpmThreshold: 0
AcousticLimitRpmThreshold: 0
FanTargetTemperature: 0
FanZeroRpmEnable: 0
MaxOpTemp: 0
Padding1:
Padding1 0: 0
Padding1 1: 0
GfxVoltageFullCtrlMode: 0
SocVoltageFullCtrlMode: 0
GfxclkFullCtrlMode: 0
UclkFullCtrlMode: 0
FclkFullCtrlMode: 0
GfxEdc: 0
GfxPccLimitControl: 0
Padding2: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
OverDriveLimitsAdvancedMax:
FeatureCtrlMask: 0
VoltageOffsetPerZoneBoundary:
VoltageOffsetPerZoneBoundary 0: 0
VoltageOffsetPerZoneBoundary 1: 0
VoltageOffsetPerZoneBoundary 2: 0
VoltageOffsetPerZoneBoundary 3: 0
VoltageOffsetPerZoneBoundary 4: 0
VoltageOffsetPerZoneBoundary 5: 0
VddGfxVmax: 0
VddSocVmax: 0
GfxclkFoffset: 0
Padding: 0
UclkFmin: 0
UclkFmax: 0
FclkFmin: 0
FclkFmax: 0
Ppt: 0
Tdc: 0
FanLinearPwmPoints:
FanLinearPwmPoints 0: 0
FanLinearPwmPoints 1: 0
FanLinearPwmPoints 2: 0
FanLinearPwmPoints 3: 0
FanLinearPwmPoints 4: 0
FanLinearPwmPoints 5: 0
FanLinearTempPoints:
FanLinearTempPoints 0: 0
FanLinearTempPoints 1: 0
FanLinearTempPoints 2: 0
FanLinearTempPoints 3: 0
FanLinearTempPoints 4: 0
FanLinearTempPoints 5: 0
FanMinimumPwm: 0
AcousticTargetRpmThreshold: 0
AcousticLimitRpmThreshold: 0
FanTargetTemperature: 0
FanZeroRpmEnable: 0
MaxOpTemp: 0
Padding1:
Padding1 0: 0
Padding1 1: 0
GfxVoltageFullCtrlMode: 0
SocVoltageFullCtrlMode: 0
GfxclkFullCtrlMode: 0
UclkFullCtrlMode: 0
FclkFullCtrlMode: 0
GfxEdc: 0
GfxPccLimitControl: 0
Padding2: 0
Spare:
Spare 0: 0
Spare 1: 0
Spare 2: 0
Spare 3: 0
Spare 4: 0
TotalBoardPowerSupport: 0
TotalBoardPowerPadding:
TotalBoardPowerPadding 0: 0
TotalBoardPowerRoc: 0
qFeffCoeffGameClock:
qFeffCoeffGameClock 0:
a: 0.01852
b:-2.95472
c: 1824.84
qFeffCoeffGameClock 1:
a: 0
b: 0
c: 0
qFeffCoeffBaseClock:
qFeffCoeffBaseClock 0:
a: 0.08559
b:-31.9188
c: 4128.76
qFeffCoeffBaseClock 1:
a: 0
b: 0
c: 0
qFeffCoeffBoostClock:
qFeffCoeffBoostClock 0:
a:-0.0121
b: 12.7634
c: 300.984
qFeffCoeffBoostClock 1:
a: 0
b: 0
c: 0
AptUclkGfxclkLookup:
AptUclkGfxclkLookup 0:
0 0: 0
0 1: 933
0 2: 1717
0 3: 2062
0 4: 2307
0 5: 2800
AptUclkGfxclkLookup 1:
1 0: 0
1 1: 933
1 2: 1717
1 3: 2062
1 4: 2307
1 5: 2800
AptUclkGfxclkLookupHyst:
AptUclkGfxclkLookupHyst 0:
0 0: 100
0 1: 477
0 2: 106
0 3: 389
0 4: 136
0 5: 100
AptUclkGfxclkLookupHyst 1:
1 0: 100
1 1: 477
1 2: 106
1 3: 389
1 4: 136
1 5: 100
AptPadding: 0
GfxXvminDidtDroopThresh:
a: 0
b: 1
c:-0.1
GfxXvminDidtResetDDWait: 80
GfxXvminDidtClkStopWait: 1
GfxXvminDidtFcsStepCtrl: 2589730
GfxXvminDidtFcsWaitCtrl: 983055
PsmModeEnabled: 9
P2v_a: 0
P2v_b: 0
P2v_c: 0
T2p_a: 0
T2p_b: 0
T2p_c: 0
P2vTemp: 0
PsmDidtStaticSettings:
a: 0
b: 0.8
c: 0.005
PsmDidtDynamicSettings:
a: 0
b: 0
c: 0.03
PsmDidtAvgDiv: 1
PsmDidtForceStall: 0
PsmDidtReleaseTimer: 16
PsmDidtStallPattern: 21845
CacEdcCacLeakageC0: 5.17
CacEdcCacLeakageC1:-6.91
CacEdcCacLeakageC2: 0.01487
CacEdcCacLeakageC3: 0.06567
CacEdcCacLeakageC4: 5.83203
CacEdcCacLeakageC5:-0.04901
CacEdcGfxClkScalar: 0
CacEdcGfxClkIntercept: 0
CacEdcCac_m: 68.8
CacEdcCac_b: 26.9
CacEdcCurrLimitGuardband: 0
CacEdcDynToTotalCacRatio: 0
XVmin_Gfx_EdcThreshScalar: 0.84
XVmin_Gfx_EdcEnableFreq: 0
XVmin_Gfx_EdcPccAsStepCtrl: 2065462
XVmin_Gfx_EdcPccAsWaitCtrl: 4194368
XVmin_Gfx_EdcThreshold: 50
XVmin_Gfx_EdcFiltHysWaitCtrl: 200
XVmin_Soc_EdcThreshScalar: 1.26
XVmin_Soc_EdcEnableFreq: 0
XVmin_Soc_EdcThreshold: 50
XVmin_Soc_EdcStepUpTime: 10
XVmin_Soc_EdcStepDownTime: 10
XVmin_Soc_EdcInitPccStep: 5
PaddingSocEdc:
PaddingSocEdc 0: 0
PaddingSocEdc 1: 0
PaddingSocEdc 2: 0
GfxXvminFuseOverride: 0
SocXvminFuseOverride: 0
PaddingXvminFuseOverride:
PaddingXvminFuseOverride 0: 0
PaddingXvminFuseOverride 1: 0
GfxXvminFddTempLow: 0
GfxXvminFddTempHigh: 0
SocXvminFddTempLow: 0
SocXvminFddTempHigh: 0
GfxXvminFddVolt0: 0
GfxXvminFddVolt1: 0
GfxXvminFddVolt2: 0
SocXvminFddVolt0: 0
SocXvminFddVolt1: 0
SocXvminFddVolt2: 0
GfxXvminDsFddDsm:
GfxXvminDsFddDsm 0: 0
GfxXvminDsFddDsm 1: 0
GfxXvminDsFddDsm 2: 0
GfxXvminDsFddDsm 3: 0
GfxXvminDsFddDsm 4: 0
GfxXvminDsFddDsm 5: 0
GfxXvminEdcFddDsm:
GfxXvminEdcFddDsm 0: 0
GfxXvminEdcFddDsm 1: 0
GfxXvminEdcFddDsm 2: 0
GfxXvminEdcFddDsm 3: 0
GfxXvminEdcFddDsm 4: 0
GfxXvminEdcFddDsm 5: 0
SocXvminEdcFddDsm:
SocXvminEdcFddDsm 0: 0
SocXvminEdcFddDsm 1: 0
SocXvminEdcFddDsm 2: 0
SocXvminEdcFddDsm 3: 0
SocXvminEdcFddDsm 4: 0
SocXvminEdcFddDsm 5: 0
Spare: 9830500
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
CustomSkuTable:
SocketPowerLimitAc:
SocketPowerLimitAc 0: 220
SocketPowerLimitAc 1: 1200
SocketPowerLimitAc 2: 0
SocketPowerLimitAc 3: 0
VrTdcLimit:
VrTdcLimit 0: 330
VrTdcLimit 1: 84
TotalIdleBoardPowerM: 0
TotalIdleBoardPowerB: 0
TotalBoardPowerM: 0
TotalBoardPowerB: 0
TemperatureLimit:
TemperatureLimit 0: 110
TemperatureLimit 1: 110
TemperatureLimit 2: 0
TemperatureLimit 3: 0
TemperatureLimit 4: 108
TemperatureLimit 5: 105
TemperatureLimit 6: 105
TemperatureLimit 7: 105
TemperatureLimit 8: 105
TemperatureLimit 9: 0
TemperatureLimit 10: 0
TemperatureLimit 11: 0
FanStopTemp:
FanStopTemp 0: 0
FanStopTemp 1: 50
FanStopTemp 2: 0
FanStopTemp 3: 0
FanStopTemp 4: 65
FanStopTemp 5: 65
FanStopTemp 6: 65
FanStopTemp 7: 65
FanStopTemp 8: 65
FanStopTemp 9: 0
FanStopTemp 10: 0
FanStopTemp 11: 0
FanStartTemp:
FanStartTemp 0: 0
FanStartTemp 1: 60
FanStartTemp 2: 0
FanStartTemp 3: 0
FanStartTemp 4: 80
FanStartTemp 5: 80
FanStartTemp 6: 80
FanStartTemp 7: 80
FanStartTemp 8: 80
FanStartTemp 9: 0
FanStartTemp 10: 0
FanStartTemp 11: 0
FanGain:
FanGain 0: 0
FanGain 1: 400
FanGain 2: 0
FanGain 3: 0
FanGain 4: 400
FanGain 5: 400
FanGain 6: 400
FanGain 7: 400
FanGain 8: 400
FanGain 9: 0
FanGain 10: 0
FanGain 11: 0
FanPwmMin: 25
AcousticTargetRpmThreshold: 1300
AcousticLimitRpmThreshold: 3300
FanMaximumRpm: 3650
MGpuAcousticLimitRpmThreshold: 4000
FanTargetGfxclk: 500
TempInputSelectMask: 498
FanZeroRpmEnable: 1
FanTachEdgePerRev: 2
FanPadding: 0
FanTargetTemperature:
FanTargetTemperature 0: 0
FanTargetTemperature 1: 88
FanTargetTemperature 2: 0
FanTargetTemperature 3: 0
FanTargetTemperature 4: 88
FanTargetTemperature 5: 90
FanTargetTemperature 6: 90
FanTargetTemperature 7: 90
FanTargetTemperature 8: 90
FanTargetTemperature 9: 0
FanTargetTemperature 10: 0
FanTargetTemperature 11: 0
FuzzyFan_ErrorSetDelta: 0
FuzzyFan_ErrorRateSetDelta: 0
FuzzyFan_PwmSetDelta: 0
FanPadding2: 0
FwCtfLimit:
FwCtfLimit 0: 115
FwCtfLimit 1: 118
FwCtfLimit 2: 0
FwCtfLimit 3: 0
FwCtfLimit 4: 115
FwCtfLimit 5: 115
FwCtfLimit 6: 115
FwCtfLimit 7: 115
FwCtfLimit 8: 115
FwCtfLimit 9: 0
FwCtfLimit 10: 0
FwCtfLimit 11: 0
IntakeTempEnableRPM: 0
IntakeTempOffsetTemp: 0
IntakeTempReleaseTemp: 0
IntakeTempHighIntakeAcousticLimit: 0
IntakeTempAcouticLimitReleaseRate: 0
FanAbnormalTempLimitOffset: 0
FanStalledTriggerRpm: 250
FanAbnormalTriggerRpmCoeff: 85
FanSpare:
FanSpare 0: 1
FanIntakeSensorSupport: 0
FanIntakePadding: 0
FanSpare2:
FanSpare2 0: 0
FanSpare2 1: 0
FanSpare2 2: 0
FanSpare2 3: 0
FanSpare2 4: 0
FanSpare2 5: 0
FanSpare2 6: 0
FanSpare2 7: 0
FanSpare2 8: 0
FanSpare2 9: 0
FanSpare2 10: 0
FanSpare2 11: 0
ODFeatureCtrlMask: 0
TemperatureLimit_Hynix: 108
TemperatureLimit_Micron: 105
TemperatureFwCtfLimit_Hynix: 115
TemperatureFwCtfLimit_Micron: 113
PlatformTdcLimit:
PlatformTdcLimit 0: 330
PlatformTdcLimit 1: 84
SocketPowerLimitDc:
SocketPowerLimitDc 0: 220
SocketPowerLimitDc 1: 1200
SocketPowerLimitDc 2: 0
SocketPowerLimitDc 3: 0
SocketPowerLimitSmartShift2: 0
CustomSkuSpare16b: 0
CustomSkuSpare32b:
CustomSkuSpare32b 0: 0
CustomSkuSpare32b 1: 0
CustomSkuSpare32b 2: 0
CustomSkuSpare32b 3: 0
CustomSkuSpare32b 4: 0
CustomSkuSpare32b 5: 0
CustomSkuSpare32b 6: 0
CustomSkuSpare32b 7: 0
CustomSkuSpare32b 8: 0
CustomSkuSpare32b 9: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
BoardTable:
Version: 0
I2cControllers:
I2cControllers 0:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 1:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 2:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 3:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 4:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 5:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 6:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
I2cControllers 7:
Enabled: 0
Speed: 0
SlaveAddress: 0
ControllerPort: 0
ControllerName: 0
ThermalThrotter: 0
I2cProtocol: 0
PaddingConfig: 0
SlaveAddrMapping:
SlaveAddrMapping 0: 0
SlaveAddrMapping 1: 0
SlaveAddrMapping 2: 0
SlaveAddrMapping 3: 0
VrPsiSupport:
VrPsiSupport 0: 0
VrPsiSupport 1: 0
VrPsiSupport 2: 0
VrPsiSupport 3: 0
Svi3SvcSpeed: 0
EnablePsi6:
EnablePsi6 0: 0
EnablePsi6 1: 0
EnablePsi6 2: 0
EnablePsi6 3: 0
Svi3RegSettings:
Svi3RegSettings 0:
SlewRateConditions: 0
LoadLineAdjust: 0
VoutOffset: 0
VidMax: 0
VidMin: 0
TenBitTelEn: 0
SixteenBitTelEn: 0
OcpThresh: 0
OcpWarnThresh: 0
OcpSettings: 0
VrhotThresh: 0
OtpThresh: 0
UvpOvpDeltaRef: 0
PhaseShed: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
Padding 3: 0
Padding 4: 0
Padding 5: 0
Padding 6: 0
Padding 7: 0
Padding 8: 0
Padding 9: 0
SettingOverrideMask: 0
Svi3RegSettings 1:
SlewRateConditions: 0
LoadLineAdjust: 0
VoutOffset: 0
VidMax: 0
VidMin: 0
TenBitTelEn: 0
SixteenBitTelEn: 0
OcpThresh: 0
OcpWarnThresh: 0
OcpSettings: 0
VrhotThresh: 0
OtpThresh: 0
UvpOvpDeltaRef: 0
PhaseShed: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
Padding 3: 0
Padding 4: 0
Padding 5: 0
Padding 6: 0
Padding 7: 0
Padding 8: 0
Padding 9: 0
SettingOverrideMask: 0
Svi3RegSettings 2:
SlewRateConditions: 0
LoadLineAdjust: 0
VoutOffset: 0
VidMax: 0
VidMin: 0
TenBitTelEn: 0
SixteenBitTelEn: 0
OcpThresh: 0
OcpWarnThresh: 0
OcpSettings: 0
VrhotThresh: 0
OtpThresh: 0
UvpOvpDeltaRef: 0
PhaseShed: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
Padding 3: 0
Padding 4: 0
Padding 5: 0
Padding 6: 0
Padding 7: 0
Padding 8: 0
Padding 9: 0
SettingOverrideMask: 0
Svi3RegSettings 3:
SlewRateConditions: 0
LoadLineAdjust: 0
VoutOffset: 0
VidMax: 0
VidMin: 0
TenBitTelEn: 0
SixteenBitTelEn: 0
OcpThresh: 0
OcpWarnThresh: 0
OcpSettings: 0
VrhotThresh: 0
OtpThresh: 0
UvpOvpDeltaRef: 0
PhaseShed: 0
Padding:
Padding 0: 0
Padding 1: 0
Padding 2: 0
Padding 3: 0
Padding 4: 0
Padding 5: 0
Padding 6: 0
Padding 7: 0
Padding 8: 0
Padding 9: 0
SettingOverrideMask: 0
LedOffGpio: 0
FanOffGpio: 0
GfxVrPowerStageOffGpio: 0
AcDcGpio: 0
AcDcPolarity: 0
VR0HotGpio: 0
VR0HotPolarity: 0
GthrGpio: 0
GthrPolarity: 0
LedPin0: 0
LedPin1: 0
LedPin2: 0
LedEnableMask: 0
LedPcie: 0
LedError: 0
PaddingLed: 0
UclkTrainingModeSpreadPercent: 0
UclkSpreadPadding: 0
UclkSpreadFreq: 0
UclkSpreadPercent:
UclkSpreadPercent 0: 0
UclkSpreadPercent 1: 0
UclkSpreadPercent 2: 0
UclkSpreadPercent 3: 0
UclkSpreadPercent 4: 0
UclkSpreadPercent 5: 0
UclkSpreadPercent 6: 0
UclkSpreadPercent 7: 0
UclkSpreadPercent 8: 0
UclkSpreadPercent 9: 0
UclkSpreadPercent 10: 0
UclkSpreadPercent 11: 0
UclkSpreadPercent 12: 0
UclkSpreadPercent 13: 0
UclkSpreadPercent 14: 0
UclkSpreadPercent 15: 0
GfxclkSpreadEnable: 0
FclkSpreadPercent: 0
FclkSpreadFreq: 0
DramWidth: 0
PaddingMem1:
PaddingMem1 0: 0
PaddingMem1 1: 0
PaddingMem1 2: 0
PaddingMem1 3: 0
PaddingMem1 4: 0
PaddingMem1 5: 0
PaddingMem1 6: 0
HsrEnabled: 0
VddqOffEnabled: 0
PaddingUmcFlags:
PaddingUmcFlags 0: 0
PaddingUmcFlags 1: 0
Paddign1: 0
BacoEntryDelay: 0
FuseWritePowerMuxPresent: 0
FuseWritePadding:
FuseWritePadding 0: 0
FuseWritePadding 1: 0
FuseWritePadding 2: 0
LoadlineGfx: 0
LoadlineSoc: 0
GfxEdcLimit: 0
SocEdcLimit: 0
RestBoardPower: 0
ConnectorsImpedance: 0
EpcsSens0: 0
EpcsSens1: 0
PaddingEpcs:
PaddingEpcs 0: 0
PaddingEpcs 1: 0
BoardSpare:
BoardSpare 0: 0
BoardSpare 1: 0
BoardSpare 2: 0
BoardSpare 3: 0
BoardSpare 4: 0
BoardSpare 5: 0
BoardSpare 6: 0
BoardSpare 7: 0
BoardSpare 8: 0
BoardSpare 9: 0
BoardSpare 10: 0
BoardSpare 11: 0
BoardSpare 12: 0
BoardSpare 13: 0
BoardSpare 14: 0
BoardSpare 15: 0
BoardSpare 16: 0
BoardSpare 17: 0
BoardSpare 18: 0
BoardSpare 19: 0
BoardSpare 20: 0
BoardSpare 21: 0
BoardSpare 22: 0
BoardSpare 23: 0
BoardSpare 24: 0
BoardSpare 25: 0
BoardSpare 26: 0
BoardSpare 27: 0
BoardSpare 28: 0
BoardSpare 29: 0
BoardSpare 30: 0
BoardSpare 31: 0
BoardSpare 32: 0
BoardSpare 33: 0
BoardSpare 34: 0
BoardSpare 35: 0
BoardSpare 36: 0
BoardSpare 37: 0
BoardSpare 38: 0
BoardSpare 39: 0
BoardSpare 40: 0
BoardSpare 41: 0
BoardSpare 42: 0
BoardSpare 43: 0
BoardSpare 44: 0
BoardSpare 45: 0
BoardSpare 46: 0
BoardSpare 47: 0
BoardSpare 48: 0
BoardSpare 49: 0
BoardSpare 50: 0
BoardSpare 51: 0
MmHubPadding:
MmHubPadding 0: 0
MmHubPadding 1: 0
MmHubPadding 2: 0
MmHubPadding 3: 0
MmHubPadding 4: 0
MmHubPadding 5: 0
MmHubPadding 6: 0
MmHubPadding 7: 0
================================================
FILE: test/Powercolor.RX9070.16384.241204_1.rom.rawdump
================================================
PowerPlay table rev 23.0 size 5812 bytes
Offset (dec.) t Raw val. Variable name Decoded value
------------------------------------------------------------------------------
0x0000 (0000) H b416 structuresize : 5812
0x0002 (0002) B 17 format_revision : 23
0x0003 (0003) B 00 content_revision : 0
0x0004 (0004) B 05 table_revision : 5
0x0005 (0005) B 00 pptable_source : 0
0x0006 (0006) H 4005 pmfw_pptable_start_offset : 1344
0x0008 (0008) H 7411 pmfw_pptable_size : 4468
0x000a (0010) H 5c05 pmfw_sku_table_start_offset : 1372
0x000c (0012) H e00d pmfw_sku_table_size : 3552
0x000e (0014) H a414 pmfw_board_table_start_offset : 5284
0x0010 (0016) H 1002 pmfw_board_table_size : 528
0x0012 (0018) H 3c13 pmfw_custom_sku_table_start_offset : 4924
0x0014 (0020) H 6801 pmfw_custom_sku_table_size : 360
0x0016 (0022) I a6110000 golden_pp_id : 4518
0x001a (0026) I f25b0000 golden_revision : 23538
0x001e (0030) H 8800 format_id : 136
0x0020 (0032) I 08000000 platform_caps : 8
0x0024 (0036) B 20 thermal_controller_type : 32
0x0025 (0037) H 0000 small_power_limit1 : 0
0x0027 (0039) H 0000 small_power_limit2 : 0
0x0029 (0041) H 0000 boost_power_limit : 0
0x002b (0043) H 7600 software_shutdown_temp : 118
0x002d (0045) B 00 reserve : 0
0x002e (0046) B 00 reserve : 0
0x002f (0047) B 00 reserve : 0
0x0030 (0048) B 00 reserve : 0
0x0031 (0049) B 00 reserve : 0
0x0032 (0050) B 00 reserve : 0
0x0033 (0051) B 00 reserve : 0
0x0034 (0052) B 00 reserve : 0
0x0035 (0053) B 00 reserve : 0
0x0036 (0054) B 00 reserve : 0
0x0037 (0055) B 00 reserve : 0
0x0038 (0056) B 00 reserve : 0
0x0039 (0057) B 00 reserve : 0
0x003a (0058) B 00 reserve : 0
0x003b (0059) B 00 reserve : 0
0x003c (0060) B 02 reserve : 2
0x003d (0061) B 00 reserve : 0
0x003e (0062) B 00 reserve : 0
0x003f (0063) B 00 reserve : 0
0x0040 (0064) B 00 reserve : 0
0x0041 (0065) B 01 reserve : 1
0x0042 (0066) B 01 reserve : 1
0x0043 (0067) B 01 reserve : 1
0x0044 (0068) B 01 reserve : 1
0x0045 (0069) B 01 reserve : 1
0x0046 (0070) B 00 reserve : 0
0x0047 (0071) B 00 reserve : 0
0x0048 (0072) B 00 reserve : 0
0x0049 (0073) B 01 reserve : 1
0x004a (0074) B 00 reserve : 0
0x004b (0075) B 00 reserve : 0
0x004c (0076) B 00 reserve : 0
0x004d (0077) B 00 reserve : 0
0x004e (0078) B 00 reserve : 0
0x004f (0079) B 00 reserve : 0
0x0050 (0080) B 00 reserve : 0
0x0051 (0081) B 00 reserve : 0
0x0052 (0082) B 00 reserve : 0
0x0053 (0083) B 00 reserve : 0
0x0054 (0084) B 00 reserve : 0
0x0055 (0085) B 00 reserve : 0
0x0056 (0086) B 00 reserve : 0
0x0057 (0087) B 00 reserve : 0
0x0058 (0088) B 00 reserve : 0
0x0059 (0089) B 00 reserve : 0
0x005a (0090) B 00 reserve : 0
0x005b (0091) B 00 reserve : 0
0x005c (0092) B 00 reserve : 0
0x005d (0093) B 00 reserve : 0
0x005e (0094) B 00 reserve : 0
0x005f (0095) B 00 reserve : 0
0x0060 (0096) B 00 reserve : 0
0x0061 (0097) B 00 reserve : 0
0x0062 (0098) B 00 reserve : 0
0x0063 (0099) B 00 reserve : 0
0x0064 (0100) B 00 reserve : 0
0x0065 (0101) B 00 reserve : 0
0x0066 (0102) B 00 reserve : 0
0x0067 (0103) B 00 reserve : 0
0x0068 (0104) B 00 reserve : 0
0x0069 (0105) B 00 reserve : 0
0x006a (0106) B 00 reserve : 0
0x006b (0107) B 00 reserve : 0
0x006c (0108) B 00 reserve : 0
0x006d (0109) B 00 reserve : 0
0x006e (0110) B 00 reserve : 0
0x006f (0111) B 00 reserve : 0
0x0070 (0112) B 00 reserve : 0
0x0071 (0113) B 00 reserve : 0
0x0072 (0114) B 00 reserve : 0
0x0073 (0115) B 00 reserve : 0
0x0074 (0116) B 00 reserve : 0
0x0075 (0117) B 00 reserve : 0
0x0076 (0118) B 00 reserve : 0
0x0077 (0119) B 00 reserve : 0
0x0078 (0120) B 00 reserve : 0
0x0079 (0121) B 00 reserve : 0
0x007a (0122) B 00 reserve : 0
0x007b (0123) B 00 reserve : 0
0x007c (0124) B 00 reserve : 0
0x007d (0125) B 00 reserve : 0
0x007e (0126) B 00 reserve : 0
0x007f (0127) B 00 reserve : 0
0x0080 (0128) B 00 reserve : 0
0x0081 (0129) B 00 reserve : 0
0x0082 (0130) B 00 reserve : 0
0x0083 (0131) B 00 reserve : 0
0x0084 (0132) B 01 reserve : 1
0x0085 (0133) B 00 reserve : 0
0x0086 (0134) B 00 reserve : 0
0x0087 (0135) B 00 reserve : 0
0x0088 (0136) B 01 reserve : 1
0x0089 (0137) B 00 reserve : 0
0x008a (0138) B 00 reserve : 0
0x008b (0139) B 00 reserve : 0
0x008c (0140) B 01 reserve : 1
0x008d (0141) B 00 reserve : 0
0x008e (0142) B 00 reserve : 0
0x008f (0143) B 00 reserve : 0
0x0090 (0144) B 01 reserve : 1
0x0091 (0145) B 00 reserve : 0
0x0092 (0146) B 00 reserve : 0
0x0093 (0147) B 00 reserve : 0
0x0094 (0148) B 01 reserve : 1
0x0095 (0149) B 00 reserve : 0
0x0096 (0150) B 00 reserve : 0
0x0097 (0151) B 00 reserve : 0
0x0098 (0152) B 00 reserve : 0
0x0099 (0153) B 00 reserve : 0
0x009a (0154) B 00 reserve : 0
0x009b (0155) B 00 reserve : 0
0x009c (0156) B 00 reserve : 0
0x009d (0157) B 00 reserve : 0
0x009e (0158) B 00 reserve : 0
0x009f (0159) B 00 reserve : 0
0x00a0 (0160) B 00 reserve : 0
0x00a1 (0161) B 00 reserve : 0
0x00a2 (0162) B 00 reserve : 0
0x00a3 (0163) B 00 reserve : 0
0x00a4 (0164) B 01 reserve : 1
0x00a5 (0165) B 00 reserve : 0
0x00a6 (0166) B 00 reserve : 0
0x00a7 (0167) B 00 reserve : 0
0x00a8 (0168) B 00 reserve : 0
0x00a9 (0169) B 00 reserve : 0
0x00aa (0170) B 00 reserve : 0
0x00ab (0171) B 00 reserve : 0
0x00ac (0172) B 00 reserve : 0
0x00ad (0173) B 00 reserve : 0
0x00ae (0174) B 00 reserve : 0
0x00af (0175) B 00 reserve : 0
0x00b0 (0176) B 00 reserve : 0
0x00b1 (0177) B 00 reserve : 0
0x00b2 (0178) B 00 reserve : 0
0x00b3 (0179) B 00 reserve : 0
0x00b4 (0180) B 00 reserve : 0
0x00b5 (0181) B 00 reserve : 0
0x00b6 (0182) B 00 reserve : 0
0x00b7 (0183) B 00 reserve : 0
0x00b8 (0184) B 00 reserve : 0
0x00b9 (0185) B 00 reserve : 0
0x00ba (0186) B 00 reserve : 0
0x00bb (0187) B 00 reserve : 0
0x00bc (0188) B 00 revision : 0
0x00bd (0189) B 00 reserve : 0
0x00be (0190) B 00 reserve : 0
0x00bf (0191) B 00 reserve : 0
0x00c0 (0192) B 00 cap : 0
0x00c1 (0193) B 00 cap : 0
0x00c2 (0194) B 00 cap : 0
0x00c3 (0195) B 00 cap : 0
0x00c4 (0196) B 00 cap : 0
0x00c5 (0197) B 00 cap : 0
0x00c6 (0198) B 00 cap : 0
0x00c7 (0199) B 00 cap : 0
0x00c8 (0200) B 00 cap : 0
0x00c9 (0201) B 00 cap : 0
0x00ca (0202) B 00 cap : 0
0x00cb (0203) B 00 cap : 0
0x00cc (0204) B 00 cap : 0
0x00cd (0205) B 00 cap : 0
0x00ce (0206) B 00 cap : 0
0x00cf (0207) B 00 cap : 0
0x00d0 (0208) B 00 cap : 0
0x00d1 (0209) B 00 cap : 0
0x00d2 (0210) B 00 cap : 0
0x00d3 (0211) B 00 cap : 0
0x00d4 (0212) B 00 cap : 0
0x00d5 (0213) B 00 cap : 0
0x00d6 (0214) B 00 cap : 0
0x00d7 (0215) B 00 cap : 0
0x00d8 (0216) B 00 cap : 0
0x00d9 (0217) B 00 cap : 0
0x00da (0218) B 00 cap : 0
0x00db (0219) B 00 cap : 0
0x00dc (0220) B 00 cap : 0
0x00dd (0221) B 00 cap : 0
0x00de (0222) B 00 cap : 0
0x00df (0223) B 00 cap : 0
0x00e0 (0224) B 00 cap : 0
0x00e1 (0225) B 00 cap : 0
0x00e2 (0226) B 00 cap : 0
0x00e3 (0227) B 00 cap : 0
0x00e4 (0228) B 00 cap : 0
0x00e5 (0229) B 00 cap : 0
0x00e6 (0230) B 00 cap : 0
0x00e7 (0231) B 00 cap : 0
0x00e8 (0232) B 00 cap : 0
0x00e9 (0233) B 00 cap : 0
0x00ea (0234) B 00 cap : 0
0x00eb (0235) B 00 cap : 0
0x00ec (0236) B 00 cap : 0
0x00ed (0237) B 00 cap : 0
0x00ee (0238) B 00 cap : 0
0x00ef (0239) B 00 cap : 0
0x00f0 (0240) B 00 cap : 0
0x00f1 (0241) B 00 cap : 0
0x00f2 (0242) B 00 cap : 0
0x00f3 (0243) B 00 cap : 0
0x00f4 (0244) B 00 cap : 0
0x00f5 (0245) B 00 cap : 0
0x00f6 (0246) B 00 cap : 0
0x00f7 (0247) B 00 cap : 0
0x00f8 (0248) B 00 cap : 0
0x00f9 (0249) B 00 cap : 0
0x00fa (0250) B 00 cap : 0
0x00fb (0251) B 00 cap : 0
0x00fc (0252) B 00 cap : 0
0x00fd (0253) B 00 cap : 0
0x00fe (0254) B 00 cap : 0
0x00ff (0255) B 00 cap : 0
0x0100 (0256) i 00000000 max : 0
0x0104 (0260) i 00000000 max : 0
0x0108 (0264) i 00000000 max : 0
0x010c (0268) i 00000000 max : 0
0x0110 (0272) i 00000000 max : 0
0x0114 (0276) i 00000000 max : 0
0x0118 (0280) i 00000000 max : 0
0x011c (0284) i 00000000 max : 0
0x0120 (0288) i 00000000 max : 0
0x0124 (0292) i 00000000 max : 0
0x0128 (0296) i 00000000 max : 0
0x012c (0300) i 00000000 max : 0
0x0130 (0304) i 00000000 max : 0
0x0134 (0308) i 00000000 max : 0
0x0138 (0312) i 00000000 max : 0
0x013c (0316) i 00000000 max : 0
0x0140 (0320) i 00000000 max : 0
0x0144 (0324) i 00000000 max : 0
0x0148 (0328) i 00000000 max : 0
0x014c (0332) i 00000000 max : 0
0x0150 (0336) i 00000000 max : 0
0x0154 (0340) i 00000000 max : 0
0x0158 (0344) i 00000000 max : 0
0x015c (0348) i 00000000 max : 0
0x0160 (0352) i 00000000 max : 0
0x0164 (0356) i 00000000 max : 0
0x0168 (0360) i 00000000 max : 0
0x016c (0364) i 00000000 max : 0
0x0170 (0368) i 00000000 max : 0
0x0174 (0372) i 00000000 max : 0
0x0178 (0376) i 00000000 max : 0
0x017c (0380) i 00000000 max : 0
0x0180 (0384) i 00000000 max : 0
0x0184 (0388) i 00000000 max : 0
0x0188 (0392) i 00000000 max : 0
0x018c (0396) i 00000000 max : 0
0x0190 (0400) i 00000000 max : 0
0x0194 (0404) i 00000000 max : 0
0x0198 (0408) i 00000000 max : 0
0x019c (0412) i 00000000 max : 0
0x01a0 (0416) i 00000000 max : 0
0x01a4 (0420) i 00000000 max : 0
0x01a8 (0424) i 00000000 max : 0
0x01ac (0428) i 00000000 max : 0
0x01b0 (0432) i 00000000 max : 0
0x01b4 (0436) i 00000000 max : 0
0x01b8 (0440) i 00000000 max : 0
0x01bc (0444) i 00000000 max : 0
0x01c0 (0448) i 00000000 max : 0
0x01c4 (0452) i 00000000 max : 0
0x01c8 (0456) i 00000000 max : 0
0x01cc (0460) i 00000000 max : 0
0x01d0 (0464) i 00000000 max : 0
0x01d4 (0468) i 00000000 max : 0
0x01d8 (0472) i 00000000 max : 0
0x01dc (0476) i 00000000 max : 0
0x01e0 (0480) i 00000000 max : 0
0x01e4 (0484) i 00000000 max : 0
0x01e8 (0488) i 00000000 max : 0
0x01ec (0492) i 00000000 max : 0
0x01f0 (0496) i 00000000 max : 0
0x01f4 (0500) i 00000000 max : 0
0x01f8 (0504) i 00000000 max : 0
0x01fc (0508) i 00000000 max : 0
0x0200 (0512) i 00000000 max : 0
0x0204 (0516) i 00000000 max : 0
0x0208 (0520) i 00000000 max : 0
0x020c (0524) i 00000000 max : 0
0x0210 (0528) i 00000000 max : 0
0x0214 (0532) i 00000000 max : 0
0x0218 (0536) i 00000000 max : 0
0x021c (0540) i 00000000 max : 0
0x0220 (0544) i 00000000 max : 0
0x0224 (0548) i 00000000 max : 0
0x0228 (0552) i 00000000 max : 0
0x022c (0556) i 00000000 max : 0
0x0230 (0560) i 00000000 max : 0
0x0234 (0564) i 00000000 max : 0
0x0238 (0568) i 00000000 max : 0
0x023c (0572) i 00000000 max : 0
0x0240 (0576) i 00000000 max : 0
0x0244 (0580) i 00000000 max : 0
0x0248 (0584) i 00000000 max : 0
0x024c (0588) i 00000000 max : 0
0x0250 (0592) i 00000000 max : 0
0x0254 (0596) i 00000000 max : 0
0x0258 (0600) i 00000000 max : 0
0x025c (0604) i 00000000 max : 0
0x0260 (0608) i 00000000 max : 0
0x0264 (0612) i 00000000 max : 0
0x0268 (0616) i 00000000 max : 0
0x026c (0620) i 00000000 max : 0
0x0270 (0624) i 00000000 max : 0
0x0274 (0628) i 00000000 max : 0
0x0278 (0632) i 00000000 max : 0
0x027c (0636) i 00000000 max : 0
0x0280 (0640) i 00000000 max : 0
0x0284 (0644) i 00000000 max : 0
0x0288 (0648) i 00000000 max : 0
0x028c (0652) i 00000000 max : 0
0x0290 (0656) i 00000000 max : 0
0x0294 (0660) i 00000000 max : 0
0x0298 (0664) i 00000000 max : 0
0x029c (0668) i 00000000 max : 0
0x02a0 (0672) i 00000000 max : 0
0x02a4 (0676) i 00000000 max : 0
0x02a8 (0680) i 00000000 max : 0
0x02ac (0684) i 00000000 max : 0
0x02b0 (0688) i 00000000 max : 0
0x02b4 (0692) i 00000000 max : 0
0x02b8 (0696) i 00000000 max : 0
0x02bc (0700) i 00000000 max : 0
0x02c0 (0704) i 00000000 max : 0
0x02c4 (0708) i 00000000 max : 0
0x02c8 (0712) i 00000000 max : 0
0x02cc (0716) i 00000000 max : 0
0x02d0 (0720) i 00000000 max : 0
0x02d4 (0724) i 00000000 max : 0
0x02d8 (0728) i 00000000 max : 0
0x02dc (0732) i 00000000 max : 0
0x02e0 (0736) i 00000000 max : 0
0x02e4 (0740) i 00000000 max : 0
0x02e8 (0744) i 00000000 max : 0
0x02ec (0748) i 00000000 max : 0
0x02f0 (0752) i 00000000 max : 0
0x02f4 (0756) i 00000000 max : 0
0x02f8 (0760) i 00000000 max : 0
0x02fc (0764) i 00000000 max : 0
0x0300 (0768) i 00000000 min : 0
0x0304 (0772) i 00000000 min : 0
0x0308 (0776) i 00000000 min : 0
0x030c (0780) i 00000000 min : 0
0x0310 (0784) i 00000000 min : 0
0x0314 (0788) i 00000000 min : 0
0x0318 (0792) i 00000000 min : 0
0x031c (0796) i 00000000 min : 0
0x0320 (0800) i 00000000 min : 0
0x0324 (0804) i 00000000 min : 0
0x0328 (0808) i 00000000 min : 0
0x032c (0812) i 00000000 min : 0
0x0330 (0816) i 00000000 min : 0
0x0334 (0820) i 00000000 min : 0
0x0338 (0824) i 00000000 min : 0
0x033c (0828) i 00000000 min : 0
0x0340 (0832) i 00000000 min : 0
0x0344 (0836) i 00000000 min : 0
0x0348 (0840) i 00000000 min : 0
0x034c (0844) i 00000000 min : 0
0x0350 (0848) i 00000000 min : 0
0x0354 (0852) i 00000000 min : 0
0x0358 (0856) i 00000000 min : 0
0x035c (0860) i 00000000 min : 0
0x0360 (0864) i 00000000 min : 0
0x0364 (0868) i 00000000 min : 0
0x0368 (0872) i 00000000 min : 0
0x036c (0876) i 00000000 min : 0
0x0370 (0880) i 00000000 min : 0
0x0374 (0884) i 00000000 min : 0
0x0378 (0888) i 00000000 min : 0
0x037c (0892) i 00000000 min : 0
0x0380 (0896) i 00000000 min : 0
0x0384 (0900) i 00000000 min : 0
0x0388 (0904) i 00000000 min : 0
0x038c (0908) i 00000000 min : 0
0x0390 (0912) i 00000000 min : 0
0x0394 (0916) i 00000000 min : 0
0x0398 (0920) i 00000000 min : 0
0x039c (0924) i 00000000 min : 0
0x03a0 (0928) i 00000000 min : 0
0x03a4 (0932) i 00000000 min : 0
0x03a8 (0936) i 00000000 min : 0
0x03ac (0940) i 00000000 min : 0
0x03b0 (0944) i 00000000 min : 0
0x03b4 (0948) i 00000000 min : 0
0x03b8 (0952) i 00000000 min : 0
0x03bc (0956) i 00000000 min : 0
0x03c0 (0960) i 00000000 min : 0
0x03c4 (0964) i 00000000 min : 0
0x03c8 (0968) i 00000000 min : 0
0x03cc (0972) i 00000000 min : 0
0x03d0 (0976) i 00000000 min : 0
0x03d4 (0980) i 00000000 min : 0
0x03d8 (0984) i 00000000 min : 0
0x03dc (0988) i 00000000 min : 0
0x03e0 (0992) i 00000000 min : 0
0x03e4 (0996) i 00000000 min : 0
0x03e8 (1000) i 00000000 min : 0
0x03ec (1004) i 00000000 min : 0
0x03f0 (1008) i 00000000 min : 0
0x03f4 (1012) i 00000000 min : 0
0x03f8 (1016) i 00000000 min : 0
0x03fc (1020) i 00000000 min : 0
0x0400 (1024) i 00000000 min : 0
0x0404 (1028) i 00000000 min : 0
0x0408 (1032) i 00000000 min : 0
0x040c (1036) i 00000000 min : 0
0x0410 (1040) i 00000000 min : 0
0x0414 (1044) i 00000000 min : 0
0x0418 (1048) i 00000000 min : 0
0x041c (1052) i 00000000 min : 0
0x0420 (1056) i 00000000 min : 0
0x0424 (1060) i 00000000 min : 0
0x0428 (1064) i 00000000 min : 0
0x042c (1068) i 00000000 min : 0
0x0430 (1072) i 00000000 min : 0
0x0434 (1076) i 00000000 min : 0
0x0438 (1080) i 00000000 min : 0
0x043c (1084) i 00000000 min : 0
0x0440 (1088) i 00000000 min : 0
0x0444 (1092) i 00000000 min : 0
0x0448 (1096) i 00000000 min : 0
0x044c (1100) i 00000000 min : 0
0x0450 (1104) i 00000000 min : 0
0x0454 (1108) i 00000000 min : 0
0x0458 (1112) i 00000000 min : 0
0x045c (1116) i 00000000 min : 0
0x0460 (1120) i 00000000 min : 0
0x0464 (1124) i 00000000 min : 0
0x0468 (1128) i 00000000 min : 0
0x046c (1132) i 00000000 min : 0
0x0470 (1136) i 00000000 min : 0
0x0474 (1140) i 00000000 min : 0
0x0478 (1144) i 00000000 min : 0
0x047c (1148) i 00000000 min : 0
0x0480 (1152) i fbff0000 min : 65531
0x0484 (1156) i 00000000 min : 0
0x0488 (1160) i 58005800 min : 5767256
0x048c (1164) i 00005800 min : 5767168
0x0490 (1168) i 14051405 min : 85198100
0x0494 (1172) i 00001405 min : 85196800
0x0498 (1176) i e40ce40c min : 216272100
0x049c (1180) i 0000e40c min : 216268800
0x04a0 (1184) i 00000000 min : 0
0x04a4 (1188) i 00000000 min : 0
0x04a8 (1192) i 00000000 min : 0
0x04ac (1196) i 00000000 min : 0
0x04b0 (1200) i 00000000 min : 0
0x04b4 (1204) i 00000000 min : 0
0x04b8 (1208) i 00000000 min : 0
0x04bc (1212) i 00000000 min : 0
0x04c0 (1216) i ecff0000 min : 65516
0x04c4 (1220) i 00000000 min : 0
0x04c8 (1224) i 19001900 min : 1638425
0x04cc (1228) i 00001900 min : 1638400
0x04d0 (1232) i f401f401 min : 32768500
0x04d4 (1236) i 0000f401 min : 32768000
0x04d8 (1240) i f401f401 min : 32768500
0x04dc (1244) i 0000f401 min : 32768000
0x04e0 (1248) i 00000000 min : 0
0x04e4 (1252) i 00000000 min : 0
0x04e8 (1256) i 00000000 min : 0
0x04ec (1260) i 00000000 min : 0
0x04f0 (1264) i 00000000 min : 0
0x04f4 (1268) i 00000000 min : 0
0x04f8 (1272) i 00000000 min : 0
0x04fc (1276) i 00000000 min : 0
0x0500 (1280) h fbff pm_setting :-5
0x0502 (1282) h 0000 pm_setting : 0
0x0504 (1284) h 0000 pm_setting : 0
0x0506 (1286) h 0000 pm_setting : 0
0x0508 (1288) h 6900 pm_setting : 105
0x050a (1290) h 6900 pm_setting : 105
0x050c (1292) h 0000 pm_setting : 0
0x050e (1294) h 6900 pm_setting : 105
0x0510 (1296) h 7017 pm_setting : 6000
0x0512 (1298) h 7017 pm_setting : 6000
0x0514 (1300) h 0000 pm_setting : 0
0x0516 (1302) h 7017 pm_setting : 6000
0x0518 (1304) h 7017 pm_setting : 6000
0x051a (1306) h 7017 pm_setting : 6000
0x051c (1308) h 0000 pm_setting : 0
0x051e (1310) h 7017 pm_setting : 6000
0x0520 (1312) h 0000 pm_setting : 0
0x0522 (1314) h 0000 pm_setting : 0
0x0524 (1316) h 0000 pm_setting : 0
0x0526 (1318) h 0000 pm_setting : 0
0x0528 (1320) h 0000 pm_setting : 0
0x052a (1322) h 0000 pm_setting : 0
0x052c (1324) h 0000 pm_setting : 0
0x052e (1326) h 0000 pm_setting : 0
0x0530 (1328) h 0000 pm_setting : 0
0x0532 (1330) h 0000 pm_setting : 0
0x0534 (1332) h 0000 pm_setting : 0
0x0536 (1334) h 0000 pm_setting : 0
0x0538 (1336) h 0000 pm_setting : 0
0x053a (1338) h 0000 pm_setting : 0
0x053c (1340) h 0000 pm_setting : 0
0x053e (1342) h 0000 pm_setting : 0
0x0540 (1344) B 00 Version : 0
0x0541 (1345) B 00 Spare8 : 0
0x0542 (1346) B 00 Spare8 : 0
0x0543 (1347) B 00 Spare8 : 0
0x0544 (1348) I fbfcff3a FeaturesToRun : 989854971
0x0548 (1352) I 9ef18c04 FeaturesToRun : 76345758
0x054c (1356) I ffff0300 FwDStateMask : 262143
0x0550 (1360) I 00000000 DebugOverrides : 0
0x0554 (1364) I 00000000 Spare : 0
0x0558 (1368) I 00000000 Spare : 0
0x055c (1372) I 1b000000 Version : 27
0x0560 (1376) B 03 TotalPowerConfig : 3
0x0561 (1377) B 00 CustomerVariant : 0
0x0562 (1378) B 04 MemoryTemperatureTypeMask : 4
0x0563 (1379) B 00 SmartShiftVersion : 0
0x0564 (1380) B 50 SocketPowerLimitSpare : 80
0x0565 (1381) B 00 SocketPowerLimitSpare : 0
0x0566 (1382) B 00 SocketPowerLimitSpare : 0
0x0567 (1383) B 00 SocketPowerLimitSpare : 0
0x0568 (1384) B 00 SocketPowerLimitSpare : 0
0x0569 (1385) B 00 SocketPowerLimitSpare : 0
0x056a (1386) B 00 SocketPowerLimitSpare : 0
0x056b (1387) B 00 SocketPowerLimitSpare : 0
0x056c (1388) B 00 SocketPowerLimitSpare : 0
0x056d (1389) B 00 SocketPowerLimitSpare : 0
0x056e (1390) B 00 EnableLegacyPptLimit : 0
0x056f (1391) B 01 UseInputTelemetry : 1
0x0570 (1392) B 00 SmartShiftMinReportedPptinDcs : 0
0x0571 (1393) B 00 PaddingPpt : 0
0x0572 (1394) B 00 PaddingPpt : 0
0x0573 (1395) B 00 PaddingPpt : 0
0x0574 (1396) B 00 PaddingPpt : 0
0x0575 (1397) B 00 PaddingPpt : 0
0x0576 (1398) B 00 PaddingPpt : 0
0x0577 (1399) B 00 PaddingPpt : 0
0x0578 (1400) H 7800 HwCtfTempLimit : 120
0x057a (1402) H 6900 PaddingInfra : 105
0x057c (1404) I 00000000 FitControllerFailureRateLimit : 0
0x0580 (1408) I 00000000 FitControllerGfxDutyCycle : 0
0x0584 (1412) I 00000000 FitControllerSocDutyCycle : 0
0x0588 (1416) I 00000000 FitControllerSocOffset : 0
0x058c (1420) I 00000000 GfxApccPlusResidencyLimit : 0
0x0590 (1424) I f2f11000 ThrottlerControlMask : 1110514
0x0594 (1428) H 6400 UlvVoltageOffset : 100
0x0596 (1430) H 6400 UlvVoltageOffset : 100
0x0598 (1432) B 00 Padding : 0
0x0599 (1433) B 00 Padding : 0
0x059a (1434) H 6400 DeepUlvVoltageOffsetSoc : 100
0x059c (1436) H 3011 DefaultMaxVoltage : 4400
0x059e (1438) H f811 DefaultMaxVoltage : 4600
0x05a0 (1440) H c012 BoostMaxVoltage : 4800
0x05a2 (1442) H f811 BoostMaxVoltage : 4600
0x05a4 (1444) h 0500 VminTempHystersis : 5
0x05a6 (1446) h 0500 VminTempHystersis : 5
0x05a8 (1448) h 3700 VminTempThreshold : 55
0x05aa (1450) h 3700 VminTempThreshold : 55
0x05ac (1452) H f00a Vmin_Hot_T0 : 2800
0x05ae (1454) H e40c Vmin_Hot_T0 : 3300
0x05b0 (1456) H f00a Vmin_Cold_T0 : 2800
0x05b2 (1458) H e40c Vmin_Cold_T0 : 3300
0x05b4 (1460) H f00a Vmin_Hot_Eol : 2800
0x05b6 (1462) H e40c Vmin_Hot_Eol : 3300
0x05b8 (1464) H f00a Vmin_Cold_Eol : 2800
0x05ba (1466) H e40c Vmin_Cold_Eol : 3300
0x05bc (1468) H 0000 Vmin_Aging_Offset : 0
0x05be (1470) H 0000 Vmin_Aging_Offset : 0
0x05c0 (1472) H 0000 Spare_Vmin_Plat_Offset_Hot : 0
0x05c2 (1474) H 0000 Spare_Vmin_Plat_Offset_Hot : 0
0x05c4 (1476) H f00a Spare_Vmin_Plat_Offset_Cold : 2800
0x05c6 (1478) H f00a Spare_Vmin_Plat_Offset_Cold : 2800
0x05c8 (1480) H 0000 VcBtcFixedVminAgingOffset : 0
0x05ca (1482) H 0000 VcBtcFixedVminAgingOffset : 0
0x05cc (1484) H 0000 VcBtcVmin2PsmDegrationGb : 0
0x05ce (1486) H 0000 VcBtcVmin2PsmDegrationGb : 0
0x05d0 (1488) f 00000000 VcBtcPsmA : 0
0x05d4 (1492) f 00000000 VcBtcPsmA : 0
0x05d8 (1496) f 00000000 VcBtcPsmB : 0
0x05dc (1500) f 00000000 VcBtcPsmB : 0
0x05e0 (1504) f 00000000 VcBtcVminA : 0
0x05e4 (1508) f 00000000 VcBtcVminA : 0
0x05e8 (1512) f 00000000 VcBtcVminB : 0
0x05ec (1516) f 00000000 VcBtcVminB : 0
0x05f0 (1520) B 01 PerPartVminEnabled : 1
0x05f1 (1521) B 00 PerPartVminEnabled : 0
0x05f2 (1522) B 00 VcBtcEnabled : 0
0x05f3 (1523) B 00 VcBtcEnabled : 0
0x05f4 (1524) H 0000 SocketPowerLimitAcTau : 0
0x05f6 (1526) H 0000 SocketPowerLimitAcTau : 0
0x05f8 (1528) H 0000 SocketPowerLimitAcTau : 0
0x05fa (1530) H 0000 SocketPowerLimitAcTau : 0
0x05fc (1532) H 0000 SocketPowerLimitDcTau : 0
0x05fe (1534) H 0000 SocketPowerLimitDcTau : 0
0x0600 (1536) H 0000 SocketPowerLimitDcTau : 0
0x0602 (1538) H 0000 SocketPowerLimitDcTau : 0
0x0604 (1540) f 00000000 a : 0
0x0608 (1544) f 0187903d b : 0.07057
0x060c (1548) f 6f1203bc c :-0.008
0x0610 (1552) f 00000000 a : 0
0x0614 (1556) f 00000000 b : 0
0x0618 (1560) f 00000000 c : 0
0x061c (1564) I 00000000 SpareVmin : 0
0x0620 (1568) I 00000000 SpareVmin : 0
0x0624 (1572) I 00000000 SpareVmin : 0
0x0628 (1576) I 00000000 SpareVmin : 0
0x062c (1580) I 00000000 SpareVmin : 0
0x0630 (1584) I 00000000 SpareVmin : 0
0x0634 (1588) B 00 Padding : 0
0x0635 (1589) B 00 SnapToDiscrete : 0
0x0636 (1590) B 02 NumDiscreteLevels : 2
0x0637 (1591) B 03 CalculateFopt : 3
0x0638 (1592) f 00000000 m : 0
0x063c (1596) f 00000000 b : 0
0x0640 (1600) I 00000000 Padding3 : 0
0x0644 (1604) I 00000000 Padding3 : 0
0x0648 (1608) I 00000000 Padding3 : 0
0x064c (1612) H 0000 Padding4 : 0
0x064e (1614) H b004 FoptimalDc : 1200
0x0650 (1616) H b004 FoptimalAc : 1200
0x0652 (1618) H 0000 Padding2 : 0
0x0654 (1620) B 00 Padding : 0
0x0655 (1621) B 00 SnapToDiscrete : 0
0x0656 (1622) B 02 NumDiscreteLevels : 2
0x0657 (1623) B 00 CalculateFopt : 0
0x0658 (1624) f a8359d3f m : 1.2282
0x065c (1628) f 9fe5d93e b : 0.42558
0x0660 (1632) I 00000000 Padding3 : 0
0x0664 (1636) I 0000b004 Padding3 : 78643200
0x0668 (1640) I b0040000 Padding3 : 1200
0x066c (1644) H 0000 Padding4 : 0
0x066e (1646) H 0000 FoptimalDc : 0
0x0670 (1648) H 0000 FoptimalAc : 0
0x0672 (1650) H 9e3f Padding2 : 16286
0x0674 (1652) B d3 Padding : 211
0x0675 (1653) B 01 SnapToDiscrete : 1
0x0676 (1654) B 06 NumDiscreteLevels : 6
0x0677 (1655) B 00 CalculateFopt : 0
0x0678 (1656) f c74b9f3f m : 1.2445
0x067c (1660) f b81ee53e b : 0.4475
0x0680 (1664) I 00000000 Padding3 : 0
0x0684 (1668) I 00000000 Padding3 : 0
0x0688 (1672) I 00000000 Padding3 : 0
0x068c (1676) H 0001 Padding4 : 256
0x068e (1678) H 0000 FoptimalDc : 0
0x0690 (1680) H 0000 FoptimalAc : 0
0x0692 (1682) H b83f Padding2 : 16312
0x0694 (1684) B cd Padding : 205
0x0695 (1685) B 00 SnapToDiscrete : 0
0x0696 (1686) B 02 NumDiscreteLevels : 2
0x0697 (1687) B 00 CalculateFopt : 0
0x0698 (1688) f 0000803f m : 1
0x069c (1692) f 00000000 b : 0
0x06a0 (1696) I 00000000 Padding3 : 0
0x06a4 (1700) I 00000000 Padding3 : 0
0x06a8 (1704) I 00000000 Padding3 : 0
0x06ac (1708) H 0000 Padding4 : 0
0x06ae (1710) H 0000 FoptimalDc : 0
0x06b0 (1712) H 0000 FoptimalAc : 0
0x06b2 (1714) H 803f Padding2 : 16256
0x06b4 (1716) B 00 Padding : 0
0x06b5 (1717) B 00 SnapToDiscrete : 0
0x06b6 (1718) B 02 NumDiscreteLevels : 2
0x06b7 (1719) B 00 CalculateFopt : 0
0x06b8 (1720) f 9e5e793f m : 0.9741
0x06bc (1724) f 7a8ded3e b : 0.46397
0x06c0 (1728) I 00000000 Padding3 : 0
0x06c4 (1732) I 00000000 Padding3 : 0
0x06c8 (1736) I 00000000 Padding3 : 0
0x06cc (1740) H 0000 Padding4 : 0
0x06ce (1742) H 0000 FoptimalDc : 0
0x06d0 (1744) H 0000 FoptimalAc : 0
0x06d2 (1746) H 873f Padding2 : 16263
0x06d4 (1748) B c7 Padding : 199
0x06d5 (1749) B 00 SnapToDiscrete : 0
0x06d6 (1750) B 02 NumDiscreteLevels : 2
0x06d7 (1751) B 00 CalculateFopt : 0
0x06d8 (1752) f 371a503f m : 0.8129
0x06dc (1756) f dc4b1a3e b : 0.15068
0x06e0 (1760) I 00000000 Padding3 : 0
0x06e4 (1764) I 00000000 Padding3 : 0
0x06e8 (1768) I 00000000 Padding3 : 0
0x06ec (1772) H 0000 Padding4 : 0
0x06ee (1774) H 0000 FoptimalDc : 0
0x06f0 (1776) H 0000 FoptimalAc : 0
0x06f2 (1778) H 5d3f Padding2 : 16221
0x06f4 (1780) B 7d Padding : 125
0x06f5 (1781) B 00 SnapToDiscrete : 0
0x06f6 (1782) B 02 NumDiscreteLevels : 2
0x06f7 (1783) B 00 CalculateFopt : 0
0x06f8 (1784) f 780b943f m : 1.1566
0x06fc (1788) f 66bd583e b : 0.21166
0x0700 (1792) I 00000000 Padding3 : 0
0x0704 (1796) I 00000000 Padding3 : 0
0x0708 (1800) I 00000000 Padding3 : 0
0x070c (1804) H 0000 Padding4 : 0
0x070e (1806) H 0000 FoptimalDc : 0
0x0710 (1808) H 0000 FoptimalAc : 0
0x0712 (1810) H 8e3f Padding2 : 16270
0x0714 (1812) B e5 Padding : 229
0x0715 (1813) B 00 SnapToDiscrete : 0
0x0716 (1814) B 02 NumDiscreteLevels : 2
0x0717 (1815) B 00 CalculateFopt : 0
0x0718 (1816) f 780b943f m : 1.1566
0x071c (1820) f 66bd583e b : 0.21166
0x0720 (1824) I 00000000 Padding3 : 0
0x0724 (1828) I 00000000 Padding3 : 0
0x0728 (1832) I 00000000 Padding3 : 0
0x072c (1836) H 0000 Padding4 : 0
0x072e (1838) H 0000 FoptimalDc : 0
0x0730 (1840) H 0000 FoptimalAc : 0
0x0732 (1842) H 8e3f Padding2 : 16270
0x0734 (1844) B e5 Padding : 229
0x0735 (1845) B 00 SnapToDiscrete : 0
0x0736 (1846) B 01 NumDiscreteLevels : 1
0x0737 (1847) B 00 CalculateFopt : 0
0x0738 (1848) f e414a53f m : 1.2897
0x073c (1852) f 5778373e b : 0.17917
0x0740 (1856) I 00000000 Padding3 : 0
0x0744 (1860) I 00000000 Padding3 : 0
0x0748 (1864) I 00000000 Padding3 : 0
0x074c (1868) H 0000 Padding4 : 0
0x074e (1870) H 0000 FoptimalDc : 0
0x0750 (1872) H 0000 FoptimalAc : 0
0x0752 (1874) H 9d3f Padding2 : 16285
0x0754 (1876) B 0a Padding : 10
0x0755 (1877) B 00 SnapToDiscrete : 0
0x0756 (1878) B 02 NumDiscreteLevels : 2
0x0757 (1879) B 00 CalculateFopt : 0
0x0758 (1880) f e414a53f m : 1.2897
0x075c (1884) f 5778373e b : 0.17917
0x0760 (1888) I 00000000 Padding3 : 0
0x0764 (1892) I 00000000 Padding3 : 0
0x0768 (1896) I 00000000 Padding3 : 0
0x076c (1900) H 0000 Padding4 : 0
0x076e (1902) H 0000 FoptimalDc : 0
0x0770 (1904) H 0000 FoptimalAc : 0
0x0772 (1906) H 9d3f Padding2 : 16285
0x0774 (1908) B 0a Padding : 10
0x0775 (1909) B 00 SnapToDiscrete : 0
0x0776 (1910) B 02 NumDiscreteLevels : 2
0x0777 (1911) B 00 CalculateFopt : 0
0x0778 (1912) f e414a53f m : 1.2897
0x077c (1916) f 5778373e b : 0.17917
0x0780 (1920) I 00000000 Padding3 : 0
0x0784 (1924) I 00000000 Padding3 : 0
0x0788 (1928) I 00000000 Padding3 : 0
0x078c (1932) H 0000 Padding4 : 0
0x078e (1934) H 0000 FoptimalDc : 0
0x0790 (1936) H 0000 FoptimalAc : 0
0x0792 (1938) H 9d3f Padding2 : 16285
0x0794 (1940) H f401 FreqTableGfx : 500
0x0796 (1942) H 480d FreqTableGfx : 3400
0x0798 (1944) H 0000 FreqTableGfx : 0
0x079a (1946) H 0000 FreqTableGfx : 0
0x079c (1948) H 0000 FreqTableGfx : 0
0x079e (1950) H 0000 FreqTableGfx : 0
0x07a0 (1952) H 0000 FreqTableGfx : 0
0x07a2 (1954) H 0000 FreqTableGfx : 0
0x07a4 (1956) H 0000 FreqTableGfx : 0
0x07a6 (1958) H 0000 FreqTableGfx : 0
0x07a8 (1960) H 0000 FreqTableGfx : 0
0x07aa (1962) H 0000 FreqTableGfx : 0
0x07ac (1964) H f401 FreqTableGfx : 500
0x07ae (1966) H e803 FreqTableGfx : 1000
0x07b0 (1968) H 0000 FreqTableGfx : 0
0x07b2 (1970) H 0000 FreqTableGfx : 0
0x07b4 (1972) H 2003 FreqTableVclk : 800
0x07b6 (1974) H 760b FreqTableVclk : 2934
0x07b8 (1976) H 0000 FreqTableVclk : 0
0x07ba (1978) H 0000 FreqTableVclk : 0
0x07bc (1980) H 0000 FreqTableVclk : 0
0x07be (1982) H 0000 FreqTableVclk : 0
0x07c0 (1984) H 0000 FreqTableVclk : 0
0x07c2 (1986) H 0000 FreqTableVclk : 0
0x07c4 (1988) H 2003 FreqTableDclk : 800
0x07c6 (1990) H 9808 FreqTableDclk : 2200
0x07c8 (1992) H 0000 FreqTableDclk : 0
0x07ca (1994) H 0000 FreqTableDclk : 0
0x07cc (1996) H 2003 FreqTableDclk : 800
0x07ce (1998) H 9808 FreqTableDclk : 2200
0x07d0 (2000) H 0000 FreqTableDclk : 0
0x07d2 (2002) H 0000 FreqTableDclk : 0
0x07d4 (2004) H a201 FreqTableSocclk : 418
0x07d6 (2006) H dc05 FreqTableSocclk : 1500
0x07d8 (2008) H 0000 FreqTableSocclk : 0
0x07da (2010) H 0000 FreqTableSocclk : 0
0x07dc (2012) H 2003 FreqTableSocclk : 800
0x07de (2014) H bb05 FreqTableSocclk : 1467
0x07e0 (2016) H 0000 FreqTableSocclk : 0
0x07e2 (2018) H 0000 FreqTableSocclk : 0
0x07e4 (2020) H 6100 FreqTableUclk : 97
0x07e6 (2022) H c901 FreqTableUclk : 457
0x07e8 (2024) H 0503 FreqTableUclk : 773
0x07ea (2026) H 6b03 FreqTableUclk : 875
0x07ec (2028) H 6504 FreqTableUclk : 1125
0x07ee (2030) H eb04 FreqTableUclk : 1259
0x07f0 (2032) H 6600 FreqTableShadowUclk : 102
0x07f2 (2034) H b301 FreqTableShadowUclk : 435
0x07f4 (2036) H db02 FreqTableShadowUclk : 731
0x07f6 (2038) H 4a03 FreqTableShadowUclk : 842
0x07f8 (2040) H 2d04 FreqTableShadowUclk : 1069
0x07fa (2042) H a304 FreqTableShadowUclk : 1187
0x07fc (2044) H 9400 FreqTableDispclk : 148
0x07fe (2046) H d007 FreqTableDispclk : 2000
0x0800 (2048) H 0503 FreqTableDispclk : 773
0x0802 (2050) H e803 FreqTableDispclk : 1000
0x0804 (2052) H 6504 FreqTableDispclk : 1125
0x0806 (2054) H e204 FreqTableDispclk : 1250
0x0808 (2056) H 6600 FreqTableDispclk : 102
0x080a (2058) H b301 FreqTableDispclk : 435
0x080c (2060) H 9400 FreqTableDppClk : 148
0x080e (2062) H d007 FreqTableDppClk : 2000
0x0810 (2064) H 2d04 FreqTableDppClk : 1069
0x0812 (2066) H a304 FreqTableDppClk : 1187
0x0814 (2068) H 9400 FreqTableDppClk : 148
0x0816 (2070) H 6406 FreqTableDppClk : 1636
0x0818 (2072) H 0000 FreqTableDppClk : 0
0x081a (2074) H 0000 FreqTableDppClk : 0
0x081c (2076) H d002 FreqTableDprefclk : 720
0x081e (2078) H 0000 FreqTableDprefclk : 0
0x0820 (2080) H 0000 FreqTableDprefclk : 0
0x0822 (2082) H 0000 FreqTableDprefclk : 0
0x0824 (2084) H 9400 FreqTableDprefclk : 148
0x0826 (2086) H 6406 FreqTableDprefclk : 1636
0x0828 (2088) H 0000 FreqTableDprefclk : 0
0x082a (2090) H 0000 FreqTableDprefclk : 0
0x082c (2092) H 9400 FreqTableDcfclk : 148
0x082e (2094) H 0807 FreqTableDcfclk : 1800
0x0830 (2096) H 0000 FreqTableDcfclk : 0
0x0832 (2098) H 0000 FreqTableDcfclk : 0
0x0834 (2100) H d002 FreqTableDcfclk : 720
0x0836 (2102) H d002 FreqTableDcfclk : 720
0x0838 (2104) H 0000 FreqTableDcfclk : 0
0x083a (2106) H 0000 FreqTableDcfclk : 0
0x083c (2108) H 9400 FreqTableDtbclk : 148
0x083e (2110) H 0807 FreqTableDtbclk : 1800
0x0840 (2112) H 0000 FreqTableDtbclk : 0
0x0842 (2114) H 0000 FreqTableDtbclk : 0
0x0844 (2116) H 9400 FreqTableDtbclk : 148
0x0846 (2118) H 6406 FreqTableDtbclk : 1636
0x0848 (2120) H 0000 FreqTableDtbclk : 0
0x084a (2122) H 0000 FreqTableDtbclk : 0
0x084c (2124) H 3301 FreqTableFclk : 307
0x084e (2126) H 6009 FreqTableFclk : 2400
0x0850 (2128) H 0000 FreqTableFclk : 0
0x0852 (2130) H 0000 FreqTableFclk : 0
0x0854 (2132) H 9400 FreqTableFclk : 148
0x0856 (2134) H 6406 FreqTableFclk : 1636
0x0858 (2136) H 0000 FreqTableFclk : 0
0x085a (2138) H 0000 FreqTableFclk : 0
0x085c (2140) I 480d0000 DcModeMaxFreq : 3400
0x0860 (2144) I dc050000 DcModeMaxFreq : 1500
0x0864 (2148) I c9010000 DcModeMaxFreq : 457
0x0868 (2152) I 60090000 DcModeMaxFreq : 2400
0x086c (2156) I 98080000 DcModeMaxFreq : 2200
0x0870 (2160) I 760b0000 DcModeMaxFreq : 2934
0x0874 (2164) I d0070000 DcModeMaxFreq : 2000
0x0878 (2168) I d0070000 DcModeMaxFreq : 2000
0x087c (2172) I d0020000 DcModeMaxFreq : 720
0x0880 (2176) I 08070000 DcModeMaxFreq : 1800
0x0884 (2180) I 08070000 DcModeMaxFreq : 1800
0x0888 (2184) H 0000 GfxclkAibFmax : 0
0x088a (2186) H 0000 GfxDpmPadding : 0
0x088c (2188) H b004 GfxclkFgfxoffEntry : 1200
0x088e (2190) H e803 GfxclkFgfxoffExitImu : 1000
0x0890 (2192) H b004 GfxclkFgfxoffExitRlc : 1200
0x0892 (2194) H fa00 GfxclkThrottleClock : 250
0x0894 (2196) B 01 EnableGfxPowerStagesGpio : 1
0x0895 (2197) B 02 GfxIdlePadding : 2
0x0896 (2198) B 00 SmsRepairWRCKClkDivEn : 0
0x0897 (2199) B 00 SmsRepairWRCKClkDivVal : 0
0x0898 (2200) B 01 GfxOffEntryEarlyMGCGEn : 1
0x0899 (2201) B 01 GfxOffEntryForceCGCGEn : 1
0x089a (2202) B 01 GfxOffEntryForceCGCGDelayEn : 1
0x089b (2203) B c8 GfxOffEntryForceCGCGDelayVal : 200
0x089c (2204) H 0000 GfxclkFreqGfxUlv : 0
0x089e (2206) B 00 GfxIdlePadding2 : 0
0x089f (2207) B 00 GfxIdlePadding2 : 0
0x08a0 (2208) I 10270000 GfxOffEntryHysteresis : 10000
0x08a4 (2212) I b004f401 GfxoffSpare : 32769200
0x08a8 (2216) I b004fa00 GfxoffSpare : 16385200
0x08ac (2220) I 00000000 GfxoffSpare : 0
0x08b0 (2224) I 00000000 GfxoffSpare : 0
0x08b4 (2228) I 00000000 GfxoffSpare : 0
0x08b8 (2232) I 0a000000 GfxoffSpare : 10
0x08bc (2236) I 00000000 GfxoffSpare : 0
0x08c0 (2240) I 00000000 GfxoffSpare : 0
0x08c4 (2244) I 00000000 GfxoffSpare : 0
0x08c8 (2248) I 00000000 GfxoffSpare : 0
0x08cc (2252) I 00000000 GfxoffSpare : 0
0x08d0 (2256) I 00000000 GfxoffSpare : 0
0x08d4 (2260) I 00000000 GfxoffSpare : 0
0x08d8 (2264) I 00000000 GfxoffSpare : 0
0x08dc (2268) I 00000000 GfxoffSpare : 0
0x08e0 (2272) H 0000 DfllMstrOscConfigA : 0
0x08e2 (2274) H 0000 DfllSlvOscConfigA : 0
0x08e4 (2276) f 00000000 DfllBtcMasterScalerM : 0
0x08e8 (2280) i 00000000 DfllBtcMasterScalerB : 0
0x08ec (2284) f 00000000 DfllBtcSlaveScalerM : 0
0x08f0 (2288) i 00000000 DfllBtcSlaveScalerB : 0
0x08f4 (2292) I 00000000 DfllPccAsWaitCtrl : 0
0x08f8 (2296) I 00000000 DfllPccAsStepCtrl : 0
0x08fc (2300) I 00000000 GfxDfllSpare : 0
0x0900 (2304) I 00000000 GfxDfllSpare : 0
0x0904 (2308) I 00000000 GfxDfllSpare : 0
0x0908 (2312) I 00000000 GfxDfllSpare : 0
0x090c (2316) I 00000000 GfxDfllSpare : 0
0x0910 (2320) I 00000000 GfxDfllSpare : 0
0x0914 (2324) I 00000000 GfxDfllSpare : 0
0x0918 (2328) I 00000000 GfxDfllSpare : 0
0x091c (2332) I 00000000 GfxDfllSpare : 0
0x0920 (2336) f 9a99b93f DvoPsmDownThresholdVoltage : 1.45
0x0924 (2340) f 3333b33f DvoPsmUpThresholdVoltage : 1.4
0x0928 (2344) f d7a3703f DvoFmaxLowScaler : 0.94
0x092c (2348) I 00000000 PaddingDcs : 0
0x0930 (2352) H 0600 DcsMinGfxOffTime : 6
0x0932 (2354) H 6400 DcsMaxGfxOffTime : 100
0x0934 (2356) I 00000000 DcsMinCreditAccum : 0
0x0938 (2360) H 2800 DcsExitHysteresis : 40
0x093a (2362) H 6400 DcsTimeout : 100
0x093c (2364) f 0000fa43 DcsPfGfxFopt : 500
0x0940 (2368) f 0000c242 DcsPfUclkFopt : 97
0x0944 (2372) B 01 FoptEnabled : 1
0x0945 (2373) B 00 DcsSpare2 : 0
0x0946 (2374) B 64 DcsSpare2 : 100
0x0947 (2375) B 00 DcsSpare2 : 0
0x0948 (2376) I 00000000 DcsFoptM : 0
0x094c (2380) I 00000000 DcsFoptB : 0
0x0950 (2384) I 00000000 DcsSpare : 0
0x0954 (2388) I 00000000 DcsSpare : 0
0x0958 (2392) I 00000000 DcsSpare : 0
0x095c (2396) I 00000000 DcsSpare : 0
0x0960 (2400) I 00000000 DcsSpare : 0
0x0964 (2404) I 00000000 DcsSpare : 0
0x0968 (2408) I 00000000 DcsSpare : 0
0x096c (2412) I 00000000 DcsSpare : 0
0x0970 (2416) I 00000000 DcsSpare : 0
0x0974 (2420) B 01 UseStrobeModeOptimizations : 1
0x0975 (2421) B 00 PaddingMem : 0
0x0976 (2422) B 00 PaddingMem : 0
0x0977 (2423) B 00 PaddingMem : 0
0x0978 (2424) B 0e UclkDpmPstates : 14
0x0979 (2425) B 0c UclkDpmPstates : 12
0x097a (2426) B 08 UclkDpmPstates : 8
0x097b (2427) B 04 UclkDpmPstates : 4
0x097c (2428) B 02 UclkDpmPstates : 2
0x097d (2429) B 00 UclkDpmPstates : 0
0x097e (2430) B 0f UclkDpmShadowPstates : 15
0x097f (2431) B 0d UclkDpmShadowPstates : 13
0x0980 (2432) B 09 UclkDpmShadowPstates : 9
0x0981 (2433) B 05 UclkDpmShadowPstates : 5
0x0982 (2434) B 03 UclkDpmShadowPstates : 3
0x0983 (2435) B 01 UclkDpmShadowPstates : 1
0x0984 (2436) B 00 FreqTableUclkDiv : 0
0x0985 (2437) B 02 FreqTableUclkDiv : 2
0x0986 (2438) B 03 FreqTableUclkDiv : 3
0x0987 (2439) B 03 FreqTableUclkDiv : 3
0x0988 (2440) B 03 FreqTableUclkDiv : 3
0x0989 (2441) B 03 FreqTableUclkDiv : 3
0x098a (2442) B 00 FreqTableShadowUclkDiv : 0
0x098b (2443) B 02 FreqTableShadowUclkDiv : 2
0x098c (2444) B 03 FreqTableShadowUclkDiv : 3
0x098d (2445) B 03 FreqTableShadowUclkDiv : 3
0x098e (2446) B 03 FreqTableShadowUclkDiv : 3
0x098f (2447) B 03 FreqTableShadowUclkDiv : 3
0x0990 (2448) H 8c0a MemVmempVoltage : 2700
0x0992 (2450) H f00a MemVmempVoltage : 2800
0x0994 (2452) H b80b MemVmempVoltage : 3000
0x0996 (2454) H b80b MemVmempVoltage : 3000
0x0998 (2456) H 480d MemVmempVoltage : 3400
0x099a (2458) H 480d MemVmempVoltage : 3400
0x099c (2460) H 8813 MemVddioVoltage : 5000
0x099e (2462) H 8813 MemVddioVoltage : 5000
0x09a0 (2464) H 8813 MemVddioVoltage : 5000
0x09a2 (2466) H 8813 MemVddioVoltage : 5000
0x09a4 (2468) H 1815 MemVddioVoltage : 5400
0x09a6 (2470) H 1815 MemVddioVoltage : 5400
0x09a8 (2472) H c901 DalDcModeMaxUclkFreq : 457
0x09aa (2474) B 88 PaddingsMem : 136
0x09ab (2475) B 13 PaddingsMem : 19
0x09ac (2476) I c9018813 PaddingFclk : 327680457
0x09b0 (2480) B 00 PcieGenSpeed : 0
0x09b1 (2481) B 03 PcieGenSpeed : 3
0x09b2 (2482) B 04 PcieGenSpeed : 4
0x09b3 (2483) B 06 PcieLaneCount : 6
0x09b4 (2484) B 06 PcieLaneCount : 6
0x09b5 (2485) B 06 PcieLaneCount : 6
0x09b6 (2486) H fa00 LclkFreq : 250
0x09b8 (2488) H 6802 LclkFreq : 616
0x09ba (2490) H 7704 LclkFreq : 1143
0x09bc (2492) B 00 OverrideGfxAvfsFuses : 0
0x09bd (2493) B 03 GfxAvfsPadding : 3
0x09be (2494) H 0f00 DroopGBStDev : 15
0x09c0 (2496) I 00000001 SocHwRtAvfsFuses : 16777216
0x09c4 (2500) I 00000001 SocHwRtAvfsFuses : 16777216
0x09c8 (2504) I 00000001 SocHwRtAvfsFuses : 16777216
0x09cc (2508) I 00000001 SocHwRtAvfsFuses : 16777216
0x09d0 (2512) I 00000001 SocHwRtAvfsFuses : 16777216
0x09d4 (2516) I 00000100 SocHwRtAvfsFuses : 65536
0x09d8 (2520) I 00800000 SocHwRtAvfsFuses : 32768
0x09dc (2524) I 00000100 SocHwRtAvfsFuses : 65536
0x09e0 (2528) I 00800000 SocHwRtAvfsFuses : 32768
0x09e4 (2532) I 00000100 SocHwRtAvfsFuses : 65536
0x09e8 (2536) I 00800000 SocHwRtAvfsFuses : 32768
0x09ec (2540) I 00000100 SocHwRtAvfsFuses : 65536
0x09f0 (2544) I 00800000 SocHwRtAvfsFuses : 32768
0x09f4 (2548) I 00000100 SocHwRtAvfsFuses : 65536
0x09f8 (2552) I 00800000 SocHwRtAvfsFuses : 32768
0x09fc (2556) I b1001301 SocHwRtAvfsFuses : 18022577
0x0a00 (2560) I da003101 SocHwRtAvfsFuses : 19988698
0x0a04 (2564) I fd005801 SocHwRtAvfsFuses : 22544637
0x0a08 (2568) I 1f018b01 SocHwRtAvfsFuses : 25887007
0x0a0c (2572) I 00000000 SocHwRtAvfsFuses : 0
0x0a10 (2576) I 00000000 SocHwRtAvfsFuses : 0
0x0a14 (2580) I 00000000 SocHwRtAvfsFuses : 0
0x0a18 (2584) I 00000000 SocHwRtAvfsFuses : 0
0x0a1c (2588) I 00000000 SocHwRtAvfsFuses : 0
0x0a20 (2592) I 00000000 SocHwRtAvfsFuses : 0
0x0a24 (2596) I 00000000 SocHwRtAvfsFuses : 0
0x0a28 (2600) I 00000000 SocHwRtAvfsFuses : 0
0x0a2c (2604) I 00000000 SocHwRtAvfsFuses : 0
0x0a30 (2608) I 26002600 SocHwRtAvfsFuses : 2490406
0x0a34 (2612) I 26002600 SocHwRtAvfsFuses : 2490406
0x0a38 (2616) I 26000000 SocHwRtAvfsFuses : 38
0x0a3c (2620) I ffff0000 SocHwRtAvfsFuses : 65535
0x0a40 (2624) I 00000001 GfxL2HwRtAvfsFuses : 16777216
0x0a44 (2628) I 00000001 GfxL2HwRtAvfsFuses : 16777216
0x0a48 (2632) I 00000001 GfxL2HwRtAvfsFuses : 16777216
0x0a4c (2636) I 00000001 GfxL2HwRtAvfsFuses : 16777216
0x0a50 (2640) I 00000001 GfxL2HwRtAvfsFuses : 16777216
0x0a54 (2644) I 00c0fca8 GfxL2HwRtAvfsFuses : 2835136512
0x0a58 (2648) I 00300444 GfxL2HwRtAvfsFuses : 1141125120
0x0a5c (2652) I 00c0fca8 GfxL2HwRtAvfsFuses : 2835136512
0x0a60 (2656) I 00300444 GfxL2HwRtAvfsFuses : 1141125120
0x0a64 (2660) I 00c0fca8 GfxL2HwRtAvfsFuses : 2835136512
0x0a68 (2664) I 00300444 GfxL2HwRtAvfsFuses : 1141125120
0x0a6c (2668) I 00c0fca8 GfxL2HwRtAvfsFuses : 2835136512
0x0a70 (2672) I 00300444 GfxL2HwRtAvfsFuses : 1141125120
0x0a74 (2676) I 00c0fca8 GfxL2HwRtAvfsFuses : 2835136512
0x0a78 (2680) I 00300444 GfxL2HwRtAvfsFuses : 1141125120
0x0a7c (2684) I c6071301 GfxL2HwRtAvfsFuses : 18024390
0x0a80 (2688) I 37093101 GfxL2HwRtAvfsFuses : 19990839
0x0a84 (2692) I 140a5801 GfxL2HwRtAvfsFuses : 22546964
0x0a88 (2696) I 850b8b01 GfxL2HwRtAvfsFuses : 25889669
0x0a8c (2700) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0a90 (2704) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0a94 (2708) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0a98 (2712) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0a9c (2716) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0aa0 (2720) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0aa4 (2724) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0aa8 (2728) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0aac (2732) I 00000000 GfxL2HwRtAvfsFuses : 0
0x0ab0 (2736) I 05800580 GfxL2HwRtAvfsFuses : 2147844101
0x0ab4 (2740) I 05800580 GfxL2HwRtAvfsFuses : 2147844101
0x0ab8 (2744) I 05800000 GfxL2HwRtAvfsFuses : 32773
0x0abc (2748) I ffff0000 GfxL2HwRtAvfsFuses : 65535
0x0ac0 (2752) H 5203 PsmDidt_Vcross : 850
0x0ac2 (2754) H e803 PsmDidt_Vcross : 1000
0x0ac4 (2756) f cdcc4c3f PsmDidt_StaticDroop_A : 0.8
0x0ac8 (2760) f cdcc4c3f PsmDidt_StaticDroop_A : 0.8
0x0acc (2764) f cdcc4c3f PsmDidt_StaticDroop_A : 0.8
0x0ad0 (2768) f 00000000 PsmDidt_StaticDroop_B : 0
0x0ad4 (2772) f 00000000 PsmDidt_StaticDroop_B : 0
0x0ad8 (2776) f 00000000 PsmDidt_StaticDroop_B : 0
0x0adc (2780) f 00000000 PsmDidt_DynDroop_A : 0
0x0ae0 (2784) f 00000000 PsmDidt_DynDroop_A : 0
0x0ae4 (2788) f 00000000 PsmDidt_DynDroop_A : 0
0x0ae8 (2792) f 00000000 PsmDidt_DynDroop_B : 0
0x0aec (2796) f 00000000 PsmDidt_DynDroop_B : 0
0x0af0 (2800) f 00000000 PsmDidt_DynDroop_B : 0
0x0af4 (2804) I 00000000 HwRtAvfsFuses : 0
0x0af8 (2808) I 00000000 HwRtAvfsFuses : 0
0x0afc (2812) I 00000000 HwRtAvfsFuses : 0
0x0b00 (2816) I 00000000 HwRtAvfsFuses : 0
0x0b04 (2820) I 00000000 HwRtAvfsFuses : 0
0x0b08 (2824) I 00000000 HwRtAvfsFuses : 0
0x0b0c (2828) I 00000000 HwRtAvfsFuses : 0
0x0b10 (2832) I 00000000 HwRtAvfsFuses : 0
0x0b14 (2836) I 00000000 HwRtAvfsFuses : 0
0x0b18 (2840) I 00000000 HwRtAvfsFuses : 0
0x0b1c (2844) I 00000000 HwRtAvfsFuses : 0
0x0b20 (2848) I 00000000 HwRtAvfsFuses : 0
0x0b24 (2852) I 00000000 HwRtAvfsFuses : 0
0x0b28 (2856) I 00000000 HwRtAvfsFuses : 0
0x0b2c (2860) I 00000000 HwRtAvfsFuses : 0
0x0b30 (2864) I 00000000 HwRtAvfsFuses : 0
0x0b34 (2868) I 00000000 HwRtAvfsFuses : 0
0x0b38 (2872) I 00000000 HwRtAvfsFuses : 0
0x0b3c (2876) I 00000000 HwRtAvfsFuses : 0
0x0b40 (2880) I bc020000 SocCommonRtAvfs : 700
0x0b44 (2884) I bc020000 SocCommonRtAvfs : 700
0x0b48 (2888) I bc020000 SocCommonRtAvfs : 700
0x0b4c (2892) I bc020000 SocCommonRtAvfs : 700
0x0b50 (2896) I bc020000 SocCommonRtAvfs : 700
0x0b54 (2900) I bc020000 SocCommonRtAvfs : 700
0x0b58 (2904) I bc020000 SocCommonRtAvfs : 700
0x0b5c (2908) I bc020000 SocCommonRtAvfs : 700
0x0b60 (2912) I 00000000 SocCommonRtAvfs : 0
0x0b64 (2916) I 00000000 SocCommonRtAvfs : 0
0x0b68 (2920) I 00000000 SocCommonRtAvfs : 0
0x0b6c (2924) I 00000000 SocCommonRtAvfs : 0
0x0b70 (2928) I 00000000 SocCommonRtAvfs : 0
0x0b74 (2932) I bc020000 GfxCommonRtAvfs : 700
0x0b78 (2936) I bc020000 GfxCommonRtAvfs : 700
0x0b7c (2940) I bc020000 GfxCommonRtAvfs : 700
0x0b80 (2944) I bc020000 GfxCommonRtAvfs : 700
0x0b84 (2948) I bc020000 GfxCommonRtAvfs : 700
0x0b88 (2952) I bc020000 GfxCommonRtAvfs : 700
0x0b8c (2956) I bc020000 GfxCommonRtAvfs : 700
0x0b90 (2960) I bc020000 GfxCommonRtAvfs : 700
0x0b94 (2964) I 00000000 GfxCommonRtAvfs : 0
0x0b98 (2968) I 00000000 GfxCommonRtAvfs : 0
0x0b9c (2972) I 00000000 GfxCommonRtAvfs : 0
0x0ba0 (2976) I 00000000 GfxCommonRtAvfs : 0
0x0ba4 (2980) I 00000000 GfxCommonRtAvfs : 0
0x0ba8 (2984) I 0b000000 SocFwRtAvfsFuses : 11
0x0bac (2988) I 0b000000 SocFwRtAvfsFuses : 11
0x0bb0 (2992) I 09000000 SocFwRtAvfsFuses : 9
0x0bb4 (2996) I 0d000000 SocFwRtAvfsFuses : 13
0x0bb8 (3000) I 18000000 SocFwRtAvfsFuses : 24
0x0bbc (3004) I 18000000 SocFwRtAvfsFuses : 24
0x0bc0 (3008) I 00000000 SocFwRtAvfsFuses : 0
0x0bc4 (3012) I 00000000 SocFwRtAvfsFuses : 0
0x0bc8 (3016) I 01000000 SocFwRtAvfsFuses : 1
0x0bcc (3020) I 01000000 SocFwRtAvfsFuses : 1
0x0bd0 (3024) I 00000000 SocFwRtAvfsFuses : 0
0x0bd4 (3028) I 00000000 SocFwRtAvfsFuses : 0
0x0bd8 (3032) I 00000000 SocFwRtAvfsFuses : 0
0x0bdc (3036) I b80b0000 SocFwRtAvfsFuses : 3000
0x0be0 (3040) I f4030000 SocFwRtAvfsFuses : 1012
0x0be4 (3044) I f4030000 SocFwRtAvfsFuses : 1012
0x0be8 (3048) I f4030000 SocFwRtAvfsFuses : 1012
0x0bec (3052) I f4030000 SocFwRtAvfsFuses : 1012
0x0bf0 (3056) I f4030000 SocFwRtAvfsFuses : 1012
0x0bf4 (3060) I 04000000 GfxL2FwRtAvfsFuses : 4
0x0bf8 (3064) I 04000000 GfxL2FwRtAvfsFuses : 4
0x0bfc (3068) I 03000000 GfxL2FwRtAvfsFuses : 3
0x0c00 (3072) I 05000000 GfxL2FwRtAvfsFuses : 5
0x0c04 (3076) I 0a000000 GfxL2FwRtAvfsFuses : 10
0x0c08 (3080) I 0a000000 GfxL2FwRtAvfsFuses : 10
0x0c0c (3084) I 00000000 GfxL2FwRtAvfsFuses : 0
0x0c10 (3088) I 00000000 GfxL2FwRtAvfsFuses : 0
0x0c14 (3092) I 01000000 GfxL2FwRtAvfsFuses : 1
0x0c18 (3096) I 01000000 GfxL2FwRtAvfsFuses : 1
0x0c1c (3100) I 01000000 GfxL2FwRtAvfsFuses : 1
0x0c20 (3104) I 01000000 GfxL2FwRtAvfsFuses : 1
0x0c24 (3108) I 00000000 GfxL2FwRtAvfsFuses : 0
0x0c28 (3112) I f60c0000 GfxL2FwRtAvfsFuses : 3318
0x0c2c (3116) I ce1c0000 GfxL2FwRtAvfsFuses : 7374
0x0c30 (3120) I ce1c0000 GfxL2FwRtAvfsFuses : 7374
0x0c34 (3124) I ce1c0000 GfxL2FwRtAvfsFuses : 7374
0x0c38 (3128) I ce1c0000 GfxL2FwRtAvfsFuses : 7374
0x0c3c (3132) I ce1c0000 GfxL2FwRtAvfsFuses : 7374
0x0c40 (3136) I 00000000 FwRtAvfsFuses : 0
0x0c44 (3140) I 00000000 FwRtAvfsFuses : 0
0x0c48 (3144) I 00000000 FwRtAvfsFuses : 0
0x0c4c (3148) I 00000000 FwRtAvfsFuses : 0
0x0c50 (3152) I 00000000 FwRtAvfsFuses : 0
0x0c54 (3156) I 00000000 FwRtAvfsFuses : 0
0x0c58 (3160) I 00000000 FwRtAvfsFuses : 0
0x0c5c (3164) I 00000000 FwRtAvfsFuses : 0
0x0c60 (3168) I 00000000 FwRtAvfsFuses : 0
0x0c64 (3172) I 00000000 FwRtAvfsFuses : 0
0x0c68 (3176) I 00000000 FwRtAvfsFuses : 0
0x0c6c (3180) I 00000000 FwRtAvfsFuses : 0
0x0c70 (3184) I 00000000 FwRtAvfsFuses : 0
0x0c74 (3188) I 00000000 FwRtAvfsFuses : 0
0x0c78 (3192) I 00000000 FwRtAvfsFuses : 0
0x0c7c (3196) I 00000000 FwRtAvfsFuses : 0
0x0c80 (3200) I 00000000 FwRtAvfsFuses : 0
0x0c84 (3204) I 00000000 FwRtAvfsFuses : 0
0x0c88 (3208) I 00000000 FwRtAvfsFuses : 0
0x0c8c (3212) f 0000803f Soc_Droop_PWL_F : 1
0x0c90 (3216) f 6666e63f Soc_Droop_PWL_F : 1.8
0x0c94 (3220) f cdcc2c40 Soc_Droop_PWL_F : 2.7
0x0c98 (3224) f 00004040 Soc_Droop_PWL_F : 3
0x0c9c (3228) f 66666640 Soc_Droop_PWL_F : 3.6
0x0ca0 (3232) f 92968a3d Soc_Droop_PWL_a : 0.06767
0x0ca4 (3236) f 92968a3d Soc_Droop_PWL_a : 0.06767
0x0ca8 (3240) f 92968a3d Soc_Droop_PWL_a : 0.06767
0x0cac (3244) f 92968a3d Soc_Droop_PWL_a : 0.06767
0x0cb0 (3248) f 92968a3d Soc_Droop_PWL_a : 0.06767
0x0cb4 (3252) f 533f6f3d Soc_Droop_PWL_b : 0.05841
0x0cb8 (3256) f 533f6f3d Soc_Droop_PWL_b : 0.05841
0x0cbc (3260) f 533f6f3d Soc_Droop_PWL_b : 0.05841
0x0cc0 (3264) f 533f6f3d Soc_Droop_PWL_b : 0.05841
0x0cc4 (3268) f 533f6f3d Soc_Droop_PWL_b : 0.05841
0x0cc8 (3272) f e8de43bd Soc_Droop_PWL_c :-0.04782
0x0ccc (3276) f e8de43bd Soc_Droop_PWL_c :-0.04782
0x0cd0 (3280) f e8de43bd Soc_Droop_PWL_c :-0.04782
0x0cd4 (3284) f e8de43bd Soc_Droop_PWL_c :-0.04782
0x0cd8 (3288) f e8de43bd Soc_Droop_PWL_c :-0.04782
0x0cdc (3292) f 0000803f Gfx_Droop_PWL_F : 1
0x0ce0 (3296) f 33333340 Gfx_Droop_PWL_F : 2.8
0x0ce4 (3300) f ec513840 Gfx_Droop_PWL_F : 2.88
0x0ce8 (3304) f cdcc4c40 Gfx_Droop_PWL_F : 3.2
0x0cec (3308) f 66666640 Gfx_Droop_PWL_F : 3.6
0x0cf0 (3312) f 5856123f Gfx_Droop_PWL_a : 0.57163
0x0cf4 (3316) f 5856123f Gfx_Droop_PWL_a : 0.57163
0x0cf8 (3320) f 5856123f Gfx_Droop_PWL_a : 0.57163
0x0cfc (3324) f dbdcc83e Gfx_Droop_PWL_a : 0.39231
0x0d00 (3328) f dbdcc83e Gfx_Droop_PWL_a : 0.39231
0x0d04 (3332) f 01f6d13c Gfx_Droop_PWL_b : 0.02563
0x0d08 (3336) f 01f6d13c Gfx_Droop_PWL_b : 0.02563
0x0d0c (3340) f 01f6d13c Gfx_Droop_PWL_b : 0.02563
0x0d10 (3344) f 99d3453e Gfx_Droop_PWL_b : 0.19319
0x0d14 (3348) f 99d3453e Gfx_Droop_PWL_b : 0.19319
0x0d18 (3352) f ce3697be Gfx_Droop_PWL_c :-0.29534
0x0d1c (3356) f 4da193be Gfx_Droop_PWL_c :-0.28834
0x0d20 (3360) f b9888fbe Gfx_Droop_PWL_c :-0.28034
0x0d24 (3364) f 7b8327bf Gfx_Droop_PWL_c :-0.65435
0x0d28 (3368) f 7b8327bf Gfx_Droop_PWL_c :-0.65435
0x0d2c (3372) I 00000000 Gfx_Static_PWL_Offset : 0
0x0d30 (3376) I 00000000 Gfx_Static_PWL_Offset : 0
0x0d34 (3380) I 00000000 Gfx_Static_PWL_Offset : 0
0x0d38 (3384) I 00000000 Gfx_Static_PWL_Offset : 0
0x0d3c (3388) I 00000000 Gfx_Static_PWL_Offset : 0
0x0d40 (3392) I 00000000 Soc_Static_PWL_Offset : 0
0x0d44 (3396) I 00000000 Soc_Static_PWL_Offset : 0
0x0d48 (3400) I 00000000 Soc_Static_PWL_Offset : 0
0x0d4c (3404) I 00000000 Soc_Static_PWL_Offset : 0
0x0d50 (3408) I 00000000 Soc_Static_PWL_Offset : 0
0x0d54 (3412) I 00000000 GbV_dT_vmin : 0
0x0d58 (3416) I 00000000 GbV_dT_vmax : 0
0x0d5c (3420) I 00000000 PaddingV2F : 0
0x0d60 (3424) I 00000000 PaddingV2F : 0
0x0d64 (3428) I 00000000 PaddingV2F : 0
0x0d68 (3432) I 00000000 PaddingV2F : 0
0x0d6c (3436) B 00 DcBtcEnabled : 0
0x0d6d (3437) B 00 Padding : 0
0x0d6e (3438) B 00 Padding : 0
0x0d6f (3439) B 00 Padding : 0
0x0d70 (3440) H 1400 DcTol : 20
0x0d72 (3442) H 0000 DcBtcGb : 0
0x0d74 (3444) H 0000 DcBtcMin : 0
0x0d76 (3446) H 0000 DcBtcMax : 0
0x0d78 (3448) f 00000000 m : 0
0x0d7c (3452) f 00000000 b : 0
0x0d80 (3456) f 8a8ee43d a : 0.1116
0x0d84 (3460) f 302a69be b :-0.2277
0x0d88 (3464) f bb273f3f c : 0.7467
0x0d8c (3468) I cdcc0c3e GfxAvfsSpare : 1041026253
0x0d90 (3472) I d50988be GfxAvfsSpare : 3196586453
0x0d94 (3476) I 6ade413f GfxAvfsSpare : 1061281386
0x0d98 (3480) I 00000000 GfxAvfsSpare : 0
0x0d9c (3484) I 00000000 GfxAvfsSpare : 0
0x0da0 (3488) I 00000000 GfxAvfsSpare : 0
0x0da4 (3492) I 00000000 GfxAvfsSpare : 0
0x0da8 (3496) I 00000000 GfxAvfsSpare : 0
0x0dac (3500) I 00000000 GfxAvfsSpare : 0
0x0db0 (3504) I 00000000 GfxAvfsSpare : 0
0x0db4 (3508) I 00000000 GfxAvfsSpare : 0
0x0db8 (3512) I 00000000 GfxAvfsSpare : 0
0x0dbc (3516) I 00000000 GfxAvfsSpare : 0
0x0dc0 (3520) I 00000000 GfxAvfsSpare : 0
0x0dc4 (3524) I 00000000 GfxAvfsSpare : 0
0x0dc8 (3528) I 00000000 GfxAvfsSpare : 0
0x0dcc (3532) I 00000000 GfxAvfsSpare : 0
0x0dd0 (3536) I 00000000 GfxAvfsSpare : 0
0x0dd4 (3540) I 00000000 GfxAvfsSpare : 0
0x0dd8 (3544) I 00000000 GfxAvfsSpare : 0
0x0ddc (3548) I 00000000 GfxAvfsSpare : 0
0x0de0 (3552) I 00000000 GfxAvfsSpare : 0
0x0de4 (3556) I 00000000 GfxAvfsSpare : 0
0x0de8 (3560) I 00000000 GfxAvfsSpare : 0
0x0dec (3564) I 00000000 GfxAvfsSpare : 0
0x0df0 (3568) I 00000000 GfxAvfsSpare : 0
0x0df4 (3572) I 00000000 GfxAvfsSpare : 0
0x0df8 (3576) I 00000000 GfxAvfsSpare : 0
0x0dfc (3580) I 00000000 GfxAvfsSpare : 0
0x0e00 (3584) B 00 OverrideSocAvfsFuses : 0
0x0e01 (3585) B 00 MinSocAvfsRevision : 0
0x0e02 (3586) B 00 SocAvfsPadding : 0
0x0e03 (3587) B 00 SocAvfsPadding : 0
0x0e04 (3588) H 0000 AvfsTemp : 0
0x0e06 (3590) H 0000 AvfsTemp : 0
0x0e08 (3592) H 0000 VftFMin : 0
0x0e0a (3594) H 0000 VInversion : 0
0x0e0c (3596) f 00000000 a : 0
0x0e10 (3600) f 00000000 b : 0
0x0e14 (3604) f 00000000 c : 0
0x0e18 (3608) f 00000000 a : 0
0x0e1c (3612) f 00000000 b : 0
0x0e20 (3616) f 00000000 c : 0
0x0e24 (3620) f 00000000 a : 0
0x0e28 (3624) f 00000000 b : 0
0x0e2c (3628) f 00000000 c : 0
0x0e30 (3632) f 00000000 a : 0
0x0e34 (3636) f 00000000 b : 0
0x0e38 (3640) f 00000000 c : 0
0x0e3c (3644) f 00000000 a : 0
0x0e40 (3648) f 00000000 b : 0
0x0e44 (3652) f 00000000 c : 0
0x0e48 (3656) f 00000000 m : 0
0x0e4c (3660) f 00000000 b : 0
0x0e50 (3664) f 00000000 a : 0
0x0e54 (3668) f 00000000 b : 0
0x0e58 (3672) f 00000000 c : 0
0x0e5c (3676) B 00 DcBtcEnabled : 0
0x0e5d (3677) B 00 Padding : 0
0x0e5e (3678) B 00 Padding : 0
0x0e5f (3679) B 00 Padding : 0
0x0e60 (3680) H 1400 DcTol : 20
0x0e62 (3682) H 0000 DcBtcGb : 0
0x0e64 (3684) H 0000 DcBtcMin : 0
0x0e66 (3686) H 0000 DcBtcMax : 0
0x0e68 (3688) f 00000000 m : 0
0x0e6c (3692) f 00000000 b : 0
0x0e70 (3696) f f5b91a3e a : 0.1511
0x0e74 (3700) f 82e287be b :-0.2654
0x0e78 (3704) f 2f6e433f c : 0.7634
0x0e7c (3708) I ce88d2bc SocAvfsSpare : 3167914190
0x0e80 (3712) I 50fc083f SocAvfsSpare : 1057553488
0x0e84 (3716) I 00000000 SocAvfsSpare : 0
0x0e88 (3720) I 00000000 SocAvfsSpare : 0
0x0e8c (3724) I 00000000 SocAvfsSpare : 0
0x0e90 (3728) I 00000000 SocAvfsSpare : 0
0x0e94 (3732) I 00000000 SocAvfsSpare : 0
0x0e98 (3736) I 00000000 SocAvfsSpare : 0
0x0e9c (3740) I 00000000 SocAvfsSpare : 0
0x0ea0 (3744) I 00000000 SocAvfsSpare : 0
0x0ea4 (3748) I 00000000 SocAvfsSpare : 0
0x0ea8 (3752) I 00000000 SocAvfsSpare : 0
0x0eac (3756) I 00000000 SocAvfsSpare : 0
0x0eb0 (3760) I 00000000 SocAvfsSpare : 0
0x0eb4 (3764) I 00000000 SocAvfsSpare : 0
0x0eb8 (3768) I 00000000 SocAvfsSpare : 0
0x0ebc (3772) I 00000000 SocAvfsSpare : 0
0x0ec0 (3776) I 00000000 SocAvfsSpare : 0
0x0ec4 (3780) I 00000000 SocAvfsSpare : 0
0x0ec8 (3784) I 00000000 SocAvfsSpare : 0
0x0ecc (3788) I 00000000 SocAvfsSpare : 0
0x0ed0 (3792) I 00000000 SocAvfsSpare : 0
0x0ed4 (3796) I 00000000 SocAvfsSpare : 0
0x0ed8 (3800) I 00000000 SocAvfsSpare : 0
0x0edc (3804) I 00000000 SocAvfsSpare : 0
0x0ee0 (3808) I 00000000 SocAvfsSpare : 0
0x0ee4 (3812) I 00000000 SocAvfsSpare : 0
0x0ee8 (3816) I 00000000 SocAvfsSpare : 0
0x0eec (3820) I 00000000 SocAvfsSpare : 0
0x0ef0 (3824) H 5802 InitImuClk : 600
0x0ef2 (3826) H a201 InitSocclk : 418
0x0ef4 (3828) H f401 InitMpioclk : 500
0x0ef6 (3830) H f401 InitSmnclk : 500
0x0ef8 (3832) H 5802 InitDispClk : 600
0x0efa (3834) H 5802 InitDppClk : 600
0x0efc (3836) H d002 InitDprefclk : 720
0x0efe (3838) H d002 InitDcfclk : 720
0x0f00 (3840) H d002 InitDtbclk : 720
0x0f02 (3842) H 0000 InitDbguSocClk : 0
0x0f04 (3844) H e803 InitGfxclk_bypass : 1000
0x0f06 (3846) H f401 InitMp1clk : 500
0x0f08 (3848) H 7704 InitLclk : 1143
0x0f0a (3850) H 0000 InitDbguBacoClk : 0
0x0f0c (3852) H 9001 InitBaco400clk : 400
0x0f0e (3854) H 7704 InitBaco1200clk_bypass : 1143
0x0f10 (3856) H b802 InitBaco700clk_bypass : 696
0x0f12 (3858) H f401 InitBaco500clk : 500
0x0f14 (3860) H 0000 InitDclk0 : 0
0x0f16 (3862) H 0000 InitVclk0 : 0
0x0f18 (3864) H e803 InitFclk : 1000
0x0f1a (3866) H b004 Padding1 : 1200
0x0f1c (3868) B 05 InitUclkLevel : 5
0x0f1d (3869) B 02 Padding : 2
0x0f1e (3870) B f4 Padding : 244
0x0f1f (3871) B 01 Padding : 1
0x0f20 (3872) I c0120000 InitVcoFreqPll0 : 4800
0x0f24 (3876) I 94110000 InitVcoFreqPll1 : 4500
0x0f28 (3880) I a00f0000 InitVcoFreqPll2 : 4000
0x0f2c (3884) I 00000000 InitVcoFreqPll3 : 0
0x0f30 (3888) I d0070000 InitVcoFreqPll4 : 2000
0x0f34 (3892) I a00f0000 InitVcoFreqPll5 : 4000
0x0f38 (3896) I a00f0000 InitVcoFreqPll6 : 4000
0x0f3c (3900) I a00f0000 InitVcoFreqPll7 : 4000
0x0f40 (3904) I a00f0000 InitVcoFreqPll8 : 4000
0x0f44 (3908) H 0000 InitGfx : 0
0x0f46 (3910) H e40c InitSoc : 3300
0x0f48 (3912) H 8813 InitVddIoMem : 5000
0x0f4a (3914) H f00a InitVddCiMem : 2800
0x0f4c (3916) I a00f0000 Spare : 4000
0x0f50 (3920) I 0000f00a Spare : 183500800
0x0f54 (3924) I 8813f00a Spare : 183505800
0x0f58 (3928) I 00000000 Spare : 0
0x0f5c (3932) I 00000000 Spare : 0
0x0f60 (3936) I 00000000 Spare : 0
0x0f64 (3940) I 00000000 Spare : 0
0x0f68 (3944) I 00000000 Spare : 0
0x0f6c (3948) H d804 BaseClockAc : 1240
0x0f6e (3950) H 1608 GameClockAc : 2070
0x0f70 (3952) H d809 BoostClockAc : 2520
0x0f72 (3954) H 0000 BaseClockDc : 0
0x0f74 (3956) H 0000 GameClockDc : 0
0x0f76 (3958) H 0000 BoostClockDc : 0
0x0f78 (3960) H 480d MaxReportedClock : 3400
0x0f7a (3962) H 0000 Padding : 0
0x0f7c (3964) I 00000000 Reserved : 0
0x0f80 (3968) I 00000000 Reserved : 0
0x0f84 (3972) I 00000000 Reserved : 0
0x0f88 (3976) H f500 Power : 245
0x0f8a (3978) H f500 Power : 245
0x0f8c (3980) H b004 Power : 1200
0x0f8e (3982) H b004 Power : 1200
0x0f90 (3984) H 0000 Power : 0
0x0f92 (3986) H 0000 Power : 0
0x0f94 (3988) H 0000 Power : 0
0x0f96 (3990) H 0000 Power : 0
0x0f98 (3992) H 4a01 Tdc : 330
0x0f9a (3994) H 5400 Tdc : 84
0x0f9c (3996) H 6e00 Temperature : 110
0x0f9e (3998) H 6e00 Temperature : 110
0x0fa0 (4000) H 0000 Temperature : 0
0x0fa2 (4002) H 0000 Temperature : 0
0x0fa4 (4004) H 6c00 Temperature : 108
0x0fa6 (4006) H 7300 Temperature : 115
0x0fa8 (4008) H 7300 Temperature : 115
0x0faa (4010) H 7300 Temperature : 115
0x0fac (4012) H 7300 Temperature : 115
0x0fae (4014) H 0000 Temperature : 0
0x0fb0 (4016) H 0000 Temperature : 0
0x0fb2 (4018) H 0000 Temperature : 0
0x0fb4 (4020) B 00 PwmLimitMin : 0
0x0fb5 (4021) B ff PwmLimitMax : 255
0x0fb6 (4022) B 6e FanTargetTemperature : 110
0x0fb7 (4023) B 00 Spare1 : 0
0x0fb8 (4024) H f401 AcousticTargetRpmThresholdMin : 500
0x0fba (4026) H 7017 AcousticTargetRpmThresholdMax : 6000
0x0fbc (4028) H f401 AcousticLimitRpmThresholdMin : 500
0x0fbe (4030) H 7017 AcousticLimitRpmThresholdMax : 6000
0x0fc0 (4032) H 0000 PccLimitMin : 0
0x0fc2 (4034) H 0000 PccLimitMax : 0
0x0fc4 (4036) H 1e00 FanStopTempMin : 30
0x0fc6 (4038) H 5000 FanStopTempMax : 80
0x0fc8 (4040) H 2800 FanStartTempMin : 40
0x0fca (4042) H 5a00 FanStartTempMax : 90
0x0fcc (4044) H 0000 PowerMinPpt0 : 0
0x0fce (4046) H 0000 PowerMinPpt0 : 0
0x0fd0 (4048) I 00000000 Spare : 0
0x0fd4 (4052) I 00000000 Spare : 0
0x0fd8 (4056) I 00000000 Spare : 0
0x0fdc (4060) I 00000000 Spare : 0
0x0fe0 (4064) I 00000000 Spare : 0
0x0fe4 (4068) I 00000000 Spare : 0
0x0fe8 (4072) I 00000000 Spare : 0
0x0fec (4076) I 00000000 Spare : 0
0x0ff0 (4080) I 00000000 Spare : 0
0x0ff4 (4084) I 00000000 Spare : 0
0x0ff8 (4088) I 00000000 Spare : 0
0x0ffc (4092) I 391b0000 FeatureCtrlMask : 6969
0x1000 (4096) h 38ff VoltageOffsetPerZoneBoundary :-200
0x1002 (4098) h 38ff VoltageOffsetPerZoneBoundary :-200
0x1004 (4100) h 38ff VoltageOffsetPerZoneBoundary :-200
0x1006 (4102) h 38ff VoltageOffsetPerZoneBoundary :-200
0x1008 (4104) h 38ff VoltageOffsetPerZoneBoundary :-200
0x100a (4106) h 38ff VoltageOffsetPerZoneBoundary :-200
0x100c (4108) H 0000 VddGfxVmax : 0
0x100e (4110) H 0000 VddSocVmax : 0
0x1010 (4112) h 0cfe GfxclkFoffset :-500
0x1012 (4114) H 0000 Padding : 0
0x1014 (4116) H 6100 UclkFmin : 97
0x1016 (4118) H 6100 UclkFmax : 97
0x1018 (4120) H 0000 FclkFmin : 0
0x101a (4122) H 0000 FclkFmax : 0
0x101c (4124) h e2ff Ppt :-30
0x101e (4126) h 0000 Tdc : 0
0x1020 (4128) B 19 FanLinearPwmPoints : 25
0x1021 (4129) B 19 FanLinearPwmPoints : 25
0x1022 (4130) B 19 FanLinearPwmPoints : 25
0x1023 (4131) B 19 FanLinearPwmPoints : 25
0x1024 (4132) B 19 FanLinearPwmPoints : 25
0x1025 (4133) B 19 FanLinearPwmPoints : 25
0x1026 (4134) B 19 FanLinearTempPoints : 25
0x1027 (4135) B 19 FanLinearTempPoints : 25
0x1028 (4136) B 19 FanLinearTempPoints : 25
0x1029 (4137) B 19 FanLinearTempPoints : 25
0x102a (4138) B 19 FanLinearTempPoints : 25
0x102b (4139) B 19 FanLinearTempPoints : 25
0x102c (4140) H 1900 FanMinimumPwm : 25
0x102e (4142) H f401 AcousticTargetRpmThreshold : 500
0x1030 (4144) H f401 AcousticLimitRpmThreshold : 500
0x1032 (4146) H 1900 FanTargetTemperature : 25
0x1034 (4148) B 00 FanZeroRpmEnable : 0
0x1035 (4149) B 32 MaxOpTemp : 50
0x1036 (4150) B 00 Padding1 : 0
0x1037 (4151) B 00 Padding1 : 0
0x1038 (4152) H 0000 GfxVoltageFullCtrlMode : 0
0x103a (4154) H 0000 SocVoltageFullCtrlMode : 0
0x103c (4156) H 0000 GfxclkFullCtrlMode : 0
0x103e (4158) H 0000 UclkFullCtrlMode : 0
0x1040 (4160) H 0000 FclkFullCtrlMode : 0
0x1042 (4162) h 0000 GfxEdc : 0
0x1044 (4164) h 0000 GfxPccLimitControl : 0
0x1046 (4166) h 0000 Padding2 : 0
0x1048 (4168) I 00000000 Spare : 0
0x104c (4172) I 00000000 Spare : 0
0x1050 (4176) I 00000000 Spare : 0
0x1054 (4180) I 00000000 Spare : 0
0x1058 (4184) I 00000000 Spare : 0
0x105c (4188) I 391b0000 FeatureCtrlMask : 6969
0x1060 (4192) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1062 (4194) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1064 (4196) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1066 (4198) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1068 (4200) h 0000 VoltageOffsetPerZoneBoundary : 0
0x106a (4202) h 0000 VoltageOffsetPerZoneBoundary : 0
0x106c (4204) H 0000 VddGfxVmax : 0
0x106e (4206) H 0000 VddSocVmax : 0
0x1070 (4208) h e803 GfxclkFoffset : 1000
0x1072 (4210) H 0000 Padding : 0
0x1074 (4212) H dc05 UclkFmin : 1500
0x1076 (4214) H dc05 UclkFmax : 1500
0x1078 (4216) H 0000 FclkFmin : 0
0x107a (4218) H 0000 FclkFmax : 0
0x107c (4220) h 0a00 Ppt : 10
0x107e (4222) h 0000 Tdc : 0
0x1080 (4224) B 64 FanLinearPwmPoints : 100
0x1081 (4225) B 64 FanLinearPwmPoints : 100
0x1082 (4226) B 64 FanLinearPwmPoints : 100
0x1083 (4227) B 64 FanLinearPwmPoints : 100
0x1084 (4228) B 64 FanLinearPwmPoints : 100
0x1085 (4229) B 64 FanLinearPwmPoints : 100
0x1086 (4230) B 64 FanLinearTempPoints : 100
0x1087 (4231) B 64 FanLinearTempPoints : 100
0x1088 (4232) B 64 FanLinearTempPoints : 100
0x1089 (4233) B 64 FanLinearTempPoints : 100
0x108a (4234) B 64 FanLinearTempPoints : 100
0x108b (4235) B 64 FanLinearTempPoints : 100
0x108c (4236) H 6400 FanMinimumPwm : 100
0x108e (4238) H 420e AcousticTargetRpmThreshold : 3650
0x1090 (4240) H 420e AcousticLimitRpmThreshold : 3650
0x1092 (4242) H 6900 FanTargetTemperature : 105
0x1094 (4244) B 01 FanZeroRpmEnable : 1
0x1095 (4245) B 6e MaxOpTemp : 110
0x1096 (4246) B 00 Padding1 : 0
0x1097 (4247) B 00 Padding1 : 0
0x1098 (4248) H 0000 GfxVoltageFullCtrlMode : 0
0x109a (4250) H 0000 SocVoltageFullCtrlMode : 0
0x109c (4252) H 0000 GfxclkFullCtrlMode : 0
0x109e (4254) H 0000 UclkFullCtrlMode : 0
0x10a0 (4256) H 0000 FclkFullCtrlMode : 0
0x10a2 (4258) h 0000 GfxEdc : 0
0x10a4 (4260) h 0000 GfxPccLimitControl : 0
0x10a6 (4262) h 0000 Padding2 : 0
0x10a8 (4264) I 00000000 Spare : 0
0x10ac (4268) I 00000000 Spare : 0
0x10b0 (4272) I 00000000 Spare : 0
0x10b4 (4276) I 00000000 Spare : 0
0x10b8 (4280) I 00000000 Spare : 0
0x10bc (4284) I 00000000 FeatureCtrlMask : 0
0x10c0 (4288) h 0000 VoltageOffsetPerZoneBoundary : 0
0x10c2 (4290) h 0000 VoltageOffsetPerZoneBoundary : 0
0x10c4 (4292) h 0000 VoltageOffsetPerZoneBoundary : 0
0x10c6 (4294) h 0000 VoltageOffsetPerZoneBoundary : 0
0x10c8 (4296) h 0000 VoltageOffsetPerZoneBoundary : 0
0x10ca (4298) h 0000 VoltageOffsetPerZoneBoundary : 0
0x10cc (4300) H 0000 VddGfxVmax : 0
0x10ce (4302) H 0000 VddSocVmax : 0
0x10d0 (4304) h 0000 GfxclkFoffset : 0
0x10d2 (4306) H 0000 Padding : 0
0x10d4 (4308) H 0000 UclkFmin : 0
0x10d6 (4310) H 0000 UclkFmax : 0
0x10d8 (4312) H 0000 FclkFmin : 0
0x10da (4314) H 0000 FclkFmax : 0
0x10dc (4316) h 0000 Ppt : 0
0x10de (4318) h 0000 Tdc : 0
0x10e0 (4320) B 00 FanLinearPwmPoints : 0
0x10e1 (4321) B 00 FanLinearPwmPoints : 0
0x10e2 (4322) B 00 FanLinearPwmPoints : 0
0x10e3 (4323) B 00 FanLinearPwmPoints : 0
0x10e4 (4324) B 00 FanLinearPwmPoints : 0
0x10e5 (4325) B 00 FanLinearPwmPoints : 0
0x10e6 (4326) B 00 FanLinearTempPoints : 0
0x10e7 (4327) B 00 FanLinearTempPoints : 0
0x10e8 (4328) B 00 FanLinearTempPoints : 0
0x10e9 (4329) B 00 FanLinearTempPoints : 0
0x10ea (4330) B 00 FanLinearTempPoints : 0
0x10eb (4331) B 00 FanLinearTempPoints : 0
0x10ec (4332) H 0000 FanMinimumPwm : 0
0x10ee (4334) H 0000 AcousticTargetRpmThreshold : 0
0x10f0 (4336) H 0000 AcousticLimitRpmThreshold : 0
0x10f2 (4338) H 0000 FanTargetTemperature : 0
0x10f4 (4340) B 00 FanZeroRpmEnable : 0
0x10f5 (4341) B 00 MaxOpTemp : 0
0x10f6 (4342) B 00 Padding1 : 0
0x10f7 (4343) B 00 Padding1 : 0
0x10f8 (4344) H 0000 GfxVoltageFullCtrlMode : 0
0x10fa (4346) H 0000 SocVoltageFullCtrlMode : 0
0x10fc (4348) H 0000 GfxclkFullCtrlMode : 0
0x10fe (4350) H 0000 UclkFullCtrlMode : 0
0x1100 (4352) H 0000 FclkFullCtrlMode : 0
0x1102 (4354) h 0000 GfxEdc : 0
0x1104 (4356) h 0000 GfxPccLimitControl : 0
0x1106 (4358) h 0000 Padding2 : 0
0x1108 (4360) I 00000000 Spare : 0
0x110c (4364) I 00000000 Spare : 0
0x1110 (4368) I 00000000 Spare : 0
0x1114 (4372) I 00000000 Spare : 0
0x1118 (4376) I 00000000 Spare : 0
0x111c (4380) I 00000000 FeatureCtrlMask : 0
0x1120 (4384) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1122 (4386) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1124 (4388) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1126 (4390) h 0000 VoltageOffsetPerZoneBoundary : 0
0x1128 (4392) h 0000 VoltageOffsetPerZoneBoundary : 0
0x112a (4394) h 0000 VoltageOffsetPerZoneBoundary : 0
0x112c (4396) H 0000 VddGfxVmax : 0
0x112e (4398) H 0000 VddSocVmax : 0
0x1130 (4400) h 0000 GfxclkFoffset : 0
0x1132 (4402) H 0000 Padding : 0
0x1134 (4404) H 0000 UclkFmin : 0
0x1136 (4406) H 0000 UclkFmax : 0
0x1138 (4408) H 0000 FclkFmin : 0
0x113a (4410) H 0000 FclkFmax : 0
0x113c (4412) h 0000 Ppt : 0
0x113e (4414) h 0000 Tdc : 0
0x1140 (4416) B 00 FanLinearPwmPoints : 0
0x1141 (4417) B 00 FanLinearPwmPoints : 0
0x1142 (4418) B 00 FanLinearPwmPoints : 0
0x1143 (4419) B 00 FanLinearPwmPoints : 0
0x1144 (4420) B 00 FanLinearPwmPoints : 0
0x1145 (4421) B 00 FanLinearPwmPoints : 0
0x1146 (4422) B 00 FanLinearTempPoints : 0
0x1147 (4423) B 00 FanLinearTempPoints : 0
0x1148 (4424) B 00 FanLinearTempPoints : 0
0x1149 (4425) B 00 FanLinearTempPoints : 0
0x114a (4426) B 00 FanLinearTempPoints : 0
0x114b (4427) B 00 FanLinearTempPoints : 0
0x114c (4428) H 0000 FanMinimumPwm : 0
0x114e (4430) H 0000 AcousticTargetRpmThreshold : 0
0x1150 (4432) H 0000 AcousticLimitRpmThreshold : 0
0x1152 (4434) H 0000 FanTargetTemperature : 0
0x1154 (4436) B 00 FanZeroRpmEnable : 0
0x1155 (4437) B 00 MaxOpTemp : 0
0x1156 (4438) B 00 Padding1 : 0
0x1157 (4439) B 00 Padding1 : 0
0x1158 (4440) H 0000 GfxVoltageFullCtrlMode : 0
0x115a (4442) H 0000 SocVoltageFullCtrlMode : 0
0x115c (4444) H 0000 GfxclkFullCtrlMode : 0
0x115e (4446) H 0000 UclkFullCtrlMode : 0
0x1160 (4448) H 0000 FclkFullCtrlMode : 0
0x1162 (4450) h 0000 GfxEdc : 0
0x1164 (4452) h 0000 GfxPccLimitControl : 0
0x1166 (4454) h 0000 Padding2 : 0
0x1168 (4456) I 00000000 Spare : 0
0x116c (4460) I 00000000 Spare : 0
0x1170 (4464) I 00000000 Spare : 0
0x1174 (4468) I 00000000 Spare : 0
0x1178 (4472) I 00000000 Spare : 0
0x117c (4476) B 00 TotalBoardPowerSupport : 0
0x117d (4477) B 00 TotalBoardPowerPadding : 0
0x117e (4478) H 0000 TotalBoardPowerRoc : 0
0x1180 (4480) f 41b7973c a : 0.01852
0x1184 (4484) f 221a3dc0 b :-2.95472
0x1188 (4488) f bc1ae444 c : 1824.84
0x118c (4492) f 00000000 a : 0
0x1190 (4496) f 00000000 b : 0
0x1194 (4500) f 00000000 c : 0
0x1198 (4504) f cf49af3d a : 0.08559
0x119c (4508) f a459ffc1 b :-31.9188
0x11a0 (4512) f 18068145 c : 4128.76
0x11a4 (4516) f 00000000 a : 0
0x11a8 (4520) f 00000000 b : 0
0x11ac (4524) f 00000000 c : 0
0x11b0 (4528) f 143f46bc a :-0.0121
0x11b4 (4532) f d8364c41 b : 12.7634
0x11b8 (4536) f 007e9643 c : 300.984
0x11bc (4540) f 00000000 a : 0
0x11c0 (4544) f 00000000 b : 0
0x11c4 (4548) f 00000000 c : 0
0x11c8 (4552) i 00000000 AptUclkGfxclkLookup : 0
0x11cc (4556) i a5030000 AptUclkGfxclkLookup : 933
0x11d0 (4560) i b5060000 AptUclkGfxclkLookup : 1717
0x11d4 (4564) i 0e080000 AptUclkGfxclkLookup : 2062
0x11d8 (4568) i 03090000 AptUclkGfxclkLookup : 2307
0x11dc (4572) i f00a0000 AptUclkGfxclkLookup : 2800
0x11e0 (4576) i 00000000 AptUclkGfxclkLookup : 0
0x11e4 (4580) i a5030000 AptUclkGfxclkLookup : 933
0x11e8 (4584) i b5060000 AptUclkGfxclkLookup : 1717
0x11ec (4588) i 0e080000 AptUclkGfxclkLookup : 2062
0x11f0 (4592) i 03090000 AptUclkGfxclkLookup : 2307
0x11f4 (4596) i f00a0000 AptUclkGfxclkLookup : 2800
0x11f8 (4600) I 64000000 AptUclkGfxclkLookupHyst : 100
0x11fc (4604) I dd010000 AptUclkGfxclkLookupHyst : 477
0x1200 (4608) I 6a000000 AptUclkGfxclkLookupHyst : 106
0x1204 (4612) I 85010000 AptUclkGfxclkLookupHyst : 389
0x1208 (4616) I 88000000 AptUclkGfxclkLookupHyst : 136
0x120c (4620) I 64000000 AptUclkGfxclkLookupHyst : 100
0x1210 (4624) I 64000000 AptUclkGfxclkLookupHyst : 100
0x1214 (4628) I dd010000 AptUclkGfxclkLookupHyst : 477
0x1218 (4632) I 6a000000 AptUclkGfxclkLookupHyst : 106
0x121c (4636) I 85010000 AptUclkGfxclkLookupHyst : 389
0x1220 (4640) I 88000000 AptUclkGfxclkLookupHyst : 136
0x1224 (4644) I 64000000 AptUclkGfxclkLookupHyst : 100
0x1228 (4648) I 00000000 AptPadding : 0
0x122c (4652) f 00000000 a : 0
0x1230 (4656) f 0000803f b : 1
0x1234 (4660) f cdccccbd c :-0.1
0x1238 (4664) I 50000000 GfxXvminDidtResetDDWait : 80
0x123c (4668) I 01000000 GfxXvminDidtClkStopWait : 1
0x1240 (4672) I 22842700 GfxXvminDidtFcsStepCtrl : 2589730
0x1244 (4676) I 0f000f00 GfxXvminDidtFcsWaitCtrl : 983055
0x1248 (4680) I 09000000 PsmModeEnabled : 9
0x124c (4684) I 00000000 P2v_a : 0
0x1250 (4688) I 00000000 P2v_b : 0
0x1254 (4692) I 00000000 P2v_c : 0
0x1258 (4696) I 00000000 T2p_a : 0
0x125c (4700) I 00000000 T2p_b : 0
0x1260 (4704) I 00000000 T2p_c : 0
0x1264 (4708) I 00000000 P2vTemp : 0
0x1268 (4712) f 00000000 a : 0
0x126c (4716) f cdcc4c3f b : 0.8
0x1270 (4720) f 0ad7a33b c : 0.005
0x1274 (4724) f 00000000 a : 0
0x1278 (4728) f 00000000 b : 0
0x127c (4732) f 8fc2f53c c : 0.03
0x1280 (4736) B 01 PsmDidtAvgDiv : 1
0x1281 (4737) B 00 PsmDidtForceStall : 0
0x1282 (4738) H 1000 PsmDidtReleaseTimer : 16
0x1284 (4740) I 55550000 PsmDidtStallPattern : 21845
0x1288 (4744) f a470a540 CacEdcCacLeakageC0 : 5.17
0x128c (4748) f b81eddc0 CacEdcCacLeakageC1 :-6.91
0x1290 (4752) f 4da1733c CacEdcCacLeakageC2 : 0.01487
0x1294 (4756) f fe7d863d CacEdcCacLeakageC3 : 0.06567
0x1298 (4760) f fd9fba40 CacEdcCacLeakageC4 : 5.83203
0x129c (4764) f b6be48bd CacEdcCacLeakageC5 :-0.04901
0x12a0 (4768) I 00000000 CacEdcGfxClkScalar : 0
0x12a4 (4772) I 00000000 CacEdcGfxClkIntercept : 0
0x12a8 (4776) f 9a998942 CacEdcCac_m : 68.8
0x12ac (4780) f 3333d741 CacEdcCac_b : 26.9
0x12b0 (4784) I 00000000 CacEdcCurrLimitGuardband : 0
0x12b4 (4788) I 00000000 CacEdcDynToTotalCacRatio : 0
0x12b8 (4792) f 3d0a573f XVmin_Gfx_EdcThreshScalar : 0.84
0x12bc (4796) I 00000000 XVmin_Gfx_EdcEnableFreq : 0
0x12c0 (4800) I 36841f00 XVmin_Gfx_EdcPccAsStepCtrl : 2065462
0x12c4 (4804) I 40004000 XVmin_Gfx_EdcPccAsWaitCtrl : 4194368
0x12c8 (4808) H 3200 XVmin_Gfx_EdcThreshold : 50
0x12ca (4810) H c800 XVmin_Gfx_EdcFiltHysWaitCtrl : 200
0x12cc (4812) f ae47a13f XVmin_Soc_EdcThreshScalar : 1.26
0x12d0 (4816) I 00000000 XVmin_Soc_EdcEnableFreq : 0
0x12d4 (4820) I 32000000 XVmin_Soc_EdcThreshold : 50
0x12d8 (4824) H 0a00 XVmin_Soc_EdcStepUpTime : 10
0x12da (4826) H 0a00 XVmin_Soc_EdcStepDownTime : 10
0x12dc (4828) B 05 XVmin_Soc_EdcInitPccStep : 5
0x12dd (4829) B 00 PaddingSocEdc : 0
0x12de (4830) B 00 PaddingSocEdc : 0
0x12df (4831) B 00 PaddingSocEdc : 0
0x12e0 (4832) B 00 GfxXvminFuseOverride : 0
0x12e1 (4833) B 00 SocXvminFuseOverride : 0
0x12e2 (4834) B 00 PaddingXvminFuseOverride : 0
0x12e3 (4835) B 00 PaddingXvminFuseOverride : 0
0x12e4 (4836) B 00 GfxXvminFddTempLow : 0
0x12e5 (4837) B 00 GfxXvminFddTempHigh : 0
0x12e6 (4838) B 00 SocXvminFddTempLow : 0
0x12e7 (4839) B 00 SocXvminFddTempHigh : 0
0x12e8 (4840) H 0000 GfxXvminFddVolt0 : 0
0x12ea (4842) H 0000 GfxXvminFddVolt1 : 0
0x12ec (4844) H 0000 GfxXvminFddVolt2 : 0
0x12ee (4846) H 0000 SocXvminFddVolt0 : 0
0x12f0 (4848) H 0000 SocXvminFddVolt1 : 0
0x12f2 (4850) H 0000 SocXvminFddVolt2 : 0
0x12f4 (4852) H 0000 GfxXvminDsFddDsm : 0
0x12f6 (4854) H 0000 GfxXvminDsFddDsm : 0
0x12f8 (4856) H 0000 GfxXvminDsFddDsm : 0
0x12fa (4858) H 0000 GfxXvminDsFddDsm : 0
0x12fc (4860) H 0000 GfxXvminDsFddDsm : 0
0x12fe (4862) H 0000 GfxXvminDsFddDsm : 0
0x1300 (4864) H 0000 GfxXvminEdcFddDsm : 0
0x1302 (4866) H 0000 GfxXvminEdcFddDsm : 0
0x1304 (4868) H 0000 GfxXvminEdcFddDsm : 0
0x1306 (4870) H 0000 GfxXvminEdcFddDsm : 0
0x1308 (4872) H 0000 GfxXvminEdcFddDsm : 0
0x130a (4874) H 0000 GfxXvminEdcFddDsm : 0
0x130c (4876) H 0000 SocXvminEdcFddDsm : 0
0x130e (4878) H 0000 SocXvminEdcFddDsm : 0
0x1310 (4880) H 0000 SocXvminEdcFddDsm : 0
0x1312 (4882) H 0000 SocXvminEdcFddDsm : 0
0x1314 (4884) H 0000 SocXvminEdcFddDsm : 0
0x1316 (4886) H 0000 SocXvminEdcFddDsm : 0
0x1318 (4888) I 64009600 Spare : 9830500
0x131c (4892) I 00000000 MmHubPadding : 0
0x1320 (4896) I 00000000 MmHubPadding : 0
0x1324 (4900) I 00000000 MmHubPadding : 0
0x1328 (4904) I 00000000 MmHubPadding : 0
0x132c (4908) I 00000000 MmHubPadding : 0
0x1330 (4912) I 00000000 MmHubPadding : 0
0x1334 (4916) I 00000000 MmHubPadding : 0
0x1338 (4920) I 00000000 MmHubPadding : 0
0x133c (4924) H dc00 SocketPowerLimitAc : 220
0x133e (4926) H b004 SocketPowerLimitAc : 1200
0x1340 (4928) H 0000 SocketPowerLimitAc : 0
0x1342 (4930) H 0000 SocketPowerLimitAc : 0
0x1344 (4932) H 4a01 VrTdcLimit : 330
0x1346 (4934) H 5400 VrTdcLimit : 84
0x1348 (4936) h 0000 TotalIdleBoardPowerM : 0
0x134a (4938) h 0000 TotalIdleBoardPowerB : 0
0x134c (4940) h 0000 TotalBoardPowerM : 0
0x134e (4942) h 0000 TotalBoardPowerB : 0
0x1350 (4944) H 6e00 TemperatureLimit : 110
0x1352 (4946) H 6e00 TemperatureLimit : 110
0x1354 (4948) H 0000 TemperatureLimit : 0
0x1356 (4950) H 0000 TemperatureLimit : 0
0x1358 (4952) H 6c00 TemperatureLimit : 108
0x135a (4954) H 6900 TemperatureLimit : 105
0x135c (4956) H 6900 TemperatureLimit : 105
0x135e (4958) H 6900 TemperatureLimit : 105
0x1360 (4960) H 6900 TemperatureLimit : 105
0x1362 (4962) H 0000 TemperatureLimit : 0
0x1364 (4964) H 0000 TemperatureLimit : 0
0x1366 (4966) H 0000 TemperatureLimit : 0
0x1368 (4968) H 0000 FanStopTemp : 0
0x136a (4970) H 3200 FanStopTemp : 50
0x136c (4972) H 0000 FanStopTemp : 0
0x136e (4974) H 0000 FanStopTemp : 0
0x1370 (4976) H 4100 FanStopTemp : 65
0x1372 (4978) H 4100 FanStopTemp : 65
0x1374 (4980) H 4100 FanStopTemp : 65
0x1376 (4982) H 4100 FanStopTemp : 65
0x1378 (4984) H 4100 FanStopTemp : 65
0x137a (4986) H 0000 FanStopTemp : 0
0x137c (4988) H 0000 FanStopTemp : 0
0x137e (4990) H 0000 FanStopTemp : 0
0x1380 (4992) H 0000 FanStartTemp : 0
0x1382 (4994) H 3c00 FanStartTemp : 60
0x1384 (4996) H 0000 FanStartTemp : 0
0x1386 (4998) H 0000 FanStartTemp : 0
0x1388 (5000) H 5000 FanStartTemp : 80
0x138a (5002) H 5000 FanStartTemp : 80
0x138c (5004) H 5000 FanStartTemp : 80
0x138e (5006) H 5000 FanStartTemp : 80
0x1390 (5008) H 5000 FanStartTemp : 80
0x1392 (5010) H 0000 FanStartTemp : 0
0x1394 (5012) H 0000 FanStartTemp : 0
0x1396 (5014) H 0000 FanStartTemp : 0
0x1398 (5016) H 0000 FanGain : 0
0x139a (5018) H 9001 FanGain : 400
0x139c (5020) H 0000 FanGain : 0
0x139e (5022) H 0000 FanGain : 0
0x13a0 (5024) H 9001 FanGain : 400
0x13a2 (5026) H 9001 FanGain : 400
0x13a4 (5028) H 9001 FanGain : 400
0x13a6 (5030) H 9001 FanGain : 400
0x13a8 (5032) H 9001 FanGain : 400
0x13aa (5034) H 0000 FanGain : 0
0x13ac (5036) H 0000 FanGain : 0
0x13ae (5038) H 0000 FanGain : 0
0x13b0 (5040) H 1900 FanPwmMin : 25
0x13b2 (5042) H 1405 AcousticTargetRpmThreshold : 1300
0x13b4 (5044) H e40c AcousticLimitRpmThreshold : 3300
0x13b6 (5046) H 420e FanMaximumRpm : 3650
0x13b8 (5048) H a00f MGpuAcousticLimitRpmThreshold : 4000
0x13ba (5050) H f401 FanTargetGfxclk : 500
0x13bc (5052) I f2010000 TempInputSelectMask : 498
0x13c0 (5056) B 01 FanZeroRpmEnable : 1
0x13c1 (5057) B 02 FanTachEdgePerRev : 2
0x13c2 (5058) H 0000 FanPadding : 0
0x13c4 (5060) H 0000 FanTargetTemperature : 0
0x13c6 (5062) H 5800 FanTargetTemperature : 88
0x13c8 (5064) H 0000 FanTargetTemperature : 0
0x13ca (5066) H 0000 FanTargetTemperature : 0
0x13cc (5068) H 5800 FanTargetTemperature : 88
0x13ce (5070) H 5a00 FanTargetTemperature : 90
0x13d0 (5072) H 5a00 FanTargetTemperature : 90
0x13d2 (5074) H 5a00 FanTargetTemperature : 90
0x13d4 (5076) H 5a00 FanTargetTemperature : 90
0x13d6 (5078) H 0000 FanTargetTemperature : 0
0x13d8 (5080) H 0000 FanTargetTemperature : 0
0x13da (5082) H 0000 FanTargetTemperature : 0
0x13dc (5084) h 0000 FuzzyFan_ErrorSetDelta : 0
0x13de (5086) h 0000 FuzzyFan_ErrorRateSetDelta : 0
0x13e0 (5088) h 0000 FuzzyFan_PwmSetDelta : 0
0x13e2 (5090) H 0000 FanPadding2 : 0
0x13e4 (5092) H 7300 FwCtfLimit : 115
0x13e6 (5094) H 7600 FwCtfLimit : 118
0x13e8 (5096) H 0000 FwCtfLimit : 0
0x13ea (5098) H 0000 FwCtfLimit : 0
0x13ec (5100) H 7300 FwCtfLimit : 115
0x13ee (5102) H 7300 FwCtfLimit : 115
0x13f0 (5104) H 7300 FwCtfLimit : 115
0x13f2 (5106) H 7300 FwCtfLimit : 115
0x13f4 (5108) H 7300 FwCtfLimit : 115
0x13f6 (5110) H 0000 FwCtfLimit : 0
0x13f8 (5112) H 0000 FwCtfLimit : 0
0x13fa (5114) H 0000 FwCtfLimit : 0
0x13fc (5116) H 0000 IntakeTempEnableRPM : 0
0x13fe (5118) h 0000 IntakeTempOffsetTemp : 0
0x1400 (5120) H 0000 IntakeTempReleaseTemp : 0
0x1402 (5122) H 0000 IntakeTempHighIntakeAcousticLimit : 0
0x1404 (5124) H 0000 IntakeTempAcouticLimitReleaseRate : 0
0x1406 (5126) h 0000 FanAbnormalTempLimitOffset : 0
0x1408 (5128) H fa00 FanStalledTriggerRpm : 250
0x140a (5130) H 5500 FanAbnormalTriggerRpmCoeff : 85
0x140c (5132) H 0100 FanSpare : 1
0x140e (5134) B 00 FanIntakeSensorSupport : 0
0x140f (5135) B 00 FanIntakePadding : 0
0x1410 (5136) I 00000000 FanSpare2 : 0
0x1414 (5140) I 00000000 FanSpare2 : 0
0x1418 (5144) I 00000000 FanSpare2 : 0
0x141c (5148) I 00000000 FanSpare2 : 0
0x1420 (5152) I 00000000 FanSpare2 : 0
0x1424 (5156) I 00000000 FanSpare2 : 0
0x1428 (5160) I 00000000 FanSpare2 : 0
0x142c (5164) I 00000000 FanSpare2 : 0
0x1430 (5168) I 00000000 FanSpare2 : 0
0x1434 (5172) I 00000000 FanSpare2 : 0
0x1438 (5176) I 00000000 FanSpare2 : 0
0x143c (5180) I 00000000 FanSpare2 : 0
0x1440 (5184) I 00000000 ODFeatureCtrlMask : 0
0x1444 (5188) H 6c00 TemperatureLimit_Hynix : 108
0x1446 (5190) H 6900 TemperatureLimit_Micron : 105
0x1448 (5192) H 7300 TemperatureFwCtfLimit_Hynix : 115
0x144a (5194) H 7100 TemperatureFwCtfLimit_Micron : 113
0x144c (5196) H 4a01 PlatformTdcLimit : 330
0x144e (5198) H 5400 PlatformTdcLimit : 84
0x1450 (5200) H dc00 SocketPowerLimitDc : 220
0x1452 (5202) H b004 SocketPowerLimitDc : 1200
0x1454 (5204) H 0000 SocketPowerLimitDc : 0
0x1456 (5206) H 0000 SocketPowerLimitDc : 0
0x1458 (5208) H 0000 SocketPowerLimitSmartShift2 : 0
0x145a (5210) H 0000 CustomSkuSpare16b : 0
0x145c (5212) I 00000000 CustomSkuSpare32b : 0
0x1460 (5216) I 00000000 CustomSkuSpare32b : 0
0x1464 (5220) I 00000000 CustomSkuSpare32b : 0
0x1468 (5224) I 00000000 CustomSkuSpare32b : 0
0x146c (5228) I 00000000 CustomSkuSpare32b : 0
0x1470 (5232) I 00000000 CustomSkuSpare32b : 0
0x1474 (5236) I 00000000 CustomSkuSpare32b : 0
0x1478 (5240) I 00000000 CustomSkuSpare32b : 0
0x147c (5244) I 00000000 CustomSkuSpare32b : 0
0x1480 (5248) I 00000000 CustomSkuSpare32b : 0
0x1484 (5252) I 00000000 MmHubPadding : 0
0x1488 (5256) I 00000000 MmHubPadding : 0
0x148c (5260) I 00000000 MmHubPadding : 0
0x1490 (5264) I 00000000 MmHubPadding : 0
0x1494 (5268) I 00000000 MmHubPadding : 0
0x1498 (5272) I 00000000 MmHubPadding : 0
0x149c (5276) I 00000000 MmHubPadding : 0
0x14a0 (5280) I 00000000 MmHubPadding : 0
0x14a4 (5284) I 00000000 Version : 0
0x14a8 (5288) B 00 Enabled : 0
0x14a9 (5289) B 00 Speed : 0
0x14aa (5290) B 00 SlaveAddress : 0
0x14ab (5291) B 00 ControllerPort : 0
0x14ac (5292) B 00 ControllerName : 0
0x14ad (5293) B 00 ThermalThrotter : 0
0x14ae (5294) B 00 I2cProtocol : 0
0x14af (5295) B 00 PaddingConfig : 0
0x14b0 (5296) B 00 Enabled : 0
0x14b1 (5297) B 00 Speed : 0
0x14b2 (5298) B 00 SlaveAddress : 0
0x14b3 (5299) B 00 ControllerPort : 0
0x14b4 (5300) B 00 ControllerName : 0
0x14b5 (5301) B 00 ThermalThrotter : 0
0x14b6 (5302) B 00 I2cProtocol : 0
0x14b7 (5303) B 00 PaddingConfig : 0
0x14b8 (5304) B 00 Enabled : 0
0x14b9 (5305) B 00 Speed : 0
0x14ba (5306) B 00 SlaveAddress : 0
0x14bb (5307) B 00 ControllerPort : 0
0x14bc (5308) B 00 ControllerName : 0
0x14bd (5309) B 00 ThermalThrotter : 0
0x14be (5310) B 00 I2cProtocol : 0
0x14bf (5311) B 00 PaddingConfig : 0
0x14c0 (5312) B 00 Enabled : 0
0x14c1 (5313) B 00 Speed : 0
0x14c2 (5314) B 00 SlaveAddress : 0
0x14c3 (5315) B 00 ControllerPort : 0
0x14c4 (5316) B 00 ControllerName : 0
0x14c5 (5317) B 00 ThermalThrotter : 0
0x14c6 (5318) B 00 I2cProtocol : 0
0x14c7 (5319) B 00 PaddingConfig : 0
0x14c8 (5320) B 00 Enabled : 0
0x14c9 (5321) B 00 Speed : 0
0x14ca (5322) B 00 SlaveAddress : 0
0x14cb (5323) B 00 ControllerPort : 0
0x14cc (5324) B 00 ControllerName : 0
0x14cd (5325) B 00 ThermalThrotter : 0
0x14ce (5326) B 00 I2cProtocol : 0
0x14cf (5327) B 00 PaddingConfig : 0
0x14d0 (5328) B 00 Enabled : 0
0x14d1 (5329) B 00 Speed : 0
0x14d2 (5330) B 00 SlaveAddress : 0
0x14d3 (5331) B 00 ControllerPort : 0
0x14d4 (5332) B 00 ControllerName : 0
0x14d5 (5333) B 00 ThermalThrotter : 0
0x14d6 (5334) B 00 I2cProtocol : 0
0x14d7 (5335) B 00 PaddingConfig : 0
0x14d8 (5336) B 00 Enabled : 0
0x14d9 (5337) B 00 Speed : 0
0x14da (5338) B 00 SlaveAddress : 0
0x14db (5339) B 00 ControllerPort : 0
0x14dc (5340) B 00 ControllerName : 0
0x14dd (5341) B 00 ThermalThrotter : 0
0x14de (5342) B 00 I2cProtocol : 0
0x14df (5343) B 00 PaddingConfig : 0
0x14e0 (5344) B 00 Enabled : 0
0x14e1 (5345) B 00 Speed : 0
0x14e2 (5346) B 00 SlaveAddress : 0
0x14e3 (5347) B 00 ControllerPort : 0
0x14e4 (5348) B 00 ControllerName : 0
0x14e5 (5349) B 00 ThermalThrotter : 0
0x14e6 (5350) B 00 I2cProtocol : 0
0x14e7 (5351) B 00 PaddingConfig : 0
0x14e8 (5352) B 00 SlaveAddrMapping : 0
0x14e9 (5353) B 00 SlaveAddrMapping : 0
0x14ea (5354) B 00 SlaveAddrMapping : 0
0x14eb (5355) B 00 SlaveAddrMapping : 0
0x14ec (5356) B 00 VrPsiSupport : 0
0x14ed (5357) B 00 VrPsiSupport : 0
0x14ee (5358) B 00 VrPsiSupport : 0
0x14ef (5359) B 00 VrPsiSupport : 0
0x14f0 (5360) I 00000000 Svi3SvcSpeed : 0
0x14f4 (5364) B 00 EnablePsi6 : 0
0x14f5 (5365) B 00 EnablePsi6 : 0
0x14f6 (5366) B 00 EnablePsi6 : 0
0x14f7 (5367) B 00 EnablePsi6 : 0
0x14f8 (5368) B 00 SlewRateConditions : 0
0x14f9 (5369) B 00 LoadLineAdjust : 0
0x14fa (5370) B 00 VoutOffset : 0
0x14fb (5371) B 00 VidMax : 0
0x14fc (5372) B 00 VidMin : 0
0x14fd (5373) B 00 TenBitTelEn : 0
0x14fe (5374) B 00 SixteenBitTelEn : 0
0x14ff (5375) B 00 OcpThresh : 0
0x1500 (5376) B 00 OcpWarnThresh : 0
0x1501 (5377) B 00 OcpSettings : 0
0x1502 (5378) B 00 VrhotThresh : 0
0x1503 (5379) B 00 OtpThresh : 0
0x1504 (5380) B 00 UvpOvpDeltaRef : 0
0x1505 (5381) B 00 PhaseShed : 0
0x1506 (5382) B 00 Padding : 0
0x1507 (5383) B 00 Padding : 0
0x1508 (5384) B 00 Padding : 0
0x1509 (5385) B 00 Padding : 0
0x150a (5386) B 00 Padding : 0
0x150b (5387) B 00 Padding : 0
0x150c (5388) B 00 Padding : 0
0x150d (5389) B 00 Padding : 0
0x150e (5390) B 00 Padding : 0
0x150f (5391) B 00 Padding : 0
0x1510 (5392) I 00000000 SettingOverrideMask : 0
0x1514 (5396) B 00 SlewRateConditions : 0
0x1515 (5397) B 00 LoadLineAdjust : 0
0x1516 (5398) B 00 VoutOffset : 0
0x1517 (5399) B 00 VidMax : 0
0x1518 (5400) B 00 VidMin : 0
0x1519 (5401) B 00 TenBitTelEn : 0
0x151a (5402) B 00 SixteenBitTelEn : 0
0x151b (5403) B 00 OcpThresh : 0
0x151c (5404) B 00 OcpWarnThresh : 0
0x151d (5405) B 00 OcpSettings : 0
0x151e (5406) B 00 VrhotThresh : 0
0x151f (5407) B 00 OtpThresh : 0
0x1520 (5408) B 00 UvpOvpDeltaRef : 0
0x1521 (5409) B 00 PhaseShed : 0
0x1522 (5410) B 00 Padding : 0
0x1523 (5411) B 00 Padding : 0
0x1524 (5412) B 00 Padding : 0
0x1525 (5413) B 00 Padding : 0
0x1526 (5414) B 00 Padding : 0
0x1527 (5415) B 00 Padding : 0
0x1528 (5416) B 00 Padding : 0
0x1529 (5417) B 00 Padding : 0
0x152a (5418) B 00 Padding : 0
0x152b (5419) B 00 Padding : 0
0x152c (5420) I 00000000 SettingOverrideMask : 0
0x1530 (5424) B 00 SlewRateConditions : 0
0x1531 (5425) B 00 LoadLineAdjust : 0
0x1532 (5426) B 00 VoutOffset : 0
0x1533 (5427) B 00 VidMax : 0
0x1534 (5428) B 00 VidMin : 0
0x1535 (5429) B 00 TenBitTelEn : 0
0x1536 (5430) B 00 SixteenBitTelEn : 0
0x1537 (5431) B 00 OcpThresh : 0
0x1538 (5432) B 00 OcpWarnThresh : 0
0x1539 (5433) B 00 OcpSettings : 0
0x153a (5434) B 00 VrhotThresh : 0
0x153b (5435) B 00 OtpThresh : 0
0x153c (5436) B 00 UvpOvpDeltaRef : 0
0x153d (5437) B 00 PhaseShed : 0
0x153e (5438) B 00 Padding : 0
0x153f (5439) B 00 Padding : 0
0x1540 (5440) B 00 Padding : 0
0x1541 (5441) B 00 Padding : 0
0x1542 (5442) B 00 Padding : 0
0x1543 (5443) B 00 Padding : 0
0x1544 (5444) B 00 Padding : 0
0x1545 (5445) B 00 Padding : 0
0x1546 (5446) B 00 Padding : 0
0x1547 (5447) B 00 Padding : 0
0x1548 (5448) I 00000000 SettingOverrideMask : 0
0x154c (5452) B 00 SlewRateConditions : 0
0x154d (5453) B 00 LoadLineAdjust : 0
0x154e (5454) B 00 VoutOffset : 0
0x154f (5455) B 00 VidMax : 0
0x1550 (5456) B 00 VidMin : 0
0x1551 (5457) B 00 TenBitTelEn : 0
0x1552 (5458) B 00 SixteenBitTelEn : 0
0x1553 (5459) B 00 OcpThresh : 0
0x1554 (5460) B 00 OcpWarnThresh : 0
0x1555 (5461) B 00 OcpSettings : 0
0x1556 (5462) B 00 VrhotThresh : 0
0x1557 (5463) B 00 OtpThresh : 0
0x1558 (5464) B 00 UvpOvpDeltaRef : 0
0x1559 (5465) B 00 PhaseShed : 0
0x155a (5466) B 00 Padding : 0
0x155b (5467) B 00 Padding : 0
0x155c (5468) B 00 Padding : 0
0x155d (5469) B 00 Padding : 0
0x155e (5470) B 00 Padding : 0
0x155f (5471) B 00 Padding : 0
0x1560 (5472) B 00 Padding : 0
0x1561 (5473) B 00 Padding : 0
0x1562 (5474) B 00 Padding : 0
0x1563 (5475) B 00 Padding : 0
0x1564 (5476) I 00000000 SettingOverrideMask : 0
0x1568 (5480) B 00 LedOffGpio : 0
0x1569 (5481) B 00 FanOffGpio : 0
0x156a (5482) B 00 GfxVrPowerStageOffGpio : 0
0x156b (5483) B 00 AcDcGpio : 0
0x156c (5484) B 00 AcDcPolarity : 0
0x156d (5485) B 00 VR0HotGpio : 0
0x156e (5486) B 00 VR0HotPolarity : 0
0x156f (5487) B 00 GthrGpio : 0
0x1570 (5488) B 00 GthrPolarity : 0
0x1571 (5489) B 00 LedPin0 : 0
0x1572 (5490) B 00 LedPin1 : 0
0x1573 (5491) B 00 LedPin2 : 0
0x1574 (5492) B 00 LedEnableMask : 0
0x1575 (5493) B 00 LedPcie : 0
0x1576 (5494) B 00 LedError : 0
0x1577 (5495) B 00 PaddingLed : 0
0x1578 (5496) B 00 UclkTrainingModeSpreadPercent : 0
0x1579 (5497) B 00 UclkSpreadPadding : 0
0x157a (5498) H 0000 UclkSpreadFreq : 0
0x157c (5500) B 00 UclkSpreadPercent : 0
0x157d (5501) B 00 UclkSpreadPercent : 0
0x157e (5502) B 00 UclkSpreadPercent : 0
0x157f (5503) B 00 UclkSpreadPercent : 0
0x1580 (5504) B 00 UclkSpreadPercent : 0
0x1581 (5505) B 00 UclkSpreadPercent : 0
0x1582 (5506) B 00 UclkSpreadPercent : 0
0x1583 (5507) B 00 UclkSpreadPercent : 0
0x1584 (5508) B 00 UclkSpreadPercent : 0
0x1585 (5509) B 00 UclkSpreadPercent : 0
0x1586 (5510) B 00 UclkSpreadPercent : 0
0x1587 (5511) B 00 UclkSpreadPercent : 0
0x1588 (5512) B 00 UclkSpreadPercent : 0
0x1589 (5513) B 00 UclkSpreadPercent : 0
0x158a (5514) B 00 UclkSpreadPercent : 0
0x158b (5515) B 00 UclkSpreadPercent : 0
0x158c (5516) B 00 GfxclkSpreadEnable : 0
0x158d (5517) B 00 FclkSpreadPercent : 0
0x158e (5518) H 0000 FclkSpreadFreq : 0
0x1590 (5520) B 00 DramWidth : 0
0x1591 (5521) B 00 PaddingMem1 : 0
0x1592 (5522) B 00 PaddingMem1 : 0
0x1593 (5523) B 00 PaddingMem1 : 0
0x1594 (5524) B 00 PaddingMem1 : 0
0x1595 (5525) B 00 PaddingMem1 : 0
0x1596 (5526) B 00 PaddingMem1 : 0
0x1597 (5527) B 00 PaddingMem1 : 0
0x1598 (5528) B 00 HsrEnabled : 0
0x1599 (5529) B 00 VddqOffEnabled : 0
0x159a (5530) B 00 PaddingUmcFlags : 0
0x159b (5531) B 00 PaddingUmcFlags : 0
0x159c (5532) I 00000000 Paddign1 : 0
0x15a0 (5536) I 00000000 BacoEntryDelay : 0
0x15a4 (5540) B 00 FuseWritePowerMuxPresent : 0
0x15a5 (5541) B 00 FuseWritePadding : 0
0x15a6 (5542) B 00 FuseWritePadding : 0
0x15a7 (5543) B 00 FuseWritePadding : 0
0x15a8 (5544) I 00000000 LoadlineGfx : 0
0x15ac (5548) I 00000000 LoadlineSoc : 0
0x15b0 (5552) I 00000000 GfxEdcLimit : 0
0x15b4 (5556) I 00000000 SocEdcLimit : 0
0x15b8 (5560) I 00000000 RestBoardPower : 0
0x15bc (5564) I 00000000 ConnectorsImpedance : 0
0x15c0 (5568) B 00 EpcsSens0 : 0
0x15c1 (5569) B 00 EpcsSens1 : 0
0x15c2 (5570) B 00 PaddingEpcs : 0
0x15c3 (5571) B 00 PaddingEpcs : 0
0x15c4 (5572) I 00000000 BoardSpare : 0
0x15c8 (5576) I 00000000 BoardSpare : 0
0x15cc (5580) I 00000000 BoardSpare : 0
0x15d0 (5584) I 00000000 BoardSpare : 0
0x15d4 (5588) I 00000000 BoardSpare : 0
0x15d8 (5592) I 00000000 BoardSpare : 0
0x15dc (5596) I 00000000 BoardSpare : 0
0x15e0 (5600) I 00000000 BoardSpare : 0
0x15e4 (5604) I 00000000 BoardSpare : 0
0x15e8 (5608) I 00000000 BoardSpare : 0
0x15ec (5612) I 00000000 BoardSpare : 0
0x15f0 (5616) I 00000000 BoardSpare : 0
0x15f4 (5620) I 00000000 BoardSpare : 0
0x15f8 (5624) I 00000000 BoardSpare : 0
0x15fc (5628) I 00000000 BoardSpare : 0
0x1600 (5632) I 00000000 BoardSpare : 0
0x1604 (5636) I 00000000 BoardSpare : 0
0x1608 (5640) I 00000000 BoardSpare : 0
0x160c (5644) I 00000000 BoardSpare : 0
0x1610 (5648) I 00000000 BoardSpare : 0
0x1614 (5652) I 00000000 BoardSpare : 0
0x1618 (5656) I 00000000 BoardSpare : 0
0x161c (5660) I 00000000 BoardSpare : 0
0x1620 (5664) I 00000000 BoardSpare : 0
0x1624 (5668) I 00000000 BoardSpare : 0
0x1628 (5672) I 00000000 BoardSpare : 0
0x162c (5676) I 00000000 BoardSpare : 0
0x1630 (5680) I 00000000 BoardSpare : 0
0x1634 (5684) I 00000000 BoardSpare : 0
0x1638 (5688) I 00000000 BoardSpare : 0
0x163c (5692) I 00000000 BoardSpare : 0
0x1640 (5696) I 00000000 BoardSpare : 0
0x1644 (5700) I 00000000 BoardSpare : 0
0x1648 (5704) I 00000000 BoardSpare : 0
0x164c (5708) I 00000000 BoardSpare : 0
0x1650 (5712) I 00000000 BoardSpare : 0
0x1654 (5716) I 00000000 BoardSpare : 0
0x1658 (5720) I 00000000 BoardSpare : 0
0x165c (5724) I 00000000 BoardSpare : 0
0x1660 (5728) I 00000000 BoardSpare : 0
0x1664 (5732) I 00000000 BoardSpare : 0
0x1668 (5736) I 00000000 BoardSpare : 0
0x166c (5740) I 00000000 BoardSpare : 0
0x1670 (5744) I 00000000 BoardSpare : 0
0x1674 (5748) I 00000000 BoardSpare : 0
0x1678 (5752) I 00000000 BoardSpare : 0
0x167c (5756) I 00000000 BoardSpare : 0
0x1680 (5760) I 00000000 BoardSpare : 0
0x1684 (5764) I 00000000 BoardSpare : 0
0x1688 (5768) I 00000000 BoardSpare : 0
0x168c (5772) I 00000000 BoardSpare : 0
0x1690 (5776) I 00000000 BoardSpare : 0
0x1694 (5780) I 00000000 MmHubPadding : 0
0x1698 (5784) I 00000000 MmHubPadding : 0
0x169c (5788) I 00000000 MmHubPadding : 0
0x16a0 (5792) I 00000000 MmHubPadding : 0
0x16a4 (5796) I 00000000 MmHubPadding : 0
0x16a8 (5800) I 00000000 MmHubPadding : 0
0x16ac (5804) I 00000000 MmHubPadding : 0
0x16b0 (5808) I 00000000 MmHubPadding : 0
================================================
FILE: test/test.sh
================================================
#!/bin/bash
TPU_VBIOS_URL=https://www.techpowerup.com/vgabios
# RX 480 8 GB
ROM_RX480=184327/AMD.RX480.8192.160603.rom
# RX Vega 64 8 GB
ROM_VEGA64=194441/AMD.RXVega64.8176.170719.rom
# RX Vega Frontier 16 GB
ROM_VEGAFRONTIER=224185/AMD.RXVegaFrontier.16384.170628.rom
# Radeon VII 16 GB
ROM_RADEON7=208116/AMD.RadeonVII.16384.190116.rom
# RX 5700 XT 8 GB
ROM_RX5700=212120/AMD.RX5700XT.8192.190616.rom
# RX 6800 16 GB Reference
ROM_RX6800=226802/AMD.RX6800.16384.201007.rom
# RX 6900 16 GB Reference
ROM_RX6900=230799/AMD.RX6900XT.16384.201104.rom
# RX 7900 XTX 24GB Reference
ROM_RX7900=262809/AMD.RX7900XTX.24576.230323.rom
# MI100
ROM_MI100=MI100_000.000.000.000.016113_113-D3431401-100.rom
# RX 9070 PowerColor Reaper
ROM_RX9070=274452/Powercolor.RX9070.16384.241204_1.rom
# Fetch ROMs not available at TechPowerUp from these links:
ROM_LINKSs="
https://github.com/sibradzic/upp/files/15254133/arcturus_vbios.zip
"
# ROMs to be tested:
TEST_ROMS="${ROM_RX480} ${ROM_VEGA64} ${ROM_VEGAFRONTIER}
${ROM_RADEON7} ${ROM_RX5700} ${ROM_RX6900} ${ROM_RX7900} ${ROM_RX9070}
${ROM_MI100}"
TEST_ROOT=${PWD}
ROM_DIR=${PWD}/ROMs
TMP_DIR=${PWD}/tmp
[ ! -d ${ROM_DIR} ] && mkdir ${ROM_DIR}
[ ! -d ${TMP_DIR} ] && mkdir ${TMP_DIR}
pushd ../src
# Fetch non TehcPowerUp ROMs
for VBIOS in ${ROM_LINKSs}; do
if [ ! -r ${ROM_DIR}/${VBIOS##*/} ]; then
wget -P ${ROM_DIR} ${VBIOS}
if [[ "${VBIOS##*.}" == "zip" ]]; then
unzip ${ROM_DIR}/${VBIOS##*/} -d ${ROM_DIR}
fi
fi
done
# Fetch TehcPowerUp ROMs and test all ROMs
for VBIOS in ${TEST_ROMS}; do
if [ ! -r ${ROM_DIR}/${VBIOS#*/} ]; then
wget -P ${ROM_DIR} ${TPU_VBIOS_URL}/${VBIOS}
fi
python3 -m upp.upp -p ${TMP_DIR}/${VBIOS#*/}.pp_table extract -r ${ROM_DIR}/${VBIOS#*/}
python3 -m upp.upp -p ${TMP_DIR}/${VBIOS#*/}.pp_table dump > ${TMP_DIR}/${VBIOS#*/}.dump
python3 -m upp.upp -p ${TMP_DIR}/${VBIOS#*/}.pp_table dump -r > ${TMP_DIR}/${VBIOS#*/}.rawdump
diff -s ${TEST_ROOT}/${VBIOS#*/}.dump ${TMP_DIR}/${VBIOS#*/}.dump
if [ $? -ne "0" ]; then
echo "ERROR in ${TMP_DIR}/${VBIOS#*/}.dump:"
diff -u ${TEST_ROOT}/${VBIOS#*/}.dump ${TMP_DIR}/${VBIOS#*/}.dump
printf "\033[1m${VBIOS#*/} dump check \033[1;31mERROR\033[0m\n"
exit 2
else
printf "\033[1m${VBIOS#*/} dump check \033[1;32mOK\033[0m\n\n"
fi
diff -s ${TEST_ROOT}/${VBIOS#*/}.rawdump ${TMP_DIR}/${VBIOS#*/}.rawdump
if [ $? -ne "0" ]; then
echo "ERROR in ${TMP_DIR}/${VBIOS#*/}.rawdump:"
diff -u ${TEST_ROOT}/${VBIOS#*/}.rawdump ${TMP_DIR}/${VBIOS#*/}.rawdump
printf "\033[1m${VBIOS#*/} raw dump check \033[1;31mERROR\033[0m\n"
exit 2
else
printf "\033[1m${VBIOS#*/} raw dump check \033[1;32mOK\033[0m\n\n"
fi
done
cp ${TMP_DIR}/${ROM_RX5700#*/}.pp_table ${TMP_DIR}/${ROM_RX5700#*/}.conf.pp_table
# Value write test
python3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.pp_table set --write \
smc_pptable/SocketPowerLimitAc/0=110 \
smc_pptable/SocketPowerLimitDc/0=110 \
smc_pptable/FanStartTemp=100 \
smc_pptable/MinVoltageGfx=2800 \
smc_pptable/MaxVoltageGfx=3900 \
smc_pptable/MinVoltageSoc=2800 \
smc_pptable/MaxVoltageSoc=3800 \
smc_pptable/qStaticVoltageOffset/0/c=-0.03 \
smc_pptable/UlvVoltageOffsetSoc=0 \
smc_pptable/UlvVoltageOffsetGfx=0 \
smc_pptable/FreqTableGfx/1=1650 \
smc_pptable/MemMvddVoltage/0=4400 \
smc_pptable/MemVddciVoltage/0=2600 \
smc_pptable/MemMvddVoltage/1=4600 \
smc_pptable/MemVddciVoltage/1=3200 \
smc_pptable/MemMvddVoltage/2=4800 \
smc_pptable/MemVddciVoltage/2=3200 \
smc_pptable/MemMvddVoltage/3=5000 \
smc_pptable/MemVddciVoltage/3=3200 \
smc_pptable/FreqTableUclk/3=750
python3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.pp_table get \
smc_pptable/SocketPowerLimitAc/0 \
smc_pptable/SocketPowerLimitDc/0 \
smc_pptable/FanStartTemp \
smc_pptable/MinVoltageGfx \
smc_pptable/MaxVoltageGfx \
smc_pptable/MinVoltageSoc \
smc_pptable/MaxVoltageSoc \
smc_pptable/qStaticVoltageOffset/0/c \
smc_pptable/UlvVoltageOffsetSoc \
smc_pptable/UlvVoltageOffsetGfx \
smc_pptable/FreqTableGfx/1 \
smc_pptable/MemMvddVoltage/0 \
smc_pptable/MemVddciVoltage/0 \
smc_pptable/MemMvddVoltage/1 \
smc_pptable/MemVddciVoltage/1 \
smc_pptable/MemMvddVoltage/2 \
smc_pptable/MemVddciVoltage/2 \
smc_pptable/MemMvddVoltage/3 \
smc_pptable/MemVddciVoltage/3 \
smc_pptable/FreqTableUclk/3 \
> ${TMP_DIR}/${ROM_RX5700#*/}.check
diff -s ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check
if [ $? -ne "0" ]; then
echo "ERROR in ${TMP_DIR}/${ROM_RX5700#*/}.check:"
diff -u ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check
printf "\033[1m${ROM_RX5700#*/} value write check \033[1;31mERROR\033[0m\n"
exit 2
else
printf "\033[1m${ROM_RX5700#*/} value write check \033[1;32mOK\033[0m\n\n"
fi
# Value write from .conf test
python3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.conf.pp_table set \
--from-conf=${TEST_ROOT}/${ROM_RX5700#*/}.conf --write
python3 -m upp.upp -p ${TMP_DIR}/${ROM_RX5700#*/}.conf.pp_table get \
smc_pptable/SocketPowerLimitAc/0 \
smc_pptable/SocketPowerLimitDc/0 \
smc_pptable/FanStartTemp \
smc_pptable/MinVoltageGfx \
smc_pptable/MaxVoltageGfx \
smc_pptable/MinVoltageSoc \
smc_pptable/MaxVoltageSoc \
smc_pptable/qStaticVoltageOffset/0/c \
smc_pptable/UlvVoltageOffsetSoc \
smc_pptable/UlvVoltageOffsetGfx \
smc_pptable/FreqTableGfx/1 \
smc_pptable/MemMvddVoltage/0 \
smc_pptable/MemVddciVoltage/0 \
smc_pptable/MemMvddVoltage/1 \
smc_pptable/MemVddciVoltage/1 \
smc_pptable/MemMvddVoltage/2 \
smc_pptable/MemVddciVoltage/2 \
smc_pptable/MemMvddVoltage/3 \
smc_pptable/MemVddciVoltage/3 \
smc_pptable/FreqTableUclk/3 \
> ${TMP_DIR}/${ROM_RX5700#*/}.conf.check
diff -s ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check
if [ $? -ne "0" ]; then
echo "ERROR in ${TMP_DIR}/${ROM_RX5700#*/}.check:"
diff -u ${TEST_ROOT}/${ROM_RX5700#*/}.check ${TMP_DIR}/${ROM_RX5700#*/}.check
printf "\033[1m${ROM_RX5700#*/} value write from conf check \033[1;31mERROR\033[0m\n"
exit 2
else
printf "\033[1m${ROM_RX5700#*/} value write from conf check \033[1;32mOK\033[0m\n\n"
fi
================================================
FILE: upliftpowerplay@.service
================================================
[Unit]
Description=Uplift Power Play
Before=amdgpu-clocks.service
Wants=modprobe@amdgpu.service
[Service]
Type=oneshot
ExecStartPre=/usr/bin/bash -c "echo "profile_peak" > /sys/class/drm/%i/device/power_dpm_force_performance_level"
ExecStart=/usr/bin/upp --pp-file=/sys/class/drm/%i/device/pp_table set --from-conf=/etc/upliftpowerplay/%i.conf --write
ExecStopPost=/usr/bin/bash -c "echo "auto" > /sys/class/drm/%i/device/power_dpm_force_performance_level"
[Install]
WantedBy=multi-user.target