[ { "path": ".gitignore", "content": "target\ncallgrind.out.*\n/tmp\n" }, { "path": ".travis.yml", "content": "language: rust\nrust:\n - nightly\n - beta\n - stable\n\nnotifications:\n email: false\n" }, { "path": "CONTRIBUTING.md", "content": "# Contributing\n\nYou can find sections of the code in need of attention by exploring GitHub\nissues, and/or with the help of grep:\n\n``` shell\n$ grep -RE 'XXX|TODO|FIXME|unimplemented' src\n```\n\nContributions are encouraged, but to maintain a high level of quality, we ask\nthat you follow the guidelines laid out in this document.\n\n## Guidelines\n\n**Run tests** with `cargo test` after your committing your changes.\n\nWe use [`rustfmt`](https://github.com/rust-lang-nursery/rustfmt) to maintain a\nconsistent style throughout the project. Please run the latest version of\n`rustfmt` on your code before submitting a PR.\n\nPut tests for a module in a separate file named `test.rs`, and import them like\nso from the module you want to test:\n\n```rust\n#[cfg(test)]\nmod test;\n```\n\nRebase your changes on top of `origin/master` before submitting a PR, to keep\nyour branch up-to-date.\n\nWhen in doubt, [refer to the Go spec](https://golang.org/ref/spec).\n\n### Git Best Practices\n\nWe want to keep the git history as clean as possible.\n\nIf you need to make changes to a Pull Request after submitting it, please\ninclude them in your previous commit(s) and force-push instead of adding new\ncommits. You can do so by staging your changes and running `git commit --amend`.\n\nIf the `master` branch is updated while your PR is open, **do not merge it** into\nyour feature branch. Instead, rebase your branch on top of `origin/master` and\nforce-push to your fork.\n\nWhere possible, please avoid mixing up many unrelated changes in single PR;\nprefer making several smaller PRs instead. If you have to change many things in\na single PR, try to separate them into semantically meaningul commits. This is\nnot a hard rule, but it is preferred.\n\n\n\n" }, { "path": "Cargo.toml", "content": "[package]\nauthors = [\"Yohai Berreby (yberreby) \"]\ndescription = \"A work-in-progress Go compiler toolchain.\"\nlicense = \"MIT/Apache-2.0\"\nname = \"rgo\"\nrepository = \"https://github.com/yberreby/rgo\"\nversion = \"0.1.0\"\n\n[dependencies]\nconvenience = \"0.1.0\"\nenv_logger = \"0.3.3\"\nlazy_static = \"0.2.0\"\nlog = \"0.3.6\"\nnum = \"0.1\"\nquick-error = \"1.0.0\"\ntime = \"0.1.35\"\n\n[dependencies.clippy]\noptional = true\nversion = \"0.0.63\"\n\n[dev-dependencies]\ncolored = \"1.2.0\"\nconvenience = \"0.1.0\"\n\n[features]\ndefault = []\n\n[profile]\n\n[profile.dev]\ndebug = true\n\n[profile.release]\ndebug = true\n\n[[test]]\nharness = false\nname = \"runner\"\n\n[[bin]]\nname = \"rgo\"\ndoc = false\npath = \"src/main.rs\"\n" }, { "path": "README.md", "content": "# rgo (stalled) [![Build Status](https://travis-ci.org/yberreby/rgo.svg?branch=master)](https://travis-ci.org/yberreby/rgo)\n\n`rgo` was a work-in-progress Go compiler, written in Rust.\n\nThis was primarily a fun learning project.\n\nI chose Go as the source language because C compilers have been written over and\nover, and I wanted to do something new. Go's spec is pretty simple, so it seemed\nlike a good choice. The fact that is has a GC also made implementing a compiler\nfor it more challenging and, therefore, more interesting.\n\nAdditionally, Go's reference implementation uses a custom backend for\noptimization and codegen, while `rgo` was to use LLVM for optimization and machine\ncode generation.\n\n## License\n\nCopyright (c) 2016 The `rgo` Project Developers.\n\nLicensed under either of\n\n * [Apache License, Version 2.0](http://www.apache.org/licenses/LICENSE-2.0)\n * [MIT license](http://opensource.org/licenses/MIT)\n\nat your option.\n\n### Contribution\n\nUnless you explicitly state otherwise, any contribution intentionally submitted\nfor inclusion in the work by you, as defined in the Apache-2.0 license, shall be\ndual licensed as above, without any additional terms or conditions.\n" }, { "path": "benches/parse.rs", "content": "#![feature(test)]\n\n\n/// Utility macro to bench test files one by one.\nmacro_rules! bench_lex {\n ($name:ident, $path:expr) => {\n #[allow(non_snake_case)]\n mod $name {\n extern crate convenience;\n extern crate test;\n extern crate rgo;\n\n use self::test::Bencher;\n use std::path::Path;\n use std::path::PathBuf;\n\n fn test_path>(path: P) -> PathBuf {\n let mut new = PathBuf::from(env!(\"CARGO_MANIFEST_DIR\"));\n new.push(\"tests\");\n new.push(\"data\");\n new.push(path.as_ref());\n new\n }\n\n #[bench]\n fn bench_lex(b: &mut Bencher) {\n let src = convenience::read_file(test_path($path)).unwrap();\n b.bytes = src.len() as u64;\n\n b.iter(|| {\n rgo::lexer::tokenize(&src);\n });\n }\n }\n }\n}\n\nbench_lex!(viper, \"pass/viper.go\");\nbench_lex!(hello, \"pass/hello.go\");\nbench_lex!(arithConst_ssa, \"pass/arithConst_ssa.go\");\nbench_lex!(rewriteAMD64, \"pass/rewriteAMD64.go\");\n" }, { "path": "misc/log.md", "content": "# Log\n\nThis is the log file for the `rgo` project. I (@yberreby) write my thoughts down\nperiodically. I hope this will help understand the history of the project as it\ngrows and time passes.\n\n## Sun Mar 27 - Starting the journey\n\nI've always wanted to write a compiler or an interpreter - *something* that\ntakes code and turns it into something runnable.\n\nLisp has been reimplemented again and again, and was too simple. C compilers are\nalso commonplace, AND the language is, well, not a joy to work with.\n\nSo I chose Go. I dislike many of the language's design choices but it seemed\nlike a good fit. To my knowledge, there is no reimplementation of the Go\ncompiler in Rust or similar languages, so I decided to write one.\n\nThere's an additional challenge: I know very, very little Go. As of writing,\nI've only written a few hundred lines of Go, and found two bugs in the viper\npackage. So I'm learning more Go by writing a compiler for it :)\n\nI'm starting with parsing. I have received no formal education on compilers, but\nas far as I know, the first step toward building a compiler is to parse the\nsource code into an Abstract Syntax Tree, or AST.\n\nTo do that, I'm using the [Go Specification](https://golang.org/ref/spec) to\nlook up the syntax of various constructs and translating that into a bunch of\nRust structs and enums. This is somewhat tedious, but I'm learning a few things\nabout Go's syntax along the way.\n\n\n## Wed Mar 30 19:18 - Thoughts on testing\n\nA *critical* part of a complex system like a compiler is testing, so we'll want\nto write a lot of tests to cover as much surface as possible.\n\nThere are three main things we want to test:\n\n- lexical analysis\n- parsing\n- translation\n\nIf all three phases works correctly, we have are likely to produce a correct\nprogram.\n\nNow, we would only test the *output* of the program, because in most cases, if\neither lexical analysis or parsing produce incorrect results or fail, the output\nof the compiled program will be wrong. The advantage of this approach is that\nit's easier to write tests for a handful of big, complex programs than for a\nmyriad of very small programs. The disadvantage is that in case there's a\nfailure, it's much harder to track it down to the piece of code that is\nresponsible.\n\nI think it is best to combine the two approaches: integration tests that only\ncare about the output, and unit tests that care only about a very small part of\nthe code. Lexing should be very easy to test; parsing, a bit harder, as AFAIK it\nrequires more context (e.g. `foo` can be a package name, a package alias, a\nconstant, a function parameter...).\n\n## Thu Mar 31 15:16 - Next steps\n\nThe lexer can now tokenize a \"Hello, rgo\" program properly!\n\nNext steps: integer literals (very easy); semicolon; various compound tokens.\n\n## Sun Apr 3 12:12 - Whitespace\n\nWhen I started writing the lexer, I've made the decision to tokenize *all*\nwhitespace, in order to decouple lexing from semicolon insertion. Unfortunately,\nthis led to an unnecessarily verbose token string (e.g. `PACKAGE, WHITESPACE,\nIDENT(\"main\")` - the `WHITESPACE` token is 100% useless AFAICT), as well as the\nunability to distinguish insignificant whitespace, such as ten spaces one after\nthe other, from significant whitespace (newlines).\n\nI've just changed that: insignificant whitespace is now ignored, and contiguous\nblocks of significant whitespace are tokenized as a single `WHITESPACE` token.\nWe'll see how well this works out in practice, but I feel good about this\nchange.\n\n## Sun Apr 3 15:23 - Done & Next steps\n\n`test-data/viper.go` can now be tokenized without panicking!\n\nNext steps:\n\nIn lexer: float, complex/imaginary, raw string and rune literals.\nThen, the parser. First goal: parsing a \"Hello, rgo\" program.\nThen write unit tests for various constructs.\nThen integration tests using complex source files from big Go projects.\n\n## Sun Apr 10 10:59:15 - Done & Next steps\n\nPackage clauses and import declarations can now be parsed. String literal\nparsing is _very_ hackish, though: interpreted strings are not actually\ninterpreted, but treated like raw strings. This is bad.\n\nAdded a \"progress.md\" file that will help me keep track of what I need to do\nnext.\n\n## Fri Apr 15 13:45 - Progress report and some notes\n\n- we need a _lot_ of tests, that make sure to trigger every corner case under\n the sun. A good idea may be to reuse Go's test suite, but I'm not sure how\n hard that would be. What _is_ certain is that correctness is a priority.\n- the lexer does not handle complex numbers, runes, floats, hexadecimal\n integers... but kind-of works for simple programs.\n- the parser has been substantially improved but I dislike the complexity of\n token pattern matching. Ideally we'd have a nice, float hierachy of tokens,\n but then we lose some type safety...\n- I still have no idea how I'll go about generating LLVM IR. I'm also not sure\n whether the visitor pattern will be useful, and if it is, how to implement it\n since my AST is basically a deeply nested hierarchy of structs and enums.\n- Writing a compiler is fun! I don't know how far I'll take this, but so far, it\n has been an extremely valuable experience. I encourage anyone who's reading\n this and still hesitating to try, if only for the experience they will gain.\n" }, { "path": "misc/selector-inconsistency.md", "content": "https://play.golang.org/p/Xne3T3CL7d\n\n```go\npackage main\n\nimport (\n\t\"go/ast\"\n\t\"go/parser\"\n\t\"go/token\"\n)\n\nfunc main() {\n\t// src is the input for which we want to print the AST.\n\tsrc := `\npackage main\n\nfunc foo(x (func(a ...interface{}) (n int, err error))) {}\n\nfunc main() {\n\tprintln(\"Hello, World!\")\n\tfoo(fmt.Println)\n}\n`\n\n\t// Create the AST by parsing src.\n\tfset := token.NewFileSet() // positions are relative to fset\n\tf, err := parser.ParseFile(fset, \"\", src, 0)\n\tif err != nil {\n\t\tpanic(err)\n\t}\n\n\t// Print the AST.\n\tast.Print(fset, f)\n}\n```\n\nExcerpt from the output:\n\n```\n1: *ast.ExprStmt {\n 160 . . . . . . X: *ast.CallExpr {\n 161 . . . . . . . Fun: *ast.Ident {\n 162 . . . . . . . . NamePos: 8:2\n 163 . . . . . . . . Name: \"foo\"\n 164 . . . . . . . . Obj: *(obj @ 11)\n 165 . . . . . . . }\n 166 . . . . . . . Lparen: 8:5\n 167 . . . . . . . Args: []ast.Expr (len = 1) {\n 168 . . . . . . . . 0: *ast.SelectorExpr {\n 169 . . . . . . . . . X: *ast.Ident {\n 170 . . . . . . . . . . NamePos: 8:6\n 171 . . . . . . . . . . Name: \"fmt\"\n 172 . . . . . . . . . }\n 173 . . . . . . . . . Sel: *ast.Ident {\n 174 . . . . . . . . . . NamePos: 8:10\n 175 . . . . . . . . . . Name: \"Println\"\n 176 . . . . . . . . . }\n 177 . . . . . . . . }\n 178 . . . . . . . }\n 179 . . . . . . . Ellipsis: -\n 180 . . . . . . . Rparen: 8:17\n 181 . . . . . . }\n 182 . . . . . }\n```\n\nMethodExpr < SelectorExpr, basically. I thought the Go AST would differentiate\nbetween method expressions (`Type.MethodName`) and selector expressions\n(`someExpr.someField`, `foo().bar`...), but it doesn't, because treating them as\nthe same thing makes compilation easier...\n\n\n" }, { "path": "src/ast/expressions.rs", "content": "use lexer::TokenKind;\nuse token::Spanned;\nuse super::{Arguments, Conversion, Type, Ident, MaybeQualifiedIdent, Literal};\n\n// Expr = UnaryExpr | Expr binary_op Expr .\n// UnaryExpr = PrimaryExpr | unary_op UnaryExpr .\n//\n// binary_op = \"||\" | \"&&\" | rel_op | add_op | mul_op .\n// rel_op = \"==\" | \"!=\" | \"<\" | \"<=\" | \">\" | \">=\" .\n// add_op = \"+\" | \"-\" | \"|\" | \"^\" .\n// mul_op = \"*\" | \"/\" | \"%\" | \"<<\" | \">>\" | \"&\" | \"&^\" .\n//\n// unary_op = \"+\" | \"-\" | \"!\" | \"^\" | \"*\" | \"&\" | \"<-\" .\n\n// I went for a strongly-typed approach here: instead of having one giant, flat `Expr` enum, I\n// chose a deeply nested hierarchy.\n//\n// Advantage: more type-safety.\n// Disadvantages:\n// - takes up more space because Rust doesn't collapse nested enum tags\n// - more verbose\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Expr {\n Unary(UnaryExpr),\n Binary(BinaryExpr),\n}\n\n#[derive(Debug, Clone, Copy, PartialEq, Eq)]\npub enum BinaryOperator {\n Add,\n Sub,\n Mul,\n Div,\n Rem,\n\n BitAnd,\n BitOr,\n BitXor,\n BitClear,\n\n LeftShift,\n RightShift,\n\n Equals,\n NotEqual,\n LessThan,\n LessThanOrEqual,\n GreaterThan,\n GreaterThanOrEqual,\n LogAnd,\n LogOr,\n}\n\nimpl BinaryOperator {\n pub fn from_token_kind(tok: TokenKind) -> Option {\n use self::BinaryOperator::*;\n Some(match tok {\n TokenKind::Plus => Add,\n TokenKind::Minus => Sub,\n TokenKind::Star => Mul,\n TokenKind::Slash => Div,\n TokenKind::Percent => Rem,\n\n TokenKind::And => BitAnd,\n TokenKind::Or => BitOr,\n TokenKind::Caret => BitXor,\n TokenKind::BitClear => BitClear,\n\n TokenKind::Lshift => LeftShift,\n TokenKind::Rshift => RightShift,\n\n TokenKind::Equals => Equals,\n TokenKind::NotEqual => NotEqual,\n TokenKind::LessThan => LessThan,\n TokenKind::LessThanOrEqual => LessThanOrEqual,\n TokenKind::GreaterThan => GreaterThan,\n TokenKind::GreaterThanOrEqual => GreaterThanOrEqual,\n TokenKind::AndAnd => LogAnd,\n TokenKind::OrOr => LogOr,\n\n _ => return None,\n })\n }\n\n pub fn from_token_kind_assign_op(tok: TokenKind) -> Option {\n use self::BinaryOperator::*;\n Some(match tok {\n TokenKind::PlusAssign => Add,\n TokenKind::MinusAssign => Sub,\n TokenKind::StarAssign => Mul,\n TokenKind::SlashAssign => Div,\n TokenKind::PercentAssign => Rem,\n\n TokenKind::AndAssign => BitAnd,\n TokenKind::OrAssign => BitOr,\n TokenKind::CaretAssign => BitXor,\n TokenKind::BitClearAssign => BitClear,\n\n TokenKind::LshiftAssign => LeftShift,\n TokenKind::RshiftAssign => RightShift,\n\n _ => return None,\n })\n }\n\n pub fn precedence(self) -> i32 {\n use self::BinaryOperator::*;\n\n match self {\n Mul | Div | Rem | LeftShift | RightShift | BitAnd | BitClear => 5,\n Add | Sub | BitOr | BitXor => 4,\n Equals | NotEqual | LessThan | LessThanOrEqual | GreaterThan | GreaterThanOrEqual => 3,\n LogAnd => 2,\n LogOr => 1,\n }\n }\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct BinaryExpr {\n pub lhs: Box>,\n pub op: BinaryOperator,\n pub rhs: Box>,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum UnaryExpr {\n Primary(Box),\n UnaryOperation(UnaryOperation),\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct UnaryOperation {\n pub operator: UnaryOperator, // TODO: type safety\n pub operand: Box>,\n}\n\n// TODO\n/// A unary operator.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// unary_op = \"+\" | \"-\" | \"!\" | \"^\" | \"*\" | \"&\" | \"<-\" .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum UnaryOperator {\n Plus,\n Minus,\n Not,\n Xor,\n Deref,\n And,\n ChanReceive,\n}\n\nimpl UnaryOperator {\n pub fn from_token_kind(k: TokenKind) -> Option {\n use self::UnaryOperator::*;\n\n Some(match k {\n TokenKind::Plus => Plus,\n TokenKind::Minus => Minus,\n TokenKind::Not => Not,\n TokenKind::Caret => Xor,\n TokenKind::Star => Deref,\n TokenKind::And => And,\n TokenKind::Arrow => ChanReceive,\n _ => return None,\n })\n }\n}\n\n// pub enum\n\n\n// Primary expressions.\n\n// PrimaryExpr =\n// \tOperand |\n// \tConversion |\n// \tPrimaryExpr Selector |\n// \tPrimaryExpr Index |\n// \tPrimaryExpr Slice |\n// \tPrimaryExpr TypeAssertion |\n// \tPrimaryExpr Arguments .\n//\n// Selector = \".\" identifier .\n// Index = \"[\" Expr \"]\" .\n// Slice = \"[\" ( [ Expr ] \":\" [ Expr ] ) |\n// ( [ Expr ] \":\" Expr \":\" Expr )\n// \"]\" .\n// TypeAssertion = \".\" \"(\" Type \")\" .\n// Arguments = \"(\" [ ( ExprList | Type [ \",\" ExprList ] ) [ \"...\" ] [ \",\" ] ] \")\".\n// Conversion = Type \"(\" Expression [ \",\" ] \")\" .\n\n/// Primary expressions are the operands for unary and binary expressions.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum PrimaryExpr {\n Operand(Operand),\n Conversion(Conversion),\n SelectorExpr(SelectorExpr),\n Indexing(IndexExpr),\n Slicing(SliceExpr),\n TypeAssertion(TypeAssertion),\n FuncCall(FuncCall),\n}\n\n/// Operands denote the elementary values in an expression. An operand may be a literal, a\n/// (possibly qualified) non-blank identifier denoting a constant, variable, or function, a method\n/// expression yielding a function, or a parenthesized expression.\n// XXX/FIXME/TODO: not finished.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Operand {\n /// A literal.\n Lit(Literal),\n /// An identifier denoting a constant, a variable or a function.\n MaybeQualifiedIdent(MaybeQualifiedIdent),\n /// A method expression.\n MethodExpr(MethodExpr),\n /// A parenthesized expression.\n Expr(Expr),\n}\n\n\n/// A selector expression.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// SelectorExpr = PrimaryExpr \".\" identifier .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct SelectorExpr {\n pub operand: Box,\n pub selector: Ident,\n}\n\n/// An index expression.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// IndexExpr = PrimaryExpr \"[\" Expression \"]\" .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct IndexExpr {\n pub operand: Box>,\n pub index: Spanned,\n}\n\n\n/// A slice expression.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// SliceExpr = PrimaryExpr \"[\" ( [ Expression ] \":\" [ Expression ] ) |\n/// ( [ Expression ] \":\" Expression \":\" Expression )\n/// \"]\" .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct SliceExpr {\n pub operand: Box>,\n pub slicing: Slicing,\n}\n// XXX: naming\n\n// From the Go spec:\n//\n// For an array, pointer to array, or slice a (but not a string), the primary expression\n//\n// a[low : high : max]\n//\n// constructs a slice of the same type, and with the same length and elements as the simple slice\n// expression a[low : high]. Additionally, it controls the resulting slice's capacity by setting it\n// to max - low. Only the first index may be omitted; it defaults to 0. After slicing the array a\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Slicing {\n pub low: Spanned,\n pub high: Spanned,\n pub max: Option>,\n}\n\n/// A TypeAssertion contains the expression whose type is being asserted.\n/// This superficially differs from the grammar in the Go spec.\n// XXX: wrap both fields in Spanned\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct TypeAssertion {\n /// The expression whose type is being asserted.\n pub expr: Box,\n /// The 'target type'.\n /// If None, we're in a type switch (`x.(type)` - with the literal `type` keyword).\n pub typ: Option,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct FuncCall {\n pub callee: Box>,\n pub args: Arguments,\n}\n\n\n\n/// A method expression.\n///\n/// If M is in the method set of type T, T.M is a function that is callable as a regular function\n/// with the same arguments as M prefixed by an additional argument that is the receiver of the\n/// method.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// MethodExpr = ReceiverType \".\" MethodName .\n/// ReceiverType = TypeName | \"(\" \"*\" TypeName \")\" | \"(\" ReceiverType \")\" .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct MethodExpr {\n /// Receiver type.\n pub receiver: Type,\n /// Name of the method.\n pub name: String,\n}\n" }, { "path": "src/ast/mod.rs", "content": "//! The Abstract Syntax Tree.\n//!\n//! If you want to learn more, it is recommended to read the [Go language\n//! specification](https://golang.org/ref/spec).\n//!\n//! This module needs attention.\n\n\nmod types;\nmod statements;\nmod expressions;\n\nuse num::bigint::BigInt;\nuse num::BigRational;\nuse token::Spanned;\npub use self::types::*;\npub use self::statements::*;\npub use self::expressions::*;\n\n\n// XXX: We may want to intern strings later on.\n// XXX: should we use aliases? Or resolve them in doc comments?\npub type Ident = String;\npub type TypeName = MaybeQualifiedIdent;\npub type MethodName = Ident;\n\n/// A complete source file.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// SourceFile = PackageClause \";\" { ImportDecl \";\" } { TopLevelDecl \";\" } .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct SourceFile {\n /// Name of the package this file belongs to.\n pub package: Ident,\n /// All import declarations in this file.\n pub import_decls: Vec>,\n /// All top-level declarations in this file.\n pub top_level_decls: Vec,\n}\n\n/// An import declaration.\n/// Contains a list of \"import specs\".\n///\n/// ## Grammar\n///\n/// ```ignore\n/// ImportDecl = \"import\" ( ImportSpec | \"(\" { ImportSpec \";\" } \")\" ) .\n/// ```\n///\n/// Example:\n///\n/// ``` go\n/// import (\n/// \"fmt\"\n/// \"io/ioutil\"\n/// )\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ImportDecl {\n pub specs: Vec>,\n}\n\n/// An import spec.\n///\n/// This can only appear in an import declaration (AFAIK).\n///\n/// ## Grammar\n///\n/// ```ignore\n/// ImportSpec = [ \".\" | PackageName ] ImportPath .\n/// ImportPath = string_lit .\n/// ```\n///\n/// Example:\n///\n/// ```ignore\n/// m \"lib/math\"\n/// ```\n///\n/// This imports `lib/math` as `m`.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ImportSpec {\n pub kind: ImportKind,\n pub path: Spanned>,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum ImportKind {\n /// Regular import: the kind you encounter most often.\n Normal,\n /// Aliased import: defines an alias for the imported package.\n Alias(String),\n /// Glob import: all the package's exported identifiers will be declared in the importing\n /// source file.\n Glob,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\n/// A top-level declaration - i.e. a declaration that may appear immediately after import\n/// declarations.\npub enum TopLevelDecl {\n Statement(DeclStmt),\n Func(FuncDecl),\n Method(MethodDecl),\n}\n\n// From the Go spec:\n//\n// FunctionDecl = \"func\" FunctionName ( Function | Signature ) .\n// FunctionName = identifier .\n// Function = Signature FunctionBody .\n// FunctionBody = Block .\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct FuncDecl {\n // XXX: functions with same name but different origins, how do we handle them?\n pub name: Spanned,\n pub signature: FuncSignature,\n pub body: Option,\n}\n\n\n/// A function signature: return type(s) and argument types.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct FuncSignature {\n pub parameters: Parameters,\n // Yes, the result of a function is a `Parameters` struct.\n pub result: Parameters,\n}\n\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Parameters {\n pub decls: Vec,\n}\n\nimpl Parameters {\n /// Create an empty parameter list.\n pub fn empty() -> Parameters {\n Parameters { decls: Vec::new() }\n }\n\n /// Create a parameter list containing a single, unnamed type.\n pub fn from_single_type(t: Type) -> Parameters {\n Parameters {\n decls: vec![ParameterDecl {\n identifiers: vec![],\n typ: t,\n variadic: false,\n }],\n }\n }\n}\n\n// TODO: variadic functions.\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ParameterDecl {\n pub identifiers: Vec,\n /// The type assigned to every identifier in this declaration.\n pub typ: Type,\n // XXX: review this.\n // ONLY the last ParameterDecl of a Parameters struct may be variadic.\n // And only if it's part of _input_ parameters.\n pub variadic: bool,\n}\n\n// XXX: types need attention.\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Type {\n Plain(MaybeQualifiedIdent),\n Literal(Box),\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum TypeLiteral {\n Array(ArrayType),\n Struct(StructType),\n Pointer(PointerType),\n Func(FuncType),\n Interface(InterfaceType),\n Slice(SliceType),\n Map(MapType),\n Chan(ChanType),\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Literal {\n Basic(BasicLit),\n Composite(CompositeLit),\n Func(FuncLit),\n}\n\n/// A _potentially_ qualified identifier (e.g. `math.Sin`, but also `someUnqualifiedIdent`).\n///\n/// \"A qualified identifier is an identifier qualified with a package name prefix.\"\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct MaybeQualifiedIdent {\n pub package: Option,\n pub name: Ident,\n}\n\n/// A constant declaration binds a list of identifiers (the names of the constants) to the values\n/// of a list of constant expressions.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// ConstDecl = \"const\" ( ConstSpec | \"(\" { ConstSpec \";\" } \")\" ) .\n/// ```\n///\n/// Example: `const Pi float64 = 3.14159265358979323846`\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ConstDecl {\n pub specs: Vec,\n}\n\n\n// TODO: docs\n/// ## Grammar\n///\n/// ```ignore\n/// ConstSpec = IdentifierList [ [ Type ] \"=\" ExpressionList ] .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ConstSpec {\n pub idents: Vec>,\n pub inner: Option,\n}\n\n// XXX: naming\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ConstSpecInner {\n pub typ: Option,\n pub exprs: Vec,\n}\n\n\n/// A method is a function with a receiver. A method declaration binds an identifier, the method\n/// name, to a method, and associates the method with the receiver's base type.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// MethodDecl = \"func\" Receiver MethodName ( Function | Signature ) .\n/// Receiver = Parameters .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct MethodDecl {\n pub receiver: Parameters,\n pub name: Spanned,\n pub signature: FuncSignature,\n pub body: Option,\n}\n\n/// A type declaration binds an identifier, the type name, to a new type that has the same\n/// underlying type as an existing type, and operations defined for the existing type are also\n/// defined for the new type.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// TypeDecl = \"type\" ( TypeSpec | \"(\" { TypeSpec \";\" } \")\" ) .\n/// TypeSpec = identifier Type .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct TypeDecl {\n pub specs: Vec>,\n}\n\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct TypeSpec {\n pub ident: Spanned,\n pub typ: Spanned,\n}\n\n/// A variable declaration creates one or more variables, binds corresponding identifiers to them,\n/// and gives each a type and an initial value.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// VarDecl = \"var\" ( VarSpec | \"(\" { VarSpec \";\" } \")\" ) .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct VarDecl {\n pub specs: Vec>,\n}\n\n/// ## Grammar\n///\n/// ```ignore\n/// VarSpec = IdentifierList ( Type [ \"=\" ExpressionList ] | \"=\" ExpressionList ) .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct VarSpec {\n pub idents: Vec>,\n pub typ: Option,\n pub exprs: Vec>,\n}\n\n/// Conversions are expressions of the form T(x) where T is a type and x is an expression that can\n/// be converted to type T.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// Conversion = Type \"(\" Expression [ \",\" ] \")\" .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Conversion {\n /// The type to convert to.\n pub typ: Spanned,\n /// The expression being converted.\n pub expr: Spanned,\n}\n\n\n// ShortVarDecl = IdentifierList \":=\" ExpressionList .\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ShortVarDecl {\n pub lhs: Vec>,\n pub rhs: Vec>,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Block(pub Vec);\n\n\n// XXX/FIXME: review and fix this.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum BasicLit {\n Int(BigInt),\n Float(BigRational),\n Imaginary(BigRational),\n Rune(char),\n Str(Vec),\n}\n\n\n/// Composite literals construct values for structs, arrays, slices, and maps and create a new\n/// value each time they are evaluated. They consist of the type of the literal followed by a\n/// brace-bound list of elements. Each element may optionally be preceded by a corresponding key.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// CompositeLit = LiteralType LiteralValue .\n/// LiteralType = StructType | ArrayType | \"[\" \"...\" \"]\" ElementType |\n/// SliceType | MapType | TypeName .\n/// LiteralValue = \"{\" [ ElementList [ \",\" ] ] \"}\" .\n/// ElementList = KeyedElement { \",\" KeyedElement } .\n/// KeyedElement = [ Key \":\" ] Element .\n/// Key = FieldName | Expression | LiteralValue .\n/// FieldName = identifier .\n/// Element = Expression | LiteralValue .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct CompositeLit {\n pub typ: Spanned,\n pub val: LiteralValue,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum LiteralType {\n Struct(StructType),\n Array(ArrayType),\n // FIXME: MISSING: `[...]int` array (computes size at compile time)\n Slice(SliceType),\n Map(MapType),\n Type(MaybeQualifiedIdent),\n}\n\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct LiteralValue {\n pub elems: Vec,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct KeyedElem {\n pub key: Option>,\n pub elem: Spanned,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Key {\n FieldName(Ident),\n Expr(Expr),\n LiteralValue(LiteralValue),\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Elem {\n Expr(Expr),\n LiteralValue(LiteralValue),\n}\n\n\n/// A function literal represents an anonymous function.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// FunctionLit = \"func\" Function .\n/// Function = Signature FunctionBody .\n/// FunctionBody = Block .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct FuncLit {\n pub signature: FuncSignature,\n pub body: Block,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\n/// A list of arguments being passed to a function.\n///\n/// Arguments can't just be a list of expressions, because Go has a built-in generic generic\n/// functions: `make` and `new`, and these functions take a **type** instead of an expression\n/// as their first argument.\npub struct Arguments {\n pub typ: Option>,\n pub expressions: Vec>,\n}\n" }, { "path": "src/ast/statements.rs", "content": "use super::{Block, Expr, ShortVarDecl, ConstDecl, TypeDecl, VarDecl, BinaryOperator};\nuse token::Spanned;\n\n\n// Statement =\n// \tDeclaration | LabeledStmt | SimpleStmt |\n// \tGoStmt | ReturnStmt | BreakStmt | ContinueStmt | GotoStmt |\n// \tFallthroughStmt | Block | IfStmt | SwitchStmt | SelectStmt | ForStmt |\n// \tDeferStmt .\n//\n// SimpleStmt = EmptyStmt | ExprStmt | SendStmt | IncDecStmt | Assignment | ShortVarDecl .\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Statement {\n Decl(DeclStmt),\n Labeled(LabeledStmt),\n Simple(SimpleStmt),\n Go(GoStmt),\n Return(ReturnStmt),\n Break(BreakStmt),\n Continue(ContinueStmt),\n Goto(GotoStmt),\n Fallthrough(FallthroughStmt),\n Block(Block),\n If(IfStmt),\n Switch(SwitchStmt),\n Select(SelectStmt),\n For(ForStmt),\n Defer(DeferStmt),\n Empty(EmptyStmt),\n}\n\nmacro_rules! enum_from_impl {\n ($enum_type:ident, $(($enum_variant:ident, $inner_type:ty)),*) => {\n $(\n impl From<$inner_type> for $enum_type {\n fn from(x: $inner_type) -> $enum_type {\n $enum_type::$enum_variant(x)\n }\n }\n )*\n }\n}\n\nenum_from_impl!(Statement,\n (Decl, DeclStmt),\n (Labeled, LabeledStmt),\n (Simple, SimpleStmt),\n (Go, GoStmt),\n (Return, ReturnStmt),\n (Break, BreakStmt),\n (Continue, ContinueStmt),\n (Goto, GotoStmt),\n (Fallthrough, FallthroughStmt),\n (Block, Block),\n (If, IfStmt),\n (Switch, SwitchStmt),\n (Select, SelectStmt),\n (For, ForStmt),\n (Defer, DeferStmt),\n (Empty, EmptyStmt));\n\n\n/// A simple statement.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum SimpleStmt {\n EmptyStmt,\n Expr(Spanned),\n Send(SendStmt),\n IncDec(IncDecStmt),\n Assignment(Assignment),\n ShortVarDecl(ShortVarDecl),\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct LabeledStmt;\n\n/// A \"go\" statement starts the execution of a function call as an independent concurrent thread of\n/// control, or goroutine, within the same address space.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct GoStmt {\n /// The function or method call being started.\n pub call: Spanned,\n}\n\n/// A \"defer\" statement invokes a function whose execution is deferred to the moment the\n/// surrounding function returns, either because the surrounding function executed a return\n/// statement, reached the end of its function body, or because the corresponding goroutine is\n/// panicking.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct DeferStmt {\n /// The function or method call being deferred.\n pub call: Spanned,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ReturnStmt {\n /// The expression being returned.\n pub expr: Spanned,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct BreakStmt {\n /// An optional label referring to an enclosing \"for\", \"switch\", or \"select\".\n pub label: Option>,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ContinueStmt {\n /// An optional label referring to an enclosing \"for\", \"switch\", or \"select\".\n pub label: Option>,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct GotoStmt {\n pub label: Spanned,\n}\n\n/// \"Fallthrough\" statements contain no associated data!\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct FallthroughStmt;\n\n\n/// \"If\" statements specify the conditional execution of two branches according to the value of a\n/// boolean expression. If the expression evaluates to true, the \"if\" branch is executed,\n/// otherwise, if present, the \"else\" branch is executed.\n///\n/// The expression may be preceded by a simple statement, which executes before the expression is\n/// evaluated.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct IfStmt {\n pub before_stmt: Option>,\n pub condition: Spanned,\n pub block: Block,\n pub opt_else: Option>,\n}\n\n/// The \"else\" portion of an if statement.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum Else {\n /// `else if { ... }`\n If(IfStmt),\n /// `else { ... }`\n Block(Block),\n}\n\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct SwitchStmt;\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct SelectStmt;\n\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ForStmt {\n /// The \"header\" is the part of of a `for` that comes before the body.\n pub header: ForHeader,\n pub body: Block,\n}\n\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum ForHeader {\n Condition(Expr),\n ForClause(ForClause),\n RangeClause(RangeClause),\n}\n\n// Grammar:\n//\n// ForClause = [ InitStmt ] \";\" [ Condition ] \";\" [ PostStmt ] .\n// InitStmt = SimpleStmt .\n// PostStmt = SimpleStmt .\n// Condition = Expression .\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ForClause {\n pub init: Option,\n pub condition: Option,\n pub post: Option,\n}\n\n\n// RangeClause = [ ExpressionList \"=\" | IdentifierList \":=\" ] \"range\" Expression .\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct RangeClause {\n /// The iteration variables.\n pub iter_vars: IterVars,\n /// The range expression.\n pub expr: Spanned,\n}\n\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum IterVars {\n Exprs(Vec>),\n Idents(Vec>),\n}\n\n// SendStmt = Channel \"<-\" Expression .\n// Channel = Expression .\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct SendStmt {\n pub channel: Spanned,\n pub expr: Spanned,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct IncDecStmt {\n pub expr: Spanned,\n pub is_dec: bool, // false for ++, true for --\n}\n\n// Assignment = ExpressionList assign_op ExpressionList .\n// assign_op = [ add_op | mul_op ] \"=\" .\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Assignment {\n pub lhs: Vec>,\n pub rhs: Vec>,\n // binary operation used in assign op\n // XXX: add method to BinaryOperator to check if is a valid assign_op operation\n pub op: Option,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct EmptyStmt;\n\n// Declaration = ConstDecl | TypeDecl | VarDecl .\n/// A statement declaration.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum DeclStmt {\n Const(ConstDecl),\n TypeDecl(TypeDecl),\n VarDecl(VarDecl),\n}\n" }, { "path": "src/ast/types.rs", "content": "use super::*;\n\n/// An array type.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// ArrayType = \"[\" ArrayLength \"]\" ElementType .\n/// ArrayLength = Expression .\n/// ElementType = Type .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ArrayType {\n pub len: Expr,\n pub element_type: Type,\n}\n\n/// A struct type.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// StructType = \"struct\" \"{\" { FieldDecl \";\" } \"}\" .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct StructType {\n pub field_decls: Vec,\n}\n\n\n/// An inner field decl.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// FieldDecl = (IdentifierList Type | AnonymousField) [ Tag ] .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct FieldDecl {\n pub inner: InnerFieldDecl,\n pub tag: Option>, // Go string literal; TODO proper wrapper type\n}\n\n/// An InnerFieldDecl.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// AnonymousField = [ \"*\" ] TypeName .\n/// Tag = string_lit .\n/// TypeName = identifier | QualifiedIdent .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum InnerFieldDecl {\n Named {\n idents: Vec,\n typ: Type,\n },\n Anonymous {\n is_ptr: bool,\n type_name: MaybeQualifiedIdent,\n },\n}\n\n\n/// A type which is a pointer to a base type.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct PointerType(pub Type);\n\n\n\n/// A function type denotes the set of all functions with the same parameter and result types. The\n/// value of an uninitialized variable of function type is nil.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// FunctionType = \"func\" Signature .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct FuncType {\n pub signature: FuncSignature,\n}\n\n\n/// An interface type specifies a method set called its interface.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// InterfaceType = \"interface\" \"{\" { MethodSpec \";\" } \"}\" .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct InterfaceType {\n pub specs: Vec,\n}\n\n/// An interface method spec.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// MethodSpec = MethodName Signature | InterfaceTypeName .\n/// MethodName = identifier .\n/// InterfaceTypeName = TypeName .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct MethodSpec {\n pub name: Ident,\n pub method: InnerMethodSpec,\n}\n\n// XXX: naming things is hard\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum InnerMethodSpec {\n Signature(FuncSignature),\n InterfaceName(TypeName),\n}\n\n/// A slice type denotes the set of all slices of arrays of its element type.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// SliceType = \"[\" \"]\" ElementType .\n/// ElementType = Type .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct SliceType {\n pub element_type: Type,\n}\n\n/// A map is an unordered group of elements of one type, called the element type, indexed by a set\n/// of unique keys of another type, called the key type.\n/// ## Grammar\n///\n/// ```ignore\n/// MapType = \"map\" \"[\" KeyType \"]\" ElementType .\n/// KeyType = Type .\n/// ElementType = Type .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct MapType {\n pub key_type: Type,\n pub element_type: Type,\n}\n\n/// A channel provides a mechanism for concurrently executing functions to communicate by sending\n/// and receiving values of a specified element type.\n///\n/// ## Grammar\n///\n/// ```ignore\n/// ChannelType = ( \"chan\" | \"chan\" \"<-\" | \"<-\" \"chan\" ) ElementType .\n/// ElementType = Type .\n/// ```\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct ChanType {\n pub element_type: Type,\n pub direction: ChanDirection,\n}\n\n\n/// The optional <- operator specifies the **channel direction**, send or receive. If no direction\n/// is given, the channel is bidirectional.\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum ChanDirection {\n /// No arrow.\n Bidirectional,\n /// Arrow on the right: `chan<-`\n Send,\n /// Arrow on the left: `<-chan`\n Receive,\n}\n" }, { "path": "src/lexer/mod.rs", "content": "//! # Lexer\n//!\n//! A `Lexer` parses a source string into a list of tokens, which may later be used to construct an\n//! Abstract Syntax Tree.\n//!\n//! ## Notes\n//!\n//! - We want meaningful errors from the start. That means printing the line and column number on\n//! error, returning `Result`s instead of panicking (later on, we may use unwinding to speed up\n//! lexical analysis in non-erroneous cases).\n//!\n//! - It is unclear whether we should operator on Unicode `char`, or plain bytes `u8`. `char`s are\n//! more convenient to display and offer a clean API; bytes are (most likely) faster to work with.\n//!\n//! - I'm not sure what the best way to store tokens is. A slice into the original source, an\n//! interned string...? Probably an interned string, this is what rustc uses and it speeds up\n//! comparisons, which are going to be very frequent. Probably reduces allocations, too - and we're\n//! allocating a _lot_. We'd have to benchmark to be sure.\n\nuse std::iter::Iterator;\npub use token::*;\n\n#[cfg(test)]\nmod test;\n\npub struct Lexer<'src> {\n /// Byte offset from the start of the source string.\n offset: usize,\n /// The source string.\n src: &'src str,\n /// The last character to be read.\n current_char: Option,\n /// The kind of token we read last. Used for automatic semicolon insertion.\n last_token_kind: Option,\n}\n\nimpl<'src> Lexer<'src> {\n /// Create a new Lexer from the given source string.\n pub fn new(s: &str) -> Lexer {\n // Initialize the lexer with the first character of the source string.\n let first_char = s.chars().next();\n\n Lexer {\n src: s,\n offset: 0,\n current_char: first_char,\n last_token_kind: None,\n }\n }\n\n /// 'eat' one character.\n /// This is a _very_ hot function.\n fn bump(&mut self) {\n self.offset += self.current_char.unwrap().len_utf8();\n\n if self.offset < self.src.len() {\n let ch = char_at(&self.src, self.offset);\n self.current_char = Some(ch);\n } else {\n self.current_char = None;\n }\n }\n\n /// Return the next character **without** bumping.\n /// Useful for lookahead.\n fn next_char(&self) -> Option {\n let next_offset = self.offset + 1;\n if next_offset < self.src.len() {\n let ch = char_at(&self.src, next_offset);\n Some(ch)\n } else {\n None\n }\n }\n\n /// Scan a number literal (integer or float).\n ///\n /// The literal \"0\" is considered octal, [as in\n /// C++](http://stackoverflow.com/a/6895543/2754323).\n fn scan_number(&mut self) -> Token {\n // Integer literal grammar:\n //\n // int_lit = decimal_lit | octal_lit | hex_lit .\n // decimal_lit = ( \"1\" … \"9\" ) { decimal_digit } .\n // octal_lit = \"0\" { octal_digit } .\n // hex_lit = \"0\" ( \"x\" | \"X\" ) hex_digit { hex_digit } .\n\n let start = self.offset;\n\n // If we have a hexadecimal, treat it specially.\n if self.current_char == Some('0') &&\n (self.next_char() == Some('x') || self.next_char() == Some('x')) {\n self.bump();\n self.bump();\n\n while let Some(c) = self.current_char {\n if c.is_digit(16) {\n self.bump();\n } else {\n break;\n }\n }\n\n return Token {\n value: Some(self.src[start..self.offset].into()),\n kind: TokenKind::Hex,\n };\n }\n\n let has_leading_zero = self.current_char == Some('0');\n let mut had_e = false;\n let mut had_dot = false;\n\n 'outer: while let Some(c) = self.current_char {\n if c.is_digit(10) {\n self.bump();\n } else if !had_e && (c == 'e' || c == 'E') {\n self.bump();\n had_e = true;\n\n if self.current_char == Some('+') || self.current_char == Some('-') {\n self.bump();\n }\n } else if !had_e && !had_dot && c == '.' {\n self.bump();\n had_dot = true;\n } else if c == 'i' {\n self.bump();\n\n return Token {\n value: Some(self.src[start..self.offset].into()),\n kind: TokenKind::Imaginary,\n };\n } else {\n break;\n }\n }\n\n let s = &self.src[start..self.offset];\n\n let kind = if had_e || had_dot {\n TokenKind::Float\n } else if has_leading_zero {\n TokenKind::Octal\n } else {\n TokenKind::Decimal\n };\n\n Token {\n value: Some(s.into()),\n kind: kind,\n }\n }\n\n /// Skip whitespace and comments, returning whether at least one newline was encountered.\n fn skip_whitespace_and_comments(&mut self) -> bool {\n let mut contains_newline = false;\n\n while let Some(c) = self.current_char {\n if c == '\\n' {\n contains_newline = true;\n }\n\n // Are we at the start of a general comment (`/* ... */`)?\n if c == '/' && self.next_char() == Some('*') {\n // Skip the '/*'.\n self.bump();\n self.bump();\n\n // Skip the comment body.\n while let Some(c) = self.current_char {\n if c == '*' && self.next_char() == Some('/') {\n break;\n } else {\n self.bump();\n }\n }\n\n // Skip the '*/'.\n self.bump();\n self.bump();\n\n // Resume whitespace skipping.\n continue;\n\n } else if c == '/' && self.next_char() == Some('/') {\n while let Some(c) = self.current_char {\n if c == '\\n' {\n break;\n } else {\n self.bump();\n }\n }\n\n // Resume whitespace skipping.\n // Since we have not bumped past the newline character,\n // the next iteration of the loop will catch it.\n continue;\n }\n\n if c.is_whitespace() {\n self.bump();\n } else {\n break;\n }\n }\n\n\n contains_newline\n }\n\n fn scan_ident(&mut self) -> &str {\n let start = self.offset;\n\n while let Some(c) = self.current_char {\n if can_continue_identifier(c) {\n self.bump();\n } else {\n break;\n }\n }\n\n &self.src[start..self.offset]\n }\n\n fn scan_ident_or_keyword(&mut self) -> Token {\n let ident = self.scan_ident();\n let mut value = None;\n\n use token::TokenKind::*;\n\n let kind = match &*ident {\n \"break\" => Break,\n \"case\" => Case,\n \"chan\" => Chan,\n \"const\" => Const,\n \"continue\" => Continue,\n \"default\" => Default,\n \"defer\" => Defer,\n \"else\" => Else,\n \"fallthrough\" => Fallthrough,\n \"for\" => For,\n \"func\" => Func,\n \"go\" => Go,\n \"goto\" => Goto,\n \"if\" => If,\n \"import\" => Import,\n \"interface\" => Interface,\n \"map\" => Map,\n \"package\" => Package,\n \"range\" => Range,\n \"return\" => Return,\n \"select\" => Select,\n \"struct\" => Struct,\n \"switch\" => Switch,\n \"type\" => Type,\n \"var\" => Var,\n // XXX(perf): unnecessary alloc.\n _ => {\n value = Some(ident.into());\n TokenKind::Ident\n }\n };\n\n Token {\n kind: kind,\n value: value,\n }\n }\n\n /// Return the next token, if any.\n fn next_token_inner(&mut self) -> Option {\n // Whitespace and comment handling.\n let contains_newline = self.skip_whitespace_and_comments();\n\n // Automatic semicolon insertion in the simplest case (newline + token that may terminate a\n // statement).\n //\n // The Go Spec also says that a semicolon may be omitted before a closing \")\" or \"}\".\n // This case is _not_ handled by the lexer, but by the parser, as it requires too much\n // context.\n if contains_newline && may_terminate_statement(self.last_token_kind) {\n return Some(Token {\n kind: TokenKind::Semicolon,\n value: None,\n });\n }\n\n // Check for EOF after whitespace handling.\n let c = match self.current_char {\n Some(c) => c,\n None => return None,\n };\n\n let kind = match c {\n // Single-character tokens.\n '(' => {\n self.bump();\n TokenKind::LParen\n }\n ')' => {\n self.bump();\n TokenKind::RParen\n }\n '{' => {\n self.bump();\n TokenKind::LBrace\n }\n '}' => {\n self.bump();\n TokenKind::RBrace\n }\n '[' => {\n self.bump();\n TokenKind::LBracket\n }\n ']' => {\n self.bump();\n TokenKind::RBracket\n }\n ',' => {\n self.bump();\n TokenKind::Comma\n }\n ';' => {\n self.bump();\n TokenKind::Semicolon\n }\n // More complex tokens.\n '.' => {\n if self.next_char().map(|x| x.is_digit(10)) == Some(true) {\n return Some(self.scan_number());\n }\n\n self.bump();\n\n // Look for an ellipsis ('...').\n if self.current_char == Some('.') && self.next_char() == Some('.') {\n self.bump();\n self.bump();\n TokenKind::Ellipsis\n } else {\n TokenKind::Dot\n }\n }\n ':' => {\n self.bump();\n\n if self.current_char == Some('=') {\n self.bump();\n TokenKind::ColonAssign\n } else {\n TokenKind::Colon\n }\n }\n '=' => {\n self.bump();\n\n if self.current_char == Some('=') {\n self.bump();\n TokenKind::Equals\n } else {\n TokenKind::Assign\n }\n }\n '+' => {\n self.bump();\n\n match self.current_char {\n Some('+') => {\n self.bump();\n TokenKind::Increment\n }\n Some('=') => {\n self.bump();\n TokenKind::PlusAssign\n }\n _ => TokenKind::Plus,\n }\n }\n '-' => {\n self.bump();\n\n match self.current_char {\n Some('-') => {\n self.bump();\n TokenKind::Decrement\n }\n Some('=') => {\n self.bump();\n TokenKind::MinusAssign\n }\n _ => TokenKind::Minus,\n }\n }\n '*' => {\n self.bump();\n\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::StarAssign\n }\n _ => TokenKind::Star,\n }\n }\n '/' => {\n self.bump();\n\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::SlashAssign\n }\n _ => TokenKind::Slash,\n }\n }\n '<' => {\n self.bump();\n\n match self.current_char {\n Some('<') => {\n self.bump();\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::LshiftAssign\n }\n _ => TokenKind::Lshift,\n }\n }\n Some('=') => {\n self.bump();\n TokenKind::LessThanOrEqual\n }\n Some('-') => {\n self.bump();\n TokenKind::Arrow\n }\n _ => TokenKind::LessThan,\n }\n }\n '>' => {\n self.bump();\n\n match self.current_char {\n Some('>') => {\n self.bump();\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::RshiftAssign\n }\n _ => TokenKind::Rshift,\n }\n }\n Some('=') => {\n self.bump();\n TokenKind::GreaterThanOrEqual\n }\n _ => TokenKind::GreaterThan,\n }\n }\n '|' => {\n self.bump();\n\n match self.current_char {\n Some('|') => {\n self.bump();\n TokenKind::OrOr\n }\n Some('=') => {\n self.bump();\n TokenKind::OrAssign\n }\n _ => TokenKind::Or,\n }\n }\n '&' => {\n self.bump();\n\n match self.current_char {\n Some('&') => {\n self.bump();\n TokenKind::AndAnd\n }\n Some('=') => {\n self.bump();\n TokenKind::AndAssign\n }\n Some('^') => {\n self.bump();\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::BitClearAssign\n }\n _ => TokenKind::BitClear,\n }\n }\n _ => TokenKind::And,\n }\n }\n '!' => {\n self.bump();\n\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::NotEqual\n }\n _ => TokenKind::Not,\n }\n }\n '^' => {\n self.bump();\n\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::CaretAssign\n }\n _ => TokenKind::Caret,\n }\n }\n '%' => {\n self.bump();\n\n match self.current_char {\n Some('=') => {\n self.bump();\n TokenKind::PercentAssign\n }\n _ => TokenKind::Percent,\n }\n }\n // Scan integer.\n c if c.is_digit(10) => return Some(self.scan_number()),\n c if can_start_identifier(c) => return Some(self.scan_ident_or_keyword()),\n // Start of _interpreted_ string literal.\n '\"' => return Some(self.scan_interpreted_str_lit()),\n '`' => return Some(self.scan_raw_str_lit()),\n '\\'' => return Some(self.scan_rune_lit()),\n c => panic!(\"unexpected start of token: '{}'\", c),\n };\n\n Some(Token {\n kind: kind,\n value: None,\n })\n }\n\n fn scan_rune_lit(&mut self) -> Token {\n self.bump();\n\n let start = self.offset;\n\n while let Some(c) = self.current_char {\n // If we encounter a backslash escape, we just skip past the '\\' and the\n // following character.\n if c == '\\\\' {\n self.bump();\n self.bump();\n } else if c == '\\'' {\n break;\n } else {\n self.bump();\n }\n }\n\n let s = &self.src[start..self.offset];\n\n // Skip the quote _after_ slicing so that it isn't included\n // in the slice.\n self.bump();\n\n Token {\n value: Some(s.into()),\n kind: TokenKind::Rune,\n }\n }\n\n fn scan_interpreted_str_lit(&mut self) -> Token {\n self.bump();\n let start = self.offset;\n\n while let Some(c) = self.current_char {\n // If we encounter a backslash escape, we just skip past the '\\' and the\n // following character.\n if c == '\\\\' {\n self.bump();\n self.bump();\n } else if c == '\"' {\n break;\n } else {\n self.bump();\n }\n }\n\n let s = &self.src[start..self.offset];\n\n // Skip the quote _after_ slicing so that it isn't included\n // in the slice.\n self.bump();\n\n Token {\n // XXX(perf): alloc.\n value: Some(s.into()),\n kind: TokenKind::Str,\n }\n }\n\n fn scan_raw_str_lit(&mut self) -> Token {\n // Bump past the opening backtrick.\n self.bump();\n let start = self.offset;\n\n while let Some(c) = self.current_char {\n // Raw strings are pretty simple, because we don't have to handle escapes.\n if c == '`' {\n break;\n } else {\n self.bump();\n }\n }\n\n let s = &self.src[start..self.offset];\n\n // Skip the backtick _after_ slicing so that it isn't included\n // in the slice.\n self.bump();\n\n Token {\n // XXX(perf): alloc.\n value: Some(s.into()),\n kind: TokenKind::StrRaw,\n }\n }\n}\n\nimpl<'src> Iterator for Lexer<'src> {\n type Item = TokenAndSpan;\n\n fn next(&mut self) -> Option {\n let start = self.offset as u32;\n let t = self.next_token_inner();\n self.last_token_kind = t.as_ref().map(|t| t.kind);\n\n t.map(|t| {\n TokenAndSpan {\n token: t,\n span: Span {\n start: start,\n end: self.offset as u32,\n },\n }\n })\n }\n}\n\n/// Convenience function to collect all the tokens from a string.\npub fn tokenize(s: &str) -> Vec {\n let lexer = Lexer::new(s);\n lexer.collect()\n}\n\n\n// =====\n// Utility functions.\n//\n// XXX(perf): expensive checks on Unicode chars (is_alphabetic(), is_numeric()) in these functions.\n// =====\n\nfn can_start_identifier(c: char) -> bool {\n c.is_alphabetic() || c == '_'\n}\n\nfn can_continue_identifier(c: char) -> bool {\n c.is_alphabetic() || c.is_numeric() || c == '_'\n}\n\nfn char_at(s: &str, byte: usize) -> char {\n s[byte..].chars().next().unwrap()\n}\n\n// For automatic semicolon insertion.\nfn may_terminate_statement(t: Option) -> bool {\n // A non-existent token may not terminate a line.\n let t = match t {\n Some(t) => t,\n None => return false,\n };\n\n // From the Go spec:\n //\n // When the input is broken into tokens, a semicolon is automatically inserted into the\n // token stream immediately after a line's final token if that token is:\n // - an identifier\n // - an integer, floating-point, imaginary, rune, or string literal\n // - one of the keywords break, continue, fallthrough, or return\n // - one of the operators and delimiters ++, --, ), ], or }\n use token::TokenKind::*;\n match t {\n Ident => true,\n Increment | Decrement | Break | Continue | Fallthrough | Return | RParen | RBracket |\n RBrace => true,\n t if t.is_literal() => true,\n _ => false,\n }\n}\n" }, { "path": "src/lexer/test.rs", "content": "use super::{Token, TokenKind, tokenize};\nuse token::TokenKind::*;\n\n// XXX: use the full TokenKind::* path, or `use TokenKind::*`?\n\nfn assert_tokens(code: &str, expect: &[(TokenKind, Option<&str>)]) {\n let got = tokenize(code);\n\n // If the assertion fails, having a log message will be very useful.\n println!(\"got:\\n{:#?}\", got);\n println!(\"\\nexpected:\\n{:#?}\", expect);\n assert_eq!(got.len(), expect.len());\n\n for (got_t, expect_t) in got.iter().zip(expect) {\n let nt = Token {\n kind: expect_t.0,\n value: expect_t.1.map(|s| s.to_owned()),\n };\n assert_eq!(got_t.token, nt);\n }\n}\n\nfn assert_token(code: &str, expect_kind: TokenKind, expect_value: Option<&str>) {\n assert_tokens(code, &[(expect_kind, expect_value)]);\n}\n\n#[test]\nfn test_numerical_tokens() {\n // Integer Literals\n assert_token(\"42\", Decimal, Some(\"42\"));\n assert_token(\"0600\", Octal, Some(\"0600\"));\n assert_token(\"0xBadFace\", Hex, Some(\"0xBadFace\"));\n assert_token(\"170141183460469231731687303715884105727\",\n Decimal,\n Some(\"170141183460469231731687303715884105727\"));\n\n let float_tests =\n [\"0.\", \"72.40\", \"072.40\", \"2.71828\", \"1.e+0\", \"6.67428e-11\", \"1E6\", \".25\", \".12345E+5\"];\n\n for t in &float_tests {\n assert_token(t, Float, Some(t));\n }\n\n let imaginary_tests =\n [\"0i\", \"011i\", \"0.i\", \"2.71828i\", \"1.e+0i\", \"6.67428e-11i\", \"1E6i\", \".25i\", \".12345E+5i\"];\n\n for t in &imaginary_tests {\n assert_token(t, Imaginary, Some(t));\n }\n}\n\n#[test]\nfn test_text_literals() {\n assert_token(\"'a'\", Rune, Some(\"a\"));\n assert_token(\"'\\\\n'\", Rune, Some(\"\\\\n\"));\n assert_token(\"'\\\\''\", Rune, Some(\"\\\\'\"));\n assert_token(\"\\\"Hello!\\\"\", Str, Some(\"Hello!\"));\n assert_token(\"\\\"\\\\n\\\\n\\\"\", Str, Some(\"\\\\n\\\\n\"));\n assert_token(\"\\\"\\\\\\\"\\\"\", Str, Some(\"\\\\\\\"\"));\n assert_token(\"`Hello!`\", StrRaw, Some(\"Hello!\"));\n assert_token(\"`\\\\n\\\\n`\", StrRaw, Some(\"\\\\n\\\\n\"));\n assert_token(\"`\\\\\\\"`\", StrRaw, Some(\"\\\\\\\"\"));\n assert_token(r##\"\"\\\\\\\"oqdz\"\"##, Str, Some(\"\\\\\\\\\\\\\\\"oqdz\"));\n}\n\n/// Test 'simple' tokens (tokens that do not contain a value).\n#[test]\nfn tokenize_simple() {\n let pairs = vec![(\"(\", TokenKind::LParen),\n (\")\", TokenKind::RParen),\n (\"{\", TokenKind::LBrace),\n (\"}\", TokenKind::RBrace),\n (\"[\", TokenKind::LBracket),\n (\"]\", TokenKind::RBracket),\n (\",\", TokenKind::Comma),\n (\";\", TokenKind::Semicolon),\n (\".\", TokenKind::Dot),\n (\"...\", TokenKind::Ellipsis),\n (\"|\", TokenKind::Or),\n (\"||\", TokenKind::OrOr),\n (\"|=\", TokenKind::OrAssign),\n (\"!\", TokenKind::Not),\n (\"!=\", TokenKind::NotEqual),\n (\"^\", TokenKind::Caret),\n (\"^=\", TokenKind::CaretAssign),\n (\"%\", TokenKind::Percent),\n (\"%=\", TokenKind::PercentAssign),\n (\"&\", TokenKind::And),\n (\"&&\", TokenKind::AndAnd),\n (\"&=\", TokenKind::AndAssign),\n (\"&^\", TokenKind::BitClear),\n (\"&^=\", TokenKind::BitClearAssign),\n (\"&\", TokenKind::And),\n (\"&&\", TokenKind::AndAnd),\n (\"&=\", TokenKind::AndAssign),\n (\"&^\", TokenKind::BitClear),\n (\"&^=\", TokenKind::BitClearAssign),\n (\"+\", TokenKind::Plus),\n (\"++\", TokenKind::Increment),\n (\"+=\", TokenKind::PlusAssign),\n (\"-\", TokenKind::Minus),\n (\"--\", TokenKind::Decrement),\n (\"-=\", TokenKind::MinusAssign),\n (\":\", TokenKind::Colon),\n (\":=\", TokenKind::ColonAssign),\n (\"<\", TokenKind::LessThan),\n (\"<-\", TokenKind::Arrow),\n (\"<=\", TokenKind::LessThanOrEqual),\n (\"<<\", TokenKind::Lshift),\n (\"<<=\", TokenKind::LshiftAssign),\n (\">\", TokenKind::GreaterThan),\n (\">=\", TokenKind::GreaterThanOrEqual),\n (\">>\", TokenKind::Rshift),\n (\">>=\", TokenKind::RshiftAssign),\n (\"*\", TokenKind::Star),\n (\"*=\", TokenKind::StarAssign),\n (\"=\", TokenKind::Assign),\n (\"==\", TokenKind::Equals),\n (\"/\", TokenKind::Slash),\n (\"/=\", TokenKind::SlashAssign),\n ];\n\n for (src, kind) in pairs {\n assert_token(src, kind, None);\n }\n}\n\n#[test]\nfn tokenize_comments() {\n assert_tokens(\"// Hello, this is a comment\", &[]);\n assert_tokens(\"foo /* this is a general comment */ := 2\",\n &[(Ident, Some(\"foo\")), (ColonAssign, None), (Decimal, Some(\"2\"))]);\n}\n\n\n#[test]\nfn tokenize_ident() {\n let test_ident = |s| {\n assert_tokens(s, &[(TokenKind::Ident, Some(s))]);\n };\n\n // XXX: add quickcheck test?\n test_ident(\"foo\");\n}\n\n#[test]\nfn tokenize_keywords() {\n let pairs = [(\"break\", TokenKind::Break),\n (\"case\", TokenKind::Case),\n (\"chan\", TokenKind::Chan),\n (\"const\", TokenKind::Const),\n (\"continue\", TokenKind::Continue),\n (\"default\", TokenKind::Default),\n (\"defer\", TokenKind::Defer),\n (\"else\", TokenKind::Else),\n (\"fallthrough\", TokenKind::Fallthrough),\n (\"for\", TokenKind::For),\n (\"func\", TokenKind::Func),\n (\"go\", TokenKind::Go),\n (\"goto\", TokenKind::Goto),\n (\"if\", TokenKind::If),\n (\"import\", TokenKind::Import),\n (\"interface\", TokenKind::Interface),\n (\"map\", TokenKind::Map),\n (\"package\", TokenKind::Package),\n (\"range\", TokenKind::Range),\n (\"return\", TokenKind::Return),\n (\"select\", TokenKind::Select),\n (\"struct\", TokenKind::Struct),\n (\"switch\", TokenKind::Switch),\n (\"type\", TokenKind::Type),\n (\"var\", TokenKind::Var)];\n\n for &(s, k) in &pairs {\n assert_token(s, k, None);\n }\n}\n\n#[test]\nfn tokenize_mixed_whitespace() {\n assert_tokens(\" \\t\n\n \\t \",\n &[]);\n}\n\n#[test]\nfn tokenize_package_declaration() {\n assert_tokens(\"package main\",\n &[(TokenKind::Package, None), (TokenKind::Ident, Some(\"main\"))]);\n}\n\n#[test]\nfn tokenize_plain_interpreted_str() {\n assert_token(\"\\\"hello\\\"\", TokenKind::Str, Some(\"hello\"));\n}\n\n#[test]\nfn tokenize_simple_import() {\n assert_tokens(\"import \\\"fmt\\\"\",\n &[(TokenKind::Import, None), (TokenKind::Str, Some(\"fmt\"))]);\n}\n\n#[test]\nfn tokenize_simple_assignment() {\n assert_tokens(\"someVar := 23 + 45\",\n &[(TokenKind::Ident, Some(\"someVar\")),\n (TokenKind::ColonAssign, None),\n (TokenKind::Decimal, Some(\"23\")),\n (TokenKind::Plus, None),\n (TokenKind::Decimal, Some(\"45\"))]);\n}\n\n#[test]\nfn tokenize_hello() {\n let src = r#\"package main\n\nimport \"fmt\"\n\nfunc main() {\n\tfmt.Println(\"Hello, rgo\")\n}\n\"#;\n\n let expected = [(TokenKind::Package, None),\n (TokenKind::Ident, Some(\"main\")),\n (TokenKind::Semicolon, None),\n (TokenKind::Import, None),\n (TokenKind::Str, Some(\"fmt\")),\n (TokenKind::Semicolon, None),\n (TokenKind::Func, None),\n (TokenKind::Ident, Some(\"main\")),\n (TokenKind::LParen, None),\n (TokenKind::RParen, None),\n (TokenKind::LBrace, None),\n (TokenKind::Ident, Some(\"fmt\")),\n (TokenKind::Dot, None),\n (TokenKind::Ident, Some(\"Println\")),\n (TokenKind::LParen, None),\n (TokenKind::Str, Some(\"Hello, rgo\")),\n (TokenKind::RParen, None),\n (TokenKind::Semicolon, None),\n (TokenKind::RBrace, None),\n (TokenKind::Semicolon, None)];\n\n assert_tokens(src, &expected);\n}\n\n// =====\n// Comments\n// =====\n\n#[test]\nfn tokenize_simple_assignment_with_inline_comment() {\n assert_tokens(\"someVar /* someVar is a variable; and I'm a COMMENT! */ := 23 + 45\",\n &[(TokenKind::Ident, Some(\"someVar\")),\n (TokenKind::ColonAssign, None),\n (TokenKind::Decimal, Some(\"23\")),\n (TokenKind::Plus, None),\n (TokenKind::Decimal, Some(\"45\"))]);\n}\n\n#[test]\nfn tokenize_hello_with_comments() {\n let src = r#\"// This is a line comment.\n// And another!\n// All of these should be treated as a single contiguous whitespace block.\n\n// Even this one!\n\npackage main\n\nimport \"fmt\"\n\nfunc main() {\n\tfmt.Println(\"Hello, rgo\")\n}\n\"#;\n\n let expected = [(TokenKind::Package, None),\n (TokenKind::Ident, Some(\"main\")),\n (TokenKind::Semicolon, None),\n (TokenKind::Import, None),\n (TokenKind::Str, Some(\"fmt\")),\n (TokenKind::Semicolon, None),\n (TokenKind::Func, None),\n (TokenKind::Ident, Some(\"main\")),\n (TokenKind::LParen, None),\n (TokenKind::RParen, None),\n (TokenKind::LBrace, None),\n (TokenKind::Ident, Some(\"fmt\")),\n (TokenKind::Dot, None),\n (TokenKind::Ident, Some(\"Println\")),\n (TokenKind::LParen, None),\n (TokenKind::Str, Some(\"Hello, rgo\")),\n (TokenKind::RParen, None),\n (TokenKind::Semicolon, None),\n (TokenKind::RBrace, None),\n (TokenKind::Semicolon, None)];\n\n assert_tokens(src, &expected);\n}\n" }, { "path": "src/lib.rs", "content": "#![cfg_attr(feature=\"clippy\", feature(plugin))]\n#![cfg_attr(feature=\"clippy\", plugin(clippy))]\n\n#[macro_use]\nextern crate log;\n// XXX: do we still need this?\n#[macro_use]\nextern crate lazy_static;\n#[macro_use]\nextern crate quick_error;\n\nextern crate num;\n\nmod pos;\npub use self::pos::Position;\n\npub mod token;\npub mod ast;\npub mod lexer;\npub mod parser;\n\npub use parser::Parser;\n\npub fn parse(src: &str) -> ast::SourceFile {\n let lexer = lexer::Lexer::new(src).collect();\n parser::parse_tokens(lexer)\n}\n" }, { "path": "src/main.rs", "content": "extern crate convenience;\nextern crate rgo;\n#[macro_use]\nextern crate log;\nextern crate env_logger;\nextern crate time;\nuse convenience::read_file;\nuse std::env;\nuse time::PreciseTime;\n\nfn main() {\n env_logger::init().unwrap();\n // 0th arg is the program path.\n let src_file = env::args().nth(1).unwrap();\n info!(\"Source file: {}\", src_file);\n\n let s = read_file(&src_file).expect(\"failed to read file\");\n let start = PreciseTime::now();\n let tokens = rgo::lexer::tokenize(&s);\n println!(\"Lexing: {} µs\",\n start.to(PreciseTime::now()).num_microseconds().unwrap());\n\n let ast: rgo::ast::SourceFile = rgo::parser::parse_tokens(tokens);\n println!(\"AST:\\n{:?}\", ast);\n}\n" }, { "path": "src/parser/error.rs", "content": "use std::fmt;\nuse token::{Span, Token, TokenKind};\n\npub type PResult = ::std::result::Result;\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Error {\n pub span: Span,\n pub kind: ErrorKind,\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub enum ErrorKind {\n UnexpectedToken {\n found: Token,\n expected: Vec,\n },\n Other {\n msg: String,\n },\n}\n\nimpl ErrorKind {\n pub fn unexpected_token(expected: Vec, found: Token) -> ErrorKind {\n ErrorKind::UnexpectedToken {\n found: found,\n expected: expected,\n }\n }\n\n // XXX: potential code bloat due to monomorphisation, unless inlined. But we don't want to\n // inline cold functions... so it could be best to remove all generics here and\n // #[inline(never)].\n pub fn other>(msg: T) -> ErrorKind {\n ErrorKind::Other { msg: msg.into() }\n }\n}\n\nimpl fmt::Display for ErrorKind {\n fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {\n match *self {\n ErrorKind::UnexpectedToken { ref found, ref expected } => {\n try!(write!(f, \"expected \"));\n\n if expected.len() > 2 {\n try!(write!(f, \"one of \"));\n\n let mut sep = \" \";\n for tk in expected {\n try!(write!(f, \"\\\"{}\\\"{}\", tk, sep));\n sep = \", \";\n }\n } else {\n try!(write!(f, \"\\\"{}\\\" \", expected[0]));\n }\n\n write!(f, \"found \\\"{}\\\"\", found)\n }\n ErrorKind::Other { ref msg } => write!(f, \"{}\", msg),\n }\n }\n}\n" }, { "path": "src/parser/mod.rs", "content": "use std::iter::Peekable;\nuse num::bigint::BigInt;\nuse num::BigRational;\nuse token::*;\nuse ast;\n\n#[cfg(test)]\nmod test;\n\nmod error;\npub use self::error::{PResult, Error, ErrorKind};\n\nmacro_rules! span {\n ($s:expr, $x:expr) => {{\n let start_off = $s.span.start;\n let val = $x;\n let end_off = $s.prev_end_offset;\n\n Spanned::new(Span {start: start_off, end: end_off}, val)\n }}\n}\n\nmacro_rules! try_span {\n ($s:expr, $x:expr) => {\n span!($s, try!($x))\n }\n}\n\npub struct Parser> {\n /// Our source of tokens.\n /// Users can choose to read all the tokens up-front, or to read them lazily.\n reader: Peekable,\n /// The current token.\n token: Token,\n /// The span of the current token.\n span: Span,\n /// Byte offset of the end of the most recently consumed token.\n prev_end_offset: u32,\n /// (XXX) Seems to indicate the current level of nesting when parsing expressions.\n expression_level: u32,\n}\n\nimpl> Parser {\n pub fn new(mut it: R) -> Parser {\n // TODO: handle missing tok gracefully.\n let first_tok_and_pos = it.next().expect(\"missing first token\");\n debug!(\"first_tok_and_pos: {:?}\", first_tok_and_pos);\n Parser {\n token: first_tok_and_pos.token,\n span: first_tok_and_pos.span,\n prev_end_offset: first_tok_and_pos.span.end,\n reader: it.peekable(),\n // In the Go code, the initial value of `exprLev` implicitly defaults to 0.\n expression_level: 0,\n }\n }\n\n /// Parse the tokens into a SourceFile (AST).\n pub fn parse(mut self) -> PResult {\n let package_name = try!(self.parse_package_clause());\n let import_decls = try!(self.parse_import_decls());\n let top_level_decls = try!(self.parse_top_level_decls());\n\n Ok(ast::SourceFile {\n package: package_name,\n import_decls: import_decls,\n top_level_decls: top_level_decls,\n })\n }\n\n // === Utility functions ===\n\n /// Build a parse error.\n #[cold]\n #[inline(never)]\n fn err(&self, kind: ErrorKind) -> Error {\n Error {\n span: self.span,\n kind: kind,\n }\n }\n\n /// Advance the parser by one token.\n fn bump(&mut self) {\n trace!(\"current token: {:?}\", self.token);\n trace!(\"current span: {:?}\", self.span);\n trace!(\"bump\");\n let next = self.reader.next();\n\n self.prev_end_offset = self.span.end;\n\n if let Some(TokenAndSpan { span, token }) = next {\n self.token = token;\n self.span = span;\n } else {\n // XXX what span to set?\n self.token = Token {\n kind: TokenKind::Eof,\n value: None,\n };\n }\n }\n\n /// Advance the parser by one token and return the bumped token.\n fn bump_and_get(&mut self) -> Token {\n // XXX(perf): clone; cloning is needed to let bump() see the previous token.\n let old_token = self.token.clone();\n self.bump();\n old_token\n }\n\n /// Consume the next token, asserting its kind is equal to `expected`.\n fn eat(&mut self, expected: TokenKind) -> PResult<()> {\n if self.token.kind != expected {\n return Err(self.err(ErrorKind::unexpected_token(vec![expected], self.token.clone())));\n }\n self.bump();\n Ok(())\n }\n\n fn eat_and_get(&mut self, expected: TokenKind) -> PResult<(Token)> {\n if self.token.kind != expected {\n return Err(self.err(ErrorKind::unexpected_token(vec![expected], self.token.clone())));\n }\n Ok(self.bump_and_get())\n }\n\n // === parse_*() functions ===\n\n /// Parse a package clause (e.g. `package main`).\n fn parse_package_clause(&mut self) -> PResult {\n trace!(\"parse_package_clause\");\n\n try!(self.eat(TokenKind::Package));\n\n let package_name = try!(self.parse_ident());\n try!(self.eat(TokenKind::Semicolon));\n Ok(package_name)\n }\n\n /// Parse any number of import declarations.\n fn parse_import_decls(&mut self) -> PResult>> {\n trace!(\"parse_import_decls\");\n let mut decls = Vec::new();\n\n loop {\n match self.token.kind {\n TokenKind::Import => {\n decls.push(try_span!(self, self.parse_import_decl()));\n }\n _ => return Ok(decls),\n }\n }\n }\n\n /// Parse an import declaration, which is made up of one or more import specs.\n /// Simple example with a single spec: `import \"fmt\"`.\n fn parse_import_decl(&mut self) -> PResult {\n trace!(\"parse_import_decl\");\n // Grammar:\n //\n // ```\n // ImportDecl = \"import\" ( ImportSpec | \"(\" { ImportSpec \";\" } \")\" ) .\n // ```\n\n try!(self.eat(TokenKind::Import));\n let mut specs = Vec::new();\n\n match self.token.kind {\n // Long import declaration.\n TokenKind::LParen => {\n self.bump();\n\n // There may be multiple `ImportSpec`s in a single \"long\" import declaration.\n loop {\n match self.token.kind {\n // XXX: Should we _know_ that import specs always start with a string\n // literal? I'm not sure.\n TokenKind::RParen => {\n break;\n }\n _ => {\n specs.push(try_span!(self, self.parse_import_spec()));\n }\n }\n }\n }\n // Short import (single ImportSpec).\n _ => specs.push(try_span!(self, self.parse_import_spec())),\n }\n try!(self.eat(TokenKind::Semicolon));\n\n Ok(ast::ImportDecl { specs: specs })\n }\n\n /// Parse an \"import spec\".\n fn parse_import_spec(&mut self) -> PResult {\n trace!(\"parse_import_spec\");\n // Grammar:\n //\n // ```\n // ImportSpec = [ \".\" | PackageName ] ImportPath .\n // ```\n\n // Does this package spec define an alias?\n let kind = match self.token.kind {\n // Glob import.\n TokenKind::Dot => {\n self.bump();\n ast::ImportKind::Glob\n }\n TokenKind::Ident => ast::ImportKind::Alias(self.bump_and_get().value.unwrap()),\n _ => ast::ImportKind::Normal,\n };\n\n // The next token MUST be a string literal (interpreted or raw).\n let path = try_span!(self, self.parse_string_lit());\n\n Ok(ast::ImportSpec {\n path: path,\n kind: kind,\n })\n }\n\n /// Parse any number of top-level declarations (see TopLevelDecl docs).\n // Grammar:\n //\n // TopLevelDecl = Declaration | FunctionDecl | MethodDecl .\n fn parse_top_level_decls(&mut self) -> PResult> {\n trace!(\"parse_top_level_decls\");\n let mut decls = Vec::new();\n\n // FIXME: no loop + unfinished!\n\n match self.token.kind {\n // FunctionDecl\n TokenKind::Func => {\n let fd = try!(self.parse_func_decl());\n decls.push(ast::TopLevelDecl::Func(fd));\n }\n _ => {\n let e = ErrorKind::unexpected_token(vec![TokenKind::Func], self.token.clone());\n return Err(self.err(e));\n }\n }\n\n Ok(decls)\n }\n\n /// Parse a full function declaration (including signature, name, and block).\n fn parse_func_decl(&mut self) -> PResult {\n trace!(\"parse_func_decl\");\n // Grammar:\n // FunctionDecl = \"func\" FunctionName ( Function | Signature ) .\n // FunctionName = identifier .\n // Function = Signature FunctionBody .\n // FunctionBody = Block .\n\n try!(self.eat(TokenKind::Func));\n let name = try_span!(self, self.parse_ident());\n let signature = try!(self.parse_func_signature());\n\n let body = match self.token.kind {\n // This function has a body, parse it.\n TokenKind::LBrace => Some(try!(self.parse_block())),\n // No body.\n _ => None,\n };\n try!(self.eat(TokenKind::Semicolon));\n\n Ok(ast::FuncDecl {\n name: name,\n signature: signature,\n body: body,\n })\n }\n\n /// Parse a function _signature_ - i.e., just the parameter and result types of a func.\n fn parse_func_signature(&mut self) -> PResult {\n trace!(\"parse_func_signature\");\n // Grammar:\n //\n // Signature = Parameters [ Result ] .\n // Result = Parameters | Type .\n //\n // Example signature:\n //\n // (int, int, float64) (float64, *[]int)\n //\n // The parameters and the result of a function have a similar grammar,\n // however there's a small difference. The Go spec says:\n //\n // \"Parameter and result lists are always parenthesized except that if there is exactly one\n // unnamed result it may be written as an unparenthesized type.\"\n let parameters = try!(self.parse_func_params());\n\n let result = match self.token.kind {\n // An opening parenthesis! We can parse an output parameter list.\n TokenKind::LParen => try!(self.parse_func_params()),\n // Brace = no return type, but a body. We don't care about the body in this function.\n // Semicolon = no return type and no body.\n TokenKind::LBrace | TokenKind::Semicolon => ast::Parameters::empty(),\n // Otherwise, a single, unnamed return type.\n _ => ast::Parameters::from_single_type(try!(self.parse_type())),\n };\n\n Ok(ast::FuncSignature {\n parameters: parameters,\n result: result,\n })\n }\n\n /// Parse function parameters, as defined by the Go grammar.\n ///\n /// This may be used to parse the return types of a function if they are prefixed with a\n /// parenthesis, and follow the same grammar as input parameters.\n /// Parameters may be named or unnamed.\n fn parse_func_params(&mut self) -> PResult {\n trace!(\"parse_func_params\");\n // Grammar:\n //\n // Parameters = \"(\" [ ParameterList [ \",\" ] ] \")\" .\n // ParameterList = ParameterDecl { \",\" ParameterDecl } .\n // ParameterDecl = [ IdentifierList ] [ \"...\" ] Type .\n try!(self.eat(TokenKind::LParen));\n\n let mut decls = Vec::new();\n\n // The parameter list is optional.\n match self.token.kind {\n TokenKind::Ident | TokenKind::Ellipsis => {\n decls.push(try!(self.parse_parameter_decl()));\n\n while let TokenKind::Comma = self.token.kind {\n try!(self.eat(TokenKind::Comma));\n decls.push(try!(self.parse_parameter_decl()));\n }\n }\n _ => {}\n }\n try!(self.eat(TokenKind::RParen));\n\n // XXX: do we _need_ Parameters to be a type by itself?\n Ok(ast::Parameters { decls: decls })\n }\n\n /// Parse a \"parameter decl\".\n fn parse_parameter_decl(&mut self) -> PResult {\n trace!(\"parse_parameter_decl\");\n // Grammar:\n // ParameterDecl = [ IdentifierList ] [ \"...\" ] Type .\n\n let mut idents = Vec::new();\n let mut variadic = false;\n\n // The identifier list is optional.\n if let TokenKind::Ident = self.token.kind {\n // Grammar:\n // IdentifierList = identifier { \",\" identifier } .\n idents.push(try!(self.parse_ident()));\n\n while let TokenKind::Comma = self.token.kind {\n try!(self.eat(TokenKind::Comma));\n idents.push(try!(self.parse_ident()));\n }\n }\n\n // So is the ellipsis that indicates a variadic func.\n if let TokenKind::Ellipsis = self.token.kind {\n try!(self.eat(TokenKind::Ellipsis));\n variadic = true;\n }\n\n // The type is mandatory.\n let typ = try!(self.parse_type());\n\n Ok(ast::ParameterDecl {\n identifiers: idents,\n typ: typ,\n variadic: variadic,\n })\n }\n\n /// Parse a single type (e.g. `[]string`).\n // XXX: type declarations can be very complex; this function needs attention.\n fn parse_type(&mut self) -> PResult {\n trace!(\"parse_type\");\n // Grammar:\n //\n // Type = TypeName | TypeLit | \"(\" Type \")\" .\n // TypeName = identifier | QualifiedIdent .\n // TypeLit = ArrayType | StructType | PointerType | FunctionType | InterfaceType |\n // \t SliceType | MapType | ChannelType .\n\n // TypeName = a (potentially qualified with a module path) identifier\n // TypeLit = more complex type, this is where it gets interesting\n\n match self.token.kind {\n // A Type may be surrounded in parentheses, in which case we simply eat the\n // parentheses and recurse.\n TokenKind::LParen => {\n try!(self.eat(TokenKind::LParen));\n let typ = try!(self.parse_type());\n try!(self.eat(TokenKind::RParen));\n Ok(typ)\n }\n // If a Type starts with an identifier, it can only be a TypeName.\n TokenKind::Ident => {\n let id = try!(self.parse_maybe_qualified_ident());\n Ok(ast::Type::Plain(id))\n }\n _ => unimplemented!(),\n }\n }\n\n fn parse_maybe_qualified_ident(&mut self) -> PResult {\n let part1 = try!(self.parse_ident());\n\n let name;\n let package;\n match self.token.kind {\n // This is a qualified identifier.\n // XXX: should we move that to a new function?\n // Qualified idents can only appear in:\n // - types (that's what we're parsing)\n // - operands.\n TokenKind::Dot => {\n // XXX: I don't like this pattern.\n try!(self.eat(TokenKind::Dot));\n let part2 = try!(self.parse_ident());\n\n package = Some(part1);\n name = part2;\n }\n // Not qualified? Doesn't matter.\n _ => {\n name = part1;\n package = None;\n }\n }\n\n Ok(ast::MaybeQualifiedIdent {\n package: package,\n name: name,\n })\n }\n\n fn parse_block(&mut self) -> PResult {\n trace!(\"parse_block\");\n // Grammar:\n // Block = \"{\" StatementList \"}\" .\n // StatementList = { Statement \";\" } .\n try!(self.eat(TokenKind::LBrace));\n\n let mut statements = Vec::new();\n while self.token.kind.can_start_statement() {\n statements.push(try!(self.parse_statement()));\n try!(self.eat(TokenKind::Semicolon));\n }\n\n try!(self.eat(TokenKind::RBrace));\n Ok(ast::Block(statements))\n }\n\n // XXX: needs thorough review.\n fn parse_statement(&mut self) -> PResult {\n trace!(\"parse_statement\");\n // Statement =\n // \tDeclaration | LabeledStmt | SimpleStmt |\n // \tGoStmt | ReturnStmt | BreakStmt | ContinueStmt | GotoStmt |\n // \tFallthroughStmt | Block | IfStmt | SwitchStmt | SelectStmt | ForStmt |\n // \tDeferStmt .\n //\n // SimpleStmt = EmptyStmt | ExpressionStmt | SendStmt | IncDecStmt | Assignment |\n // ShortVarDecl .\n\n use token::TokenKind::*;\n Ok(match self.token.kind {\n Type | Var | Const => try!(self.parse_decl_stmt()).into(),\n Go => try!(self.parse_go_stmt()).into(),\n Defer => try!(self.parse_defer_stmt()).into(),\n Return => try!(self.parse_return_stmt()).into(),\n If => try!(self.parse_if_stmt()).into(),\n Switch => try!(self.parse_switch_stmt()).into(),\n Select => try!(self.parse_select_stmt()).into(),\n For => try!(self.parse_for_stmt()).into(),\n Break => try!(self.parse_break_stmt()).into(),\n Continue => try!(self.parse_continue_stmt()).into(),\n Goto => try!(self.parse_goto_stmt()).into(),\n Fallthrough => try!(self.parse_fallthrough_stmt()).into(),\n LBrace => try!(self.parse_block()).into(),\n RBrace => {\n // a semicolon may be omitted before a closing \"}\"\n ast::EmptyStmt.into()\n }\n // All simple statements start with something expression-like.\n t if t.can_start_expr() => try!(self.parse_simple_stmt()).into(),\n _ => panic!(\"unexpected token\"),\n })\n }\n\n fn parse_go_stmt(&mut self) -> PResult {\n trace!(\"parse_go_stmt\");\n\n try!(self.eat(TokenKind::Go));\n Ok(ast::GoStmt { call: try_span!(self, self.parse_expr()) })\n }\n\n fn parse_break_stmt(&mut self) -> PResult {\n trace!(\"parse_break_stmt\");\n\n try!(self.eat(TokenKind::Break));\n let label = if self.token.kind == TokenKind::Semicolon {\n None\n } else {\n Some(try_span!(self, self.parse_ident()))\n };\n\n Ok(ast::BreakStmt { label: label })\n }\n\n fn parse_continue_stmt(&mut self) -> PResult {\n trace!(\"parse_continue_stmt\");\n\n try!(self.eat(TokenKind::Continue));\n let label = if self.token.kind == TokenKind::Semicolon {\n None\n } else {\n Some(try_span!(self, self.parse_ident()))\n };\n\n Ok(ast::ContinueStmt { label: label })\n }\n\n fn parse_goto_stmt(&mut self) -> PResult {\n trace!(\"parse_goto_stmt\");\n\n try!(self.eat(TokenKind::Goto));\n Ok(ast::GotoStmt { label: try_span!(self, self.parse_ident()) })\n }\n\n fn parse_fallthrough_stmt(&mut self) -> PResult {\n trace!(\"parse_fallthrough_stmt\");\n\n try!(self.eat(TokenKind::Fallthrough));\n Ok(ast::FallthroughStmt)\n }\n\n fn parse_defer_stmt(&mut self) -> PResult {\n trace!(\"parse_defer_stmt\");\n\n try!(self.eat(TokenKind::Defer));\n Ok(ast::DeferStmt { call: try_span!(self, self.parse_expr()) })\n }\n\n fn parse_return_stmt(&mut self) -> PResult {\n trace!(\"parse_return_stmt\");\n try!(self.eat(TokenKind::Return));\n Ok(ast::ReturnStmt { expr: try_span!(self, self.parse_expr()) })\n }\n\n fn parse_if_stmt(&mut self) -> PResult {\n // IfStmt = \"if\" [ SimpleStmt \";\" ] Expression Block [ \"else\" ( IfStmt | Block ) ] .\n trace!(\"parse_if_stmt\");\n\n try!(self.eat(TokenKind::If));\n\n let stmt = try_span!(self, self.parse_simple_stmt());\n\n let before_stmt;\n let condition;\n\n if self.token.kind == TokenKind::Semicolon {\n // We have a complex if statment.\n self.bump();\n before_stmt = Some(stmt);\n\n condition = try_span!(self, self.parse_expr());\n } else {\n // We have a simple if statment.\n // What we just parsed must be an ExprStmt representing the condition.\n if let ast::SimpleStmt::Expr(expr) = stmt.item {\n condition = expr;\n } else {\n return Err(Error {\n span: stmt.span,\n kind: ErrorKind::other(\"invalid expression as if condition\"),\n });\n }\n before_stmt = None;\n }\n\n let block = try!(self.parse_block());\n\n let opt_else = if self.token.kind == TokenKind::Else {\n self.bump();\n\n Some(Box::new(match self.token.kind {\n TokenKind::LBrace => ast::Else::Block(try!(self.parse_block())),\n TokenKind::If => ast::Else::If(try!(self.parse_if_stmt())),\n _ => {\n let expected = vec![TokenKind::LBrace, TokenKind::If];\n return Err(self.err(ErrorKind::unexpected_token(expected, self.token.clone())));\n }\n }))\n } else {\n None\n };\n\n Ok(ast::IfStmt {\n before_stmt: before_stmt,\n condition: condition,\n block: block,\n opt_else: opt_else,\n })\n }\n\n fn parse_switch_stmt(&mut self) -> PResult {\n trace!(\"parse_switch_stmt\");\n unimplemented!()\n }\n\n fn parse_select_stmt(&mut self) -> PResult {\n trace!(\"parse_select_stmt\");\n unimplemented!()\n }\n\n fn parse_for_stmt(&mut self) -> PResult {\n // ForStmt = \"for\" [ Condition | ForClause | RangeClause ] Block .\n // Condition = Expression .\n //\n // ForClause = [ InitStmt ] \";\" [ Condition ] \";\" [ PostStmt ] .\n // InitStmt = SimpleStmt .\n // PostStmt = SimpleStmt .\n //\n // RangeClause = [ ExpressionList \"=\" | IdentifierList \":=\" ] \"range\" Expression .\n trace!(\"parse_for_stmt\");\n\n try!(self.eat(TokenKind::For));\n\n Ok(ast::ForStmt {\n header: try!(self.parse_for_header()),\n body: try!(self.parse_block()),\n })\n\n }\n\n fn parse_for_header(&mut self) -> PResult {\n trace!(\"parse_for_header\");\n unimplemented!()\n }\n\n fn expr_list_to_ident_list(&self,\n exprs: &Vec>)\n -> PResult>> {\n trace!(\"expr_list_to_ident_list\");\n // XXX: better errors\n\n let mut idents = Vec::new();\n\n use ast::{Expr, UnaryExpr, PrimaryExpr, Operand};\n\n for expr in exprs {\n if let Expr::Unary(UnaryExpr::Primary(x)) = expr.item.clone() {\n if let PrimaryExpr::Operand(Operand::MaybeQualifiedIdent(mqident)) = *x {\n if mqident.package.is_some() {\n return Err(Error {\n kind: ErrorKind::other(\"expected unqualified ident\"),\n span: expr.span,\n });\n }\n\n idents.push(Spanned::new(expr.span, mqident.name));\n continue;\n }\n }\n\n // didn't successfully turn the expr into an ident\n return Err(Error {\n kind: ErrorKind::other(\"expected ident\"),\n span: expr.span,\n });\n }\n\n Ok(idents)\n }\n\n fn parse_simple_stmt(&mut self) -> PResult {\n // SimpleStmt = EmptyStmt | ExpressionStmt | SendStmt | IncDecStmt | Assignment |\n // ShortVarDecl .\n //\n // EmptyStmt = .\n // ExpressionStmt = Expression .\n // SendStmt = Channel \"<-\" Expression .\n // Channel = Expression .\n // IncDecStmt = Expression ( \"++\" | \"--\" ) .\n // Assignment = ExpressionList assign_op ExpressionList .\n // assign_op = [ add_op | mul_op ] \"=\" .\n //\n // ShortVarDecl = IdentifierList \":=\" ExpressionList .\n trace!(\"parse_simple_stmt\");\n\n let exprs = try!(self.parse_expr_list());\n\n if self.token.kind.is_assign_op() {\n let op = ast::BinaryOperator::from_token_kind_assign_op(self.bump_and_get().kind);\n return Ok(ast::SimpleStmt::Assignment(ast::Assignment {\n lhs: exprs,\n rhs: try!(self.parse_expr_list()),\n op: op,\n }));\n }\n\n if self.token.kind == TokenKind::ColonAssign {\n let idents = try!(self.expr_list_to_ident_list(&exprs));\n return Ok(ast::SimpleStmt::ShortVarDecl(ast::ShortVarDecl {\n lhs: idents,\n rhs: try!(self.parse_expr_list()),\n }));\n }\n\n let expr;\n\n // Now we have no possible SimpleStmt types left that start with a list of exprs.\n if exprs.len() > 1 {\n return Err(self.err(\n ErrorKind::unexpected_token(vec![TokenKind::Assign], self.token.clone())\n ));\n } else if exprs.len() == 1 {\n // move exprs to prevent access later and avoid cloning\n expr = exprs.into_iter().next().unwrap();\n } else {\n panic!(\"BUG\");\n }\n\n match self.token.kind {\n TokenKind::Arrow => {\n self.bump();\n Ok(ast::SimpleStmt::Send(ast::SendStmt {\n channel: expr,\n expr: try_span!(self, self.parse_expr()),\n }))\n }\n TokenKind::Increment => {\n self.bump();\n Ok(ast::SimpleStmt::IncDec(ast::IncDecStmt {\n expr: expr,\n is_dec: false,\n }))\n }\n TokenKind::Decrement => {\n self.bump();\n Ok(ast::SimpleStmt::IncDec(ast::IncDecStmt {\n expr: expr,\n is_dec: true,\n }))\n }\n TokenKind::Semicolon => Ok(ast::SimpleStmt::Expr(expr)),\n _ => {\n let expected = vec![TokenKind::Arrow,\n TokenKind::Increment,\n TokenKind::Decrement,\n TokenKind::Assign];\n Err(self.err(ErrorKind::unexpected_token(expected, self.token.clone())))\n }\n }\n }\n\n fn parse_decl_stmt(&mut self) -> PResult {\n trace!(\"parse_decl_stmt\");\n unimplemented!()\n }\n\n // XXX: error msg\n fn parse_expr(&mut self) -> PResult {\n trace!(\"parse_expr\");\n\n self.parse_potential_binary_expr(0)\n }\n\n fn parse_expr_list(&mut self) -> PResult>> {\n // ExpressionList = Expression { \",\" Expression } .\n trace!(\"parse_expr_list\");\n\n let mut res = Vec::new();\n\n res.push(try_span!(self, self.parse_expr()));\n\n while self.token.kind == TokenKind::Comma {\n self.bump();\n res.push(try_span!(self, self.parse_expr()));\n }\n\n Ok(res)\n }\n\n /// Parse a unary *expression*, which can be a primary expression OR a unary *operation*.\n // XXX: too much repetition, could probably be shortened\n fn parse_unary_expr(&mut self) -> PResult {\n // UnaryExpr = PrimaryExpr | unary_op UnaryExpr .\n trace!(\"parse_unary_expr\");\n\n match self.token.kind {\n // kind: unary operator\n TokenKind::Plus | TokenKind::Minus | TokenKind::Not | TokenKind::Caret |\n TokenKind::And => {\n let op = ast::UnaryOperator::from_token_kind(self.token.kind).expect(\"BUG\");\n self.bump();\n let x = try_span!(self, self.parse_unary_expr());\n Ok(ast::UnaryExpr::UnaryOperation(ast::UnaryOperation {\n operator: op,\n operand: Box::new(x),\n }))\n }\n // channel receive operation\n TokenKind::Arrow => {\n self.bump();\n let x = try_span!(self, self.parse_unary_expr());\n Ok(ast::UnaryExpr::UnaryOperation(ast::UnaryOperation {\n operator: ast::UnaryOperator::ChanReceive,\n operand: Box::new(x),\n }))\n }\n\n // deref expression - star op\n TokenKind::Star => {\n self.bump();\n let x = try_span!(self, self.parse_unary_expr());\n Ok(ast::UnaryExpr::UnaryOperation(ast::UnaryOperation {\n operator: ast::UnaryOperator::Deref,\n operand: Box::new(x),\n }))\n }\n // No operator, this can only be a primary expression.\n _ => {\n let x = try!(self.parse_primary_expr());\n Ok(ast::UnaryExpr::Primary(Box::new(x)))\n }\n }\n }\n\n\n fn parse_selector(&mut self, x: ast::PrimaryExpr) -> PResult {\n // ~ \"assert x is an expr or a type... and not a \"raw type\" such as\n // [...]T\".\n // I have _no_ idea what the author meant by that.\n\n let selector = try!(self.parse_ident());\n\n // Here's how things look at this point:\n //\n // value.fieldOrMethod\n // ^ ^\n // | |\n // | |\n // `x` `selector`\n //\n // We had already parsed the value (`x`), encountered a dot, and\n // immediately knew we had to look for an identifier - a plain\n // identifier, which cannot be qualified. This identifier is\n // `selector`.\n\n Ok(ast::SelectorExpr {\n operand: Box::new(x),\n selector: selector,\n })\n }\n\n fn parse_type_assertion(&mut self, x: ast::PrimaryExpr) -> PResult {\n // So now `x` _has_ to be an expression, and not a _type_. According to\n // the original Go source. Don't ask me!\n\n // x.(T)\n // ^\n // |\n // |\n // left paren\n try!(self.eat(TokenKind::LParen));\n\n // XXX: left off spanning for now.\n\n let typ;\n\n // There's a catch. Type switches. Look at this code:\n //\n // someVal.(type)\n //\n // This is the _literal_ `type` keyword. Not a placeholder. A keyword.\n // It indicates a special kind of switch that compares to types instead\n // of values.\n if self.token.kind == TokenKind::Type {\n typ = None;\n self.bump();\n } else {\n typ = Some(try!(self.parse_type()));\n }\n\n try!(self.eat(TokenKind::RParen));\n\n\n Ok(ast::TypeAssertion {\n expr: Box::new(x),\n typ: typ,\n })\n }\n\n // XXX: straight, unidiomatic port from Go source.\n // Well... almost. I tried to clean up a bit.\n // This method (and the corresponding smaller methods) is really complicated. It needs careful\n // review, and a lot of testing.\n fn parse_primary_expr(&mut self) -> PResult {\n trace!(\"parse_primary_expr\");\n\n // Parse the first part of the expression, which may be a literal, a (potentially\n // qualified) identifier, a method expression (= `SomeType.MethodName` - returns a\n // function), or any expression if it is parenthesized.\n //\n // Operand = Literal | OperandName | MethodExpr | \"(\" Expression \")\" .\n //\n let mut x = ast::PrimaryExpr::Operand(try!(self.parse_operand()));\n\n 'L: loop {\n match self.token.kind {\n TokenKind::Dot => {\n self.bump();\n\n match self.token.kind {\n TokenKind::Ident => {\n // XXX: Selector ~= MethodExpr?...\n x = ast::PrimaryExpr::SelectorExpr(try!(self.parse_selector(x)));\n }\n TokenKind::LParen => {\n x = ast::PrimaryExpr::TypeAssertion(try!(self.parse_type_assertion(x)));\n }\n _ => {\n // XXX: the Go parser signals the error and keeps going, here.\n // XXX: needs better diagnostic to explain we were looking for a\n // selector or a type assertion.\n let expected = vec![TokenKind::Ident, TokenKind::LParen];\n return Err(self.err(\n ErrorKind::unexpected_token(expected, self.token.clone())\n ));\n }\n }\n }\n TokenKind::LBracket => {\n // ~\"x must be an expression, not a type\"\n x = try!(self.parse_index_or_slice(x));\n }\n TokenKind::LParen => {\n // ~\"x must be an expression or a type, but NOT a 'raw type'\"...?\n\n // `x(x)` could be `T(x)` (conversion) or `f(x)` (function call).\n x = try!(self.parse_call_or_conversion(x));\n }\n TokenKind::LBrace => unimplemented!(),\n _ => break 'L,\n }\n }\n\n Ok(x)\n }\n\n // XXX XXX XXX: Straight, untested, stupid port from the Go source.\n fn parse_operand(&mut self) -> PResult {\n trace!(\"parse_operand\");\n\n let ret = match self.token.kind {\n TokenKind::Ident => {\n let id = try!(self.parse_maybe_qualified_ident());\n ast::Operand::MaybeQualifiedIdent(id)\n }\n token_kind if token_kind.can_start_basic_lit() => {\n let lit = try!(self.parse_basic_lit());\n ast::Operand::Lit(ast::Literal::Basic(lit))\n }\n TokenKind::LParen => {\n // \"(\" Expr \")\"\n //\n // Skip past the LParen.\n self.bump();\n self.expression_level += 1;\n let expr = try!(self.parse_expr());\n self.expression_level -= 1;\n try!(self.eat(TokenKind::RParen));\n ast::Operand::Expr(expr)\n }\n TokenKind::Func => {\n let fl = try!(self.parse_func_lit());\n ast::Operand::Lit(ast::Literal::Func(fl))\n }\n _ => {\n let method_expr = try!(self.parse_method_expr());\n ast::Operand::MethodExpr(method_expr)\n }\n };\n\n Ok(ret)\n }\n\n fn parse_method_expr(&mut self) -> PResult {\n unimplemented!()\n }\n\n fn parse_func_lit(&mut self) -> PResult {\n Ok(ast::FuncLit {\n signature: try!(self.parse_func_signature()),\n body: try!(self.parse_block()),\n })\n }\n\n fn parse_index_or_slice(&mut self, x: ast::PrimaryExpr) -> PResult {\n unimplemented!()\n }\n\n fn parse_call_or_conversion(&mut self, x: ast::PrimaryExpr) -> PResult {\n unimplemented!()\n }\n\n fn parse_basic_lit(&mut self) -> PResult {\n // BasicLit = int_lit | float_lit | imaginary_lit | rune_lit | string_lit .\n trace!(\"parse_basic_lit\");\n\n use token::TokenKind::*;\n\n match self.token.kind {\n Decimal | Octal | Hex => Ok(ast::BasicLit::Int(try!(self.parse_int_lit()))),\n Str | StrRaw => Ok(ast::BasicLit::Str(try!(self.parse_string_lit()))),\n Float => {\n let value = self.bump_and_get()\n .value\n .expect(\"BUG: missing value in float literal\");\n Ok(ast::BasicLit::Float(try!(self.interpret_float_lit(&value[..],\n \"float literal\"))))\n }\n Imaginary => {\n let value = self.bump_and_get()\n .value\n .expect(\"BUG: missing value in imaginary literal\");\n assert!(value.chars().last().unwrap() == 'i',\n \"BUG: imaginary literal token does not end with i\");\n let value_ref = value.trim_right_matches('i');\n Ok(ast::BasicLit::Imaginary(try!(self.interpret_float_lit(value_ref,\n \"imaginary literal\"))))\n }\n Rune => Ok(ast::BasicLit::Rune(try!(self.parse_rune_lit()))),\n _ => {\n let expected = vec![Decimal, Octal, Hex, Float, Imaginary, Rune, Str, StrRaw];\n return Err(self.err(ErrorKind::unexpected_token(expected, self.token.clone())));\n }\n }\n }\n\n fn parse_rune_lit(&mut self) -> PResult {\n // rune_lit = \"'\" ( unicode_value | byte_value ) \"'\" .\n trace!(\"parse_rune_lit\");\n\n let value = try!(self.eat_and_get(TokenKind::Rune))\n .value\n .expect(\"BUG: missing value in rune literal\");\n\n let mut char_indices = value.char_indices().peekable();\n let result;\n\n let (_, c) = char_indices.next().unwrap();\n if c == '\\\\' {\n let &(_, pc) = char_indices.peek().expect(\"BUG: rune lit containing only \\\\\");\n\n // First check to see if we have a simple escape.\n if let Some(escape_byte) = self.get_simple_escape(pc) {\n char_indices.next();\n result = escape_byte as char;\n } else if pc == '\\'' {\n char_indices.next();\n // \\' is only valid in runes\n result = '\\'';\n } else if pc == 'x' {\n char_indices.next();\n result = try!(self.interpret_hex_escape(&mut char_indices)) as char;\n } else if pc == 'u' || pc == 'U' {\n char_indices.next();\n result = try!(self.interpret_unicode_escape(pc == 'U', &mut char_indices));\n } else if pc.is_digit(8) {\n result = try!(self.interpret_octal_escape(&mut char_indices)) as char;\n } else {\n let msg = format!(\"unknown escape sequence: {}\", pc);\n return Err(self.err(ErrorKind::other(msg)));\n }\n } else if c == '\\n' {\n return Err(self.err(ErrorKind::other(\"newline in rune literal\")));\n } else {\n result = c;\n }\n\n if char_indices.next().is_none() {\n Ok(result)\n } else {\n Err(self.err(ErrorKind::other(\"multiple characters in rune literal\")))\n }\n }\n\n /// Interpret the value of a float/imaginary literal and return the result as a BigRational.\n /// If this method is being used to parse an imaginary lit, don't include the trailing `i`.\n fn interpret_float_lit(&mut self, value: &str, token_name: &str) -> PResult {\n // float_lit = decimals \".\" [ decimals ] [ exponent ] |\n // decimals exponent |\n // \".\" decimals [ exponent ] .\n // decimals = decimal_digit { decimal_digit } .\n // exponent = ( \"e\" | \"E\" ) [ \"+\" | \"-\" ] decimals .\n trace!(\"interpret_float_lit\");\n\n let mut res = BigRational::from_integer(BigInt::from(0u8));\n let mut chars = value.chars().peekable();\n let mut parse_exponent = false;\n let mut digits_after_dot = 0u32; // the number of digits after the dot we are\n\n while let Some(c) = chars.next() {\n if c == '.' {\n digits_after_dot = 1;\n } else if c == 'e' || c == 'E' {\n parse_exponent = true;\n break;\n } else {\n let digit = c.to_digit(10).expect(\"BUG: invalid char in float/imag lit\");\n let digit_value = BigRational::from_integer(BigInt::from(digit));\n\n if digits_after_dot == 0 {\n res = res * BigRational::from_integer(BigInt::from(10u8));\n res = res + BigRational::from_integer(BigInt::from(digit));\n } else {\n res = res +\n digit_value /\n BigRational::from_integer(BigInt::from(10u32.pow(digits_after_dot)));\n\n digits_after_dot += 1;\n }\n }\n }\n\n if parse_exponent {\n let mut negative = false;\n if let Some(&c) = chars.peek() {\n if c == '+' {\n chars.next();\n } else if c == '-' {\n negative = true;\n chars.next();\n }\n } else {\n // Empty exponent\n return Err(self.err(ErrorKind::other(format!(\"malformed {} exponent\",\n token_name))));\n }\n\n let mut exponent = 0;\n while let Some(c) = chars.next() {\n exponent *= 10;\n exponent += c.to_digit(10).expect(\"BUG: invalid char in float/imag lit exponent\");\n }\n\n for _ in 0..exponent {\n if negative {\n res = res / BigRational::from_integer(BigInt::from(10u8));\n } else {\n res = res * BigRational::from_integer(BigInt::from(10u8));\n }\n }\n }\n\n Ok(res)\n }\n\n fn parse_int_lit(&mut self) -> PResult {\n // int_lit = decimal_lit | octal_lit | hex_lit .\n // decimal_lit = ( \"1\" … \"9\" ) { decimal_digit } .\n // octal_lit = \"0\" { octal_digit } .\n // hex_lit = \"0\" ( \"x\" | \"X\" ) hex_digit { hex_digit } .\n\n trace!(\"parse_int_lit\");\n\n match self.token.kind {\n TokenKind::Decimal => {\n let value = self.bump_and_get().value.expect(\"BUG: missing value in decimal lit\");\n Ok(try!(self.interpret_int(&value[..], 10, \"decimal literal\")))\n }\n TokenKind::Octal => {\n let value = self.bump_and_get().value.expect(\"BUG: missing value in octal lit\");\n assert_eq!(value.chars().next(), Some('0'));\n Ok(try!(self.interpret_int(&value[1..], 8, \"octal literal\")))\n }\n TokenKind::Hex => {\n let value = self.bump_and_get().value.expect(\"BUG: missing value in hex lit\");\n assert!(value.starts_with(\"0x\") || value.starts_with(\"0X\"));\n Ok(try!(self.interpret_int(&value[2..], 16, \"hex literal\")))\n }\n _ => {\n return Err(self.err(ErrorKind::unexpected_token(vec![TokenKind::Decimal,\n TokenKind::Octal,\n TokenKind::Hex],\n self.token.clone())));\n }\n }\n }\n\n /// Interpret the value of an int literal and return the result as a BigInt, using the provided\n /// base.\n ///\n /// Use `token_name` to specify what type of literal this is, for error messages. To\n /// parse an octal or hex literal, do not pass the `0` or `0x` prefixes.\n fn interpret_int(&mut self, lit: &str, base: u32, token_name: &str) -> PResult {\n trace!(\"interpret_int\");\n\n let mut res = BigInt::from(0u8);\n\n for c in lit.chars() {\n if let Some(d) = c.to_digit(base) {\n res = res * BigInt::from(base);\n res = res + BigInt::from(d);\n } else {\n let msg = format!(\"invalid character in {}: {}\", token_name, c);\n return Err(self.err(ErrorKind::other(msg)));\n }\n }\n\n Ok(res)\n }\n\n // This is pretty much a straight port from the official Go source.\n fn parse_potential_binary_expr(&mut self, prec1: i32) -> PResult {\n // Grammar:\n // Expression binary_op Expression\n trace!(\"parse_potential_binary_expr\");\n\n let a = try_span!(self, self.parse_unary_expr());\n let mut x = Spanned::new(a.span, ast::Expr::Unary(a.item));\n\n loop {\n let bin_op_kind = match ast::BinaryOperator::from_token_kind(self.token.kind) {\n Some(x) => x,\n // The current token is not a binary operator.\n None => return Ok(x.item),\n };\n\n let precedence = bin_op_kind.precedence();\n if precedence < prec1 {\n return Ok(x.item);\n }\n\n self.bump();\n\n let y = try_span!(self, self.parse_potential_binary_expr(precedence + 1));\n let binop_span = Span {\n start: x.span.start,\n end: y.span.end,\n };\n x = Spanned::new(binop_span,\n ast::Expr::Binary(ast::BinaryExpr {\n lhs: Box::new(x),\n op: bin_op_kind,\n rhs: Box::new(y),\n }));\n }\n }\n\n /// Parse an identifier.\n // XXX: come back later. String interning and all that.\n fn parse_ident(&mut self) -> PResult {\n trace!(\"parse_ident\");\n match self.token.kind {\n TokenKind::Ident => {\n Ok(self.bump_and_get()\n .value\n .clone()\n .expect(\"BUG: missing value in identifier token\"))\n }\n _ => {\n Err(self.err(ErrorKind::unexpected_token(vec![TokenKind::Ident],\n self.token.clone())))\n }\n }\n }\n\n /// Parse a string literal, whether interpreted or raw.\n /// This is useful because one will often expect a string literal without caring about its\n /// kind.\n fn parse_string_lit(&mut self) -> PResult> {\n trace!(\"parse_string_lit\");\n // Grammar:\n //\n // ```\n // string_lit = raw_string_lit | interpreted_string_lit .\n // raw_string_lit = \"`\" { unicode_char | newline } \"`\" .\n // interpreted_string_lit = `\"` { unicode_value | byte_value } `\"` .\n // ```\n\n match self.token.kind {\n TokenKind::Str => {\n // Interpret the string.\n let raw_val = self.bump_and_get().value.expect(\"BUG: missing Str value\");\n Ok(try!(self.interpret_string_lit(raw_val)))\n }\n TokenKind::StrRaw => {\n // Only interpreting that needs to be done is removing carriage returns.\n let raw_val = self.bump_and_get().value.expect(\"BUG: missing StrRaw value\");\n let mut byte_vec = raw_val.into_bytes();\n byte_vec.retain(|&c| c != b'\\r');\n Ok(byte_vec)\n }\n _ => {\n Err(self.err(ErrorKind::unexpected_token(vec![TokenKind::Str, TokenKind::StrRaw],\n self.token.clone())))\n }\n }\n }\n\n fn interpret_unicode_escape(&self,\n long: bool,\n chars: &mut Iterator)\n -> PResult {\n let num_digits = if long {\n 8\n } else {\n 4\n };\n\n let mut value = 0u32;\n\n for _ in 0..num_digits {\n if let Some((_, c)) = chars.next() {\n if let Some(number) = c.to_digit(16) {\n value *= 16;\n value += number;\n } else {\n let msg = format!(\"illegal character in unicode escape: '{}'\", c);\n return Err(self.err(ErrorKind::other(msg)));\n }\n } else {\n let msg = \"unexpected end of string in unicode escape\";\n return Err(self.err(ErrorKind::other(msg)));\n }\n }\n\n return if let Some(value_char) = ::std::char::from_u32(value) {\n Ok(value_char)\n } else {\n let msg = format!(\"escape sequence is invalid unicode codepoint: {:#x}\", value);\n Err(self.err(ErrorKind::other(msg)))\n };\n }\n\n fn interpret_octal_escape(&self, chars: &mut Iterator) -> PResult {\n let mut value = 0u16;\n\n for _ in 0..3 {\n if let Some((_, c)) = chars.next() {\n if let Some(number) = c.to_digit(8) {\n value *= 8;\n value += number as u16;\n } else {\n let msg = format!(\"illegal character in octal escape: '{}'\", c);\n return Err(self.err(ErrorKind::other(msg)));\n }\n } else {\n let msg = \"unexpected end of string in octal escape\";\n return Err(self.err(ErrorKind::other(msg)));\n }\n }\n\n return if value > 255 {\n let msg = format!(\"illegal octal escape value > 255: {}\", value);\n Err(self.err(ErrorKind::other(msg)))\n } else {\n Ok(value as u8)\n };\n }\n\n fn interpret_hex_escape(&self, chars: &mut Iterator) -> PResult {\n let mut value = 0u8;\n\n for _ in 0..2 {\n if let Some((_, c)) = chars.next() {\n if let Some(number) = c.to_digit(16) {\n value *= 16;\n value += number as u8;\n } else {\n let msg = format!(\"illegal character in hex escape: '{}'\", c);\n return Err(self.err(ErrorKind::other(msg)));\n }\n } else {\n let msg = \"unexpected end of string in hex escape\";\n return Err(self.err(ErrorKind::other(msg)));\n }\n }\n\n Ok(value)\n }\n\n fn get_simple_escape(&self, c: char) -> Option {\n // The escapes are roughly sorted by most common first.\n // XXX: actually find out exact ordering\n // XXX(perf): .find() on a static array _will_ be slower than a match.\n let simple_escapes = [('\\\\', b'\\\\'),\n ('n', b'\\n'),\n ('t', b'\\t'),\n ('v', b'\\x0b'),\n ('r', b'\\r'),\n ('b', b'\\x08'),\n ('f', b'\\x0c'),\n ('a', b'\\x07')];\n\n return if let Some(escape) = simple_escapes.iter().find(|escape| escape.0 == c) {\n Some(escape.1)\n } else {\n None\n };\n }\n\n /// Interpret a string literal, converting escape patterns to bytes.\n /// Note that it returns a Vec rather than a String. This is because Go string literals\n /// are allowed to contain invalid ASCII/UTF-8 through the use of octal and hex escapes.\n fn interpret_string_lit(&mut self, lit: String) -> PResult> {\n let mut result = Vec::new();\n\n let mut char_indices = lit.char_indices().peekable();\n\n while let Some((offset, c)) = char_indices.next() {\n if c == '\\\\' {\n // A string literal with a value ending with \\ shouldn't get past the lexer.\n let &(_, pc) = char_indices.peek()\n .expect(\"unexpected end of string: this is a bug!\");\n\n // First check to see if we have a simple escape.\n if let Some(escape_byte) = self.get_simple_escape(pc) {\n char_indices.next();\n result.push(escape_byte);\n } else if pc == '\"' {\n char_indices.next();\n // \\\" is only valid in strings\n result.push(b'\"');\n } else if pc == 'x' {\n char_indices.next();\n let byte = try!(self.interpret_hex_escape(&mut char_indices));\n result.push(byte);\n } else if pc == 'u' || pc == 'U' {\n char_indices.next();\n let value_char = try!(self.interpret_unicode_escape(pc == 'U',\n &mut char_indices));\n\n let mut tmp = String::with_capacity(4);\n tmp.push(value_char);\n result.extend_from_slice(tmp.as_bytes());\n } else if pc.is_digit(8) {\n let byte = try!(self.interpret_octal_escape(&mut char_indices));\n result.push(byte);\n } else {\n let msg = format!(\"unknown escape sequence: {}\", pc);\n return Err(self.err(ErrorKind::other(msg)));\n }\n } else if c == '\\n' {\n let msg = format!(\"newline in string\");\n return Err(self.err(ErrorKind::other(msg)));\n } else {\n let orig_str = &lit[offset..offset + c.len_utf8()];\n result.extend_from_slice(orig_str.as_bytes());\n }\n }\n\n Ok(result)\n }\n}\n\npub fn parse_tokens(tokens: Vec) -> ast::SourceFile {\n let parser = Parser::new(tokens.into_iter());\n // XXX: unwrapping\n parser.parse().unwrap()\n}\n" }, { "path": "src/parser/test.rs", "content": "use super::*;\nuse std::str::FromStr;\nuse lexer;\nuse ast;\nuse num::bigint::BigInt;\nuse num::BigRational;\n\n// String literals\n\nfn assert_interpret_string_eq(lit: &str, expect: Vec) {\n let tokens = lexer::tokenize(format!(\"\\\"{}\\\"\", lit).as_ref());\n\n assert_eq!(tokens.len(), 1);\n\n let mut p = Parser::new(tokens.into_iter());\n\n let got = p.interpret_string_lit(lit.to_owned()).unwrap();\n\n assert_eq!(expect, got);\n}\n\nfn assert_interpret_string_valid(lit: &str) {\n let tokens = lexer::tokenize(format!(\"\\\"{}\\\"\", lit).as_ref());\n\n assert_eq!(tokens.len(), 1);\n\n let mut p = Parser::new(tokens.into_iter());\n\n p.interpret_string_lit(lit.to_owned()).unwrap();\n}\n\n#[test]\nfn test_interpret_strings() {\n let string_tests = [(\"hello\", \"hello\"),\n (\"newline \\\\n\", \"newline \\n\"),\n (\"\\\\\\\"\", \"\\\"\"),\n (\"日本語\", \"日本語\"),\n (\"\\\\u65e5本\\\\U00008a9e\", \"日本語\"),\n (\"\\\\u65e5\\\\u672c\\\\u8a9e\", \"日本語\"),\n (\"\\\\U000065e5\\\\U0000672c\\\\U00008a9e\", \"日本語\"),\n (\"\\\\xe6\\\\x97\\\\xa5\\\\xe6\\\\x9c\\\\xac\\\\xe8\\\\xaa\\\\x9e\", \"日本語\"),\n (\"\\\\150\", \"h\")];\n\n for t in &string_tests {\n assert_interpret_string_eq(t.0, t.1.into());\n }\n\n assert_interpret_string_eq(\"\\\\xff\\\\u00FF\", vec![255, 195, 191]);\n}\n\n#[test]\n#[should_panic]\nfn test_interpret_string_illegal_surrogate_half() {\n assert_interpret_string_valid(\"\\\\uD800\");\n}\n\n#[test]\n#[should_panic]\nfn test_interpret_string_invalid_codepoint() {\n assert_interpret_string_valid(\"\\\\U00110000\");\n}\n\n// Rune literals\n\nfn assert_interpret_rune_eq(lit: &str, expect: char) {\n let tokens = lexer::tokenize(format!(\"'{}'\", lit).as_ref());\n\n assert_eq!(tokens.len(), 1);\n\n let mut p = Parser::new(tokens.into_iter());\n\n let got = p.parse_rune_lit().unwrap();\n\n assert_eq!(expect, got);\n}\n\nfn assert_interpret_rune_valid(lit: &str) {\n let tokens = lexer::tokenize(format!(\"'{}'\", lit).as_ref());\n\n assert_eq!(tokens.len(), 1);\n\n let mut p = Parser::new(tokens.into_iter());\n\n p.parse_rune_lit().unwrap();\n}\n\n#[test]\nfn test_interpret_runes() {\n let rune_tests = [(\"a\", 'a'),\n (\"ä\", 'ä'),\n (\"本\", '本'),\n (\"\\\\t\", '\\t'),\n (\"\\\\000\", '\\0'),\n (\"\\\\007\", '\\x07'),\n (\"\\\\377\", '\\u{00ff}'),\n (\"\\\\x07\", '\\x07'),\n (\"\\\\xff\", '\\u{00ff}'),\n (\"\\\\u12e4\", '\\u{12e4}'),\n (\"\\\\U00101234\", '\\u{101234}'),\n (\"\\\\'\", '\\'')];\n\n for &(lit, expect) in &rune_tests {\n assert_interpret_rune_eq(lit, expect);\n }\n}\n\n#[test]\n#[should_panic]\nfn test_interpret_rune_too_many_characters() {\n assert_interpret_rune_valid(\"aa\");\n}\n\n#[test]\n#[should_panic]\nfn test_interpret_rune_too_few_hex_digits() {\n assert_interpret_rune_valid(\"\\\\xa\");\n}\n\n#[test]\n#[should_panic]\nfn test_interpret_rune_too_few_octal_digits() {\n assert_interpret_rune_valid(\"\\\\0\");\n}\n\n#[test]\n#[should_panic]\nfn test_interpret_rune_surrogate_half() {\n assert_interpret_rune_valid(\"\\\\uDFFF\");\n}\n\n#[test]\n#[should_panic]\nfn test_interpret_rune_invalid_codepoint() {\n assert_interpret_rune_valid(\"\\\\u00110000\");\n}\n\n// Int literals\n\nfn assert_interpret_int_eq(lit: &str, expect: BigInt) {\n let tokens = lexer::tokenize(lit);\n\n assert_eq!(tokens.len(), 1);\n\n let mut p = Parser::new(tokens.into_iter());\n\n let got = p.parse_int_lit().unwrap();\n\n assert_eq!(expect, got);\n}\n\n#[test]\nfn test_interpret_ints() {\n assert_interpret_int_eq(\"42\", BigInt::from(42));\n assert_interpret_int_eq(\"0600\", BigInt::from(0o600));\n assert_interpret_int_eq(\"0xBadFace\", BigInt::from(0xbadface));\n assert_interpret_int_eq(\"170141183460469231731687303715884105727\",\n BigInt::from_str(\"170141183460469231731687303715884105727\").unwrap());\n}\n\n// Float/imaginary literals\n\nfn assert_interpret_float_eq(lit: &str, expect: BigRational) {\n let tokens = lexer::tokenize(format!(\"{}\", lit).as_ref());\n\n assert_eq!(tokens.len(), 1);\n\n let mut p = Parser::new(tokens.into_iter());\n\n let got = p.parse_basic_lit().unwrap();\n\n if let ast::BasicLit::Float(val) = got {\n assert_eq!(expect, val);\n } else {\n panic!(format!(\"expected float basic lit, found {:?}\", got));\n }\n}\n\nfn assert_interpret_imaginary_eq(lit: &str, expect: BigRational) {\n let tokens = lexer::tokenize(lit);\n\n assert_eq!(tokens.len(), 1);\n\n let mut p = Parser::new(tokens.into_iter());\n\n let got = p.parse_basic_lit().unwrap();\n\n if let ast::BasicLit::Imaginary(val) = got {\n assert_eq!(expect, val);\n } else {\n panic!(format!(\"expected imaginary basic lit, found {:?}\", got));\n }\n}\n\nfn bigrat_from_int(value: u64) -> BigRational {\n BigRational::from_integer(BigInt::from(value))\n}\n\nfn bigrat_from_ints(numerator: u64, denominator: u64) -> BigRational {\n BigRational::from_integer(BigInt::from(numerator)) /\n BigRational::from_integer(BigInt::from(denominator))\n}\n\n#[test]\nfn test_interpret_floats() {\n let float_tests = [(\"13e0\", bigrat_from_int(13)),\n (\"13e4\", bigrat_from_int(130000)),\n (\"13E4\", bigrat_from_int(130000)),\n (\"13e+4\", bigrat_from_int(130000)),\n (\"130000e-4\", bigrat_from_int(13)),\n (\"1.5\", bigrat_from_ints(3, 2)),\n\n (\"0.\", bigrat_from_int(0)),\n (\"72.40\", bigrat_from_ints(724, 10)),\n (\"072.40\", bigrat_from_ints(724, 10)),\n (\"2.71828\", bigrat_from_ints(271828, 100000)),\n (\"1.e+0\", bigrat_from_int(1)),\n (\"6.67428e-11\", bigrat_from_ints(667428, 10000000000000000)),\n (\"1E6\", bigrat_from_int(1000000)),\n (\".25\", bigrat_from_ints(25, 100)),\n (\".12345E+5\", bigrat_from_int(12345))];\n\n for t in &float_tests {\n assert_interpret_float_eq(t.0, t.1.clone());\n }\n}\n\n#[test]\nfn test_interpret_imaginaries() {\n let float_tests = [(\"0i\", bigrat_from_int(0)),\n (\"011i\", bigrat_from_int(11)),\n (\"0.i\", bigrat_from_int(0)),\n (\"2.71828i\", bigrat_from_ints(271828, 100000)),\n (\"1.e+0i\", bigrat_from_int(1)),\n (\"6.67428e-11i\", bigrat_from_ints(667428, 10000000000000000)),\n (\"1E6i\", bigrat_from_int(1000000)),\n (\".25i\", bigrat_from_ints(25, 100)),\n (\".12345E+5i\", bigrat_from_int(12345))];\n\n for t in &float_tests {\n assert_interpret_imaginary_eq(t.0, t.1.clone());\n }\n}\n" }, { "path": "src/pos.rs", "content": "#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Position {\n /// 1-indexed row.\n pub row: usize,\n /// 1-indexed column.\n pub column: usize,\n}\n\nimpl Position {\n pub fn start() -> Position {\n Position {\n row: 1,\n column: 1,\n }\n }\n}\n" }, { "path": "src/token.rs", "content": "use std::fmt;\nuse self::TokenKind::*;\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct TokenAndSpan {\n pub token: Token,\n pub span: Span,\n}\n\n#[derive(Debug, Clone, Copy, PartialEq, Eq)]\npub struct Span {\n pub start: u32,\n pub end: u32,\n}\n\npub trait Spanner {\n fn span(&self) -> Span;\n}\n\nimpl Spanner for Span {\n fn span(&self) -> Span {\n *self\n }\n}\n\n/// Returns a new span from the start of the first element to the end of the last element.\n/// This is useful in cases like the following:\n/// ```\n/// var a, b, c, d, e, f, g int\n/// ```\n/// We have `Vec>` for all the variable names, so we can get a span of the whole list.\n///\n/// If the vector is empty, this returns a default `Span`.\nimpl Spanner for Vec {\n fn span(&self) -> Span {\n if self.is_empty() {\n // XXX\n return Span { start: 0, end: 0 };\n }\n\n Span {\n start: self.first().unwrap().span().start,\n end: self.last().unwrap().span().end,\n }\n }\n}\n\n/// Simply get the span embedded in this `Spanned`.\nimpl Spanner for Spanned {\n fn span(&self) -> Span {\n self.span\n }\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Spanned {\n pub span: Span,\n pub item: T,\n}\n\nimpl Spanned {\n pub fn new(span: Span, item: T) -> Spanned {\n Spanned {\n span: span,\n item: item,\n }\n }\n}\n\n#[derive(Debug, Clone, PartialEq, Eq)]\npub struct Token {\n pub kind: TokenKind,\n pub value: Option,\n}\n\nimpl fmt::Display for Token {\n fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {\n // If the token contains a value, display it.\n match self.value {\n Some(ref v) => write!(f, \"{}({})\", self, v),\n None => write!(f, \"{}\", self),\n }\n }\n}\n\n#[derive(Debug, Clone, Copy, PartialEq, Eq)]\npub enum TokenKind {\n /// Identifier.\n Ident,\n\n // Delimiters.\n /// (\n LParen,\n /// )\n RParen,\n /// [\n LBracket,\n /// ]\n RBracket,\n /// {\n LBrace,\n /// }\n RBrace,\n\n // Literals.\n /// Decimal integer literal.\n Decimal,\n /// Octal integer literal.\n Octal,\n /// Hex integer literal.\n Hex,\n /// Floating-point literal.\n Float,\n /// Imaginary literal (e.g. `6.67428e-11i`).\n Imaginary,\n /// Rune literal (e.g. `'本'`, `'\\U00101234'`).\n Rune,\n /// Interpreted string literal.\n Str,\n /// Raw string literal.\n StrRaw,\n\n // Keywords.\n Break,\n Case,\n Chan,\n Const,\n Continue,\n Default,\n Defer,\n Else,\n Fallthrough,\n For,\n Func,\n Go,\n Goto,\n If,\n Import,\n Interface,\n Map,\n Package,\n Range,\n Return,\n Select,\n Struct,\n Switch,\n Type,\n Var,\n\n // Operators.\n /// +\n Plus,\n /// -\n Minus,\n /// *\n Star,\n /// /\n Slash,\n /// %\n Percent,\n /// &\n And,\n /// |\n Or,\n /// ^\n Caret,\n /// <<\n Lshift,\n /// >>\n Rshift,\n /// &^\n BitClear,\n /// &&\n AndAnd,\n /// ||\n OrOr,\n /// ==\n Equals,\n /// !=\n NotEqual,\n /// <\n LessThan,\n /// >\n GreaterThan,\n /// <=\n LessThanOrEqual,\n /// >=\n GreaterThanOrEqual,\n /// ++\n Increment,\n /// --\n Decrement,\n /// +=\n PlusAssign,\n /// -=\n MinusAssign,\n /// *=\n StarAssign,\n /// /=\n SlashAssign,\n /// %=\n PercentAssign,\n /// &=\n AndAssign,\n /// |=\n OrAssign,\n /// ^=\n CaretAssign,\n /// <<=\n LshiftAssign,\n /// >>=\n RshiftAssign,\n /// &^=\n BitClearAssign,\n /// !\n Not,\n /// =\n Assign,\n /// :=\n ColonAssign,\n /// <-\n Arrow,\n\n // Misc.\n /// ...\n Ellipsis,\n /// ,\n Comma,\n /// .\n Dot,\n /// ;\n Semicolon,\n /// :\n Colon,\n /// End of file\n Eof,\n}\n\n\nimpl fmt::Display for TokenKind {\n fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {\n // We're using the derived Debug impl for simplicity.\n // It displays the name of each variant as written in the enum declaration.\n fmt::Debug::fmt(self, f)\n }\n}\n\nimpl TokenKind {\n pub fn precedence(self) -> i32 {\n // Precedence Operator\n // 5 * / % << >> & &^\n // 4 + - | ^\n // 3 == != < <= > >=\n // 2 &&\n // 1 ||\n match self {\n Star | Slash | Percent | Lshift | Rshift | And | BitClear => 5,\n Plus | Minus | Or | Caret => 4,\n Equals | NotEqual | LessThan | LessThanOrEqual | GreaterThan | GreaterThanOrEqual => 3,\n AndAnd => 2,\n OrOr => 1,\n _ => panic!(\"BUG: calling .precedence() on a token which is not a binary operator\"),\n }\n }\n\n pub fn is_ident(self) -> bool {\n self == Ident\n }\n\n pub fn is_unary_op(self) -> bool {\n // unary_op = \"+\" | \"-\" | \"!\" | \"^\" | \"*\" | \"&\" | \"<-\" .\n match self {\n Plus | Minus | Not | Caret | Star | And | Arrow => true,\n _ => false,\n }\n }\n\n pub fn is_assign_op(self) -> bool {\n // assign_op = [ add_op | mul_op ] \"=\" .\n // add_op = \"+\" | \"-\" | \"|\" | \"^\" .\n // mul_op = \"*\" | \"/\" | \"%\" | \"<<\" | \">>\" | \"&\" | \"&^\" .\n match self {\n Assign | PlusAssign | MinusAssign | OrAssign | CaretAssign | StarAssign |\n SlashAssign | PercentAssign | LshiftAssign | RshiftAssign | AndAssign |\n BitClearAssign => true,\n _ => false,\n }\n }\n\n pub fn is_literal(self) -> bool {\n match self {\n Str | StrRaw | Decimal | Octal | Hex | Float | Imaginary | Rune => true,\n _ => false,\n }\n }\n\n pub fn can_start_statement(self) -> bool {\n // Grammar:\n // Statement =\n // Declaration | LabeledStmt | SimpleStmt |\n // GoStmt | ReturnStmt | BreakStmt | ContinueStmt | GotoStmt |\n // FallthroughStmt | Block | IfStmt | SwitchStmt | SelectStmt | ForStmt |\n // DeferStmt .\n //\n // SimpleStmt = EmptyStmt | ExpressionStmt | SendStmt | IncDecStmt | Assignment |\n // ShortVarDecl .\n\n if self.can_start_decl() || self.can_start_labeled_stmt() ||\n self.can_start_simple_stmt() || self.can_start_go_stmt() ||\n self.can_start_block() {\n return true;\n }\n\n match self {\n Return | Break | Continue | Goto | Fallthrough | If |\n // XXX/TODO: make sure that this is correct.\n Switch | Select | For | Defer => true,\n _ => false,\n }\n }\n\n pub fn can_start_block(self) -> bool {\n self == LBrace\n }\n\n pub fn can_start_return_stmt(self) -> bool {\n self == Return\n }\n\n pub fn can_start_labeled_stmt(self) -> bool {\n // LabeledStmt = Label \":\" Statement .\n // Label = identifier .\n self.is_ident()\n }\n\n pub fn can_start_go_stmt(self) -> bool {\n self == Go\n }\n\n pub fn can_start_decl(self) -> bool {\n trace!(\"can_start_decl\");\n // Declaration = ConstDecl | TypeDecl | VarDecl .\n self == Const || self == Type || self == Var\n }\n\n pub fn can_start_simple_stmt(self) -> bool {\n self == Semicolon || self.can_start_expr() || self.can_start_send_stmt() ||\n self.can_start_inc_dec_stmt() || self.can_start_assignment() ||\n self.can_start_short_var_decl()\n }\n\n pub fn can_start_expr(self) -> bool {\n // Expression = UnaryExpr | Expression binary_op Expression .\n // UnaryExpr = PrimaryExpr | unary_op UnaryExpr .\n //\n // binary_op = \"||\" | \"&&\" | rel_op | add_op | mul_op .\n // rel_op = \"==\" | \"!=\" | \"<\" | \"<=\" | \">\" | \">=\" .\n // add_op = \"+\" | \"-\" | \"|\" | \"^\" .\n // mul_op = \"*\" | \"/\" | \"%\" | \"<<\" | \">>\" | \"&\" | \"&^\" .\n //\n // unary_op = \"+\" | \"-\" | \"!\" | \"^\" | \"*\" | \"&\" | \"<-\" .\n //\n //\n // PrimaryExpr =\n // \tOperand |\n // \tConversion |\n // \tPrimaryExpr Selector |\n // \tPrimaryExpr Index |\n // \tPrimaryExpr Slice |\n // \tPrimaryExpr TypeAssertion |\n // \tPrimaryExpr Arguments .\n //\n // Selector = \".\" identifier .\n // Index = \"[\" Expression \"]\" .\n // Slice = \"[\" ( [ Expression ] \":\" [ Expression ] ) |\n // ( [ Expression ] \":\" Expression \":\" Expression )\n // \"]\" .\n // TypeAssertion = \".\" \"(\" Type \")\" .\n // Arguments = \"(\" [ ( ExpressionList | Type [ \",\" ExpressionList ] ) [ \"...\" ] [ \",\"\n // ] ] \")\" .\n //\n // Conversion = Type \"(\" Expression [ \",\" ] \")\" .\n //\n // MethodExpr = ReceiverType \".\" MethodName .\n // ReceiverType = TypeName | \"(\" \"*\" TypeName \")\" | \"(\" ReceiverType \")\" .\n\n // XXX/TODO: review this code - critical.\n self.can_start_unary_expr()\n }\n\n pub fn can_start_unary_expr(self) -> bool {\n self.can_start_primary_expr() || self.is_unary_op()\n }\n\n pub fn can_start_primary_expr(self) -> bool {\n self.can_start_operand() || self.can_start_conversion()\n }\n\n pub fn can_start_operand(self) -> bool {\n // Operand = Literal | OperandName | MethodExpr | \"(\" Expression \")\" .\n // OperandName = identifier | QualifiedIdent.\n // MethodExpr = ReceiverType \".\" MethodName .\n // ReceiverType = TypeName | \"(\" \"*\" TypeName \")\" | \"(\" ReceiverType \")\" .\n //\n // QualifiedIdent starts with an identifier.\n // So does MethodExpr.\n self.can_start_lit() || self.is_ident() || self == LParen\n }\n\n pub fn can_start_conversion(self) -> bool {\n self.can_start_type()\n }\n\n pub fn can_start_type(self) -> bool {\n // Type = TypeName | TypeLit | \"(\" Type \")\" .\n // TypeName = identifier | QualifiedIdent .\n // TypeLit = ArrayType | StructType | PointerType | FunctionType | InterfaceType |\n // SliceType | MapType | ChannelType .\n self.is_ident() || self.can_start_type_lit() || self == LParen\n }\n\n pub fn can_start_type_lit(self) -> bool {\n // TypeLit = ArrayType | StructType | PointerType | FunctionType | InterfaceType |\n // SliceType | MapType | ChannelType .\n self.can_start_array_type() || self.can_start_struct_type() ||\n self.can_start_pointer_type() || self.can_start_func_type() ||\n self.can_start_interface_type() || self.can_start_slice_type() ||\n self.can_start_map_type() || self.can_start_chan_type()\n }\n\n pub fn can_start_pointer_type(self) -> bool {\n self == Star\n }\n\n pub fn can_start_func_type(self) -> bool {\n // FunctionType = \"func\" Signature .\n self == Func\n }\n\n pub fn can_start_interface_type(self) -> bool {\n // InterfaceType = \"interface\" \"{\" { MethodSpec \";\" } \"}\" .\n self == Interface\n }\n\n pub fn can_start_chan_type(self) -> bool {\n // ChannelType = ( \"chan\" | \"chan\" \"<-\" | \"<-\" \"chan\" ) ElementType .\n self == Chan || self == Arrow\n }\n\n pub fn can_start_lit(self) -> bool {\n // Literal = BasicLit | CompositeLit | FunctionLit .\n // BasicLit = int_lit | float_lit | imaginary_lit | rune_lit | string_lit .\n self.can_start_basic_lit() || self.can_start_composite_lit() || self.can_start_func_lit()\n }\n\n pub fn can_start_basic_lit(self) -> bool {\n self.is_literal()\n }\n\n pub fn can_start_composite_lit(self) -> bool {\n // CompositeLit = LiteralType LiteralValue .\n self.can_start_lit_type()\n }\n\n pub fn can_start_lit_type(self) -> bool {\n // LiteralType = StructType | ArrayType | \"[\" \"...\" \"]\" ElementType |\n // SliceType | MapType | TypeName .\n self.can_start_struct_type() || self.can_start_array_type() || self == RBracket ||\n self.can_start_slice_type() || self.can_start_map_type() || self.is_ident()\n }\n\n pub fn can_start_func_lit(self) -> bool {\n // FunctionLit = \"func\" Function .\n self == Func\n }\n\n pub fn can_start_struct_type(self) -> bool {\n self == Struct\n }\n\n pub fn can_start_array_type(self) -> bool {\n self == RBracket\n }\n\n pub fn can_start_slice_type(self) -> bool {\n self == RBracket\n }\n\n pub fn can_start_map_type(self) -> bool {\n self == Map\n }\n\n pub fn can_start_send_stmt(self) -> bool {\n // SendStmt = Channel \"<-\" Expression .\n // Channel = Expression .\n self.can_start_expr()\n }\n\n pub fn can_start_inc_dec_stmt(self) -> bool {\n // IncDecStmt = Expression ( \"++\" | \"--\" ) .\n self.can_start_expr()\n }\n\n pub fn can_start_assignment(self) -> bool {\n // Assignment = ExpressionList assign_op ExpressionList .\n // ExpressionList = Expression { \",\" Expression } .\n self.can_start_expr()\n }\n\n pub fn can_start_short_var_decl(self) -> bool {\n // ShortVarDecl = IdentifierList \":=\" ExpressionList .\n // IdentifierList = identifier { \",\" identifier } .\n self.is_ident()\n }\n}\n" }, { "path": "tests/data/pass/arithConst_ssa.go", "content": "package main\n\nimport \"fmt\"\n\n//go:noinline\nfunc add_uint64_0_ssa(a uint64) uint64 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_uint64_ssa(a uint64) uint64 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_uint64_1_ssa(a uint64) uint64 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_uint64_ssa(a uint64) uint64 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_uint64_4294967296_ssa(a uint64) uint64 {\n\treturn a + 4294967296\n}\n\n//go:noinline\nfunc add_4294967296_uint64_ssa(a uint64) uint64 {\n\treturn 4294967296 + a\n}\n\n//go:noinline\nfunc add_uint64_18446744073709551615_ssa(a uint64) uint64 {\n\treturn a + 18446744073709551615\n}\n\n//go:noinline\nfunc add_18446744073709551615_uint64_ssa(a uint64) uint64 {\n\treturn 18446744073709551615 + a\n}\n\n//go:noinline\nfunc sub_uint64_0_ssa(a uint64) uint64 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_uint64_ssa(a uint64) uint64 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_uint64_1_ssa(a uint64) uint64 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_uint64_ssa(a uint64) uint64 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_uint64_4294967296_ssa(a uint64) uint64 {\n\treturn a - 4294967296\n}\n\n//go:noinline\nfunc sub_4294967296_uint64_ssa(a uint64) uint64 {\n\treturn 4294967296 - a\n}\n\n//go:noinline\nfunc sub_uint64_18446744073709551615_ssa(a uint64) uint64 {\n\treturn a - 18446744073709551615\n}\n\n//go:noinline\nfunc sub_18446744073709551615_uint64_ssa(a uint64) uint64 {\n\treturn 18446744073709551615 - a\n}\n\n//go:noinline\nfunc div_0_uint64_ssa(a uint64) uint64 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_uint64_1_ssa(a uint64) uint64 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_uint64_ssa(a uint64) uint64 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_uint64_4294967296_ssa(a uint64) uint64 {\n\treturn a / 4294967296\n}\n\n//go:noinline\nfunc div_4294967296_uint64_ssa(a uint64) uint64 {\n\treturn 4294967296 / a\n}\n\n//go:noinline\nfunc div_uint64_18446744073709551615_ssa(a uint64) uint64 {\n\treturn a / 18446744073709551615\n}\n\n//go:noinline\nfunc div_18446744073709551615_uint64_ssa(a uint64) uint64 {\n\treturn 18446744073709551615 / a\n}\n\n//go:noinline\nfunc mul_uint64_0_ssa(a uint64) uint64 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_uint64_ssa(a uint64) uint64 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_uint64_1_ssa(a uint64) uint64 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_uint64_ssa(a uint64) uint64 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_uint64_4294967296_ssa(a uint64) uint64 {\n\treturn a * 4294967296\n}\n\n//go:noinline\nfunc mul_4294967296_uint64_ssa(a uint64) uint64 {\n\treturn 4294967296 * a\n}\n\n//go:noinline\nfunc mul_uint64_18446744073709551615_ssa(a uint64) uint64 {\n\treturn a * 18446744073709551615\n}\n\n//go:noinline\nfunc mul_18446744073709551615_uint64_ssa(a uint64) uint64 {\n\treturn 18446744073709551615 * a\n}\n\n//go:noinline\nfunc lsh_uint64_0_ssa(a uint64) uint64 {\n\treturn a << 0\n}\n\n//go:noinline\nfunc lsh_0_uint64_ssa(a uint64) uint64 {\n\treturn 0 << a\n}\n\n//go:noinline\nfunc lsh_uint64_1_ssa(a uint64) uint64 {\n\treturn a << 1\n}\n\n//go:noinline\nfunc lsh_1_uint64_ssa(a uint64) uint64 {\n\treturn 1 << a\n}\n\n//go:noinline\nfunc lsh_uint64_4294967296_ssa(a uint64) uint64 {\n\treturn a << 4294967296\n}\n\n//go:noinline\nfunc lsh_4294967296_uint64_ssa(a uint64) uint64 {\n\treturn 4294967296 << a\n}\n\n//go:noinline\nfunc lsh_uint64_18446744073709551615_ssa(a uint64) uint64 {\n\treturn a << 18446744073709551615\n}\n\n//go:noinline\nfunc lsh_18446744073709551615_uint64_ssa(a uint64) uint64 {\n\treturn 18446744073709551615 << a\n}\n\n//go:noinline\nfunc rsh_uint64_0_ssa(a uint64) uint64 {\n\treturn a >> 0\n}\n\n//go:noinline\nfunc rsh_0_uint64_ssa(a uint64) uint64 {\n\treturn 0 >> a\n}\n\n//go:noinline\nfunc rsh_uint64_1_ssa(a uint64) uint64 {\n\treturn a >> 1\n}\n\n//go:noinline\nfunc rsh_1_uint64_ssa(a uint64) uint64 {\n\treturn 1 >> a\n}\n\n//go:noinline\nfunc rsh_uint64_4294967296_ssa(a uint64) uint64 {\n\treturn a >> 4294967296\n}\n\n//go:noinline\nfunc rsh_4294967296_uint64_ssa(a uint64) uint64 {\n\treturn 4294967296 >> a\n}\n\n//go:noinline\nfunc rsh_uint64_18446744073709551615_ssa(a uint64) uint64 {\n\treturn a >> 18446744073709551615\n}\n\n//go:noinline\nfunc rsh_18446744073709551615_uint64_ssa(a uint64) uint64 {\n\treturn 18446744073709551615 >> a\n}\n\n//go:noinline\nfunc mod_0_uint64_ssa(a uint64) uint64 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_uint64_1_ssa(a uint64) uint64 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_uint64_ssa(a uint64) uint64 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_uint64_4294967296_ssa(a uint64) uint64 {\n\treturn a % 4294967296\n}\n\n//go:noinline\nfunc mod_4294967296_uint64_ssa(a uint64) uint64 {\n\treturn 4294967296 % a\n}\n\n//go:noinline\nfunc mod_uint64_18446744073709551615_ssa(a uint64) uint64 {\n\treturn a % 18446744073709551615\n}\n\n//go:noinline\nfunc mod_18446744073709551615_uint64_ssa(a uint64) uint64 {\n\treturn 18446744073709551615 % a\n}\n\n//go:noinline\nfunc add_int64_Neg9223372036854775808_ssa(a int64) int64 {\n\treturn a + -9223372036854775808\n}\n\n//go:noinline\nfunc add_Neg9223372036854775808_int64_ssa(a int64) int64 {\n\treturn -9223372036854775808 + a\n}\n\n//go:noinline\nfunc add_int64_Neg9223372036854775807_ssa(a int64) int64 {\n\treturn a + -9223372036854775807\n}\n\n//go:noinline\nfunc add_Neg9223372036854775807_int64_ssa(a int64) int64 {\n\treturn -9223372036854775807 + a\n}\n\n//go:noinline\nfunc add_int64_Neg4294967296_ssa(a int64) int64 {\n\treturn a + -4294967296\n}\n\n//go:noinline\nfunc add_Neg4294967296_int64_ssa(a int64) int64 {\n\treturn -4294967296 + a\n}\n\n//go:noinline\nfunc add_int64_Neg1_ssa(a int64) int64 {\n\treturn a + -1\n}\n\n//go:noinline\nfunc add_Neg1_int64_ssa(a int64) int64 {\n\treturn -1 + a\n}\n\n//go:noinline\nfunc add_int64_0_ssa(a int64) int64 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_int64_ssa(a int64) int64 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_int64_1_ssa(a int64) int64 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_int64_ssa(a int64) int64 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_int64_4294967296_ssa(a int64) int64 {\n\treturn a + 4294967296\n}\n\n//go:noinline\nfunc add_4294967296_int64_ssa(a int64) int64 {\n\treturn 4294967296 + a\n}\n\n//go:noinline\nfunc add_int64_9223372036854775806_ssa(a int64) int64 {\n\treturn a + 9223372036854775806\n}\n\n//go:noinline\nfunc add_9223372036854775806_int64_ssa(a int64) int64 {\n\treturn 9223372036854775806 + a\n}\n\n//go:noinline\nfunc add_int64_9223372036854775807_ssa(a int64) int64 {\n\treturn a + 9223372036854775807\n}\n\n//go:noinline\nfunc add_9223372036854775807_int64_ssa(a int64) int64 {\n\treturn 9223372036854775807 + a\n}\n\n//go:noinline\nfunc sub_int64_Neg9223372036854775808_ssa(a int64) int64 {\n\treturn a - -9223372036854775808\n}\n\n//go:noinline\nfunc sub_Neg9223372036854775808_int64_ssa(a int64) int64 {\n\treturn -9223372036854775808 - a\n}\n\n//go:noinline\nfunc sub_int64_Neg9223372036854775807_ssa(a int64) int64 {\n\treturn a - -9223372036854775807\n}\n\n//go:noinline\nfunc sub_Neg9223372036854775807_int64_ssa(a int64) int64 {\n\treturn -9223372036854775807 - a\n}\n\n//go:noinline\nfunc sub_int64_Neg4294967296_ssa(a int64) int64 {\n\treturn a - -4294967296\n}\n\n//go:noinline\nfunc sub_Neg4294967296_int64_ssa(a int64) int64 {\n\treturn -4294967296 - a\n}\n\n//go:noinline\nfunc sub_int64_Neg1_ssa(a int64) int64 {\n\treturn a - -1\n}\n\n//go:noinline\nfunc sub_Neg1_int64_ssa(a int64) int64 {\n\treturn -1 - a\n}\n\n//go:noinline\nfunc sub_int64_0_ssa(a int64) int64 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_int64_ssa(a int64) int64 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_int64_1_ssa(a int64) int64 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_int64_ssa(a int64) int64 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_int64_4294967296_ssa(a int64) int64 {\n\treturn a - 4294967296\n}\n\n//go:noinline\nfunc sub_4294967296_int64_ssa(a int64) int64 {\n\treturn 4294967296 - a\n}\n\n//go:noinline\nfunc sub_int64_9223372036854775806_ssa(a int64) int64 {\n\treturn a - 9223372036854775806\n}\n\n//go:noinline\nfunc sub_9223372036854775806_int64_ssa(a int64) int64 {\n\treturn 9223372036854775806 - a\n}\n\n//go:noinline\nfunc sub_int64_9223372036854775807_ssa(a int64) int64 {\n\treturn a - 9223372036854775807\n}\n\n//go:noinline\nfunc sub_9223372036854775807_int64_ssa(a int64) int64 {\n\treturn 9223372036854775807 - a\n}\n\n//go:noinline\nfunc div_int64_Neg9223372036854775808_ssa(a int64) int64 {\n\treturn a / -9223372036854775808\n}\n\n//go:noinline\nfunc div_Neg9223372036854775808_int64_ssa(a int64) int64 {\n\treturn -9223372036854775808 / a\n}\n\n//go:noinline\nfunc div_int64_Neg9223372036854775807_ssa(a int64) int64 {\n\treturn a / -9223372036854775807\n}\n\n//go:noinline\nfunc div_Neg9223372036854775807_int64_ssa(a int64) int64 {\n\treturn -9223372036854775807 / a\n}\n\n//go:noinline\nfunc div_int64_Neg4294967296_ssa(a int64) int64 {\n\treturn a / -4294967296\n}\n\n//go:noinline\nfunc div_Neg4294967296_int64_ssa(a int64) int64 {\n\treturn -4294967296 / a\n}\n\n//go:noinline\nfunc div_int64_Neg1_ssa(a int64) int64 {\n\treturn a / -1\n}\n\n//go:noinline\nfunc div_Neg1_int64_ssa(a int64) int64 {\n\treturn -1 / a\n}\n\n//go:noinline\nfunc div_0_int64_ssa(a int64) int64 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_int64_1_ssa(a int64) int64 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_int64_ssa(a int64) int64 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_int64_4294967296_ssa(a int64) int64 {\n\treturn a / 4294967296\n}\n\n//go:noinline\nfunc div_4294967296_int64_ssa(a int64) int64 {\n\treturn 4294967296 / a\n}\n\n//go:noinline\nfunc div_int64_9223372036854775806_ssa(a int64) int64 {\n\treturn a / 9223372036854775806\n}\n\n//go:noinline\nfunc div_9223372036854775806_int64_ssa(a int64) int64 {\n\treturn 9223372036854775806 / a\n}\n\n//go:noinline\nfunc div_int64_9223372036854775807_ssa(a int64) int64 {\n\treturn a / 9223372036854775807\n}\n\n//go:noinline\nfunc div_9223372036854775807_int64_ssa(a int64) int64 {\n\treturn 9223372036854775807 / a\n}\n\n//go:noinline\nfunc mul_int64_Neg9223372036854775808_ssa(a int64) int64 {\n\treturn a * -9223372036854775808\n}\n\n//go:noinline\nfunc mul_Neg9223372036854775808_int64_ssa(a int64) int64 {\n\treturn -9223372036854775808 * a\n}\n\n//go:noinline\nfunc mul_int64_Neg9223372036854775807_ssa(a int64) int64 {\n\treturn a * -9223372036854775807\n}\n\n//go:noinline\nfunc mul_Neg9223372036854775807_int64_ssa(a int64) int64 {\n\treturn -9223372036854775807 * a\n}\n\n//go:noinline\nfunc mul_int64_Neg4294967296_ssa(a int64) int64 {\n\treturn a * -4294967296\n}\n\n//go:noinline\nfunc mul_Neg4294967296_int64_ssa(a int64) int64 {\n\treturn -4294967296 * a\n}\n\n//go:noinline\nfunc mul_int64_Neg1_ssa(a int64) int64 {\n\treturn a * -1\n}\n\n//go:noinline\nfunc mul_Neg1_int64_ssa(a int64) int64 {\n\treturn -1 * a\n}\n\n//go:noinline\nfunc mul_int64_0_ssa(a int64) int64 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_int64_ssa(a int64) int64 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_int64_1_ssa(a int64) int64 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_int64_ssa(a int64) int64 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_int64_4294967296_ssa(a int64) int64 {\n\treturn a * 4294967296\n}\n\n//go:noinline\nfunc mul_4294967296_int64_ssa(a int64) int64 {\n\treturn 4294967296 * a\n}\n\n//go:noinline\nfunc mul_int64_9223372036854775806_ssa(a int64) int64 {\n\treturn a * 9223372036854775806\n}\n\n//go:noinline\nfunc mul_9223372036854775806_int64_ssa(a int64) int64 {\n\treturn 9223372036854775806 * a\n}\n\n//go:noinline\nfunc mul_int64_9223372036854775807_ssa(a int64) int64 {\n\treturn a * 9223372036854775807\n}\n\n//go:noinline\nfunc mul_9223372036854775807_int64_ssa(a int64) int64 {\n\treturn 9223372036854775807 * a\n}\n\n//go:noinline\nfunc mod_int64_Neg9223372036854775808_ssa(a int64) int64 {\n\treturn a % -9223372036854775808\n}\n\n//go:noinline\nfunc mod_Neg9223372036854775808_int64_ssa(a int64) int64 {\n\treturn -9223372036854775808 % a\n}\n\n//go:noinline\nfunc mod_int64_Neg9223372036854775807_ssa(a int64) int64 {\n\treturn a % -9223372036854775807\n}\n\n//go:noinline\nfunc mod_Neg9223372036854775807_int64_ssa(a int64) int64 {\n\treturn -9223372036854775807 % a\n}\n\n//go:noinline\nfunc mod_int64_Neg4294967296_ssa(a int64) int64 {\n\treturn a % -4294967296\n}\n\n//go:noinline\nfunc mod_Neg4294967296_int64_ssa(a int64) int64 {\n\treturn -4294967296 % a\n}\n\n//go:noinline\nfunc mod_int64_Neg1_ssa(a int64) int64 {\n\treturn a % -1\n}\n\n//go:noinline\nfunc mod_Neg1_int64_ssa(a int64) int64 {\n\treturn -1 % a\n}\n\n//go:noinline\nfunc mod_0_int64_ssa(a int64) int64 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_int64_1_ssa(a int64) int64 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_int64_ssa(a int64) int64 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_int64_4294967296_ssa(a int64) int64 {\n\treturn a % 4294967296\n}\n\n//go:noinline\nfunc mod_4294967296_int64_ssa(a int64) int64 {\n\treturn 4294967296 % a\n}\n\n//go:noinline\nfunc mod_int64_9223372036854775806_ssa(a int64) int64 {\n\treturn a % 9223372036854775806\n}\n\n//go:noinline\nfunc mod_9223372036854775806_int64_ssa(a int64) int64 {\n\treturn 9223372036854775806 % a\n}\n\n//go:noinline\nfunc mod_int64_9223372036854775807_ssa(a int64) int64 {\n\treturn a % 9223372036854775807\n}\n\n//go:noinline\nfunc mod_9223372036854775807_int64_ssa(a int64) int64 {\n\treturn 9223372036854775807 % a\n}\n\n//go:noinline\nfunc add_uint32_0_ssa(a uint32) uint32 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_uint32_ssa(a uint32) uint32 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_uint32_1_ssa(a uint32) uint32 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_uint32_ssa(a uint32) uint32 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_uint32_4294967295_ssa(a uint32) uint32 {\n\treturn a + 4294967295\n}\n\n//go:noinline\nfunc add_4294967295_uint32_ssa(a uint32) uint32 {\n\treturn 4294967295 + a\n}\n\n//go:noinline\nfunc sub_uint32_0_ssa(a uint32) uint32 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_uint32_ssa(a uint32) uint32 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_uint32_1_ssa(a uint32) uint32 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_uint32_ssa(a uint32) uint32 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_uint32_4294967295_ssa(a uint32) uint32 {\n\treturn a - 4294967295\n}\n\n//go:noinline\nfunc sub_4294967295_uint32_ssa(a uint32) uint32 {\n\treturn 4294967295 - a\n}\n\n//go:noinline\nfunc div_0_uint32_ssa(a uint32) uint32 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_uint32_1_ssa(a uint32) uint32 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_uint32_ssa(a uint32) uint32 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_uint32_4294967295_ssa(a uint32) uint32 {\n\treturn a / 4294967295\n}\n\n//go:noinline\nfunc div_4294967295_uint32_ssa(a uint32) uint32 {\n\treturn 4294967295 / a\n}\n\n//go:noinline\nfunc mul_uint32_0_ssa(a uint32) uint32 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_uint32_ssa(a uint32) uint32 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_uint32_1_ssa(a uint32) uint32 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_uint32_ssa(a uint32) uint32 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_uint32_4294967295_ssa(a uint32) uint32 {\n\treturn a * 4294967295\n}\n\n//go:noinline\nfunc mul_4294967295_uint32_ssa(a uint32) uint32 {\n\treturn 4294967295 * a\n}\n\n//go:noinline\nfunc lsh_uint32_0_ssa(a uint32) uint32 {\n\treturn a << 0\n}\n\n//go:noinline\nfunc lsh_0_uint32_ssa(a uint32) uint32 {\n\treturn 0 << a\n}\n\n//go:noinline\nfunc lsh_uint32_1_ssa(a uint32) uint32 {\n\treturn a << 1\n}\n\n//go:noinline\nfunc lsh_1_uint32_ssa(a uint32) uint32 {\n\treturn 1 << a\n}\n\n//go:noinline\nfunc lsh_uint32_4294967295_ssa(a uint32) uint32 {\n\treturn a << 4294967295\n}\n\n//go:noinline\nfunc lsh_4294967295_uint32_ssa(a uint32) uint32 {\n\treturn 4294967295 << a\n}\n\n//go:noinline\nfunc rsh_uint32_0_ssa(a uint32) uint32 {\n\treturn a >> 0\n}\n\n//go:noinline\nfunc rsh_0_uint32_ssa(a uint32) uint32 {\n\treturn 0 >> a\n}\n\n//go:noinline\nfunc rsh_uint32_1_ssa(a uint32) uint32 {\n\treturn a >> 1\n}\n\n//go:noinline\nfunc rsh_1_uint32_ssa(a uint32) uint32 {\n\treturn 1 >> a\n}\n\n//go:noinline\nfunc rsh_uint32_4294967295_ssa(a uint32) uint32 {\n\treturn a >> 4294967295\n}\n\n//go:noinline\nfunc rsh_4294967295_uint32_ssa(a uint32) uint32 {\n\treturn 4294967295 >> a\n}\n\n//go:noinline\nfunc mod_0_uint32_ssa(a uint32) uint32 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_uint32_1_ssa(a uint32) uint32 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_uint32_ssa(a uint32) uint32 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_uint32_4294967295_ssa(a uint32) uint32 {\n\treturn a % 4294967295\n}\n\n//go:noinline\nfunc mod_4294967295_uint32_ssa(a uint32) uint32 {\n\treturn 4294967295 % a\n}\n\n//go:noinline\nfunc add_int32_Neg2147483648_ssa(a int32) int32 {\n\treturn a + -2147483648\n}\n\n//go:noinline\nfunc add_Neg2147483648_int32_ssa(a int32) int32 {\n\treturn -2147483648 + a\n}\n\n//go:noinline\nfunc add_int32_Neg2147483647_ssa(a int32) int32 {\n\treturn a + -2147483647\n}\n\n//go:noinline\nfunc add_Neg2147483647_int32_ssa(a int32) int32 {\n\treturn -2147483647 + a\n}\n\n//go:noinline\nfunc add_int32_Neg1_ssa(a int32) int32 {\n\treturn a + -1\n}\n\n//go:noinline\nfunc add_Neg1_int32_ssa(a int32) int32 {\n\treturn -1 + a\n}\n\n//go:noinline\nfunc add_int32_0_ssa(a int32) int32 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_int32_ssa(a int32) int32 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_int32_1_ssa(a int32) int32 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_int32_ssa(a int32) int32 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_int32_2147483647_ssa(a int32) int32 {\n\treturn a + 2147483647\n}\n\n//go:noinline\nfunc add_2147483647_int32_ssa(a int32) int32 {\n\treturn 2147483647 + a\n}\n\n//go:noinline\nfunc sub_int32_Neg2147483648_ssa(a int32) int32 {\n\treturn a - -2147483648\n}\n\n//go:noinline\nfunc sub_Neg2147483648_int32_ssa(a int32) int32 {\n\treturn -2147483648 - a\n}\n\n//go:noinline\nfunc sub_int32_Neg2147483647_ssa(a int32) int32 {\n\treturn a - -2147483647\n}\n\n//go:noinline\nfunc sub_Neg2147483647_int32_ssa(a int32) int32 {\n\treturn -2147483647 - a\n}\n\n//go:noinline\nfunc sub_int32_Neg1_ssa(a int32) int32 {\n\treturn a - -1\n}\n\n//go:noinline\nfunc sub_Neg1_int32_ssa(a int32) int32 {\n\treturn -1 - a\n}\n\n//go:noinline\nfunc sub_int32_0_ssa(a int32) int32 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_int32_ssa(a int32) int32 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_int32_1_ssa(a int32) int32 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_int32_ssa(a int32) int32 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_int32_2147483647_ssa(a int32) int32 {\n\treturn a - 2147483647\n}\n\n//go:noinline\nfunc sub_2147483647_int32_ssa(a int32) int32 {\n\treturn 2147483647 - a\n}\n\n//go:noinline\nfunc div_int32_Neg2147483648_ssa(a int32) int32 {\n\treturn a / -2147483648\n}\n\n//go:noinline\nfunc div_Neg2147483648_int32_ssa(a int32) int32 {\n\treturn -2147483648 / a\n}\n\n//go:noinline\nfunc div_int32_Neg2147483647_ssa(a int32) int32 {\n\treturn a / -2147483647\n}\n\n//go:noinline\nfunc div_Neg2147483647_int32_ssa(a int32) int32 {\n\treturn -2147483647 / a\n}\n\n//go:noinline\nfunc div_int32_Neg1_ssa(a int32) int32 {\n\treturn a / -1\n}\n\n//go:noinline\nfunc div_Neg1_int32_ssa(a int32) int32 {\n\treturn -1 / a\n}\n\n//go:noinline\nfunc div_0_int32_ssa(a int32) int32 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_int32_1_ssa(a int32) int32 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_int32_ssa(a int32) int32 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_int32_2147483647_ssa(a int32) int32 {\n\treturn a / 2147483647\n}\n\n//go:noinline\nfunc div_2147483647_int32_ssa(a int32) int32 {\n\treturn 2147483647 / a\n}\n\n//go:noinline\nfunc mul_int32_Neg2147483648_ssa(a int32) int32 {\n\treturn a * -2147483648\n}\n\n//go:noinline\nfunc mul_Neg2147483648_int32_ssa(a int32) int32 {\n\treturn -2147483648 * a\n}\n\n//go:noinline\nfunc mul_int32_Neg2147483647_ssa(a int32) int32 {\n\treturn a * -2147483647\n}\n\n//go:noinline\nfunc mul_Neg2147483647_int32_ssa(a int32) int32 {\n\treturn -2147483647 * a\n}\n\n//go:noinline\nfunc mul_int32_Neg1_ssa(a int32) int32 {\n\treturn a * -1\n}\n\n//go:noinline\nfunc mul_Neg1_int32_ssa(a int32) int32 {\n\treturn -1 * a\n}\n\n//go:noinline\nfunc mul_int32_0_ssa(a int32) int32 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_int32_ssa(a int32) int32 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_int32_1_ssa(a int32) int32 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_int32_ssa(a int32) int32 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_int32_2147483647_ssa(a int32) int32 {\n\treturn a * 2147483647\n}\n\n//go:noinline\nfunc mul_2147483647_int32_ssa(a int32) int32 {\n\treturn 2147483647 * a\n}\n\n//go:noinline\nfunc mod_int32_Neg2147483648_ssa(a int32) int32 {\n\treturn a % -2147483648\n}\n\n//go:noinline\nfunc mod_Neg2147483648_int32_ssa(a int32) int32 {\n\treturn -2147483648 % a\n}\n\n//go:noinline\nfunc mod_int32_Neg2147483647_ssa(a int32) int32 {\n\treturn a % -2147483647\n}\n\n//go:noinline\nfunc mod_Neg2147483647_int32_ssa(a int32) int32 {\n\treturn -2147483647 % a\n}\n\n//go:noinline\nfunc mod_int32_Neg1_ssa(a int32) int32 {\n\treturn a % -1\n}\n\n//go:noinline\nfunc mod_Neg1_int32_ssa(a int32) int32 {\n\treturn -1 % a\n}\n\n//go:noinline\nfunc mod_0_int32_ssa(a int32) int32 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_int32_1_ssa(a int32) int32 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_int32_ssa(a int32) int32 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_int32_2147483647_ssa(a int32) int32 {\n\treturn a % 2147483647\n}\n\n//go:noinline\nfunc mod_2147483647_int32_ssa(a int32) int32 {\n\treturn 2147483647 % a\n}\n\n//go:noinline\nfunc add_uint16_0_ssa(a uint16) uint16 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_uint16_ssa(a uint16) uint16 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_uint16_1_ssa(a uint16) uint16 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_uint16_ssa(a uint16) uint16 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_uint16_65535_ssa(a uint16) uint16 {\n\treturn a + 65535\n}\n\n//go:noinline\nfunc add_65535_uint16_ssa(a uint16) uint16 {\n\treturn 65535 + a\n}\n\n//go:noinline\nfunc sub_uint16_0_ssa(a uint16) uint16 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_uint16_ssa(a uint16) uint16 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_uint16_1_ssa(a uint16) uint16 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_uint16_ssa(a uint16) uint16 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_uint16_65535_ssa(a uint16) uint16 {\n\treturn a - 65535\n}\n\n//go:noinline\nfunc sub_65535_uint16_ssa(a uint16) uint16 {\n\treturn 65535 - a\n}\n\n//go:noinline\nfunc div_0_uint16_ssa(a uint16) uint16 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_uint16_1_ssa(a uint16) uint16 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_uint16_ssa(a uint16) uint16 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_uint16_65535_ssa(a uint16) uint16 {\n\treturn a / 65535\n}\n\n//go:noinline\nfunc div_65535_uint16_ssa(a uint16) uint16 {\n\treturn 65535 / a\n}\n\n//go:noinline\nfunc mul_uint16_0_ssa(a uint16) uint16 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_uint16_ssa(a uint16) uint16 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_uint16_1_ssa(a uint16) uint16 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_uint16_ssa(a uint16) uint16 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_uint16_65535_ssa(a uint16) uint16 {\n\treturn a * 65535\n}\n\n//go:noinline\nfunc mul_65535_uint16_ssa(a uint16) uint16 {\n\treturn 65535 * a\n}\n\n//go:noinline\nfunc lsh_uint16_0_ssa(a uint16) uint16 {\n\treturn a << 0\n}\n\n//go:noinline\nfunc lsh_0_uint16_ssa(a uint16) uint16 {\n\treturn 0 << a\n}\n\n//go:noinline\nfunc lsh_uint16_1_ssa(a uint16) uint16 {\n\treturn a << 1\n}\n\n//go:noinline\nfunc lsh_1_uint16_ssa(a uint16) uint16 {\n\treturn 1 << a\n}\n\n//go:noinline\nfunc lsh_uint16_65535_ssa(a uint16) uint16 {\n\treturn a << 65535\n}\n\n//go:noinline\nfunc lsh_65535_uint16_ssa(a uint16) uint16 {\n\treturn 65535 << a\n}\n\n//go:noinline\nfunc rsh_uint16_0_ssa(a uint16) uint16 {\n\treturn a >> 0\n}\n\n//go:noinline\nfunc rsh_0_uint16_ssa(a uint16) uint16 {\n\treturn 0 >> a\n}\n\n//go:noinline\nfunc rsh_uint16_1_ssa(a uint16) uint16 {\n\treturn a >> 1\n}\n\n//go:noinline\nfunc rsh_1_uint16_ssa(a uint16) uint16 {\n\treturn 1 >> a\n}\n\n//go:noinline\nfunc rsh_uint16_65535_ssa(a uint16) uint16 {\n\treturn a >> 65535\n}\n\n//go:noinline\nfunc rsh_65535_uint16_ssa(a uint16) uint16 {\n\treturn 65535 >> a\n}\n\n//go:noinline\nfunc mod_0_uint16_ssa(a uint16) uint16 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_uint16_1_ssa(a uint16) uint16 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_uint16_ssa(a uint16) uint16 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_uint16_65535_ssa(a uint16) uint16 {\n\treturn a % 65535\n}\n\n//go:noinline\nfunc mod_65535_uint16_ssa(a uint16) uint16 {\n\treturn 65535 % a\n}\n\n//go:noinline\nfunc add_int16_Neg32768_ssa(a int16) int16 {\n\treturn a + -32768\n}\n\n//go:noinline\nfunc add_Neg32768_int16_ssa(a int16) int16 {\n\treturn -32768 + a\n}\n\n//go:noinline\nfunc add_int16_Neg32767_ssa(a int16) int16 {\n\treturn a + -32767\n}\n\n//go:noinline\nfunc add_Neg32767_int16_ssa(a int16) int16 {\n\treturn -32767 + a\n}\n\n//go:noinline\nfunc add_int16_Neg1_ssa(a int16) int16 {\n\treturn a + -1\n}\n\n//go:noinline\nfunc add_Neg1_int16_ssa(a int16) int16 {\n\treturn -1 + a\n}\n\n//go:noinline\nfunc add_int16_0_ssa(a int16) int16 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_int16_ssa(a int16) int16 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_int16_1_ssa(a int16) int16 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_int16_ssa(a int16) int16 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_int16_32766_ssa(a int16) int16 {\n\treturn a + 32766\n}\n\n//go:noinline\nfunc add_32766_int16_ssa(a int16) int16 {\n\treturn 32766 + a\n}\n\n//go:noinline\nfunc add_int16_32767_ssa(a int16) int16 {\n\treturn a + 32767\n}\n\n//go:noinline\nfunc add_32767_int16_ssa(a int16) int16 {\n\treturn 32767 + a\n}\n\n//go:noinline\nfunc sub_int16_Neg32768_ssa(a int16) int16 {\n\treturn a - -32768\n}\n\n//go:noinline\nfunc sub_Neg32768_int16_ssa(a int16) int16 {\n\treturn -32768 - a\n}\n\n//go:noinline\nfunc sub_int16_Neg32767_ssa(a int16) int16 {\n\treturn a - -32767\n}\n\n//go:noinline\nfunc sub_Neg32767_int16_ssa(a int16) int16 {\n\treturn -32767 - a\n}\n\n//go:noinline\nfunc sub_int16_Neg1_ssa(a int16) int16 {\n\treturn a - -1\n}\n\n//go:noinline\nfunc sub_Neg1_int16_ssa(a int16) int16 {\n\treturn -1 - a\n}\n\n//go:noinline\nfunc sub_int16_0_ssa(a int16) int16 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_int16_ssa(a int16) int16 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_int16_1_ssa(a int16) int16 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_int16_ssa(a int16) int16 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_int16_32766_ssa(a int16) int16 {\n\treturn a - 32766\n}\n\n//go:noinline\nfunc sub_32766_int16_ssa(a int16) int16 {\n\treturn 32766 - a\n}\n\n//go:noinline\nfunc sub_int16_32767_ssa(a int16) int16 {\n\treturn a - 32767\n}\n\n//go:noinline\nfunc sub_32767_int16_ssa(a int16) int16 {\n\treturn 32767 - a\n}\n\n//go:noinline\nfunc div_int16_Neg32768_ssa(a int16) int16 {\n\treturn a / -32768\n}\n\n//go:noinline\nfunc div_Neg32768_int16_ssa(a int16) int16 {\n\treturn -32768 / a\n}\n\n//go:noinline\nfunc div_int16_Neg32767_ssa(a int16) int16 {\n\treturn a / -32767\n}\n\n//go:noinline\nfunc div_Neg32767_int16_ssa(a int16) int16 {\n\treturn -32767 / a\n}\n\n//go:noinline\nfunc div_int16_Neg1_ssa(a int16) int16 {\n\treturn a / -1\n}\n\n//go:noinline\nfunc div_Neg1_int16_ssa(a int16) int16 {\n\treturn -1 / a\n}\n\n//go:noinline\nfunc div_0_int16_ssa(a int16) int16 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_int16_1_ssa(a int16) int16 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_int16_ssa(a int16) int16 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_int16_32766_ssa(a int16) int16 {\n\treturn a / 32766\n}\n\n//go:noinline\nfunc div_32766_int16_ssa(a int16) int16 {\n\treturn 32766 / a\n}\n\n//go:noinline\nfunc div_int16_32767_ssa(a int16) int16 {\n\treturn a / 32767\n}\n\n//go:noinline\nfunc div_32767_int16_ssa(a int16) int16 {\n\treturn 32767 / a\n}\n\n//go:noinline\nfunc mul_int16_Neg32768_ssa(a int16) int16 {\n\treturn a * -32768\n}\n\n//go:noinline\nfunc mul_Neg32768_int16_ssa(a int16) int16 {\n\treturn -32768 * a\n}\n\n//go:noinline\nfunc mul_int16_Neg32767_ssa(a int16) int16 {\n\treturn a * -32767\n}\n\n//go:noinline\nfunc mul_Neg32767_int16_ssa(a int16) int16 {\n\treturn -32767 * a\n}\n\n//go:noinline\nfunc mul_int16_Neg1_ssa(a int16) int16 {\n\treturn a * -1\n}\n\n//go:noinline\nfunc mul_Neg1_int16_ssa(a int16) int16 {\n\treturn -1 * a\n}\n\n//go:noinline\nfunc mul_int16_0_ssa(a int16) int16 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_int16_ssa(a int16) int16 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_int16_1_ssa(a int16) int16 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_int16_ssa(a int16) int16 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_int16_32766_ssa(a int16) int16 {\n\treturn a * 32766\n}\n\n//go:noinline\nfunc mul_32766_int16_ssa(a int16) int16 {\n\treturn 32766 * a\n}\n\n//go:noinline\nfunc mul_int16_32767_ssa(a int16) int16 {\n\treturn a * 32767\n}\n\n//go:noinline\nfunc mul_32767_int16_ssa(a int16) int16 {\n\treturn 32767 * a\n}\n\n//go:noinline\nfunc mod_int16_Neg32768_ssa(a int16) int16 {\n\treturn a % -32768\n}\n\n//go:noinline\nfunc mod_Neg32768_int16_ssa(a int16) int16 {\n\treturn -32768 % a\n}\n\n//go:noinline\nfunc mod_int16_Neg32767_ssa(a int16) int16 {\n\treturn a % -32767\n}\n\n//go:noinline\nfunc mod_Neg32767_int16_ssa(a int16) int16 {\n\treturn -32767 % a\n}\n\n//go:noinline\nfunc mod_int16_Neg1_ssa(a int16) int16 {\n\treturn a % -1\n}\n\n//go:noinline\nfunc mod_Neg1_int16_ssa(a int16) int16 {\n\treturn -1 % a\n}\n\n//go:noinline\nfunc mod_0_int16_ssa(a int16) int16 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_int16_1_ssa(a int16) int16 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_int16_ssa(a int16) int16 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_int16_32766_ssa(a int16) int16 {\n\treturn a % 32766\n}\n\n//go:noinline\nfunc mod_32766_int16_ssa(a int16) int16 {\n\treturn 32766 % a\n}\n\n//go:noinline\nfunc mod_int16_32767_ssa(a int16) int16 {\n\treturn a % 32767\n}\n\n//go:noinline\nfunc mod_32767_int16_ssa(a int16) int16 {\n\treturn 32767 % a\n}\n\n//go:noinline\nfunc add_uint8_0_ssa(a uint8) uint8 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_uint8_ssa(a uint8) uint8 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_uint8_1_ssa(a uint8) uint8 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_uint8_ssa(a uint8) uint8 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_uint8_255_ssa(a uint8) uint8 {\n\treturn a + 255\n}\n\n//go:noinline\nfunc add_255_uint8_ssa(a uint8) uint8 {\n\treturn 255 + a\n}\n\n//go:noinline\nfunc sub_uint8_0_ssa(a uint8) uint8 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_uint8_ssa(a uint8) uint8 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_uint8_1_ssa(a uint8) uint8 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_uint8_ssa(a uint8) uint8 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_uint8_255_ssa(a uint8) uint8 {\n\treturn a - 255\n}\n\n//go:noinline\nfunc sub_255_uint8_ssa(a uint8) uint8 {\n\treturn 255 - a\n}\n\n//go:noinline\nfunc div_0_uint8_ssa(a uint8) uint8 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_uint8_1_ssa(a uint8) uint8 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_uint8_ssa(a uint8) uint8 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_uint8_255_ssa(a uint8) uint8 {\n\treturn a / 255\n}\n\n//go:noinline\nfunc div_255_uint8_ssa(a uint8) uint8 {\n\treturn 255 / a\n}\n\n//go:noinline\nfunc mul_uint8_0_ssa(a uint8) uint8 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_uint8_ssa(a uint8) uint8 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_uint8_1_ssa(a uint8) uint8 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_uint8_ssa(a uint8) uint8 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_uint8_255_ssa(a uint8) uint8 {\n\treturn a * 255\n}\n\n//go:noinline\nfunc mul_255_uint8_ssa(a uint8) uint8 {\n\treturn 255 * a\n}\n\n//go:noinline\nfunc lsh_uint8_0_ssa(a uint8) uint8 {\n\treturn a << 0\n}\n\n//go:noinline\nfunc lsh_0_uint8_ssa(a uint8) uint8 {\n\treturn 0 << a\n}\n\n//go:noinline\nfunc lsh_uint8_1_ssa(a uint8) uint8 {\n\treturn a << 1\n}\n\n//go:noinline\nfunc lsh_1_uint8_ssa(a uint8) uint8 {\n\treturn 1 << a\n}\n\n//go:noinline\nfunc lsh_uint8_255_ssa(a uint8) uint8 {\n\treturn a << 255\n}\n\n//go:noinline\nfunc lsh_255_uint8_ssa(a uint8) uint8 {\n\treturn 255 << a\n}\n\n//go:noinline\nfunc rsh_uint8_0_ssa(a uint8) uint8 {\n\treturn a >> 0\n}\n\n//go:noinline\nfunc rsh_0_uint8_ssa(a uint8) uint8 {\n\treturn 0 >> a\n}\n\n//go:noinline\nfunc rsh_uint8_1_ssa(a uint8) uint8 {\n\treturn a >> 1\n}\n\n//go:noinline\nfunc rsh_1_uint8_ssa(a uint8) uint8 {\n\treturn 1 >> a\n}\n\n//go:noinline\nfunc rsh_uint8_255_ssa(a uint8) uint8 {\n\treturn a >> 255\n}\n\n//go:noinline\nfunc rsh_255_uint8_ssa(a uint8) uint8 {\n\treturn 255 >> a\n}\n\n//go:noinline\nfunc mod_0_uint8_ssa(a uint8) uint8 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_uint8_1_ssa(a uint8) uint8 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_uint8_ssa(a uint8) uint8 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_uint8_255_ssa(a uint8) uint8 {\n\treturn a % 255\n}\n\n//go:noinline\nfunc mod_255_uint8_ssa(a uint8) uint8 {\n\treturn 255 % a\n}\n\n//go:noinline\nfunc add_int8_Neg128_ssa(a int8) int8 {\n\treturn a + -128\n}\n\n//go:noinline\nfunc add_Neg128_int8_ssa(a int8) int8 {\n\treturn -128 + a\n}\n\n//go:noinline\nfunc add_int8_Neg127_ssa(a int8) int8 {\n\treturn a + -127\n}\n\n//go:noinline\nfunc add_Neg127_int8_ssa(a int8) int8 {\n\treturn -127 + a\n}\n\n//go:noinline\nfunc add_int8_Neg1_ssa(a int8) int8 {\n\treturn a + -1\n}\n\n//go:noinline\nfunc add_Neg1_int8_ssa(a int8) int8 {\n\treturn -1 + a\n}\n\n//go:noinline\nfunc add_int8_0_ssa(a int8) int8 {\n\treturn a + 0\n}\n\n//go:noinline\nfunc add_0_int8_ssa(a int8) int8 {\n\treturn 0 + a\n}\n\n//go:noinline\nfunc add_int8_1_ssa(a int8) int8 {\n\treturn a + 1\n}\n\n//go:noinline\nfunc add_1_int8_ssa(a int8) int8 {\n\treturn 1 + a\n}\n\n//go:noinline\nfunc add_int8_126_ssa(a int8) int8 {\n\treturn a + 126\n}\n\n//go:noinline\nfunc add_126_int8_ssa(a int8) int8 {\n\treturn 126 + a\n}\n\n//go:noinline\nfunc add_int8_127_ssa(a int8) int8 {\n\treturn a + 127\n}\n\n//go:noinline\nfunc add_127_int8_ssa(a int8) int8 {\n\treturn 127 + a\n}\n\n//go:noinline\nfunc sub_int8_Neg128_ssa(a int8) int8 {\n\treturn a - -128\n}\n\n//go:noinline\nfunc sub_Neg128_int8_ssa(a int8) int8 {\n\treturn -128 - a\n}\n\n//go:noinline\nfunc sub_int8_Neg127_ssa(a int8) int8 {\n\treturn a - -127\n}\n\n//go:noinline\nfunc sub_Neg127_int8_ssa(a int8) int8 {\n\treturn -127 - a\n}\n\n//go:noinline\nfunc sub_int8_Neg1_ssa(a int8) int8 {\n\treturn a - -1\n}\n\n//go:noinline\nfunc sub_Neg1_int8_ssa(a int8) int8 {\n\treturn -1 - a\n}\n\n//go:noinline\nfunc sub_int8_0_ssa(a int8) int8 {\n\treturn a - 0\n}\n\n//go:noinline\nfunc sub_0_int8_ssa(a int8) int8 {\n\treturn 0 - a\n}\n\n//go:noinline\nfunc sub_int8_1_ssa(a int8) int8 {\n\treturn a - 1\n}\n\n//go:noinline\nfunc sub_1_int8_ssa(a int8) int8 {\n\treturn 1 - a\n}\n\n//go:noinline\nfunc sub_int8_126_ssa(a int8) int8 {\n\treturn a - 126\n}\n\n//go:noinline\nfunc sub_126_int8_ssa(a int8) int8 {\n\treturn 126 - a\n}\n\n//go:noinline\nfunc sub_int8_127_ssa(a int8) int8 {\n\treturn a - 127\n}\n\n//go:noinline\nfunc sub_127_int8_ssa(a int8) int8 {\n\treturn 127 - a\n}\n\n//go:noinline\nfunc div_int8_Neg128_ssa(a int8) int8 {\n\treturn a / -128\n}\n\n//go:noinline\nfunc div_Neg128_int8_ssa(a int8) int8 {\n\treturn -128 / a\n}\n\n//go:noinline\nfunc div_int8_Neg127_ssa(a int8) int8 {\n\treturn a / -127\n}\n\n//go:noinline\nfunc div_Neg127_int8_ssa(a int8) int8 {\n\treturn -127 / a\n}\n\n//go:noinline\nfunc div_int8_Neg1_ssa(a int8) int8 {\n\treturn a / -1\n}\n\n//go:noinline\nfunc div_Neg1_int8_ssa(a int8) int8 {\n\treturn -1 / a\n}\n\n//go:noinline\nfunc div_0_int8_ssa(a int8) int8 {\n\treturn 0 / a\n}\n\n//go:noinline\nfunc div_int8_1_ssa(a int8) int8 {\n\treturn a / 1\n}\n\n//go:noinline\nfunc div_1_int8_ssa(a int8) int8 {\n\treturn 1 / a\n}\n\n//go:noinline\nfunc div_int8_126_ssa(a int8) int8 {\n\treturn a / 126\n}\n\n//go:noinline\nfunc div_126_int8_ssa(a int8) int8 {\n\treturn 126 / a\n}\n\n//go:noinline\nfunc div_int8_127_ssa(a int8) int8 {\n\treturn a / 127\n}\n\n//go:noinline\nfunc div_127_int8_ssa(a int8) int8 {\n\treturn 127 / a\n}\n\n//go:noinline\nfunc mul_int8_Neg128_ssa(a int8) int8 {\n\treturn a * -128\n}\n\n//go:noinline\nfunc mul_Neg128_int8_ssa(a int8) int8 {\n\treturn -128 * a\n}\n\n//go:noinline\nfunc mul_int8_Neg127_ssa(a int8) int8 {\n\treturn a * -127\n}\n\n//go:noinline\nfunc mul_Neg127_int8_ssa(a int8) int8 {\n\treturn -127 * a\n}\n\n//go:noinline\nfunc mul_int8_Neg1_ssa(a int8) int8 {\n\treturn a * -1\n}\n\n//go:noinline\nfunc mul_Neg1_int8_ssa(a int8) int8 {\n\treturn -1 * a\n}\n\n//go:noinline\nfunc mul_int8_0_ssa(a int8) int8 {\n\treturn a * 0\n}\n\n//go:noinline\nfunc mul_0_int8_ssa(a int8) int8 {\n\treturn 0 * a\n}\n\n//go:noinline\nfunc mul_int8_1_ssa(a int8) int8 {\n\treturn a * 1\n}\n\n//go:noinline\nfunc mul_1_int8_ssa(a int8) int8 {\n\treturn 1 * a\n}\n\n//go:noinline\nfunc mul_int8_126_ssa(a int8) int8 {\n\treturn a * 126\n}\n\n//go:noinline\nfunc mul_126_int8_ssa(a int8) int8 {\n\treturn 126 * a\n}\n\n//go:noinline\nfunc mul_int8_127_ssa(a int8) int8 {\n\treturn a * 127\n}\n\n//go:noinline\nfunc mul_127_int8_ssa(a int8) int8 {\n\treturn 127 * a\n}\n\n//go:noinline\nfunc mod_int8_Neg128_ssa(a int8) int8 {\n\treturn a % -128\n}\n\n//go:noinline\nfunc mod_Neg128_int8_ssa(a int8) int8 {\n\treturn -128 % a\n}\n\n//go:noinline\nfunc mod_int8_Neg127_ssa(a int8) int8 {\n\treturn a % -127\n}\n\n//go:noinline\nfunc mod_Neg127_int8_ssa(a int8) int8 {\n\treturn -127 % a\n}\n\n//go:noinline\nfunc mod_int8_Neg1_ssa(a int8) int8 {\n\treturn a % -1\n}\n\n//go:noinline\nfunc mod_Neg1_int8_ssa(a int8) int8 {\n\treturn -1 % a\n}\n\n//go:noinline\nfunc mod_0_int8_ssa(a int8) int8 {\n\treturn 0 % a\n}\n\n//go:noinline\nfunc mod_int8_1_ssa(a int8) int8 {\n\treturn a % 1\n}\n\n//go:noinline\nfunc mod_1_int8_ssa(a int8) int8 {\n\treturn 1 % a\n}\n\n//go:noinline\nfunc mod_int8_126_ssa(a int8) int8 {\n\treturn a % 126\n}\n\n//go:noinline\nfunc mod_126_int8_ssa(a int8) int8 {\n\treturn 126 % a\n}\n\n//go:noinline\nfunc mod_int8_127_ssa(a int8) int8 {\n\treturn a % 127\n}\n\n//go:noinline\nfunc mod_127_int8_ssa(a int8) int8 {\n\treturn 127 % a\n}\n\nvar failed bool\n\nfunc main() {\n\n\tif got := add_0_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint64 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint64 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint64_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint64 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint64 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint64_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"add_uint64 0%s4294967296 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_0_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint64_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"add_uint64 0%s18446744073709551615 = %d, wanted 18446744073709551615\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_0_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint64_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint64 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint64 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint64_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint64 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint64 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint64_ssa(4294967296); got != 4294967297 {\n\t\tfmt.Printf(\"add_uint64 1%s4294967296 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_1_ssa(4294967296); got != 4294967297 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s1 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"add_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_1_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_uint64_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_4294967296_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"add_uint64 0%s4294967296 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_uint64_ssa(1); got != 4294967297 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s1 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_4294967296_ssa(1); got != 4294967297 {\n\t\tfmt.Printf(\"add_uint64 1%s4294967296 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_uint64_ssa(4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s4294967296 = %d, wanted 8589934592\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_4294967296_ssa(4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s4294967296 = %d, wanted 8589934592\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_uint64_ssa(18446744073709551615); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s18446744073709551615 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_4294967296_ssa(18446744073709551615); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s4294967296 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_18446744073709551615_uint64_ssa(0); got != 18446744073709551615 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_18446744073709551615_ssa(0); got != 18446744073709551615 {\n\t\tfmt.Printf(\"add_uint64 0%s18446744073709551615 = %d, wanted 18446744073709551615\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_18446744073709551615_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_18446744073709551615_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_18446744073709551615_uint64_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s4294967296 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_18446744073709551615_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint64 4294967296%s18446744073709551615 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_18446744073709551615_uint64_ssa(18446744073709551615); got != 18446744073709551614 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 18446744073709551614\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint64_18446744073709551615_ssa(18446744073709551615); got != 18446744073709551614 {\n\t\tfmt.Printf(\"add_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 18446744073709551614\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint64_ssa(1); got != 18446744073709551615 {\n\t\tfmt.Printf(\"sub_uint64 0%s1 = %d, wanted 18446744073709551615\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_uint64 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint64_ssa(4294967296); got != 18446744069414584320 {\n\t\tfmt.Printf(\"sub_uint64 0%s4294967296 = %d, wanted 18446744069414584320\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_0_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint64_ssa(18446744073709551615); got != 1 {\n\t\tfmt.Printf(\"sub_uint64 0%s18446744073709551615 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_0_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint64_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint64 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_1_ssa(0); got != 18446744073709551615 {\n\t\tfmt.Printf(\"sub_uint64 0%s1 = %d, wanted 18446744073709551615\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint64_ssa(4294967296); got != 18446744069414584321 {\n\t\tfmt.Printf(\"sub_uint64 1%s4294967296 = %d, wanted 18446744069414584321\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_1_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s1 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint64_ssa(18446744073709551615); got != 2 {\n\t\tfmt.Printf(\"sub_uint64 1%s18446744073709551615 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_1_ssa(18446744073709551615); got != 18446744073709551614 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551614\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_uint64_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_4294967296_ssa(0); got != 18446744069414584320 {\n\t\tfmt.Printf(\"sub_uint64 0%s4294967296 = %d, wanted 18446744069414584320\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_uint64_ssa(1); got != 4294967295 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s1 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_4294967296_ssa(1); got != 18446744069414584321 {\n\t\tfmt.Printf(\"sub_uint64 1%s4294967296 = %d, wanted 18446744069414584321\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_uint64_ssa(18446744073709551615); got != 4294967297 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s18446744073709551615 = %d, wanted 4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_4294967296_ssa(18446744073709551615); got != 18446744069414584319 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s4294967296 = %d, wanted 18446744069414584319\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_18446744073709551615_uint64_ssa(0); got != 18446744073709551615 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_18446744073709551615_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint64 0%s18446744073709551615 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_18446744073709551615_uint64_ssa(1); got != 18446744073709551614 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551614\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_18446744073709551615_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_uint64 1%s18446744073709551615 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_18446744073709551615_uint64_ssa(4294967296); got != 18446744069414584319 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s4294967296 = %d, wanted 18446744069414584319\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_18446744073709551615_ssa(4294967296); got != 4294967297 {\n\t\tfmt.Printf(\"sub_uint64 4294967296%s18446744073709551615 = %d, wanted 4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_18446744073709551615_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint64_18446744073709551615_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"sub_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint64 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_uint64 0%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"div_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint64 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint64_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint64 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint64 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_uint64 1%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_1_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"div_uint64 4294967296%s1 = %d, wanted 4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"div_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_1_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"div_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551615\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint64 0%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_uint64_ssa(1); got != 4294967296 {\n\t\tfmt.Printf(\"div_uint64 4294967296%s1 = %d, wanted 4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_4294967296_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint64 1%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_uint64_ssa(4294967296); got != 1 {\n\t\tfmt.Printf(\"div_uint64 4294967296%s4294967296 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_4294967296_ssa(4294967296); got != 1 {\n\t\tfmt.Printf(\"div_uint64 4294967296%s4294967296 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"div_uint64 4294967296%s18446744073709551615 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_4294967296_ssa(18446744073709551615); got != 4294967295 {\n\t\tfmt.Printf(\"div_uint64 18446744073709551615%s4294967296 = %d, wanted 4294967295\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_18446744073709551615_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_18446744073709551615_uint64_ssa(1); got != 18446744073709551615 {\n\t\tfmt.Printf(\"div_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551615\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_18446744073709551615_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_18446744073709551615_uint64_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"div_uint64 18446744073709551615%s4294967296 = %d, wanted 4294967295\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_18446744073709551615_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_uint64 4294967296%s18446744073709551615 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_18446744073709551615_uint64_ssa(18446744073709551615); got != 1 {\n\t\tfmt.Printf(\"div_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint64_18446744073709551615_ssa(18446744073709551615); got != 1 {\n\t\tfmt.Printf(\"div_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_0_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_0_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint64_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint64 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint64 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint64_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_uint64 1%s4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_1_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s1 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint64_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"mul_uint64 1%s18446744073709551615 = %d, wanted 18446744073709551615\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_1_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551615\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_uint64_ssa(1); got != 4294967296 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s1 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_4294967296_ssa(1); got != 4294967296 {\n\t\tfmt.Printf(\"mul_uint64 1%s4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_uint64_ssa(18446744073709551615); got != 18446744069414584320 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s18446744073709551615 = %d, wanted 18446744069414584320\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_4294967296_ssa(18446744073709551615); got != 18446744069414584320 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s4294967296 = %d, wanted 18446744069414584320\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_18446744073709551615_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_18446744073709551615_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_18446744073709551615_uint64_ssa(1); got != 18446744073709551615 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551615\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_18446744073709551615_ssa(1); got != 18446744073709551615 {\n\t\tfmt.Printf(\"mul_uint64 1%s18446744073709551615 = %d, wanted 18446744073709551615\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_18446744073709551615_uint64_ssa(4294967296); got != 18446744069414584320 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s4294967296 = %d, wanted 18446744069414584320\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_18446744073709551615_ssa(4294967296); got != 18446744069414584320 {\n\t\tfmt.Printf(\"mul_uint64 4294967296%s18446744073709551615 = %d, wanted 18446744069414584320\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_18446744073709551615_uint64_ssa(18446744073709551615); got != 1 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint64_18446744073709551615_ssa(18446744073709551615); got != 1 {\n\t\tfmt.Printf(\"mul_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"lsh_uint64 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_0_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_0_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint64_ssa(0); got != 1 {\n\t\tfmt.Printf(\"lsh_uint64 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint64_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint64 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint64 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 1%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_1_ssa(4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s1 = %d, wanted 8589934592\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_1_ssa(18446744073709551615); got != 18446744073709551614 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551614\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_4294967296_uint64_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_4294967296_uint64_ssa(1); got != 8589934592 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s1 = %d, wanted 8589934592\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_4294967296_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 1%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_4294967296_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_4294967296_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_4294967296_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_18446744073709551615_uint64_ssa(0); got != 18446744073709551615 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_18446744073709551615_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_18446744073709551615_uint64_ssa(1); got != 18446744073709551614 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s1 = %d, wanted 18446744073709551614\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_18446744073709551615_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_18446744073709551615_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s4294967296 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_18446744073709551615_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 4294967296%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_18446744073709551615_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint64_18446744073709551615_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"lsh_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"rsh_uint64 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_0_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_0_ssa(18446744073709551615); got != 18446744073709551615 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint64_ssa(0); got != 1 {\n\t\tfmt.Printf(\"rsh_uint64 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 1%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_1_ssa(4294967296); got != 2147483648 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s1 = %d, wanted 2147483648\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_1_ssa(18446744073709551615); got != 9223372036854775807 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s1 = %d, wanted 9223372036854775807\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_4294967296_uint64_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s0 = %d, wanted 4294967296\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_4294967296_uint64_ssa(1); got != 2147483648 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s1 = %d, wanted 2147483648\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_4294967296_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 1%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_4294967296_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_4294967296_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_4294967296_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_18446744073709551615_uint64_ssa(0); got != 18446744073709551615 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s0 = %d, wanted 18446744073709551615\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_18446744073709551615_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_18446744073709551615_uint64_ssa(1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s1 = %d, wanted 9223372036854775807\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_18446744073709551615_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 1%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_18446744073709551615_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s4294967296 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_18446744073709551615_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 4294967296%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_18446744073709551615_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint64_18446744073709551615_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"rsh_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 0%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint64_ssa(4294967296); got != 1 {\n\t\tfmt.Printf(\"mod_uint64 1%s4294967296 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_1_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 4294967296%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint64_ssa(18446744073709551615); got != 1 {\n\t\tfmt.Printf(\"mod_uint64 1%s18446744073709551615 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_1_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 18446744073709551615%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 0%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 4294967296%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_4294967296_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_uint64 1%s4294967296 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_uint64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 4294967296%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_uint64_ssa(18446744073709551615); got != 4294967296 {\n\t\tfmt.Printf(\"mod_uint64 4294967296%s18446744073709551615 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_4294967296_ssa(18446744073709551615); got != 4294967295 {\n\t\tfmt.Printf(\"mod_uint64 18446744073709551615%s4294967296 = %d, wanted 4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_18446744073709551615_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 0%s18446744073709551615 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_18446744073709551615_uint64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 18446744073709551615%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_18446744073709551615_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_uint64 1%s18446744073709551615 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_18446744073709551615_uint64_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"mod_uint64 18446744073709551615%s4294967296 = %d, wanted 4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_18446744073709551615_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mod_uint64 4294967296%s18446744073709551615 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_18446744073709551615_uint64_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint64_18446744073709551615_ssa(18446744073709551615); got != 0 {\n\t\tfmt.Printf(\"mod_uint64 18446744073709551615%s18446744073709551615 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(-4294967296); got != 9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-4294967296 = %d, wanted 9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(-4294967296); got != 9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-9223372036854775808 = %d, wanted 9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(-1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-1 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(-1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -1%s-9223372036854775808 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(0); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s0 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(0); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 0%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s1 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 1%s-9223372036854775808 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(4294967296); got != -9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s4294967296 = %d, wanted -9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(4294967296); got != -9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-9223372036854775808 = %d, wanted -9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(9223372036854775806); got != -2 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s9223372036854775806 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(9223372036854775806); got != -2 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-9223372036854775808 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775808_int64_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775808_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-9223372036854775808 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(-9223372036854775807); got != 2 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(-9223372036854775807); got != 2 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(-4294967296); got != 9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-4294967296 = %d, wanted 9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(-4294967296); got != 9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-9223372036854775807 = %d, wanted 9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(-1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-1 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(-1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 -1%s-9223372036854775807 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(0); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s0 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(0); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 0%s-9223372036854775807 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(1); got != -9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(1); got != -9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 1%s-9223372036854775807 = %d, wanted -9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(4294967296); got != -9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s4294967296 = %d, wanted -9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(4294967296); got != -9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-9223372036854775807 = %d, wanted -9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(9223372036854775806); got != -1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s9223372036854775806 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(9223372036854775806); got != -1 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-9223372036854775807 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg9223372036854775807_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg9223372036854775807_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(-9223372036854775808); got != 9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-9223372036854775808 = %d, wanted 9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(-9223372036854775808); got != 9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-4294967296 = %d, wanted 9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(-9223372036854775807); got != 9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-9223372036854775807 = %d, wanted 9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(-9223372036854775807); got != 9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-4294967296 = %d, wanted 9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(-4294967296); got != -8589934592 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-4294967296 = %d, wanted -8589934592\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(-4294967296); got != -8589934592 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-4294967296 = %d, wanted -8589934592\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(-1); got != -4294967297 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-1 = %d, wanted -4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(-1); got != -4294967297 {\n\t\tfmt.Printf(\"add_int64 -1%s-4294967296 = %d, wanted -4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(0); got != -4294967296 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s0 = %d, wanted -4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(0); got != -4294967296 {\n\t\tfmt.Printf(\"add_int64 0%s-4294967296 = %d, wanted -4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(1); got != -4294967295 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s1 = %d, wanted -4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(1); got != -4294967295 {\n\t\tfmt.Printf(\"add_int64 1%s-4294967296 = %d, wanted -4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s4294967296 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-4294967296 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(9223372036854775806); got != 9223372032559808510 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s9223372036854775806 = %d, wanted 9223372032559808510\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(9223372036854775806); got != 9223372032559808510 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-4294967296 = %d, wanted 9223372032559808510\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg4294967296_int64_ssa(9223372036854775807); got != 9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s9223372036854775807 = %d, wanted 9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg4294967296_ssa(9223372036854775807); got != 9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-4294967296 = %d, wanted 9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(-9223372036854775808); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -1%s-9223372036854775808 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(-9223372036854775808); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s-1 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(-9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 -1%s-9223372036854775807 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(-9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s-1 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(-4294967296); got != -4294967297 {\n\t\tfmt.Printf(\"add_int64 -1%s-4294967296 = %d, wanted -4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(-4294967296); got != -4294967297 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s-1 = %d, wanted -4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int64 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int64 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int64 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int64 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int64 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int64 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"add_int64 -1%s4294967296 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-1 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(9223372036854775806); got != 9223372036854775805 {\n\t\tfmt.Printf(\"add_int64 -1%s9223372036854775806 = %d, wanted 9223372036854775805\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(9223372036854775806); got != 9223372036854775805 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-1 = %d, wanted 9223372036854775805\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int64_ssa(9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 -1%s9223372036854775807 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_Neg1_ssa(9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-1 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 0%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s0 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(-9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 0%s-9223372036854775807 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(-9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s0 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"add_int64 0%s-4294967296 = %d, wanted -4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s0 = %d, wanted -4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int64 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int64 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int64 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int64 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int64 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int64 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"add_int64 0%s4294967296 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"add_int64 4294967296%s0 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 0%s9223372036854775806 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s0 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int64_ssa(9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 0%s9223372036854775807 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_0_ssa(9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s0 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(-9223372036854775808); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 1%s-9223372036854775808 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(-9223372036854775808); got != -9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s1 = %d, wanted -9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(-9223372036854775807); got != -9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 1%s-9223372036854775807 = %d, wanted -9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(-9223372036854775807); got != -9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(-4294967296); got != -4294967295 {\n\t\tfmt.Printf(\"add_int64 1%s-4294967296 = %d, wanted -4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(-4294967296); got != -4294967295 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s1 = %d, wanted -4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int64 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int64 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int64 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int64 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int64 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int64 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(4294967296); got != 4294967297 {\n\t\tfmt.Printf(\"add_int64 1%s4294967296 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(4294967296); got != 4294967297 {\n\t\tfmt.Printf(\"add_int64 4294967296%s1 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(9223372036854775806); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 1%s9223372036854775806 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(9223372036854775806); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s1 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int64_ssa(9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 1%s9223372036854775807 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_1_ssa(9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s1 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(-9223372036854775808); got != -9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-9223372036854775808 = %d, wanted -9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(-9223372036854775808); got != -9223372032559808512 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s4294967296 = %d, wanted -9223372032559808512\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(-9223372036854775807); got != -9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-9223372036854775807 = %d, wanted -9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(-9223372036854775807); got != -9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s4294967296 = %d, wanted -9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-4294967296 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s4294967296 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(-1); got != 4294967295 {\n\t\tfmt.Printf(\"add_int64 4294967296%s-1 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(-1); got != 4294967295 {\n\t\tfmt.Printf(\"add_int64 -1%s4294967296 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"add_int64 4294967296%s0 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"add_int64 0%s4294967296 = %d, wanted 4294967296\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(1); got != 4294967297 {\n\t\tfmt.Printf(\"add_int64 4294967296%s1 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(1); got != 4294967297 {\n\t\tfmt.Printf(\"add_int64 1%s4294967296 = %d, wanted 4294967297\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"add_int64 4294967296%s4294967296 = %d, wanted 8589934592\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"add_int64 4294967296%s4294967296 = %d, wanted 8589934592\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(9223372036854775806); got != -9223372032559808514 {\n\t\tfmt.Printf(\"add_int64 4294967296%s9223372036854775806 = %d, wanted -9223372032559808514\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(9223372036854775806); got != -9223372032559808514 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s4294967296 = %d, wanted -9223372032559808514\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967296_int64_ssa(9223372036854775807); got != -9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 4294967296%s9223372036854775807 = %d, wanted -9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_4294967296_ssa(9223372036854775807); got != -9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s4294967296 = %d, wanted -9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(-9223372036854775808); got != -2 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-9223372036854775808 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(-9223372036854775808); got != -2 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s9223372036854775806 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-9223372036854775807 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s9223372036854775806 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(-4294967296); got != 9223372032559808510 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-4294967296 = %d, wanted 9223372032559808510\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(-4294967296); got != 9223372032559808510 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s9223372036854775806 = %d, wanted 9223372032559808510\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(-1); got != 9223372036854775805 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s-1 = %d, wanted 9223372036854775805\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(-1); got != 9223372036854775805 {\n\t\tfmt.Printf(\"add_int64 -1%s9223372036854775806 = %d, wanted 9223372036854775805\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(0); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s0 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(0); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 0%s9223372036854775806 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s1 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 1%s9223372036854775806 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(4294967296); got != -9223372032559808514 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s4294967296 = %d, wanted -9223372032559808514\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(4294967296); got != -9223372032559808514 {\n\t\tfmt.Printf(\"add_int64 4294967296%s9223372036854775806 = %d, wanted -9223372032559808514\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(9223372036854775806); got != -4 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s9223372036854775806 = %d, wanted -4\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(9223372036854775806); got != -4 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s9223372036854775806 = %d, wanted -4\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775806_int64_ssa(9223372036854775807); got != -3 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s9223372036854775807 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775806_ssa(9223372036854775807); got != -3 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s9223372036854775806 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-9223372036854775808 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"add_int64 -9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(-4294967296); got != 9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-4294967296 = %d, wanted 9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(-4294967296); got != 9223372032559808511 {\n\t\tfmt.Printf(\"add_int64 -4294967296%s9223372036854775807 = %d, wanted 9223372032559808511\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(-1); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s-1 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(-1); got != 9223372036854775806 {\n\t\tfmt.Printf(\"add_int64 -1%s9223372036854775807 = %d, wanted 9223372036854775806\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(0); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s0 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(0); got != 9223372036854775807 {\n\t\tfmt.Printf(\"add_int64 0%s9223372036854775807 = %d, wanted 9223372036854775807\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s1 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"add_int64 1%s9223372036854775807 = %d, wanted -9223372036854775808\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(4294967296); got != -9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s4294967296 = %d, wanted -9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(4294967296); got != -9223372032559808513 {\n\t\tfmt.Printf(\"add_int64 4294967296%s9223372036854775807 = %d, wanted -9223372032559808513\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(9223372036854775806); got != -3 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s9223372036854775806 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(9223372036854775806); got != -3 {\n\t\tfmt.Printf(\"add_int64 9223372036854775806%s9223372036854775807 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_9223372036854775807_int64_ssa(9223372036854775807); got != -2 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s9223372036854775807 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int64_9223372036854775807_ssa(9223372036854775807); got != -2 {\n\t\tfmt.Printf(\"add_int64 9223372036854775807%s9223372036854775807 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(-4294967296); got != -9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-4294967296 = %d, wanted -9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(-4294967296); got != 9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-9223372036854775808 = %d, wanted 9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(-1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-1 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(-1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -1%s-9223372036854775808 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(0); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s0 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(0); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 0%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s1 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 1%s-9223372036854775808 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(4294967296); got != 9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s4294967296 = %d, wanted 9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(4294967296); got != -9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-9223372036854775808 = %d, wanted -9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(9223372036854775806); got != 2 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s9223372036854775806 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(9223372036854775806); got != -2 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-9223372036854775808 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775808_int64_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s9223372036854775807 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775808_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-9223372036854775808 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(-4294967296); got != -9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-4294967296 = %d, wanted -9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(-4294967296); got != 9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-9223372036854775807 = %d, wanted 9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(-1); got != -9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-1 = %d, wanted -9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(-1); got != 9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 -1%s-9223372036854775807 = %d, wanted 9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(0); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s0 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(0); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 0%s-9223372036854775807 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 1%s-9223372036854775807 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(4294967296); got != 9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s4294967296 = %d, wanted 9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(4294967296); got != -9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-9223372036854775807 = %d, wanted -9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(9223372036854775806); got != 3 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s9223372036854775806 = %d, wanted 3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(9223372036854775806); got != -3 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-9223372036854775807 = %d, wanted -3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg9223372036854775807_int64_ssa(9223372036854775807); got != 2 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s9223372036854775807 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg9223372036854775807_ssa(9223372036854775807); got != -2 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-9223372036854775807 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(-9223372036854775808); got != 9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-9223372036854775808 = %d, wanted 9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(-9223372036854775808); got != -9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-4294967296 = %d, wanted -9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(-9223372036854775807); got != 9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-9223372036854775807 = %d, wanted 9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(-9223372036854775807); got != -9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-4294967296 = %d, wanted -9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-4294967296 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-4294967296 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(-1); got != -4294967295 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-1 = %d, wanted -4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(-1); got != 4294967295 {\n\t\tfmt.Printf(\"sub_int64 -1%s-4294967296 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(0); got != -4294967296 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s0 = %d, wanted -4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"sub_int64 0%s-4294967296 = %d, wanted 4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(1); got != -4294967297 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s1 = %d, wanted -4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(1); got != 4294967297 {\n\t\tfmt.Printf(\"sub_int64 1%s-4294967296 = %d, wanted 4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(4294967296); got != -8589934592 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s4294967296 = %d, wanted -8589934592\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-4294967296 = %d, wanted 8589934592\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(9223372036854775806); got != 9223372032559808514 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s9223372036854775806 = %d, wanted 9223372032559808514\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(9223372036854775806); got != -9223372032559808514 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-4294967296 = %d, wanted -9223372032559808514\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg4294967296_int64_ssa(9223372036854775807); got != 9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s9223372036854775807 = %d, wanted 9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg4294967296_ssa(9223372036854775807); got != -9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-4294967296 = %d, wanted -9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(-9223372036854775808); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -1%s-9223372036854775808 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(-9223372036854775808); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s-1 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(-9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 -1%s-9223372036854775807 = %d, wanted 9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(-9223372036854775807); got != -9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s-1 = %d, wanted -9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(-4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"sub_int64 -1%s-4294967296 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(-4294967296); got != -4294967295 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s-1 = %d, wanted -4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int64 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int64 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int64 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(1); got != -2 {\n\t\tfmt.Printf(\"sub_int64 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_int64 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(4294967296); got != -4294967297 {\n\t\tfmt.Printf(\"sub_int64 -1%s4294967296 = %d, wanted -4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(4294967296); got != 4294967297 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-1 = %d, wanted 4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(9223372036854775806); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -1%s9223372036854775806 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(9223372036854775806); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-1 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int64_ssa(9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 -1%s9223372036854775807 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_Neg1_ssa(9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-1 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 0%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s0 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(-9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 0%s-9223372036854775807 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(-9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s0 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(-4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"sub_int64 0%s-4294967296 = %d, wanted 4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s0 = %d, wanted -4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"sub_int64 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"sub_int64 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int64 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int64 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(1); got != -1 {\n\t\tfmt.Printf(\"sub_int64 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_int64 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"sub_int64 0%s4294967296 = %d, wanted -4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s0 = %d, wanted 4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(9223372036854775806); got != -9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 0%s9223372036854775806 = %d, wanted -9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s0 = %d, wanted 9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int64_ssa(9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 0%s9223372036854775807 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_0_ssa(9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s0 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(-9223372036854775808); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 1%s-9223372036854775808 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(-9223372036854775808); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s1 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(-9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 1%s-9223372036854775807 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(-9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(-4294967296); got != 4294967297 {\n\t\tfmt.Printf(\"sub_int64 1%s-4294967296 = %d, wanted 4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(-4294967296); got != -4294967297 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s1 = %d, wanted -4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(-1); got != 2 {\n\t\tfmt.Printf(\"sub_int64 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"sub_int64 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int64 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int64 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int64 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int64 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(4294967296); got != -4294967295 {\n\t\tfmt.Printf(\"sub_int64 1%s4294967296 = %d, wanted -4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s1 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(9223372036854775806); got != -9223372036854775805 {\n\t\tfmt.Printf(\"sub_int64 1%s9223372036854775806 = %d, wanted -9223372036854775805\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(9223372036854775806); got != 9223372036854775805 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s1 = %d, wanted 9223372036854775805\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int64_ssa(9223372036854775807); got != -9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 1%s9223372036854775807 = %d, wanted -9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_1_ssa(9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s1 = %d, wanted 9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(-9223372036854775808); got != -9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-9223372036854775808 = %d, wanted -9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(-9223372036854775808); got != 9223372032559808512 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s4294967296 = %d, wanted 9223372032559808512\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(-9223372036854775807); got != -9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-9223372036854775807 = %d, wanted -9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(-9223372036854775807); got != 9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s4294967296 = %d, wanted 9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(-4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-4294967296 = %d, wanted 8589934592\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(-4294967296); got != -8589934592 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s4294967296 = %d, wanted -8589934592\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(-1); got != 4294967297 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s-1 = %d, wanted 4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(-1); got != -4294967297 {\n\t\tfmt.Printf(\"sub_int64 -1%s4294967296 = %d, wanted -4294967297\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(0); got != 4294967296 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s0 = %d, wanted 4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(0); got != -4294967296 {\n\t\tfmt.Printf(\"sub_int64 0%s4294967296 = %d, wanted -4294967296\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(1); got != 4294967295 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s1 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(1); got != -4294967295 {\n\t\tfmt.Printf(\"sub_int64 1%s4294967296 = %d, wanted -4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s4294967296 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s4294967296 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(9223372036854775806); got != -9223372032559808510 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s9223372036854775806 = %d, wanted -9223372032559808510\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(9223372036854775806); got != 9223372032559808510 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s4294967296 = %d, wanted 9223372032559808510\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967296_int64_ssa(9223372036854775807); got != -9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s9223372036854775807 = %d, wanted -9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_4294967296_ssa(9223372036854775807); got != 9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s4294967296 = %d, wanted 9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(-9223372036854775808); got != -2 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-9223372036854775808 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(-9223372036854775808); got != 2 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s9223372036854775806 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(-9223372036854775807); got != -3 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-9223372036854775807 = %d, wanted -3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(-9223372036854775807); got != 3 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s9223372036854775806 = %d, wanted 3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(-4294967296); got != -9223372032559808514 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-4294967296 = %d, wanted -9223372032559808514\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(-4294967296); got != 9223372032559808514 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s9223372036854775806 = %d, wanted 9223372032559808514\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(-1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s-1 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(-1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 -1%s9223372036854775806 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(0); got != 9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s0 = %d, wanted 9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(0); got != -9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 0%s9223372036854775806 = %d, wanted -9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(1); got != 9223372036854775805 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s1 = %d, wanted 9223372036854775805\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(1); got != -9223372036854775805 {\n\t\tfmt.Printf(\"sub_int64 1%s9223372036854775806 = %d, wanted -9223372036854775805\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(4294967296); got != 9223372032559808510 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s4294967296 = %d, wanted 9223372032559808510\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(4294967296); got != -9223372032559808510 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s9223372036854775806 = %d, wanted -9223372032559808510\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s9223372036854775806 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s9223372036854775806 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775806_int64_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s9223372036854775807 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775806_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s9223372036854775806 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-9223372036854775808 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775808%s9223372036854775807 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(-9223372036854775807); got != -2 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-9223372036854775807 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(-9223372036854775807); got != 2 {\n\t\tfmt.Printf(\"sub_int64 -9223372036854775807%s9223372036854775807 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(-4294967296); got != -9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-4294967296 = %d, wanted -9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(-4294967296); got != 9223372032559808513 {\n\t\tfmt.Printf(\"sub_int64 -4294967296%s9223372036854775807 = %d, wanted 9223372032559808513\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(-1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s-1 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(-1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"sub_int64 -1%s9223372036854775807 = %d, wanted -9223372036854775808\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(0); got != 9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s0 = %d, wanted 9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(0); got != -9223372036854775807 {\n\t\tfmt.Printf(\"sub_int64 0%s9223372036854775807 = %d, wanted -9223372036854775807\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(1); got != 9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s1 = %d, wanted 9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(1); got != -9223372036854775806 {\n\t\tfmt.Printf(\"sub_int64 1%s9223372036854775807 = %d, wanted -9223372036854775806\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(4294967296); got != 9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s4294967296 = %d, wanted 9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(4294967296); got != -9223372032559808511 {\n\t\tfmt.Printf(\"sub_int64 4294967296%s9223372036854775807 = %d, wanted -9223372032559808511\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(9223372036854775806); got != 1 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s9223372036854775806 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(9223372036854775806); got != -1 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775806%s9223372036854775807 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_9223372036854775807_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int64_9223372036854775807_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"sub_int64 9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(-4294967296); got != 2147483648 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-4294967296 = %d, wanted 2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(-1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-1 = %d, wanted -9223372036854775808\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s1 = %d, wanted -9223372036854775808\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(4294967296); got != -2147483648 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s4294967296 = %d, wanted -2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(9223372036854775806); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s9223372036854775806 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775808_int64_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775808_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(-4294967296); got != 2147483647 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-4294967296 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(-1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-1 = %d, wanted 9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(4294967296); got != -2147483647 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s4294967296 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(9223372036854775806); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s9223372036854775806 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg9223372036854775807_int64_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s9223372036854775807 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg9223372036854775807_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-9223372036854775807 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(-9223372036854775808); got != 2147483648 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-4294967296 = %d, wanted 2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(-9223372036854775807); got != 2147483647 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-4294967296 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(-4294967296); got != 1 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-4294967296 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(-4294967296); got != 1 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-4294967296 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(-1); got != 4294967296 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-1 = %d, wanted 4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s-4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(1); got != -4294967296 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s1 = %d, wanted -4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s-4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(4294967296); got != -1 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s4294967296 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(4294967296); got != -1 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-4294967296 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(9223372036854775806); got != -2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-4294967296 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg4294967296_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg4294967296_ssa(9223372036854775807); got != -2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-4294967296 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s-1 = %d, wanted -9223372036854775808\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(-9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s-1 = %d, wanted 9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s-4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(-4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s-1 = %d, wanted 4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int64 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int64 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int64 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int64 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-1 = %d, wanted -4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(9223372036854775806); got != -9223372036854775806 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-1 = %d, wanted -9223372036854775806\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_Neg1_ssa(9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-1 = %d, wanted -9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s1 = %d, wanted -9223372036854775808\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(-9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s-4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s1 = %d, wanted -4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int64 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int64 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int64 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int64 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"div_int64 4294967296%s1 = %d, wanted 4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s1 = %d, wanted 9223372036854775806\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_1_ssa(9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s1 = %d, wanted 9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(-9223372036854775808); got != -2147483648 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s4294967296 = %d, wanted -2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(-9223372036854775807); got != -2147483647 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s4294967296 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(-4294967296); got != -1 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-4294967296 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(-4294967296); got != -1 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s4294967296 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(-1); got != -4294967296 {\n\t\tfmt.Printf(\"div_int64 4294967296%s-1 = %d, wanted -4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(1); got != 4294967296 {\n\t\tfmt.Printf(\"div_int64 4294967296%s1 = %d, wanted 4294967296\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s4294967296 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(4294967296); got != 1 {\n\t\tfmt.Printf(\"div_int64 4294967296%s4294967296 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(4294967296); got != 1 {\n\t\tfmt.Printf(\"div_int64 4294967296%s4294967296 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(9223372036854775806); got != 2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s4294967296 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967296_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_4294967296_ssa(9223372036854775807); got != 2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s4294967296 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s9223372036854775806 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s9223372036854775806 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(-4294967296); got != -2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-4294967296 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(-1); got != -9223372036854775806 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s-1 = %d, wanted -9223372036854775806\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(1); got != 9223372036854775806 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s1 = %d, wanted 9223372036854775806\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(4294967296); got != 2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s4294967296 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s9223372036854775806 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(9223372036854775806); got != 1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s9223372036854775806 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(9223372036854775806); got != 1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s9223372036854775806 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775806_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775806_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s9223372036854775806 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-9223372036854775808 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-9223372036854775807 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"div_int64 -9223372036854775807%s9223372036854775807 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(-4294967296); got != -2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-4294967296 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 -4294967296%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(-1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s-1 = %d, wanted -9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int64 -1%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int64 0%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s1 = %d, wanted 9223372036854775807\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int64 1%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(4294967296); got != 2147483647 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s4294967296 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"div_int64 4294967296%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(9223372036854775806); got != 1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s9223372036854775806 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"div_int64 9223372036854775806%s9223372036854775807 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_9223372036854775807_int64_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s9223372036854775807 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int64_9223372036854775807_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"div_int64 9223372036854775807%s9223372036854775807 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(-9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(-9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(-1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-1 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(-1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -1%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s1 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(1); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 1%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s9223372036854775806 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775808_int64_ssa(9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775808_ssa(9223372036854775807); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-9223372036854775807 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(-1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-1 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(-1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -1%s-9223372036854775807 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-9223372036854775807 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 1%s-9223372036854775807 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-9223372036854775807 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s9223372036854775806 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-9223372036854775807 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg9223372036854775807_int64_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s9223372036854775807 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg9223372036854775807_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-9223372036854775807 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(-9223372036854775807); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-9223372036854775807 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(-9223372036854775807); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(-1); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-1 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(-1); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -1%s-4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(1); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s1 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(1); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 1%s-4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(9223372036854775806); got != 8589934592 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s9223372036854775806 = %d, wanted 8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(9223372036854775806); got != 8589934592 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-4294967296 = %d, wanted 8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg4294967296_int64_ssa(9223372036854775807); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s9223372036854775807 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg4294967296_ssa(9223372036854775807); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -1%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s-1 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(-9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -1%s-9223372036854775807 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(-9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s-1 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(-4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -1%s-4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(-4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s-1 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int64 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int64 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int64 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int64 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -1%s4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-1 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(9223372036854775806); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 -1%s9223372036854775806 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(9223372036854775806); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-1 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int64_ssa(9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -1%s9223372036854775807 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_Neg1_ssa(9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-1 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-9223372036854775807 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int64 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s9223372036854775806 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s9223372036854775807 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_0_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 1%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s1 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(-9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 1%s-9223372036854775807 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(-9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s1 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 1%s-4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s1 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int64 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int64 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int64 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int64 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 1%s4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s1 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 1%s9223372036854775806 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s1 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int64_ssa(9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 1%s9223372036854775807 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_1_ssa(9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s1 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(-9223372036854775807); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-9223372036854775807 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(-9223372036854775807); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(-1); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s-1 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(-1); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 -1%s4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(1); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s1 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(1); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 1%s4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s4294967296 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(9223372036854775806); got != -8589934592 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s9223372036854775806 = %d, wanted -8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(9223372036854775806); got != -8589934592 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s4294967296 = %d, wanted -8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967296_int64_ssa(9223372036854775807); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s9223372036854775807 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_4294967296_ssa(9223372036854775807); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-9223372036854775808 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s9223372036854775806 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(-9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-9223372036854775807 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(-9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s9223372036854775806 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(-4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-4294967296 = %d, wanted 8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(-4294967296); got != 8589934592 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s9223372036854775806 = %d, wanted 8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(-1); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s-1 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(-1); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 -1%s9223372036854775806 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s9223372036854775806 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(1); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s1 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(1); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 1%s9223372036854775806 = %d, wanted 9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(4294967296); got != -8589934592 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s4294967296 = %d, wanted -8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(4294967296); got != -8589934592 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s9223372036854775806 = %d, wanted -8589934592\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(9223372036854775806); got != 4 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s9223372036854775806 = %d, wanted 4\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(9223372036854775806); got != 4 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s9223372036854775806 = %d, wanted 4\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775806_int64_ssa(9223372036854775807); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s9223372036854775807 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775806_ssa(9223372036854775807); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s9223372036854775806 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-9223372036854775808 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(-9223372036854775808); got != -9223372036854775808 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -9223372036854775808\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-9223372036854775807 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mul_int64 -9223372036854775807%s9223372036854775807 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(-4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-4294967296 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(-4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mul_int64 -4294967296%s9223372036854775807 = %d, wanted 4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(-1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s-1 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(-1); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 -1%s9223372036854775807 = %d, wanted -9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int64 0%s9223372036854775807 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s1 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(1); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mul_int64 1%s9223372036854775807 = %d, wanted 9223372036854775807\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s4294967296 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mul_int64 4294967296%s9223372036854775807 = %d, wanted -4294967296\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(9223372036854775806); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s9223372036854775806 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(9223372036854775806); got != -9223372036854775806 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775806%s9223372036854775807 = %d, wanted -9223372036854775806\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_9223372036854775807_int64_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s9223372036854775807 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int64_9223372036854775807_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"mul_int64 9223372036854775807%s9223372036854775807 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-9223372036854775808 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(-9223372036854775807); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted -9223372036854775807\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-9223372036854775808 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s-9223372036854775808 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-9223372036854775808 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s-9223372036854775808 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-9223372036854775808 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(9223372036854775806); got != -2 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s9223372036854775806 = %d, wanted -2\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-9223372036854775808 = %d, wanted 9223372036854775806\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775808_int64_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775808_ssa(9223372036854775807); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-9223372036854775808 = %d, wanted 9223372036854775807\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(-9223372036854775808); got != -9223372036854775807 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-9223372036854775808 = %d, wanted -9223372036854775807\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(-4294967296); got != -4294967295 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-4294967296 = %d, wanted -4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-9223372036854775807 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s-9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s-9223372036854775807 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(4294967296); got != -4294967295 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s4294967296 = %d, wanted -4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-9223372036854775807 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(9223372036854775806); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s9223372036854775806 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-9223372036854775807 = %d, wanted 9223372036854775806\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg9223372036854775807_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg9223372036854775807_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(-9223372036854775808); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-9223372036854775808 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(-9223372036854775807); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-9223372036854775807 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(-9223372036854775807); got != -4294967295 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-4294967296 = %d, wanted -4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s-4294967296 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s-4294967296 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(9223372036854775806); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s9223372036854775806 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(9223372036854775806); got != 4294967294 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-4294967296 = %d, wanted 4294967294\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg4294967296_int64_ssa(9223372036854775807); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s9223372036854775807 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg4294967296_ssa(9223372036854775807); got != 4294967295 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-4294967296 = %d, wanted 4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s-9223372036854775808 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s-9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(-4294967296); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s-4294967296 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(4294967296); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s4294967296 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(9223372036854775806); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s9223372036854775806 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int64_ssa(9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_Neg1_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-9223372036854775808 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s9223372036854775806 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(-9223372036854775808); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s-9223372036854775808 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(-9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s-9223372036854775807 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(-4294967296); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s-4294967296 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(4294967296); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s4294967296 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(9223372036854775806); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s9223372036854775806 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int64_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s9223372036854775807 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_1_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(-9223372036854775808); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-9223372036854775808 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(-9223372036854775808); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(-9223372036854775807); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-9223372036854775807 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(-9223372036854775807); got != -4294967295 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s4294967296 = %d, wanted -4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(-4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s4294967296 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s4294967296 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(4294967296); got != 0 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s4294967296 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(9223372036854775806); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s9223372036854775806 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(9223372036854775806); got != 4294967294 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s4294967296 = %d, wanted 4294967294\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967296_int64_ssa(9223372036854775807); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s9223372036854775807 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_4294967296_ssa(9223372036854775807); got != 4294967295 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s4294967296 = %d, wanted 4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(-9223372036854775808); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-9223372036854775808 = %d, wanted 9223372036854775806\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(-9223372036854775808); got != -2 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s9223372036854775806 = %d, wanted -2\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(-9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-9223372036854775807 = %d, wanted 9223372036854775806\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(-9223372036854775807); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s9223372036854775806 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(-4294967296); got != 4294967294 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-4294967296 = %d, wanted 4294967294\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s9223372036854775806 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s9223372036854775806 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s9223372036854775806 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s9223372036854775806 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(4294967296); got != 4294967294 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s4294967296 = %d, wanted 4294967294\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s9223372036854775806 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s9223372036854775806 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(9223372036854775806); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s9223372036854775806 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775806_int64_ssa(9223372036854775807); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s9223372036854775807 = %d, wanted 9223372036854775806\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775806_ssa(9223372036854775807); got != 1 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s9223372036854775806 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(-9223372036854775808); got != 9223372036854775807 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-9223372036854775808 = %d, wanted 9223372036854775807\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(-9223372036854775808); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775808%s9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(-9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 -9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(-4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-4294967296 = %d, wanted 4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(-4294967296); got != -4294967296 {\n\t\tfmt.Printf(\"mod_int64 -4294967296%s9223372036854775807 = %d, wanted -4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int64 -1%s9223372036854775807 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int64 0%s9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int64 1%s9223372036854775807 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(4294967296); got != 4294967295 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s4294967296 = %d, wanted 4294967295\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(4294967296); got != 4294967296 {\n\t\tfmt.Printf(\"mod_int64 4294967296%s9223372036854775807 = %d, wanted 4294967296\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(9223372036854775806); got != 1 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s9223372036854775806 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(9223372036854775806); got != 9223372036854775806 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775806%s9223372036854775807 = %d, wanted 9223372036854775806\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_9223372036854775807_int64_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int64_9223372036854775807_ssa(9223372036854775807); got != 0 {\n\t\tfmt.Printf(\"mod_int64 9223372036854775807%s9223372036854775807 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint32 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint32 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint32_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint32 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint32 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint32_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint32 0%s4294967295 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_0_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint32_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint32 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint32 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint32_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint32 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint32 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"add_uint32 1%s4294967295 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_1_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"add_uint32 4294967295%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967295_uint32_ssa(0); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_4294967295_ssa(0); got != 4294967295 {\n\t\tfmt.Printf(\"add_uint32 0%s4294967295 = %d, wanted 4294967295\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967295_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint32 4294967295%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_4294967295_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint32 1%s4294967295 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_4294967295_uint32_ssa(4294967295); got != 4294967294 {\n\t\tfmt.Printf(\"add_uint32 4294967295%s4294967295 = %d, wanted 4294967294\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint32_4294967295_ssa(4294967295); got != 4294967294 {\n\t\tfmt.Printf(\"add_uint32 4294967295%s4294967295 = %d, wanted 4294967294\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint32 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint32 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint32_ssa(1); got != 4294967295 {\n\t\tfmt.Printf(\"sub_uint32 0%s1 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_uint32 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint32_ssa(4294967295); got != 1 {\n\t\tfmt.Printf(\"sub_uint32 0%s4294967295 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_0_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"sub_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint32_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint32 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_1_ssa(0); got != 4294967295 {\n\t\tfmt.Printf(\"sub_uint32 0%s1 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint32 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint32 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint32_ssa(4294967295); got != 2 {\n\t\tfmt.Printf(\"sub_uint32 1%s4294967295 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_1_ssa(4294967295); got != 4294967294 {\n\t\tfmt.Printf(\"sub_uint32 4294967295%s1 = %d, wanted 4294967294\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967295_uint32_ssa(0); got != 4294967295 {\n\t\tfmt.Printf(\"sub_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_4294967295_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint32 0%s4294967295 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967295_uint32_ssa(1); got != 4294967294 {\n\t\tfmt.Printf(\"sub_uint32 4294967295%s1 = %d, wanted 4294967294\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_4294967295_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_uint32 1%s4294967295 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_4294967295_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"sub_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint32_4294967295_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"sub_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint32 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"div_uint32 0%s4294967295 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint32 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint32_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint32 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint32_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint32 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"div_uint32 1%s4294967295 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint32_1_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"div_uint32 4294967295%s1 = %d, wanted 4294967295\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint32_4294967295_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint32 0%s4294967295 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967295_uint32_ssa(1); got != 4294967295 {\n\t\tfmt.Printf(\"div_uint32 4294967295%s1 = %d, wanted 4294967295\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint32_4294967295_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint32 1%s4294967295 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_4294967295_uint32_ssa(4294967295); got != 1 {\n\t\tfmt.Printf(\"div_uint32 4294967295%s4294967295 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint32_4294967295_ssa(4294967295); got != 1 {\n\t\tfmt.Printf(\"div_uint32 4294967295%s4294967295 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 0%s4294967295 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_0_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 4294967295%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint32_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint32 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint32 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint32_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"mul_uint32 1%s4294967295 = %d, wanted 4294967295\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_1_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"mul_uint32 4294967295%s1 = %d, wanted 4294967295\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967295_uint32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 4294967295%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_4294967295_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint32 0%s4294967295 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967295_uint32_ssa(1); got != 4294967295 {\n\t\tfmt.Printf(\"mul_uint32 4294967295%s1 = %d, wanted 4294967295\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_4294967295_ssa(1); got != 4294967295 {\n\t\tfmt.Printf(\"mul_uint32 1%s4294967295 = %d, wanted 4294967295\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_4294967295_uint32_ssa(4294967295); got != 1 {\n\t\tfmt.Printf(\"mul_uint32 4294967295%s4294967295 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint32_4294967295_ssa(4294967295); got != 1 {\n\t\tfmt.Printf(\"mul_uint32 4294967295%s4294967295 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"lsh_uint32 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 0%s4294967295 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_0_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"lsh_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint32_ssa(0); got != 1 {\n\t\tfmt.Printf(\"lsh_uint32 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint32_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint32 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint32 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 1%s4294967295 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_1_ssa(4294967295); got != 4294967294 {\n\t\tfmt.Printf(\"lsh_uint32 4294967295%s1 = %d, wanted 4294967294\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_4294967295_uint32_ssa(0); got != 4294967295 {\n\t\tfmt.Printf(\"lsh_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_4294967295_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 0%s4294967295 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_4294967295_uint32_ssa(1); got != 4294967294 {\n\t\tfmt.Printf(\"lsh_uint32 4294967295%s1 = %d, wanted 4294967294\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_4294967295_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 1%s4294967295 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_4294967295_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint32_4294967295_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"lsh_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"rsh_uint32 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 0%s4294967295 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_0_ssa(4294967295); got != 4294967295 {\n\t\tfmt.Printf(\"rsh_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint32_ssa(0); got != 1 {\n\t\tfmt.Printf(\"rsh_uint32 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 1%s4294967295 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_1_ssa(4294967295); got != 2147483647 {\n\t\tfmt.Printf(\"rsh_uint32 4294967295%s1 = %d, wanted 2147483647\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_4294967295_uint32_ssa(0); got != 4294967295 {\n\t\tfmt.Printf(\"rsh_uint32 4294967295%s0 = %d, wanted 4294967295\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_4294967295_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 0%s4294967295 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_4294967295_uint32_ssa(1); got != 2147483647 {\n\t\tfmt.Printf(\"rsh_uint32 4294967295%s1 = %d, wanted 2147483647\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_4294967295_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 1%s4294967295 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_4294967295_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint32_4294967295_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"rsh_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 0%s4294967295 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint32_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint32_ssa(4294967295); got != 1 {\n\t\tfmt.Printf(\"mod_uint32 1%s4294967295 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint32_1_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 4294967295%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint32_4294967295_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 0%s4294967295 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967295_uint32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 4294967295%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint32_4294967295_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_uint32 1%s4294967295 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_4294967295_uint32_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint32_4294967295_ssa(4294967295); got != 0 {\n\t\tfmt.Printf(\"mod_uint32 4294967295%s4294967295 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483648_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483648_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483648_int32_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s-2147483647 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483648_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s-2147483648 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483648_int32_ssa(-1); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s-1 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483648_ssa(-1); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 -1%s-2147483648 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483648_int32_ssa(0); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s0 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483648_ssa(0); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 0%s-2147483648 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483648_int32_ssa(1); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s1 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483648_ssa(1); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 1%s-2147483648 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483648_int32_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s2147483647 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483648_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"add_int32 2147483647%s-2147483648 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483647_int32_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s-2147483648 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483647_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s-2147483647 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483647_int32_ssa(-2147483647); got != 2 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s-2147483647 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483647_ssa(-2147483647); got != 2 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s-2147483647 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483647_int32_ssa(-1); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s-1 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483647_ssa(-1); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 -1%s-2147483647 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483647_int32_ssa(0); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s0 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483647_ssa(0); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 0%s-2147483647 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483647_int32_ssa(1); got != -2147483646 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s1 = %d, wanted -2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483647_ssa(1); got != -2147483646 {\n\t\tfmt.Printf(\"add_int32 1%s-2147483647 = %d, wanted -2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg2147483647_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s2147483647 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg2147483647_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"add_int32 2147483647%s-2147483647 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int32_ssa(-2147483648); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 -1%s-2147483648 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg1_ssa(-2147483648); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s-1 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int32_ssa(-2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 -1%s-2147483647 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg1_ssa(-2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s-1 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int32_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int32 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int32 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int32_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int32 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int32 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int32 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int32 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int32_ssa(2147483647); got != 2147483646 {\n\t\tfmt.Printf(\"add_int32 -1%s2147483647 = %d, wanted 2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_Neg1_ssa(2147483647); got != 2147483646 {\n\t\tfmt.Printf(\"add_int32 2147483647%s-1 = %d, wanted 2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int32_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 0%s-2147483648 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_0_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s0 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int32_ssa(-2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 0%s-2147483647 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_0_ssa(-2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s0 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int32_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int32 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int32 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int32 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int32 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int32_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int32 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int32 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int32_ssa(2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 0%s2147483647 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_0_ssa(2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 2147483647%s0 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int32_ssa(-2147483648); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 1%s-2147483648 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_1_ssa(-2147483648); got != -2147483647 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s1 = %d, wanted -2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int32_ssa(-2147483647); got != -2147483646 {\n\t\tfmt.Printf(\"add_int32 1%s-2147483647 = %d, wanted -2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_1_ssa(-2147483647); got != -2147483646 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s1 = %d, wanted -2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int32 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int32 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int32_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int32 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int32 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int32_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int32 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int32 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int32_ssa(2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 1%s2147483647 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_1_ssa(2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 2147483647%s1 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_2147483647_int32_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"add_int32 2147483647%s-2147483648 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_2147483647_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"add_int32 -2147483648%s2147483647 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_2147483647_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"add_int32 2147483647%s-2147483647 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_2147483647_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"add_int32 -2147483647%s2147483647 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_2147483647_int32_ssa(-1); got != 2147483646 {\n\t\tfmt.Printf(\"add_int32 2147483647%s-1 = %d, wanted 2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_2147483647_ssa(-1); got != 2147483646 {\n\t\tfmt.Printf(\"add_int32 -1%s2147483647 = %d, wanted 2147483646\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_2147483647_int32_ssa(0); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 2147483647%s0 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_2147483647_ssa(0); got != 2147483647 {\n\t\tfmt.Printf(\"add_int32 0%s2147483647 = %d, wanted 2147483647\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_2147483647_int32_ssa(1); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 2147483647%s1 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_2147483647_ssa(1); got != -2147483648 {\n\t\tfmt.Printf(\"add_int32 1%s2147483647 = %d, wanted -2147483648\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_2147483647_int32_ssa(2147483647); got != -2 {\n\t\tfmt.Printf(\"add_int32 2147483647%s2147483647 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int32_2147483647_ssa(2147483647); got != -2 {\n\t\tfmt.Printf(\"add_int32 2147483647%s2147483647 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483648_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483648_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483648_int32_ssa(-2147483647); got != -1 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s-2147483647 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483648_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s-2147483648 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483648_int32_ssa(-1); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s-1 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483648_ssa(-1); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 -1%s-2147483648 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483648_int32_ssa(0); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s0 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483648_ssa(0); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 0%s-2147483648 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483648_int32_ssa(1); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s1 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483648_ssa(1); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 1%s-2147483648 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483648_int32_ssa(2147483647); got != 1 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s2147483647 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483648_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s-2147483648 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483647_int32_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s-2147483648 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483647_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s-2147483647 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483647_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s-2147483647 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483647_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s-2147483647 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483647_int32_ssa(-1); got != -2147483646 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s-1 = %d, wanted -2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483647_ssa(-1); got != 2147483646 {\n\t\tfmt.Printf(\"sub_int32 -1%s-2147483647 = %d, wanted 2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483647_int32_ssa(0); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s0 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483647_ssa(0); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 0%s-2147483647 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483647_int32_ssa(1); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s1 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483647_ssa(1); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 1%s-2147483647 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg2147483647_int32_ssa(2147483647); got != 2 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s2147483647 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg2147483647_ssa(2147483647); got != -2 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s-2147483647 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int32_ssa(-2147483648); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 -1%s-2147483648 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg1_ssa(-2147483648); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s-1 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int32_ssa(-2147483647); got != 2147483646 {\n\t\tfmt.Printf(\"sub_int32 -1%s-2147483647 = %d, wanted 2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg1_ssa(-2147483647); got != -2147483646 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s-1 = %d, wanted -2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int32 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int32 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int32_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int32 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int32 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int32_ssa(1); got != -2 {\n\t\tfmt.Printf(\"sub_int32 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_int32 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int32_ssa(2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 -1%s2147483647 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_Neg1_ssa(2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s-1 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int32_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 0%s-2147483648 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_0_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s0 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int32_ssa(-2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 0%s-2147483647 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_0_ssa(-2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s0 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int32_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"sub_int32 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"sub_int32 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int32 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int32 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int32_ssa(1); got != -1 {\n\t\tfmt.Printf(\"sub_int32 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_int32 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int32_ssa(2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 0%s2147483647 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_0_ssa(2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s0 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int32_ssa(-2147483648); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 1%s-2147483648 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_1_ssa(-2147483648); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s1 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int32_ssa(-2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 1%s-2147483647 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_1_ssa(-2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s1 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int32_ssa(-1); got != 2 {\n\t\tfmt.Printf(\"sub_int32 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"sub_int32 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int32_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int32 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int32 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int32 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int32 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int32_ssa(2147483647); got != -2147483646 {\n\t\tfmt.Printf(\"sub_int32 1%s2147483647 = %d, wanted -2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_1_ssa(2147483647); got != 2147483646 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s1 = %d, wanted 2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_2147483647_int32_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s-2147483648 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_2147483647_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"sub_int32 -2147483648%s2147483647 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_2147483647_int32_ssa(-2147483647); got != -2 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s-2147483647 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_2147483647_ssa(-2147483647); got != 2 {\n\t\tfmt.Printf(\"sub_int32 -2147483647%s2147483647 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_2147483647_int32_ssa(-1); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s-1 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_2147483647_ssa(-1); got != -2147483648 {\n\t\tfmt.Printf(\"sub_int32 -1%s2147483647 = %d, wanted -2147483648\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_2147483647_int32_ssa(0); got != 2147483647 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s0 = %d, wanted 2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_2147483647_ssa(0); got != -2147483647 {\n\t\tfmt.Printf(\"sub_int32 0%s2147483647 = %d, wanted -2147483647\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_2147483647_int32_ssa(1); got != 2147483646 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s1 = %d, wanted 2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_2147483647_ssa(1); got != -2147483646 {\n\t\tfmt.Printf(\"sub_int32 1%s2147483647 = %d, wanted -2147483646\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_2147483647_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s2147483647 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int32_2147483647_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"sub_int32 2147483647%s2147483647 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483648_int32_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s-2147483648 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483648_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s-2147483648 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483648_int32_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s-2147483647 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483648_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483648_int32_ssa(-1); got != -2147483648 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s-1 = %d, wanted -2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483648_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int32 -1%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483648_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483648_int32_ssa(1); got != -2147483648 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s1 = %d, wanted -2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483648_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int32 1%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483648_int32_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s2147483647 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483648_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 2147483647%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483647_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483647_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s-2147483647 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483647_int32_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s-2147483647 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483647_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s-2147483647 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483647_int32_ssa(-1); got != 2147483647 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s-1 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483647_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int32 -1%s-2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483647_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s-2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483647_int32_ssa(1); got != -2147483647 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s1 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483647_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int32 1%s-2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg2147483647_int32_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s2147483647 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg2147483647_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"div_int32 2147483647%s-2147483647 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"div_int32 -1%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg1_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s-1 = %d, wanted -2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 -1%s-2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg1_ssa(-2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s-1 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int32_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int32 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int32 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int32_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int32 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int32 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 -1%s2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_Neg1_ssa(2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"div_int32 2147483647%s-1 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s-2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"div_int32 1%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_1_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s1 = %d, wanted -2147483648\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 1%s-2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_1_ssa(-2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s1 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int32_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int32 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int32 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int32_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int32 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int32 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"div_int32 1%s2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_1_ssa(2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"div_int32 2147483647%s1 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_2147483647_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"div_int32 2147483647%s-2147483648 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_2147483647_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"div_int32 -2147483648%s2147483647 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_2147483647_int32_ssa(-2147483647); got != -1 {\n\t\tfmt.Printf(\"div_int32 2147483647%s-2147483647 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_2147483647_ssa(-2147483647); got != -1 {\n\t\tfmt.Printf(\"div_int32 -2147483647%s2147483647 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_2147483647_int32_ssa(-1); got != -2147483647 {\n\t\tfmt.Printf(\"div_int32 2147483647%s-1 = %d, wanted -2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_2147483647_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int32 -1%s2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_2147483647_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int32 0%s2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_2147483647_int32_ssa(1); got != 2147483647 {\n\t\tfmt.Printf(\"div_int32 2147483647%s1 = %d, wanted 2147483647\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_2147483647_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int32 1%s2147483647 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_2147483647_int32_ssa(2147483647); got != 1 {\n\t\tfmt.Printf(\"div_int32 2147483647%s2147483647 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int32_2147483647_ssa(2147483647); got != 1 {\n\t\tfmt.Printf(\"div_int32 2147483647%s2147483647 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483648_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483648_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483648_int32_ssa(-2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s-2147483647 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483648_ssa(-2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483648_int32_ssa(-1); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s-1 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483648_ssa(-1); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -1%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483648_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483648_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s-2147483648 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483648_int32_ssa(1); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s1 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483648_ssa(1); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 1%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483648_int32_ssa(2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s2147483647 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483648_ssa(2147483647); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483647_int32_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483647_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s-2147483647 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483647_int32_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s-2147483647 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483647_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s-2147483647 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483647_int32_ssa(-1); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s-1 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483647_ssa(-1); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 -1%s-2147483647 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483647_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483647_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s-2147483647 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483647_int32_ssa(1); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s1 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483647_ssa(1); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 1%s-2147483647 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg2147483647_int32_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s2147483647 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg2147483647_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s-2147483647 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int32_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -1%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg1_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s-1 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int32_ssa(-2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 -1%s-2147483647 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg1_ssa(-2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s-1 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int32_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int32 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int32 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int32_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int32 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int32 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int32_ssa(2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 -1%s2147483647 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_Neg1_ssa(2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s-1 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s-2147483648 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_0_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s-2147483647 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_0_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_0_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int32 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int32 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s2147483647 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_0_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int32_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 1%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_1_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s1 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int32_ssa(-2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 1%s-2147483647 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_1_ssa(-2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s1 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int32_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int32 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int32 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int32_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int32 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int32 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int32_ssa(2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 1%s2147483647 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_1_ssa(2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s1 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_2147483647_int32_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s-2147483648 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_2147483647_ssa(-2147483648); got != -2147483648 {\n\t\tfmt.Printf(\"mul_int32 -2147483648%s2147483647 = %d, wanted -2147483648\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_2147483647_int32_ssa(-2147483647); got != -1 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s-2147483647 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_2147483647_ssa(-2147483647); got != -1 {\n\t\tfmt.Printf(\"mul_int32 -2147483647%s2147483647 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_2147483647_int32_ssa(-1); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s-1 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_2147483647_ssa(-1); got != -2147483647 {\n\t\tfmt.Printf(\"mul_int32 -1%s2147483647 = %d, wanted -2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_2147483647_int32_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_2147483647_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int32 0%s2147483647 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_2147483647_int32_ssa(1); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s1 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_2147483647_ssa(1); got != 2147483647 {\n\t\tfmt.Printf(\"mul_int32 1%s2147483647 = %d, wanted 2147483647\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_2147483647_int32_ssa(2147483647); got != 1 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s2147483647 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int32_2147483647_ssa(2147483647); got != 1 {\n\t\tfmt.Printf(\"mul_int32 2147483647%s2147483647 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483648_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483648_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s-2147483648 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483648_int32_ssa(-2147483647); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s-2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483648_ssa(-2147483647); got != -2147483647 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s-2147483648 = %d, wanted -2147483647\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483648_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483648_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -1%s-2147483648 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483648_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s-2147483648 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483648_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483648_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int32 1%s-2147483648 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483648_int32_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483648_ssa(2147483647); got != 2147483647 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s-2147483648 = %d, wanted 2147483647\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483647_int32_ssa(-2147483648); got != -2147483647 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s-2147483648 = %d, wanted -2147483647\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483647_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s-2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483647_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s-2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483647_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s-2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483647_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483647_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -1%s-2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483647_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s-2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483647_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483647_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int32 1%s-2147483647 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg2147483647_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg2147483647_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s-2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int32_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -1%s-2147483648 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg1_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int32_ssa(-2147483647); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -1%s-2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg1_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int32_ssa(2147483647); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -1%s2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_Neg1_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int32_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s-2147483648 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s-2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int32_ssa(-2147483648); got != 1 {\n\t\tfmt.Printf(\"mod_int32 1%s-2147483648 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_1_ssa(-2147483648); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int32_ssa(-2147483647); got != 1 {\n\t\tfmt.Printf(\"mod_int32 1%s-2147483647 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_1_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int32_ssa(2147483647); got != 1 {\n\t\tfmt.Printf(\"mod_int32 1%s2147483647 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_1_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_2147483647_int32_ssa(-2147483648); got != 2147483647 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s-2147483648 = %d, wanted 2147483647\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_2147483647_ssa(-2147483648); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -2147483648%s2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_2147483647_int32_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s-2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_2147483647_ssa(-2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 -2147483647%s2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_2147483647_int32_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_2147483647_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int32 -1%s2147483647 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_2147483647_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int32 0%s2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_2147483647_int32_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_2147483647_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int32 1%s2147483647 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_2147483647_int32_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int32_2147483647_ssa(2147483647); got != 0 {\n\t\tfmt.Printf(\"mod_int32 2147483647%s2147483647 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint16 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint16 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint16_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint16 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint16 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint16_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"add_uint16 0%s65535 = %d, wanted 65535\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_0_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"add_uint16 65535%s0 = %d, wanted 65535\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint16_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint16 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint16 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint16_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint16 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint16 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"add_uint16 1%s65535 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_1_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"add_uint16 65535%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_65535_uint16_ssa(0); got != 65535 {\n\t\tfmt.Printf(\"add_uint16 65535%s0 = %d, wanted 65535\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_65535_ssa(0); got != 65535 {\n\t\tfmt.Printf(\"add_uint16 0%s65535 = %d, wanted 65535\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_65535_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint16 65535%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_65535_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint16 1%s65535 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_65535_uint16_ssa(65535); got != 65534 {\n\t\tfmt.Printf(\"add_uint16 65535%s65535 = %d, wanted 65534\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint16_65535_ssa(65535); got != 65534 {\n\t\tfmt.Printf(\"add_uint16 65535%s65535 = %d, wanted 65534\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint16 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint16 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint16_ssa(1); got != 65535 {\n\t\tfmt.Printf(\"sub_uint16 0%s1 = %d, wanted 65535\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_uint16 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint16_ssa(65535); got != 1 {\n\t\tfmt.Printf(\"sub_uint16 0%s65535 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_0_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"sub_uint16 65535%s0 = %d, wanted 65535\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint16_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint16 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_1_ssa(0); got != 65535 {\n\t\tfmt.Printf(\"sub_uint16 0%s1 = %d, wanted 65535\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint16 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint16 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint16_ssa(65535); got != 2 {\n\t\tfmt.Printf(\"sub_uint16 1%s65535 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_1_ssa(65535); got != 65534 {\n\t\tfmt.Printf(\"sub_uint16 65535%s1 = %d, wanted 65534\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_65535_uint16_ssa(0); got != 65535 {\n\t\tfmt.Printf(\"sub_uint16 65535%s0 = %d, wanted 65535\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_65535_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint16 0%s65535 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_65535_uint16_ssa(1); got != 65534 {\n\t\tfmt.Printf(\"sub_uint16 65535%s1 = %d, wanted 65534\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_65535_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_uint16 1%s65535 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_65535_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"sub_uint16 65535%s65535 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint16_65535_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"sub_uint16 65535%s65535 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint16 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"div_uint16 0%s65535 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint16 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint16_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint16 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint16_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint16 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"div_uint16 1%s65535 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint16_1_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"div_uint16 65535%s1 = %d, wanted 65535\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint16_65535_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint16 0%s65535 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_65535_uint16_ssa(1); got != 65535 {\n\t\tfmt.Printf(\"div_uint16 65535%s1 = %d, wanted 65535\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint16_65535_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint16 1%s65535 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_65535_uint16_ssa(65535); got != 1 {\n\t\tfmt.Printf(\"div_uint16 65535%s65535 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint16_65535_ssa(65535); got != 1 {\n\t\tfmt.Printf(\"div_uint16 65535%s65535 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 0%s65535 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_0_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 65535%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint16_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint16 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint16 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint16_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"mul_uint16 1%s65535 = %d, wanted 65535\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_1_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"mul_uint16 65535%s1 = %d, wanted 65535\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_65535_uint16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 65535%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_65535_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint16 0%s65535 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_65535_uint16_ssa(1); got != 65535 {\n\t\tfmt.Printf(\"mul_uint16 65535%s1 = %d, wanted 65535\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_65535_ssa(1); got != 65535 {\n\t\tfmt.Printf(\"mul_uint16 1%s65535 = %d, wanted 65535\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_65535_uint16_ssa(65535); got != 1 {\n\t\tfmt.Printf(\"mul_uint16 65535%s65535 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint16_65535_ssa(65535); got != 1 {\n\t\tfmt.Printf(\"mul_uint16 65535%s65535 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"lsh_uint16 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 0%s65535 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_0_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"lsh_uint16 65535%s0 = %d, wanted 65535\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint16_ssa(0); got != 1 {\n\t\tfmt.Printf(\"lsh_uint16 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint16_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint16 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint16 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 1%s65535 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_1_ssa(65535); got != 65534 {\n\t\tfmt.Printf(\"lsh_uint16 65535%s1 = %d, wanted 65534\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_65535_uint16_ssa(0); got != 65535 {\n\t\tfmt.Printf(\"lsh_uint16 65535%s0 = %d, wanted 65535\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_65535_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 0%s65535 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_65535_uint16_ssa(1); got != 65534 {\n\t\tfmt.Printf(\"lsh_uint16 65535%s1 = %d, wanted 65534\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_65535_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 1%s65535 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_65535_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 65535%s65535 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint16_65535_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"lsh_uint16 65535%s65535 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"rsh_uint16 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 0%s65535 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_0_ssa(65535); got != 65535 {\n\t\tfmt.Printf(\"rsh_uint16 65535%s0 = %d, wanted 65535\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint16_ssa(0); got != 1 {\n\t\tfmt.Printf(\"rsh_uint16 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 1%s65535 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_1_ssa(65535); got != 32767 {\n\t\tfmt.Printf(\"rsh_uint16 65535%s1 = %d, wanted 32767\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_65535_uint16_ssa(0); got != 65535 {\n\t\tfmt.Printf(\"rsh_uint16 65535%s0 = %d, wanted 65535\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_65535_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 0%s65535 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_65535_uint16_ssa(1); got != 32767 {\n\t\tfmt.Printf(\"rsh_uint16 65535%s1 = %d, wanted 32767\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_65535_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 1%s65535 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_65535_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 65535%s65535 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint16_65535_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"rsh_uint16 65535%s65535 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 0%s65535 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint16_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint16_ssa(65535); got != 1 {\n\t\tfmt.Printf(\"mod_uint16 1%s65535 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint16_1_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 65535%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint16_65535_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 0%s65535 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_65535_uint16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 65535%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint16_65535_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_uint16 1%s65535 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_65535_uint16_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 65535%s65535 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint16_65535_ssa(65535); got != 0 {\n\t\tfmt.Printf(\"mod_uint16 65535%s65535 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32768_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"add_int16 -32768%s-32768 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32768_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"add_int16 -32768%s-32768 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32768_int16_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"add_int16 -32768%s-32767 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32768_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"add_int16 -32767%s-32768 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32768_int16_ssa(-1); got != 32767 {\n\t\tfmt.Printf(\"add_int16 -32768%s-1 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32768_ssa(-1); got != 32767 {\n\t\tfmt.Printf(\"add_int16 -1%s-32768 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32768_int16_ssa(0); got != -32768 {\n\t\tfmt.Printf(\"add_int16 -32768%s0 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32768_ssa(0); got != -32768 {\n\t\tfmt.Printf(\"add_int16 0%s-32768 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32768_int16_ssa(1); got != -32767 {\n\t\tfmt.Printf(\"add_int16 -32768%s1 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32768_ssa(1); got != -32767 {\n\t\tfmt.Printf(\"add_int16 1%s-32768 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32768_int16_ssa(32766); got != -2 {\n\t\tfmt.Printf(\"add_int16 -32768%s32766 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32768_ssa(32766); got != -2 {\n\t\tfmt.Printf(\"add_int16 32766%s-32768 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32768_int16_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"add_int16 -32768%s32767 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32768_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"add_int16 32767%s-32768 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32767_int16_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"add_int16 -32767%s-32768 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32767_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"add_int16 -32768%s-32767 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32767_int16_ssa(-32767); got != 2 {\n\t\tfmt.Printf(\"add_int16 -32767%s-32767 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32767_ssa(-32767); got != 2 {\n\t\tfmt.Printf(\"add_int16 -32767%s-32767 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32767_int16_ssa(-1); got != -32768 {\n\t\tfmt.Printf(\"add_int16 -32767%s-1 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32767_ssa(-1); got != -32768 {\n\t\tfmt.Printf(\"add_int16 -1%s-32767 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32767_int16_ssa(0); got != -32767 {\n\t\tfmt.Printf(\"add_int16 -32767%s0 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32767_ssa(0); got != -32767 {\n\t\tfmt.Printf(\"add_int16 0%s-32767 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32767_int16_ssa(1); got != -32766 {\n\t\tfmt.Printf(\"add_int16 -32767%s1 = %d, wanted -32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32767_ssa(1); got != -32766 {\n\t\tfmt.Printf(\"add_int16 1%s-32767 = %d, wanted -32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32767_int16_ssa(32766); got != -1 {\n\t\tfmt.Printf(\"add_int16 -32767%s32766 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32767_ssa(32766); got != -1 {\n\t\tfmt.Printf(\"add_int16 32766%s-32767 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg32767_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"add_int16 -32767%s32767 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg32767_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"add_int16 32767%s-32767 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int16_ssa(-32768); got != 32767 {\n\t\tfmt.Printf(\"add_int16 -1%s-32768 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg1_ssa(-32768); got != 32767 {\n\t\tfmt.Printf(\"add_int16 -32768%s-1 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int16_ssa(-32767); got != -32768 {\n\t\tfmt.Printf(\"add_int16 -1%s-32767 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg1_ssa(-32767); got != -32768 {\n\t\tfmt.Printf(\"add_int16 -32767%s-1 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int16_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int16 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int16 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int16_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int16 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int16 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int16 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int16 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int16_ssa(32766); got != 32765 {\n\t\tfmt.Printf(\"add_int16 -1%s32766 = %d, wanted 32765\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg1_ssa(32766); got != 32765 {\n\t\tfmt.Printf(\"add_int16 32766%s-1 = %d, wanted 32765\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int16_ssa(32767); got != 32766 {\n\t\tfmt.Printf(\"add_int16 -1%s32767 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_Neg1_ssa(32767); got != 32766 {\n\t\tfmt.Printf(\"add_int16 32767%s-1 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int16_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"add_int16 0%s-32768 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_0_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"add_int16 -32768%s0 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int16_ssa(-32767); got != -32767 {\n\t\tfmt.Printf(\"add_int16 0%s-32767 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_0_ssa(-32767); got != -32767 {\n\t\tfmt.Printf(\"add_int16 -32767%s0 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int16_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int16 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int16 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int16 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int16 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int16_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int16 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int16 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int16_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"add_int16 0%s32766 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_0_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"add_int16 32766%s0 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int16_ssa(32767); got != 32767 {\n\t\tfmt.Printf(\"add_int16 0%s32767 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_0_ssa(32767); got != 32767 {\n\t\tfmt.Printf(\"add_int16 32767%s0 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int16_ssa(-32768); got != -32767 {\n\t\tfmt.Printf(\"add_int16 1%s-32768 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_1_ssa(-32768); got != -32767 {\n\t\tfmt.Printf(\"add_int16 -32768%s1 = %d, wanted -32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int16_ssa(-32767); got != -32766 {\n\t\tfmt.Printf(\"add_int16 1%s-32767 = %d, wanted -32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_1_ssa(-32767); got != -32766 {\n\t\tfmt.Printf(\"add_int16 -32767%s1 = %d, wanted -32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int16 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int16 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int16_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int16 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int16 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int16_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int16 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int16 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int16_ssa(32766); got != 32767 {\n\t\tfmt.Printf(\"add_int16 1%s32766 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_1_ssa(32766); got != 32767 {\n\t\tfmt.Printf(\"add_int16 32766%s1 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int16_ssa(32767); got != -32768 {\n\t\tfmt.Printf(\"add_int16 1%s32767 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_1_ssa(32767); got != -32768 {\n\t\tfmt.Printf(\"add_int16 32767%s1 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32766_int16_ssa(-32768); got != -2 {\n\t\tfmt.Printf(\"add_int16 32766%s-32768 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32766_ssa(-32768); got != -2 {\n\t\tfmt.Printf(\"add_int16 -32768%s32766 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32766_int16_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"add_int16 32766%s-32767 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32766_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"add_int16 -32767%s32766 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32766_int16_ssa(-1); got != 32765 {\n\t\tfmt.Printf(\"add_int16 32766%s-1 = %d, wanted 32765\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32766_ssa(-1); got != 32765 {\n\t\tfmt.Printf(\"add_int16 -1%s32766 = %d, wanted 32765\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32766_int16_ssa(0); got != 32766 {\n\t\tfmt.Printf(\"add_int16 32766%s0 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32766_ssa(0); got != 32766 {\n\t\tfmt.Printf(\"add_int16 0%s32766 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32766_int16_ssa(1); got != 32767 {\n\t\tfmt.Printf(\"add_int16 32766%s1 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32766_ssa(1); got != 32767 {\n\t\tfmt.Printf(\"add_int16 1%s32766 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32766_int16_ssa(32766); got != -4 {\n\t\tfmt.Printf(\"add_int16 32766%s32766 = %d, wanted -4\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32766_ssa(32766); got != -4 {\n\t\tfmt.Printf(\"add_int16 32766%s32766 = %d, wanted -4\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32766_int16_ssa(32767); got != -3 {\n\t\tfmt.Printf(\"add_int16 32766%s32767 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32766_ssa(32767); got != -3 {\n\t\tfmt.Printf(\"add_int16 32767%s32766 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32767_int16_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"add_int16 32767%s-32768 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32767_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"add_int16 -32768%s32767 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32767_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"add_int16 32767%s-32767 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32767_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"add_int16 -32767%s32767 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32767_int16_ssa(-1); got != 32766 {\n\t\tfmt.Printf(\"add_int16 32767%s-1 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32767_ssa(-1); got != 32766 {\n\t\tfmt.Printf(\"add_int16 -1%s32767 = %d, wanted 32766\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32767_int16_ssa(0); got != 32767 {\n\t\tfmt.Printf(\"add_int16 32767%s0 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32767_ssa(0); got != 32767 {\n\t\tfmt.Printf(\"add_int16 0%s32767 = %d, wanted 32767\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32767_int16_ssa(1); got != -32768 {\n\t\tfmt.Printf(\"add_int16 32767%s1 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32767_ssa(1); got != -32768 {\n\t\tfmt.Printf(\"add_int16 1%s32767 = %d, wanted -32768\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32767_int16_ssa(32766); got != -3 {\n\t\tfmt.Printf(\"add_int16 32767%s32766 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32767_ssa(32766); got != -3 {\n\t\tfmt.Printf(\"add_int16 32766%s32767 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_32767_int16_ssa(32767); got != -2 {\n\t\tfmt.Printf(\"add_int16 32767%s32767 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int16_32767_ssa(32767); got != -2 {\n\t\tfmt.Printf(\"add_int16 32767%s32767 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32768_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"sub_int16 -32768%s-32768 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32768_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"sub_int16 -32768%s-32768 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32768_int16_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"sub_int16 -32768%s-32767 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32768_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"sub_int16 -32767%s-32768 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32768_int16_ssa(-1); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 -32768%s-1 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32768_ssa(-1); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 -1%s-32768 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32768_int16_ssa(0); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 -32768%s0 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32768_ssa(0); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 0%s-32768 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32768_int16_ssa(1); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 -32768%s1 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32768_ssa(1); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 1%s-32768 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32768_int16_ssa(32766); got != 2 {\n\t\tfmt.Printf(\"sub_int16 -32768%s32766 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32768_ssa(32766); got != -2 {\n\t\tfmt.Printf(\"sub_int16 32766%s-32768 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32768_int16_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"sub_int16 -32768%s32767 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32768_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"sub_int16 32767%s-32768 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32767_int16_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"sub_int16 -32767%s-32768 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32767_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"sub_int16 -32768%s-32767 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32767_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"sub_int16 -32767%s-32767 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32767_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"sub_int16 -32767%s-32767 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32767_int16_ssa(-1); got != -32766 {\n\t\tfmt.Printf(\"sub_int16 -32767%s-1 = %d, wanted -32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32767_ssa(-1); got != 32766 {\n\t\tfmt.Printf(\"sub_int16 -1%s-32767 = %d, wanted 32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32767_int16_ssa(0); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 -32767%s0 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32767_ssa(0); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 0%s-32767 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32767_int16_ssa(1); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 -32767%s1 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32767_ssa(1); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 1%s-32767 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32767_int16_ssa(32766); got != 3 {\n\t\tfmt.Printf(\"sub_int16 -32767%s32766 = %d, wanted 3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32767_ssa(32766); got != -3 {\n\t\tfmt.Printf(\"sub_int16 32766%s-32767 = %d, wanted -3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg32767_int16_ssa(32767); got != 2 {\n\t\tfmt.Printf(\"sub_int16 -32767%s32767 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg32767_ssa(32767); got != -2 {\n\t\tfmt.Printf(\"sub_int16 32767%s-32767 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int16_ssa(-32768); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 -1%s-32768 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg1_ssa(-32768); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 -32768%s-1 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int16_ssa(-32767); got != 32766 {\n\t\tfmt.Printf(\"sub_int16 -1%s-32767 = %d, wanted 32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg1_ssa(-32767); got != -32766 {\n\t\tfmt.Printf(\"sub_int16 -32767%s-1 = %d, wanted -32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int16 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int16 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int16_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int16 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int16 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int16_ssa(1); got != -2 {\n\t\tfmt.Printf(\"sub_int16 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_int16 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int16_ssa(32766); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 -1%s32766 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg1_ssa(32766); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 32766%s-1 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int16_ssa(32767); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 -1%s32767 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_Neg1_ssa(32767); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 32767%s-1 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int16_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 0%s-32768 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_0_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 -32768%s0 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int16_ssa(-32767); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 0%s-32767 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_0_ssa(-32767); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 -32767%s0 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int16_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"sub_int16 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"sub_int16 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int16 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int16 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int16_ssa(1); got != -1 {\n\t\tfmt.Printf(\"sub_int16 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_int16 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int16_ssa(32766); got != -32766 {\n\t\tfmt.Printf(\"sub_int16 0%s32766 = %d, wanted -32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_0_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"sub_int16 32766%s0 = %d, wanted 32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int16_ssa(32767); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 0%s32767 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_0_ssa(32767); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 32767%s0 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int16_ssa(-32768); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 1%s-32768 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_1_ssa(-32768); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 -32768%s1 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int16_ssa(-32767); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 1%s-32767 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_1_ssa(-32767); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 -32767%s1 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int16_ssa(-1); got != 2 {\n\t\tfmt.Printf(\"sub_int16 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"sub_int16 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int16_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int16 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int16 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int16 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int16 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int16_ssa(32766); got != -32765 {\n\t\tfmt.Printf(\"sub_int16 1%s32766 = %d, wanted -32765\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_1_ssa(32766); got != 32765 {\n\t\tfmt.Printf(\"sub_int16 32766%s1 = %d, wanted 32765\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int16_ssa(32767); got != -32766 {\n\t\tfmt.Printf(\"sub_int16 1%s32767 = %d, wanted -32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_1_ssa(32767); got != 32766 {\n\t\tfmt.Printf(\"sub_int16 32767%s1 = %d, wanted 32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32766_int16_ssa(-32768); got != -2 {\n\t\tfmt.Printf(\"sub_int16 32766%s-32768 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32766_ssa(-32768); got != 2 {\n\t\tfmt.Printf(\"sub_int16 -32768%s32766 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32766_int16_ssa(-32767); got != -3 {\n\t\tfmt.Printf(\"sub_int16 32766%s-32767 = %d, wanted -3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32766_ssa(-32767); got != 3 {\n\t\tfmt.Printf(\"sub_int16 -32767%s32766 = %d, wanted 3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32766_int16_ssa(-1); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 32766%s-1 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32766_ssa(-1); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 -1%s32766 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32766_int16_ssa(0); got != 32766 {\n\t\tfmt.Printf(\"sub_int16 32766%s0 = %d, wanted 32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32766_ssa(0); got != -32766 {\n\t\tfmt.Printf(\"sub_int16 0%s32766 = %d, wanted -32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32766_int16_ssa(1); got != 32765 {\n\t\tfmt.Printf(\"sub_int16 32766%s1 = %d, wanted 32765\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32766_ssa(1); got != -32765 {\n\t\tfmt.Printf(\"sub_int16 1%s32766 = %d, wanted -32765\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32766_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"sub_int16 32766%s32766 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32766_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"sub_int16 32766%s32766 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32766_int16_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"sub_int16 32766%s32767 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32766_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"sub_int16 32767%s32766 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32767_int16_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"sub_int16 32767%s-32768 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32767_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"sub_int16 -32768%s32767 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32767_int16_ssa(-32767); got != -2 {\n\t\tfmt.Printf(\"sub_int16 32767%s-32767 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32767_ssa(-32767); got != 2 {\n\t\tfmt.Printf(\"sub_int16 -32767%s32767 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32767_int16_ssa(-1); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 32767%s-1 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32767_ssa(-1); got != -32768 {\n\t\tfmt.Printf(\"sub_int16 -1%s32767 = %d, wanted -32768\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32767_int16_ssa(0); got != 32767 {\n\t\tfmt.Printf(\"sub_int16 32767%s0 = %d, wanted 32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32767_ssa(0); got != -32767 {\n\t\tfmt.Printf(\"sub_int16 0%s32767 = %d, wanted -32767\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32767_int16_ssa(1); got != 32766 {\n\t\tfmt.Printf(\"sub_int16 32767%s1 = %d, wanted 32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32767_ssa(1); got != -32766 {\n\t\tfmt.Printf(\"sub_int16 1%s32767 = %d, wanted -32766\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32767_int16_ssa(32766); got != 1 {\n\t\tfmt.Printf(\"sub_int16 32767%s32766 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32767_ssa(32766); got != -1 {\n\t\tfmt.Printf(\"sub_int16 32766%s32767 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_32767_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"sub_int16 32767%s32767 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int16_32767_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"sub_int16 32767%s32767 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32768_int16_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"div_int16 -32768%s-32768 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32768_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"div_int16 -32768%s-32768 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32768_int16_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"div_int16 -32768%s-32767 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32768_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 -32767%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32768_int16_ssa(-1); got != -32768 {\n\t\tfmt.Printf(\"div_int16 -32768%s-1 = %d, wanted -32768\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32768_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32768_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32768_int16_ssa(1); got != -32768 {\n\t\tfmt.Printf(\"div_int16 -32768%s1 = %d, wanted -32768\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32768_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32768_int16_ssa(32766); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32768%s32766 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32768_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"div_int16 32766%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32768_int16_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32768%s32767 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32768_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 32767%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32767_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"div_int16 -32767%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32767_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"div_int16 -32768%s-32767 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32767_int16_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"div_int16 -32767%s-32767 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32767_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"div_int16 -32767%s-32767 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32767_int16_ssa(-1); got != 32767 {\n\t\tfmt.Printf(\"div_int16 -32767%s-1 = %d, wanted 32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32767_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32767_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32767_int16_ssa(1); got != -32767 {\n\t\tfmt.Printf(\"div_int16 -32767%s1 = %d, wanted -32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32767_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32767_int16_ssa(32766); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32767%s32766 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32767_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"div_int16 32766%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg32767_int16_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32767%s32767 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg32767_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"div_int16 32767%s-32767 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg1_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"div_int16 -32768%s-1 = %d, wanted -32768\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg1_ssa(-32767); got != 32767 {\n\t\tfmt.Printf(\"div_int16 -32767%s-1 = %d, wanted 32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int16_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int16 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int16 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int16_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int16 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int16 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s32766 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg1_ssa(32766); got != -32766 {\n\t\tfmt.Printf(\"div_int16 32766%s-1 = %d, wanted -32766\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_Neg1_ssa(32767); got != -32767 {\n\t\tfmt.Printf(\"div_int16 32767%s-1 = %d, wanted -32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s32766 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_1_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"div_int16 -32768%s1 = %d, wanted -32768\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_1_ssa(-32767); got != -32767 {\n\t\tfmt.Printf(\"div_int16 -32767%s1 = %d, wanted -32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int16_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int16 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int16 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int16_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int16 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int16 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s32766 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_1_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"div_int16 32766%s1 = %d, wanted 32766\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_1_ssa(32767); got != 32767 {\n\t\tfmt.Printf(\"div_int16 32767%s1 = %d, wanted 32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32766_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"div_int16 32766%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32766_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32768%s32766 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32766_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 32766%s-32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32766_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32767%s32766 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32766_int16_ssa(-1); got != -32766 {\n\t\tfmt.Printf(\"div_int16 32766%s-1 = %d, wanted -32766\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32766_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s32766 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32766_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s32766 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32766_int16_ssa(1); got != 32766 {\n\t\tfmt.Printf(\"div_int16 32766%s1 = %d, wanted 32766\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32766_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s32766 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32766_int16_ssa(32766); got != 1 {\n\t\tfmt.Printf(\"div_int16 32766%s32766 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32766_ssa(32766); got != 1 {\n\t\tfmt.Printf(\"div_int16 32766%s32766 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32766_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"div_int16 32766%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32766_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"div_int16 32767%s32766 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32767_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"div_int16 32767%s-32768 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32767_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32768%s32767 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32767_int16_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"div_int16 32767%s-32767 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32767_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"div_int16 -32767%s32767 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32767_int16_ssa(-1); got != -32767 {\n\t\tfmt.Printf(\"div_int16 32767%s-1 = %d, wanted -32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32767_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int16 -1%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32767_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int16 0%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32767_int16_ssa(1); got != 32767 {\n\t\tfmt.Printf(\"div_int16 32767%s1 = %d, wanted 32767\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32767_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int16 1%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32767_int16_ssa(32766); got != 1 {\n\t\tfmt.Printf(\"div_int16 32767%s32766 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32767_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"div_int16 32766%s32767 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_32767_int16_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"div_int16 32767%s32767 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int16_32767_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"div_int16 32767%s32767 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32768_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32768%s-32768 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32768_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32768%s-32768 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32768_int16_ssa(-32767); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s-32767 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32768_ssa(-32767); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32767%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32768_int16_ssa(-1); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s-1 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32768_ssa(-1); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -1%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32768_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32768%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32768_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s-32768 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32768_int16_ssa(1); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s1 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32768_ssa(1); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 1%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32768_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32768%s32766 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32768_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mul_int16 32766%s-32768 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32768_int16_ssa(32767); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s32767 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32768_ssa(32767); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 32767%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32767_int16_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32767%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32767_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s-32767 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32767_int16_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"mul_int16 -32767%s-32767 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32767_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"mul_int16 -32767%s-32767 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32767_int16_ssa(-1); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 -32767%s-1 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32767_ssa(-1); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 -1%s-32767 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32767_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32767%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32767_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s-32767 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32767_int16_ssa(1); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 -32767%s1 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32767_ssa(1); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 1%s-32767 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32767_int16_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 -32767%s32766 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32767_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s-32767 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg32767_int16_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"mul_int16 -32767%s32767 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg32767_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"mul_int16 32767%s-32767 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int16_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -1%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg1_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s-1 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int16_ssa(-32767); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 -1%s-32767 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg1_ssa(-32767); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 -32767%s-1 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int16_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int16 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int16 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int16_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int16 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int16 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int16_ssa(32766); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 -1%s32766 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg1_ssa(32766); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s-1 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int16_ssa(32767); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 -1%s32767 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_Neg1_ssa(32767); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 32767%s-1 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s-32768 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_0_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32768%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s-32767 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_0_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32767%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_0_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int16 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s32766 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_0_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mul_int16 32766%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s32767 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_0_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mul_int16 32767%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int16_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 1%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_1_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s1 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int16_ssa(-32767); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 1%s-32767 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_1_ssa(-32767); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 -32767%s1 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int16_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int16 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int16 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int16_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int16 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int16 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int16_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 1%s32766 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_1_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s1 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int16_ssa(32767); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 1%s32767 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_1_ssa(32767); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 32767%s1 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32766_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mul_int16 32766%s-32768 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32766_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mul_int16 -32768%s32766 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32766_int16_ssa(-32767); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s-32767 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32766_ssa(-32767); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 -32767%s32766 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32766_int16_ssa(-1); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s-1 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32766_ssa(-1); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 -1%s32766 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32766_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 32766%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32766_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s32766 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32766_int16_ssa(1); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s1 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32766_ssa(1); got != 32766 {\n\t\tfmt.Printf(\"mul_int16 1%s32766 = %d, wanted 32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32766_int16_ssa(32766); got != 4 {\n\t\tfmt.Printf(\"mul_int16 32766%s32766 = %d, wanted 4\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32766_ssa(32766); got != 4 {\n\t\tfmt.Printf(\"mul_int16 32766%s32766 = %d, wanted 4\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32766_int16_ssa(32767); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s32767 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32766_ssa(32767); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 32767%s32766 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32767_int16_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 32767%s-32768 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32767_ssa(-32768); got != -32768 {\n\t\tfmt.Printf(\"mul_int16 -32768%s32767 = %d, wanted -32768\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32767_int16_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"mul_int16 32767%s-32767 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32767_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"mul_int16 -32767%s32767 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32767_int16_ssa(-1); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 32767%s-1 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32767_ssa(-1); got != -32767 {\n\t\tfmt.Printf(\"mul_int16 -1%s32767 = %d, wanted -32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32767_int16_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 32767%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32767_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int16 0%s32767 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32767_int16_ssa(1); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 32767%s1 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32767_ssa(1); got != 32767 {\n\t\tfmt.Printf(\"mul_int16 1%s32767 = %d, wanted 32767\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32767_int16_ssa(32766); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 32767%s32766 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32767_ssa(32766); got != -32766 {\n\t\tfmt.Printf(\"mul_int16 32766%s32767 = %d, wanted -32766\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_32767_int16_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"mul_int16 32767%s32767 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int16_32767_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"mul_int16 32767%s32767 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32768_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32768%s-32768 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32768_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32768%s-32768 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32768_int16_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -32768%s-32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32768_ssa(-32767); got != -32767 {\n\t\tfmt.Printf(\"mod_int16 -32767%s-32768 = %d, wanted -32767\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32768_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32768%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32768_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s-32768 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32768_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s-32768 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32768_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32768%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32768_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s-32768 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32768_int16_ssa(32766); got != -2 {\n\t\tfmt.Printf(\"mod_int16 -32768%s32766 = %d, wanted -2\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32768_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"mod_int16 32766%s-32768 = %d, wanted 32766\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32768_int16_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -32768%s32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32768_ssa(32767); got != 32767 {\n\t\tfmt.Printf(\"mod_int16 32767%s-32768 = %d, wanted 32767\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32767_int16_ssa(-32768); got != -32767 {\n\t\tfmt.Printf(\"mod_int16 -32767%s-32768 = %d, wanted -32767\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32767_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -32768%s-32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32767_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s-32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32767_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s-32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32767_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32767_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s-32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32767_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s-32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32767_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32767_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s-32767 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32767_int16_ssa(32766); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -32767%s32766 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32767_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"mod_int16 32766%s-32767 = %d, wanted 32766\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg32767_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg32767_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s-32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int16_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s-32768 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg1_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32768%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int16_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s-32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg1_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int16_ssa(32766); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s32766 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg1_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32766%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int16_ssa(32767); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_Neg1_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int16_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s-32768 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s-32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s32766 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int16_ssa(-32768); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s-32768 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_1_ssa(-32768); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32768%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int16_ssa(-32767); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s-32767 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_1_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int16_ssa(32766); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s32766 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_1_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32766%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int16_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s32767 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_1_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32766_int16_ssa(-32768); got != 32766 {\n\t\tfmt.Printf(\"mod_int16 32766%s-32768 = %d, wanted 32766\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32766_ssa(-32768); got != -2 {\n\t\tfmt.Printf(\"mod_int16 -32768%s32766 = %d, wanted -2\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32766_int16_ssa(-32767); got != 32766 {\n\t\tfmt.Printf(\"mod_int16 32766%s-32767 = %d, wanted 32766\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32766_ssa(-32767); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -32767%s32766 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32766_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32766%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32766_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s32766 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32766_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s32766 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32766_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32766%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32766_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s32766 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32766_int16_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32766%s32766 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32766_ssa(32766); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32766%s32766 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32766_int16_ssa(32767); got != 32766 {\n\t\tfmt.Printf(\"mod_int16 32766%s32767 = %d, wanted 32766\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32766_ssa(32767); got != 1 {\n\t\tfmt.Printf(\"mod_int16 32767%s32766 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32767_int16_ssa(-32768); got != 32767 {\n\t\tfmt.Printf(\"mod_int16 32767%s-32768 = %d, wanted 32767\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32767_ssa(-32768); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -32768%s32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32767_int16_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s-32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32767_ssa(-32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 -32767%s32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32767_int16_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32767_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int16 -1%s32767 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32767_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int16 0%s32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32767_int16_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32767_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int16 1%s32767 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32767_int16_ssa(32766); got != 1 {\n\t\tfmt.Printf(\"mod_int16 32767%s32766 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32767_ssa(32766); got != 32766 {\n\t\tfmt.Printf(\"mod_int16 32766%s32767 = %d, wanted 32766\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_32767_int16_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int16_32767_ssa(32767); got != 0 {\n\t\tfmt.Printf(\"mod_int16 32767%s32767 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint8 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_uint8 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint8_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint8 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_uint8 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_uint8_ssa(255); got != 255 {\n\t\tfmt.Printf(\"add_uint8 0%s255 = %d, wanted 255\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_0_ssa(255); got != 255 {\n\t\tfmt.Printf(\"add_uint8 255%s0 = %d, wanted 255\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint8_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint8 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_uint8 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint8_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint8 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_uint8 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"add_uint8 1%s255 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_1_ssa(255); got != 0 {\n\t\tfmt.Printf(\"add_uint8 255%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_255_uint8_ssa(0); got != 255 {\n\t\tfmt.Printf(\"add_uint8 255%s0 = %d, wanted 255\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_255_ssa(0); got != 255 {\n\t\tfmt.Printf(\"add_uint8 0%s255 = %d, wanted 255\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_255_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint8 255%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_255_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_uint8 1%s255 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_255_uint8_ssa(255); got != 254 {\n\t\tfmt.Printf(\"add_uint8 255%s255 = %d, wanted 254\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_uint8_255_ssa(255); got != 254 {\n\t\tfmt.Printf(\"add_uint8 255%s255 = %d, wanted 254\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint8 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_uint8 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint8_ssa(1); got != 255 {\n\t\tfmt.Printf(\"sub_uint8 0%s1 = %d, wanted 255\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_uint8 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_uint8_ssa(255); got != 1 {\n\t\tfmt.Printf(\"sub_uint8 0%s255 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_0_ssa(255); got != 255 {\n\t\tfmt.Printf(\"sub_uint8 255%s0 = %d, wanted 255\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint8_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint8 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_1_ssa(0); got != 255 {\n\t\tfmt.Printf(\"sub_uint8 0%s1 = %d, wanted 255\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint8 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_uint8 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_uint8_ssa(255); got != 2 {\n\t\tfmt.Printf(\"sub_uint8 1%s255 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_1_ssa(255); got != 254 {\n\t\tfmt.Printf(\"sub_uint8 255%s1 = %d, wanted 254\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_255_uint8_ssa(0); got != 255 {\n\t\tfmt.Printf(\"sub_uint8 255%s0 = %d, wanted 255\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_255_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_uint8 0%s255 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_255_uint8_ssa(1); got != 254 {\n\t\tfmt.Printf(\"sub_uint8 255%s1 = %d, wanted 254\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_255_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_uint8 1%s255 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_255_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"sub_uint8 255%s255 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_uint8_255_ssa(255); got != 0 {\n\t\tfmt.Printf(\"sub_uint8 255%s255 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint8 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"div_uint8 0%s255 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint8 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint8_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint8 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint8_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_uint8 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"div_uint8 1%s255 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint8_1_ssa(255); got != 255 {\n\t\tfmt.Printf(\"div_uint8 255%s1 = %d, wanted 255\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint8_255_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_uint8 0%s255 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_255_uint8_ssa(1); got != 255 {\n\t\tfmt.Printf(\"div_uint8 255%s1 = %d, wanted 255\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint8_255_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_uint8 1%s255 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_255_uint8_ssa(255); got != 1 {\n\t\tfmt.Printf(\"div_uint8 255%s255 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_uint8_255_ssa(255); got != 1 {\n\t\tfmt.Printf(\"div_uint8 255%s255 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 0%s255 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_0_ssa(255); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 255%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint8_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint8 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_uint8 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_uint8_ssa(255); got != 255 {\n\t\tfmt.Printf(\"mul_uint8 1%s255 = %d, wanted 255\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_1_ssa(255); got != 255 {\n\t\tfmt.Printf(\"mul_uint8 255%s1 = %d, wanted 255\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_255_uint8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 255%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_255_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_uint8 0%s255 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_255_uint8_ssa(1); got != 255 {\n\t\tfmt.Printf(\"mul_uint8 255%s1 = %d, wanted 255\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_255_ssa(1); got != 255 {\n\t\tfmt.Printf(\"mul_uint8 1%s255 = %d, wanted 255\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_255_uint8_ssa(255); got != 1 {\n\t\tfmt.Printf(\"mul_uint8 255%s255 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_uint8_255_ssa(255); got != 1 {\n\t\tfmt.Printf(\"mul_uint8 255%s255 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 0%s0 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"lsh_uint8 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_0_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 0%s255 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_0_ssa(255); got != 255 {\n\t\tfmt.Printf(\"lsh_uint8 255%s0 = %d, wanted 255\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint8_ssa(0); got != 1 {\n\t\tfmt.Printf(\"lsh_uint8 1%s0 = %d, wanted 1\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 0%s1 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint8_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint8 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"lsh_uint8 1%s1 = %d, wanted 2\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_1_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 1%s255 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_1_ssa(255); got != 254 {\n\t\tfmt.Printf(\"lsh_uint8 255%s1 = %d, wanted 254\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_255_uint8_ssa(0); got != 255 {\n\t\tfmt.Printf(\"lsh_uint8 255%s0 = %d, wanted 255\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_255_ssa(0); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 0%s255 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_255_uint8_ssa(1); got != 254 {\n\t\tfmt.Printf(\"lsh_uint8 255%s1 = %d, wanted 254\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_255_ssa(1); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 1%s255 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_255_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 255%s255 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := lsh_uint8_255_ssa(255); got != 0 {\n\t\tfmt.Printf(\"lsh_uint8 255%s255 = %d, wanted 0\\n\", `<<`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 0%s0 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"rsh_uint8 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_0_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 0%s255 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_0_ssa(255); got != 255 {\n\t\tfmt.Printf(\"rsh_uint8 255%s0 = %d, wanted 255\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint8_ssa(0); got != 1 {\n\t\tfmt.Printf(\"rsh_uint8 1%s0 = %d, wanted 1\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 0%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 1%s1 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_1_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 1%s255 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_1_ssa(255); got != 127 {\n\t\tfmt.Printf(\"rsh_uint8 255%s1 = %d, wanted 127\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_255_uint8_ssa(0); got != 255 {\n\t\tfmt.Printf(\"rsh_uint8 255%s0 = %d, wanted 255\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_255_ssa(0); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 0%s255 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_255_uint8_ssa(1); got != 127 {\n\t\tfmt.Printf(\"rsh_uint8 255%s1 = %d, wanted 127\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_255_ssa(1); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 1%s255 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_255_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 255%s255 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := rsh_uint8_255_ssa(255); got != 0 {\n\t\tfmt.Printf(\"rsh_uint8 255%s255 = %d, wanted 0\\n\", `>>`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 0%s255 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint8_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_uint8_ssa(255); got != 1 {\n\t\tfmt.Printf(\"mod_uint8 1%s255 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint8_1_ssa(255); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 255%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint8_255_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 0%s255 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_255_uint8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 255%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint8_255_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_uint8 1%s255 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_255_uint8_ssa(255); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 255%s255 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_uint8_255_ssa(255); got != 0 {\n\t\tfmt.Printf(\"mod_uint8 255%s255 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg128_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"add_int8 -128%s-128 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg128_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"add_int8 -128%s-128 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg128_int8_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"add_int8 -128%s-127 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg128_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"add_int8 -127%s-128 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg128_int8_ssa(-1); got != 127 {\n\t\tfmt.Printf(\"add_int8 -128%s-1 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg128_ssa(-1); got != 127 {\n\t\tfmt.Printf(\"add_int8 -1%s-128 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg128_int8_ssa(0); got != -128 {\n\t\tfmt.Printf(\"add_int8 -128%s0 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg128_ssa(0); got != -128 {\n\t\tfmt.Printf(\"add_int8 0%s-128 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg128_int8_ssa(1); got != -127 {\n\t\tfmt.Printf(\"add_int8 -128%s1 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg128_ssa(1); got != -127 {\n\t\tfmt.Printf(\"add_int8 1%s-128 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg128_int8_ssa(126); got != -2 {\n\t\tfmt.Printf(\"add_int8 -128%s126 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg128_ssa(126); got != -2 {\n\t\tfmt.Printf(\"add_int8 126%s-128 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg128_int8_ssa(127); got != -1 {\n\t\tfmt.Printf(\"add_int8 -128%s127 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg128_ssa(127); got != -1 {\n\t\tfmt.Printf(\"add_int8 127%s-128 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg127_int8_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"add_int8 -127%s-128 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg127_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"add_int8 -128%s-127 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg127_int8_ssa(-127); got != 2 {\n\t\tfmt.Printf(\"add_int8 -127%s-127 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg127_ssa(-127); got != 2 {\n\t\tfmt.Printf(\"add_int8 -127%s-127 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg127_int8_ssa(-1); got != -128 {\n\t\tfmt.Printf(\"add_int8 -127%s-1 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg127_ssa(-1); got != -128 {\n\t\tfmt.Printf(\"add_int8 -1%s-127 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg127_int8_ssa(0); got != -127 {\n\t\tfmt.Printf(\"add_int8 -127%s0 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg127_ssa(0); got != -127 {\n\t\tfmt.Printf(\"add_int8 0%s-127 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg127_int8_ssa(1); got != -126 {\n\t\tfmt.Printf(\"add_int8 -127%s1 = %d, wanted -126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg127_ssa(1); got != -126 {\n\t\tfmt.Printf(\"add_int8 1%s-127 = %d, wanted -126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg127_int8_ssa(126); got != -1 {\n\t\tfmt.Printf(\"add_int8 -127%s126 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg127_ssa(126); got != -1 {\n\t\tfmt.Printf(\"add_int8 126%s-127 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg127_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"add_int8 -127%s127 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg127_ssa(127); got != 0 {\n\t\tfmt.Printf(\"add_int8 127%s-127 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int8_ssa(-128); got != 127 {\n\t\tfmt.Printf(\"add_int8 -1%s-128 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg1_ssa(-128); got != 127 {\n\t\tfmt.Printf(\"add_int8 -128%s-1 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int8_ssa(-127); got != -128 {\n\t\tfmt.Printf(\"add_int8 -1%s-127 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg1_ssa(-127); got != -128 {\n\t\tfmt.Printf(\"add_int8 -127%s-1 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int8_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int8 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"add_int8 -1%s-1 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int8_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int8 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"add_int8 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int8 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"add_int8 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int8_ssa(126); got != 125 {\n\t\tfmt.Printf(\"add_int8 -1%s126 = %d, wanted 125\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg1_ssa(126); got != 125 {\n\t\tfmt.Printf(\"add_int8 126%s-1 = %d, wanted 125\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_Neg1_int8_ssa(127); got != 126 {\n\t\tfmt.Printf(\"add_int8 -1%s127 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_Neg1_ssa(127); got != 126 {\n\t\tfmt.Printf(\"add_int8 127%s-1 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int8_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"add_int8 0%s-128 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_0_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"add_int8 -128%s0 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int8_ssa(-127); got != -127 {\n\t\tfmt.Printf(\"add_int8 0%s-127 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_0_ssa(-127); got != -127 {\n\t\tfmt.Printf(\"add_int8 -127%s0 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int8_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int8 0%s-1 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"add_int8 -1%s0 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int8 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"add_int8 0%s0 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int8_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int8 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"add_int8 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int8_ssa(126); got != 126 {\n\t\tfmt.Printf(\"add_int8 0%s126 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_0_ssa(126); got != 126 {\n\t\tfmt.Printf(\"add_int8 126%s0 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_0_int8_ssa(127); got != 127 {\n\t\tfmt.Printf(\"add_int8 0%s127 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_0_ssa(127); got != 127 {\n\t\tfmt.Printf(\"add_int8 127%s0 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int8_ssa(-128); got != -127 {\n\t\tfmt.Printf(\"add_int8 1%s-128 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_1_ssa(-128); got != -127 {\n\t\tfmt.Printf(\"add_int8 -128%s1 = %d, wanted -127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int8_ssa(-127); got != -126 {\n\t\tfmt.Printf(\"add_int8 1%s-127 = %d, wanted -126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_1_ssa(-127); got != -126 {\n\t\tfmt.Printf(\"add_int8 -127%s1 = %d, wanted -126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int8 1%s-1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"add_int8 -1%s1 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int8_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int8 1%s0 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"add_int8 0%s1 = %d, wanted 1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int8_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int8 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"add_int8 1%s1 = %d, wanted 2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int8_ssa(126); got != 127 {\n\t\tfmt.Printf(\"add_int8 1%s126 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_1_ssa(126); got != 127 {\n\t\tfmt.Printf(\"add_int8 126%s1 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_1_int8_ssa(127); got != -128 {\n\t\tfmt.Printf(\"add_int8 1%s127 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_1_ssa(127); got != -128 {\n\t\tfmt.Printf(\"add_int8 127%s1 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_126_int8_ssa(-128); got != -2 {\n\t\tfmt.Printf(\"add_int8 126%s-128 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_126_ssa(-128); got != -2 {\n\t\tfmt.Printf(\"add_int8 -128%s126 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_126_int8_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"add_int8 126%s-127 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_126_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"add_int8 -127%s126 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_126_int8_ssa(-1); got != 125 {\n\t\tfmt.Printf(\"add_int8 126%s-1 = %d, wanted 125\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_126_ssa(-1); got != 125 {\n\t\tfmt.Printf(\"add_int8 -1%s126 = %d, wanted 125\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_126_int8_ssa(0); got != 126 {\n\t\tfmt.Printf(\"add_int8 126%s0 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_126_ssa(0); got != 126 {\n\t\tfmt.Printf(\"add_int8 0%s126 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_126_int8_ssa(1); got != 127 {\n\t\tfmt.Printf(\"add_int8 126%s1 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_126_ssa(1); got != 127 {\n\t\tfmt.Printf(\"add_int8 1%s126 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_126_int8_ssa(126); got != -4 {\n\t\tfmt.Printf(\"add_int8 126%s126 = %d, wanted -4\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_126_ssa(126); got != -4 {\n\t\tfmt.Printf(\"add_int8 126%s126 = %d, wanted -4\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_126_int8_ssa(127); got != -3 {\n\t\tfmt.Printf(\"add_int8 126%s127 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_126_ssa(127); got != -3 {\n\t\tfmt.Printf(\"add_int8 127%s126 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_127_int8_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"add_int8 127%s-128 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_127_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"add_int8 -128%s127 = %d, wanted -1\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_127_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"add_int8 127%s-127 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_127_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"add_int8 -127%s127 = %d, wanted 0\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_127_int8_ssa(-1); got != 126 {\n\t\tfmt.Printf(\"add_int8 127%s-1 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_127_ssa(-1); got != 126 {\n\t\tfmt.Printf(\"add_int8 -1%s127 = %d, wanted 126\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_127_int8_ssa(0); got != 127 {\n\t\tfmt.Printf(\"add_int8 127%s0 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_127_ssa(0); got != 127 {\n\t\tfmt.Printf(\"add_int8 0%s127 = %d, wanted 127\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_127_int8_ssa(1); got != -128 {\n\t\tfmt.Printf(\"add_int8 127%s1 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_127_ssa(1); got != -128 {\n\t\tfmt.Printf(\"add_int8 1%s127 = %d, wanted -128\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_127_int8_ssa(126); got != -3 {\n\t\tfmt.Printf(\"add_int8 127%s126 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_127_ssa(126); got != -3 {\n\t\tfmt.Printf(\"add_int8 126%s127 = %d, wanted -3\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_127_int8_ssa(127); got != -2 {\n\t\tfmt.Printf(\"add_int8 127%s127 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := add_int8_127_ssa(127); got != -2 {\n\t\tfmt.Printf(\"add_int8 127%s127 = %d, wanted -2\\n\", `+`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg128_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"sub_int8 -128%s-128 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg128_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"sub_int8 -128%s-128 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg128_int8_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"sub_int8 -128%s-127 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg128_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"sub_int8 -127%s-128 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg128_int8_ssa(-1); got != -127 {\n\t\tfmt.Printf(\"sub_int8 -128%s-1 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg128_ssa(-1); got != 127 {\n\t\tfmt.Printf(\"sub_int8 -1%s-128 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg128_int8_ssa(0); got != -128 {\n\t\tfmt.Printf(\"sub_int8 -128%s0 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg128_ssa(0); got != -128 {\n\t\tfmt.Printf(\"sub_int8 0%s-128 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg128_int8_ssa(1); got != 127 {\n\t\tfmt.Printf(\"sub_int8 -128%s1 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg128_ssa(1); got != -127 {\n\t\tfmt.Printf(\"sub_int8 1%s-128 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg128_int8_ssa(126); got != 2 {\n\t\tfmt.Printf(\"sub_int8 -128%s126 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg128_ssa(126); got != -2 {\n\t\tfmt.Printf(\"sub_int8 126%s-128 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg128_int8_ssa(127); got != 1 {\n\t\tfmt.Printf(\"sub_int8 -128%s127 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg128_ssa(127); got != -1 {\n\t\tfmt.Printf(\"sub_int8 127%s-128 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg127_int8_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"sub_int8 -127%s-128 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg127_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"sub_int8 -128%s-127 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg127_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"sub_int8 -127%s-127 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg127_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"sub_int8 -127%s-127 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg127_int8_ssa(-1); got != -126 {\n\t\tfmt.Printf(\"sub_int8 -127%s-1 = %d, wanted -126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg127_ssa(-1); got != 126 {\n\t\tfmt.Printf(\"sub_int8 -1%s-127 = %d, wanted 126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg127_int8_ssa(0); got != -127 {\n\t\tfmt.Printf(\"sub_int8 -127%s0 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg127_ssa(0); got != 127 {\n\t\tfmt.Printf(\"sub_int8 0%s-127 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg127_int8_ssa(1); got != -128 {\n\t\tfmt.Printf(\"sub_int8 -127%s1 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg127_ssa(1); got != -128 {\n\t\tfmt.Printf(\"sub_int8 1%s-127 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg127_int8_ssa(126); got != 3 {\n\t\tfmt.Printf(\"sub_int8 -127%s126 = %d, wanted 3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg127_ssa(126); got != -3 {\n\t\tfmt.Printf(\"sub_int8 126%s-127 = %d, wanted -3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg127_int8_ssa(127); got != 2 {\n\t\tfmt.Printf(\"sub_int8 -127%s127 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg127_ssa(127); got != -2 {\n\t\tfmt.Printf(\"sub_int8 127%s-127 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int8_ssa(-128); got != 127 {\n\t\tfmt.Printf(\"sub_int8 -1%s-128 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg1_ssa(-128); got != -127 {\n\t\tfmt.Printf(\"sub_int8 -128%s-1 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int8_ssa(-127); got != 126 {\n\t\tfmt.Printf(\"sub_int8 -1%s-127 = %d, wanted 126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg1_ssa(-127); got != -126 {\n\t\tfmt.Printf(\"sub_int8 -127%s-1 = %d, wanted -126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int8 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"sub_int8 -1%s-1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int8_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int8 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg1_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int8 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int8_ssa(1); got != -2 {\n\t\tfmt.Printf(\"sub_int8 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg1_ssa(1); got != 2 {\n\t\tfmt.Printf(\"sub_int8 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int8_ssa(126); got != -127 {\n\t\tfmt.Printf(\"sub_int8 -1%s126 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg1_ssa(126); got != 127 {\n\t\tfmt.Printf(\"sub_int8 126%s-1 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_Neg1_int8_ssa(127); got != -128 {\n\t\tfmt.Printf(\"sub_int8 -1%s127 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_Neg1_ssa(127); got != -128 {\n\t\tfmt.Printf(\"sub_int8 127%s-1 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int8_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"sub_int8 0%s-128 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_0_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"sub_int8 -128%s0 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int8_ssa(-127); got != 127 {\n\t\tfmt.Printf(\"sub_int8 0%s-127 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_0_ssa(-127); got != -127 {\n\t\tfmt.Printf(\"sub_int8 -127%s0 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int8_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"sub_int8 0%s-1 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_0_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"sub_int8 -1%s0 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int8 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"sub_int8 0%s0 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int8_ssa(1); got != -1 {\n\t\tfmt.Printf(\"sub_int8 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_0_ssa(1); got != 1 {\n\t\tfmt.Printf(\"sub_int8 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int8_ssa(126); got != -126 {\n\t\tfmt.Printf(\"sub_int8 0%s126 = %d, wanted -126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_0_ssa(126); got != 126 {\n\t\tfmt.Printf(\"sub_int8 126%s0 = %d, wanted 126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_0_int8_ssa(127); got != -127 {\n\t\tfmt.Printf(\"sub_int8 0%s127 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_0_ssa(127); got != 127 {\n\t\tfmt.Printf(\"sub_int8 127%s0 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int8_ssa(-128); got != -127 {\n\t\tfmt.Printf(\"sub_int8 1%s-128 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_1_ssa(-128); got != 127 {\n\t\tfmt.Printf(\"sub_int8 -128%s1 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int8_ssa(-127); got != -128 {\n\t\tfmt.Printf(\"sub_int8 1%s-127 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_1_ssa(-127); got != -128 {\n\t\tfmt.Printf(\"sub_int8 -127%s1 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int8_ssa(-1); got != 2 {\n\t\tfmt.Printf(\"sub_int8 1%s-1 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_1_ssa(-1); got != -2 {\n\t\tfmt.Printf(\"sub_int8 -1%s1 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int8_ssa(0); got != 1 {\n\t\tfmt.Printf(\"sub_int8 1%s0 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_1_ssa(0); got != -1 {\n\t\tfmt.Printf(\"sub_int8 0%s1 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int8 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"sub_int8 1%s1 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int8_ssa(126); got != -125 {\n\t\tfmt.Printf(\"sub_int8 1%s126 = %d, wanted -125\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_1_ssa(126); got != 125 {\n\t\tfmt.Printf(\"sub_int8 126%s1 = %d, wanted 125\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_1_int8_ssa(127); got != -126 {\n\t\tfmt.Printf(\"sub_int8 1%s127 = %d, wanted -126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_1_ssa(127); got != 126 {\n\t\tfmt.Printf(\"sub_int8 127%s1 = %d, wanted 126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_126_int8_ssa(-128); got != -2 {\n\t\tfmt.Printf(\"sub_int8 126%s-128 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_126_ssa(-128); got != 2 {\n\t\tfmt.Printf(\"sub_int8 -128%s126 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_126_int8_ssa(-127); got != -3 {\n\t\tfmt.Printf(\"sub_int8 126%s-127 = %d, wanted -3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_126_ssa(-127); got != 3 {\n\t\tfmt.Printf(\"sub_int8 -127%s126 = %d, wanted 3\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_126_int8_ssa(-1); got != 127 {\n\t\tfmt.Printf(\"sub_int8 126%s-1 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_126_ssa(-1); got != -127 {\n\t\tfmt.Printf(\"sub_int8 -1%s126 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_126_int8_ssa(0); got != 126 {\n\t\tfmt.Printf(\"sub_int8 126%s0 = %d, wanted 126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_126_ssa(0); got != -126 {\n\t\tfmt.Printf(\"sub_int8 0%s126 = %d, wanted -126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_126_int8_ssa(1); got != 125 {\n\t\tfmt.Printf(\"sub_int8 126%s1 = %d, wanted 125\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_126_ssa(1); got != -125 {\n\t\tfmt.Printf(\"sub_int8 1%s126 = %d, wanted -125\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_126_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"sub_int8 126%s126 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_126_ssa(126); got != 0 {\n\t\tfmt.Printf(\"sub_int8 126%s126 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_126_int8_ssa(127); got != -1 {\n\t\tfmt.Printf(\"sub_int8 126%s127 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_126_ssa(127); got != 1 {\n\t\tfmt.Printf(\"sub_int8 127%s126 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_127_int8_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"sub_int8 127%s-128 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_127_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"sub_int8 -128%s127 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_127_int8_ssa(-127); got != -2 {\n\t\tfmt.Printf(\"sub_int8 127%s-127 = %d, wanted -2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_127_ssa(-127); got != 2 {\n\t\tfmt.Printf(\"sub_int8 -127%s127 = %d, wanted 2\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_127_int8_ssa(-1); got != -128 {\n\t\tfmt.Printf(\"sub_int8 127%s-1 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_127_ssa(-1); got != -128 {\n\t\tfmt.Printf(\"sub_int8 -1%s127 = %d, wanted -128\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_127_int8_ssa(0); got != 127 {\n\t\tfmt.Printf(\"sub_int8 127%s0 = %d, wanted 127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_127_ssa(0); got != -127 {\n\t\tfmt.Printf(\"sub_int8 0%s127 = %d, wanted -127\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_127_int8_ssa(1); got != 126 {\n\t\tfmt.Printf(\"sub_int8 127%s1 = %d, wanted 126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_127_ssa(1); got != -126 {\n\t\tfmt.Printf(\"sub_int8 1%s127 = %d, wanted -126\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_127_int8_ssa(126); got != 1 {\n\t\tfmt.Printf(\"sub_int8 127%s126 = %d, wanted 1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_127_ssa(126); got != -1 {\n\t\tfmt.Printf(\"sub_int8 126%s127 = %d, wanted -1\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_127_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"sub_int8 127%s127 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := sub_int8_127_ssa(127); got != 0 {\n\t\tfmt.Printf(\"sub_int8 127%s127 = %d, wanted 0\\n\", `-`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg128_int8_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"div_int8 -128%s-128 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg128_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"div_int8 -128%s-128 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg128_int8_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"div_int8 -128%s-127 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg128_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"div_int8 -127%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg128_int8_ssa(-1); got != -128 {\n\t\tfmt.Printf(\"div_int8 -128%s-1 = %d, wanted -128\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg128_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg128_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg128_int8_ssa(1); got != -128 {\n\t\tfmt.Printf(\"div_int8 -128%s1 = %d, wanted -128\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg128_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg128_int8_ssa(126); got != -1 {\n\t\tfmt.Printf(\"div_int8 -128%s126 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg128_ssa(126); got != 0 {\n\t\tfmt.Printf(\"div_int8 126%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg128_int8_ssa(127); got != -1 {\n\t\tfmt.Printf(\"div_int8 -128%s127 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg128_ssa(127); got != 0 {\n\t\tfmt.Printf(\"div_int8 127%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg127_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"div_int8 -127%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg127_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"div_int8 -128%s-127 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg127_int8_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"div_int8 -127%s-127 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg127_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"div_int8 -127%s-127 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg127_int8_ssa(-1); got != 127 {\n\t\tfmt.Printf(\"div_int8 -127%s-1 = %d, wanted 127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg127_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg127_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg127_int8_ssa(1); got != -127 {\n\t\tfmt.Printf(\"div_int8 -127%s1 = %d, wanted -127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg127_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg127_int8_ssa(126); got != -1 {\n\t\tfmt.Printf(\"div_int8 -127%s126 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg127_ssa(126); got != 0 {\n\t\tfmt.Printf(\"div_int8 126%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg127_int8_ssa(127); got != -1 {\n\t\tfmt.Printf(\"div_int8 -127%s127 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg127_ssa(127); got != -1 {\n\t\tfmt.Printf(\"div_int8 127%s-127 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg1_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"div_int8 -128%s-1 = %d, wanted -128\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg1_ssa(-127); got != 127 {\n\t\tfmt.Printf(\"div_int8 -127%s-1 = %d, wanted 127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int8_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int8 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"div_int8 -1%s-1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int8_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int8 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"div_int8 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s126 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg1_ssa(126); got != -126 {\n\t\tfmt.Printf(\"div_int8 126%s-1 = %d, wanted -126\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_Neg1_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_Neg1_ssa(127); got != -127 {\n\t\tfmt.Printf(\"div_int8 127%s-1 = %d, wanted -127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s-1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s126 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_0_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_1_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"div_int8 -128%s1 = %d, wanted -128\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_1_ssa(-127); got != -127 {\n\t\tfmt.Printf(\"div_int8 -127%s1 = %d, wanted -127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int8_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int8 1%s-1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"div_int8 -1%s1 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s1 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int8_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int8 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"div_int8 1%s1 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s126 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_1_ssa(126); got != 126 {\n\t\tfmt.Printf(\"div_int8 126%s1 = %d, wanted 126\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_1_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_1_ssa(127); got != 127 {\n\t\tfmt.Printf(\"div_int8 127%s1 = %d, wanted 127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_126_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"div_int8 126%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_126_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"div_int8 -128%s126 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_126_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"div_int8 126%s-127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_126_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"div_int8 -127%s126 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_126_int8_ssa(-1); got != -126 {\n\t\tfmt.Printf(\"div_int8 126%s-1 = %d, wanted -126\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_126_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s126 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_126_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s126 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_126_int8_ssa(1); got != 126 {\n\t\tfmt.Printf(\"div_int8 126%s1 = %d, wanted 126\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_126_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s126 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_126_int8_ssa(126); got != 1 {\n\t\tfmt.Printf(\"div_int8 126%s126 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_126_ssa(126); got != 1 {\n\t\tfmt.Printf(\"div_int8 126%s126 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_126_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"div_int8 126%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_126_ssa(127); got != 1 {\n\t\tfmt.Printf(\"div_int8 127%s126 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_127_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"div_int8 127%s-128 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_127_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"div_int8 -128%s127 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_127_int8_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"div_int8 127%s-127 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_127_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"div_int8 -127%s127 = %d, wanted -1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_127_int8_ssa(-1); got != -127 {\n\t\tfmt.Printf(\"div_int8 127%s-1 = %d, wanted -127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_127_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"div_int8 -1%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_127_ssa(0); got != 0 {\n\t\tfmt.Printf(\"div_int8 0%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_127_int8_ssa(1); got != 127 {\n\t\tfmt.Printf(\"div_int8 127%s1 = %d, wanted 127\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_127_ssa(1); got != 0 {\n\t\tfmt.Printf(\"div_int8 1%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_127_int8_ssa(126); got != 1 {\n\t\tfmt.Printf(\"div_int8 127%s126 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_127_ssa(126); got != 0 {\n\t\tfmt.Printf(\"div_int8 126%s127 = %d, wanted 0\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_127_int8_ssa(127); got != 1 {\n\t\tfmt.Printf(\"div_int8 127%s127 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := div_int8_127_ssa(127); got != 1 {\n\t\tfmt.Printf(\"div_int8 127%s127 = %d, wanted 1\\n\", `/`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg128_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -128%s-128 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg128_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -128%s-128 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg128_int8_ssa(-127); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s-127 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg128_ssa(-127); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -127%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg128_int8_ssa(-1); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s-1 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg128_ssa(-1); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -1%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg128_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -128%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg128_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s-128 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg128_int8_ssa(1); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s1 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg128_ssa(1); got != -128 {\n\t\tfmt.Printf(\"mul_int8 1%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg128_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -128%s126 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg128_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mul_int8 126%s-128 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg128_int8_ssa(127); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s127 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg128_ssa(127); got != -128 {\n\t\tfmt.Printf(\"mul_int8 127%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg127_int8_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -127%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg127_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s-127 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg127_int8_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"mul_int8 -127%s-127 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg127_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"mul_int8 -127%s-127 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg127_int8_ssa(-1); got != 127 {\n\t\tfmt.Printf(\"mul_int8 -127%s-1 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg127_ssa(-1); got != 127 {\n\t\tfmt.Printf(\"mul_int8 -1%s-127 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg127_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -127%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg127_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s-127 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg127_int8_ssa(1); got != -127 {\n\t\tfmt.Printf(\"mul_int8 -127%s1 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg127_ssa(1); got != -127 {\n\t\tfmt.Printf(\"mul_int8 1%s-127 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg127_int8_ssa(126); got != 126 {\n\t\tfmt.Printf(\"mul_int8 -127%s126 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg127_ssa(126); got != 126 {\n\t\tfmt.Printf(\"mul_int8 126%s-127 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg127_int8_ssa(127); got != -1 {\n\t\tfmt.Printf(\"mul_int8 -127%s127 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg127_ssa(127); got != -1 {\n\t\tfmt.Printf(\"mul_int8 127%s-127 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int8_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -1%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg1_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s-1 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int8_ssa(-127); got != 127 {\n\t\tfmt.Printf(\"mul_int8 -1%s-127 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg1_ssa(-127); got != 127 {\n\t\tfmt.Printf(\"mul_int8 -127%s-1 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int8_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int8 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg1_ssa(-1); got != 1 {\n\t\tfmt.Printf(\"mul_int8 -1%s-1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int8_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int8 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg1_ssa(1); got != -1 {\n\t\tfmt.Printf(\"mul_int8 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int8_ssa(126); got != -126 {\n\t\tfmt.Printf(\"mul_int8 -1%s126 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg1_ssa(126); got != -126 {\n\t\tfmt.Printf(\"mul_int8 126%s-1 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_Neg1_int8_ssa(127); got != -127 {\n\t\tfmt.Printf(\"mul_int8 -1%s127 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_Neg1_ssa(127); got != -127 {\n\t\tfmt.Printf(\"mul_int8 127%s-1 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s-128 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_0_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -128%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s-127 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_0_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -127%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s-1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_0_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_0_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_0_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mul_int8 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s126 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_0_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mul_int8 126%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_0_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s127 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_0_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mul_int8 127%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int8_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 1%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_1_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s1 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int8_ssa(-127); got != -127 {\n\t\tfmt.Printf(\"mul_int8 1%s-127 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_1_ssa(-127); got != -127 {\n\t\tfmt.Printf(\"mul_int8 -127%s1 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int8_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int8 1%s-1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_1_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mul_int8 -1%s1 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 1%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s1 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int8_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int8 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_1_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mul_int8 1%s1 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int8_ssa(126); got != 126 {\n\t\tfmt.Printf(\"mul_int8 1%s126 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_1_ssa(126); got != 126 {\n\t\tfmt.Printf(\"mul_int8 126%s1 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_1_int8_ssa(127); got != 127 {\n\t\tfmt.Printf(\"mul_int8 1%s127 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_1_ssa(127); got != 127 {\n\t\tfmt.Printf(\"mul_int8 127%s1 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_126_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mul_int8 126%s-128 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_126_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mul_int8 -128%s126 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_126_int8_ssa(-127); got != 126 {\n\t\tfmt.Printf(\"mul_int8 126%s-127 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_126_ssa(-127); got != 126 {\n\t\tfmt.Printf(\"mul_int8 -127%s126 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_126_int8_ssa(-1); got != -126 {\n\t\tfmt.Printf(\"mul_int8 126%s-1 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_126_ssa(-1); got != -126 {\n\t\tfmt.Printf(\"mul_int8 -1%s126 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_126_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 126%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_126_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s126 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_126_int8_ssa(1); got != 126 {\n\t\tfmt.Printf(\"mul_int8 126%s1 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_126_ssa(1); got != 126 {\n\t\tfmt.Printf(\"mul_int8 1%s126 = %d, wanted 126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_126_int8_ssa(126); got != 4 {\n\t\tfmt.Printf(\"mul_int8 126%s126 = %d, wanted 4\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_126_ssa(126); got != 4 {\n\t\tfmt.Printf(\"mul_int8 126%s126 = %d, wanted 4\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_126_int8_ssa(127); got != -126 {\n\t\tfmt.Printf(\"mul_int8 126%s127 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_126_ssa(127); got != -126 {\n\t\tfmt.Printf(\"mul_int8 127%s126 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_127_int8_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 127%s-128 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_127_ssa(-128); got != -128 {\n\t\tfmt.Printf(\"mul_int8 -128%s127 = %d, wanted -128\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_127_int8_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"mul_int8 127%s-127 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_127_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"mul_int8 -127%s127 = %d, wanted -1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_127_int8_ssa(-1); got != -127 {\n\t\tfmt.Printf(\"mul_int8 127%s-1 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_127_ssa(-1); got != -127 {\n\t\tfmt.Printf(\"mul_int8 -1%s127 = %d, wanted -127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_127_int8_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 127%s0 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_127_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mul_int8 0%s127 = %d, wanted 0\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_127_int8_ssa(1); got != 127 {\n\t\tfmt.Printf(\"mul_int8 127%s1 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_127_ssa(1); got != 127 {\n\t\tfmt.Printf(\"mul_int8 1%s127 = %d, wanted 127\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_127_int8_ssa(126); got != -126 {\n\t\tfmt.Printf(\"mul_int8 127%s126 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_127_ssa(126); got != -126 {\n\t\tfmt.Printf(\"mul_int8 126%s127 = %d, wanted -126\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_127_int8_ssa(127); got != 1 {\n\t\tfmt.Printf(\"mul_int8 127%s127 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mul_int8_127_ssa(127); got != 1 {\n\t\tfmt.Printf(\"mul_int8 127%s127 = %d, wanted 1\\n\", `*`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg128_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -128%s-128 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg128_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -128%s-128 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg128_int8_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -128%s-127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg128_ssa(-127); got != -127 {\n\t\tfmt.Printf(\"mod_int8 -127%s-128 = %d, wanted -127\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg128_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -128%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg128_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s-128 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg128_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s-128 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg128_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -128%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg128_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s-128 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg128_int8_ssa(126); got != -2 {\n\t\tfmt.Printf(\"mod_int8 -128%s126 = %d, wanted -2\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg128_ssa(126); got != 126 {\n\t\tfmt.Printf(\"mod_int8 126%s-128 = %d, wanted 126\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg128_int8_ssa(127); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -128%s127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg128_ssa(127); got != 127 {\n\t\tfmt.Printf(\"mod_int8 127%s-128 = %d, wanted 127\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg127_int8_ssa(-128); got != -127 {\n\t\tfmt.Printf(\"mod_int8 -127%s-128 = %d, wanted -127\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg127_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -128%s-127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg127_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s-127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg127_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s-127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg127_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg127_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s-127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg127_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s-127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg127_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg127_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s-127 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg127_int8_ssa(126); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -127%s126 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg127_ssa(126); got != 126 {\n\t\tfmt.Printf(\"mod_int8 126%s-127 = %d, wanted 126\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg127_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg127_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s-127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int8_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s-128 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg1_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -128%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int8_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s-127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg1_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int8_ssa(126); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s126 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg1_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mod_int8 126%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_Neg1_int8_ssa(127); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_Neg1_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int8_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s-128 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s-127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s126 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_0_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int8_ssa(-128); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s-128 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_1_ssa(-128); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -128%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int8_ssa(-127); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s-127 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_1_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 1%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_1_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_1_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_1_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 1%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int8_ssa(126); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s126 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_1_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mod_int8 126%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_1_int8_ssa(127); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s127 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_1_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_126_int8_ssa(-128); got != 126 {\n\t\tfmt.Printf(\"mod_int8 126%s-128 = %d, wanted 126\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_126_ssa(-128); got != -2 {\n\t\tfmt.Printf(\"mod_int8 -128%s126 = %d, wanted -2\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_126_int8_ssa(-127); got != 126 {\n\t\tfmt.Printf(\"mod_int8 126%s-127 = %d, wanted 126\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_126_ssa(-127); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -127%s126 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_126_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 126%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_126_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s126 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_126_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s126 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_126_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 126%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_126_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s126 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_126_int8_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mod_int8 126%s126 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_126_ssa(126); got != 0 {\n\t\tfmt.Printf(\"mod_int8 126%s126 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_126_int8_ssa(127); got != 126 {\n\t\tfmt.Printf(\"mod_int8 126%s127 = %d, wanted 126\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_126_ssa(127); got != 1 {\n\t\tfmt.Printf(\"mod_int8 127%s126 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_127_int8_ssa(-128); got != 127 {\n\t\tfmt.Printf(\"mod_int8 127%s-128 = %d, wanted 127\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_127_ssa(-128); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -128%s127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_127_int8_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s-127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_127_ssa(-127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 -127%s127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_127_int8_ssa(-1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s-1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_127_ssa(-1); got != -1 {\n\t\tfmt.Printf(\"mod_int8 -1%s127 = %d, wanted -1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_127_ssa(0); got != 0 {\n\t\tfmt.Printf(\"mod_int8 0%s127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_127_int8_ssa(1); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s1 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_127_ssa(1); got != 1 {\n\t\tfmt.Printf(\"mod_int8 1%s127 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_127_int8_ssa(126); got != 1 {\n\t\tfmt.Printf(\"mod_int8 127%s126 = %d, wanted 1\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_127_ssa(126); got != 126 {\n\t\tfmt.Printf(\"mod_int8 126%s127 = %d, wanted 126\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_127_int8_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\n\tif got := mod_int8_127_ssa(127); got != 0 {\n\t\tfmt.Printf(\"mod_int8 127%s127 = %d, wanted 0\\n\", `%`, got)\n\t\tfailed = true\n\t}\n\tif failed {\n\t\tpanic(\"tests failed\")\n\t}\n}\n" }, { "path": "tests/data/pass/hello.go", "content": "// GOAL: parse, compile, run, assert output == \"Hello, rgo\".\npackage main\n\nimport \"fmt\"\n\nfunc main() {\n\tfmt.Println(\"Hello, rgo\")\n}\n" }, { "path": "tests/data/pass/precedence.go", "content": "package main\n\nfunc main() {\n\t// Equals 97.\n\ta := 45 + 52\n\t// Next line equivalent to: (23%45) + (21/45) + 5 - ((2<<3)*6)&5\n\t// Equals 28.\n\tb := 23%45 + 21/45 + 5 - 2<<3*6&5\n}\n" }, { "path": "tests/data/pass/rewriteAMD64.go", "content": "// autogenerated from gen/AMD64.rules: do not edit!\n// generated with: cd gen; go run *.go\n\npackage ssa\n\nimport \"math\"\n\nvar _ = math.MinInt8 // in case not otherwise used\nfunc rewriteValueAMD64(v *Value, config *Config) bool {\n\tswitch v.Op {\n\tcase OpAMD64ADDB:\n\t\treturn rewriteValueAMD64_OpAMD64ADDB(v, config)\n\tcase OpAMD64ADDBconst:\n\t\treturn rewriteValueAMD64_OpAMD64ADDBconst(v, config)\n\tcase OpAMD64ADDL:\n\t\treturn rewriteValueAMD64_OpAMD64ADDL(v, config)\n\tcase OpAMD64ADDLconst:\n\t\treturn rewriteValueAMD64_OpAMD64ADDLconst(v, config)\n\tcase OpAMD64ADDQ:\n\t\treturn rewriteValueAMD64_OpAMD64ADDQ(v, config)\n\tcase OpAMD64ADDQconst:\n\t\treturn rewriteValueAMD64_OpAMD64ADDQconst(v, config)\n\tcase OpAMD64ADDW:\n\t\treturn rewriteValueAMD64_OpAMD64ADDW(v, config)\n\tcase OpAMD64ADDWconst:\n\t\treturn rewriteValueAMD64_OpAMD64ADDWconst(v, config)\n\tcase OpAMD64ANDB:\n\t\treturn rewriteValueAMD64_OpAMD64ANDB(v, config)\n\tcase OpAMD64ANDBconst:\n\t\treturn rewriteValueAMD64_OpAMD64ANDBconst(v, config)\n\tcase OpAMD64ANDL:\n\t\treturn rewriteValueAMD64_OpAMD64ANDL(v, config)\n\tcase OpAMD64ANDLconst:\n\t\treturn rewriteValueAMD64_OpAMD64ANDLconst(v, config)\n\tcase OpAMD64ANDQ:\n\t\treturn rewriteValueAMD64_OpAMD64ANDQ(v, config)\n\tcase OpAMD64ANDQconst:\n\t\treturn rewriteValueAMD64_OpAMD64ANDQconst(v, config)\n\tcase OpAMD64ANDW:\n\t\treturn rewriteValueAMD64_OpAMD64ANDW(v, config)\n\tcase OpAMD64ANDWconst:\n\t\treturn rewriteValueAMD64_OpAMD64ANDWconst(v, config)\n\tcase OpAdd16:\n\t\treturn rewriteValueAMD64_OpAdd16(v, config)\n\tcase OpAdd32:\n\t\treturn rewriteValueAMD64_OpAdd32(v, config)\n\tcase OpAdd32F:\n\t\treturn rewriteValueAMD64_OpAdd32F(v, config)\n\tcase OpAdd64:\n\t\treturn rewriteValueAMD64_OpAdd64(v, config)\n\tcase OpAdd64F:\n\t\treturn rewriteValueAMD64_OpAdd64F(v, config)\n\tcase OpAdd8:\n\t\treturn rewriteValueAMD64_OpAdd8(v, config)\n\tcase OpAddPtr:\n\t\treturn rewriteValueAMD64_OpAddPtr(v, config)\n\tcase OpAddr:\n\t\treturn rewriteValueAMD64_OpAddr(v, config)\n\tcase OpAnd16:\n\t\treturn rewriteValueAMD64_OpAnd16(v, config)\n\tcase OpAnd32:\n\t\treturn rewriteValueAMD64_OpAnd32(v, config)\n\tcase OpAnd64:\n\t\treturn rewriteValueAMD64_OpAnd64(v, config)\n\tcase OpAnd8:\n\t\treturn rewriteValueAMD64_OpAnd8(v, config)\n\tcase OpAvg64u:\n\t\treturn rewriteValueAMD64_OpAvg64u(v, config)\n\tcase OpBswap32:\n\t\treturn rewriteValueAMD64_OpBswap32(v, config)\n\tcase OpBswap64:\n\t\treturn rewriteValueAMD64_OpBswap64(v, config)\n\tcase OpAMD64CMOVLEQconst:\n\t\treturn rewriteValueAMD64_OpAMD64CMOVLEQconst(v, config)\n\tcase OpAMD64CMOVQEQconst:\n\t\treturn rewriteValueAMD64_OpAMD64CMOVQEQconst(v, config)\n\tcase OpAMD64CMOVWEQconst:\n\t\treturn rewriteValueAMD64_OpAMD64CMOVWEQconst(v, config)\n\tcase OpAMD64CMPB:\n\t\treturn rewriteValueAMD64_OpAMD64CMPB(v, config)\n\tcase OpAMD64CMPBconst:\n\t\treturn rewriteValueAMD64_OpAMD64CMPBconst(v, config)\n\tcase OpAMD64CMPL:\n\t\treturn rewriteValueAMD64_OpAMD64CMPL(v, config)\n\tcase OpAMD64CMPLconst:\n\t\treturn rewriteValueAMD64_OpAMD64CMPLconst(v, config)\n\tcase OpAMD64CMPQ:\n\t\treturn rewriteValueAMD64_OpAMD64CMPQ(v, config)\n\tcase OpAMD64CMPQconst:\n\t\treturn rewriteValueAMD64_OpAMD64CMPQconst(v, config)\n\tcase OpAMD64CMPW:\n\t\treturn rewriteValueAMD64_OpAMD64CMPW(v, config)\n\tcase OpAMD64CMPWconst:\n\t\treturn rewriteValueAMD64_OpAMD64CMPWconst(v, config)\n\tcase OpClosureCall:\n\t\treturn rewriteValueAMD64_OpClosureCall(v, config)\n\tcase OpCom16:\n\t\treturn rewriteValueAMD64_OpCom16(v, config)\n\tcase OpCom32:\n\t\treturn rewriteValueAMD64_OpCom32(v, config)\n\tcase OpCom64:\n\t\treturn rewriteValueAMD64_OpCom64(v, config)\n\tcase OpCom8:\n\t\treturn rewriteValueAMD64_OpCom8(v, config)\n\tcase OpConst16:\n\t\treturn rewriteValueAMD64_OpConst16(v, config)\n\tcase OpConst32:\n\t\treturn rewriteValueAMD64_OpConst32(v, config)\n\tcase OpConst32F:\n\t\treturn rewriteValueAMD64_OpConst32F(v, config)\n\tcase OpConst64:\n\t\treturn rewriteValueAMD64_OpConst64(v, config)\n\tcase OpConst64F:\n\t\treturn rewriteValueAMD64_OpConst64F(v, config)\n\tcase OpConst8:\n\t\treturn rewriteValueAMD64_OpConst8(v, config)\n\tcase OpConstBool:\n\t\treturn rewriteValueAMD64_OpConstBool(v, config)\n\tcase OpConstNil:\n\t\treturn rewriteValueAMD64_OpConstNil(v, config)\n\tcase OpConvert:\n\t\treturn rewriteValueAMD64_OpConvert(v, config)\n\tcase OpCtz16:\n\t\treturn rewriteValueAMD64_OpCtz16(v, config)\n\tcase OpCtz32:\n\t\treturn rewriteValueAMD64_OpCtz32(v, config)\n\tcase OpCtz64:\n\t\treturn rewriteValueAMD64_OpCtz64(v, config)\n\tcase OpCvt32Fto32:\n\t\treturn rewriteValueAMD64_OpCvt32Fto32(v, config)\n\tcase OpCvt32Fto64:\n\t\treturn rewriteValueAMD64_OpCvt32Fto64(v, config)\n\tcase OpCvt32Fto64F:\n\t\treturn rewriteValueAMD64_OpCvt32Fto64F(v, config)\n\tcase OpCvt32to32F:\n\t\treturn rewriteValueAMD64_OpCvt32to32F(v, config)\n\tcase OpCvt32to64F:\n\t\treturn rewriteValueAMD64_OpCvt32to64F(v, config)\n\tcase OpCvt64Fto32:\n\t\treturn rewriteValueAMD64_OpCvt64Fto32(v, config)\n\tcase OpCvt64Fto32F:\n\t\treturn rewriteValueAMD64_OpCvt64Fto32F(v, config)\n\tcase OpCvt64Fto64:\n\t\treturn rewriteValueAMD64_OpCvt64Fto64(v, config)\n\tcase OpCvt64to32F:\n\t\treturn rewriteValueAMD64_OpCvt64to32F(v, config)\n\tcase OpCvt64to64F:\n\t\treturn rewriteValueAMD64_OpCvt64to64F(v, config)\n\tcase OpDeferCall:\n\t\treturn rewriteValueAMD64_OpDeferCall(v, config)\n\tcase OpDiv16:\n\t\treturn rewriteValueAMD64_OpDiv16(v, config)\n\tcase OpDiv16u:\n\t\treturn rewriteValueAMD64_OpDiv16u(v, config)\n\tcase OpDiv32:\n\t\treturn rewriteValueAMD64_OpDiv32(v, config)\n\tcase OpDiv32F:\n\t\treturn rewriteValueAMD64_OpDiv32F(v, config)\n\tcase OpDiv32u:\n\t\treturn rewriteValueAMD64_OpDiv32u(v, config)\n\tcase OpDiv64:\n\t\treturn rewriteValueAMD64_OpDiv64(v, config)\n\tcase OpDiv64F:\n\t\treturn rewriteValueAMD64_OpDiv64F(v, config)\n\tcase OpDiv64u:\n\t\treturn rewriteValueAMD64_OpDiv64u(v, config)\n\tcase OpDiv8:\n\t\treturn rewriteValueAMD64_OpDiv8(v, config)\n\tcase OpDiv8u:\n\t\treturn rewriteValueAMD64_OpDiv8u(v, config)\n\tcase OpEq16:\n\t\treturn rewriteValueAMD64_OpEq16(v, config)\n\tcase OpEq32:\n\t\treturn rewriteValueAMD64_OpEq32(v, config)\n\tcase OpEq32F:\n\t\treturn rewriteValueAMD64_OpEq32F(v, config)\n\tcase OpEq64:\n\t\treturn rewriteValueAMD64_OpEq64(v, config)\n\tcase OpEq64F:\n\t\treturn rewriteValueAMD64_OpEq64F(v, config)\n\tcase OpEq8:\n\t\treturn rewriteValueAMD64_OpEq8(v, config)\n\tcase OpEqPtr:\n\t\treturn rewriteValueAMD64_OpEqPtr(v, config)\n\tcase OpGeq16:\n\t\treturn rewriteValueAMD64_OpGeq16(v, config)\n\tcase OpGeq16U:\n\t\treturn rewriteValueAMD64_OpGeq16U(v, config)\n\tcase OpGeq32:\n\t\treturn rewriteValueAMD64_OpGeq32(v, config)\n\tcase OpGeq32F:\n\t\treturn rewriteValueAMD64_OpGeq32F(v, config)\n\tcase OpGeq32U:\n\t\treturn rewriteValueAMD64_OpGeq32U(v, config)\n\tcase OpGeq64:\n\t\treturn rewriteValueAMD64_OpGeq64(v, config)\n\tcase OpGeq64F:\n\t\treturn rewriteValueAMD64_OpGeq64F(v, config)\n\tcase OpGeq64U:\n\t\treturn rewriteValueAMD64_OpGeq64U(v, config)\n\tcase OpGeq8:\n\t\treturn rewriteValueAMD64_OpGeq8(v, config)\n\tcase OpGeq8U:\n\t\treturn rewriteValueAMD64_OpGeq8U(v, config)\n\tcase OpGetClosurePtr:\n\t\treturn rewriteValueAMD64_OpGetClosurePtr(v, config)\n\tcase OpGetG:\n\t\treturn rewriteValueAMD64_OpGetG(v, config)\n\tcase OpGoCall:\n\t\treturn rewriteValueAMD64_OpGoCall(v, config)\n\tcase OpGreater16:\n\t\treturn rewriteValueAMD64_OpGreater16(v, config)\n\tcase OpGreater16U:\n\t\treturn rewriteValueAMD64_OpGreater16U(v, config)\n\tcase OpGreater32:\n\t\treturn rewriteValueAMD64_OpGreater32(v, config)\n\tcase OpGreater32F:\n\t\treturn rewriteValueAMD64_OpGreater32F(v, config)\n\tcase OpGreater32U:\n\t\treturn rewriteValueAMD64_OpGreater32U(v, config)\n\tcase OpGreater64:\n\t\treturn rewriteValueAMD64_OpGreater64(v, config)\n\tcase OpGreater64F:\n\t\treturn rewriteValueAMD64_OpGreater64F(v, config)\n\tcase OpGreater64U:\n\t\treturn rewriteValueAMD64_OpGreater64U(v, config)\n\tcase OpGreater8:\n\t\treturn rewriteValueAMD64_OpGreater8(v, config)\n\tcase OpGreater8U:\n\t\treturn rewriteValueAMD64_OpGreater8U(v, config)\n\tcase OpHmul16:\n\t\treturn rewriteValueAMD64_OpHmul16(v, config)\n\tcase OpHmul16u:\n\t\treturn rewriteValueAMD64_OpHmul16u(v, config)\n\tcase OpHmul32:\n\t\treturn rewriteValueAMD64_OpHmul32(v, config)\n\tcase OpHmul32u:\n\t\treturn rewriteValueAMD64_OpHmul32u(v, config)\n\tcase OpHmul64:\n\t\treturn rewriteValueAMD64_OpHmul64(v, config)\n\tcase OpHmul64u:\n\t\treturn rewriteValueAMD64_OpHmul64u(v, config)\n\tcase OpHmul8:\n\t\treturn rewriteValueAMD64_OpHmul8(v, config)\n\tcase OpHmul8u:\n\t\treturn rewriteValueAMD64_OpHmul8u(v, config)\n\tcase OpITab:\n\t\treturn rewriteValueAMD64_OpITab(v, config)\n\tcase OpInterCall:\n\t\treturn rewriteValueAMD64_OpInterCall(v, config)\n\tcase OpIsInBounds:\n\t\treturn rewriteValueAMD64_OpIsInBounds(v, config)\n\tcase OpIsNonNil:\n\t\treturn rewriteValueAMD64_OpIsNonNil(v, config)\n\tcase OpIsSliceInBounds:\n\t\treturn rewriteValueAMD64_OpIsSliceInBounds(v, config)\n\tcase OpAMD64LEAQ:\n\t\treturn rewriteValueAMD64_OpAMD64LEAQ(v, config)\n\tcase OpAMD64LEAQ1:\n\t\treturn rewriteValueAMD64_OpAMD64LEAQ1(v, config)\n\tcase OpAMD64LEAQ2:\n\t\treturn rewriteValueAMD64_OpAMD64LEAQ2(v, config)\n\tcase OpAMD64LEAQ4:\n\t\treturn rewriteValueAMD64_OpAMD64LEAQ4(v, config)\n\tcase OpAMD64LEAQ8:\n\t\treturn rewriteValueAMD64_OpAMD64LEAQ8(v, config)\n\tcase OpLeq16:\n\t\treturn rewriteValueAMD64_OpLeq16(v, config)\n\tcase OpLeq16U:\n\t\treturn rewriteValueAMD64_OpLeq16U(v, config)\n\tcase OpLeq32:\n\t\treturn rewriteValueAMD64_OpLeq32(v, config)\n\tcase OpLeq32F:\n\t\treturn rewriteValueAMD64_OpLeq32F(v, config)\n\tcase OpLeq32U:\n\t\treturn rewriteValueAMD64_OpLeq32U(v, config)\n\tcase OpLeq64:\n\t\treturn rewriteValueAMD64_OpLeq64(v, config)\n\tcase OpLeq64F:\n\t\treturn rewriteValueAMD64_OpLeq64F(v, config)\n\tcase OpLeq64U:\n\t\treturn rewriteValueAMD64_OpLeq64U(v, config)\n\tcase OpLeq8:\n\t\treturn rewriteValueAMD64_OpLeq8(v, config)\n\tcase OpLeq8U:\n\t\treturn rewriteValueAMD64_OpLeq8U(v, config)\n\tcase OpLess16:\n\t\treturn rewriteValueAMD64_OpLess16(v, config)\n\tcase OpLess16U:\n\t\treturn rewriteValueAMD64_OpLess16U(v, config)\n\tcase OpLess32:\n\t\treturn rewriteValueAMD64_OpLess32(v, config)\n\tcase OpLess32F:\n\t\treturn rewriteValueAMD64_OpLess32F(v, config)\n\tcase OpLess32U:\n\t\treturn rewriteValueAMD64_OpLess32U(v, config)\n\tcase OpLess64:\n\t\treturn rewriteValueAMD64_OpLess64(v, config)\n\tcase OpLess64F:\n\t\treturn rewriteValueAMD64_OpLess64F(v, config)\n\tcase OpLess64U:\n\t\treturn rewriteValueAMD64_OpLess64U(v, config)\n\tcase OpLess8:\n\t\treturn rewriteValueAMD64_OpLess8(v, config)\n\tcase OpLess8U:\n\t\treturn rewriteValueAMD64_OpLess8U(v, config)\n\tcase OpLoad:\n\t\treturn rewriteValueAMD64_OpLoad(v, config)\n\tcase OpLrot16:\n\t\treturn rewriteValueAMD64_OpLrot16(v, config)\n\tcase OpLrot32:\n\t\treturn rewriteValueAMD64_OpLrot32(v, config)\n\tcase OpLrot64:\n\t\treturn rewriteValueAMD64_OpLrot64(v, config)\n\tcase OpLrot8:\n\t\treturn rewriteValueAMD64_OpLrot8(v, config)\n\tcase OpLsh16x16:\n\t\treturn rewriteValueAMD64_OpLsh16x16(v, config)\n\tcase OpLsh16x32:\n\t\treturn rewriteValueAMD64_OpLsh16x32(v, config)\n\tcase OpLsh16x64:\n\t\treturn rewriteValueAMD64_OpLsh16x64(v, config)\n\tcase OpLsh16x8:\n\t\treturn rewriteValueAMD64_OpLsh16x8(v, config)\n\tcase OpLsh32x16:\n\t\treturn rewriteValueAMD64_OpLsh32x16(v, config)\n\tcase OpLsh32x32:\n\t\treturn rewriteValueAMD64_OpLsh32x32(v, config)\n\tcase OpLsh32x64:\n\t\treturn rewriteValueAMD64_OpLsh32x64(v, config)\n\tcase OpLsh32x8:\n\t\treturn rewriteValueAMD64_OpLsh32x8(v, config)\n\tcase OpLsh64x16:\n\t\treturn rewriteValueAMD64_OpLsh64x16(v, config)\n\tcase OpLsh64x32:\n\t\treturn rewriteValueAMD64_OpLsh64x32(v, config)\n\tcase OpLsh64x64:\n\t\treturn rewriteValueAMD64_OpLsh64x64(v, config)\n\tcase OpLsh64x8:\n\t\treturn rewriteValueAMD64_OpLsh64x8(v, config)\n\tcase OpLsh8x16:\n\t\treturn rewriteValueAMD64_OpLsh8x16(v, config)\n\tcase OpLsh8x32:\n\t\treturn rewriteValueAMD64_OpLsh8x32(v, config)\n\tcase OpLsh8x64:\n\t\treturn rewriteValueAMD64_OpLsh8x64(v, config)\n\tcase OpLsh8x8:\n\t\treturn rewriteValueAMD64_OpLsh8x8(v, config)\n\tcase OpAMD64MOVBQSX:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBQSX(v, config)\n\tcase OpAMD64MOVBQSXload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBQSXload(v, config)\n\tcase OpAMD64MOVBQZX:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBQZX(v, config)\n\tcase OpAMD64MOVBload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBload(v, config)\n\tcase OpAMD64MOVBloadidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBloadidx1(v, config)\n\tcase OpAMD64MOVBstore:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBstore(v, config)\n\tcase OpAMD64MOVBstoreconst:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBstoreconst(v, config)\n\tcase OpAMD64MOVBstoreconstidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBstoreconstidx1(v, config)\n\tcase OpAMD64MOVBstoreidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVBstoreidx1(v, config)\n\tcase OpAMD64MOVLQSX:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLQSX(v, config)\n\tcase OpAMD64MOVLQSXload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLQSXload(v, config)\n\tcase OpAMD64MOVLQZX:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLQZX(v, config)\n\tcase OpAMD64MOVLload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLload(v, config)\n\tcase OpAMD64MOVLloadidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLloadidx1(v, config)\n\tcase OpAMD64MOVLloadidx4:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLloadidx4(v, config)\n\tcase OpAMD64MOVLstore:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLstore(v, config)\n\tcase OpAMD64MOVLstoreconst:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLstoreconst(v, config)\n\tcase OpAMD64MOVLstoreconstidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLstoreconstidx1(v, config)\n\tcase OpAMD64MOVLstoreconstidx4:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLstoreconstidx4(v, config)\n\tcase OpAMD64MOVLstoreidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLstoreidx1(v, config)\n\tcase OpAMD64MOVLstoreidx4:\n\t\treturn rewriteValueAMD64_OpAMD64MOVLstoreidx4(v, config)\n\tcase OpAMD64MOVOload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVOload(v, config)\n\tcase OpAMD64MOVOstore:\n\t\treturn rewriteValueAMD64_OpAMD64MOVOstore(v, config)\n\tcase OpAMD64MOVQload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQload(v, config)\n\tcase OpAMD64MOVQloadidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQloadidx1(v, config)\n\tcase OpAMD64MOVQloadidx8:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQloadidx8(v, config)\n\tcase OpAMD64MOVQstore:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQstore(v, config)\n\tcase OpAMD64MOVQstoreconst:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQstoreconst(v, config)\n\tcase OpAMD64MOVQstoreconstidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQstoreconstidx1(v, config)\n\tcase OpAMD64MOVQstoreconstidx8:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQstoreconstidx8(v, config)\n\tcase OpAMD64MOVQstoreidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQstoreidx1(v, config)\n\tcase OpAMD64MOVQstoreidx8:\n\t\treturn rewriteValueAMD64_OpAMD64MOVQstoreidx8(v, config)\n\tcase OpAMD64MOVSDload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSDload(v, config)\n\tcase OpAMD64MOVSDloadidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSDloadidx1(v, config)\n\tcase OpAMD64MOVSDloadidx8:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSDloadidx8(v, config)\n\tcase OpAMD64MOVSDstore:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSDstore(v, config)\n\tcase OpAMD64MOVSDstoreidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSDstoreidx1(v, config)\n\tcase OpAMD64MOVSDstoreidx8:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSDstoreidx8(v, config)\n\tcase OpAMD64MOVSSload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSSload(v, config)\n\tcase OpAMD64MOVSSloadidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSSloadidx1(v, config)\n\tcase OpAMD64MOVSSloadidx4:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSSloadidx4(v, config)\n\tcase OpAMD64MOVSSstore:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSSstore(v, config)\n\tcase OpAMD64MOVSSstoreidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSSstoreidx1(v, config)\n\tcase OpAMD64MOVSSstoreidx4:\n\t\treturn rewriteValueAMD64_OpAMD64MOVSSstoreidx4(v, config)\n\tcase OpAMD64MOVWQSX:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWQSX(v, config)\n\tcase OpAMD64MOVWQSXload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWQSXload(v, config)\n\tcase OpAMD64MOVWQZX:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWQZX(v, config)\n\tcase OpAMD64MOVWload:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWload(v, config)\n\tcase OpAMD64MOVWloadidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWloadidx1(v, config)\n\tcase OpAMD64MOVWloadidx2:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWloadidx2(v, config)\n\tcase OpAMD64MOVWstore:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWstore(v, config)\n\tcase OpAMD64MOVWstoreconst:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWstoreconst(v, config)\n\tcase OpAMD64MOVWstoreconstidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWstoreconstidx1(v, config)\n\tcase OpAMD64MOVWstoreconstidx2:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWstoreconstidx2(v, config)\n\tcase OpAMD64MOVWstoreidx1:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWstoreidx1(v, config)\n\tcase OpAMD64MOVWstoreidx2:\n\t\treturn rewriteValueAMD64_OpAMD64MOVWstoreidx2(v, config)\n\tcase OpAMD64MULB:\n\t\treturn rewriteValueAMD64_OpAMD64MULB(v, config)\n\tcase OpAMD64MULBconst:\n\t\treturn rewriteValueAMD64_OpAMD64MULBconst(v, config)\n\tcase OpAMD64MULL:\n\t\treturn rewriteValueAMD64_OpAMD64MULL(v, config)\n\tcase OpAMD64MULLconst:\n\t\treturn rewriteValueAMD64_OpAMD64MULLconst(v, config)\n\tcase OpAMD64MULQ:\n\t\treturn rewriteValueAMD64_OpAMD64MULQ(v, config)\n\tcase OpAMD64MULQconst:\n\t\treturn rewriteValueAMD64_OpAMD64MULQconst(v, config)\n\tcase OpAMD64MULW:\n\t\treturn rewriteValueAMD64_OpAMD64MULW(v, config)\n\tcase OpAMD64MULWconst:\n\t\treturn rewriteValueAMD64_OpAMD64MULWconst(v, config)\n\tcase OpMod16:\n\t\treturn rewriteValueAMD64_OpMod16(v, config)\n\tcase OpMod16u:\n\t\treturn rewriteValueAMD64_OpMod16u(v, config)\n\tcase OpMod32:\n\t\treturn rewriteValueAMD64_OpMod32(v, config)\n\tcase OpMod32u:\n\t\treturn rewriteValueAMD64_OpMod32u(v, config)\n\tcase OpMod64:\n\t\treturn rewriteValueAMD64_OpMod64(v, config)\n\tcase OpMod64u:\n\t\treturn rewriteValueAMD64_OpMod64u(v, config)\n\tcase OpMod8:\n\t\treturn rewriteValueAMD64_OpMod8(v, config)\n\tcase OpMod8u:\n\t\treturn rewriteValueAMD64_OpMod8u(v, config)\n\tcase OpMove:\n\t\treturn rewriteValueAMD64_OpMove(v, config)\n\tcase OpMul16:\n\t\treturn rewriteValueAMD64_OpMul16(v, config)\n\tcase OpMul32:\n\t\treturn rewriteValueAMD64_OpMul32(v, config)\n\tcase OpMul32F:\n\t\treturn rewriteValueAMD64_OpMul32F(v, config)\n\tcase OpMul64:\n\t\treturn rewriteValueAMD64_OpMul64(v, config)\n\tcase OpMul64F:\n\t\treturn rewriteValueAMD64_OpMul64F(v, config)\n\tcase OpMul8:\n\t\treturn rewriteValueAMD64_OpMul8(v, config)\n\tcase OpAMD64NEGB:\n\t\treturn rewriteValueAMD64_OpAMD64NEGB(v, config)\n\tcase OpAMD64NEGL:\n\t\treturn rewriteValueAMD64_OpAMD64NEGL(v, config)\n\tcase OpAMD64NEGQ:\n\t\treturn rewriteValueAMD64_OpAMD64NEGQ(v, config)\n\tcase OpAMD64NEGW:\n\t\treturn rewriteValueAMD64_OpAMD64NEGW(v, config)\n\tcase OpAMD64NOTB:\n\t\treturn rewriteValueAMD64_OpAMD64NOTB(v, config)\n\tcase OpAMD64NOTL:\n\t\treturn rewriteValueAMD64_OpAMD64NOTL(v, config)\n\tcase OpAMD64NOTQ:\n\t\treturn rewriteValueAMD64_OpAMD64NOTQ(v, config)\n\tcase OpAMD64NOTW:\n\t\treturn rewriteValueAMD64_OpAMD64NOTW(v, config)\n\tcase OpNeg16:\n\t\treturn rewriteValueAMD64_OpNeg16(v, config)\n\tcase OpNeg32:\n\t\treturn rewriteValueAMD64_OpNeg32(v, config)\n\tcase OpNeg32F:\n\t\treturn rewriteValueAMD64_OpNeg32F(v, config)\n\tcase OpNeg64:\n\t\treturn rewriteValueAMD64_OpNeg64(v, config)\n\tcase OpNeg64F:\n\t\treturn rewriteValueAMD64_OpNeg64F(v, config)\n\tcase OpNeg8:\n\t\treturn rewriteValueAMD64_OpNeg8(v, config)\n\tcase OpNeq16:\n\t\treturn rewriteValueAMD64_OpNeq16(v, config)\n\tcase OpNeq32:\n\t\treturn rewriteValueAMD64_OpNeq32(v, config)\n\tcase OpNeq32F:\n\t\treturn rewriteValueAMD64_OpNeq32F(v, config)\n\tcase OpNeq64:\n\t\treturn rewriteValueAMD64_OpNeq64(v, config)\n\tcase OpNeq64F:\n\t\treturn rewriteValueAMD64_OpNeq64F(v, config)\n\tcase OpNeq8:\n\t\treturn rewriteValueAMD64_OpNeq8(v, config)\n\tcase OpNeqPtr:\n\t\treturn rewriteValueAMD64_OpNeqPtr(v, config)\n\tcase OpNilCheck:\n\t\treturn rewriteValueAMD64_OpNilCheck(v, config)\n\tcase OpNot:\n\t\treturn rewriteValueAMD64_OpNot(v, config)\n\tcase OpAMD64ORB:\n\t\treturn rewriteValueAMD64_OpAMD64ORB(v, config)\n\tcase OpAMD64ORBconst:\n\t\treturn rewriteValueAMD64_OpAMD64ORBconst(v, config)\n\tcase OpAMD64ORL:\n\t\treturn rewriteValueAMD64_OpAMD64ORL(v, config)\n\tcase OpAMD64ORLconst:\n\t\treturn rewriteValueAMD64_OpAMD64ORLconst(v, config)\n\tcase OpAMD64ORQ:\n\t\treturn rewriteValueAMD64_OpAMD64ORQ(v, config)\n\tcase OpAMD64ORQconst:\n\t\treturn rewriteValueAMD64_OpAMD64ORQconst(v, config)\n\tcase OpAMD64ORW:\n\t\treturn rewriteValueAMD64_OpAMD64ORW(v, config)\n\tcase OpAMD64ORWconst:\n\t\treturn rewriteValueAMD64_OpAMD64ORWconst(v, config)\n\tcase OpOffPtr:\n\t\treturn rewriteValueAMD64_OpOffPtr(v, config)\n\tcase OpOr16:\n\t\treturn rewriteValueAMD64_OpOr16(v, config)\n\tcase OpOr32:\n\t\treturn rewriteValueAMD64_OpOr32(v, config)\n\tcase OpOr64:\n\t\treturn rewriteValueAMD64_OpOr64(v, config)\n\tcase OpOr8:\n\t\treturn rewriteValueAMD64_OpOr8(v, config)\n\tcase OpRsh16Ux16:\n\t\treturn rewriteValueAMD64_OpRsh16Ux16(v, config)\n\tcase OpRsh16Ux32:\n\t\treturn rewriteValueAMD64_OpRsh16Ux32(v, config)\n\tcase OpRsh16Ux64:\n\t\treturn rewriteValueAMD64_OpRsh16Ux64(v, config)\n\tcase OpRsh16Ux8:\n\t\treturn rewriteValueAMD64_OpRsh16Ux8(v, config)\n\tcase OpRsh16x16:\n\t\treturn rewriteValueAMD64_OpRsh16x16(v, config)\n\tcase OpRsh16x32:\n\t\treturn rewriteValueAMD64_OpRsh16x32(v, config)\n\tcase OpRsh16x64:\n\t\treturn rewriteValueAMD64_OpRsh16x64(v, config)\n\tcase OpRsh16x8:\n\t\treturn rewriteValueAMD64_OpRsh16x8(v, config)\n\tcase OpRsh32Ux16:\n\t\treturn rewriteValueAMD64_OpRsh32Ux16(v, config)\n\tcase OpRsh32Ux32:\n\t\treturn rewriteValueAMD64_OpRsh32Ux32(v, config)\n\tcase OpRsh32Ux64:\n\t\treturn rewriteValueAMD64_OpRsh32Ux64(v, config)\n\tcase OpRsh32Ux8:\n\t\treturn rewriteValueAMD64_OpRsh32Ux8(v, config)\n\tcase OpRsh32x16:\n\t\treturn rewriteValueAMD64_OpRsh32x16(v, config)\n\tcase OpRsh32x32:\n\t\treturn rewriteValueAMD64_OpRsh32x32(v, config)\n\tcase OpRsh32x64:\n\t\treturn rewriteValueAMD64_OpRsh32x64(v, config)\n\tcase OpRsh32x8:\n\t\treturn rewriteValueAMD64_OpRsh32x8(v, config)\n\tcase OpRsh64Ux16:\n\t\treturn rewriteValueAMD64_OpRsh64Ux16(v, config)\n\tcase OpRsh64Ux32:\n\t\treturn rewriteValueAMD64_OpRsh64Ux32(v, config)\n\tcase OpRsh64Ux64:\n\t\treturn rewriteValueAMD64_OpRsh64Ux64(v, config)\n\tcase OpRsh64Ux8:\n\t\treturn rewriteValueAMD64_OpRsh64Ux8(v, config)\n\tcase OpRsh64x16:\n\t\treturn rewriteValueAMD64_OpRsh64x16(v, config)\n\tcase OpRsh64x32:\n\t\treturn rewriteValueAMD64_OpRsh64x32(v, config)\n\tcase OpRsh64x64:\n\t\treturn rewriteValueAMD64_OpRsh64x64(v, config)\n\tcase OpRsh64x8:\n\t\treturn rewriteValueAMD64_OpRsh64x8(v, config)\n\tcase OpRsh8Ux16:\n\t\treturn rewriteValueAMD64_OpRsh8Ux16(v, config)\n\tcase OpRsh8Ux32:\n\t\treturn rewriteValueAMD64_OpRsh8Ux32(v, config)\n\tcase OpRsh8Ux64:\n\t\treturn rewriteValueAMD64_OpRsh8Ux64(v, config)\n\tcase OpRsh8Ux8:\n\t\treturn rewriteValueAMD64_OpRsh8Ux8(v, config)\n\tcase OpRsh8x16:\n\t\treturn rewriteValueAMD64_OpRsh8x16(v, config)\n\tcase OpRsh8x32:\n\t\treturn rewriteValueAMD64_OpRsh8x32(v, config)\n\tcase OpRsh8x64:\n\t\treturn rewriteValueAMD64_OpRsh8x64(v, config)\n\tcase OpRsh8x8:\n\t\treturn rewriteValueAMD64_OpRsh8x8(v, config)\n\tcase OpAMD64SARB:\n\t\treturn rewriteValueAMD64_OpAMD64SARB(v, config)\n\tcase OpAMD64SARBconst:\n\t\treturn rewriteValueAMD64_OpAMD64SARBconst(v, config)\n\tcase OpAMD64SARL:\n\t\treturn rewriteValueAMD64_OpAMD64SARL(v, config)\n\tcase OpAMD64SARLconst:\n\t\treturn rewriteValueAMD64_OpAMD64SARLconst(v, config)\n\tcase OpAMD64SARQ:\n\t\treturn rewriteValueAMD64_OpAMD64SARQ(v, config)\n\tcase OpAMD64SARQconst:\n\t\treturn rewriteValueAMD64_OpAMD64SARQconst(v, config)\n\tcase OpAMD64SARW:\n\t\treturn rewriteValueAMD64_OpAMD64SARW(v, config)\n\tcase OpAMD64SARWconst:\n\t\treturn rewriteValueAMD64_OpAMD64SARWconst(v, config)\n\tcase OpAMD64SBBLcarrymask:\n\t\treturn rewriteValueAMD64_OpAMD64SBBLcarrymask(v, config)\n\tcase OpAMD64SBBQcarrymask:\n\t\treturn rewriteValueAMD64_OpAMD64SBBQcarrymask(v, config)\n\tcase OpAMD64SETA:\n\t\treturn rewriteValueAMD64_OpAMD64SETA(v, config)\n\tcase OpAMD64SETAE:\n\t\treturn rewriteValueAMD64_OpAMD64SETAE(v, config)\n\tcase OpAMD64SETB:\n\t\treturn rewriteValueAMD64_OpAMD64SETB(v, config)\n\tcase OpAMD64SETBE:\n\t\treturn rewriteValueAMD64_OpAMD64SETBE(v, config)\n\tcase OpAMD64SETEQ:\n\t\treturn rewriteValueAMD64_OpAMD64SETEQ(v, config)\n\tcase OpAMD64SETG:\n\t\treturn rewriteValueAMD64_OpAMD64SETG(v, config)\n\tcase OpAMD64SETGE:\n\t\treturn rewriteValueAMD64_OpAMD64SETGE(v, config)\n\tcase OpAMD64SETL:\n\t\treturn rewriteValueAMD64_OpAMD64SETL(v, config)\n\tcase OpAMD64SETLE:\n\t\treturn rewriteValueAMD64_OpAMD64SETLE(v, config)\n\tcase OpAMD64SETNE:\n\t\treturn rewriteValueAMD64_OpAMD64SETNE(v, config)\n\tcase OpAMD64SHLB:\n\t\treturn rewriteValueAMD64_OpAMD64SHLB(v, config)\n\tcase OpAMD64SHLL:\n\t\treturn rewriteValueAMD64_OpAMD64SHLL(v, config)\n\tcase OpAMD64SHLQ:\n\t\treturn rewriteValueAMD64_OpAMD64SHLQ(v, config)\n\tcase OpAMD64SHLW:\n\t\treturn rewriteValueAMD64_OpAMD64SHLW(v, config)\n\tcase OpAMD64SHRB:\n\t\treturn rewriteValueAMD64_OpAMD64SHRB(v, config)\n\tcase OpAMD64SHRL:\n\t\treturn rewriteValueAMD64_OpAMD64SHRL(v, config)\n\tcase OpAMD64SHRQ:\n\t\treturn rewriteValueAMD64_OpAMD64SHRQ(v, config)\n\tcase OpAMD64SHRW:\n\t\treturn rewriteValueAMD64_OpAMD64SHRW(v, config)\n\tcase OpAMD64SUBB:\n\t\treturn rewriteValueAMD64_OpAMD64SUBB(v, config)\n\tcase OpAMD64SUBBconst:\n\t\treturn rewriteValueAMD64_OpAMD64SUBBconst(v, config)\n\tcase OpAMD64SUBL:\n\t\treturn rewriteValueAMD64_OpAMD64SUBL(v, config)\n\tcase OpAMD64SUBLconst:\n\t\treturn rewriteValueAMD64_OpAMD64SUBLconst(v, config)\n\tcase OpAMD64SUBQ:\n\t\treturn rewriteValueAMD64_OpAMD64SUBQ(v, config)\n\tcase OpAMD64SUBQconst:\n\t\treturn rewriteValueAMD64_OpAMD64SUBQconst(v, config)\n\tcase OpAMD64SUBW:\n\t\treturn rewriteValueAMD64_OpAMD64SUBW(v, config)\n\tcase OpAMD64SUBWconst:\n\t\treturn rewriteValueAMD64_OpAMD64SUBWconst(v, config)\n\tcase OpSignExt16to32:\n\t\treturn rewriteValueAMD64_OpSignExt16to32(v, config)\n\tcase OpSignExt16to64:\n\t\treturn rewriteValueAMD64_OpSignExt16to64(v, config)\n\tcase OpSignExt32to64:\n\t\treturn rewriteValueAMD64_OpSignExt32to64(v, config)\n\tcase OpSignExt8to16:\n\t\treturn rewriteValueAMD64_OpSignExt8to16(v, config)\n\tcase OpSignExt8to32:\n\t\treturn rewriteValueAMD64_OpSignExt8to32(v, config)\n\tcase OpSignExt8to64:\n\t\treturn rewriteValueAMD64_OpSignExt8to64(v, config)\n\tcase OpSqrt:\n\t\treturn rewriteValueAMD64_OpSqrt(v, config)\n\tcase OpStaticCall:\n\t\treturn rewriteValueAMD64_OpStaticCall(v, config)\n\tcase OpStore:\n\t\treturn rewriteValueAMD64_OpStore(v, config)\n\tcase OpSub16:\n\t\treturn rewriteValueAMD64_OpSub16(v, config)\n\tcase OpSub32:\n\t\treturn rewriteValueAMD64_OpSub32(v, config)\n\tcase OpSub32F:\n\t\treturn rewriteValueAMD64_OpSub32F(v, config)\n\tcase OpSub64:\n\t\treturn rewriteValueAMD64_OpSub64(v, config)\n\tcase OpSub64F:\n\t\treturn rewriteValueAMD64_OpSub64F(v, config)\n\tcase OpSub8:\n\t\treturn rewriteValueAMD64_OpSub8(v, config)\n\tcase OpSubPtr:\n\t\treturn rewriteValueAMD64_OpSubPtr(v, config)\n\tcase OpTrunc16to8:\n\t\treturn rewriteValueAMD64_OpTrunc16to8(v, config)\n\tcase OpTrunc32to16:\n\t\treturn rewriteValueAMD64_OpTrunc32to16(v, config)\n\tcase OpTrunc32to8:\n\t\treturn rewriteValueAMD64_OpTrunc32to8(v, config)\n\tcase OpTrunc64to16:\n\t\treturn rewriteValueAMD64_OpTrunc64to16(v, config)\n\tcase OpTrunc64to32:\n\t\treturn rewriteValueAMD64_OpTrunc64to32(v, config)\n\tcase OpTrunc64to8:\n\t\treturn rewriteValueAMD64_OpTrunc64to8(v, config)\n\tcase OpAMD64XORB:\n\t\treturn rewriteValueAMD64_OpAMD64XORB(v, config)\n\tcase OpAMD64XORBconst:\n\t\treturn rewriteValueAMD64_OpAMD64XORBconst(v, config)\n\tcase OpAMD64XORL:\n\t\treturn rewriteValueAMD64_OpAMD64XORL(v, config)\n\tcase OpAMD64XORLconst:\n\t\treturn rewriteValueAMD64_OpAMD64XORLconst(v, config)\n\tcase OpAMD64XORQ:\n\t\treturn rewriteValueAMD64_OpAMD64XORQ(v, config)\n\tcase OpAMD64XORQconst:\n\t\treturn rewriteValueAMD64_OpAMD64XORQconst(v, config)\n\tcase OpAMD64XORW:\n\t\treturn rewriteValueAMD64_OpAMD64XORW(v, config)\n\tcase OpAMD64XORWconst:\n\t\treturn rewriteValueAMD64_OpAMD64XORWconst(v, config)\n\tcase OpXor16:\n\t\treturn rewriteValueAMD64_OpXor16(v, config)\n\tcase OpXor32:\n\t\treturn rewriteValueAMD64_OpXor32(v, config)\n\tcase OpXor64:\n\t\treturn rewriteValueAMD64_OpXor64(v, config)\n\tcase OpXor8:\n\t\treturn rewriteValueAMD64_OpXor8(v, config)\n\tcase OpZero:\n\t\treturn rewriteValueAMD64_OpZero(v, config)\n\tcase OpZeroExt16to32:\n\t\treturn rewriteValueAMD64_OpZeroExt16to32(v, config)\n\tcase OpZeroExt16to64:\n\t\treturn rewriteValueAMD64_OpZeroExt16to64(v, config)\n\tcase OpZeroExt32to64:\n\t\treturn rewriteValueAMD64_OpZeroExt32to64(v, config)\n\tcase OpZeroExt8to16:\n\t\treturn rewriteValueAMD64_OpZeroExt8to16(v, config)\n\tcase OpZeroExt8to32:\n\t\treturn rewriteValueAMD64_OpZeroExt8to32(v, config)\n\tcase OpZeroExt8to64:\n\t\treturn rewriteValueAMD64_OpZeroExt8to64(v, config)\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDB x (MOVBconst [c]))\n\t// cond:\n\t// result: (ADDBconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ADDBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDB (MOVBconst [c]) x)\n\t// cond:\n\t// result: (ADDBconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ADDBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDB x (NEGB y))\n\t// cond:\n\t// result: (SUBB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64NEGB {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SUBB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDBconst [c] x)\n\t// cond: int8(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int8(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDBconst [c] (MOVBconst [d]))\n\t// cond:\n\t// result: (MOVBconst [int64(int8(c+d))])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = int64(int8(c + d))\n\t\treturn true\n\t}\n\t// match: (ADDBconst [c] (ADDBconst [d] x))\n\t// cond:\n\t// result: (ADDBconst [int64(int8(c+d))] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ADDBconst)\n\t\tv.AuxInt = int64(int8(c + d))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDL x (MOVLconst [c]))\n\t// cond:\n\t// result: (ADDLconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ADDLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDL (MOVLconst [c]) x)\n\t// cond:\n\t// result: (ADDLconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ADDLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDL x (NEGL y))\n\t// cond:\n\t// result: (SUBL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64NEGL {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SUBL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDLconst [c] x)\n\t// cond: int32(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int32(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDLconst [c] (MOVLconst [d]))\n\t// cond:\n\t// result: (MOVLconst [int64(int32(c+d))])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = int64(int32(c + d))\n\t\treturn true\n\t}\n\t// match: (ADDLconst [c] (ADDLconst [d] x))\n\t// cond:\n\t// result: (ADDLconst [int64(int32(c+d))] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ADDLconst)\n\t\tv.AuxInt = int64(int32(c + d))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDQ x (MOVQconst [c]))\n\t// cond: is32Bit(c)\n\t// result: (ADDQconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ADDQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDQ (MOVQconst [c]) x)\n\t// cond: is32Bit(c)\n\t// result: (ADDQconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ADDQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (SHLQconst [3] y))\n\t// cond:\n\t// result: (LEAQ8 x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (SHLQconst [2] y))\n\t// cond:\n\t// result: (LEAQ4 x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (SHLQconst [1] y))\n\t// cond:\n\t// result: (LEAQ2 x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (ADDQ y y))\n\t// cond:\n\t// result: (LEAQ2 x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tif y != v_1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (ADDQ x y))\n\t// cond:\n\t// result: (LEAQ2 y x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tif x != v_1.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[1]\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AddArg(y)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (ADDQ y x))\n\t// cond:\n\t// result: (LEAQ2 y x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tif x != v_1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AddArg(y)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDQ (ADDQconst [c] x) y)\n\t// cond:\n\t// result: (LEAQ1 [c] x y)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (ADDQconst [c] y))\n\t// cond:\n\t// result: (LEAQ1 [c] x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (LEAQ [c] {s} y))\n\t// cond: x.Op != OpSB && y.Op != OpSB\n\t// result: (LEAQ1 [c] {s} x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\ts := v_1.Aux\n\t\ty := v_1.Args[0]\n\t\tif !(x.Op != OpSB && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ (LEAQ [c] {s} x) y)\n\t// cond: x.Op != OpSB && y.Op != OpSB\n\t// result: (LEAQ1 [c] {s} x y)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\ts := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(x.Op != OpSB && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQ x (NEGQ y))\n\t// cond:\n\t// result: (SUBQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64NEGQ {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SUBQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDQconst [c] (ADDQ x y))\n\t// cond:\n\t// result: (LEAQ1 [c] x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQconst [c] (LEAQ [d] {s} x))\n\t// cond: is32Bit(c+d)\n\t// result: (LEAQ [c+d] {s} x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\ts := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\tif !(is32Bit(c + d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDQconst [c] (LEAQ1 [d] {s} x y))\n\t// cond: is32Bit(c+d)\n\t// result: (LEAQ1 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\ts := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(c + d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQconst [c] (LEAQ2 [d] {s} x y))\n\t// cond: is32Bit(c+d)\n\t// result: (LEAQ2 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ2 {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\ts := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(c + d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQconst [c] (LEAQ4 [d] {s} x y))\n\t// cond: is32Bit(c+d)\n\t// result: (LEAQ4 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ4 {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\ts := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(c + d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQconst [c] (LEAQ8 [d] {s} x y))\n\t// cond: is32Bit(c+d)\n\t// result: (LEAQ8 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ8 {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\ts := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(c + d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (ADDQconst [0] x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDQconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [c+d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = c + d\n\t\treturn true\n\t}\n\t// match: (ADDQconst [c] (ADDQconst [d] x))\n\t// cond: is32Bit(c+d)\n\t// result: (ADDQconst [c+d] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif !(is32Bit(c + d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ADDQconst)\n\t\tv.AuxInt = c + d\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDW x (MOVWconst [c]))\n\t// cond:\n\t// result: (ADDWconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ADDWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDW (MOVWconst [c]) x)\n\t// cond:\n\t// result: (ADDWconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ADDWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDW x (NEGW y))\n\t// cond:\n\t// result: (SUBW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64NEGW {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SUBW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ADDWconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ADDWconst [c] x)\n\t// cond: int16(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int16(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ADDWconst [c] (MOVWconst [d]))\n\t// cond:\n\t// result: (MOVWconst [int64(int16(c+d))])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = int64(int16(c + d))\n\t\treturn true\n\t}\n\t// match: (ADDWconst [c] (ADDWconst [d] x))\n\t// cond:\n\t// result: (ADDWconst [int64(int16(c+d))] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ADDWconst)\n\t\tv.AuxInt = int64(int16(c + d))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDB x (MOVLconst [c]))\n\t// cond:\n\t// result: (ANDBconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ANDBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDB (MOVLconst [c]) x)\n\t// cond:\n\t// result: (ANDBconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ANDBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDB x (MOVBconst [c]))\n\t// cond:\n\t// result: (ANDBconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ANDBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDB (MOVBconst [c]) x)\n\t// cond:\n\t// result: (ANDBconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ANDBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDB x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDBconst [c] (ANDBconst [d] x))\n\t// cond:\n\t// result: (ANDBconst [c & d] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ANDBconst)\n\t\tv.AuxInt = c & d\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDBconst [c] _)\n\t// cond: int8(c)==0\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tc := v.AuxInt\n\t\tif !(int8(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (ANDBconst [c] x)\n\t// cond: int8(c)==-1\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int8(c) == -1) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDBconst [c] (MOVBconst [d]))\n\t// cond:\n\t// result: (MOVBconst [c&d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = c & d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDL x (MOVLconst [c]))\n\t// cond:\n\t// result: (ANDLconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ANDLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDL (MOVLconst [c]) x)\n\t// cond:\n\t// result: (ANDLconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ANDLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDL x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDLconst [c] (ANDLconst [d] x))\n\t// cond:\n\t// result: (ANDLconst [c & d] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ANDLconst)\n\t\tv.AuxInt = c & d\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDLconst [c] _)\n\t// cond: int32(c)==0\n\t// result: (MOVLconst [0])\n\tfor {\n\t\tc := v.AuxInt\n\t\tif !(int32(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (ANDLconst [c] x)\n\t// cond: int32(c)==-1\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int32(c) == -1) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDLconst [c] (MOVLconst [d]))\n\t// cond:\n\t// result: (MOVLconst [c&d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = c & d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDQ x (MOVQconst [c]))\n\t// cond: is32Bit(c)\n\t// result: (ANDQconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDQ (MOVQconst [c]) x)\n\t// cond: is32Bit(c)\n\t// result: (ANDQconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDQ x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDQconst [c] (ANDQconst [d] x))\n\t// cond:\n\t// result: (ANDQconst [c & d] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c & d\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDQconst [0xFF] x)\n\t// cond:\n\t// result: (MOVBQZX x)\n\tfor {\n\t\tif v.AuxInt != 0xFF {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVBQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDQconst [0xFFFF] x)\n\t// cond:\n\t// result: (MOVWQZX x)\n\tfor {\n\t\tif v.AuxInt != 0xFFFF {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVWQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDQconst [0xFFFFFFFF] x)\n\t// cond:\n\t// result: (MOVLQZX x)\n\tfor {\n\t\tif v.AuxInt != 0xFFFFFFFF {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVLQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDQconst [0] _)\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (ANDQconst [-1] x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tif v.AuxInt != -1 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDQconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [c&d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = c & d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDW x (MOVLconst [c]))\n\t// cond:\n\t// result: (ANDWconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ANDWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDW (MOVLconst [c]) x)\n\t// cond:\n\t// result: (ANDWconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ANDWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDW x (MOVWconst [c]))\n\t// cond:\n\t// result: (ANDWconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ANDWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDW (MOVWconst [c]) x)\n\t// cond:\n\t// result: (ANDWconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ANDWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDW x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ANDWconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ANDWconst [c] (ANDWconst [d] x))\n\t// cond:\n\t// result: (ANDWconst [c & d] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ANDWconst)\n\t\tv.AuxInt = c & d\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDWconst [c] _)\n\t// cond: int16(c)==0\n\t// result: (MOVWconst [0])\n\tfor {\n\t\tc := v.AuxInt\n\t\tif !(int16(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (ANDWconst [c] x)\n\t// cond: int16(c)==-1\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int16(c) == -1) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ANDWconst [c] (MOVWconst [d]))\n\t// cond:\n\t// result: (MOVWconst [c&d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = c & d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAdd16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Add16 x y)\n\t// cond:\n\t// result: (ADDW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ADDW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAdd32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Add32 x y)\n\t// cond:\n\t// result: (ADDL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ADDL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAdd32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Add32F x y)\n\t// cond:\n\t// result: (ADDSS x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ADDSS)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAdd64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Add64 x y)\n\t// cond:\n\t// result: (ADDQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ADDQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAdd64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Add64F x y)\n\t// cond:\n\t// result: (ADDSD x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ADDSD)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAdd8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Add8 x y)\n\t// cond:\n\t// result: (ADDB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ADDB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAddPtr(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (AddPtr x y)\n\t// cond:\n\t// result: (ADDQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ADDQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAddr(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Addr {sym} base)\n\t// cond:\n\t// result: (LEAQ {sym} base)\n\tfor {\n\t\tsym := v.Aux\n\t\tbase := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ)\n\t\tv.Aux = sym\n\t\tv.AddArg(base)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAnd16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (And16 x y)\n\t// cond:\n\t// result: (ANDW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAnd32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (And32 x y)\n\t// cond:\n\t// result: (ANDL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAnd64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (And64 x y)\n\t// cond:\n\t// result: (ANDQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAnd8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (And8 x y)\n\t// cond:\n\t// result: (ANDB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAvg64u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Avg64u x y)\n\t// cond:\n\t// result: (AVGQU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64AVGQU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpBswap32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Bswap32 x)\n\t// cond:\n\t// result: (BSWAPL x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64BSWAPL)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpBswap64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Bswap64 x)\n\t// cond:\n\t// result: (BSWAPQ x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64BSWAPQ)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64CMOVLEQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (CMOVLEQconst x (InvertFlags y) [c])\n\t// cond:\n\t// result: (CMOVLNEconst x y [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64CMOVLNEconst)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMOVLEQconst _ (FlagEQ) [c])\n\t// cond:\n\t// result: (Const32 [c])\n\tfor {\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tc := v.AuxInt\n\t\tv.reset(OpConst32)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMOVLEQconst x (FlagLT_ULT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVLEQconst x (FlagLT_UGT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVLEQconst x (FlagGT_ULT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVLEQconst x (FlagGT_UGT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64CMOVQEQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (CMOVQEQconst x (InvertFlags y) [c])\n\t// cond:\n\t// result: (CMOVQNEconst x y [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64CMOVQNEconst)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMOVQEQconst _ (FlagEQ) [c])\n\t// cond:\n\t// result: (Const64 [c])\n\tfor {\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tc := v.AuxInt\n\t\tv.reset(OpConst64)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMOVQEQconst x (FlagLT_ULT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVQEQconst x (FlagLT_UGT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVQEQconst x (FlagGT_ULT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVQEQconst x (FlagGT_UGT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64CMOVWEQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (CMOVWEQconst x (InvertFlags y) [c])\n\t// cond:\n\t// result: (CMOVWNEconst x y [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64CMOVWNEconst)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMOVWEQconst _ (FlagEQ) [c])\n\t// cond:\n\t// result: (Const16 [c])\n\tfor {\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tc := v.AuxInt\n\t\tv.reset(OpConst16)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMOVWEQconst x (FlagLT_ULT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVWEQconst x (FlagLT_UGT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVWEQconst x (FlagGT_ULT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMOVWEQconst x (FlagGT_UGT))\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64CMPB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (CMPB x (MOVBconst [c]))\n\t// cond:\n\t// result: (CMPBconst x [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64CMPBconst)\n\t\tv.AddArg(x)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMPB (MOVBconst [c]) x)\n\t// cond:\n\t// result: (InvertFlags (CMPBconst x [c]))\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64InvertFlags)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AuxInt = c\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64CMPBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (CMPBconst (MOVBconst [x]) [y])\n\t// cond: int8(x)==int8(y)\n\t// result: (FlagEQ)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int8(x) == int8(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagEQ)\n\t\treturn true\n\t}\n\t// match: (CMPBconst (MOVBconst [x]) [y])\n\t// cond: int8(x)uint8(y)\n\t// result: (FlagLT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int8(x) < int8(y) && uint8(x) > uint8(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPBconst (MOVBconst [x]) [y])\n\t// cond: int8(x)>int8(y) && uint8(x) int8(y) && uint8(x) < uint8(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPBconst (MOVBconst [x]) [y])\n\t// cond: int8(x)>int8(y) && uint8(x)>uint8(y)\n\t// result: (FlagGT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int8(x) > int8(y) && uint8(x) > uint8(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPBconst (ANDBconst _ [m]) [n])\n\t// cond: 0 <= int8(m) && int8(m) < int8(n)\n\t// result: (FlagLT_ULT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\tm := v_0.AuxInt\n\t\tn := v.AuxInt\n\t\tif !(0 <= int8(m) && int8(m) < int8(n)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPBconst (ANDB x y) [0])\n\t// cond:\n\t// result: (TESTB x y)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDB {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64TESTB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (CMPBconst (ANDBconst [c] x) [0])\n\t// cond:\n\t// result: (TESTBconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64TESTBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMPBconst x [0])\n\t// cond:\n\t// result: (TESTB x x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64TESTB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64CMPL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (CMPL x (MOVLconst [c]))\n\t// cond:\n\t// result: (CMPLconst x [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64CMPLconst)\n\t\tv.AddArg(x)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (CMPL (MOVLconst [c]) x)\n\t// cond:\n\t// result: (InvertFlags (CMPLconst x [c]))\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64InvertFlags)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AuxInt = c\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64CMPLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (CMPLconst (MOVLconst [x]) [y])\n\t// cond: int32(x)==int32(y)\n\t// result: (FlagEQ)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int32(x) == int32(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagEQ)\n\t\treturn true\n\t}\n\t// match: (CMPLconst (MOVLconst [x]) [y])\n\t// cond: int32(x)uint32(y)\n\t// result: (FlagLT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int32(x) < int32(y) && uint32(x) > uint32(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPLconst (MOVLconst [x]) [y])\n\t// cond: int32(x)>int32(y) && uint32(x) int32(y) && uint32(x) < uint32(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPLconst (MOVLconst [x]) [y])\n\t// cond: int32(x)>int32(y) && uint32(x)>uint32(y)\n\t// result: (FlagGT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int32(x) > int32(y) && uint32(x) > uint32(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPLconst (SHRLconst _ [c]) [n])\n\t// cond: 0 <= n && 0 < c && c <= 32 && (1<uint64(y)\n\t// result: (FlagLT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(x < y && uint64(x) > uint64(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPQconst (MOVQconst [x]) [y])\n\t// cond: x>y && uint64(x) y && uint64(x) < uint64(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPQconst (MOVQconst [x]) [y])\n\t// cond: x>y && uint64(x)>uint64(y)\n\t// result: (FlagGT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(x > y && uint64(x) > uint64(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPQconst (MOVBQZX _) [c])\n\t// cond: 0xFF < c\n\t// result: (FlagLT_ULT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBQZX {\n\t\t\tbreak\n\t\t}\n\t\tc := v.AuxInt\n\t\tif !(0xFF < c) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPQconst (MOVWQZX _) [c])\n\t// cond: 0xFFFF < c\n\t// result: (FlagLT_ULT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWQZX {\n\t\t\tbreak\n\t\t}\n\t\tc := v.AuxInt\n\t\tif !(0xFFFF < c) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPQconst (MOVLQZX _) [c])\n\t// cond: 0xFFFFFFFF < c\n\t// result: (FlagLT_ULT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLQZX {\n\t\t\tbreak\n\t\t}\n\t\tc := v.AuxInt\n\t\tif !(0xFFFFFFFF < c) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPQconst (SHRQconst _ [c]) [n])\n\t// cond: 0 <= n && 0 < c && c <= 64 && (1<uint16(y)\n\t// result: (FlagLT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int16(x) < int16(y) && uint16(x) > uint16(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPWconst (MOVWconst [x]) [y])\n\t// cond: int16(x)>int16(y) && uint16(x) int16(y) && uint16(x) < uint16(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPWconst (MOVWconst [x]) [y])\n\t// cond: int16(x)>int16(y) && uint16(x)>uint16(y)\n\t// result: (FlagGT_UGT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.AuxInt\n\t\ty := v.AuxInt\n\t\tif !(int16(x) > int16(y) && uint16(x) > uint16(y)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagGT_UGT)\n\t\treturn true\n\t}\n\t// match: (CMPWconst (ANDWconst _ [m]) [n])\n\t// cond: 0 <= int16(m) && int16(m) < int16(n)\n\t// result: (FlagLT_ULT)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\tm := v_0.AuxInt\n\t\tn := v.AuxInt\n\t\tif !(0 <= int16(m) && int16(m) < int16(n)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64FlagLT_ULT)\n\t\treturn true\n\t}\n\t// match: (CMPWconst (ANDW x y) [0])\n\t// cond:\n\t// result: (TESTW x y)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDW {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64TESTW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (CMPWconst (ANDWconst [c] x) [0])\n\t// cond:\n\t// result: (TESTWconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64TESTWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (CMPWconst x [0])\n\t// cond:\n\t// result: (TESTW x x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64TESTW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpClosureCall(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ClosureCall [argwid] entry closure mem)\n\t// cond:\n\t// result: (CALLclosure [argwid] entry closure mem)\n\tfor {\n\t\targwid := v.AuxInt\n\t\tentry := v.Args[0]\n\t\tclosure := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64CALLclosure)\n\t\tv.AuxInt = argwid\n\t\tv.AddArg(entry)\n\t\tv.AddArg(closure)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCom16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Com16 x)\n\t// cond:\n\t// result: (NOTW x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NOTW)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCom32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Com32 x)\n\t// cond:\n\t// result: (NOTL x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NOTL)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCom64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Com64 x)\n\t// cond:\n\t// result: (NOTQ x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NOTQ)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCom8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Com8 x)\n\t// cond:\n\t// result: (NOTB x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NOTB)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConst16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Const16 [val])\n\t// cond:\n\t// result: (MOVWconst [val])\n\tfor {\n\t\tval := v.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = val\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConst32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Const32 [val])\n\t// cond:\n\t// result: (MOVLconst [val])\n\tfor {\n\t\tval := v.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = val\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConst32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Const32F [val])\n\t// cond:\n\t// result: (MOVSSconst [val])\n\tfor {\n\t\tval := v.AuxInt\n\t\tv.reset(OpAMD64MOVSSconst)\n\t\tv.AuxInt = val\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConst64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Const64 [val])\n\t// cond:\n\t// result: (MOVQconst [val])\n\tfor {\n\t\tval := v.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = val\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConst64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Const64F [val])\n\t// cond:\n\t// result: (MOVSDconst [val])\n\tfor {\n\t\tval := v.AuxInt\n\t\tv.reset(OpAMD64MOVSDconst)\n\t\tv.AuxInt = val\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConst8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Const8 [val])\n\t// cond:\n\t// result: (MOVBconst [val])\n\tfor {\n\t\tval := v.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = val\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConstBool(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ConstBool [b])\n\t// cond:\n\t// result: (MOVBconst [b])\n\tfor {\n\t\tb := v.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = b\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConstNil(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ConstNil)\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpConvert(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Convert x mem)\n\t// cond:\n\t// result: (MOVQconvert x mem)\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVQconvert)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCtz16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Ctz16 x)\n\t// cond:\n\t// result: (CMOVWEQconst (BSFW x) (CMPWconst x [0]) [16])\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CMOVWEQconst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64BSFW, t)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv1.AddArg(x)\n\t\tv1.AuxInt = 0\n\t\tv.AddArg(v1)\n\t\tv.AuxInt = 16\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCtz32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Ctz32 x)\n\t// cond:\n\t// result: (CMOVLEQconst (BSFL x) (CMPLconst x [0]) [32])\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CMOVLEQconst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64BSFL, t)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv1.AddArg(x)\n\t\tv1.AuxInt = 0\n\t\tv.AddArg(v1)\n\t\tv.AuxInt = 32\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCtz64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Ctz64 x)\n\t// cond:\n\t// result: (CMOVQEQconst (BSFQ x) (CMPQconst x [0]) [64])\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CMOVQEQconst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64BSFQ, t)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv1.AddArg(x)\n\t\tv1.AuxInt = 0\n\t\tv.AddArg(v1)\n\t\tv.AuxInt = 64\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt32Fto32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt32Fto32 x)\n\t// cond:\n\t// result: (CVTTSS2SL x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTTSS2SL)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt32Fto64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt32Fto64 x)\n\t// cond:\n\t// result: (CVTTSS2SQ x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTTSS2SQ)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt32Fto64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt32Fto64F x)\n\t// cond:\n\t// result: (CVTSS2SD x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTSS2SD)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt32to32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt32to32F x)\n\t// cond:\n\t// result: (CVTSL2SS x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTSL2SS)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt32to64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt32to64F x)\n\t// cond:\n\t// result: (CVTSL2SD x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTSL2SD)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt64Fto32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt64Fto32 x)\n\t// cond:\n\t// result: (CVTTSD2SL x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTTSD2SL)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt64Fto32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt64Fto32F x)\n\t// cond:\n\t// result: (CVTSD2SS x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTSD2SS)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt64Fto64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt64Fto64 x)\n\t// cond:\n\t// result: (CVTTSD2SQ x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTTSD2SQ)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt64to32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt64to32F x)\n\t// cond:\n\t// result: (CVTSQ2SS x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTSQ2SS)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpCvt64to64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Cvt64to64F x)\n\t// cond:\n\t// result: (CVTSQ2SD x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64CVTSQ2SD)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDeferCall(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (DeferCall [argwid] mem)\n\t// cond:\n\t// result: (CALLdefer [argwid] mem)\n\tfor {\n\t\targwid := v.AuxInt\n\t\tmem := v.Args[0]\n\t\tv.reset(OpAMD64CALLdefer)\n\t\tv.AuxInt = argwid\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div16 x y)\n\t// cond:\n\t// result: (DIVW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv16u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div16u x y)\n\t// cond:\n\t// result: (DIVWU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVWU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div32 x y)\n\t// cond:\n\t// result: (DIVL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div32F x y)\n\t// cond:\n\t// result: (DIVSS x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVSS)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv32u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div32u x y)\n\t// cond:\n\t// result: (DIVLU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVLU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div64 x y)\n\t// cond:\n\t// result: (DIVQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div64F x y)\n\t// cond:\n\t// result: (DIVSD x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVSD)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv64u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div64u x y)\n\t// cond:\n\t// result: (DIVQU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVQU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div8 x y)\n\t// cond:\n\t// result: (DIVW (SignExt8to16 x) (SignExt8to16 y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVW)\n\t\tv0 := b.NewValue0(v.Line, OpSignExt8to16, config.fe.TypeInt16())\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpSignExt8to16, config.fe.TypeInt16())\n\t\tv1.AddArg(y)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpDiv8u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Div8u x y)\n\t// cond:\n\t// result: (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64DIVWU)\n\t\tv0 := b.NewValue0(v.Line, OpZeroExt8to16, config.fe.TypeUInt16())\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpZeroExt8to16, config.fe.TypeUInt16())\n\t\tv1.AddArg(y)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpEq16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Eq16 x y)\n\t// cond:\n\t// result: (SETEQ (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETEQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpEq32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Eq32 x y)\n\t// cond:\n\t// result: (SETEQ (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETEQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpEq32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Eq32F x y)\n\t// cond:\n\t// result: (SETEQF (UCOMISS x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETEQF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpEq64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Eq64 x y)\n\t// cond:\n\t// result: (SETEQ (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETEQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpEq64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Eq64F x y)\n\t// cond:\n\t// result: (SETEQF (UCOMISD x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETEQF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpEq8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Eq8 x y)\n\t// cond:\n\t// result: (SETEQ (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETEQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpEqPtr(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (EqPtr x y)\n\t// cond:\n\t// result: (SETEQ (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETEQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq16 x y)\n\t// cond:\n\t// result: (SETGE (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq16U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq16U x y)\n\t// cond:\n\t// result: (SETAE (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETAE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq32 x y)\n\t// cond:\n\t// result: (SETGE (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq32F x y)\n\t// cond:\n\t// result: (SETGEF (UCOMISS x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGEF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq32U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq32U x y)\n\t// cond:\n\t// result: (SETAE (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETAE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq64 x y)\n\t// cond:\n\t// result: (SETGE (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq64F x y)\n\t// cond:\n\t// result: (SETGEF (UCOMISD x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGEF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq64U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq64U x y)\n\t// cond:\n\t// result: (SETAE (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETAE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq8 x y)\n\t// cond:\n\t// result: (SETGE (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGeq8U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Geq8U x y)\n\t// cond:\n\t// result: (SETAE (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETAE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGetClosurePtr(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (GetClosurePtr)\n\t// cond:\n\t// result: (LoweredGetClosurePtr)\n\tfor {\n\t\tv.reset(OpAMD64LoweredGetClosurePtr)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGetG(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (GetG mem)\n\t// cond:\n\t// result: (LoweredGetG mem)\n\tfor {\n\t\tmem := v.Args[0]\n\t\tv.reset(OpAMD64LoweredGetG)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGoCall(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (GoCall [argwid] mem)\n\t// cond:\n\t// result: (CALLgo [argwid] mem)\n\tfor {\n\t\targwid := v.AuxInt\n\t\tmem := v.Args[0]\n\t\tv.reset(OpAMD64CALLgo)\n\t\tv.AuxInt = argwid\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater16 x y)\n\t// cond:\n\t// result: (SETG (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETG)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater16U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater16U x y)\n\t// cond:\n\t// result: (SETA (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETA)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater32 x y)\n\t// cond:\n\t// result: (SETG (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETG)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater32F x y)\n\t// cond:\n\t// result: (SETGF (UCOMISS x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater32U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater32U x y)\n\t// cond:\n\t// result: (SETA (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETA)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater64 x y)\n\t// cond:\n\t// result: (SETG (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETG)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater64F x y)\n\t// cond:\n\t// result: (SETGF (UCOMISD x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater64U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater64U x y)\n\t// cond:\n\t// result: (SETA (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETA)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater8 x y)\n\t// cond:\n\t// result: (SETG (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETG)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpGreater8U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Greater8U x y)\n\t// cond:\n\t// result: (SETA (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETA)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul16 x y)\n\t// cond:\n\t// result: (HMULW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul16u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul16u x y)\n\t// cond:\n\t// result: (HMULWU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULWU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul32 x y)\n\t// cond:\n\t// result: (HMULL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul32u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul32u x y)\n\t// cond:\n\t// result: (HMULLU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULLU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul64 x y)\n\t// cond:\n\t// result: (HMULQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul64u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul64u x y)\n\t// cond:\n\t// result: (HMULQU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULQU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul8 x y)\n\t// cond:\n\t// result: (HMULB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpHmul8u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Hmul8u x y)\n\t// cond:\n\t// result: (HMULBU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64HMULBU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpITab(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ITab (Load ptr mem))\n\t// cond:\n\t// result: (MOVQload ptr mem)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpLoad {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tmem := v_0.Args[1]\n\t\tv.reset(OpAMD64MOVQload)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpInterCall(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (InterCall [argwid] entry mem)\n\t// cond:\n\t// result: (CALLinter [argwid] entry mem)\n\tfor {\n\t\targwid := v.AuxInt\n\t\tentry := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64CALLinter)\n\t\tv.AuxInt = argwid\n\t\tv.AddArg(entry)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpIsInBounds(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (IsInBounds idx len)\n\t// cond:\n\t// result: (SETB (CMPQ idx len))\n\tfor {\n\t\tidx := v.Args[0]\n\t\tlen := v.Args[1]\n\t\tv.reset(OpAMD64SETB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(len)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpIsNonNil(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (IsNonNil p)\n\t// cond:\n\t// result: (SETNE (TESTQ p p))\n\tfor {\n\t\tp := v.Args[0]\n\t\tv.reset(OpAMD64SETNE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64TESTQ, TypeFlags)\n\t\tv0.AddArg(p)\n\t\tv0.AddArg(p)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpIsSliceInBounds(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (IsSliceInBounds idx len)\n\t// cond:\n\t// result: (SETBE (CMPQ idx len))\n\tfor {\n\t\tidx := v.Args[0]\n\t\tlen := v.Args[1]\n\t\tv.reset(OpAMD64SETBE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(len)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64LEAQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (LEAQ [c] {s} (ADDQconst [d] x))\n\t// cond: is32Bit(c+d)\n\t// result: (LEAQ [c+d] {s} x)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif !(is32Bit(c + d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (LEAQ [c] {s} (ADDQ x y))\n\t// cond: x.Op != OpSB && y.Op != OpSB\n\t// result: (LEAQ1 [c] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(x.Op != OpSB && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ [off1] {sym1} (LEAQ [off2] {sym2} x))\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (LEAQ [off1+off2] {mergeSym(sym1,sym2)} x)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (LEAQ [off1] {sym1} (LEAQ1 [off2] {sym2} x y))\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (LEAQ1 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ [off1] {sym1} (LEAQ2 [off2] {sym2} x y))\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (LEAQ2 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ2 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ [off1] {sym1} (LEAQ4 [off2] {sym2} x y))\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (LEAQ4 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ4 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ [off1] {sym1} (LEAQ8 [off2] {sym2} x y))\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (LEAQ8 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ8 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v_0.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64LEAQ1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (LEAQ1 [c] {s} (ADDQconst [d] x) y)\n\t// cond: is32Bit(c+d) && x.Op != OpSB\n\t// result: (LEAQ1 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(c+d) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [c] {s} x (ADDQconst [d] y))\n\t// cond: is32Bit(c+d) && y.Op != OpSB\n\t// result: (LEAQ1 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\ty := v_1.Args[0]\n\t\tif !(is32Bit(c+d) && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [c] {s} x (SHLQconst [1] y))\n\t// cond:\n\t// result: (LEAQ2 [c] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [c] {s} (SHLQconst [1] x) y)\n\t// cond:\n\t// result: (LEAQ2 [c] {s} y x)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(y)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [c] {s} x (SHLQconst [2] y))\n\t// cond:\n\t// result: (LEAQ4 [c] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [c] {s} (SHLQconst [2] x) y)\n\t// cond:\n\t// result: (LEAQ4 [c] {s} y x)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(y)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [c] {s} x (SHLQconst [3] y))\n\t// cond:\n\t// result: (LEAQ8 [c] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [c] {s} (SHLQconst [3] x) y)\n\t// cond:\n\t// result: (LEAQ8 [c] {s} y x)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(y)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [off1] {sym1} (LEAQ [off2] {sym2} x) y)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB\n\t// result: (LEAQ1 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ1 [off1] {sym1} x (LEAQ [off2] {sym2} y))\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB\n\t// result: (LEAQ1 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_1.AuxInt\n\t\tsym2 := v_1.Aux\n\t\ty := v_1.Args[0]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64LEAQ2(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (LEAQ2 [c] {s} (ADDQconst [d] x) y)\n\t// cond: is32Bit(c+d) && x.Op != OpSB\n\t// result: (LEAQ2 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(c+d) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ2 [c] {s} x (ADDQconst [d] y))\n\t// cond: is32Bit(c+2*d) && y.Op != OpSB\n\t// result: (LEAQ2 [c+2*d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\ty := v_1.Args[0]\n\t\tif !(is32Bit(c+2*d) && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AuxInt = c + 2*d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ2 [c] {s} x (SHLQconst [1] y))\n\t// cond:\n\t// result: (LEAQ4 [c] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ2 [c] {s} x (SHLQconst [2] y))\n\t// cond:\n\t// result: (LEAQ8 [c] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ2 [off1] {sym1} (LEAQ [off2] {sym2} x) y)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB\n\t// result: (LEAQ2 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64LEAQ4(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (LEAQ4 [c] {s} (ADDQconst [d] x) y)\n\t// cond: is32Bit(c+d) && x.Op != OpSB\n\t// result: (LEAQ4 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(c+d) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ4 [c] {s} x (ADDQconst [d] y))\n\t// cond: is32Bit(c+4*d) && y.Op != OpSB\n\t// result: (LEAQ4 [c+4*d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\ty := v_1.Args[0]\n\t\tif !(is32Bit(c+4*d) && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = c + 4*d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ4 [c] {s} x (SHLQconst [1] y))\n\t// cond:\n\t// result: (LEAQ8 [c] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = c\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ4 [off1] {sym1} (LEAQ [off2] {sym2} x) y)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB\n\t// result: (LEAQ4 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64LEAQ8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (LEAQ8 [c] {s} (ADDQconst [d] x) y)\n\t// cond: is32Bit(c+d) && x.Op != OpSB\n\t// result: (LEAQ8 [c+d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(c+d) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ8 [c] {s} x (ADDQconst [d] y))\n\t// cond: is32Bit(c+8*d) && y.Op != OpSB\n\t// result: (LEAQ8 [c+8*d] {s} x y)\n\tfor {\n\t\tc := v.AuxInt\n\t\ts := v.Aux\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\ty := v_1.Args[0]\n\t\tif !(is32Bit(c+8*d) && y.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = c + 8*d\n\t\tv.Aux = s\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\t// match: (LEAQ8 [off1] {sym1} (LEAQ [off2] {sym2} x) y)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB\n\t// result: (LEAQ8 [off1+off2] {mergeSym(sym1,sym2)} x y)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tx := v_0.Args[0]\n\t\ty := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq16 x y)\n\t// cond:\n\t// result: (SETLE (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETLE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq16U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq16U x y)\n\t// cond:\n\t// result: (SETBE (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETBE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq32 x y)\n\t// cond:\n\t// result: (SETLE (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETLE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq32F x y)\n\t// cond:\n\t// result: (SETGEF (UCOMISS y x))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGEF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeFlags)\n\t\tv0.AddArg(y)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq32U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq32U x y)\n\t// cond:\n\t// result: (SETBE (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETBE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq64 x y)\n\t// cond:\n\t// result: (SETLE (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETLE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq64F x y)\n\t// cond:\n\t// result: (SETGEF (UCOMISD y x))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGEF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeFlags)\n\t\tv0.AddArg(y)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq64U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq64U x y)\n\t// cond:\n\t// result: (SETBE (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETBE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq8 x y)\n\t// cond:\n\t// result: (SETLE (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETLE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLeq8U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Leq8U x y)\n\t// cond:\n\t// result: (SETBE (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETBE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less16 x y)\n\t// cond:\n\t// result: (SETL (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess16U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less16U x y)\n\t// cond:\n\t// result: (SETB (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less32 x y)\n\t// cond:\n\t// result: (SETL (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less32F x y)\n\t// cond:\n\t// result: (SETGF (UCOMISS y x))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeFlags)\n\t\tv0.AddArg(y)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess32U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less32U x y)\n\t// cond:\n\t// result: (SETB (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less64 x y)\n\t// cond:\n\t// result: (SETL (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less64F x y)\n\t// cond:\n\t// result: (SETGF (UCOMISD y x))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETGF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeFlags)\n\t\tv0.AddArg(y)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess64U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less64U x y)\n\t// cond:\n\t// result: (SETB (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less8 x y)\n\t// cond:\n\t// result: (SETL (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLess8U(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Less8U x y)\n\t// cond:\n\t// result: (SETB (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLoad(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Load ptr mem)\n\t// cond: (is64BitInt(t) || isPtr(t))\n\t// result: (MOVQload ptr mem)\n\tfor {\n\t\tt := v.Type\n\t\tptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is64BitInt(t) || isPtr(t)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQload)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Load ptr mem)\n\t// cond: is32BitInt(t)\n\t// result: (MOVLload ptr mem)\n\tfor {\n\t\tt := v.Type\n\t\tptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32BitInt(t)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLload)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Load ptr mem)\n\t// cond: is16BitInt(t)\n\t// result: (MOVWload ptr mem)\n\tfor {\n\t\tt := v.Type\n\t\tptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is16BitInt(t)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWload)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Load ptr mem)\n\t// cond: (t.IsBoolean() || is8BitInt(t))\n\t// result: (MOVBload ptr mem)\n\tfor {\n\t\tt := v.Type\n\t\tptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(t.IsBoolean() || is8BitInt(t)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBload)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Load ptr mem)\n\t// cond: is32BitFloat(t)\n\t// result: (MOVSSload ptr mem)\n\tfor {\n\t\tt := v.Type\n\t\tptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32BitFloat(t)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSload)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Load ptr mem)\n\t// cond: is64BitFloat(t)\n\t// result: (MOVSDload ptr mem)\n\tfor {\n\t\tt := v.Type\n\t\tptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is64BitFloat(t)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDload)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLrot16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lrot16 x [c])\n\t// cond:\n\t// result: (ROLWconst [c&15] x)\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64ROLWconst)\n\t\tv.Type = t\n\t\tv.AuxInt = c & 15\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLrot32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lrot32 x [c])\n\t// cond:\n\t// result: (ROLLconst [c&31] x)\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64ROLLconst)\n\t\tv.Type = t\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLrot64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lrot64 x [c])\n\t// cond:\n\t// result: (ROLQconst [c&63] x)\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64ROLQconst)\n\t\tv.Type = t\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLrot8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lrot8 x [c])\n\t// cond:\n\t// result: (ROLBconst [c&7] x)\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64ROLBconst)\n\t\tv.Type = t\n\t\tv.AuxInt = c & 7\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh16x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh16x16 x y)\n\t// cond:\n\t// result: (ANDW (SHLW x y) (SBBLcarrymask (CMPWconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh16x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh16x32 x y)\n\t// cond:\n\t// result: (ANDW (SHLW x y) (SBBLcarrymask (CMPLconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh16x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh16x64 x y)\n\t// cond:\n\t// result: (ANDW (SHLW x y) (SBBLcarrymask (CMPQconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh16x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh16x8 x y)\n\t// cond:\n\t// result: (ANDW (SHLW x y) (SBBLcarrymask (CMPBconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh32x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh32x16 x y)\n\t// cond:\n\t// result: (ANDL (SHLL x y) (SBBLcarrymask (CMPWconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh32x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh32x32 x y)\n\t// cond:\n\t// result: (ANDL (SHLL x y) (SBBLcarrymask (CMPLconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh32x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh32x64 x y)\n\t// cond:\n\t// result: (ANDL (SHLL x y) (SBBLcarrymask (CMPQconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh32x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh32x8 x y)\n\t// cond:\n\t// result: (ANDL (SHLL x y) (SBBLcarrymask (CMPBconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh64x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh64x16 x y)\n\t// cond:\n\t// result: (ANDQ (SHLQ x y) (SBBQcarrymask (CMPWconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh64x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh64x32 x y)\n\t// cond:\n\t// result: (ANDQ (SHLQ x y) (SBBQcarrymask (CMPLconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh64x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh64x64 x y)\n\t// cond:\n\t// result: (ANDQ (SHLQ x y) (SBBQcarrymask (CMPQconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh64x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh64x8 x y)\n\t// cond:\n\t// result: (ANDQ (SHLQ x y) (SBBQcarrymask (CMPBconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh8x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh8x16 x y)\n\t// cond:\n\t// result: (ANDB (SHLB x y) (SBBLcarrymask (CMPWconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh8x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh8x32 x y)\n\t// cond:\n\t// result: (ANDB (SHLB x y) (SBBLcarrymask (CMPLconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh8x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh8x64 x y)\n\t// cond:\n\t// result: (ANDB (SHLB x y) (SBBLcarrymask (CMPQconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpLsh8x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Lsh8x8 x y)\n\t// cond:\n\t// result: (ANDB (SHLB x y) (SBBLcarrymask (CMPBconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBQSX(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBQSX x:(MOVBload [off] {sym} ptr mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVBQSXload [off] {sym} ptr mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tmem := x.Args[1]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVBQSXload, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBQSX (ANDBconst [c] x))\n\t// cond: c & 0x80 == 0\n\t// result: (ANDQconst [c & 0x7f] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif !(c&0x80 == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c & 0x7f\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBQSXload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBQSXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVBQSXload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBQSXload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBQZX(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBQZX x:(MOVBload [off] {sym} ptr mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVBload [off] {sym} ptr mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tmem := x.Args[1]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVBload, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBQZX x:(MOVBloadidx1 [off] {sym} ptr idx mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVBloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tidx := x.Args[1]\n\t\tmem := x.Args[2]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVBloadidx1, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBQZX (ANDBconst [c] x))\n\t// cond:\n\t// result: (ANDQconst [c & 0xff] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c & 0xff\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))\n\t// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)\n\t// result: x\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBstore {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_1.AuxInt\n\t\tsym2 := v_1.Aux\n\t\tptr2 := v_1.Args[0]\n\t\tx := v_1.Args[1]\n\t\tif !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MOVBload [off1] {sym} (ADDQconst [off2] ptr) mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVBload [off1+off2] {sym} ptr mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBload [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVBloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBloadidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBload [off] {sym} (ADDQ ptr idx) mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVBloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBloadidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBloadidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBloadidx1 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVBloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBloadidx1 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVBloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBstore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBstore [off] {sym} ptr (MOVBQSX x) mem)\n\t// cond:\n\t// result: (MOVBstore [off] {sym} ptr x mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBQSX {\n\t\t\tbreak\n\t\t}\n\t\tx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(x)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstore [off] {sym} ptr (MOVBQZX x) mem)\n\t// cond:\n\t// result: (MOVBstore [off] {sym} ptr x mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBQZX {\n\t\t\tbreak\n\t\t}\n\t\tx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(x)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstore [off1] {sym} (ADDQconst [off2] ptr) val mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVBstore [off1+off2] {sym} ptr val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstore [off] {sym} ptr (MOVBconst [c]) mem)\n\t// cond: validOff(off)\n\t// result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tmem := v.Args[2]\n\t\tif !(validOff(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstoreconst)\n\t\tv.AuxInt = makeValAndOff(int64(int8(c)), off)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstore [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVBstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstoreidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstore [off] {sym} (ADDQ ptr idx) val mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVBstoreidx1 [off] {sym} ptr idx val mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstoreidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBstoreconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBstoreconst [sc] {s} (ADDQconst [off] ptr) mem)\n\t// cond: ValAndOff(sc).canAdd(off)\n\t// result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = s\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)\n\t// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)\n\t// result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstoreconst [x] {sym1} (LEAQ1 [off] {sym2} ptr idx) mem)\n\t// cond: canMergeSym(sym1, sym2)\n\t// result: (MOVBstoreconstidx1 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstoreconst [x] {sym} (ADDQ ptr idx) mem)\n\t// cond:\n\t// result: (MOVBstoreconstidx1 [x] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVBstoreconstidx1)\n\t\tv.AuxInt = x\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBstoreconstidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBstoreconstidx1 [x] {sym} (ADDQconst [c] ptr) idx mem)\n\t// cond:\n\t// result: (MOVBstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstoreconstidx1 [x] {sym} ptr (ADDQconst [c] idx) mem)\n\t// cond:\n\t// result: (MOVBstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVBstoreidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVBstoreidx1 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVBstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVBstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVBstoreidx1 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVBstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVBstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLQSX(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLQSX x:(MOVLload [off] {sym} ptr mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVLQSXload [off] {sym} ptr mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVLload {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tmem := x.Args[1]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLQSXload, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLQSX (ANDLconst [c] x))\n\t// cond: c & 0x80000000 == 0\n\t// result: (ANDQconst [c & 0x7fffffff] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif !(c&0x80000000 == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c & 0x7fffffff\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLQSXload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLQSXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVLQSXload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLQSXload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLQZX(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLQZX x:(MOVLload [off] {sym} ptr mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVLload [off] {sym} ptr mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVLload {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tmem := x.Args[1]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLload, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLQZX x:(MOVLloadidx1 [off] {sym} ptr idx mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVLloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVLloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tidx := x.Args[1]\n\t\tmem := x.Args[2]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLloadidx1, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLQZX x:(MOVLloadidx4 [off] {sym} ptr idx mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVLloadidx4 [off] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVLloadidx4 {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tidx := x.Args[1]\n\t\tmem := x.Args[2]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLloadidx4, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLQZX (ANDLconst [c] x))\n\t// cond: c & 0x80000000 == 0\n\t// result: (ANDQconst [c & 0x7fffffff] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif !(c&0x80000000 == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c & 0x7fffffff\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLload [off] {sym} ptr (MOVLstore [off2] {sym2} ptr2 x _))\n\t// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)\n\t// result: x\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLstore {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_1.AuxInt\n\t\tsym2 := v_1.Aux\n\t\tptr2 := v_1.Args[0]\n\t\tx := v_1.Args[1]\n\t\tif !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MOVLload [off1] {sym} (ADDQconst [off2] ptr) mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVLload [off1+off2] {sym} ptr mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVLload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLload [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVLloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLloadidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLload [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ4 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLloadidx4)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLload [off] {sym} (ADDQ ptr idx) mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVLloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLloadidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLloadidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLloadidx1 [c] {sym} ptr (SHLQconst [2] idx) mem)\n\t// cond:\n\t// result: (MOVLloadidx4 [c] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLloadidx4)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLloadidx1 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVLloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLloadidx1 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVLloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLloadidx4(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLloadidx4 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVLloadidx4 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLloadidx4)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLloadidx4 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVLloadidx4 [c+4*d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLloadidx4)\n\t\tv.AuxInt = c + 4*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLstore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLstore [off] {sym} ptr (MOVLQSX x) mem)\n\t// cond:\n\t// result: (MOVLstore [off] {sym} ptr x mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLQSX {\n\t\t\tbreak\n\t\t}\n\t\tx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstore)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(x)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstore [off] {sym} ptr (MOVLQZX x) mem)\n\t// cond:\n\t// result: (MOVLstore [off] {sym} ptr x mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLQZX {\n\t\t\tbreak\n\t\t}\n\t\tx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstore)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(x)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstore [off1] {sym} (ADDQconst [off2] ptr) val mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVLstore [off1+off2] {sym} ptr val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstore [off] {sym} ptr (MOVLconst [c]) mem)\n\t// cond: validOff(off)\n\t// result: (MOVLstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tmem := v.Args[2]\n\t\tif !(validOff(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreconst)\n\t\tv.AuxInt = makeValAndOff(int64(int32(c)), off)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVLstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstore [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVLstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstore [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVLstoreidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ4 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreidx4)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstore [off] {sym} (ADDQ ptr idx) val mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVLstoreidx1 [off] {sym} ptr idx val mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLstoreconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLstoreconst [sc] {s} (ADDQconst [off] ptr) mem)\n\t// cond: ValAndOff(sc).canAdd(off)\n\t// result: (MOVLstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = s\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)\n\t// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)\n\t// result: (MOVLstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreconst [x] {sym1} (LEAQ1 [off] {sym2} ptr idx) mem)\n\t// cond: canMergeSym(sym1, sym2)\n\t// result: (MOVLstoreconstidx1 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreconst [x] {sym1} (LEAQ4 [off] {sym2} ptr idx) mem)\n\t// cond: canMergeSym(sym1, sym2)\n\t// result: (MOVLstoreconstidx4 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ4 {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLstoreconstidx4)\n\t\tv.AuxInt = ValAndOff(x).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreconst [x] {sym} (ADDQ ptr idx) mem)\n\t// cond:\n\t// result: (MOVLstoreconstidx1 [x] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVLstoreconstidx1)\n\t\tv.AuxInt = x\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLstoreconstidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLstoreconstidx1 [c] {sym} ptr (SHLQconst [2] idx) mem)\n\t// cond:\n\t// result: (MOVLstoreconstidx4 [c] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstoreconstidx4)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreconstidx1 [x] {sym} (ADDQconst [c] ptr) idx mem)\n\t// cond:\n\t// result: (MOVLstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreconstidx1 [x] {sym} ptr (ADDQconst [c] idx) mem)\n\t// cond:\n\t// result: (MOVLstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLstoreconstidx4(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLstoreconstidx4 [x] {sym} (ADDQconst [c] ptr) idx mem)\n\t// cond:\n\t// result: (MOVLstoreconstidx4 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstoreconstidx4)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreconstidx4 [x] {sym} ptr (ADDQconst [c] idx) mem)\n\t// cond:\n\t// result: (MOVLstoreconstidx4 [ValAndOff(x).add(4*c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstoreconstidx4)\n\t\tv.AuxInt = ValAndOff(x).add(4 * c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLstoreidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLstoreidx1 [c] {sym} ptr (SHLQconst [2] idx) val mem)\n\t// cond:\n\t// result: (MOVLstoreidx4 [c] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVLstoreidx4)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreidx1 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVLstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVLstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreidx1 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVLstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVLstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVLstoreidx4(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVLstoreidx4 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVLstoreidx4 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVLstoreidx4)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVLstoreidx4 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVLstoreidx4 [c+4*d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVLstoreidx4)\n\t\tv.AuxInt = c + 4*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVOload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVOload [off1] {sym} (ADDQconst [off2] ptr) mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVOload [off1+off2] {sym} ptr mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVOload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVOload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVOload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVOload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVOstore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVOstore [off1] {sym} (ADDQconst [off2] ptr) val mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVOstore [off1+off2] {sym} ptr val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVOstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVOstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVOstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVOstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQload [off] {sym} ptr (MOVQstore [off2] {sym2} ptr2 x _))\n\t// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)\n\t// result: x\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQstore {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_1.AuxInt\n\t\tsym2 := v_1.Aux\n\t\tptr2 := v_1.Args[0]\n\t\tx := v_1.Args[1]\n\t\tif !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MOVQload [off1] {sym} (ADDQconst [off2] ptr) mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVQload [off1+off2] {sym} ptr mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVQload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQload [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVQloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQloadidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQload [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVQloadidx8 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ8 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQloadidx8)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQload [off] {sym} (ADDQ ptr idx) mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVQloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQloadidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQloadidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQloadidx1 [c] {sym} ptr (SHLQconst [3] idx) mem)\n\t// cond:\n\t// result: (MOVQloadidx8 [c] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQloadidx8)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQloadidx1 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVQloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQloadidx1 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVQloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQloadidx8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQloadidx8 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVQloadidx8 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQloadidx8)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQloadidx8 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVQloadidx8 [c+8*d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQloadidx8)\n\t\tv.AuxInt = c + 8*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQstore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQstore [off1] {sym} (ADDQconst [off2] ptr) val mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVQstore [off1+off2] {sym} ptr val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstore [off] {sym} ptr (MOVQconst [c]) mem)\n\t// cond: validValAndOff(c,off)\n\t// result: (MOVQstoreconst [makeValAndOff(c,off)] {sym} ptr mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tmem := v.Args[2]\n\t\tif !(validValAndOff(c, off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreconst)\n\t\tv.AuxInt = makeValAndOff(c, off)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVQstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstore [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVQstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstore [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVQstoreidx8 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ8 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreidx8)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstore [off] {sym} (ADDQ ptr idx) val mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVQstoreidx1 [off] {sym} ptr idx val mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQstoreconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQstoreconst [sc] {s} (ADDQconst [off] ptr) mem)\n\t// cond: ValAndOff(sc).canAdd(off)\n\t// result: (MOVQstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = s\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)\n\t// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)\n\t// result: (MOVQstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreconst [x] {sym1} (LEAQ1 [off] {sym2} ptr idx) mem)\n\t// cond: canMergeSym(sym1, sym2)\n\t// result: (MOVQstoreconstidx1 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreconst [x] {sym1} (LEAQ8 [off] {sym2} ptr idx) mem)\n\t// cond: canMergeSym(sym1, sym2)\n\t// result: (MOVQstoreconstidx8 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ8 {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstoreconstidx8)\n\t\tv.AuxInt = ValAndOff(x).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreconst [x] {sym} (ADDQ ptr idx) mem)\n\t// cond:\n\t// result: (MOVQstoreconstidx1 [x] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVQstoreconstidx1)\n\t\tv.AuxInt = x\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQstoreconstidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQstoreconstidx1 [c] {sym} ptr (SHLQconst [3] idx) mem)\n\t// cond:\n\t// result: (MOVQstoreconstidx8 [c] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQstoreconstidx8)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreconstidx1 [x] {sym} (ADDQconst [c] ptr) idx mem)\n\t// cond:\n\t// result: (MOVQstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreconstidx1 [x] {sym} ptr (ADDQconst [c] idx) mem)\n\t// cond:\n\t// result: (MOVQstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQstoreconstidx8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQstoreconstidx8 [x] {sym} (ADDQconst [c] ptr) idx mem)\n\t// cond:\n\t// result: (MOVQstoreconstidx8 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQstoreconstidx8)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreconstidx8 [x] {sym} ptr (ADDQconst [c] idx) mem)\n\t// cond:\n\t// result: (MOVQstoreconstidx8 [ValAndOff(x).add(8*c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQstoreconstidx8)\n\t\tv.AuxInt = ValAndOff(x).add(8 * c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQstoreidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQstoreidx1 [c] {sym} ptr (SHLQconst [3] idx) val mem)\n\t// cond:\n\t// result: (MOVQstoreidx8 [c] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVQstoreidx8)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreidx1 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVQstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVQstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreidx1 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVQstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVQstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVQstoreidx8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVQstoreidx8 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVQstoreidx8 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVQstoreidx8)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVQstoreidx8 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVQstoreidx8 [c+8*d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVQstoreidx8)\n\t\tv.AuxInt = c + 8*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSDload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSDload [off1] {sym} (ADDQconst [off2] ptr) mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVSDload [off1+off2] {sym} ptr mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSDload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDload [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSDloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDloadidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDload [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSDloadidx8 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ8 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDloadidx8)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDload [off] {sym} (ADDQ ptr idx) mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVSDloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDloadidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSDloadidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSDloadidx1 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVSDloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSDloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDloadidx1 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVSDloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSDloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSDloadidx8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSDloadidx8 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVSDloadidx8 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSDloadidx8)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDloadidx8 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVSDloadidx8 [c+8*d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSDloadidx8)\n\t\tv.AuxInt = c + 8*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSDstore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSDstore [off1] {sym} (ADDQconst [off2] ptr) val mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVSDstore [off1+off2] {sym} ptr val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDstore [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSDstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDstoreidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDstore [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSDstoreidx8 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ8 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDstoreidx8)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDstore [off] {sym} (ADDQ ptr idx) val mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVSDstoreidx1 [off] {sym} ptr idx val mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDstoreidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSDstoreidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSDstoreidx1 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVSDstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSDstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDstoreidx1 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVSDstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSDstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSDstoreidx8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSDstoreidx8 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVSDstoreidx8 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSDstoreidx8)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSDstoreidx8 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVSDstoreidx8 [c+8*d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSDstoreidx8)\n\t\tv.AuxInt = c + 8*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSSload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSSload [off1] {sym} (ADDQconst [off2] ptr) mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVSSload [off1+off2] {sym} ptr mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSSload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSload [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSSloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSloadidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSload [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSSloadidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ4 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSloadidx4)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSload [off] {sym} (ADDQ ptr idx) mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVSSloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSloadidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSSloadidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSSloadidx1 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVSSloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSSloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSloadidx1 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVSSloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSSloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSSloadidx4(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSSloadidx4 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVSSloadidx4 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSSloadidx4)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSloadidx4 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVSSloadidx4 [c+4*d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVSSloadidx4)\n\t\tv.AuxInt = c + 4*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSSstore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSSstore [off1] {sym} (ADDQconst [off2] ptr) val mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVSSstore [off1+off2] {sym} ptr val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSstore [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSSstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSstoreidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSstore [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVSSstoreidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ4 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSstoreidx4)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSstore [off] {sym} (ADDQ ptr idx) val mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVSSstoreidx1 [off] {sym} ptr idx val mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSstoreidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSSstoreidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSSstoreidx1 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVSSstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSSstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSstoreidx1 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVSSstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSSstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVSSstoreidx4(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVSSstoreidx4 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVSSstoreidx4 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSSstoreidx4)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVSSstoreidx4 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVSSstoreidx4 [c+4*d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVSSstoreidx4)\n\t\tv.AuxInt = c + 4*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWQSX(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWQSX x:(MOVWload [off] {sym} ptr mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVWQSXload [off] {sym} ptr mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVWload {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tmem := x.Args[1]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWQSXload, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWQSX (ANDWconst [c] x))\n\t// cond: c & 0x8000 == 0\n\t// result: (ANDQconst [c & 0x7fff] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tif !(c&0x8000 == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c & 0x7fff\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWQSXload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWQSXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVWQSXload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWQSXload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWQZX(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWQZX x:(MOVWload [off] {sym} ptr mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVWload [off] {sym} ptr mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVWload {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tmem := x.Args[1]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWload, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWQZX x:(MOVWloadidx1 [off] {sym} ptr idx mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVWloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVWloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tidx := x.Args[1]\n\t\tmem := x.Args[2]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWloadidx1, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWQZX x:(MOVWloadidx2 [off] {sym} ptr idx mem))\n\t// cond: x.Uses == 1\n\t// result: @x.Block (MOVWloadidx2 [off] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x.Op != OpAMD64MOVWloadidx2 {\n\t\t\tbreak\n\t\t}\n\t\toff := x.AuxInt\n\t\tsym := x.Aux\n\t\tptr := x.Args[0]\n\t\tidx := x.Args[1]\n\t\tmem := x.Args[2]\n\t\tif !(x.Uses == 1) {\n\t\t\tbreak\n\t\t}\n\t\tb = x.Block\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWloadidx2, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = off\n\t\tv0.Aux = sym\n\t\tv0.AddArg(ptr)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWQZX (ANDWconst [c] x))\n\t// cond:\n\t// result: (ANDQconst [c & 0xffff] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64ANDQconst)\n\t\tv.AuxInt = c & 0xffff\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWload(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))\n\t// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)\n\t// result: x\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWstore {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_1.AuxInt\n\t\tsym2 := v_1.Aux\n\t\tptr2 := v_1.Args[0]\n\t\tx := v_1.Args[1]\n\t\tif !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MOVWload [off1] {sym} (ADDQconst [off2] ptr) mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVWload [off1+off2] {sym} ptr mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWload)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWload [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVWloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWloadidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWload [off1] {sym1} (LEAQ2 [off2] {sym2} ptr idx) mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVWloadidx2 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ2 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWloadidx2)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWload [off] {sym} (ADDQ ptr idx) mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVWloadidx1 [off] {sym} ptr idx mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWloadidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWloadidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWloadidx1 [c] {sym} ptr (SHLQconst [1] idx) mem)\n\t// cond:\n\t// result: (MOVWloadidx2 [c] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWloadidx2)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWloadidx1 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVWloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWloadidx1 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVWloadidx1 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWloadidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWloadidx2(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWloadidx2 [c] {sym} (ADDQconst [d] ptr) idx mem)\n\t// cond:\n\t// result: (MOVWloadidx2 [c+d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWloadidx2)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWloadidx2 [c] {sym} ptr (ADDQconst [d] idx) mem)\n\t// cond:\n\t// result: (MOVWloadidx2 [c+2*d] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWloadidx2)\n\t\tv.AuxInt = c + 2*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWstore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWstore [off] {sym} ptr (MOVWQSX x) mem)\n\t// cond:\n\t// result: (MOVWstore [off] {sym} ptr x mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWQSX {\n\t\t\tbreak\n\t\t}\n\t\tx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstore)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(x)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstore [off] {sym} ptr (MOVWQZX x) mem)\n\t// cond:\n\t// result: (MOVWstore [off] {sym} ptr x mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWQZX {\n\t\t\tbreak\n\t\t}\n\t\tx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstore)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(x)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstore [off1] {sym} (ADDQconst [off2] ptr) val mem)\n\t// cond: is32Bit(off1+off2)\n\t// result: (MOVWstore [off1+off2] {sym} ptr val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1 + off2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstore [off] {sym} ptr (MOVWconst [c]) mem)\n\t// cond: validOff(off)\n\t// result: (MOVWstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tmem := v.Args[2]\n\t\tif !(validOff(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreconst)\n\t\tv.AuxInt = makeValAndOff(int64(int16(c)), off)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tbase := v_0.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstore)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(base)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstore [off1] {sym1} (LEAQ1 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVWstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreidx1)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstore [off1] {sym1} (LEAQ2 [off2] {sym2} ptr idx) val mem)\n\t// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)\n\t// result: (MOVWstoreidx2 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)\n\tfor {\n\t\toff1 := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ2 {\n\t\t\tbreak\n\t\t}\n\t\toff2 := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreidx2)\n\t\tv.AuxInt = off1 + off2\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstore [off] {sym} (ADDQ ptr idx) val mem)\n\t// cond: ptr.Op != OpSB\n\t// result: (MOVWstoreidx1 [off] {sym} ptr idx val mem)\n\tfor {\n\t\toff := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(ptr.Op != OpSB) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreidx1)\n\t\tv.AuxInt = off\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWstoreconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWstoreconst [sc] {s} (ADDQconst [off] ptr) mem)\n\t// cond: ValAndOff(sc).canAdd(off)\n\t// result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\ts := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = s\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)\n\t// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)\n\t// result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)\n\tfor {\n\t\tsc := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreconst)\n\t\tv.AuxInt = ValAndOff(sc).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreconst [x] {sym1} (LEAQ1 [off] {sym2} ptr idx) mem)\n\t// cond: canMergeSym(sym1, sym2)\n\t// result: (MOVWstoreconstidx1 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ1 {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreconst [x] {sym1} (LEAQ2 [off] {sym2} ptr idx) mem)\n\t// cond: canMergeSym(sym1, sym2)\n\t// result: (MOVWstoreconstidx2 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym1 := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64LEAQ2 {\n\t\t\tbreak\n\t\t}\n\t\toff := v_0.AuxInt\n\t\tsym2 := v_0.Aux\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tif !(canMergeSym(sym1, sym2)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWstoreconstidx2)\n\t\tv.AuxInt = ValAndOff(x).add(off)\n\t\tv.Aux = mergeSym(sym1, sym2)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreconst [x] {sym} (ADDQ ptr idx) mem)\n\t// cond:\n\t// result: (MOVWstoreconstidx1 [x] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQ {\n\t\t\tbreak\n\t\t}\n\t\tptr := v_0.Args[0]\n\t\tidx := v_0.Args[1]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVWstoreconstidx1)\n\t\tv.AuxInt = x\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWstoreconstidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWstoreconstidx1 [c] {sym} ptr (SHLQconst [1] idx) mem)\n\t// cond:\n\t// result: (MOVWstoreconstidx2 [c] {sym} ptr idx mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstoreconstidx2)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreconstidx1 [x] {sym} (ADDQconst [c] ptr) idx mem)\n\t// cond:\n\t// result: (MOVWstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreconstidx1 [x] {sym} ptr (ADDQconst [c] idx) mem)\n\t// cond:\n\t// result: (MOVWstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstoreconstidx1)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWstoreconstidx2(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWstoreconstidx2 [x] {sym} (ADDQconst [c] ptr) idx mem)\n\t// cond:\n\t// result: (MOVWstoreconstidx2 [ValAndOff(x).add(c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstoreconstidx2)\n\t\tv.AuxInt = ValAndOff(x).add(c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreconstidx2 [x] {sym} ptr (ADDQconst [c] idx) mem)\n\t// cond:\n\t// result: (MOVWstoreconstidx2 [ValAndOff(x).add(2*c)] {sym} ptr idx mem)\n\tfor {\n\t\tx := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstoreconstidx2)\n\t\tv.AuxInt = ValAndOff(x).add(2 * c)\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWstoreidx1(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWstoreidx1 [c] {sym} ptr (SHLQconst [1] idx) val mem)\n\t// cond:\n\t// result: (MOVWstoreidx2 [c] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVWstoreidx2)\n\t\tv.AuxInt = c\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreidx1 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVWstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVWstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreidx1 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVWstoreidx1 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVWstoreidx1)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MOVWstoreidx2(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MOVWstoreidx2 [c] {sym} (ADDQconst [d] ptr) idx val mem)\n\t// cond:\n\t// result: (MOVWstoreidx2 [c+d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tptr := v_0.Args[0]\n\t\tidx := v.Args[1]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVWstoreidx2)\n\t\tv.AuxInt = c + d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (MOVWstoreidx2 [c] {sym} ptr (ADDQconst [d] idx) val mem)\n\t// cond:\n\t// result: (MOVWstoreidx2 [c+2*d] {sym} ptr idx val mem)\n\tfor {\n\t\tc := v.AuxInt\n\t\tsym := v.Aux\n\t\tptr := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ADDQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_1.AuxInt\n\t\tidx := v_1.Args[0]\n\t\tval := v.Args[2]\n\t\tmem := v.Args[3]\n\t\tv.reset(OpAMD64MOVWstoreidx2)\n\t\tv.AuxInt = c + 2*d\n\t\tv.Aux = sym\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(idx)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULB x (MOVBconst [c]))\n\t// cond:\n\t// result: (MULBconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64MULBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULB (MOVBconst [c]) x)\n\t// cond:\n\t// result: (MULBconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64MULBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULBconst [c] (MOVBconst [d]))\n\t// cond:\n\t// result: (MOVBconst [int64(int8(c*d))])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = int64(int8(c * d))\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULL x (MOVLconst [c]))\n\t// cond:\n\t// result: (MULLconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64MULLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULL (MOVLconst [c]) x)\n\t// cond:\n\t// result: (MULLconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64MULLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULLconst [c] (MOVLconst [d]))\n\t// cond:\n\t// result: (MOVLconst [int64(int32(c*d))])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = int64(int32(c * d))\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULQ x (MOVQconst [c]))\n\t// cond: is32Bit(c)\n\t// result: (MULQconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MULQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQ (MOVQconst [c]) x)\n\t// cond: is32Bit(c)\n\t// result: (MULQconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MULQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULQconst [-1] x)\n\t// cond:\n\t// result: (NEGQ x)\n\tfor {\n\t\tif v.AuxInt != -1 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NEGQ)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [0] _)\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (MULQconst [1] x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tif v.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [3] x)\n\t// cond:\n\t// result: (LEAQ2 x x)\n\tfor {\n\t\tif v.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AddArg(x)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [5] x)\n\t// cond:\n\t// result: (LEAQ4 x x)\n\tfor {\n\t\tif v.AuxInt != 5 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AddArg(x)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [7] x)\n\t// cond:\n\t// result: (LEAQ8 (NEGQ x) x)\n\tfor {\n\t\tif v.AuxInt != 7 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64NEGQ, v.Type)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [9] x)\n\t// cond:\n\t// result: (LEAQ8 x x)\n\tfor {\n\t\tif v.AuxInt != 9 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AddArg(x)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [11] x)\n\t// cond:\n\t// result: (LEAQ2 x (LEAQ4 x x))\n\tfor {\n\t\tif v.AuxInt != 11 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ4, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [13] x)\n\t// cond:\n\t// result: (LEAQ4 x (LEAQ2 x x))\n\tfor {\n\t\tif v.AuxInt != 13 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ2, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [21] x)\n\t// cond:\n\t// result: (LEAQ4 x (LEAQ4 x x))\n\tfor {\n\t\tif v.AuxInt != 21 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ4, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [25] x)\n\t// cond:\n\t// result: (LEAQ8 x (LEAQ2 x x))\n\tfor {\n\t\tif v.AuxInt != 25 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ2, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [37] x)\n\t// cond:\n\t// result: (LEAQ4 x (LEAQ8 x x))\n\tfor {\n\t\tif v.AuxInt != 37 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ8, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [41] x)\n\t// cond:\n\t// result: (LEAQ8 x (LEAQ4 x x))\n\tfor {\n\t\tif v.AuxInt != 41 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ4, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [73] x)\n\t// cond:\n\t// result: (LEAQ8 x (LEAQ8 x x))\n\tfor {\n\t\tif v.AuxInt != 73 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ8, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: isPowerOfTwo(c)\n\t// result: (SHLQconst [log2(c)] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(isPowerOfTwo(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = log2(c)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: isPowerOfTwo(c+1) && c >= 15\n\t// result: (SUBQ (SHLQconst [log2(c+1)] x) x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(isPowerOfTwo(c+1) && c >= 15) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64SUBQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQconst, v.Type)\n\t\tv0.AuxInt = log2(c + 1)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: isPowerOfTwo(c-1) && c >= 17\n\t// result: (LEAQ1 (SHLQconst [log2(c-1)] x) x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(isPowerOfTwo(c-1) && c >= 17) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ1)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQconst, v.Type)\n\t\tv0.AuxInt = log2(c - 1)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: isPowerOfTwo(c-2) && c >= 34\n\t// result: (LEAQ2 (SHLQconst [log2(c-2)] x) x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(isPowerOfTwo(c-2) && c >= 34) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ2)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQconst, v.Type)\n\t\tv0.AuxInt = log2(c - 2)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: isPowerOfTwo(c-4) && c >= 68\n\t// result: (LEAQ4 (SHLQconst [log2(c-4)] x) x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(isPowerOfTwo(c-4) && c >= 68) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ4)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQconst, v.Type)\n\t\tv0.AuxInt = log2(c - 4)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: isPowerOfTwo(c-8) && c >= 136\n\t// result: (LEAQ8 (SHLQconst [log2(c-8)] x) x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(isPowerOfTwo(c-8) && c >= 136) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64LEAQ8)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHLQconst, v.Type)\n\t\tv0.AuxInt = log2(c - 8)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: c%3 == 0 && isPowerOfTwo(c/3)\n\t// result: (SHLQconst [log2(c/3)] (LEAQ2 x x))\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(c%3 == 0 && isPowerOfTwo(c/3)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = log2(c / 3)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ2, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: c%5 == 0 && isPowerOfTwo(c/5)\n\t// result: (SHLQconst [log2(c/5)] (LEAQ4 x x))\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(c%5 == 0 && isPowerOfTwo(c/5)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = log2(c / 5)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ4, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] x)\n\t// cond: c%9 == 0 && isPowerOfTwo(c/9)\n\t// result: (SHLQconst [log2(c/9)] (LEAQ8 x x))\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(c%9 == 0 && isPowerOfTwo(c/9)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = log2(c / 9)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64LEAQ8, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (MULQconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [c*d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = c * d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULW x (MOVWconst [c]))\n\t// cond:\n\t// result: (MULWconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64MULWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (MULW (MOVWconst [c]) x)\n\t// cond:\n\t// result: (MULWconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64MULWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64MULWconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (MULWconst [c] (MOVWconst [d]))\n\t// cond:\n\t// result: (MOVWconst [int64(int16(c*d))])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = int64(int16(c * d))\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod16 x y)\n\t// cond:\n\t// result: (MODW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod16u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod16u x y)\n\t// cond:\n\t// result: (MODWU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODWU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod32 x y)\n\t// cond:\n\t// result: (MODL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod32u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod32u x y)\n\t// cond:\n\t// result: (MODLU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODLU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod64 x y)\n\t// cond:\n\t// result: (MODQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod64u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod64u x y)\n\t// cond:\n\t// result: (MODQU x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODQU)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod8 x y)\n\t// cond:\n\t// result: (MODW (SignExt8to16 x) (SignExt8to16 y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODW)\n\t\tv0 := b.NewValue0(v.Line, OpSignExt8to16, config.fe.TypeInt16())\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpSignExt8to16, config.fe.TypeInt16())\n\t\tv1.AddArg(y)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMod8u(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mod8u x y)\n\t// cond:\n\t// result: (MODWU (ZeroExt8to16 x) (ZeroExt8to16 y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MODWU)\n\t\tv0 := b.NewValue0(v.Line, OpZeroExt8to16, config.fe.TypeUInt16())\n\t\tv0.AddArg(x)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpZeroExt8to16, config.fe.TypeUInt16())\n\t\tv1.AddArg(y)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMove(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Move [0] _ _ mem)\n\t// cond:\n\t// result: mem\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tmem := v.Args[2]\n\t\tv.reset(OpCopy)\n\t\tv.Type = mem.Type\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Move [1] dst src mem)\n\t// cond:\n\t// result: (MOVBstore dst (MOVBload src mem) mem)\n\tfor {\n\t\tif v.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVBload, config.fe.TypeUInt8())\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Move [2] dst src mem)\n\t// cond:\n\t// result: (MOVWstore dst (MOVWload src mem) mem)\n\tfor {\n\t\tif v.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstore)\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWload, config.fe.TypeUInt16())\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Move [4] dst src mem)\n\t// cond:\n\t// result: (MOVLstore dst (MOVLload src mem) mem)\n\tfor {\n\t\tif v.AuxInt != 4 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstore)\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLload, config.fe.TypeUInt32())\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Move [8] dst src mem)\n\t// cond:\n\t// result: (MOVQstore dst (MOVQload src mem) mem)\n\tfor {\n\t\tif v.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQstore)\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQload, config.fe.TypeUInt64())\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Move [16] dst src mem)\n\t// cond:\n\t// result: (MOVOstore dst (MOVOload src mem) mem)\n\tfor {\n\t\tif v.AuxInt != 16 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVOstore)\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVOload, TypeInt128)\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Move [3] dst src mem)\n\t// cond:\n\t// result: (MOVBstore [2] dst (MOVBload [2] src mem) \t\t(MOVWstore dst (MOVWload src mem) mem))\n\tfor {\n\t\tif v.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AuxInt = 2\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVBload, config.fe.TypeUInt8())\n\t\tv0.AuxInt = 2\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVWstore, TypeMem)\n\t\tv1.AddArg(dst)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVWload, config.fe.TypeUInt16())\n\t\tv2.AddArg(src)\n\t\tv2.AddArg(mem)\n\t\tv1.AddArg(v2)\n\t\tv1.AddArg(mem)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\t// match: (Move [5] dst src mem)\n\t// cond:\n\t// result: (MOVBstore [4] dst (MOVBload [4] src mem) \t\t(MOVLstore dst (MOVLload src mem) mem))\n\tfor {\n\t\tif v.AuxInt != 5 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AuxInt = 4\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVBload, config.fe.TypeUInt8())\n\t\tv0.AuxInt = 4\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeMem)\n\t\tv1.AddArg(dst)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVLload, config.fe.TypeUInt32())\n\t\tv2.AddArg(src)\n\t\tv2.AddArg(mem)\n\t\tv1.AddArg(v2)\n\t\tv1.AddArg(mem)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\t// match: (Move [6] dst src mem)\n\t// cond:\n\t// result: (MOVWstore [4] dst (MOVWload [4] src mem) \t\t(MOVLstore dst (MOVLload src mem) mem))\n\tfor {\n\t\tif v.AuxInt != 6 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstore)\n\t\tv.AuxInt = 4\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWload, config.fe.TypeUInt16())\n\t\tv0.AuxInt = 4\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeMem)\n\t\tv1.AddArg(dst)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVLload, config.fe.TypeUInt32())\n\t\tv2.AddArg(src)\n\t\tv2.AddArg(mem)\n\t\tv1.AddArg(v2)\n\t\tv1.AddArg(mem)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\t// match: (Move [7] dst src mem)\n\t// cond:\n\t// result: (MOVLstore [3] dst (MOVLload [3] src mem) \t\t(MOVLstore dst (MOVLload src mem) mem))\n\tfor {\n\t\tif v.AuxInt != 7 {\n\t\t\tbreak\n\t\t}\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstore)\n\t\tv.AuxInt = 3\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLload, config.fe.TypeUInt32())\n\t\tv0.AuxInt = 3\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeMem)\n\t\tv1.AddArg(dst)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVLload, config.fe.TypeUInt32())\n\t\tv2.AddArg(src)\n\t\tv2.AddArg(mem)\n\t\tv1.AddArg(v2)\n\t\tv1.AddArg(mem)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\t// match: (Move [size] dst src mem)\n\t// cond: size > 8 && size < 16\n\t// result: (MOVQstore [size-8] dst (MOVQload [size-8] src mem) \t\t(MOVQstore dst (MOVQload src mem) mem))\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(size > 8 && size < 16) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQstore)\n\t\tv.AuxInt = size - 8\n\t\tv.AddArg(dst)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQload, config.fe.TypeUInt64())\n\t\tv0.AuxInt = size - 8\n\t\tv0.AddArg(src)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeMem)\n\t\tv1.AddArg(dst)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVQload, config.fe.TypeUInt64())\n\t\tv2.AddArg(src)\n\t\tv2.AddArg(mem)\n\t\tv1.AddArg(v2)\n\t\tv1.AddArg(mem)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\t// match: (Move [size] dst src mem)\n\t// cond: size > 16 && size%16 != 0 && size%16 <= 8\n\t// result: (Move [size-size%16] (ADDQconst dst [size%16]) (ADDQconst src [size%16]) \t\t(MOVQstore dst (MOVQload src mem) mem))\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(size > 16 && size%16 != 0 && size%16 <= 8) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpMove)\n\t\tv.AuxInt = size - size%16\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ADDQconst, dst.Type)\n\t\tv0.AddArg(dst)\n\t\tv0.AuxInt = size % 16\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64ADDQconst, src.Type)\n\t\tv1.AddArg(src)\n\t\tv1.AuxInt = size % 16\n\t\tv.AddArg(v1)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeMem)\n\t\tv2.AddArg(dst)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64MOVQload, config.fe.TypeUInt64())\n\t\tv3.AddArg(src)\n\t\tv3.AddArg(mem)\n\t\tv2.AddArg(v3)\n\t\tv2.AddArg(mem)\n\t\tv.AddArg(v2)\n\t\treturn true\n\t}\n\t// match: (Move [size] dst src mem)\n\t// cond: size > 16 && size%16 != 0 && size%16 > 8\n\t// result: (Move [size-size%16] (ADDQconst dst [size%16]) (ADDQconst src [size%16]) \t\t(MOVOstore dst (MOVOload src mem) mem))\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(size > 16 && size%16 != 0 && size%16 > 8) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpMove)\n\t\tv.AuxInt = size - size%16\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ADDQconst, dst.Type)\n\t\tv0.AddArg(dst)\n\t\tv0.AuxInt = size % 16\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64ADDQconst, src.Type)\n\t\tv1.AddArg(src)\n\t\tv1.AuxInt = size % 16\n\t\tv.AddArg(v1)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVOstore, TypeMem)\n\t\tv2.AddArg(dst)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64MOVOload, TypeInt128)\n\t\tv3.AddArg(src)\n\t\tv3.AddArg(mem)\n\t\tv2.AddArg(v3)\n\t\tv2.AddArg(mem)\n\t\tv.AddArg(v2)\n\t\treturn true\n\t}\n\t// match: (Move [size] dst src mem)\n\t// cond: size >= 32 && size <= 16*64 && size%16 == 0 && !config.noDuffDevice\n\t// result: (DUFFCOPY [14*(64-size/16)] dst src mem)\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(size >= 32 && size <= 16*64 && size%16 == 0 && !config.noDuffDevice) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64DUFFCOPY)\n\t\tv.AuxInt = 14 * (64 - size/16)\n\t\tv.AddArg(dst)\n\t\tv.AddArg(src)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Move [size] dst src mem)\n\t// cond: (size > 16*64 || config.noDuffDevice) && size%8 == 0\n\t// result: (REPMOVSQ dst src (MOVQconst [size/8]) mem)\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdst := v.Args[0]\n\t\tsrc := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !((size > 16*64 || config.noDuffDevice) && size%8 == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64REPMOVSQ)\n\t\tv.AddArg(dst)\n\t\tv.AddArg(src)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQconst, config.fe.TypeUInt64())\n\t\tv0.AuxInt = size / 8\n\t\tv.AddArg(v0)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMul16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mul16 x y)\n\t// cond:\n\t// result: (MULW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MULW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMul32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mul32 x y)\n\t// cond:\n\t// result: (MULL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MULL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMul32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mul32F x y)\n\t// cond:\n\t// result: (MULSS x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MULSS)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMul64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mul64 x y)\n\t// cond:\n\t// result: (MULQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MULQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMul64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mul64F x y)\n\t// cond:\n\t// result: (MULSD x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MULSD)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpMul8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Mul8 x y)\n\t// cond:\n\t// result: (MULB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64MULB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NEGB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NEGB (MOVBconst [c]))\n\t// cond:\n\t// result: (MOVBconst [int64(int8(-c))])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = int64(int8(-c))\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NEGL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NEGL (MOVLconst [c]))\n\t// cond:\n\t// result: (MOVLconst [int64(int32(-c))])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = int64(int32(-c))\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NEGQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NEGQ (MOVQconst [c]))\n\t// cond:\n\t// result: (MOVQconst [-c])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = -c\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NEGW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NEGW (MOVWconst [c]))\n\t// cond:\n\t// result: (MOVWconst [int64(int16(-c))])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = int64(int16(-c))\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NOTB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NOTB (MOVBconst [c]))\n\t// cond:\n\t// result: (MOVBconst [^c])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = ^c\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NOTL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NOTL (MOVLconst [c]))\n\t// cond:\n\t// result: (MOVLconst [^c])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = ^c\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NOTQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NOTQ (MOVQconst [c]))\n\t// cond:\n\t// result: (MOVQconst [^c])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = ^c\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64NOTW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NOTW (MOVWconst [c]))\n\t// cond:\n\t// result: (MOVWconst [^c])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = ^c\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeg16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neg16 x)\n\t// cond:\n\t// result: (NEGW x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NEGW)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeg32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neg32 x)\n\t// cond:\n\t// result: (NEGL x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NEGL)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeg32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neg32F x)\n\t// cond:\n\t// result: (PXOR x (MOVSSconst [f2i(math.Copysign(0, -1))]))\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64PXOR)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVSSconst, config.Frontend().TypeFloat32())\n\t\tv0.AuxInt = f2i(math.Copysign(0, -1))\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeg64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neg64 x)\n\t// cond:\n\t// result: (NEGQ x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NEGQ)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeg64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neg64F x)\n\t// cond:\n\t// result: (PXOR x (MOVSDconst [f2i(math.Copysign(0, -1))]))\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64PXOR)\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVSDconst, config.Frontend().TypeFloat64())\n\t\tv0.AuxInt = f2i(math.Copysign(0, -1))\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeg8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neg8 x)\n\t// cond:\n\t// result: (NEGB x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64NEGB)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeq16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neq16 x y)\n\t// cond:\n\t// result: (SETNE (CMPW x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETNE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeq32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neq32 x y)\n\t// cond:\n\t// result: (SETNE (CMPL x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETNE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeq32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neq32F x y)\n\t// cond:\n\t// result: (SETNEF (UCOMISS x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETNEF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeq64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neq64 x y)\n\t// cond:\n\t// result: (SETNE (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETNE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeq64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neq64F x y)\n\t// cond:\n\t// result: (SETNEF (UCOMISD x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETNEF)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeq8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Neq8 x y)\n\t// cond:\n\t// result: (SETNE (CMPB x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETNE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNeqPtr(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NeqPtr x y)\n\t// cond:\n\t// result: (SETNE (CMPQ x y))\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SETNE)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeFlags)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNilCheck(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (NilCheck ptr mem)\n\t// cond:\n\t// result: (LoweredNilCheck ptr mem)\n\tfor {\n\t\tptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64LoweredNilCheck)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpNot(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Not x)\n\t// cond:\n\t// result: (XORBconst [1] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64XORBconst)\n\t\tv.AuxInt = 1\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORB x (MOVBconst [c]))\n\t// cond:\n\t// result: (ORBconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ORBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORB (MOVBconst [c]) x)\n\t// cond:\n\t// result: (ORBconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ORBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORB x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORBconst [c] x)\n\t// cond: int8(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int8(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORBconst [c] _)\n\t// cond: int8(c)==-1\n\t// result: (MOVBconst [-1])\n\tfor {\n\t\tc := v.AuxInt\n\t\tif !(int8(c) == -1) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (ORBconst [c] (MOVBconst [d]))\n\t// cond:\n\t// result: (MOVBconst [c|d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = c | d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORL x (MOVLconst [c]))\n\t// cond:\n\t// result: (ORLconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ORLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORL (MOVLconst [c]) x)\n\t// cond:\n\t// result: (ORLconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ORLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORL x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORL (ORL (ORL x0:(MOVBload [i] {s} p mem) (SHLLconst [8] x1:(MOVBload [i+1] {s} p mem))) (SHLLconst [16] x2:(MOVBload [i+2] {s} p mem))) (SHLLconst [24] x3:(MOVBload [i+3] {s} p mem)))\n\t// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil\n\t// result: @mergePoint(b,x0,x1,x2,x3) (MOVLload [i] {s} p mem)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ORL {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0 := v_0.Args[0]\n\t\tif v_0_0.Op != OpAMD64ORL {\n\t\t\tbreak\n\t\t}\n\t\tx0 := v_0_0.Args[0]\n\t\tif x0.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\ti := x0.AuxInt\n\t\ts := x0.Aux\n\t\tp := x0.Args[0]\n\t\tmem := x0.Args[1]\n\t\tv_0_0_1 := v_0_0.Args[1]\n\t\tif v_0_0_1.Op != OpAMD64SHLLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_1.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tx1 := v_0_0_1.Args[0]\n\t\tif x1.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x1.AuxInt != i+1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x1.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_1 := v_0.Args[1]\n\t\tif v_0_1.Op != OpAMD64SHLLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_1.AuxInt != 16 {\n\t\t\tbreak\n\t\t}\n\t\tx2 := v_0_1.Args[0]\n\t\tif x2.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x2.AuxInt != i+2 {\n\t\t\tbreak\n\t\t}\n\t\tif x2.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x2.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x2.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 24 {\n\t\t\tbreak\n\t\t}\n\t\tx3 := v_1.Args[0]\n\t\tif x3.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x3.AuxInt != i+3 {\n\t\t\tbreak\n\t\t}\n\t\tif x3.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x3.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x3.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil) {\n\t\t\tbreak\n\t\t}\n\t\tb = mergePoint(b, x0, x1, x2, x3)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLload, config.fe.TypeUInt32())\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = i\n\t\tv0.Aux = s\n\t\tv0.AddArg(p)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (ORL (ORL (ORL x0:(MOVBloadidx1 [i] {s} p idx mem) (SHLLconst [8] x1:(MOVBloadidx1 [i+1] {s} p idx mem))) (SHLLconst [16] x2:(MOVBloadidx1 [i+2] {s} p idx mem))) (SHLLconst [24] x3:(MOVBloadidx1 [i+3] {s} p idx mem)))\n\t// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil\n\t// result: @mergePoint(b,x0,x1,x2,x3) (MOVLloadidx1 [i] {s} p idx mem)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ORL {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0 := v_0.Args[0]\n\t\tif v_0_0.Op != OpAMD64ORL {\n\t\t\tbreak\n\t\t}\n\t\tx0 := v_0_0.Args[0]\n\t\tif x0.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\ti := x0.AuxInt\n\t\ts := x0.Aux\n\t\tp := x0.Args[0]\n\t\tidx := x0.Args[1]\n\t\tmem := x0.Args[2]\n\t\tv_0_0_1 := v_0_0.Args[1]\n\t\tif v_0_0_1.Op != OpAMD64SHLLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_1.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tx1 := v_0_0_1.Args[0]\n\t\tif x1.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.AuxInt != i+1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x1.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x1.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_1 := v_0.Args[1]\n\t\tif v_0_1.Op != OpAMD64SHLLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_1.AuxInt != 16 {\n\t\t\tbreak\n\t\t}\n\t\tx2 := v_0_1.Args[0]\n\t\tif x2.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x2.AuxInt != i+2 {\n\t\t\tbreak\n\t\t}\n\t\tif x2.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x2.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x2.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x2.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 24 {\n\t\t\tbreak\n\t\t}\n\t\tx3 := v_1.Args[0]\n\t\tif x3.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x3.AuxInt != i+3 {\n\t\t\tbreak\n\t\t}\n\t\tif x3.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x3.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x3.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x3.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tif !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil) {\n\t\t\tbreak\n\t\t}\n\t\tb = mergePoint(b, x0, x1, x2, x3)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLloadidx1, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = i\n\t\tv0.Aux = s\n\t\tv0.AddArg(p)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORLconst [c] x)\n\t// cond: int32(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int32(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORLconst [c] _)\n\t// cond: int32(c)==-1\n\t// result: (MOVLconst [-1])\n\tfor {\n\t\tc := v.AuxInt\n\t\tif !(int32(c) == -1) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (ORLconst [c] (MOVLconst [d]))\n\t// cond:\n\t// result: (MOVLconst [c|d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = c | d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORQ x (MOVQconst [c]))\n\t// cond: is32Bit(c)\n\t// result: (ORQconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ORQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORQ (MOVQconst [c]) x)\n\t// cond: is32Bit(c)\n\t// result: (ORQconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ORQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORQ x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORQ (ORQ (ORQ (ORQ (ORQ (ORQ (ORQ x0:(MOVBload [i] {s} p mem) (SHLQconst [8] x1:(MOVBload [i+1] {s} p mem))) (SHLQconst [16] x2:(MOVBload [i+2] {s} p mem))) (SHLQconst [24] x3:(MOVBload [i+3] {s} p mem))) (SHLQconst [32] x4:(MOVBload [i+4] {s} p mem))) (SHLQconst [40] x5:(MOVBload [i+5] {s} p mem))) (SHLQconst [48] x6:(MOVBload [i+6] {s} p mem))) (SHLQconst [56] x7:(MOVBload [i+7] {s} p mem)))\n\t// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil\n\t// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVQload [i] {s} p mem)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0 := v_0.Args[0]\n\t\tif v_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0 := v_0_0.Args[0]\n\t\tif v_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0 := v_0_0_0.Args[0]\n\t\tif v_0_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_0 := v_0_0_0_0.Args[0]\n\t\tif v_0_0_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_0_0 := v_0_0_0_0_0.Args[0]\n\t\tif v_0_0_0_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tx0 := v_0_0_0_0_0_0.Args[0]\n\t\tif x0.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\ti := x0.AuxInt\n\t\ts := x0.Aux\n\t\tp := x0.Args[0]\n\t\tmem := x0.Args[1]\n\t\tv_0_0_0_0_0_0_1 := v_0_0_0_0_0_0.Args[1]\n\t\tif v_0_0_0_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_0_0_0_1.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tx1 := v_0_0_0_0_0_0_1.Args[0]\n\t\tif x1.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x1.AuxInt != i+1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x1.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_0_1 := v_0_0_0_0_0.Args[1]\n\t\tif v_0_0_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_0_0_1.AuxInt != 16 {\n\t\t\tbreak\n\t\t}\n\t\tx2 := v_0_0_0_0_0_1.Args[0]\n\t\tif x2.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x2.AuxInt != i+2 {\n\t\t\tbreak\n\t\t}\n\t\tif x2.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x2.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x2.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_1 := v_0_0_0_0.Args[1]\n\t\tif v_0_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_0_1.AuxInt != 24 {\n\t\t\tbreak\n\t\t}\n\t\tx3 := v_0_0_0_0_1.Args[0]\n\t\tif x3.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x3.AuxInt != i+3 {\n\t\t\tbreak\n\t\t}\n\t\tif x3.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x3.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x3.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_1 := v_0_0_0.Args[1]\n\t\tif v_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_1.AuxInt != 32 {\n\t\t\tbreak\n\t\t}\n\t\tx4 := v_0_0_0_1.Args[0]\n\t\tif x4.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x4.AuxInt != i+4 {\n\t\t\tbreak\n\t\t}\n\t\tif x4.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x4.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x4.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_1 := v_0_0.Args[1]\n\t\tif v_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_1.AuxInt != 40 {\n\t\t\tbreak\n\t\t}\n\t\tx5 := v_0_0_1.Args[0]\n\t\tif x5.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x5.AuxInt != i+5 {\n\t\t\tbreak\n\t\t}\n\t\tif x5.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x5.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x5.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_1 := v_0.Args[1]\n\t\tif v_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_1.AuxInt != 48 {\n\t\t\tbreak\n\t\t}\n\t\tx6 := v_0_1.Args[0]\n\t\tif x6.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x6.AuxInt != i+6 {\n\t\t\tbreak\n\t\t}\n\t\tif x6.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x6.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x6.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 56 {\n\t\t\tbreak\n\t\t}\n\t\tx7 := v_1.Args[0]\n\t\tif x7.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x7.AuxInt != i+7 {\n\t\t\tbreak\n\t\t}\n\t\tif x7.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x7.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x7.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil) {\n\t\t\tbreak\n\t\t}\n\t\tb = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQload, config.fe.TypeUInt64())\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = i\n\t\tv0.Aux = s\n\t\tv0.AddArg(p)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (ORQ (ORQ (ORQ (ORQ (ORQ (ORQ (ORQ x0:(MOVBloadidx1 [i] {s} p idx mem) (SHLQconst [8] x1:(MOVBloadidx1 [i+1] {s} p idx mem))) (SHLQconst [16] x2:(MOVBloadidx1 [i+2] {s} p idx mem))) (SHLQconst [24] x3:(MOVBloadidx1 [i+3] {s} p idx mem))) (SHLQconst [32] x4:(MOVBloadidx1 [i+4] {s} p idx mem))) (SHLQconst [40] x5:(MOVBloadidx1 [i+5] {s} p idx mem))) (SHLQconst [48] x6:(MOVBloadidx1 [i+6] {s} p idx mem))) (SHLQconst [56] x7:(MOVBloadidx1 [i+7] {s} p idx mem)))\n\t// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil\n\t// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVQloadidx1 [i] {s} p idx mem)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0 := v_0.Args[0]\n\t\tif v_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0 := v_0_0.Args[0]\n\t\tif v_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0 := v_0_0_0.Args[0]\n\t\tif v_0_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_0 := v_0_0_0_0.Args[0]\n\t\tif v_0_0_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_0_0 := v_0_0_0_0_0.Args[0]\n\t\tif v_0_0_0_0_0_0.Op != OpAMD64ORQ {\n\t\t\tbreak\n\t\t}\n\t\tx0 := v_0_0_0_0_0_0.Args[0]\n\t\tif x0.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\ti := x0.AuxInt\n\t\ts := x0.Aux\n\t\tp := x0.Args[0]\n\t\tidx := x0.Args[1]\n\t\tmem := x0.Args[2]\n\t\tv_0_0_0_0_0_0_1 := v_0_0_0_0_0_0.Args[1]\n\t\tif v_0_0_0_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_0_0_0_1.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tx1 := v_0_0_0_0_0_0_1.Args[0]\n\t\tif x1.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.AuxInt != i+1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x1.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x1.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_0_1 := v_0_0_0_0_0.Args[1]\n\t\tif v_0_0_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_0_0_1.AuxInt != 16 {\n\t\t\tbreak\n\t\t}\n\t\tx2 := v_0_0_0_0_0_1.Args[0]\n\t\tif x2.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x2.AuxInt != i+2 {\n\t\t\tbreak\n\t\t}\n\t\tif x2.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x2.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x2.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x2.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_0_1 := v_0_0_0_0.Args[1]\n\t\tif v_0_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_0_1.AuxInt != 24 {\n\t\t\tbreak\n\t\t}\n\t\tx3 := v_0_0_0_0_1.Args[0]\n\t\tif x3.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x3.AuxInt != i+3 {\n\t\t\tbreak\n\t\t}\n\t\tif x3.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x3.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x3.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x3.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_0_1 := v_0_0_0.Args[1]\n\t\tif v_0_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_0_1.AuxInt != 32 {\n\t\t\tbreak\n\t\t}\n\t\tx4 := v_0_0_0_1.Args[0]\n\t\tif x4.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x4.AuxInt != i+4 {\n\t\t\tbreak\n\t\t}\n\t\tif x4.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x4.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x4.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x4.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_0_1 := v_0_0.Args[1]\n\t\tif v_0_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_0_1.AuxInt != 40 {\n\t\t\tbreak\n\t\t}\n\t\tx5 := v_0_0_1.Args[0]\n\t\tif x5.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x5.AuxInt != i+5 {\n\t\t\tbreak\n\t\t}\n\t\tif x5.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x5.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x5.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x5.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_0_1 := v_0.Args[1]\n\t\tif v_0_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_0_1.AuxInt != 48 {\n\t\t\tbreak\n\t\t}\n\t\tx6 := v_0_1.Args[0]\n\t\tif x6.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x6.AuxInt != i+6 {\n\t\t\tbreak\n\t\t}\n\t\tif x6.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x6.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x6.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x6.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 56 {\n\t\t\tbreak\n\t\t}\n\t\tx7 := v_1.Args[0]\n\t\tif x7.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x7.AuxInt != i+7 {\n\t\t\tbreak\n\t\t}\n\t\tif x7.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x7.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x7.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x7.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tif !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil) {\n\t\t\tbreak\n\t\t}\n\t\tb = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQloadidx1, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = i\n\t\tv0.Aux = s\n\t\tv0.AddArg(p)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORQconst [0] x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORQconst [-1] _)\n\t// cond:\n\t// result: (MOVQconst [-1])\n\tfor {\n\t\tif v.AuxInt != -1 {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (ORQconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [c|d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = c | d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORW x (MOVWconst [c]))\n\t// cond:\n\t// result: (ORWconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64ORWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORW (MOVWconst [c]) x)\n\t// cond:\n\t// result: (ORWconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64ORWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORW x x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORW x0:(MOVBload [i] {s} p mem) (SHLWconst [8] x1:(MOVBload [i+1] {s} p mem)))\n\t// cond: x0.Uses == 1 && x1.Uses == 1 && mergePoint(b,x0,x1) != nil\n\t// result: @mergePoint(b,x0,x1) (MOVWload [i] {s} p mem)\n\tfor {\n\t\tx0 := v.Args[0]\n\t\tif x0.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\ti := x0.AuxInt\n\t\ts := x0.Aux\n\t\tp := x0.Args[0]\n\t\tmem := x0.Args[1]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLWconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tx1 := v_1.Args[0]\n\t\tif x1.Op != OpAMD64MOVBload {\n\t\t\tbreak\n\t\t}\n\t\tif x1.AuxInt != i+1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x1.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif !(x0.Uses == 1 && x1.Uses == 1 && mergePoint(b, x0, x1) != nil) {\n\t\t\tbreak\n\t\t}\n\t\tb = mergePoint(b, x0, x1)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWload, config.fe.TypeUInt16())\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = i\n\t\tv0.Aux = s\n\t\tv0.AddArg(p)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (ORW x0:(MOVBloadidx1 [i] {s} p idx mem) (SHLWconst [8] x1:(MOVBloadidx1 [i+1] {s} p idx mem)))\n\t// cond: x0.Uses == 1 && x1.Uses == 1 && mergePoint(b,x0,x1) != nil\n\t// result: @mergePoint(b,x0,x1) (MOVWloadidx1 [i] {s} p idx mem)\n\tfor {\n\t\tx0 := v.Args[0]\n\t\tif x0.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\ti := x0.AuxInt\n\t\ts := x0.Aux\n\t\tp := x0.Args[0]\n\t\tidx := x0.Args[1]\n\t\tmem := x0.Args[2]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64SHLWconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tx1 := v_1.Args[0]\n\t\tif x1.Op != OpAMD64MOVBloadidx1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.AuxInt != i+1 {\n\t\t\tbreak\n\t\t}\n\t\tif x1.Aux != s {\n\t\t\tbreak\n\t\t}\n\t\tif p != x1.Args[0] {\n\t\t\tbreak\n\t\t}\n\t\tif idx != x1.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tif mem != x1.Args[2] {\n\t\t\tbreak\n\t\t}\n\t\tif !(x0.Uses == 1 && x1.Uses == 1 && mergePoint(b, x0, x1) != nil) {\n\t\t\tbreak\n\t\t}\n\t\tb = mergePoint(b, x0, x1)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWloadidx1, v.Type)\n\t\tv.reset(OpCopy)\n\t\tv.AddArg(v0)\n\t\tv0.AuxInt = i\n\t\tv0.Aux = s\n\t\tv0.AddArg(p)\n\t\tv0.AddArg(idx)\n\t\tv0.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64ORWconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ORWconst [c] x)\n\t// cond: int16(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int16(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (ORWconst [c] _)\n\t// cond: int16(c)==-1\n\t// result: (MOVWconst [-1])\n\tfor {\n\t\tc := v.AuxInt\n\t\tif !(int16(c) == -1) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (ORWconst [c] (MOVWconst [d]))\n\t// cond:\n\t// result: (MOVWconst [c|d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = c | d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpOffPtr(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (OffPtr [off] ptr)\n\t// cond: is32Bit(off)\n\t// result: (ADDQconst [off] ptr)\n\tfor {\n\t\toff := v.AuxInt\n\t\tptr := v.Args[0]\n\t\tif !(is32Bit(off)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ADDQconst)\n\t\tv.AuxInt = off\n\t\tv.AddArg(ptr)\n\t\treturn true\n\t}\n\t// match: (OffPtr [off] ptr)\n\t// cond:\n\t// result: (ADDQ (MOVQconst [off]) ptr)\n\tfor {\n\t\toff := v.AuxInt\n\t\tptr := v.Args[0]\n\t\tv.reset(OpAMD64ADDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQconst, config.fe.TypeUInt64())\n\t\tv0.AuxInt = off\n\t\tv.AddArg(v0)\n\t\tv.AddArg(ptr)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpOr16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Or16 x y)\n\t// cond:\n\t// result: (ORW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ORW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpOr32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Or32 x y)\n\t// cond:\n\t// result: (ORL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ORL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpOr64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Or64 x y)\n\t// cond:\n\t// result: (ORQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ORQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpOr8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Or8 x y)\n\t// cond:\n\t// result: (ORB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ORB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16Ux16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16Ux16 x y)\n\t// cond:\n\t// result: (ANDW (SHRW x y) (SBBLcarrymask (CMPWconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16Ux32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16Ux32 x y)\n\t// cond:\n\t// result: (ANDW (SHRW x y) (SBBLcarrymask (CMPLconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16Ux64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16Ux64 x y)\n\t// cond:\n\t// result: (ANDW (SHRW x y) (SBBLcarrymask (CMPQconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16Ux8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16Ux8 x y)\n\t// cond:\n\t// result: (ANDW (SHRW x y) (SBBLcarrymask (CMPBconst y [16])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRW, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 16\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16x16 x y)\n\t// cond:\n\t// result: (SARW x (ORW y (NOTL (SBBLcarrymask (CMPWconst y [16])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARW)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORW, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 16\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16x32 x y)\n\t// cond:\n\t// result: (SARW x (ORL y (NOTL (SBBLcarrymask (CMPLconst y [16])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARW)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORL, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 16\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16x64 x y)\n\t// cond:\n\t// result: (SARW x (ORQ y (NOTQ (SBBQcarrymask (CMPQconst y [16])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARW)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORQ, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTQ, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 16\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh16x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh16x8 x y)\n\t// cond:\n\t// result: (SARW x (ORB y (NOTL (SBBLcarrymask (CMPBconst y [16])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARW)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORB, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 16\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32Ux16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32Ux16 x y)\n\t// cond:\n\t// result: (ANDL (SHRL x y) (SBBLcarrymask (CMPWconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32Ux32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32Ux32 x y)\n\t// cond:\n\t// result: (ANDL (SHRL x y) (SBBLcarrymask (CMPLconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32Ux64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32Ux64 x y)\n\t// cond:\n\t// result: (ANDL (SHRL x y) (SBBLcarrymask (CMPQconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32Ux8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32Ux8 x y)\n\t// cond:\n\t// result: (ANDL (SHRL x y) (SBBLcarrymask (CMPBconst y [32])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRL, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 32\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32x16 x y)\n\t// cond:\n\t// result: (SARL x (ORW y (NOTL (SBBLcarrymask (CMPWconst y [32])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARL)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORW, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 32\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32x32 x y)\n\t// cond:\n\t// result: (SARL x (ORL y (NOTL (SBBLcarrymask (CMPLconst y [32])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARL)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORL, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 32\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32x64 x y)\n\t// cond:\n\t// result: (SARL x (ORQ y (NOTQ (SBBQcarrymask (CMPQconst y [32])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARL)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORQ, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTQ, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 32\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh32x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh32x8 x y)\n\t// cond:\n\t// result: (SARL x (ORB y (NOTL (SBBLcarrymask (CMPBconst y [32])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARL)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORB, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 32\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64Ux16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64Ux16 x y)\n\t// cond:\n\t// result: (ANDQ (SHRQ x y) (SBBQcarrymask (CMPWconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64Ux32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64Ux32 x y)\n\t// cond:\n\t// result: (ANDQ (SHRQ x y) (SBBQcarrymask (CMPLconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64Ux64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64Ux64 x y)\n\t// cond:\n\t// result: (ANDQ (SHRQ x y) (SBBQcarrymask (CMPQconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64Ux8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64Ux8 x y)\n\t// cond:\n\t// result: (ANDQ (SHRQ x y) (SBBQcarrymask (CMPBconst y [64])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRQ, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 64\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64x16 x y)\n\t// cond:\n\t// result: (SARQ x (ORW y (NOTL (SBBLcarrymask (CMPWconst y [64])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARQ)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORW, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 64\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64x32 x y)\n\t// cond:\n\t// result: (SARQ x (ORL y (NOTL (SBBLcarrymask (CMPLconst y [64])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARQ)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORL, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 64\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64x64 x y)\n\t// cond:\n\t// result: (SARQ x (ORQ y (NOTQ (SBBQcarrymask (CMPQconst y [64])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARQ)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORQ, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTQ, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 64\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh64x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh64x8 x y)\n\t// cond:\n\t// result: (SARQ x (ORB y (NOTL (SBBLcarrymask (CMPBconst y [64])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARQ)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORB, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 64\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8Ux16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8Ux16 x y)\n\t// cond:\n\t// result: (ANDB (SHRB x y) (SBBLcarrymask (CMPWconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8Ux32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8Ux32 x y)\n\t// cond:\n\t// result: (ANDB (SHRB x y) (SBBLcarrymask (CMPLconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8Ux64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8Ux64 x y)\n\t// cond:\n\t// result: (ANDB (SHRB x y) (SBBLcarrymask (CMPQconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8Ux8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8Ux8 x y)\n\t// cond:\n\t// result: (ANDB (SHRB x y) (SBBLcarrymask (CMPBconst y [8])))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64ANDB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SHRB, t)\n\t\tv0.AddArg(x)\n\t\tv0.AddArg(y)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, t)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv2.AddArg(y)\n\t\tv2.AuxInt = 8\n\t\tv1.AddArg(v2)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8x16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8x16 x y)\n\t// cond:\n\t// result: (SARB x (ORW y (NOTL (SBBLcarrymask (CMPWconst y [8])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARB)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORW, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 8\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8x32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8x32 x y)\n\t// cond:\n\t// result: (SARB x (ORL y (NOTL (SBBLcarrymask (CMPLconst y [8])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARB)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORL, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 8\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8x64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8x64 x y)\n\t// cond:\n\t// result: (SARB x (ORQ y (NOTQ (SBBQcarrymask (CMPQconst y [8])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARB)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORQ, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTQ, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 8\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpRsh8x8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Rsh8x8 x y)\n\t// cond:\n\t// result: (SARB x (ORB y (NOTL (SBBLcarrymask (CMPBconst y [8])))))\n\tfor {\n\t\tt := v.Type\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SARB)\n\t\tv.Type = t\n\t\tv.AddArg(x)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ORB, y.Type)\n\t\tv0.AddArg(y)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64NOTL, y.Type)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, y.Type)\n\t\tv3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeFlags)\n\t\tv3.AddArg(y)\n\t\tv3.AuxInt = 8\n\t\tv2.AddArg(v3)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARB x (MOVQconst [c]))\n\t// cond:\n\t// result: (SARBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARB x (MOVLconst [c]))\n\t// cond:\n\t// result: (SARBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARB x (MOVWconst [c]))\n\t// cond:\n\t// result: (SARBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARB x (MOVBconst [c]))\n\t// cond:\n\t// result: (SARBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARB x (ANDBconst [31] y))\n\t// cond:\n\t// result: (SARB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SARB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARBconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [d>>uint64(c)])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = d >> uint64(c)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARL x (MOVQconst [c]))\n\t// cond:\n\t// result: (SARLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARL x (MOVLconst [c]))\n\t// cond:\n\t// result: (SARLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARL x (MOVWconst [c]))\n\t// cond:\n\t// result: (SARLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARL x (MOVBconst [c]))\n\t// cond:\n\t// result: (SARLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARL x (ANDLconst [31] y))\n\t// cond:\n\t// result: (SARL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SARL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARLconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [d>>uint64(c)])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = d >> uint64(c)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARQ x (MOVQconst [c]))\n\t// cond:\n\t// result: (SARQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARQ x (MOVLconst [c]))\n\t// cond:\n\t// result: (SARQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARQ x (MOVWconst [c]))\n\t// cond:\n\t// result: (SARQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARQ x (MOVBconst [c]))\n\t// cond:\n\t// result: (SARQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARQ x (ANDQconst [63] y))\n\t// cond:\n\t// result: (SARQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 63 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SARQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARQconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [d>>uint64(c)])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = d >> uint64(c)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARW x (MOVQconst [c]))\n\t// cond:\n\t// result: (SARWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARW x (MOVLconst [c]))\n\t// cond:\n\t// result: (SARWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARW x (MOVWconst [c]))\n\t// cond:\n\t// result: (SARWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARW x (MOVBconst [c]))\n\t// cond:\n\t// result: (SARWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SARWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SARW x (ANDWconst [31] y))\n\t// cond:\n\t// result: (SARW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SARW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SARWconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SARWconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [d>>uint64(c)])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = d >> uint64(c)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SBBLcarrymask(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SBBLcarrymask (FlagEQ))\n\t// cond:\n\t// result: (MOVLconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SBBLcarrymask (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVLconst [-1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (SBBLcarrymask (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVLconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SBBLcarrymask (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVLconst [-1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (SBBLcarrymask (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVLconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SBBQcarrymask(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SBBQcarrymask (FlagEQ))\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SBBQcarrymask (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVQconst [-1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (SBBQcarrymask (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SBBQcarrymask (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVQconst [-1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = -1\n\t\treturn true\n\t}\n\t// match: (SBBQcarrymask (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETA(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETA (InvertFlags x))\n\t// cond:\n\t// result: (SETB x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETB)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETA (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETA (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETA (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETA (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETA (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETAE(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETAE (InvertFlags x))\n\t// cond:\n\t// result: (SETBE x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETBE)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETAE (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETAE (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETAE (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETAE (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETAE (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETB (InvertFlags x))\n\t// cond:\n\t// result: (SETA x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETA)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETB (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETB (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETB (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETB (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETB (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETBE(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETBE (InvertFlags x))\n\t// cond:\n\t// result: (SETAE x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETAE)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETBE (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETBE (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETBE (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETBE (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETBE (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETEQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETEQ (InvertFlags x))\n\t// cond:\n\t// result: (SETEQ x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETEQ)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETEQ (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETEQ (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETEQ (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETEQ (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETEQ (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETG(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETG (InvertFlags x))\n\t// cond:\n\t// result: (SETL x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETL)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETG (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETG (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETG (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETG (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETG (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETGE(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETGE (InvertFlags x))\n\t// cond:\n\t// result: (SETLE x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETLE)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETGE (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETGE (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETGE (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETGE (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETGE (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETL (InvertFlags x))\n\t// cond:\n\t// result: (SETG x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETG)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETL (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETL (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETL (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETL (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETL (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETLE(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETLE (InvertFlags x))\n\t// cond:\n\t// result: (SETGE x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETGE)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETLE (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETLE (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETLE (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETLE (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETLE (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SETNE(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SETNE (InvertFlags x))\n\t// cond:\n\t// result: (SETNE x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64InvertFlags {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\tv.reset(OpAMD64SETNE)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SETNE (FlagEQ))\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagEQ {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\t// match: (SETNE (FlagLT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETNE (FlagLT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagLT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETNE (FlagGT_ULT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_ULT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\t// match: (SETNE (FlagGT_UGT))\n\t// cond:\n\t// result: (MOVBconst [1])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64FlagGT_UGT {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 1\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHLB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHLB x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHLBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLB x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHLBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLB x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHLBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLB x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHLBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLB x (ANDBconst [31] y))\n\t// cond:\n\t// result: (SHLB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHLB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHLL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHLL x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHLLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLL x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHLLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLL x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHLLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLL x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHLLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLL x (ANDLconst [31] y))\n\t// cond:\n\t// result: (SHLL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHLL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHLQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHLQ x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHLQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLQ x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHLQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLQ x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHLQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLQ x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHLQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLQ x (ANDQconst [63] y))\n\t// cond:\n\t// result: (SHLQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 63 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHLQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHLW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHLW x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHLWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLW x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHLWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLW x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHLWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLW x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHLWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHLWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHLW x (ANDWconst [31] y))\n\t// cond:\n\t// result: (SHLW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHLW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHRB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHRB x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHRBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRB x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHRBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRB x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHRBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRB x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHRBconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRBconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRB x (ANDBconst [31] y))\n\t// cond:\n\t// result: (SHRB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDBconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHRB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHRL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHRL x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHRLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRL x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHRLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRL x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHRLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRL x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHRLconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRLconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRL x (ANDLconst [31] y))\n\t// cond:\n\t// result: (SHRL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDLconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHRL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHRQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHRQ x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHRQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRQ x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHRQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRQ x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHRQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRQ x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHRQconst [c&63] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRQconst)\n\t\tv.AuxInt = c & 63\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRQ x (ANDQconst [63] y))\n\t// cond:\n\t// result: (SHRQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDQconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 63 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHRQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SHRW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SHRW x (MOVQconst [c]))\n\t// cond:\n\t// result: (SHRWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRW x (MOVLconst [c]))\n\t// cond:\n\t// result: (SHRWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRW x (MOVWconst [c]))\n\t// cond:\n\t// result: (SHRWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRW x (MOVBconst [c]))\n\t// cond:\n\t// result: (SHRWconst [c&31] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SHRWconst)\n\t\tv.AuxInt = c & 31\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SHRW x (ANDWconst [31] y))\n\t// cond:\n\t// result: (SHRW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64ANDWconst {\n\t\t\tbreak\n\t\t}\n\t\tif v_1.AuxInt != 31 {\n\t\t\tbreak\n\t\t}\n\t\ty := v_1.Args[0]\n\t\tv.reset(OpAMD64SHRW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBB x (MOVBconst [c]))\n\t// cond:\n\t// result: (SUBBconst x [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SUBBconst)\n\t\tv.AddArg(x)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (SUBB (MOVBconst [c]) x)\n\t// cond:\n\t// result: (NEGB (SUBBconst x [c]))\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64NEGB)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SUBBconst, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AuxInt = c\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (SUBB x x)\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBBconst [c] x)\n\t// cond: int8(c) == 0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int8(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBBconst [c] x)\n\t// cond:\n\t// result: (ADDBconst [int64(int8(-c))] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64ADDBconst)\n\t\tv.AuxInt = int64(int8(-c))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBBconst (MOVBconst [d]) [c])\n\t// cond:\n\t// result: (MOVBconst [int64(int8(d-c))])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = int64(int8(d - c))\n\t\treturn true\n\t}\n\t// match: (SUBBconst (SUBBconst x [d]) [c])\n\t// cond:\n\t// result: (ADDBconst [int64(int8(-c-d))] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64SUBBconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64ADDBconst)\n\t\tv.AuxInt = int64(int8(-c - d))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBL x (MOVLconst [c]))\n\t// cond:\n\t// result: (SUBLconst x [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SUBLconst)\n\t\tv.AddArg(x)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (SUBL (MOVLconst [c]) x)\n\t// cond:\n\t// result: (NEGL (SUBLconst x [c]))\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64NEGL)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SUBLconst, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AuxInt = c\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (SUBL x x)\n\t// cond:\n\t// result: (MOVLconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBLconst [c] x)\n\t// cond: int32(c) == 0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int32(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBLconst [c] x)\n\t// cond:\n\t// result: (ADDLconst [int64(int32(-c))] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64ADDLconst)\n\t\tv.AuxInt = int64(int32(-c))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBLconst (MOVLconst [d]) [c])\n\t// cond:\n\t// result: (MOVLconst [int64(int32(d-c))])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = int64(int32(d - c))\n\t\treturn true\n\t}\n\t// match: (SUBLconst (SUBLconst x [d]) [c])\n\t// cond:\n\t// result: (ADDLconst [int64(int32(-c-d))] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64SUBLconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64ADDLconst)\n\t\tv.AuxInt = int64(int32(-c - d))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBQ x (MOVQconst [c]))\n\t// cond: is32Bit(c)\n\t// result: (SUBQconst x [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64SUBQconst)\n\t\tv.AddArg(x)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (SUBQ (MOVQconst [c]) x)\n\t// cond: is32Bit(c)\n\t// result: (NEGQ (SUBQconst x [c]))\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64NEGQ)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SUBQconst, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AuxInt = c\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (SUBQ x x)\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBQconst [0] x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBQconst [c] x)\n\t// cond: c != -(1<<31)\n\t// result: (ADDQconst [-c] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(c != -(1 << 31)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ADDQconst)\n\t\tv.AuxInt = -c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBQconst (MOVQconst [d]) [c])\n\t// cond:\n\t// result: (MOVQconst [d-c])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = d - c\n\t\treturn true\n\t}\n\t// match: (SUBQconst (SUBQconst x [d]) [c])\n\t// cond: is32Bit(-c-d)\n\t// result: (ADDQconst [-c-d] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64SUBQconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tif !(is32Bit(-c - d)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64ADDQconst)\n\t\tv.AuxInt = -c - d\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBW x (MOVWconst [c]))\n\t// cond:\n\t// result: (SUBWconst x [c])\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64SUBWconst)\n\t\tv.AddArg(x)\n\t\tv.AuxInt = c\n\t\treturn true\n\t}\n\t// match: (SUBW (MOVWconst [c]) x)\n\t// cond:\n\t// result: (NEGW (SUBWconst x [c]))\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64NEGW)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64SUBWconst, v.Type)\n\t\tv0.AddArg(x)\n\t\tv0.AuxInt = c\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (SUBW x x)\n\t// cond:\n\t// result: (MOVWconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64SUBWconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SUBWconst [c] x)\n\t// cond: int16(c) == 0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int16(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBWconst [c] x)\n\t// cond:\n\t// result: (ADDWconst [int64(int16(-c))] x)\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64ADDWconst)\n\t\tv.AuxInt = int64(int16(-c))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (SUBWconst (MOVWconst [d]) [c])\n\t// cond:\n\t// result: (MOVWconst [int64(int16(d-c))])\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = int64(int16(d - c))\n\t\treturn true\n\t}\n\t// match: (SUBWconst (SUBWconst x [d]) [c])\n\t// cond:\n\t// result: (ADDWconst [int64(int16(-c-d))] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64SUBWconst {\n\t\t\tbreak\n\t\t}\n\t\tx := v_0.Args[0]\n\t\td := v_0.AuxInt\n\t\tc := v.AuxInt\n\t\tv.reset(OpAMD64ADDWconst)\n\t\tv.AuxInt = int64(int16(-c - d))\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSignExt16to32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SignExt16to32 x)\n\t// cond:\n\t// result: (MOVWQSX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVWQSX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSignExt16to64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SignExt16to64 x)\n\t// cond:\n\t// result: (MOVWQSX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVWQSX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSignExt32to64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SignExt32to64 x)\n\t// cond:\n\t// result: (MOVLQSX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVLQSX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSignExt8to16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SignExt8to16 x)\n\t// cond:\n\t// result: (MOVBQSX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVBQSX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSignExt8to32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SignExt8to32 x)\n\t// cond:\n\t// result: (MOVBQSX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVBQSX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSignExt8to64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SignExt8to64 x)\n\t// cond:\n\t// result: (MOVBQSX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVBQSX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSqrt(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Sqrt x)\n\t// cond:\n\t// result: (SQRTSD x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64SQRTSD)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpStaticCall(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (StaticCall [argwid] {target} mem)\n\t// cond:\n\t// result: (CALLstatic [argwid] {target} mem)\n\tfor {\n\t\targwid := v.AuxInt\n\t\ttarget := v.Aux\n\t\tmem := v.Args[0]\n\t\tv.reset(OpAMD64CALLstatic)\n\t\tv.AuxInt = argwid\n\t\tv.Aux = target\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpStore(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Store [8] ptr val mem)\n\t// cond: is64BitFloat(val.Type)\n\t// result: (MOVSDstore ptr val mem)\n\tfor {\n\t\tif v.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tptr := v.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is64BitFloat(val.Type)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSDstore)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Store [4] ptr val mem)\n\t// cond: is32BitFloat(val.Type)\n\t// result: (MOVSSstore ptr val mem)\n\tfor {\n\t\tif v.AuxInt != 4 {\n\t\t\tbreak\n\t\t}\n\t\tptr := v.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tif !(is32BitFloat(val.Type)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVSSstore)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Store [8] ptr val mem)\n\t// cond:\n\t// result: (MOVQstore ptr val mem)\n\tfor {\n\t\tif v.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tptr := v.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVQstore)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Store [4] ptr val mem)\n\t// cond:\n\t// result: (MOVLstore ptr val mem)\n\tfor {\n\t\tif v.AuxInt != 4 {\n\t\t\tbreak\n\t\t}\n\t\tptr := v.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVLstore)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Store [2] ptr val mem)\n\t// cond:\n\t// result: (MOVWstore ptr val mem)\n\tfor {\n\t\tif v.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\tptr := v.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVWstore)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Store [1] ptr val mem)\n\t// cond:\n\t// result: (MOVBstore ptr val mem)\n\tfor {\n\t\tif v.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tptr := v.Args[0]\n\t\tval := v.Args[1]\n\t\tmem := v.Args[2]\n\t\tv.reset(OpAMD64MOVBstore)\n\t\tv.AddArg(ptr)\n\t\tv.AddArg(val)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSub16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Sub16 x y)\n\t// cond:\n\t// result: (SUBW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SUBW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSub32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Sub32 x y)\n\t// cond:\n\t// result: (SUBL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SUBL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSub32F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Sub32F x y)\n\t// cond:\n\t// result: (SUBSS x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SUBSS)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSub64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Sub64 x y)\n\t// cond:\n\t// result: (SUBQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SUBQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSub64F(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Sub64F x y)\n\t// cond:\n\t// result: (SUBSD x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SUBSD)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSub8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Sub8 x y)\n\t// cond:\n\t// result: (SUBB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SUBB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpSubPtr(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (SubPtr x y)\n\t// cond:\n\t// result: (SUBQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64SUBQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpTrunc16to8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Trunc16to8 x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpTrunc32to16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Trunc32to16 x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpTrunc32to8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Trunc32to8 x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpTrunc64to16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Trunc64to16 x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpTrunc64to32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Trunc64to32 x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpTrunc64to8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Trunc64to8 x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORB(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORB x (MOVBconst [c]))\n\t// cond:\n\t// result: (XORBconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64XORBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORB (MOVBconst [c]) x)\n\t// cond:\n\t// result: (XORBconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64XORBconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORB x x)\n\t// cond:\n\t// result: (MOVBconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORBconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORBconst [c] x)\n\t// cond: int8(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int8(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORBconst [c] (MOVBconst [d]))\n\t// cond:\n\t// result: (MOVBconst [c^d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVBconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVBconst)\n\t\tv.AuxInt = c ^ d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORL(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORL x (MOVLconst [c]))\n\t// cond:\n\t// result: (XORLconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64XORLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORL (MOVLconst [c]) x)\n\t// cond:\n\t// result: (XORLconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64XORLconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORL x x)\n\t// cond:\n\t// result: (MOVLconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORLconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORLconst [c] x)\n\t// cond: int32(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int32(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORLconst [c] (MOVLconst [d]))\n\t// cond:\n\t// result: (MOVLconst [c^d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVLconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVLconst)\n\t\tv.AuxInt = c ^ d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORQ(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORQ x (MOVQconst [c]))\n\t// cond: is32Bit(c)\n\t// result: (XORQconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64XORQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORQ (MOVQconst [c]) x)\n\t// cond: is32Bit(c)\n\t// result: (XORQconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tif !(is32Bit(c)) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64XORQconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORQ x x)\n\t// cond:\n\t// result: (MOVQconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORQconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORQconst [0] x)\n\t// cond:\n\t// result: x\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tx := v.Args[0]\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORQconst [c] (MOVQconst [d]))\n\t// cond:\n\t// result: (MOVQconst [c^d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVQconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVQconst)\n\t\tv.AuxInt = c ^ d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORW(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORW x (MOVWconst [c]))\n\t// cond:\n\t// result: (XORWconst [c] x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv_1 := v.Args[1]\n\t\tif v_1.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_1.AuxInt\n\t\tv.reset(OpAMD64XORWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORW (MOVWconst [c]) x)\n\t// cond:\n\t// result: (XORWconst [c] x)\n\tfor {\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\tc := v_0.AuxInt\n\t\tx := v.Args[1]\n\t\tv.reset(OpAMD64XORWconst)\n\t\tv.AuxInt = c\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORW x x)\n\t// cond:\n\t// result: (MOVWconst [0])\n\tfor {\n\t\tx := v.Args[0]\n\t\tif x != v.Args[1] {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = 0\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpAMD64XORWconst(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (XORWconst [c] x)\n\t// cond: int16(c)==0\n\t// result: x\n\tfor {\n\t\tc := v.AuxInt\n\t\tx := v.Args[0]\n\t\tif !(int16(c) == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpCopy)\n\t\tv.Type = x.Type\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\t// match: (XORWconst [c] (MOVWconst [d]))\n\t// cond:\n\t// result: (MOVWconst [c^d])\n\tfor {\n\t\tc := v.AuxInt\n\t\tv_0 := v.Args[0]\n\t\tif v_0.Op != OpAMD64MOVWconst {\n\t\t\tbreak\n\t\t}\n\t\td := v_0.AuxInt\n\t\tv.reset(OpAMD64MOVWconst)\n\t\tv.AuxInt = c ^ d\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpXor16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Xor16 x y)\n\t// cond:\n\t// result: (XORW x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64XORW)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpXor32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Xor32 x y)\n\t// cond:\n\t// result: (XORL x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64XORL)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpXor64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Xor64 x y)\n\t// cond:\n\t// result: (XORQ x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64XORQ)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpXor8(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Xor8 x y)\n\t// cond:\n\t// result: (XORB x y)\n\tfor {\n\t\tx := v.Args[0]\n\t\ty := v.Args[1]\n\t\tv.reset(OpAMD64XORB)\n\t\tv.AddArg(x)\n\t\tv.AddArg(y)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpZero(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (Zero [0] _ mem)\n\t// cond:\n\t// result: mem\n\tfor {\n\t\tif v.AuxInt != 0 {\n\t\t\tbreak\n\t\t}\n\t\tmem := v.Args[1]\n\t\tv.reset(OpCopy)\n\t\tv.Type = mem.Type\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Zero [1] destptr mem)\n\t// cond:\n\t// result: (MOVBstoreconst [0] destptr mem)\n\tfor {\n\t\tif v.AuxInt != 1 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVBstoreconst)\n\t\tv.AuxInt = 0\n\t\tv.AddArg(destptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Zero [2] destptr mem)\n\t// cond:\n\t// result: (MOVWstoreconst [0] destptr mem)\n\tfor {\n\t\tif v.AuxInt != 2 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVWstoreconst)\n\t\tv.AuxInt = 0\n\t\tv.AddArg(destptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Zero [4] destptr mem)\n\t// cond:\n\t// result: (MOVLstoreconst [0] destptr mem)\n\tfor {\n\t\tif v.AuxInt != 4 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVLstoreconst)\n\t\tv.AuxInt = 0\n\t\tv.AddArg(destptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Zero [8] destptr mem)\n\t// cond:\n\t// result: (MOVQstoreconst [0] destptr mem)\n\tfor {\n\t\tif v.AuxInt != 8 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVQstoreconst)\n\t\tv.AuxInt = 0\n\t\tv.AddArg(destptr)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Zero [3] destptr mem)\n\t// cond:\n\t// result: (MOVBstoreconst [makeValAndOff(0,2)] destptr \t\t(MOVWstoreconst [0] destptr mem))\n\tfor {\n\t\tif v.AuxInt != 3 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVBstoreconst)\n\t\tv.AuxInt = makeValAndOff(0, 2)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVWstoreconst, TypeMem)\n\t\tv0.AuxInt = 0\n\t\tv0.AddArg(destptr)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (Zero [5] destptr mem)\n\t// cond:\n\t// result: (MOVBstoreconst [makeValAndOff(0,4)] destptr \t\t(MOVLstoreconst [0] destptr mem))\n\tfor {\n\t\tif v.AuxInt != 5 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVBstoreconst)\n\t\tv.AuxInt = makeValAndOff(0, 4)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLstoreconst, TypeMem)\n\t\tv0.AuxInt = 0\n\t\tv0.AddArg(destptr)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (Zero [6] destptr mem)\n\t// cond:\n\t// result: (MOVWstoreconst [makeValAndOff(0,4)] destptr \t\t(MOVLstoreconst [0] destptr mem))\n\tfor {\n\t\tif v.AuxInt != 6 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVWstoreconst)\n\t\tv.AuxInt = makeValAndOff(0, 4)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLstoreconst, TypeMem)\n\t\tv0.AuxInt = 0\n\t\tv0.AddArg(destptr)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (Zero [7] destptr mem)\n\t// cond:\n\t// result: (MOVLstoreconst [makeValAndOff(0,3)] destptr \t\t(MOVLstoreconst [0] destptr mem))\n\tfor {\n\t\tif v.AuxInt != 7 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVLstoreconst)\n\t\tv.AuxInt = makeValAndOff(0, 3)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVLstoreconst, TypeMem)\n\t\tv0.AuxInt = 0\n\t\tv0.AddArg(destptr)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (Zero [size] destptr mem)\n\t// cond: size%8 != 0 && size > 8\n\t// result: (Zero [size-size%8] (ADDQconst destptr [size%8]) \t\t(MOVQstoreconst [0] destptr mem))\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(size%8 != 0 && size > 8) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpZero)\n\t\tv.AuxInt = size - size%8\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ADDQconst, config.fe.TypeUInt64())\n\t\tv0.AddArg(destptr)\n\t\tv0.AuxInt = size % 8\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeMem)\n\t\tv1.AuxInt = 0\n\t\tv1.AddArg(destptr)\n\t\tv1.AddArg(mem)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\t// match: (Zero [16] destptr mem)\n\t// cond:\n\t// result: (MOVQstoreconst [makeValAndOff(0,8)] destptr \t\t(MOVQstoreconst [0] destptr mem))\n\tfor {\n\t\tif v.AuxInt != 16 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVQstoreconst)\n\t\tv.AuxInt = makeValAndOff(0, 8)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeMem)\n\t\tv0.AuxInt = 0\n\t\tv0.AddArg(destptr)\n\t\tv0.AddArg(mem)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (Zero [24] destptr mem)\n\t// cond:\n\t// result: (MOVQstoreconst [makeValAndOff(0,16)] destptr \t\t(MOVQstoreconst [makeValAndOff(0,8)] destptr \t\t\t(MOVQstoreconst [0] destptr mem)))\n\tfor {\n\t\tif v.AuxInt != 24 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVQstoreconst)\n\t\tv.AuxInt = makeValAndOff(0, 16)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeMem)\n\t\tv0.AuxInt = makeValAndOff(0, 8)\n\t\tv0.AddArg(destptr)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeMem)\n\t\tv1.AuxInt = 0\n\t\tv1.AddArg(destptr)\n\t\tv1.AddArg(mem)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (Zero [32] destptr mem)\n\t// cond:\n\t// result: (MOVQstoreconst [makeValAndOff(0,24)] destptr \t\t(MOVQstoreconst [makeValAndOff(0,16)] destptr \t\t\t(MOVQstoreconst [makeValAndOff(0,8)] destptr \t\t\t\t(MOVQstoreconst [0] destptr mem))))\n\tfor {\n\t\tif v.AuxInt != 32 {\n\t\t\tbreak\n\t\t}\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tv.reset(OpAMD64MOVQstoreconst)\n\t\tv.AuxInt = makeValAndOff(0, 24)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeMem)\n\t\tv0.AuxInt = makeValAndOff(0, 16)\n\t\tv0.AddArg(destptr)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeMem)\n\t\tv1.AuxInt = makeValAndOff(0, 8)\n\t\tv1.AddArg(destptr)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeMem)\n\t\tv2.AuxInt = 0\n\t\tv2.AddArg(destptr)\n\t\tv2.AddArg(mem)\n\t\tv1.AddArg(v2)\n\t\tv0.AddArg(v1)\n\t\tv.AddArg(v0)\n\t\treturn true\n\t}\n\t// match: (Zero [size] destptr mem)\n\t// cond: size <= 1024 && size%8 == 0 && size%16 != 0 && !config.noDuffDevice\n\t// result: (Zero [size-8] (ADDQconst [8] destptr) (MOVQstore destptr (MOVQconst [0]) mem))\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(size <= 1024 && size%8 == 0 && size%16 != 0 && !config.noDuffDevice) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpZero)\n\t\tv.AuxInt = size - 8\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ADDQconst, config.fe.TypeUInt64())\n\t\tv0.AuxInt = 8\n\t\tv0.AddArg(destptr)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeMem)\n\t\tv1.AddArg(destptr)\n\t\tv2 := b.NewValue0(v.Line, OpAMD64MOVQconst, config.fe.TypeUInt64())\n\t\tv2.AuxInt = 0\n\t\tv1.AddArg(v2)\n\t\tv1.AddArg(mem)\n\t\tv.AddArg(v1)\n\t\treturn true\n\t}\n\t// match: (Zero [size] destptr mem)\n\t// cond: size <= 1024 && size%16 == 0 && !config.noDuffDevice\n\t// result: (DUFFZERO [duffStart(size)] (ADDQconst [duffAdj(size)] destptr) (MOVOconst [0]) mem)\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !(size <= 1024 && size%16 == 0 && !config.noDuffDevice) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64DUFFZERO)\n\t\tv.AuxInt = duffStart(size)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64ADDQconst, config.fe.TypeUInt64())\n\t\tv0.AuxInt = duffAdj(size)\n\t\tv0.AddArg(destptr)\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVOconst, TypeInt128)\n\t\tv1.AuxInt = 0\n\t\tv.AddArg(v1)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\t// match: (Zero [size] destptr mem)\n\t// cond: (size > 1024 || (config.noDuffDevice && size > 32)) && size%8 == 0\n\t// result: (REPSTOSQ destptr (MOVQconst [size/8]) (MOVQconst [0]) mem)\n\tfor {\n\t\tsize := v.AuxInt\n\t\tdestptr := v.Args[0]\n\t\tmem := v.Args[1]\n\t\tif !((size > 1024 || (config.noDuffDevice && size > 32)) && size%8 == 0) {\n\t\t\tbreak\n\t\t}\n\t\tv.reset(OpAMD64REPSTOSQ)\n\t\tv.AddArg(destptr)\n\t\tv0 := b.NewValue0(v.Line, OpAMD64MOVQconst, config.fe.TypeUInt64())\n\t\tv0.AuxInt = size / 8\n\t\tv.AddArg(v0)\n\t\tv1 := b.NewValue0(v.Line, OpAMD64MOVQconst, config.fe.TypeUInt64())\n\t\tv1.AuxInt = 0\n\t\tv.AddArg(v1)\n\t\tv.AddArg(mem)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpZeroExt16to32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ZeroExt16to32 x)\n\t// cond:\n\t// result: (MOVWQZX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVWQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpZeroExt16to64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ZeroExt16to64 x)\n\t// cond:\n\t// result: (MOVWQZX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVWQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpZeroExt32to64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ZeroExt32to64 x)\n\t// cond:\n\t// result: (MOVLQZX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVLQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpZeroExt8to16(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ZeroExt8to16 x)\n\t// cond:\n\t// result: (MOVBQZX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVBQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpZeroExt8to32(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ZeroExt8to32 x)\n\t// cond:\n\t// result: (MOVBQZX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVBQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteValueAMD64_OpZeroExt8to64(v *Value, config *Config) bool {\n\tb := v.Block\n\t_ = b\n\t// match: (ZeroExt8to64 x)\n\t// cond:\n\t// result: (MOVBQZX x)\n\tfor {\n\t\tx := v.Args[0]\n\t\tv.reset(OpAMD64MOVBQZX)\n\t\tv.AddArg(x)\n\t\treturn true\n\t}\n\treturn false\n}\nfunc rewriteBlockAMD64(b *Block) bool {\n\tswitch b.Kind {\n\tcase BlockAMD64EQ:\n\t\t// match: (EQ (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (EQ cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64EQ\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (EQ (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (EQ (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (EQ (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (EQ (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (EQ (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64GE:\n\t\t// match: (GE (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (LE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64LE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (GE (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (GE (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (GE (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (GE (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (GE (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64GT:\n\t\t// match: (GT (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (LT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64LT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (GT (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (GT (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (GT (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (GT (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (GT (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\tcase BlockIf:\n\t\t// match: (If (SETL cmp) yes no)\n\t\t// cond:\n\t\t// result: (LT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETL {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64LT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETLE cmp) yes no)\n\t\t// cond:\n\t\t// result: (LE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETLE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64LE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETG cmp) yes no)\n\t\t// cond:\n\t\t// result: (GT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETG {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64GT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETGE cmp) yes no)\n\t\t// cond:\n\t\t// result: (GE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETGE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64GE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETEQ cmp) yes no)\n\t\t// cond:\n\t\t// result: (EQ cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64EQ\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETNE cmp) yes no)\n\t\t// cond:\n\t\t// result: (NE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETNE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64NE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETB cmp) yes no)\n\t\t// cond:\n\t\t// result: (ULT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64ULT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETBE cmp) yes no)\n\t\t// cond:\n\t\t// result: (ULE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETBE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64ULE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETA cmp) yes no)\n\t\t// cond:\n\t\t// result: (UGT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETA {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETAE cmp) yes no)\n\t\t// cond:\n\t\t// result: (UGE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETAE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETGF cmp) yes no)\n\t\t// cond:\n\t\t// result: (UGT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETGF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETGEF cmp) yes no)\n\t\t// cond:\n\t\t// result: (UGE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETGEF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETEQF cmp) yes no)\n\t\t// cond:\n\t\t// result: (EQF cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETEQF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64EQF\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If (SETNEF cmp) yes no)\n\t\t// cond:\n\t\t// result: (NEF cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64SETNEF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64NEF\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (If cond yes no)\n\t\t// cond:\n\t\t// result: (NE (TESTB cond cond) yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tcond := b.Control\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64NE\n\t\t\tv0 := b.NewValue0(v.Line, OpAMD64TESTB, TypeFlags)\n\t\t\tv0.AddArg(cond)\n\t\t\tv0.AddArg(cond)\n\t\t\tb.SetControl(v0)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64LE:\n\t\t// match: (LE (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (GE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64GE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (LE (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (LE (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (LE (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (LE (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (LE (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64LT:\n\t\t// match: (LT (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (GT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64GT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (LT (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (LT (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (LT (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (LT (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (LT (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64NE:\n\t\t// match: (NE (TESTB (SETL cmp)) yes no)\n\t\t// cond:\n\t\t// result: (LT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETL {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64LT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETLE cmp)) yes no)\n\t\t// cond:\n\t\t// result: (LE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETLE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64LE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETG cmp)) yes no)\n\t\t// cond:\n\t\t// result: (GT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETG {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64GT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETGE cmp)) yes no)\n\t\t// cond:\n\t\t// result: (GE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETGE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64GE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETEQ cmp)) yes no)\n\t\t// cond:\n\t\t// result: (EQ cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64EQ\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETNE cmp)) yes no)\n\t\t// cond:\n\t\t// result: (NE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETNE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64NE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETB cmp)) yes no)\n\t\t// cond:\n\t\t// result: (ULT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64ULT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETBE cmp)) yes no)\n\t\t// cond:\n\t\t// result: (ULE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETBE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64ULE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETA cmp)) yes no)\n\t\t// cond:\n\t\t// result: (UGT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETA {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETAE cmp)) yes no)\n\t\t// cond:\n\t\t// result: (UGE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETAE {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETGF cmp)) yes no)\n\t\t// cond:\n\t\t// result: (UGT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETGF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETGEF cmp)) yes no)\n\t\t// cond:\n\t\t// result: (UGE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETGEF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETEQF cmp)) yes no)\n\t\t// cond:\n\t\t// result: (EQF cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETEQF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64EQF\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (TESTB (SETNEF cmp)) yes no)\n\t\t// cond:\n\t\t// result: (NEF cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64TESTB {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tv_0 := v.Args[0]\n\t\t\tif v_0.Op != OpAMD64SETNEF {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v_0.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64NEF\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (NE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64NE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (NE (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64UGE:\n\t\t// match: (UGE (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (ULE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64ULE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGE (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGE (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGE (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGE (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGE (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64UGT:\n\t\t// match: (UGT (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (ULT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64ULT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGT (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGT (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGT (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGT (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (UGT (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64ULE:\n\t\t// match: (ULE (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (UGE cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGE\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULE (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULE (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULE (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULE (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULE (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\tcase BlockAMD64ULT:\n\t\t// match: (ULT (InvertFlags cmp) yes no)\n\t\t// cond:\n\t\t// result: (UGT cmp yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64InvertFlags {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tcmp := v.Args[0]\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockAMD64UGT\n\t\t\tb.SetControl(cmp)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULT (FlagEQ) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagEQ {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULT (FlagLT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULT (FlagLT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagLT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULT (FlagGT_ULT) yes no)\n\t\t// cond:\n\t\t// result: (First nil yes no)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_ULT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = yes\n\t\t\tb.Succs[1] = no\n\t\t\treturn true\n\t\t}\n\t\t// match: (ULT (FlagGT_UGT) yes no)\n\t\t// cond:\n\t\t// result: (First nil no yes)\n\t\tfor {\n\t\t\tv := b.Control\n\t\t\tif v.Op != OpAMD64FlagGT_UGT {\n\t\t\t\tbreak\n\t\t\t}\n\t\t\tyes := b.Succs[0]\n\t\t\tno := b.Succs[1]\n\t\t\tb.Kind = BlockFirst\n\t\t\tb.SetControl(nil)\n\t\t\tb.Succs[0] = no\n\t\t\tb.Succs[1] = yes\n\t\t\tb.Likely *= -1\n\t\t\treturn true\n\t\t}\n\t}\n\treturn false\n}\n" }, { "path": "tests/data/pass/simplest.go", "content": "package main\n\nfunc main() {}\n" }, { "path": "tests/data/pass/viper.go", "content": "// Copyright © 2014 Steve Francia .\n//\n// Use of this source code is governed by an MIT-style\n// license that can be found in the LICENSE file.\n\n// Viper is a application configuration system.\n// It believes that applications can be configured a variety of ways\n// via flags, ENVIRONMENT variables, configuration files retrieved\n// from the file system, or a remote key/value store.\n\n// Each item takes precedence over the item below it:\n\n// overrides\n// flag\n// env\n// config\n// key/value store\n// default\n\npackage viper\n\nimport (\n\t\"bytes\"\n\t\"fmt\"\n\t\"io\"\n\t\"io/ioutil\"\n\t\"log\"\n\t\"os\"\n\t\"path/filepath\"\n\t\"reflect\"\n\t\"strings\"\n\t\"time\"\n\n\t\"github.com/kr/pretty\"\n\t\"github.com/mitchellh/mapstructure\"\n\t\"github.com/spf13/cast\"\n\tjww \"github.com/spf13/jwalterweatherman\"\n\t\"github.com/spf13/pflag\"\n\t\"gopkg.in/fsnotify.v1\"\n)\n\nvar v *Viper\n\nfunc init() {\n\tv = New()\n}\n\ntype remoteConfigFactory interface {\n\tGet(rp RemoteProvider) (io.Reader, error)\n\tWatch(rp RemoteProvider) (io.Reader, error)\n}\n\n// RemoteConfig is optional, see the remote package\nvar RemoteConfig remoteConfigFactory\n\n// Denotes encountering an unsupported\n// configuration filetype.\ntype UnsupportedConfigError string\n\n// Returns the formatted configuration error.\nfunc (str UnsupportedConfigError) Error() string {\n\treturn fmt.Sprintf(\"Unsupported Config Type %q\", string(str))\n}\n\n// Denotes encountering an unsupported remote\n// provider. Currently only etcd and Consul are\n// supported.\ntype UnsupportedRemoteProviderError string\n\n// Returns the formatted remote provider error.\nfunc (str UnsupportedRemoteProviderError) Error() string {\n\treturn fmt.Sprintf(\"Unsupported Remote Provider Type %q\", string(str))\n}\n\n// Denotes encountering an error while trying to\n// pull the configuration from the remote provider.\ntype RemoteConfigError string\n\n// Returns the formatted remote provider error\nfunc (rce RemoteConfigError) Error() string {\n\treturn fmt.Sprintf(\"Remote Configurations Error: %s\", string(rce))\n}\n\n// Denotes failing to find configuration file.\ntype ConfigFileNotFoundError struct {\n\tname, locations string\n}\n\n// Returns the formatted configuration error.\nfunc (fnfe ConfigFileNotFoundError) Error() string {\n\treturn fmt.Sprintf(\"Config File %q Not Found in %q\", fnfe.name, fnfe.locations)\n}\n\n// Viper is a prioritized configuration registry. It\n// maintains a set of configuration sources, fetches\n// values to populate those, and provides them according\n// to the source's priority.\n// The priority of the sources is the following:\n// 1. overrides\n// 2. flags\n// 3. env. variables\n// 4. config file\n// 5. key/value store\n// 6. defaults\n//\n// For example, if values from the following sources were loaded:\n//\n// Defaults : {\n// \t\"secret\": \"\",\n// \t\"user\": \"default\",\n// \t\"endpoint\": \"https://localhost\"\n// }\n// Config : {\n// \t\"user\": \"root\"\n//\t\"secret\": \"defaultsecret\"\n// }\n// Env : {\n// \t\"secret\": \"somesecretkey\"\n// }\n//\n// The resulting config will have the following values:\n//\n//\t{\n//\t\t\"secret\": \"somesecretkey\",\n//\t\t\"user\": \"root\",\n//\t\t\"endpoint\": \"https://localhost\"\n//\t}\ntype Viper struct {\n\t// Delimiter that separates a list of keys\n\t// used to access a nested value in one go\n\tkeyDelim string\n\n\t// A set of paths to look for the config file in\n\tconfigPaths []string\n\n\t// A set of remote providers to search for the configuration\n\tremoteProviders []*defaultRemoteProvider\n\n\t// Name of file to look for inside the path\n\tconfigName string\n\tconfigFile string\n\tconfigType string\n\tenvPrefix string\n\n\tautomaticEnvApplied bool\n\tenvKeyReplacer *strings.Replacer\n\n\tconfig map[string]interface{}\n\toverride map[string]interface{}\n\tdefaults map[string]interface{}\n\tkvstore map[string]interface{}\n\tpflags map[string]FlagValue\n\tenv map[string]string\n\taliases map[string]string\n\ttypeByDefValue bool\n\n\tonConfigChange func(fsnotify.Event)\n}\n\n// Returns an initialized Viper instance.\nfunc New() *Viper {\n\tv := new(Viper)\n\tv.keyDelim = \".\"\n\tv.configName = \"config\"\n\tv.config = make(map[string]interface{})\n\tv.override = make(map[string]interface{})\n\tv.defaults = make(map[string]interface{})\n\tv.kvstore = make(map[string]interface{})\n\tv.pflags = make(map[string]FlagValue)\n\tv.env = make(map[string]string)\n\tv.aliases = make(map[string]string)\n\tv.typeByDefValue = false\n\n\treturn v\n}\n\n// Intended for testing, will reset all to default settings.\n// In the public interface for the viper package so applications\n// can use it in their testing as well.\nfunc Reset() {\n\tv = New()\n\tSupportedExts = []string{\"json\", \"toml\", \"yaml\", \"yml\", \"hcl\"}\n\tSupportedRemoteProviders = []string{\"etcd\", \"consul\"}\n}\n\ntype defaultRemoteProvider struct {\n\tprovider string\n\tendpoint string\n\tpath string\n\tsecretKeyring string\n}\n\nfunc (rp defaultRemoteProvider) Provider() string {\n\treturn rp.provider\n}\n\nfunc (rp defaultRemoteProvider) Endpoint() string {\n\treturn rp.endpoint\n}\n\nfunc (rp defaultRemoteProvider) Path() string {\n\treturn rp.path\n}\n\nfunc (rp defaultRemoteProvider) SecretKeyring() string {\n\treturn rp.secretKeyring\n}\n\n// RemoteProvider stores the configuration necessary\n// to connect to a remote key/value store.\n// Optional secretKeyring to unencrypt encrypted values\n// can be provided.\ntype RemoteProvider interface {\n\tProvider() string\n\tEndpoint() string\n\tPath() string\n\tSecretKeyring() string\n}\n\n// Universally supported extensions.\nvar SupportedExts []string = []string{\"json\", \"toml\", \"yaml\", \"yml\", \"properties\", \"props\", \"prop\", \"hcl\"}\n\n// Universally supported remote providers.\nvar SupportedRemoteProviders []string = []string{\"etcd\", \"consul\"}\n\nfunc OnConfigChange(run func(in fsnotify.Event)) { v.OnConfigChange(run) }\nfunc (v *Viper) OnConfigChange(run func(in fsnotify.Event)) {\n\tv.onConfigChange = run\n}\n\nfunc WatchConfig() { v.WatchConfig() }\nfunc (v *Viper) WatchConfig() {\n\tgo func() {\n\t\twatcher, err := fsnotify.NewWatcher()\n\t\tif err != nil {\n\t\t\tlog.Fatal(err)\n\t\t}\n\t\tdefer watcher.Close()\n\n\t\t// we have to watch the entire directory to pick up renames/atomic saves in a cross-platform way\n\t\tconfigFile := filepath.Clean(v.getConfigFile())\n\t\tconfigDir, _ := filepath.Split(configFile)\n\n\t\tdone := make(chan bool)\n\t\tgo func() {\n\t\t\tfor {\n\t\t\t\tselect {\n\t\t\t\tcase event := <-watcher.Events:\n\t\t\t\t\t// we only care about the config file\n\t\t\t\t\tif filepath.Clean(event.Name) == configFile {\n\t\t\t\t\t\tif event.Op&fsnotify.Write == fsnotify.Write || event.Op&fsnotify.Create == fsnotify.Create {\n\t\t\t\t\t\t\terr := v.ReadInConfig()\n\t\t\t\t\t\t\tif err != nil {\n\t\t\t\t\t\t\t\tlog.Println(\"error:\", err)\n\t\t\t\t\t\t\t}\n\t\t\t\t\t\t\tv.onConfigChange(event)\n\t\t\t\t\t\t}\n\t\t\t\t\t}\n\t\t\t\tcase err := <-watcher.Errors:\n\t\t\t\t\tlog.Println(\"error:\", err)\n\t\t\t\t}\n\t\t\t}\n\t\t}()\n\n\t\twatcher.Add(configDir)\n\t\t<-done\n\t}()\n}\n\n// Explicitly define the path, name and extension of the config file\n// Viper will use this and not check any of the config paths\nfunc SetConfigFile(in string) { v.SetConfigFile(in) }\nfunc (v *Viper) SetConfigFile(in string) {\n\tif in != \"\" {\n\t\tv.configFile = in\n\t}\n}\n\n// Define a prefix that ENVIRONMENT variables will use.\n// E.g. if your prefix is \"spf\", the env registry\n// will look for env. variables that start with \"SPF_\"\nfunc SetEnvPrefix(in string) { v.SetEnvPrefix(in) }\nfunc (v *Viper) SetEnvPrefix(in string) {\n\tif in != \"\" {\n\t\tv.envPrefix = in\n\t}\n}\n\nfunc (v *Viper) mergeWithEnvPrefix(in string) string {\n\tif v.envPrefix != \"\" {\n\t\treturn strings.ToUpper(v.envPrefix + \"_\" + in)\n\t}\n\n\treturn strings.ToUpper(in)\n}\n\n// TODO: should getEnv logic be moved into find(). Can generalize the use of\n// rewriting keys many things, Ex: Get('someKey') -> some_key\n// (cammel case to snake case for JSON keys perhaps)\n\n// getEnv s a wrapper around os.Getenv which replaces characters in the original\n// key. This allows env vars which have different keys then the config object\n// keys\nfunc (v *Viper) getEnv(key string) string {\n\tif v.envKeyReplacer != nil {\n\t\tkey = v.envKeyReplacer.Replace(key)\n\t}\n\treturn os.Getenv(key)\n}\n\n// Return the file used to populate the config registry\nfunc ConfigFileUsed() string { return v.ConfigFileUsed() }\nfunc (v *Viper) ConfigFileUsed() string { return v.configFile }\n\n// Add a path for Viper to search for the config file in.\n// Can be called multiple times to define multiple search paths.\nfunc AddConfigPath(in string) { v.AddConfigPath(in) }\nfunc (v *Viper) AddConfigPath(in string) {\n\tif in != \"\" {\n\t\tabsin := absPathify(in)\n\t\tjww.INFO.Println(\"adding\", absin, \"to paths to search\")\n\t\tif !stringInSlice(absin, v.configPaths) {\n\t\t\tv.configPaths = append(v.configPaths, absin)\n\t\t}\n\t}\n}\n\n// AddRemoteProvider adds a remote configuration source.\n// Remote Providers are searched in the order they are added.\n// provider is a string value, \"etcd\" or \"consul\" are currently supported.\n// endpoint is the url. etcd requires http://ip:port consul requires ip:port\n// path is the path in the k/v store to retrieve configuration\n// To retrieve a config file called myapp.json from /configs/myapp.json\n// you should set path to /configs and set config name (SetConfigName()) to\n// \"myapp\"\nfunc AddRemoteProvider(provider, endpoint, path string) error {\n\treturn v.AddRemoteProvider(provider, endpoint, path)\n}\nfunc (v *Viper) AddRemoteProvider(provider, endpoint, path string) error {\n\tif !stringInSlice(provider, SupportedRemoteProviders) {\n\t\treturn UnsupportedRemoteProviderError(provider)\n\t}\n\tif provider != \"\" && endpoint != \"\" {\n\t\tjww.INFO.Printf(\"adding %s:%s to remote provider list\", provider, endpoint)\n\t\trp := &defaultRemoteProvider{\n\t\t\tendpoint: endpoint,\n\t\t\tprovider: provider,\n\t\t\tpath: path,\n\t\t}\n\t\tif !v.providerPathExists(rp) {\n\t\t\tv.remoteProviders = append(v.remoteProviders, rp)\n\t\t}\n\t}\n\treturn nil\n}\n\n// AddSecureRemoteProvider adds a remote configuration source.\n// Secure Remote Providers are searched in the order they are added.\n// provider is a string value, \"etcd\" or \"consul\" are currently supported.\n// endpoint is the url. etcd requires http://ip:port consul requires ip:port\n// secretkeyring is the filepath to your openpgp secret keyring. e.g. /etc/secrets/myring.gpg\n// path is the path in the k/v store to retrieve configuration\n// To retrieve a config file called myapp.json from /configs/myapp.json\n// you should set path to /configs and set config name (SetConfigName()) to\n// \"myapp\"\n// Secure Remote Providers are implemented with github.com/xordataexchange/crypt\nfunc AddSecureRemoteProvider(provider, endpoint, path, secretkeyring string) error {\n\treturn v.AddSecureRemoteProvider(provider, endpoint, path, secretkeyring)\n}\n\nfunc (v *Viper) AddSecureRemoteProvider(provider, endpoint, path, secretkeyring string) error {\n\tif !stringInSlice(provider, SupportedRemoteProviders) {\n\t\treturn UnsupportedRemoteProviderError(provider)\n\t}\n\tif provider != \"\" && endpoint != \"\" {\n\t\tjww.INFO.Printf(\"adding %s:%s to remote provider list\", provider, endpoint)\n\t\trp := &defaultRemoteProvider{\n\t\t\tendpoint: endpoint,\n\t\t\tprovider: provider,\n\t\t\tpath: path,\n\t\t\tsecretKeyring: secretkeyring,\n\t\t}\n\t\tif !v.providerPathExists(rp) {\n\t\t\tv.remoteProviders = append(v.remoteProviders, rp)\n\t\t}\n\t}\n\treturn nil\n}\n\nfunc (v *Viper) providerPathExists(p *defaultRemoteProvider) bool {\n\tfor _, y := range v.remoteProviders {\n\t\tif reflect.DeepEqual(y, p) {\n\t\t\treturn true\n\t\t}\n\t}\n\treturn false\n}\n\nfunc (v *Viper) searchMap(source map[string]interface{}, path []string) interface{} {\n\n\tif len(path) == 0 {\n\t\treturn source\n\t}\n\n\tvar ok bool\n\tvar next interface{}\n\tfor k, v := range source {\n\t\tif strings.ToLower(k) == strings.ToLower(path[0]) {\n\t\t\tok = true\n\t\t\tnext = v\n\t\t\tbreak\n\t\t}\n\t}\n\n\tif ok {\n\t\tswitch next.(type) {\n\t\tcase map[interface{}]interface{}:\n\t\t\treturn v.searchMap(cast.ToStringMap(next), path[1:])\n\t\tcase map[string]interface{}:\n\t\t\t// Type assertion is safe here since it is only reached\n\t\t\t// if the type of `next` is the same as the type being asserted\n\t\t\treturn v.searchMap(next.(map[string]interface{}), path[1:])\n\t\tdefault:\n\t\t\treturn next\n\t\t}\n\t} else {\n\t\treturn nil\n\t}\n}\n\n// SetTypeByDefaultValue enables or disables the inference of a key value's\n// type when the Get function is used based upon a key's default value as\n// opposed to the value returned based on the normal fetch logic.\n//\n// For example, if a key has a default value of []string{} and the same key\n// is set via an environment variable to \"a b c\", a call to the Get function\n// would return a string slice for the key if the key's type is inferred by\n// the default value and the Get function would return:\n//\n// []string {\"a\", \"b\", \"c\"}\n//\n// Otherwise the Get function would return:\n//\n// \"a b c\"\nfunc SetTypeByDefaultValue(enable bool) { v.SetTypeByDefaultValue(enable) }\nfunc (v *Viper) SetTypeByDefaultValue(enable bool) {\n\tv.typeByDefValue = enable\n}\n\n// Viper is essentially repository for configurations\n// Get can retrieve any value given the key to use\n// Get has the behavior of returning the value associated with the first\n// place from where it is set. Viper will check in the following order:\n// override, flag, env, config file, key/value store, default\n//\n// Get returns an interface. For a specific value use one of the Get____ methods.\nfunc Get(key string) interface{} { return v.Get(key) }\nfunc (v *Viper) Get(key string) interface{} {\n\tpath := strings.Split(key, v.keyDelim)\n\n\tlcaseKey := strings.ToLower(key)\n\tval := v.find(lcaseKey)\n\n\tif val == nil {\n\t\tsource := v.find(strings.ToLower(path[0]))\n\t\tif source != nil {\n\t\t\tif reflect.TypeOf(source).Kind() == reflect.Map {\n\t\t\t\tval = v.searchMap(cast.ToStringMap(source), path[1:])\n\t\t\t}\n\t\t}\n\t}\n\n\t// if no other value is returned and a flag does exist for the value,\n\t// get the flag's value even if the flag's value has not changed\n\tif val == nil {\n\t\tif flag, exists := v.pflags[lcaseKey]; exists {\n\t\t\tjww.TRACE.Println(key, \"get pflag default\", val)\n\t\t\tswitch flag.ValueType() {\n\t\t\tcase \"int\", \"int8\", \"int16\", \"int32\", \"int64\":\n\t\t\t\tval = cast.ToInt(flag.ValueString())\n\t\t\tcase \"bool\":\n\t\t\t\tval = cast.ToBool(flag.ValueString())\n\t\t\tdefault:\n\t\t\t\tval = flag.ValueString()\n\t\t\t}\n\t\t}\n\t}\n\n\tif val == nil {\n\t\treturn nil\n\t}\n\n\tvar valType interface{}\n\tif !v.typeByDefValue {\n\t\tvalType = val\n\t} else {\n\t\tdefVal, defExists := v.defaults[lcaseKey]\n\t\tif defExists {\n\t\t\tvalType = defVal\n\t\t} else {\n\t\t\tvalType = val\n\t\t}\n\t}\n\n\tswitch valType.(type) {\n\tcase bool:\n\t\treturn cast.ToBool(val)\n\tcase string:\n\t\treturn cast.ToString(val)\n\tcase int64, int32, int16, int8, int:\n\t\treturn cast.ToInt(val)\n\tcase float64, float32:\n\t\treturn cast.ToFloat64(val)\n\tcase time.Time:\n\t\treturn cast.ToTime(val)\n\tcase time.Duration:\n\t\treturn cast.ToDuration(val)\n\tcase []string:\n\t\treturn cast.ToStringSlice(val)\n\t}\n\treturn val\n}\n\n// Returns new Viper instance representing a sub tree of this instance\nfunc Sub(key string) *Viper { return v.Sub(key) }\nfunc (v *Viper) Sub(key string) *Viper {\n\tsubv := New()\n\tdata := v.Get(key)\n\tif reflect.TypeOf(data).Kind() == reflect.Map {\n\t\tsubv.config = cast.ToStringMap(data)\n\t\treturn subv\n\t} else {\n\t\treturn nil\n\t}\n}\n\n// Returns the value associated with the key as a string\nfunc GetString(key string) string { return v.GetString(key) }\nfunc (v *Viper) GetString(key string) string {\n\treturn cast.ToString(v.Get(key))\n}\n\n// Returns the value associated with the key asa boolean\nfunc GetBool(key string) bool { return v.GetBool(key) }\nfunc (v *Viper) GetBool(key string) bool {\n\treturn cast.ToBool(v.Get(key))\n}\n\n// Returns the value associated with the key as an integer\nfunc GetInt(key string) int { return v.GetInt(key) }\nfunc (v *Viper) GetInt(key string) int {\n\treturn cast.ToInt(v.Get(key))\n}\n\n// Returns the value associated with the key as a float64\nfunc GetFloat64(key string) float64 { return v.GetFloat64(key) }\nfunc (v *Viper) GetFloat64(key string) float64 {\n\treturn cast.ToFloat64(v.Get(key))\n}\n\n// Returns the value associated with the key as time\nfunc GetTime(key string) time.Time { return v.GetTime(key) }\nfunc (v *Viper) GetTime(key string) time.Time {\n\treturn cast.ToTime(v.Get(key))\n}\n\n// Returns the value associated with the key as a duration\nfunc GetDuration(key string) time.Duration { return v.GetDuration(key) }\nfunc (v *Viper) GetDuration(key string) time.Duration {\n\treturn cast.ToDuration(v.Get(key))\n}\n\n// Returns the value associated with the key as a slice of strings\nfunc GetStringSlice(key string) []string { return v.GetStringSlice(key) }\nfunc (v *Viper) GetStringSlice(key string) []string {\n\treturn cast.ToStringSlice(v.Get(key))\n}\n\n// Returns the value associated with the key as a map of interfaces\nfunc GetStringMap(key string) map[string]interface{} { return v.GetStringMap(key) }\nfunc (v *Viper) GetStringMap(key string) map[string]interface{} {\n\treturn cast.ToStringMap(v.Get(key))\n}\n\n// Returns the value associated with the key as a map of strings\nfunc GetStringMapString(key string) map[string]string { return v.GetStringMapString(key) }\nfunc (v *Viper) GetStringMapString(key string) map[string]string {\n\treturn cast.ToStringMapString(v.Get(key))\n}\n\n// Returns the value associated with the key as a map to a slice of strings.\nfunc GetStringMapStringSlice(key string) map[string][]string { return v.GetStringMapStringSlice(key) }\nfunc (v *Viper) GetStringMapStringSlice(key string) map[string][]string {\n\treturn cast.ToStringMapStringSlice(v.Get(key))\n}\n\n// Returns the size of the value associated with the given key\n// in bytes.\nfunc GetSizeInBytes(key string) uint { return v.GetSizeInBytes(key) }\nfunc (v *Viper) GetSizeInBytes(key string) uint {\n\tsizeStr := cast.ToString(v.Get(key))\n\treturn parseSizeInBytes(sizeStr)\n}\n\n// Takes a single key and unmarshals it into a Struct\nfunc UnmarshalKey(key string, rawVal interface{}) error { return v.UnmarshalKey(key, rawVal) }\nfunc (v *Viper) UnmarshalKey(key string, rawVal interface{}) error {\n\treturn mapstructure.Decode(v.Get(key), rawVal)\n}\n\n// Unmarshals the config into a Struct. Make sure that the tags\n// on the fields of the structure are properly set.\nfunc Unmarshal(rawVal interface{}) error { return v.Unmarshal(rawVal) }\nfunc (v *Viper) Unmarshal(rawVal interface{}) error {\n\terr := mapstructure.WeakDecode(v.AllSettings(), rawVal)\n\n\tif err != nil {\n\t\treturn err\n\t}\n\n\tv.insensitiviseMaps()\n\n\treturn nil\n}\n\n// A wrapper around mapstructure.Decode that mimics the WeakDecode functionality\n// while erroring on non existing vals in the destination struct\nfunc weakDecodeExact(input, output interface{}) error {\n\tconfig := &mapstructure.DecoderConfig{\n\t\tErrorUnused: true,\n\t\tMetadata: nil,\n\t\tResult: output,\n\t\tWeaklyTypedInput: true,\n\t}\n\n\tdecoder, err := mapstructure.NewDecoder(config)\n\tif err != nil {\n\t\treturn err\n\t}\n\treturn decoder.Decode(input)\n}\n\n// Unmarshals the config into a Struct, erroring if a field is non-existant\n// in the destination struct\nfunc (v *Viper) UnmarshalExact(rawVal interface{}) error {\n\terr := weakDecodeExact(v.AllSettings(), rawVal)\n\n\tif err != nil {\n\t\treturn err\n\t}\n\n\tv.insensitiviseMaps()\n\n\treturn nil\n}\n\n// Bind a full flag set to the configuration, using each flag's long\n// name as the config key.\nfunc BindPFlags(flags *pflag.FlagSet) (err error) { return v.BindPFlags(flags) }\nfunc (v *Viper) BindPFlags(flags *pflag.FlagSet) (err error) {\n\treturn v.BindFlagValues(pflagValueSet{flags})\n}\n\n// Bind a specific key to a pflag (as used by cobra)\n// Example(where serverCmd is a Cobra instance):\n//\n//\t serverCmd.Flags().Int(\"port\", 1138, \"Port to run Application server on\")\n//\t Viper.BindPFlag(\"port\", serverCmd.Flags().Lookup(\"port\"))\n//\nfunc BindPFlag(key string, flag *pflag.Flag) (err error) { return v.BindPFlag(key, flag) }\nfunc (v *Viper) BindPFlag(key string, flag *pflag.Flag) (err error) {\n\treturn v.BindFlagValue(key, pflagValue{flag})\n}\n\n// Bind a full FlagValue set to the configuration, using each flag's long\n// name as the config key.\nfunc BindFlagValues(flags FlagValueSet) (err error) { return v.BindFlagValues(flags) }\nfunc (v *Viper) BindFlagValues(flags FlagValueSet) (err error) {\n\tflags.VisitAll(func(flag FlagValue) {\n\t\tif err = v.BindFlagValue(flag.Name(), flag); err != nil {\n\t\t\treturn\n\t\t}\n\t})\n\treturn nil\n}\n\n// Bind a specific key to a FlagValue.\n// Example(where serverCmd is a Cobra instance):\n//\n//\t serverCmd.Flags().Int(\"port\", 1138, \"Port to run Application server on\")\n//\t Viper.BindFlagValue(\"port\", serverCmd.Flags().Lookup(\"port\"))\n//\nfunc BindFlagValue(key string, flag FlagValue) (err error) { return v.BindFlagValue(key, flag) }\nfunc (v *Viper) BindFlagValue(key string, flag FlagValue) (err error) {\n\tif flag == nil {\n\t\treturn fmt.Errorf(\"flag for %q is nil\", key)\n\t}\n\tv.pflags[strings.ToLower(key)] = flag\n\treturn nil\n}\n\n// Binds a Viper key to a ENV variable\n// ENV variables are case sensitive\n// If only a key is provided, it will use the env key matching the key, uppercased.\n// EnvPrefix will be used when set when env name is not provided.\nfunc BindEnv(input ...string) (err error) { return v.BindEnv(input...) }\nfunc (v *Viper) BindEnv(input ...string) (err error) {\n\tvar key, envkey string\n\tif len(input) == 0 {\n\t\treturn fmt.Errorf(\"BindEnv missing key to bind to\")\n\t}\n\n\tkey = strings.ToLower(input[0])\n\n\tif len(input) == 1 {\n\t\tenvkey = v.mergeWithEnvPrefix(key)\n\t} else {\n\t\tenvkey = input[1]\n\t}\n\n\tv.env[key] = envkey\n\n\treturn nil\n}\n\n// Given a key, find the value\n// Viper will check in the following order:\n// flag, env, config file, key/value store, default\n// Viper will check to see if an alias exists first\nfunc (v *Viper) find(key string) interface{} {\n\tvar val interface{}\n\tvar exists bool\n\n\t// if the requested key is an alias, then return the proper key\n\tkey = v.realKey(key)\n\n\t// PFlag Override first\n\tflag, exists := v.pflags[key]\n\tif exists && flag.HasChanged() {\n\t\tjww.TRACE.Println(key, \"found in override (via pflag):\", flag.ValueString())\n\t\tswitch flag.ValueType() {\n\t\tcase \"int\", \"int8\", \"int16\", \"int32\", \"int64\":\n\t\t\treturn cast.ToInt(flag.ValueString())\n\t\tcase \"bool\":\n\t\t\treturn cast.ToBool(flag.ValueString())\n\t\tdefault:\n\t\t\treturn flag.ValueString()\n\t\t}\n\t}\n\n\tval, exists = v.override[key]\n\tif exists {\n\t\tjww.TRACE.Println(key, \"found in override:\", val)\n\t\treturn val\n\t}\n\n\tif v.automaticEnvApplied {\n\t\t// even if it hasn't been registered, if automaticEnv is used,\n\t\t// check any Get request\n\t\tif val = v.getEnv(v.mergeWithEnvPrefix(key)); val != \"\" {\n\t\t\tjww.TRACE.Println(key, \"found in environment with val:\", val)\n\t\t\treturn val\n\t\t}\n\t}\n\n\tenvkey, exists := v.env[key]\n\tif exists {\n\t\tjww.TRACE.Println(key, \"registered as env var\", envkey)\n\t\tif val = v.getEnv(envkey); val != \"\" {\n\t\t\tjww.TRACE.Println(envkey, \"found in environment with val:\", val)\n\t\t\treturn val\n\t\t} else {\n\t\t\tjww.TRACE.Println(envkey, \"env value unset:\")\n\t\t}\n\t}\n\n\tval, exists = v.config[key]\n\tif exists {\n\t\tjww.TRACE.Println(key, \"found in config:\", val)\n\t\treturn val\n\t}\n\n\t// Test for nested config parameter\n\tif strings.Contains(key, v.keyDelim) {\n\t\tpath := strings.Split(key, v.keyDelim)\n\n\t\tsource := v.find(path[0])\n\t\tif source != nil {\n\t\t\tif reflect.TypeOf(source).Kind() == reflect.Map {\n\t\t\t\tval := v.searchMap(cast.ToStringMap(source), path[1:])\n\t\t\t\tjww.TRACE.Println(key, \"found in nested config:\", val)\n\t\t\t\treturn val\n\t\t\t}\n\t\t}\n\t}\n\n\tval, exists = v.kvstore[key]\n\tif exists {\n\t\tjww.TRACE.Println(key, \"found in key/value store:\", val)\n\t\treturn val\n\t}\n\n\tval, exists = v.defaults[key]\n\tif exists {\n\t\tjww.TRACE.Println(key, \"found in defaults:\", val)\n\t\treturn val\n\t}\n\n\treturn nil\n}\n\n// Check to see if the key has been set in any of the data locations\nfunc IsSet(key string) bool { return v.IsSet(key) }\nfunc (v *Viper) IsSet(key string) bool {\n\tpath := strings.Split(key, v.keyDelim)\n\n\tlcaseKey := strings.ToLower(key)\n\tval := v.find(lcaseKey)\n\n\tif val == nil {\n\t\tsource := v.find(strings.ToLower(path[0]))\n\t\tif source != nil {\n\t\t\tif reflect.TypeOf(source).Kind() == reflect.Map {\n\t\t\t\tval = v.searchMap(cast.ToStringMap(source), path[1:])\n\t\t\t}\n\t\t}\n\t}\n\n\treturn val != nil\n}\n\n// Have Viper check ENV variables for all\n// keys set in config, default & flags\nfunc AutomaticEnv() { v.AutomaticEnv() }\nfunc (v *Viper) AutomaticEnv() {\n\tv.automaticEnvApplied = true\n}\n\n// SetEnvKeyReplacer sets the strings.Replacer on the viper object\n// Useful for mapping an environmental variable to a key that does\n// not match it.\nfunc SetEnvKeyReplacer(r *strings.Replacer) { v.SetEnvKeyReplacer(r) }\nfunc (v *Viper) SetEnvKeyReplacer(r *strings.Replacer) {\n\tv.envKeyReplacer = r\n}\n\n// Aliases provide another accessor for the same key.\n// This enables one to change a name without breaking the application\nfunc RegisterAlias(alias string, key string) { v.RegisterAlias(alias, key) }\nfunc (v *Viper) RegisterAlias(alias string, key string) {\n\tv.registerAlias(alias, strings.ToLower(key))\n}\n\nfunc (v *Viper) registerAlias(alias string, key string) {\n\talias = strings.ToLower(alias)\n\tif alias != key && alias != v.realKey(key) {\n\t\t_, exists := v.aliases[alias]\n\n\t\tif !exists {\n\t\t\t// if we alias something that exists in one of the maps to another\n\t\t\t// name, we'll never be able to get that value using the original\n\t\t\t// name, so move the config value to the new realkey.\n\t\t\tif val, ok := v.config[alias]; ok {\n\t\t\t\tdelete(v.config, alias)\n\t\t\t\tv.config[key] = val\n\t\t\t}\n\t\t\tif val, ok := v.kvstore[alias]; ok {\n\t\t\t\tdelete(v.kvstore, alias)\n\t\t\t\tv.kvstore[key] = val\n\t\t\t}\n\t\t\tif val, ok := v.defaults[alias]; ok {\n\t\t\t\tdelete(v.defaults, alias)\n\t\t\t\tv.defaults[key] = val\n\t\t\t}\n\t\t\tif val, ok := v.override[alias]; ok {\n\t\t\t\tdelete(v.override, alias)\n\t\t\t\tv.override[key] = val\n\t\t\t}\n\t\t\tv.aliases[alias] = key\n\t\t}\n\t} else {\n\t\tjww.WARN.Println(\"Creating circular reference alias\", alias, key, v.realKey(key))\n\t}\n}\n\nfunc (v *Viper) realKey(key string) string {\n\tnewkey, exists := v.aliases[key]\n\tif exists {\n\t\tjww.DEBUG.Println(\"Alias\", key, \"to\", newkey)\n\t\treturn v.realKey(newkey)\n\t} else {\n\t\treturn key\n\t}\n}\n\n// Check to see if the given key (or an alias) is in the config file\nfunc InConfig(key string) bool { return v.InConfig(key) }\nfunc (v *Viper) InConfig(key string) bool {\n\t// if the requested key is an alias, then return the proper key\n\tkey = v.realKey(key)\n\n\t_, exists := v.config[key]\n\treturn exists\n}\n\n// Set the default value for this key.\n// Default only used when no value is provided by the user via flag, config or ENV.\nfunc SetDefault(key string, value interface{}) { v.SetDefault(key, value) }\nfunc (v *Viper) SetDefault(key string, value interface{}) {\n\t// If alias passed in, then set the proper default\n\tkey = v.realKey(strings.ToLower(key))\n\tv.defaults[key] = value\n}\n\n// Sets the value for the key in the override regiser.\n// Will be used instead of values obtained via\n// flags, config file, ENV, default, or key/value store\nfunc Set(key string, value interface{}) { v.Set(key, value) }\nfunc (v *Viper) Set(key string, value interface{}) {\n\t// If alias passed in, then set the proper override\n\tkey = v.realKey(strings.ToLower(key))\n\tv.override[key] = value\n}\n\n// Viper will discover and load the configuration file from disk\n// and key/value stores, searching in one of the defined paths.\nfunc ReadInConfig() error { return v.ReadInConfig() }\nfunc (v *Viper) ReadInConfig() error {\n\tjww.INFO.Println(\"Attempting to read in config file\")\n\tif !stringInSlice(v.getConfigType(), SupportedExts) {\n\t\treturn UnsupportedConfigError(v.getConfigType())\n\t}\n\n\tfile, err := ioutil.ReadFile(v.getConfigFile())\n\tif err != nil {\n\t\treturn err\n\t}\n\n\tv.config = make(map[string]interface{})\n\n\treturn v.unmarshalReader(bytes.NewReader(file), v.config)\n}\n\n// MergeInConfig merges a new configuration with an existing config.\nfunc MergeInConfig() error { return v.MergeInConfig() }\nfunc (v *Viper) MergeInConfig() error {\n\tjww.INFO.Println(\"Attempting to merge in config file\")\n\tif !stringInSlice(v.getConfigType(), SupportedExts) {\n\t\treturn UnsupportedConfigError(v.getConfigType())\n\t}\n\n\tfile, err := ioutil.ReadFile(v.getConfigFile())\n\tif err != nil {\n\t\treturn err\n\t}\n\n\treturn v.MergeConfig(bytes.NewReader(file))\n}\n\n// Viper will read a configuration file, setting existing keys to nil if the\n// key does not exist in the file.\nfunc ReadConfig(in io.Reader) error { return v.ReadConfig(in) }\nfunc (v *Viper) ReadConfig(in io.Reader) error {\n\tv.config = make(map[string]interface{})\n\treturn v.unmarshalReader(in, v.config)\n}\n\n// MergeConfig merges a new configuration with an existing config.\nfunc MergeConfig(in io.Reader) error { return v.MergeConfig(in) }\nfunc (v *Viper) MergeConfig(in io.Reader) error {\n\tif v.config == nil {\n\t\tv.config = make(map[string]interface{})\n\t}\n\tcfg := make(map[string]interface{})\n\tif err := v.unmarshalReader(in, cfg); err != nil {\n\t\treturn err\n\t}\n\tmergeMaps(cfg, v.config, nil)\n\treturn nil\n}\n\nfunc keyExists(k string, m map[string]interface{}) string {\n\tlk := strings.ToLower(k)\n\tfor mk := range m {\n\t\tlmk := strings.ToLower(mk)\n\t\tif lmk == lk {\n\t\t\treturn mk\n\t\t}\n\t}\n\treturn \"\"\n}\n\nfunc castToMapStringInterface(\n\tsrc map[interface{}]interface{}) map[string]interface{} {\n\ttgt := map[string]interface{}{}\n\tfor k, v := range src {\n\t\ttgt[fmt.Sprintf(\"%v\", k)] = v\n\t}\n\treturn tgt\n}\n\n// mergeMaps merges two maps. The `itgt` parameter is for handling go-yaml's\n// insistence on parsing nested structures as `map[interface{}]interface{}`\n// instead of using a `string` as the key for nest structures beyond one level\n// deep. Both map types are supported as there is a go-yaml fork that uses\n// `map[string]interface{}` instead.\nfunc mergeMaps(\n\tsrc, tgt map[string]interface{}, itgt map[interface{}]interface{}) {\n\tfor sk, sv := range src {\n\t\ttk := keyExists(sk, tgt)\n\t\tif tk == \"\" {\n\t\t\tjww.TRACE.Printf(\"tk=\\\"\\\", tgt[%s]=%v\", sk, sv)\n\t\t\ttgt[sk] = sv\n\t\t\tif itgt != nil {\n\t\t\t\titgt[sk] = sv\n\t\t\t}\n\t\t\tcontinue\n\t\t}\n\n\t\ttv, ok := tgt[tk]\n\t\tif !ok {\n\t\t\tjww.TRACE.Printf(\"tgt[%s] != ok, tgt[%s]=%v\", tk, sk, sv)\n\t\t\ttgt[sk] = sv\n\t\t\tif itgt != nil {\n\t\t\t\titgt[sk] = sv\n\t\t\t}\n\t\t\tcontinue\n\t\t}\n\n\t\tsvType := reflect.TypeOf(sv)\n\t\ttvType := reflect.TypeOf(tv)\n\t\tif svType != tvType {\n\t\t\tjww.ERROR.Printf(\n\t\t\t\t\"svType != tvType; key=%s, st=%v, tt=%v, sv=%v, tv=%v\",\n\t\t\t\tsk, svType, tvType, sv, tv)\n\t\t\tcontinue\n\t\t}\n\n\t\tjww.TRACE.Printf(\"processing key=%s, st=%v, tt=%v, sv=%v, tv=%v\",\n\t\t\tsk, svType, tvType, sv, tv)\n\n\t\tswitch ttv := tv.(type) {\n\t\tcase map[interface{}]interface{}:\n\t\t\tjww.TRACE.Printf(\"merging maps (must convert)\")\n\t\t\ttsv := sv.(map[interface{}]interface{})\n\t\t\tssv := castToMapStringInterface(tsv)\n\t\t\tstv := castToMapStringInterface(ttv)\n\t\t\tmergeMaps(ssv, stv, ttv)\n\t\tcase map[string]interface{}:\n\t\t\tjww.TRACE.Printf(\"merging maps\")\n\t\t\tmergeMaps(sv.(map[string]interface{}), ttv, nil)\n\t\tdefault:\n\t\t\tjww.TRACE.Printf(\"setting value\")\n\t\t\ttgt[tk] = sv\n\t\t\tif itgt != nil {\n\t\t\t\titgt[tk] = sv\n\t\t\t}\n\t\t}\n\t}\n}\n\n// func ReadBufConfig(buf *bytes.Buffer) error { return v.ReadBufConfig(buf) }\n// func (v *Viper) ReadBufConfig(buf *bytes.Buffer) error {\n// \tv.config = make(map[string]interface{})\n// \treturn v.unmarshalReader(buf, v.config)\n// }\n\n// Attempts to get configuration from a remote source\n// and read it in the remote configuration registry.\nfunc ReadRemoteConfig() error { return v.ReadRemoteConfig() }\nfunc (v *Viper) ReadRemoteConfig() error {\n\terr := v.getKeyValueConfig()\n\tif err != nil {\n\t\treturn err\n\t}\n\treturn nil\n}\n\nfunc WatchRemoteConfig() error { return v.WatchRemoteConfig() }\nfunc (v *Viper) WatchRemoteConfig() error {\n\terr := v.watchKeyValueConfig()\n\tif err != nil {\n\t\treturn err\n\t}\n\treturn nil\n}\n\n// Unmarshall a Reader into a map\n// Should probably be an unexported function\nfunc unmarshalReader(in io.Reader, c map[string]interface{}) error {\n\treturn v.unmarshalReader(in, c)\n}\n\nfunc (v *Viper) unmarshalReader(in io.Reader, c map[string]interface{}) error {\n\treturn unmarshallConfigReader(in, c, v.getConfigType())\n}\n\nfunc (v *Viper) insensitiviseMaps() {\n\tinsensitiviseMap(v.config)\n\tinsensitiviseMap(v.defaults)\n\tinsensitiviseMap(v.override)\n\tinsensitiviseMap(v.kvstore)\n}\n\n// retrieve the first found remote configuration\nfunc (v *Viper) getKeyValueConfig() error {\n\tif RemoteConfig == nil {\n\t\treturn RemoteConfigError(\"Enable the remote features by doing a blank import of the viper/remote package: '_ github.com/spf13/viper/remote'\")\n\t}\n\n\tfor _, rp := range v.remoteProviders {\n\t\tval, err := v.getRemoteConfig(rp)\n\t\tif err != nil {\n\t\t\tcontinue\n\t\t}\n\t\tv.kvstore = val\n\t\treturn nil\n\t}\n\treturn RemoteConfigError(\"No Files Found\")\n}\n\nfunc (v *Viper) getRemoteConfig(provider *defaultRemoteProvider) (map[string]interface{}, error) {\n\n\treader, err := RemoteConfig.Get(provider)\n\tif err != nil {\n\t\treturn nil, err\n\t}\n\terr = v.unmarshalReader(reader, v.kvstore)\n\treturn v.kvstore, err\n}\n\n// retrieve the first found remote configuration\nfunc (v *Viper) watchKeyValueConfig() error {\n\tfor _, rp := range v.remoteProviders {\n\t\tval, err := v.watchRemoteConfig(rp)\n\t\tif err != nil {\n\t\t\tcontinue\n\t\t}\n\t\tv.kvstore = val\n\t\treturn nil\n\t}\n\treturn RemoteConfigError(\"No Files Found\")\n}\n\nfunc (v *Viper) watchRemoteConfig(provider *defaultRemoteProvider) (map[string]interface{}, error) {\n\treader, err := RemoteConfig.Watch(provider)\n\tif err != nil {\n\t\treturn nil, err\n\t}\n\terr = v.unmarshalReader(reader, v.kvstore)\n\treturn v.kvstore, err\n}\n\n// Return all keys regardless where they are set\nfunc AllKeys() []string { return v.AllKeys() }\nfunc (v *Viper) AllKeys() []string {\n\tm := map[string]struct{}{}\n\n\tfor key, _ := range v.defaults {\n\t\tm[strings.ToLower(key)] = struct{}{}\n\t}\n\n\tfor key, _ := range v.pflags {\n\t\tm[strings.ToLower(key)] = struct{}{}\n\t}\n\n\tfor key, _ := range v.env {\n\t\tm[strings.ToLower(key)] = struct{}{}\n\t}\n\n\tfor key, _ := range v.config {\n\t\tm[strings.ToLower(key)] = struct{}{}\n\t}\n\n\tfor key, _ := range v.kvstore {\n\t\tm[strings.ToLower(key)] = struct{}{}\n\t}\n\n\tfor key, _ := range v.override {\n\t\tm[strings.ToLower(key)] = struct{}{}\n\t}\n\n\tfor key, _ := range v.aliases {\n\t\tm[strings.ToLower(key)] = struct{}{}\n\t}\n\n\ta := []string{}\n\tfor x, _ := range m {\n\t\ta = append(a, x)\n\t}\n\n\treturn a\n}\n\n// Return all settings as a map[string]interface{}\nfunc AllSettings() map[string]interface{} { return v.AllSettings() }\nfunc (v *Viper) AllSettings() map[string]interface{} {\n\tm := map[string]interface{}{}\n\tfor _, x := range v.AllKeys() {\n\t\tm[x] = v.Get(x)\n\t}\n\n\treturn m\n}\n\n// Name for the config file.\n// Does not include extension.\nfunc SetConfigName(in string) { v.SetConfigName(in) }\nfunc (v *Viper) SetConfigName(in string) {\n\tif in != \"\" {\n\t\tv.configName = in\n\t}\n}\n\n// Sets the type of the configuration returned by the\n// remote source, e.g. \"json\".\nfunc SetConfigType(in string) { v.SetConfigType(in) }\nfunc (v *Viper) SetConfigType(in string) {\n\tif in != \"\" {\n\t\tv.configType = in\n\t}\n}\n\nfunc (v *Viper) getConfigType() string {\n\tif v.configType != \"\" {\n\t\treturn v.configType\n\t}\n\n\tcf := v.getConfigFile()\n\text := filepath.Ext(cf)\n\n\tif len(ext) > 1 {\n\t\treturn ext[1:]\n\t} else {\n\t\treturn \"\"\n\t}\n}\n\nfunc (v *Viper) getConfigFile() string {\n\t// if explicitly set, then use it\n\tif v.configFile != \"\" {\n\t\treturn v.configFile\n\t}\n\n\tcf, err := v.findConfigFile()\n\tif err != nil {\n\t\treturn \"\"\n\t}\n\n\tv.configFile = cf\n\treturn v.getConfigFile()\n}\n\nfunc (v *Viper) searchInPath(in string) (filename string) {\n\tjww.DEBUG.Println(\"Searching for config in \", in)\n\tfor _, ext := range SupportedExts {\n\t\tjww.DEBUG.Println(\"Checking for\", filepath.Join(in, v.configName+\".\"+ext))\n\t\tif b, _ := exists(filepath.Join(in, v.configName+\".\"+ext)); b {\n\t\t\tjww.DEBUG.Println(\"Found: \", filepath.Join(in, v.configName+\".\"+ext))\n\t\t\treturn filepath.Join(in, v.configName+\".\"+ext)\n\t\t}\n\t}\n\n\treturn \"\"\n}\n\n// search all configPaths for any config file.\n// Returns the first path that exists (and is a config file)\nfunc (v *Viper) findConfigFile() (string, error) {\n\n\tjww.INFO.Println(\"Searching for config in \", v.configPaths)\n\n\tfor _, cp := range v.configPaths {\n\t\tfile := v.searchInPath(cp)\n\t\tif file != \"\" {\n\t\t\treturn file, nil\n\t\t}\n\t}\n\treturn \"\", ConfigFileNotFoundError{v.configName, fmt.Sprintf(\"%s\", v.configPaths)}\n}\n\n// Prints all configuration registries for debugging\n// purposes.\nfunc Debug() { v.Debug() }\nfunc (v *Viper) Debug() {\n\tfmt.Println(\"Aliases:\")\n\tpretty.Println(v.aliases)\n\tfmt.Println(\"Override:\")\n\tpretty.Println(v.override)\n\tfmt.Println(\"PFlags\")\n\tpretty.Println(v.pflags)\n\tfmt.Println(\"Env:\")\n\tpretty.Println(v.env)\n\tfmt.Println(\"Key/Value Store:\")\n\tpretty.Println(v.kvstore)\n\tfmt.Println(\"Config:\")\n\tpretty.Println(v.config)\n\tfmt.Println(\"Defaults:\")\n\tpretty.Println(v.defaults)\n}\n" }, { "path": "tests/runner.rs", "content": "#[macro_use]\nextern crate log;\nextern crate rgo;\nextern crate convenience as cnv;\nextern crate env_logger;\nextern crate colored;\n\nuse colored::*;\n\nuse std::fs;\nuse std::path::{Path, PathBuf};\nuse std::env;\n\nfn flush() {\n use std::io::Write;\n\n ::std::io::stdout().flush().unwrap();\n}\n\nfn test_path>(path: P) -> PathBuf {\n let mut new = PathBuf::from(env!(\"CARGO_MANIFEST_DIR\"));\n new.push(\"tests\");\n new.push(\"data\");\n new.push(path);\n new\n}\n\nfn for_all_in, F: Fn(String) -> U, U>(path: P, f: F) {\n let entries = fs::read_dir(test_path(path)).unwrap();\n for entry in entries {\n let path = entry.unwrap().path();\n let src = cnv::read_file(&path).unwrap();\n debug!(\"processing {}\", path.display());\n f(src);\n }\n}\n\nfn main() {\n env::set_var(\"RUST_LOG\", env::var(\"LOG\").unwrap_or(\"info\".into()));\n env::set_var(\"RUST_BACKTRACE\", \"1\");\n env_logger::init().unwrap();\n\n lexing_does_not_panic();\n parsing_does_not_panic();\n}\n\nfn lexing_does_not_panic() {\n print!(\"making sure lexing doesn't panic... \");\n flush();\n\n for_all_in(\"pass\", |src| {\n rgo::lexer::tokenize(&src);\n });\n println!(\"{}\", \"OK.\".green());\n}\n\nfn parsing_does_not_panic() {\n print!(\"making sure parsing doesn't panic... \");\n flush();\n\n for_all_in(\"pass\", |src| {\n let tokens: Vec<_> = rgo::lexer::Lexer::new(&src).collect();\n match rgo::Parser::new(tokens.clone().into_iter()).parse() {\n Ok(_) => {}\n Err(e) => {\n // println!(\"Tokens:\\n{:?}\", tokens);\n panic!(\"{:?}\", e);\n }\n }\n });\n\n println!(\"{}\", \"OK.\".green());\n}\n" } ]