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Repository: QuantumLeaps/Super-Simple-Tasker
Branch: main
Commit: 41d0d219a2c0
Files: 659
Total size: 13.5 MB
Directory structure:
gitextract_kj309970/
├── .gitignore
├── .vscode/
│ └── settings.json
├── 3rd_party/
│ ├── CMSIS/
│ │ ├── Include/
│ │ │ ├── cmsis_armcc.h
│ │ │ ├── cmsis_armclang.h
│ │ │ ├── cmsis_armclang_ltm.h
│ │ │ ├── cmsis_ccs.h
│ │ │ ├── cmsis_compiler.h
│ │ │ ├── cmsis_gcc.h
│ │ │ ├── cmsis_iccarm.h
│ │ │ ├── cmsis_version.h
│ │ │ ├── core_armv81mml.h
│ │ │ ├── core_armv8mbl.h
│ │ │ ├── core_armv8mml.h
│ │ │ ├── core_cm0.h
│ │ │ ├── core_cm0plus.h
│ │ │ ├── core_cm1.h
│ │ │ ├── core_cm23.h
│ │ │ ├── core_cm3.h
│ │ │ ├── core_cm33.h
│ │ │ ├── core_cm35p.h
│ │ │ ├── core_cm4.h
│ │ │ ├── core_cm7.h
│ │ │ ├── core_sc000.h
│ │ │ ├── core_sc300.h
│ │ │ ├── mpu_armv7.h
│ │ │ ├── mpu_armv8.h
│ │ │ └── tz_context.h
│ │ ├── LICENSE.txt
│ │ └── README.txt
│ ├── ek-tm4c123gxl/
│ │ ├── README.txt
│ │ ├── TM4C123GH6PM.h
│ │ ├── arm/
│ │ │ └── startup_TM4C123GH6PM.s
│ │ ├── gnu/
│ │ │ ├── ek-tm4c123gxl.ld
│ │ │ └── startup_TM4C123GH6PM.c
│ │ ├── gpio.h
│ │ ├── iar/
│ │ │ └── startup_TM4C123GH6PM.s
│ │ ├── rom.h
│ │ ├── sysctl.h
│ │ ├── system_TM4C123GH6PM.c
│ │ └── system_TM4C123GH6PM.h
│ ├── nucleo-c031c6/
│ │ ├── README.txt
│ │ ├── arm/
│ │ │ └── startup_stm32c031xx.s
│ │ ├── gnu/
│ │ │ ├── nucleo-c031c6.ld
│ │ │ └── startup_stm32c031xx.c
│ │ ├── iar/
│ │ │ └── startup_stm32c031xx.s
│ │ ├── stm32c031xx.h
│ │ ├── stm32c0xx.h
│ │ ├── system_stm32c0xx.c
│ │ └── system_stm32c0xx.h
│ ├── nucleo-h743zi/
│ │ ├── README.txt
│ │ ├── arm/
│ │ │ └── startup_stm32h743xx.s
│ │ ├── gnu/
│ │ │ ├── nucleo-h743zi.ld
│ │ │ └── startup_stm32h743xx.c
│ │ ├── iar/
│ │ │ └── startup_stm32h743xx.s
│ │ ├── stm32h743xx.h
│ │ ├── stm32h7xx.h
│ │ ├── system_stm32h7xx.c
│ │ └── system_stm32h7xx.h
│ └── nucleo-l053r8/
│ ├── README.txt
│ ├── arm/
│ │ └── startup_stm32l053xx.s
│ ├── gnu/
│ │ ├── nucleo-l053r8.ld
│ │ └── startup_stm32l053xx.c
│ ├── iar/
│ │ └── startup_stm32l053xx.s
│ ├── stm32l053xx.h
│ ├── stm32l0xx.h
│ ├── system_stm32l0xx.c
│ ├── system_stm32l0xx.c.pll
│ └── system_stm32l0xx.h
├── FreeRTOS-comparison/
│ ├── CMakeLists.txt
│ ├── GitHub-FreeRTOS-Kernel-Home.url
│ ├── History.txt
│ ├── LICENSE.md
│ ├── Quick_Start_Guide.url
│ ├── README.md
│ ├── croutine.c
│ ├── event_groups.c
│ ├── examples/
│ │ ├── blinky/
│ │ │ ├── FreeRTOSConfig.h
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.c
│ │ │ ├── blinky.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ └── main.c
│ │ └── blinky_button/
│ │ ├── FreeRTOSConfig.h
│ │ ├── armclang/
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky1.c
│ │ ├── blinky3.c
│ │ ├── blinky_button.h
│ │ ├── bsp.h
│ │ ├── bsp_nucleo-l053r8.c
│ │ ├── button2a.c
│ │ ├── button2b.c
│ │ └── main.c
│ ├── include/
│ │ ├── FreeRTOS.h
│ │ ├── StackMacros.h
│ │ ├── atomic.h
│ │ ├── croutine.h
│ │ ├── deprecated_definitions.h
│ │ ├── event_groups.h
│ │ ├── list.h
│ │ ├── message_buffer.h
│ │ ├── mpu_prototypes.h
│ │ ├── mpu_wrappers.h
│ │ ├── portable.h
│ │ ├── projdefs.h
│ │ ├── queue.h
│ │ ├── semphr.h
│ │ ├── stack_macros.h
│ │ ├── stdint.readme
│ │ ├── stream_buffer.h
│ │ ├── task.h
│ │ └── timers.h
│ ├── list.c
│ ├── manifest.yml
│ ├── portable/
│ │ ├── ARMClang/
│ │ │ └── Use-the-GCC-ports.txt
│ │ ├── ARMv8M/
│ │ │ ├── ReadMe.txt
│ │ │ ├── copy_files.py
│ │ │ ├── non_secure/
│ │ │ │ ├── ReadMe.txt
│ │ │ │ ├── port.c
│ │ │ │ ├── portable/
│ │ │ │ │ ├── GCC/
│ │ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM33/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM55/
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ └── ARM_CM85/
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ └── IAR/
│ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM33/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM55/
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ └── ARM_CM85/
│ │ │ │ │ └── portmacro.h
│ │ │ │ ├── portasm.h
│ │ │ │ └── portmacrocommon.h
│ │ │ └── secure/
│ │ │ ├── ReadMe.txt
│ │ │ ├── context/
│ │ │ │ ├── portable/
│ │ │ │ │ ├── GCC/
│ │ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ │ └── secure_context_port.c
│ │ │ │ │ │ └── ARM_CM33/
│ │ │ │ │ │ └── secure_context_port.c
│ │ │ │ │ └── IAR/
│ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ └── secure_context_port_asm.s
│ │ │ │ │ └── ARM_CM33/
│ │ │ │ │ └── secure_context_port_asm.s
│ │ │ │ ├── secure_context.c
│ │ │ │ └── secure_context.h
│ │ │ ├── heap/
│ │ │ │ ├── secure_heap.c
│ │ │ │ └── secure_heap.h
│ │ │ ├── init/
│ │ │ │ ├── secure_init.c
│ │ │ │ └── secure_init.h
│ │ │ └── macros/
│ │ │ └── secure_port_macros.h
│ │ ├── CCS/
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.asm
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.asm
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_Cortex-R4/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.asm
│ │ │ │ └── portmacro.h
│ │ │ └── MSP430X/
│ │ │ ├── data_model.h
│ │ │ ├── port.c
│ │ │ ├── portext.asm
│ │ │ └── portmacro.h
│ │ ├── CMakeLists.txt
│ │ ├── Common/
│ │ │ └── mpu_wrappers.c
│ │ ├── GCC/
│ │ │ ├── ARM_CA53_64_BIT/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CA53_64_BIT_SRE/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CA9/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM0/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM23/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM33/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM3_MPU/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4_MPU/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM55/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM55_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM7/
│ │ │ │ ├── ReadMe.txt
│ │ │ │ └── r0p1/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM85/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM85_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CR5/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ └── ARM_CRx_No_GIC/
│ │ │ ├── port.c
│ │ │ ├── portASM.S
│ │ │ └── portmacro.h
│ │ ├── IAR/
│ │ │ ├── ARM_CA5_No_GIC/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.h
│ │ │ │ ├── portASM.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CA9/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.h
│ │ │ │ ├── portASM.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM0/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM23/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM33/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F_MPU/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM55/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM55_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM7/
│ │ │ │ ├── ReadMe.txt
│ │ │ │ └── r0p1/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM85/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM85_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CRx_No_GIC/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.s
│ │ │ │ └── portmacro.h
│ │ │ ├── LPC2000/
│ │ │ │ ├── ISR_Support.h
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s79
│ │ │ │ └── portmacro.h
│ │ │ ├── MSP430/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portext.s43
│ │ │ │ └── portmacro.h
│ │ │ └── MSP430X/
│ │ │ ├── data_model.h
│ │ │ ├── port.c
│ │ │ ├── portext.s43
│ │ │ └── portmacro.h
│ │ ├── Keil/
│ │ │ └── See-also-the-RVDS-directory.txt
│ │ ├── MemMang/
│ │ │ ├── ReadMe.url
│ │ │ ├── heap_1.c
│ │ │ ├── heap_2.c
│ │ │ ├── heap_3.c
│ │ │ ├── heap_4.c
│ │ │ └── heap_5.c
│ │ ├── RVDS/
│ │ │ ├── ARM7_LPC21xx/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacro.inc
│ │ │ ├── ARM_CA9/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacro.inc
│ │ │ ├── ARM_CM0/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4_MPU/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ └── ARM_CM7/
│ │ │ ├── ReadMe.txt
│ │ │ └── r0p1/
│ │ │ ├── port.c
│ │ │ └── portmacro.h
│ │ └── readme.txt
│ ├── queue.c
│ ├── sbom.spdx
│ ├── stream_buffer.c
│ ├── tasks.c
│ ├── timers.c
│ └── version_FeeRTOS-202210-LTS.txt
├── LICENSE
├── README.md
├── img/
│ ├── blinky_button.pvs
│ ├── blinky_press.sr
│ ├── sst0_ek-tm4c.sr
│ └── sst_ek-tm4c.sr
├── include/
│ ├── README.txt
│ ├── dbc_assert.h
│ ├── sst.h
│ └── sst.hpp
├── legacy/
│ ├── README.md
│ ├── example/
│ │ ├── SST_EXA.PRJ
│ │ ├── STDINT.H
│ │ ├── bsp.c
│ │ ├── bsp.h
│ │ ├── kbd_tsk.c
│ │ ├── main.c
│ │ ├── sst_exa.h
│ │ ├── sst_port.h
│ │ └── tick_tsk.c
│ ├── include/
│ │ └── sst.h
│ └── source/
│ └── sst.c
├── sst0_c/
│ ├── README.txt
│ ├── examples/
│ │ ├── README.txt
│ │ ├── blinky/
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.c
│ │ │ ├── blinky.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ ├── gnu/
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.c
│ │ └── blinky_button/
│ │ ├── armclang/
│ │ │ ├── ek-tm4c123gxl.uvoptx
│ │ │ ├── ek-tm4c123gxl.uvprojx
│ │ │ ├── nucleo-c031c6.uvoptx
│ │ │ ├── nucleo-c031c6.uvprojx
│ │ │ ├── nucleo-h743zi.uvoptx
│ │ │ ├── nucleo-h743zi.uvprojx
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky1.c
│ │ ├── blinky3.c
│ │ ├── blinky_button.h
│ │ ├── bsp.h
│ │ ├── bsp_ek-tm4c123gxl.c
│ │ ├── bsp_nucleo-c031c6.c
│ │ ├── bsp_nucleo-h743zi.c
│ │ ├── bsp_nucleo-l053r8.c
│ │ ├── button2a.c
│ │ ├── button2b.c
│ │ ├── gnu/
│ │ │ ├── ek-tm4c123gxl.mak
│ │ │ ├── flash_ek-tm4c123gxl.bat
│ │ │ ├── nucleo-c031c6.mak
│ │ │ ├── nucleo-h743zi.mak
│ │ │ └── nucleo-l053r8.mak
│ │ ├── iar/
│ │ │ ├── ek-tm4c123gxl.ewd
│ │ │ ├── ek-tm4c123gxl.ewp
│ │ │ ├── ek-tm4c123gxl.eww
│ │ │ ├── nucleo-c031c6.ewd
│ │ │ ├── nucleo-c031c6.ewp
│ │ │ ├── nucleo-c031c6.eww
│ │ │ ├── nucleo-h743zi.ewd
│ │ │ ├── nucleo-h743zi.ewp
│ │ │ ├── nucleo-h743zi.eww
│ │ │ ├── nucleo-l053r8.ewd
│ │ │ ├── nucleo-l053r8.ewp
│ │ │ └── nucleo-l053r8.eww
│ │ └── main.c
│ ├── ports/
│ │ └── arm-cm/
│ │ └── sst_port.h
│ └── src/
│ └── sst0.c
├── sst0_cpp/
│ ├── README.txt
│ ├── examples/
│ │ ├── README.txt
│ │ ├── blinky/
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.cpp
│ │ │ ├── blinky.hpp
│ │ │ ├── bsp.hpp
│ │ │ ├── bsp_nucleo-l053r8.cpp
│ │ │ ├── gnu/
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.cpp
│ │ └── blinky_button/
│ │ ├── armclang/
│ │ │ ├── ek-tm4c123gxl.uvoptx
│ │ │ ├── ek-tm4c123gxl.uvprojx
│ │ │ ├── nucleo-c031c6.uvoptx
│ │ │ ├── nucleo-c031c6.uvprojx
│ │ │ ├── nucleo-h743zi.uvoptx
│ │ │ ├── nucleo-h743zi.uvprojx
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky1.cpp
│ │ ├── blinky3.cpp
│ │ ├── blinky_button.hpp
│ │ ├── bsp.hpp
│ │ ├── bsp_ek-tm4c123gxl.cpp
│ │ ├── bsp_nucleo-c031c6.cpp
│ │ ├── bsp_nucleo-h743zi.cpp
│ │ ├── bsp_nucleo-l053r8.cpp
│ │ ├── button2a.cpp
│ │ ├── button2b.cpp
│ │ ├── gnu/
│ │ │ ├── ek-tm4c123gxl.mak
│ │ │ ├── flash_ek-tm4c123gxl.bat
│ │ │ ├── nucleo-c031c6.mak
│ │ │ ├── nucleo-h743zi.mak
│ │ │ └── nucleo-l053r8.mak
│ │ ├── iar/
│ │ │ ├── ek-tm4c123gxl.ewd
│ │ │ ├── ek-tm4c123gxl.ewp
│ │ │ ├── ek-tm4c123gxl.eww
│ │ │ ├── nucleo-c031c6.ewd
│ │ │ ├── nucleo-c031c6.ewp
│ │ │ ├── nucleo-c031c6.eww
│ │ │ ├── nucleo-h743zi.ewd
│ │ │ ├── nucleo-h743zi.ewp
│ │ │ ├── nucleo-h743zi.eww
│ │ │ ├── nucleo-l053r8.ewd
│ │ │ ├── nucleo-l053r8.ewp
│ │ │ └── nucleo-l053r8.eww
│ │ └── main.cpp
│ ├── ports/
│ │ └── arm-cm/
│ │ └── sst_port.hpp
│ └── src/
│ └── sst0.cpp
├── sst_c/
│ ├── README.txt
│ ├── examples/
│ │ ├── README.txt
│ │ ├── blinky/
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.c
│ │ │ ├── blinky.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ ├── gnu/
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.c
│ │ ├── blinky_button/
│ │ │ ├── armclang/
│ │ │ │ ├── ek-tm4c123gxl.uvoptx
│ │ │ │ ├── ek-tm4c123gxl.uvprojx
│ │ │ │ ├── nucleo-c031c6.uvoptx
│ │ │ │ ├── nucleo-c031c6.uvprojx
│ │ │ │ ├── nucleo-h743zi.uvoptx
│ │ │ │ ├── nucleo-h743zi.uvprojx
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky1.c
│ │ │ ├── blinky3.c
│ │ │ ├── blinky_button.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_ek-tm4c123gxl.c
│ │ │ ├── bsp_nucleo-c031c6.c
│ │ │ ├── bsp_nucleo-h743zi.c
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ ├── button2a.c
│ │ │ ├── button2b.c
│ │ │ ├── gnu/
│ │ │ │ ├── ek-tm4c123gxl.mak
│ │ │ │ ├── flash_ek-tm4c123gxl.bat
│ │ │ │ ├── nucleo-c031c6.mak
│ │ │ │ ├── nucleo-h743zi.mak
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── ek-tm4c123gxl.ewd
│ │ │ │ ├── ek-tm4c123gxl.ewp
│ │ │ │ ├── ek-tm4c123gxl.eww
│ │ │ │ ├── nucleo-c031c6.ewd
│ │ │ │ ├── nucleo-c031c6.ewp
│ │ │ │ ├── nucleo-c031c6.eww
│ │ │ │ ├── nucleo-h743zi.ewd
│ │ │ │ ├── nucleo-h743zi.ewp
│ │ │ │ ├── nucleo-h743zi.eww
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.c
│ │ └── blinky_button.X/
│ │ ├── .gitignore
│ │ ├── Makefile
│ │ ├── blinky1.c
│ │ ├── blinky3.c
│ │ ├── blinky_button.h
│ │ ├── bsp.h
│ │ ├── bsp_dspic33ep128gs804.c
│ │ ├── button2a.c
│ │ ├── button2b.c
│ │ ├── configuration_bits.h
│ │ ├── main.c
│ │ ├── nbproject/
│ │ │ ├── configurations.xml
│ │ │ └── project.xml
│ │ ├── system_dspic33ep128gs804.c
│ │ └── system_dspic33ep128gs804.h
│ ├── ports/
│ │ ├── arm-cm/
│ │ │ ├── sst_port.c
│ │ │ └── sst_port.h
│ │ └── dspic/
│ │ ├── sst_port.c
│ │ └── sst_port.h
│ └── src/
│ └── sst.c
└── sst_cpp/
├── README.txt
├── examples/
│ ├── README.txt
│ ├── blinky/
│ │ ├── armclang/
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky.cpp
│ │ ├── blinky.hpp
│ │ ├── bsp.hpp
│ │ ├── bsp_nucleo-l053r8.cpp
│ │ ├── gnu/
│ │ │ └── nucleo-l053r8.mak
│ │ ├── iar/
│ │ │ ├── nucleo-l053r8.ewd
│ │ │ ├── nucleo-l053r8.ewp
│ │ │ └── nucleo-l053r8.eww
│ │ └── main.cpp
│ └── blinky_button/
│ ├── armclang/
│ │ ├── ek-tm4c123gxl.uvoptx
│ │ ├── ek-tm4c123gxl.uvprojx
│ │ ├── nucleo-c031c6.uvoptx
│ │ ├── nucleo-c031c6.uvprojx
│ │ ├── nucleo-h743zi.uvoptx
│ │ ├── nucleo-h743zi.uvprojx
│ │ ├── nucleo-l053r8.uvoptx
│ │ └── nucleo-l053r8.uvprojx
│ ├── blinky1.cpp
│ ├── blinky3.cpp
│ ├── blinky_button.hpp
│ ├── bsp.hpp
│ ├── bsp_ek-tm4c123gxl.cpp
│ ├── bsp_nucleo-c031c6.cpp
│ ├── bsp_nucleo-h743zi.cpp
│ ├── bsp_nucleo-l053r8.cpp
│ ├── button2a.cpp
│ ├── button2b.cpp
│ ├── gnu/
│ │ ├── ek-tm4c123gxl.mak
│ │ ├── flash_ek-tm4c123gxl.bat
│ │ ├── nucleo-c031c6.mak
│ │ ├── nucleo-h743zi.mak
│ │ └── nucleo-l053r8.mak
│ ├── iar/
│ │ ├── ek-tm4c123gxl.ewd
│ │ ├── ek-tm4c123gxl.ewp
│ │ ├── ek-tm4c123gxl.eww
│ │ ├── nucleo-c031c6.ewd
│ │ ├── nucleo-c031c6.ewp
│ │ ├── nucleo-c031c6.eww
│ │ ├── nucleo-h743zi.ewd
│ │ ├── nucleo-h743zi.ewp
│ │ ├── nucleo-h743zi.eww
│ │ ├── nucleo-l053r8.ewd
│ │ ├── nucleo-l053r8.ewp
│ │ └── nucleo-l053r8.eww
│ └── main.cpp
├── ports/
│ └── arm-cm/
│ ├── sst_port.cpp
│ └── sst_port.hpp
└── src/
└── sst.cpp
================================================
FILE CONTENTS
================================================
================================================
FILE: .gitignore
================================================
# build directories
build*/
bin*/
# test directories
test_priv/
================================================
FILE: .vscode/settings.json
================================================
{
"files.associations": {
"system_dspic33ep128gs804.h": "c"
}
}
================================================
FILE: 3rd_party/CMSIS/Include/cmsis_armcc.h
================================================
/**************************************************************************//**
* @file cmsis_armcc.h
* @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
* @version V5.1.0
* @date 08. May 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_ARMCC_H
#define __CMSIS_ARMCC_H
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
#endif
/* CMSIS compiler control architecture macros */
#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
(defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
#define __ARM_ARCH_6M__ 1
#endif
#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
#define __ARM_ARCH_7M__ 1
#endif
#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
#define __ARM_ARCH_7EM__ 1
#endif
/* __ARM_ARCH_8M_BASE__ not applicable */
/* __ARM_ARCH_8M_MAIN__ not applicable */
/* CMSIS compiler control DSP macros */
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __ARM_FEATURE_DSP 1
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE static __forceinline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __declspec(noreturn)
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT __packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION __packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __memory_changed()
#endif
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
#define __PROGRAM_START __main
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET")))
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __enable_irq(); */
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __disable_irq(); */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_INLINE uint32_t __get_CONTROL(void)
{
register uint32_t __regControl __ASM("control");
return(__regControl);
}
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_INLINE void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __ASM("control");
__regControl = control;
}
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_INLINE uint32_t __get_IPSR(void)
{
register uint32_t __regIPSR __ASM("ipsr");
return(__regIPSR);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_INLINE uint32_t __get_APSR(void)
{
register uint32_t __regAPSR __ASM("apsr");
return(__regAPSR);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_INLINE uint32_t __get_xPSR(void)
{
register uint32_t __regXPSR __ASM("xpsr");
return(__regXPSR);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_INLINE uint32_t __get_PSP(void)
{
register uint32_t __regProcessStackPointer __ASM("psp");
return(__regProcessStackPointer);
}
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
{
register uint32_t __regProcessStackPointer __ASM("psp");
__regProcessStackPointer = topOfProcStack;
}
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_INLINE uint32_t __get_MSP(void)
{
register uint32_t __regMainStackPointer __ASM("msp");
return(__regMainStackPointer);
}
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
{
register uint32_t __regMainStackPointer __ASM("msp");
__regMainStackPointer = topOfMainStack;
}
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_INLINE uint32_t __get_PRIMASK(void)
{
register uint32_t __regPriMask __ASM("primask");
return(__regPriMask);
}
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
{
register uint32_t __regPriMask __ASM("primask");
__regPriMask = (priMask);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_INLINE uint32_t __get_BASEPRI(void)
{
register uint32_t __regBasePri __ASM("basepri");
return(__regBasePri);
}
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
{
register uint32_t __regBasePri __ASM("basepri");
__regBasePri = (basePri & 0xFFU);
}
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
register uint32_t __regBasePriMax __ASM("basepri_max");
__regBasePriMax = (basePri & 0xFFU);
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
{
register uint32_t __regFaultMask __ASM("faultmask");
return(__regFaultMask);
}
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
{
register uint32_t __regFaultMask __ASM("faultmask");
__regFaultMask = (faultMask & (uint32_t)1U);
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__STATIC_INLINE uint32_t __get_FPSCR(void)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
return(__regfpscr);
#else
return(0U);
#endif
}
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
__regfpscr = (fpscr);
#else
(void)fpscr;
#endif
}
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() do {\
__schedule_barrier();\
__isb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() do {\
__schedule_barrier();\
__dsb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() do {\
__schedule_barrier();\
__dmb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV __rev
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
#endif
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
}
#endif
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
#define __ROR __ror
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __breakpoint(value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __RBIT __rbit
#else
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
result = value; /* r will be reversed bits of v; first get LSB of v */
for (value >>= 1U; value != 0U; value >>= 1U)
{
result <<= 1U;
result |= value & 1U;
s--;
}
result <<= s; /* shift when v's highest bits are zero */
return result;
}
#endif
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
#define __CLZ __clz
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
#else
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
#else
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
#else
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXB(value, ptr) __strex(value, ptr)
#else
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXH(value, ptr) __strex(value, ptr)
#else
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXW(value, ptr) __strex(value, ptr)
#else
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __clrex
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __ssat
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __usat
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
{
rrx r0, r0
bx lr
}
#endif
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRBT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRHT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRT(value, ptr) __strt(value, ptr)
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __SADD8 __sadd8
#define __QADD8 __qadd8
#define __SHADD8 __shadd8
#define __UADD8 __uadd8
#define __UQADD8 __uqadd8
#define __UHADD8 __uhadd8
#define __SSUB8 __ssub8
#define __QSUB8 __qsub8
#define __SHSUB8 __shsub8
#define __USUB8 __usub8
#define __UQSUB8 __uqsub8
#define __UHSUB8 __uhsub8
#define __SADD16 __sadd16
#define __QADD16 __qadd16
#define __SHADD16 __shadd16
#define __UADD16 __uadd16
#define __UQADD16 __uqadd16
#define __UHADD16 __uhadd16
#define __SSUB16 __ssub16
#define __QSUB16 __qsub16
#define __SHSUB16 __shsub16
#define __USUB16 __usub16
#define __UQSUB16 __uqsub16
#define __UHSUB16 __uhsub16
#define __SASX __sasx
#define __QASX __qasx
#define __SHASX __shasx
#define __UASX __uasx
#define __UQASX __uqasx
#define __UHASX __uhasx
#define __SSAX __ssax
#define __QSAX __qsax
#define __SHSAX __shsax
#define __USAX __usax
#define __UQSAX __uqsax
#define __UHSAX __uhsax
#define __USAD8 __usad8
#define __USADA8 __usada8
#define __SSAT16 __ssat16
#define __USAT16 __usat16
#define __UXTB16 __uxtb16
#define __UXTAB16 __uxtab16
#define __SXTB16 __sxtb16
#define __SXTAB16 __sxtab16
#define __SMUAD __smuad
#define __SMUADX __smuadx
#define __SMLAD __smlad
#define __SMLADX __smladx
#define __SMLALD __smlald
#define __SMLALDX __smlaldx
#define __SMUSD __smusd
#define __SMUSDX __smusdx
#define __SMLSD __smlsd
#define __SMLSDX __smlsdx
#define __SMLSLD __smlsld
#define __SMLSLDX __smlsldx
#define __SEL __sel
#define __QADD __qadd
#define __QSUB __qsub
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
((int64_t)(ARG3) << 32U) ) >> 32U))
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CMSIS_ARMCC_H */
================================================
FILE: 3rd_party/CMSIS/Include/cmsis_armclang.h
================================================
/**************************************************************************//**
* @file cmsis_armclang.h
* @brief CMSIS compiler armclang (Arm Compiler 6) header file
* @version V5.2.0
* @date 08. May 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
#ifndef __CMSIS_ARMCLANG_H
#define __CMSIS_ARMCLANG_H
#pragma clang system_header /* treat file as system include file */
#ifndef __ARM_COMPAT_H
#include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __ASM volatile("":::"memory")
#endif
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
#define __PROGRAM_START __main
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET")))
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __enable_irq(); see arm_compat.h */
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __disable_irq(); see arm_compat.h */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Control Register (non-secure)
\details Returns the content of the non-secure Control Register when in secure mode.
\return non-secure Control Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Control Register (non-secure)
\details Writes the given value to the non-secure Control Register when in secure state.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
{
__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
}
#endif
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return(result);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_APSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
return(result);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
return(result);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer (non-secure)
\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
}
#endif
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer (non-secure)
\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
}
#endif
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Stack Pointer (non-secure)
\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
\return SP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
return(result);
}
/**
\brief Set Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
\param [in] topOfStack Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
{
__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
}
#endif
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Priority Mask (non-secure)
\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Priority Mask (non-secure)
\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
{
__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
}
#endif
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq /* see arm_compat.h */
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq /* see arm_compat.h */
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Base Priority (non-secure)
\details Returns the current value of the non-secure Base Priority register when in secure state.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
{
__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Base Priority (non-secure)
\details Assigns the given value to the non-secure Base Priority register when in secure state.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
{
__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
}
#endif
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Fault Mask (non-secure)
\details Returns the current value of the non-secure Fault Mask register when in secure state.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Fault Mask (non-secure)
\details Assigns the given value to the non-secure Fault Mask register when in secure state.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
}
#endif
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief Get Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
#endif
}
#endif
/**
\brief Get Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
\param [in] MainStackPtrLimit Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
#endif
}
#endif
#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
#else
#define __get_FPSCR() ((uint32_t)0U)
#endif
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __set_FPSCR __builtin_arm_set_fpscr
#else
#define __set_FPSCR(x) ((void)(x))
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/* Define macros for porting to both thumb1 and thumb2.
* For thumb1, use low register (r0-r7), specified by constraint "l"
* Otherwise, use general registers, specified by constraint "r" */
#if defined (__thumb__) && !defined (__thumb2__)
#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
#define __CMSIS_GCC_RW_REG(r) "+l" (r)
#define __CMSIS_GCC_USE_REG(r) "l" (r)
#else
#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define __CMSIS_GCC_RW_REG(r) "+r" (r)
#define __CMSIS_GCC_USE_REG(r) "r" (r)
#endif
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __builtin_arm_nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __builtin_arm_wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __builtin_arm_wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __builtin_arm_sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() __builtin_arm_isb(0xF)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() __builtin_arm_dsb(0xF)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() __builtin_arm_dmb(0xF)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV(value) __builtin_bswap32(value)
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV16(value) __ROR(__REV(value), 16)
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REVSH(value) (int16_t)__builtin_bswap16(value)
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
{
op2 %= 32U;
if (op2 == 0U)
{
return op1;
}
return (op1 >> op2) | (op1 << (32U - op2));
}
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __ASM volatile ("bkpt "#value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __RBIT __builtin_arm_rbit
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
{
/* Even though __builtin_clz produces a CLZ instruction on ARM, formally
__builtin_clz(0) is undefined behaviour, so handle this case specially.
This guarantees ARM-compatible results if happening to compile on a non-ARM
target, and ensures the compiler doesn't decide to activate any
optimisations using the logic "value was passed to __builtin_clz, so it
is non-zero".
ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
single CLZ instruction.
*/
if (value == 0U)
{
return 32U;
}
return __builtin_clz(value);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDREXB (uint8_t)__builtin_arm_ldrex
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDREXH (uint16_t)__builtin_arm_ldrex
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDREXW (uint32_t)__builtin_arm_ldrex
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXB (uint32_t)__builtin_arm_strex
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXH (uint32_t)__builtin_arm_strex
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXW (uint32_t)__builtin_arm_strex
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __builtin_arm_clrex
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __builtin_arm_ssat
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __builtin_arm_usat
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
{
uint32_t result;
__ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
return(result);
}
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
{
uint32_t result;
__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint8_t) result); /* Add explicit type cast here */
}
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
{
uint32_t result;
__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint16_t) result); /* Add explicit type cast here */
}
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
}
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief Load-Acquire (8 bit)
\details Executes a LDAB instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
{
uint32_t result;
__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint8_t) result);
}
/**
\brief Load-Acquire (16 bit)
\details Executes a LDAH instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
{
uint32_t result;
__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint16_t) result);
}
/**
\brief Load-Acquire (32 bit)
\details Executes a LDA instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
/**
\brief Store-Release (8 bit)
\details Executes a STLB instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Store-Release (16 bit)
\details Executes a STLH instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Store-Release (32 bit)
\details Executes a STL instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Load-Acquire Exclusive (8 bit)
\details Executes a LDAB exclusive instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDAEXB (uint8_t)__builtin_arm_ldaex
/**
\brief Load-Acquire Exclusive (16 bit)
\details Executes a LDAH exclusive instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDAEXH (uint16_t)__builtin_arm_ldaex
/**
\brief Load-Acquire Exclusive (32 bit)
\details Executes a LDA exclusive instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDAEX (uint32_t)__builtin_arm_ldaex
/**
\brief Store-Release Exclusive (8 bit)
\details Executes a STLB exclusive instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STLEXB (uint32_t)__builtin_arm_stlex
/**
\brief Store-Release Exclusive (16 bit)
\details Executes a STLH exclusive instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STLEXH (uint32_t)__builtin_arm_stlex
/**
\brief Store-Release Exclusive (32 bit)
\details Executes a STL exclusive instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STLEX (uint32_t)__builtin_arm_stlex
#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
#define __SADD8 __builtin_arm_sadd8
#define __QADD8 __builtin_arm_qadd8
#define __SHADD8 __builtin_arm_shadd8
#define __UADD8 __builtin_arm_uadd8
#define __UQADD8 __builtin_arm_uqadd8
#define __UHADD8 __builtin_arm_uhadd8
#define __SSUB8 __builtin_arm_ssub8
#define __QSUB8 __builtin_arm_qsub8
#define __SHSUB8 __builtin_arm_shsub8
#define __USUB8 __builtin_arm_usub8
#define __UQSUB8 __builtin_arm_uqsub8
#define __UHSUB8 __builtin_arm_uhsub8
#define __SADD16 __builtin_arm_sadd16
#define __QADD16 __builtin_arm_qadd16
#define __SHADD16 __builtin_arm_shadd16
#define __UADD16 __builtin_arm_uadd16
#define __UQADD16 __builtin_arm_uqadd16
#define __UHADD16 __builtin_arm_uhadd16
#define __SSUB16 __builtin_arm_ssub16
#define __QSUB16 __builtin_arm_qsub16
#define __SHSUB16 __builtin_arm_shsub16
#define __USUB16 __builtin_arm_usub16
#define __UQSUB16 __builtin_arm_uqsub16
#define __UHSUB16 __builtin_arm_uhsub16
#define __SASX __builtin_arm_sasx
#define __QASX __builtin_arm_qasx
#define __SHASX __builtin_arm_shasx
#define __UASX __builtin_arm_uasx
#define __UQASX __builtin_arm_uqasx
#define __UHASX __builtin_arm_uhasx
#define __SSAX __builtin_arm_ssax
#define __QSAX __builtin_arm_qsax
#define __SHSAX __builtin_arm_shsax
#define __USAX __builtin_arm_usax
#define __UQSAX __builtin_arm_uqsax
#define __UHSAX __builtin_arm_uhsax
#define __USAD8 __builtin_arm_usad8
#define __USADA8 __builtin_arm_usada8
#define __SSAT16 __builtin_arm_ssat16
#define __USAT16 __builtin_arm_usat16
#define __UXTB16 __builtin_arm_uxtb16
#define __UXTAB16 __builtin_arm_uxtab16
#define __SXTB16 __builtin_arm_sxtb16
#define __SXTAB16 __builtin_arm_sxtab16
#define __SMUAD __builtin_arm_smuad
#define __SMUADX __builtin_arm_smuadx
#define __SMLAD __builtin_arm_smlad
#define __SMLADX __builtin_arm_smladx
#define __SMLALD __builtin_arm_smlald
#define __SMLALDX __builtin_arm_smlaldx
#define __SMUSD __builtin_arm_smusd
#define __SMUSDX __builtin_arm_smusdx
#define __SMLSD __builtin_arm_smlsd
#define __SMLSDX __builtin_arm_smlsdx
#define __SMLSLD __builtin_arm_smlsld
#define __SMLSLDX __builtin_arm_smlsldx
#define __SEL __builtin_arm_sel
#define __QADD __builtin_arm_qadd
#define __QSUB __builtin_arm_qsub
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
{
int32_t result;
__ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
#endif /* (__ARM_FEATURE_DSP == 1) */
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CMSIS_ARMCLANG_H */
================================================
FILE: 3rd_party/CMSIS/Include/cmsis_armclang_ltm.h
================================================
/**************************************************************************//**
* @file cmsis_armclang_ltm.h
* @brief CMSIS compiler armclang (Arm Compiler 6) header file
* @version V1.2.0
* @date 08. May 2019
******************************************************************************/
/*
* Copyright (c) 2018-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
#ifndef __CMSIS_ARMCLANG_H
#define __CMSIS_ARMCLANG_H
#pragma clang system_header /* treat file as system include file */
#ifndef __ARM_COMPAT_H
#include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __ASM volatile("":::"memory")
#endif
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
#define __PROGRAM_START __main
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET")))
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __enable_irq(); see arm_compat.h */
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __disable_irq(); see arm_compat.h */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Control Register (non-secure)
\details Returns the content of the non-secure Control Register when in secure mode.
\return non-secure Control Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Control Register (non-secure)
\details Writes the given value to the non-secure Control Register when in secure state.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
{
__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
}
#endif
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return(result);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_APSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
return(result);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
return(result);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer (non-secure)
\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
}
#endif
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer (non-secure)
\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
}
#endif
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Stack Pointer (non-secure)
\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
\return SP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
return(result);
}
/**
\brief Set Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
\param [in] topOfStack Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
{
__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
}
#endif
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Priority Mask (non-secure)
\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Priority Mask (non-secure)
\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
{
__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
}
#endif
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq /* see arm_compat.h */
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq /* see arm_compat.h */
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Base Priority (non-secure)
\details Returns the current value of the non-secure Base Priority register when in secure state.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
{
__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Base Priority (non-secure)
\details Assigns the given value to the non-secure Base Priority register when in secure state.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
{
__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
}
#endif
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Fault Mask (non-secure)
\details Returns the current value of the non-secure Fault Mask register when in secure state.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Fault Mask (non-secure)
\details Assigns the given value to the non-secure Fault Mask register when in secure state.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
}
#endif
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief Get Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
#endif
}
#endif
/**
\brief Get Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
\param [in] MainStackPtrLimit Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
#endif
}
#endif
#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
#else
#define __get_FPSCR() ((uint32_t)0U)
#endif
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __set_FPSCR __builtin_arm_set_fpscr
#else
#define __set_FPSCR(x) ((void)(x))
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/* Define macros for porting to both thumb1 and thumb2.
* For thumb1, use low register (r0-r7), specified by constraint "l"
* Otherwise, use general registers, specified by constraint "r" */
#if defined (__thumb__) && !defined (__thumb2__)
#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
#define __CMSIS_GCC_USE_REG(r) "l" (r)
#else
#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define __CMSIS_GCC_USE_REG(r) "r" (r)
#endif
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __builtin_arm_nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __builtin_arm_wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __builtin_arm_wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __builtin_arm_sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() __builtin_arm_isb(0xF)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() __builtin_arm_dsb(0xF)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() __builtin_arm_dmb(0xF)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV(value) __builtin_bswap32(value)
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV16(value) __ROR(__REV(value), 16)
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REVSH(value) (int16_t)__builtin_bswap16(value)
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
{
op2 %= 32U;
if (op2 == 0U)
{
return op1;
}
return (op1 >> op2) | (op1 << (32U - op2));
}
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __ASM volatile ("bkpt "#value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __RBIT __builtin_arm_rbit
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
{
/* Even though __builtin_clz produces a CLZ instruction on ARM, formally
__builtin_clz(0) is undefined behaviour, so handle this case specially.
This guarantees ARM-compatible results if happening to compile on a non-ARM
target, and ensures the compiler doesn't decide to activate any
optimisations using the logic "value was passed to __builtin_clz, so it
is non-zero".
ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
single CLZ instruction.
*/
if (value == 0U)
{
return 32U;
}
return __builtin_clz(value);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDREXB (uint8_t)__builtin_arm_ldrex
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDREXH (uint16_t)__builtin_arm_ldrex
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDREXW (uint32_t)__builtin_arm_ldrex
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXB (uint32_t)__builtin_arm_strex
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXH (uint32_t)__builtin_arm_strex
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXW (uint32_t)__builtin_arm_strex
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __builtin_arm_clrex
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __builtin_arm_ssat
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __builtin_arm_usat
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
{
uint32_t result;
__ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
return(result);
}
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
{
uint32_t result;
__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint8_t) result); /* Add explicit type cast here */
}
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
{
uint32_t result;
__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint16_t) result); /* Add explicit type cast here */
}
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
}
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief Load-Acquire (8 bit)
\details Executes a LDAB instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
{
uint32_t result;
__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint8_t) result);
}
/**
\brief Load-Acquire (16 bit)
\details Executes a LDAH instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
{
uint32_t result;
__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint16_t) result);
}
/**
\brief Load-Acquire (32 bit)
\details Executes a LDA instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
/**
\brief Store-Release (8 bit)
\details Executes a STLB instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Store-Release (16 bit)
\details Executes a STLH instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Store-Release (32 bit)
\details Executes a STL instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Load-Acquire Exclusive (8 bit)
\details Executes a LDAB exclusive instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDAEXB (uint8_t)__builtin_arm_ldaex
/**
\brief Load-Acquire Exclusive (16 bit)
\details Executes a LDAH exclusive instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDAEXH (uint16_t)__builtin_arm_ldaex
/**
\brief Load-Acquire Exclusive (32 bit)
\details Executes a LDA exclusive instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDAEX (uint32_t)__builtin_arm_ldaex
/**
\brief Store-Release Exclusive (8 bit)
\details Executes a STLB exclusive instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STLEXB (uint32_t)__builtin_arm_stlex
/**
\brief Store-Release Exclusive (16 bit)
\details Executes a STLH exclusive instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STLEXH (uint32_t)__builtin_arm_stlex
/**
\brief Store-Release Exclusive (32 bit)
\details Executes a STL exclusive instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STLEX (uint32_t)__builtin_arm_stlex
#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
#define __SSAT16(ARG1,ARG2) \
({ \
int32_t __RES, __ARG1 = (ARG1); \
__ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
#define __USAT16(ARG1,ARG2) \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
{
uint32_t result;
__ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
return(result);
}
__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
{
uint32_t result;
__ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
return(result);
}
__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
uint64_t w64;
} llr;
llr.w64 = acc;
#ifndef __ARMEB__ /* Little endian */
__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
#else /* Big endian */
__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
#endif
return(llr.w64);
}
__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
uint64_t w64;
} llr;
llr.w64 = acc;
#ifndef __ARMEB__ /* Little endian */
__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
#else /* Big endian */
__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
#endif
return(llr.w64);
}
__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
uint64_t w64;
} llr;
llr.w64 = acc;
#ifndef __ARMEB__ /* Little endian */
__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
#else /* Big endian */
__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
#endif
return(llr.w64);
}
__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
uint64_t w64;
} llr;
llr.w64 = acc;
#ifndef __ARMEB__ /* Little endian */
__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
#else /* Big endian */
__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
#endif
return(llr.w64);
}
__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
{
int32_t result;
__ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
{
int32_t result;
__ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
{
int32_t result;
__ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
#endif /* (__ARM_FEATURE_DSP == 1) */
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CMSIS_ARMCLANG_H */
================================================
FILE: 3rd_party/CMSIS/Include/cmsis_ccs.h
================================================
//*****************************************************************************
//
// Copyright (C) 2012 - 2017 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// MSP432 Family CMSIS Definitions
//
//****************************************************************************
#ifndef CMSIS_CCS_H_
#define CMSIS_CCS_H_
//*****************************************************************************
// CMSIS-compatible instruction calls
//*****************************************************************************
//
// v5e, v6, Cortex-M3, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
//
#define __CLZ _norm
#define __SXTB _sxtb
#define __SXTH _sxth
#define __UXTB _uxtb
#define __UXTH _uxth
// CCS supports intrinsics to take advantage of the shift operand left/right
// before saturation extension of SSAT, but CMSIS does not take advantage
// of those, so tell the compiler to use a sat & shift left with a shift
// value of 0 whenever it encounters an SSAT
#define __SSAT(VAL, BITPOS) \
_ssatl(VAL , 0, BITPOS)
//
// Only define M4 based intrinsics if we're not using an M4
//
#if defined (__TI_TMS470_V7M4__)
//
// Add definitions for enable and disable interrupts
//
#if defined (__TI_COMPILER_VERSION__)
#if (__TI_COMPILER_VERSION__ >= 5002000)
#define __enable_irq _enable_IRQ
#define __disable_irq _disable_IRQ
// No Operation
#define __NOP __nop
// Data Synchronization Barrier
#define __DSB _dsb
#define __ISB _isb
#define __WFI() __asm(" wfi")
#elif (__TI_COMPILER_VERSION__ >= 4009000)
#define __enable_fault_irq _enable_interrupts
#define __disable_fault_irq _disable_interrupts
// No Operation
__attribute__( ( always_inline ) ) static inline void __nop(void)
{
__asm(" nop");
}
__attribute__( ( always_inline ) ) static inline void __NOP(void)
{
__asm(" nop");
}
// Data Synchronization Barrier
__attribute__( ( always_inline ) ) static inline void __DSB(void)
{
__asm(" dsb");
}
__attribute__( ( always_inline ) ) static inline void __ISB(void)
{
__asm(" isb");
}
__attribute__( ( always_inline ) ) static inline void __WFI(void)
{
__asm(" wfi");
}
#endif /*__TI_COMPILER_VERSION__ version*/
#endif /*__TI_COMPILER_VERSION__*/
//
// V5E, V6, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
//
#define __ROR __ror
#define __SXTB16(src) _sxtb16((src),0)
#define __QADD _sadd
#define __QDADD _sdadd
#define __QDSUB _sdsub
#define __SMLABB _smlabb
#define __SMLABT _smlabt
#define __SMLALBB _smlalbb
#define __SMLALBT _smlalbt
#define __SMLALTB _smlaltb
#define __SMLALTT _smlaltt
#define __SMLATB _smlatb
#define __SMLATT _smlatt
#define __SMLAWB _smlawb
#define __SMLAWT _smlawt
#define __SMULBB _smulbb
#define __SMULBT _smulbt
#define __SMULTB _smultb
#define __SMULTT _smultt
#define __SMULWB _smulwb
#define __SMULWT _smulwt
#define __QSUB _ssub
#define __SUBC _subc
//
// v6, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
//
#define __SHASX _shaddsubx
#define __SHSAX _shsubaddx
#define __PKHBT _pkhbt
#define __PKHTB _pkhtb
#define __QADD16 _qadd16
#define __QADD8 _qadd8
#define __QSUB16 _qsub16
#define __QSUB8 _qsub8
#define __QASX _saddsubx
#define __QSAX _qsubaddx
#define __SADD16 _sadd16
#define __SADD8 _sadd8
#define __SASX _saddsubx
#define __SEL _sel
#define __SHADD16 _shadd16
#define __SHADD8 _shadd8
#define __SHSUB16 _shsub16
#define __SHSUB8 _shsub8
#define __SMLAD _smlad
#define __SMLADX _smladx
#define __SMLALD(src1, src2, accumulator) _smlald(accumulator, src1, src2)
#define __SMLALDX _smlaldx
#define __SMLSD _smlsd
#define __SMLSDX _smlsdx
#define __SMLSLD _smlsld
#define __SMLSLDX _smlsldx
#define __SMMLA _smmla
#define __SMMLAR _smmlar
#define __SMMLS _smmls
#define __SMMLSR _smmlsr
#define __SMMUL _smmul
#define __SMMULR _smmulr
#define __SMUAD _smuad
#define __SMUADX _smuadx
#define __SMUSD _smusd
#define __SMUSDX _smusdx
#define __SSAT16 _ssat16
#define __SSUB16 _ssub16
#define __SSUB8 _ssub8
#define __SSAX _ssubaddx
#define __SXTAB _sxtab
#define __SXTAB16 _sxtab16
#define __SXTAH _sxtah
#define __UMAAL _umaal
#define __UADD16 _uadd16
#define __UADD8 _uadd8
#define __UHADD16 _uhadd16
#define __UHADD8 _uhadd8
#define __UASX _uaddsubx
#define __UHSUB16 _uhsub16
#define __UHSUB8 _uhsub8
#define __UQADD16 _uqadd16
#define __UQADD8 _uqadd8
#define __UQASX _uqaddsubx
#define __UQSUB16 _uqsub16
#define __UQSUB8 _uqsub8
#define __UQSAX _uqsubaddx
#define __USAD8 _usad8
#define __USAT16 _usat16
#define __USUB16 _usub16
#define __USUB8 _usub8
#define __USAX _usubaddx
#define __UXTAB _uxtab
#define __UXTAB16 _uxtab16
#define __UXTAH _uxtah
#define __UXTB16 _uxtb16
#endif /*__TI_TMS470_V7M4__*/
#endif /*CMSIS_CCS_H_*/
================================================
FILE: 3rd_party/CMSIS/Include/cmsis_compiler.h
================================================
/**************************************************************************//**
* @file cmsis_compiler.h
* @brief CMSIS compiler generic header file
* @version V5.1.0
* @date 09. October 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_COMPILER_H
#define __CMSIS_COMPILER_H
#include <stdint.h>
/*
* Arm Compiler 4/5
*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*
* Arm Compiler 6.6 LTM (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
#include "cmsis_armclang_ltm.h"
/*
* Arm Compiler above 6.10.1 (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
#include "cmsis_armclang.h"
/*
* GNU Compiler
*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*
* IAR Compiler
*/
#elif defined ( __ICCARM__ )
#include <cmsis_iccarm.h>
/*
* TI Arm Compiler
*/
#elif defined ( __TI_ARM__ )
#include <cmsis_ccs.h>
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* TASKING Compiler
*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __packed__
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __packed__
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __packed__
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __packed__ T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __align(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* COSMIC Compiler
*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#ifndef __ASM
#define __ASM _asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
// NO RETURN is automatically detected hence no warning here
#define __NO_RETURN
#endif
#ifndef __USED
#warning No compiler specific solution for __USED. __USED is ignored.
#define __USED
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __PACKED
#define __PACKED @packed
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT @packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION @packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
@packed struct T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#else
#error Unknown compiler.
#endif
#endif /* __CMSIS_COMPILER_H */
================================================
FILE: 3rd_party/CMSIS/Include/cmsis_gcc.h
================================================
/**************************************************************************//**
* @file cmsis_gcc.h
* @brief CMSIS compiler GCC header file
* @version V5.2.0
* @date 08. May 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_GCC_H
#define __CMSIS_GCC_H
/* ignore some GCC warnings */
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wsign-conversion"
#pragma GCC diagnostic ignored "-Wconversion"
#pragma GCC diagnostic ignored "-Wunused-parameter"
/* Fallback for __has_builtin */
#ifndef __has_builtin
#define __has_builtin(x) (0)
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#pragma GCC diagnostic pop
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#pragma GCC diagnostic pop
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#pragma GCC diagnostic pop
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#pragma GCC diagnostic pop
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#pragma GCC diagnostic pop
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __ASM volatile("":::"memory")
#endif
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
/**
\brief Initializes data and bss sections
\details This default implementations initialized all data and additional bss
sections relying on .copy.table and .zero.table specified properly
in the used linker script.
*/
__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
{
extern void _start(void) __NO_RETURN;
typedef struct {
uint32_t const* src;
uint32_t* dest;
uint32_t wlen;
} __copy_table_t;
typedef struct {
uint32_t* dest;
uint32_t wlen;
} __zero_table_t;
extern const __copy_table_t __copy_table_start__;
extern const __copy_table_t __copy_table_end__;
extern const __zero_table_t __zero_table_start__;
extern const __zero_table_t __zero_table_end__;
for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
for(uint32_t i=0u; i<pTable->wlen; ++i) {
pTable->dest[i] = pTable->src[i];
}
}
for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
for(uint32_t i=0u; i<pTable->wlen; ++i) {
pTable->dest[i] = 0u;
}
}
_start();
}
#define __PROGRAM_START __cmsis_start
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP __StackTop
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT __StackLimit
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __enable_irq(void)
{
__ASM volatile ("cpsie i" : : : "memory");
}
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
}
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Control Register (non-secure)
\details Returns the content of the non-secure Control Register when in secure mode.
\return non-secure Control Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Control Register (non-secure)
\details Writes the given value to the non-secure Control Register when in secure state.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
{
__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
}
#endif
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return(result);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_APSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
return(result);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
return(result);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer (non-secure)
\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
}
#endif
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer (non-secure)
\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
}
#endif
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Stack Pointer (non-secure)
\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
\return SP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
return(result);
}
/**
\brief Set Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
\param [in] topOfStack Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
{
__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
}
#endif
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Priority Mask (non-secure)
\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
return(result);
}
#endif
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Priority Mask (non-secure)
\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
{
__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
}
#endif
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __enable_fault_irq(void)
{
__ASM volatile ("cpsie f" : : : "memory");
}
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_fault_irq(void)
{
__ASM volatile ("cpsid f" : : : "memory");
}
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Base Priority (non-secure)
\details Returns the current value of the non-secure Base Priority register when in secure state.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
{
__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Base Priority (non-secure)
\details Assigns the given value to the non-secure Base Priority register when in secure state.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
{
__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
}
#endif
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Fault Mask (non-secure)
\details Returns the current value of the non-secure Fault Mask register when in secure state.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Fault Mask (non-secure)
\details Assigns the given value to the non-secure Fault Mask register when in secure state.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
}
#endif
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief Get Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
#endif
}
#endif
/**
\brief Get Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
\param [in] MainStackPtrLimit Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
#endif
}
#endif
#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#if __has_builtin(__builtin_arm_get_fpscr)
// Re-enable using built-in when GCC has been fixed
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
return __builtin_arm_get_fpscr();
#else
uint32_t result;
__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
return(result);
#endif
#else
return(0U);
#endif
}
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#if __has_builtin(__builtin_arm_set_fpscr)
// Re-enable using built-in when GCC has been fixed
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
__builtin_arm_set_fpscr(fpscr);
#else
__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
#endif
#else
(void)fpscr;
#endif
}
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/* Define macros for porting to both thumb1 and thumb2.
* For thumb1, use low register (r0-r7), specified by constraint "l"
* Otherwise, use general registers, specified by constraint "r" */
#if defined (__thumb__) && !defined (__thumb2__)
#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
#define __CMSIS_GCC_RW_REG(r) "+l" (r)
#define __CMSIS_GCC_USE_REG(r) "l" (r)
#else
#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define __CMSIS_GCC_RW_REG(r) "+r" (r)
#define __CMSIS_GCC_USE_REG(r) "r" (r)
#endif
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP() __ASM volatile ("nop")
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI() __ASM volatile ("wfi")
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE() __ASM volatile ("wfe")
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV() __ASM volatile ("sev")
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
__STATIC_FORCEINLINE void __ISB(void)
{
__ASM volatile ("isb 0xF":::"memory");
}
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
__STATIC_FORCEINLINE void __DSB(void)
{
__ASM volatile ("dsb 0xF":::"memory");
}
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
__STATIC_FORCEINLINE void __DMB(void)
{
__ASM volatile ("dmb 0xF":::"memory");
}
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
{
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
return __builtin_bswap32(value);
#else
uint32_t result;
__ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
return result;
#endif
}
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
{
uint32_t result;
__ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
return result;
}
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
{
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
return (int16_t)__builtin_bswap16(value);
#else
int16_t result;
__ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
return result;
#endif
}
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
{
op2 %= 32U;
if (op2 == 0U)
{
return op1;
}
return (op1 >> op2) | (op1 << (32U - op2));
}
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __ASM volatile ("bkpt "#value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
#else
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
result = value; /* r will be reversed bits of v; first get LSB of v */
for (value >>= 1U; value != 0U; value >>= 1U)
{
result <<= 1U;
result |= value & 1U;
s--;
}
result <<= s; /* shift when v's highest bits are zero */
#endif
return result;
}
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
{
/* Even though __builtin_clz produces a CLZ instruction on ARM, formally
__builtin_clz(0) is undefined behaviour, so handle this case specially.
This guarantees ARM-compatible results if happening to compile on a non-ARM
target, and ensures the compiler doesn't decide to activate any
optimisations using the logic "value was passed to __builtin_clz, so it
is non-zero".
ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
single CLZ instruction.
*/
if (value == 0U)
{
return 32U;
}
return __builtin_clz(value);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
{
uint32_t result;
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
__ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
#else
/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
accepted by assembler. So has to use following less efficient pattern.
*/
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
#endif
return ((uint8_t) result); /* Add explicit type cast here */
}
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
{
uint32_t result;
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
__ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
#else
/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
accepted by assembler. So has to use following less efficient pattern.
*/
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
#endif
return ((uint16_t) result); /* Add explicit type cast here */
}
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
return(result);
}
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
{
uint32_t result;
__ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
return(result);
}
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
{
uint32_t result;
__ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
return(result);
}
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
return(result);
}
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
__STATIC_FORCEINLINE void __CLREX(void)
{
__ASM volatile ("clrex" ::: "memory");
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] ARG1 Value to be saturated
\param [in] ARG2 Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT(ARG1,ARG2) \
__extension__ \
({ \
int32_t __RES, __ARG1 = (ARG1); \
__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] ARG1 Value to be saturated
\param [in] ARG2 Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT(ARG1,ARG2) \
__extension__ \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
{
uint32_t result;
__ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
return(result);
}
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
{
uint32_t result;
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
#else
/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
accepted by assembler. So has to use following less efficient pattern.
*/
__ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
#endif
return ((uint8_t) result); /* Add explicit type cast here */
}
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
{
uint32_t result;
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
#else
/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
accepted by assembler. So has to use following less efficient pattern.
*/
__ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
#endif
return ((uint16_t) result); /* Add explicit type cast here */
}
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
}
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief Load-Acquire (8 bit)
\details Executes a LDAB instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
{
uint32_t result;
__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint8_t) result);
}
/**
\brief Load-Acquire (16 bit)
\details Executes a LDAH instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
{
uint32_t result;
__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint16_t) result);
}
/**
\brief Load-Acquire (32 bit)
\details Executes a LDA instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
/**
\brief Store-Release (8 bit)
\details Executes a STLB instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Store-Release (16 bit)
\details Executes a STLH instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Store-Release (32 bit)
\details Executes a STL instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
/**
\brief Load-Acquire Exclusive (8 bit)
\details Executes a LDAB exclusive instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
{
uint32_t result;
__ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint8_t) result);
}
/**
\brief Load-Acquire Exclusive (16 bit)
\details Executes a LDAH exclusive instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
{
uint32_t result;
__ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
return ((uint16_t) result);
}
/**
\brief Load-Acquire Exclusive (32 bit)
\details Executes a LDA exclusive instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
/**
\brief Store-Release Exclusive (8 bit)
\details Executes a STLB exclusive instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
{
uint32_t result;
__ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
return(result);
}
/**
\brief Store-Release Exclusive (16 bit)
\details Executes a STLH exclusive instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
{
uint32_t result;
__ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
return(result);
}
/**
\brief Store-Release Exclusive (32 bit)
\details Executes a STL exclusive instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
{
uint32_t result;
__ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
return(result);
}
#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM
gitextract_kj309970/
├── .gitignore
├── .vscode/
│ └── settings.json
├── 3rd_party/
│ ├── CMSIS/
│ │ ├── Include/
│ │ │ ├── cmsis_armcc.h
│ │ │ ├── cmsis_armclang.h
│ │ │ ├── cmsis_armclang_ltm.h
│ │ │ ├── cmsis_ccs.h
│ │ │ ├── cmsis_compiler.h
│ │ │ ├── cmsis_gcc.h
│ │ │ ├── cmsis_iccarm.h
│ │ │ ├── cmsis_version.h
│ │ │ ├── core_armv81mml.h
│ │ │ ├── core_armv8mbl.h
│ │ │ ├── core_armv8mml.h
│ │ │ ├── core_cm0.h
│ │ │ ├── core_cm0plus.h
│ │ │ ├── core_cm1.h
│ │ │ ├── core_cm23.h
│ │ │ ├── core_cm3.h
│ │ │ ├── core_cm33.h
│ │ │ ├── core_cm35p.h
│ │ │ ├── core_cm4.h
│ │ │ ├── core_cm7.h
│ │ │ ├── core_sc000.h
│ │ │ ├── core_sc300.h
│ │ │ ├── mpu_armv7.h
│ │ │ ├── mpu_armv8.h
│ │ │ └── tz_context.h
│ │ ├── LICENSE.txt
│ │ └── README.txt
│ ├── ek-tm4c123gxl/
│ │ ├── README.txt
│ │ ├── TM4C123GH6PM.h
│ │ ├── arm/
│ │ │ └── startup_TM4C123GH6PM.s
│ │ ├── gnu/
│ │ │ ├── ek-tm4c123gxl.ld
│ │ │ └── startup_TM4C123GH6PM.c
│ │ ├── gpio.h
│ │ ├── iar/
│ │ │ └── startup_TM4C123GH6PM.s
│ │ ├── rom.h
│ │ ├── sysctl.h
│ │ ├── system_TM4C123GH6PM.c
│ │ └── system_TM4C123GH6PM.h
│ ├── nucleo-c031c6/
│ │ ├── README.txt
│ │ ├── arm/
│ │ │ └── startup_stm32c031xx.s
│ │ ├── gnu/
│ │ │ ├── nucleo-c031c6.ld
│ │ │ └── startup_stm32c031xx.c
│ │ ├── iar/
│ │ │ └── startup_stm32c031xx.s
│ │ ├── stm32c031xx.h
│ │ ├── stm32c0xx.h
│ │ ├── system_stm32c0xx.c
│ │ └── system_stm32c0xx.h
│ ├── nucleo-h743zi/
│ │ ├── README.txt
│ │ ├── arm/
│ │ │ └── startup_stm32h743xx.s
│ │ ├── gnu/
│ │ │ ├── nucleo-h743zi.ld
│ │ │ └── startup_stm32h743xx.c
│ │ ├── iar/
│ │ │ └── startup_stm32h743xx.s
│ │ ├── stm32h743xx.h
│ │ ├── stm32h7xx.h
│ │ ├── system_stm32h7xx.c
│ │ └── system_stm32h7xx.h
│ └── nucleo-l053r8/
│ ├── README.txt
│ ├── arm/
│ │ └── startup_stm32l053xx.s
│ ├── gnu/
│ │ ├── nucleo-l053r8.ld
│ │ └── startup_stm32l053xx.c
│ ├── iar/
│ │ └── startup_stm32l053xx.s
│ ├── stm32l053xx.h
│ ├── stm32l0xx.h
│ ├── system_stm32l0xx.c
│ ├── system_stm32l0xx.c.pll
│ └── system_stm32l0xx.h
├── FreeRTOS-comparison/
│ ├── CMakeLists.txt
│ ├── GitHub-FreeRTOS-Kernel-Home.url
│ ├── History.txt
│ ├── LICENSE.md
│ ├── Quick_Start_Guide.url
│ ├── README.md
│ ├── croutine.c
│ ├── event_groups.c
│ ├── examples/
│ │ ├── blinky/
│ │ │ ├── FreeRTOSConfig.h
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.c
│ │ │ ├── blinky.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ └── main.c
│ │ └── blinky_button/
│ │ ├── FreeRTOSConfig.h
│ │ ├── armclang/
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky1.c
│ │ ├── blinky3.c
│ │ ├── blinky_button.h
│ │ ├── bsp.h
│ │ ├── bsp_nucleo-l053r8.c
│ │ ├── button2a.c
│ │ ├── button2b.c
│ │ └── main.c
│ ├── include/
│ │ ├── FreeRTOS.h
│ │ ├── StackMacros.h
│ │ ├── atomic.h
│ │ ├── croutine.h
│ │ ├── deprecated_definitions.h
│ │ ├── event_groups.h
│ │ ├── list.h
│ │ ├── message_buffer.h
│ │ ├── mpu_prototypes.h
│ │ ├── mpu_wrappers.h
│ │ ├── portable.h
│ │ ├── projdefs.h
│ │ ├── queue.h
│ │ ├── semphr.h
│ │ ├── stack_macros.h
│ │ ├── stdint.readme
│ │ ├── stream_buffer.h
│ │ ├── task.h
│ │ └── timers.h
│ ├── list.c
│ ├── manifest.yml
│ ├── portable/
│ │ ├── ARMClang/
│ │ │ └── Use-the-GCC-ports.txt
│ │ ├── ARMv8M/
│ │ │ ├── ReadMe.txt
│ │ │ ├── copy_files.py
│ │ │ ├── non_secure/
│ │ │ │ ├── ReadMe.txt
│ │ │ │ ├── port.c
│ │ │ │ ├── portable/
│ │ │ │ │ ├── GCC/
│ │ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM33/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ │ │ │ ├── portasm.c
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ ├── ARM_CM55/
│ │ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ │ └── ARM_CM85/
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ └── IAR/
│ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM33/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ │ │ ├── portasm.s
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ ├── ARM_CM55/
│ │ │ │ │ │ └── portmacro.h
│ │ │ │ │ └── ARM_CM85/
│ │ │ │ │ └── portmacro.h
│ │ │ │ ├── portasm.h
│ │ │ │ └── portmacrocommon.h
│ │ │ └── secure/
│ │ │ ├── ReadMe.txt
│ │ │ ├── context/
│ │ │ │ ├── portable/
│ │ │ │ │ ├── GCC/
│ │ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ │ └── secure_context_port.c
│ │ │ │ │ │ └── ARM_CM33/
│ │ │ │ │ │ └── secure_context_port.c
│ │ │ │ │ └── IAR/
│ │ │ │ │ ├── ARM_CM23/
│ │ │ │ │ │ └── secure_context_port_asm.s
│ │ │ │ │ └── ARM_CM33/
│ │ │ │ │ └── secure_context_port_asm.s
│ │ │ │ ├── secure_context.c
│ │ │ │ └── secure_context.h
│ │ │ ├── heap/
│ │ │ │ ├── secure_heap.c
│ │ │ │ └── secure_heap.h
│ │ │ ├── init/
│ │ │ │ ├── secure_init.c
│ │ │ │ └── secure_init.h
│ │ │ └── macros/
│ │ │ └── secure_port_macros.h
│ │ ├── CCS/
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.asm
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.asm
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_Cortex-R4/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.asm
│ │ │ │ └── portmacro.h
│ │ │ └── MSP430X/
│ │ │ ├── data_model.h
│ │ │ ├── port.c
│ │ │ ├── portext.asm
│ │ │ └── portmacro.h
│ │ ├── CMakeLists.txt
│ │ ├── Common/
│ │ │ └── mpu_wrappers.c
│ │ ├── GCC/
│ │ │ ├── ARM_CA53_64_BIT/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CA53_64_BIT_SRE/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CA9/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM0/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM23/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM33/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM3_MPU/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4_MPU/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM55/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM55_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM7/
│ │ │ │ ├── ReadMe.txt
│ │ │ │ └── r0p1/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM85/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port.c
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM85_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CR5/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.S
│ │ │ │ └── portmacro.h
│ │ │ └── ARM_CRx_No_GIC/
│ │ │ ├── port.c
│ │ │ ├── portASM.S
│ │ │ └── portmacro.h
│ │ ├── IAR/
│ │ │ ├── ARM_CA5_No_GIC/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.h
│ │ │ │ ├── portASM.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CA9/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.h
│ │ │ │ ├── portASM.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM0/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM23/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM23_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM33/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM33_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F_MPU/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM55/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM55_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CM7/
│ │ │ │ ├── ReadMe.txt
│ │ │ │ └── r0p1/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM85/
│ │ │ │ ├── non_secure/
│ │ │ │ │ ├── port.c
│ │ │ │ │ ├── portasm.h
│ │ │ │ │ ├── portasm.s
│ │ │ │ │ ├── portmacro.h
│ │ │ │ │ └── portmacrocommon.h
│ │ │ │ └── secure/
│ │ │ │ ├── secure_context.c
│ │ │ │ ├── secure_context.h
│ │ │ │ ├── secure_context_port_asm.s
│ │ │ │ ├── secure_heap.c
│ │ │ │ ├── secure_heap.h
│ │ │ │ ├── secure_init.c
│ │ │ │ ├── secure_init.h
│ │ │ │ └── secure_port_macros.h
│ │ │ ├── ARM_CM85_NTZ/
│ │ │ │ └── non_secure/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portasm.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacrocommon.h
│ │ │ ├── ARM_CRx_No_GIC/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.s
│ │ │ │ └── portmacro.h
│ │ │ ├── LPC2000/
│ │ │ │ ├── ISR_Support.h
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.s79
│ │ │ │ └── portmacro.h
│ │ │ ├── MSP430/
│ │ │ │ ├── port.c
│ │ │ │ ├── portasm.h
│ │ │ │ ├── portext.s43
│ │ │ │ └── portmacro.h
│ │ │ └── MSP430X/
│ │ │ ├── data_model.h
│ │ │ ├── port.c
│ │ │ ├── portext.s43
│ │ │ └── portmacro.h
│ │ ├── Keil/
│ │ │ └── See-also-the-RVDS-directory.txt
│ │ ├── MemMang/
│ │ │ ├── ReadMe.url
│ │ │ ├── heap_1.c
│ │ │ ├── heap_2.c
│ │ │ ├── heap_3.c
│ │ │ ├── heap_4.c
│ │ │ └── heap_5.c
│ │ ├── RVDS/
│ │ │ ├── ARM7_LPC21xx/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacro.inc
│ │ │ ├── ARM_CA9/
│ │ │ │ ├── port.c
│ │ │ │ ├── portASM.s
│ │ │ │ ├── portmacro.h
│ │ │ │ └── portmacro.inc
│ │ │ ├── ARM_CM0/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM3/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4F/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ ├── ARM_CM4_MPU/
│ │ │ │ ├── port.c
│ │ │ │ └── portmacro.h
│ │ │ └── ARM_CM7/
│ │ │ ├── ReadMe.txt
│ │ │ └── r0p1/
│ │ │ ├── port.c
│ │ │ └── portmacro.h
│ │ └── readme.txt
│ ├── queue.c
│ ├── sbom.spdx
│ ├── stream_buffer.c
│ ├── tasks.c
│ ├── timers.c
│ └── version_FeeRTOS-202210-LTS.txt
├── LICENSE
├── README.md
├── img/
│ ├── blinky_button.pvs
│ ├── blinky_press.sr
│ ├── sst0_ek-tm4c.sr
│ └── sst_ek-tm4c.sr
├── include/
│ ├── README.txt
│ ├── dbc_assert.h
│ ├── sst.h
│ └── sst.hpp
├── legacy/
│ ├── README.md
│ ├── example/
│ │ ├── SST_EXA.PRJ
│ │ ├── STDINT.H
│ │ ├── bsp.c
│ │ ├── bsp.h
│ │ ├── kbd_tsk.c
│ │ ├── main.c
│ │ ├── sst_exa.h
│ │ ├── sst_port.h
│ │ └── tick_tsk.c
│ ├── include/
│ │ └── sst.h
│ └── source/
│ └── sst.c
├── sst0_c/
│ ├── README.txt
│ ├── examples/
│ │ ├── README.txt
│ │ ├── blinky/
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.c
│ │ │ ├── blinky.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ ├── gnu/
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.c
│ │ └── blinky_button/
│ │ ├── armclang/
│ │ │ ├── ek-tm4c123gxl.uvoptx
│ │ │ ├── ek-tm4c123gxl.uvprojx
│ │ │ ├── nucleo-c031c6.uvoptx
│ │ │ ├── nucleo-c031c6.uvprojx
│ │ │ ├── nucleo-h743zi.uvoptx
│ │ │ ├── nucleo-h743zi.uvprojx
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky1.c
│ │ ├── blinky3.c
│ │ ├── blinky_button.h
│ │ ├── bsp.h
│ │ ├── bsp_ek-tm4c123gxl.c
│ │ ├── bsp_nucleo-c031c6.c
│ │ ├── bsp_nucleo-h743zi.c
│ │ ├── bsp_nucleo-l053r8.c
│ │ ├── button2a.c
│ │ ├── button2b.c
│ │ ├── gnu/
│ │ │ ├── ek-tm4c123gxl.mak
│ │ │ ├── flash_ek-tm4c123gxl.bat
│ │ │ ├── nucleo-c031c6.mak
│ │ │ ├── nucleo-h743zi.mak
│ │ │ └── nucleo-l053r8.mak
│ │ ├── iar/
│ │ │ ├── ek-tm4c123gxl.ewd
│ │ │ ├── ek-tm4c123gxl.ewp
│ │ │ ├── ek-tm4c123gxl.eww
│ │ │ ├── nucleo-c031c6.ewd
│ │ │ ├── nucleo-c031c6.ewp
│ │ │ ├── nucleo-c031c6.eww
│ │ │ ├── nucleo-h743zi.ewd
│ │ │ ├── nucleo-h743zi.ewp
│ │ │ ├── nucleo-h743zi.eww
│ │ │ ├── nucleo-l053r8.ewd
│ │ │ ├── nucleo-l053r8.ewp
│ │ │ └── nucleo-l053r8.eww
│ │ └── main.c
│ ├── ports/
│ │ └── arm-cm/
│ │ └── sst_port.h
│ └── src/
│ └── sst0.c
├── sst0_cpp/
│ ├── README.txt
│ ├── examples/
│ │ ├── README.txt
│ │ ├── blinky/
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.cpp
│ │ │ ├── blinky.hpp
│ │ │ ├── bsp.hpp
│ │ │ ├── bsp_nucleo-l053r8.cpp
│ │ │ ├── gnu/
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.cpp
│ │ └── blinky_button/
│ │ ├── armclang/
│ │ │ ├── ek-tm4c123gxl.uvoptx
│ │ │ ├── ek-tm4c123gxl.uvprojx
│ │ │ ├── nucleo-c031c6.uvoptx
│ │ │ ├── nucleo-c031c6.uvprojx
│ │ │ ├── nucleo-h743zi.uvoptx
│ │ │ ├── nucleo-h743zi.uvprojx
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky1.cpp
│ │ ├── blinky3.cpp
│ │ ├── blinky_button.hpp
│ │ ├── bsp.hpp
│ │ ├── bsp_ek-tm4c123gxl.cpp
│ │ ├── bsp_nucleo-c031c6.cpp
│ │ ├── bsp_nucleo-h743zi.cpp
│ │ ├── bsp_nucleo-l053r8.cpp
│ │ ├── button2a.cpp
│ │ ├── button2b.cpp
│ │ ├── gnu/
│ │ │ ├── ek-tm4c123gxl.mak
│ │ │ ├── flash_ek-tm4c123gxl.bat
│ │ │ ├── nucleo-c031c6.mak
│ │ │ ├── nucleo-h743zi.mak
│ │ │ └── nucleo-l053r8.mak
│ │ ├── iar/
│ │ │ ├── ek-tm4c123gxl.ewd
│ │ │ ├── ek-tm4c123gxl.ewp
│ │ │ ├── ek-tm4c123gxl.eww
│ │ │ ├── nucleo-c031c6.ewd
│ │ │ ├── nucleo-c031c6.ewp
│ │ │ ├── nucleo-c031c6.eww
│ │ │ ├── nucleo-h743zi.ewd
│ │ │ ├── nucleo-h743zi.ewp
│ │ │ ├── nucleo-h743zi.eww
│ │ │ ├── nucleo-l053r8.ewd
│ │ │ ├── nucleo-l053r8.ewp
│ │ │ └── nucleo-l053r8.eww
│ │ └── main.cpp
│ ├── ports/
│ │ └── arm-cm/
│ │ └── sst_port.hpp
│ └── src/
│ └── sst0.cpp
├── sst_c/
│ ├── README.txt
│ ├── examples/
│ │ ├── README.txt
│ │ ├── blinky/
│ │ │ ├── armclang/
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky.c
│ │ │ ├── blinky.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ ├── gnu/
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.c
│ │ ├── blinky_button/
│ │ │ ├── armclang/
│ │ │ │ ├── ek-tm4c123gxl.uvoptx
│ │ │ │ ├── ek-tm4c123gxl.uvprojx
│ │ │ │ ├── nucleo-c031c6.uvoptx
│ │ │ │ ├── nucleo-c031c6.uvprojx
│ │ │ │ ├── nucleo-h743zi.uvoptx
│ │ │ │ ├── nucleo-h743zi.uvprojx
│ │ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ │ └── nucleo-l053r8.uvprojx
│ │ │ ├── blinky1.c
│ │ │ ├── blinky3.c
│ │ │ ├── blinky_button.h
│ │ │ ├── bsp.h
│ │ │ ├── bsp_ek-tm4c123gxl.c
│ │ │ ├── bsp_nucleo-c031c6.c
│ │ │ ├── bsp_nucleo-h743zi.c
│ │ │ ├── bsp_nucleo-l053r8.c
│ │ │ ├── button2a.c
│ │ │ ├── button2b.c
│ │ │ ├── gnu/
│ │ │ │ ├── ek-tm4c123gxl.mak
│ │ │ │ ├── flash_ek-tm4c123gxl.bat
│ │ │ │ ├── nucleo-c031c6.mak
│ │ │ │ ├── nucleo-h743zi.mak
│ │ │ │ └── nucleo-l053r8.mak
│ │ │ ├── iar/
│ │ │ │ ├── ek-tm4c123gxl.ewd
│ │ │ │ ├── ek-tm4c123gxl.ewp
│ │ │ │ ├── ek-tm4c123gxl.eww
│ │ │ │ ├── nucleo-c031c6.ewd
│ │ │ │ ├── nucleo-c031c6.ewp
│ │ │ │ ├── nucleo-c031c6.eww
│ │ │ │ ├── nucleo-h743zi.ewd
│ │ │ │ ├── nucleo-h743zi.ewp
│ │ │ │ ├── nucleo-h743zi.eww
│ │ │ │ ├── nucleo-l053r8.ewd
│ │ │ │ ├── nucleo-l053r8.ewp
│ │ │ │ └── nucleo-l053r8.eww
│ │ │ └── main.c
│ │ └── blinky_button.X/
│ │ ├── .gitignore
│ │ ├── Makefile
│ │ ├── blinky1.c
│ │ ├── blinky3.c
│ │ ├── blinky_button.h
│ │ ├── bsp.h
│ │ ├── bsp_dspic33ep128gs804.c
│ │ ├── button2a.c
│ │ ├── button2b.c
│ │ ├── configuration_bits.h
│ │ ├── main.c
│ │ ├── nbproject/
│ │ │ ├── configurations.xml
│ │ │ └── project.xml
│ │ ├── system_dspic33ep128gs804.c
│ │ └── system_dspic33ep128gs804.h
│ ├── ports/
│ │ ├── arm-cm/
│ │ │ ├── sst_port.c
│ │ │ └── sst_port.h
│ │ └── dspic/
│ │ ├── sst_port.c
│ │ └── sst_port.h
│ └── src/
│ └── sst.c
└── sst_cpp/
├── README.txt
├── examples/
│ ├── README.txt
│ ├── blinky/
│ │ ├── armclang/
│ │ │ ├── nucleo-l053r8.uvoptx
│ │ │ └── nucleo-l053r8.uvprojx
│ │ ├── blinky.cpp
│ │ ├── blinky.hpp
│ │ ├── bsp.hpp
│ │ ├── bsp_nucleo-l053r8.cpp
│ │ ├── gnu/
│ │ │ └── nucleo-l053r8.mak
│ │ ├── iar/
│ │ │ ├── nucleo-l053r8.ewd
│ │ │ ├── nucleo-l053r8.ewp
│ │ │ └── nucleo-l053r8.eww
│ │ └── main.cpp
│ └── blinky_button/
│ ├── armclang/
│ │ ├── ek-tm4c123gxl.uvoptx
│ │ ├── ek-tm4c123gxl.uvprojx
│ │ ├── nucleo-c031c6.uvoptx
│ │ ├── nucleo-c031c6.uvprojx
│ │ ├── nucleo-h743zi.uvoptx
│ │ ├── nucleo-h743zi.uvprojx
│ │ ├── nucleo-l053r8.uvoptx
│ │ └── nucleo-l053r8.uvprojx
│ ├── blinky1.cpp
│ ├── blinky3.cpp
│ ├── blinky_button.hpp
│ ├── bsp.hpp
│ ├── bsp_ek-tm4c123gxl.cpp
│ ├── bsp_nucleo-c031c6.cpp
│ ├── bsp_nucleo-h743zi.cpp
│ ├── bsp_nucleo-l053r8.cpp
│ ├── button2a.cpp
│ ├── button2b.cpp
│ ├── gnu/
│ │ ├── ek-tm4c123gxl.mak
│ │ ├── flash_ek-tm4c123gxl.bat
│ │ ├── nucleo-c031c6.mak
│ │ ├── nucleo-h743zi.mak
│ │ └── nucleo-l053r8.mak
│ ├── iar/
│ │ ├── ek-tm4c123gxl.ewd
│ │ ├── ek-tm4c123gxl.ewp
│ │ ├── ek-tm4c123gxl.eww
│ │ ├── nucleo-c031c6.ewd
│ │ ├── nucleo-c031c6.ewp
│ │ ├── nucleo-c031c6.eww
│ │ ├── nucleo-h743zi.ewd
│ │ ├── nucleo-h743zi.ewp
│ │ ├── nucleo-h743zi.eww
│ │ ├── nucleo-l053r8.ewd
│ │ ├── nucleo-l053r8.ewp
│ │ └── nucleo-l053r8.eww
│ └── main.cpp
├── ports/
│ └── arm-cm/
│ ├── sst_port.cpp
│ └── sst_port.hpp
└── src/
└── sst.cpp
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SYMBOL INDEX (3509 symbols across 323 files)
FILE: 3rd_party/CMSIS/Include/cmsis_armcc.h
function __STATIC_INLINE (line 159) | __STATIC_INLINE uint32_t __get_CONTROL(void)
function __STATIC_INLINE (line 171) | __STATIC_INLINE void __set_CONTROL(uint32_t control)
function __STATIC_INLINE (line 183) | __STATIC_INLINE uint32_t __get_IPSR(void)
function __STATIC_INLINE (line 195) | __STATIC_INLINE uint32_t __get_APSR(void)
function __STATIC_INLINE (line 207) | __STATIC_INLINE uint32_t __get_xPSR(void)
function __STATIC_INLINE (line 219) | __STATIC_INLINE uint32_t __get_PSP(void)
function __STATIC_INLINE (line 231) | __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_INLINE (line 243) | __STATIC_INLINE uint32_t __get_MSP(void)
function __STATIC_INLINE (line 255) | __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_INLINE (line 267) | __STATIC_INLINE uint32_t __get_PRIMASK(void)
function __STATIC_INLINE (line 279) | __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_INLINE (line 310) | __STATIC_INLINE uint32_t __get_BASEPRI(void)
function __STATIC_INLINE (line 322) | __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_INLINE (line 335) | __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_INLINE (line 347) | __STATIC_INLINE uint32_t __get_FAULTMASK(void)
function __STATIC_INLINE (line 359) | __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_INLINE (line 374) | __STATIC_INLINE uint32_t __get_FPSCR(void)
function __STATIC_INLINE (line 391) | __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
function __REV16 (line 492) | uint32_t __REV16(uint32_t value)
function __REVSH (line 507) | int16_t __REVSH(int16_t value)
function __STATIC_INLINE (line 545) | __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t ...
function __RRX (line 694) | uint32_t __RRX(uint32_t value)
function __STATIC_INLINE (line 765) | __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t va...
function __STATIC_INLINE (line 790) | __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t v...
FILE: 3rd_party/CMSIS/Include/cmsis_armclang.h
type T_UINT32 (line 71) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 79) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 87) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 95) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 103) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __STATIC_FORCEINLINE (line 166) | __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
function __STATIC_FORCEINLINE (line 181) | __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
function __STATIC_FORCEINLINE (line 196) | __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
function __STATIC_FORCEINLINE (line 208) | __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
function __STATIC_FORCEINLINE (line 220) | __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
function __STATIC_FORCEINLINE (line 234) | __STATIC_FORCEINLINE uint32_t __get_APSR(void)
function __STATIC_FORCEINLINE (line 248) | __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
function __STATIC_FORCEINLINE (line 262) | __STATIC_FORCEINLINE uint32_t __get_PSP(void)
function __STATIC_FORCEINLINE (line 277) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
function __STATIC_FORCEINLINE (line 292) | __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 304) | __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 316) | __STATIC_FORCEINLINE uint32_t __get_MSP(void)
function __STATIC_FORCEINLINE (line 331) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
function __STATIC_FORCEINLINE (line 346) | __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 358) | __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 371) | __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
function __STATIC_FORCEINLINE (line 385) | __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
function __STATIC_FORCEINLINE (line 397) | __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
function __STATIC_FORCEINLINE (line 412) | __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
function __STATIC_FORCEINLINE (line 427) | __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_FORCEINLINE (line 439) | __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
function __STATIC_FORCEINLINE (line 470) | __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
function __STATIC_FORCEINLINE (line 485) | __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
function __STATIC_FORCEINLINE (line 500) | __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_FORCEINLINE (line 512) | __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
function __STATIC_FORCEINLINE (line 525) | __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_FORCEINLINE (line 536) | __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
function __STATIC_FORCEINLINE (line 551) | __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
function __STATIC_FORCEINLINE (line 566) | __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 578) | __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 601) | __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
function __STATIC_FORCEINLINE (line 624) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 647) | __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 669) | __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 689) | __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
function __STATIC_FORCEINLINE (line 712) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 734) | __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 755) | __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 902) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 937) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 1063) | __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
function __STATIC_FORCEINLINE (line 1078) | __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1093) | __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1108) | __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1123) | __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1135) | __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1147) | __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1163) | __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1188) | __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1218) | __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1233) | __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1248) | __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1263) | __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1275) | __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1287) | __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1432) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
FILE: 3rd_party/CMSIS/Include/cmsis_armclang_ltm.h
type T_UINT32 (line 71) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 79) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 87) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 95) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 103) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __STATIC_FORCEINLINE (line 167) | __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
function __STATIC_FORCEINLINE (line 182) | __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
function __STATIC_FORCEINLINE (line 197) | __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
function __STATIC_FORCEINLINE (line 209) | __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
function __STATIC_FORCEINLINE (line 221) | __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
function __STATIC_FORCEINLINE (line 235) | __STATIC_FORCEINLINE uint32_t __get_APSR(void)
function __STATIC_FORCEINLINE (line 249) | __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
function __STATIC_FORCEINLINE (line 263) | __STATIC_FORCEINLINE uint32_t __get_PSP(void)
function __STATIC_FORCEINLINE (line 278) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
function __STATIC_FORCEINLINE (line 293) | __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 305) | __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 317) | __STATIC_FORCEINLINE uint32_t __get_MSP(void)
function __STATIC_FORCEINLINE (line 332) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
function __STATIC_FORCEINLINE (line 347) | __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 359) | __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 372) | __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
function __STATIC_FORCEINLINE (line 386) | __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
function __STATIC_FORCEINLINE (line 398) | __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
function __STATIC_FORCEINLINE (line 413) | __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
function __STATIC_FORCEINLINE (line 428) | __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_FORCEINLINE (line 440) | __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
function __STATIC_FORCEINLINE (line 471) | __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
function __STATIC_FORCEINLINE (line 486) | __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
function __STATIC_FORCEINLINE (line 501) | __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_FORCEINLINE (line 513) | __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
function __STATIC_FORCEINLINE (line 526) | __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_FORCEINLINE (line 537) | __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
function __STATIC_FORCEINLINE (line 552) | __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
function __STATIC_FORCEINLINE (line 567) | __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 579) | __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 602) | __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
function __STATIC_FORCEINLINE (line 625) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 648) | __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 670) | __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 690) | __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
function __STATIC_FORCEINLINE (line 713) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 735) | __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 756) | __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 901) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 936) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 1062) | __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
function __STATIC_FORCEINLINE (line 1077) | __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1092) | __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1107) | __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1122) | __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1134) | __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1146) | __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1162) | __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1187) | __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1217) | __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1232) | __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1247) | __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1262) | __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1274) | __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1286) | __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1365) | __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1373) | __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1381) | __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1389) | __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1397) | __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1405) | __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1414) | __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1422) | __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1430) | __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1438) | __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1446) | __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1454) | __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1463) | __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1471) | __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1479) | __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1487) | __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1495) | __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1503) | __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1511) | __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1519) | __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1527) | __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1535) | __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1543) | __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1551) | __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1559) | __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1567) | __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1575) | __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1583) | __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1591) | __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1599) | __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1607) | __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1615) | __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1623) | __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1631) | __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1639) | __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1647) | __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1655) | __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1663) | __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1685) | __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1693) | __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1701) | __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1709) | __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1717) | __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1725) | __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1733) | __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1741) | __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1749) | __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1766) | __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 1783) | __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1791) | __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1799) | __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1807) | __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1815) | __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1832) | __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 1849) | __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1857) | __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 1865) | __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 1879) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
FILE: 3rd_party/CMSIS/Include/cmsis_ccs.h
function __nop (line 90) | __attribute__( ( always_inline ) ) static inline void __nop(void)
function __NOP (line 95) | __attribute__( ( always_inline ) ) static inline void __NOP(void)
function __DSB (line 101) | __attribute__( ( always_inline ) ) static inline void __DSB(void)
function __ISB (line 106) | __attribute__( ( always_inline ) ) static inline void __ISB(void)
function __WFI (line 111) | __attribute__( ( always_inline ) ) static inline void __WFI(void)
FILE: 3rd_party/CMSIS/Include/cmsis_compiler.h
type T_UINT32 (line 101) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 105) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 109) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 113) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 117) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function T_UINT32 (line 173) | struct __packed__ T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 177) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 181) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 185) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 189) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function packed (line 244) | packed struct T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 248) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 252) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 256) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 260) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
FILE: 3rd_party/CMSIS/Include/cmsis_gcc.h
type T_UINT32 (line 74) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 82) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 90) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 98) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 106) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __cmsis_start (line 131) | void __cmsis_start(void)
function __STATIC_FORCEINLINE (line 233) | __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
function __STATIC_FORCEINLINE (line 248) | __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
function __STATIC_FORCEINLINE (line 260) | __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
function __STATIC_FORCEINLINE (line 272) | __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
function __STATIC_FORCEINLINE (line 286) | __STATIC_FORCEINLINE uint32_t __get_APSR(void)
function __STATIC_FORCEINLINE (line 300) | __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
function __STATIC_FORCEINLINE (line 314) | __STATIC_FORCEINLINE uint32_t __get_PSP(void)
function __STATIC_FORCEINLINE (line 329) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
function __STATIC_FORCEINLINE (line 344) | __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 356) | __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 368) | __STATIC_FORCEINLINE uint32_t __get_MSP(void)
function __STATIC_FORCEINLINE (line 383) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
function __STATIC_FORCEINLINE (line 398) | __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 410) | __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 423) | __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
function __STATIC_FORCEINLINE (line 437) | __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
function __STATIC_FORCEINLINE (line 449) | __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
function __STATIC_FORCEINLINE (line 464) | __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
function __STATIC_FORCEINLINE (line 479) | __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_FORCEINLINE (line 491) | __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
function __STATIC_FORCEINLINE (line 543) | __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
function __STATIC_FORCEINLINE (line 558) | __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_FORCEINLINE (line 570) | __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
function __STATIC_FORCEINLINE (line 583) | __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_FORCEINLINE (line 594) | __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
function __STATIC_FORCEINLINE (line 609) | __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
function __STATIC_FORCEINLINE (line 624) | __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 636) | __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 659) | __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
function __STATIC_FORCEINLINE (line 681) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 704) | __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 725) | __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 746) | __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
function __STATIC_FORCEINLINE (line 769) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 792) | __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 813) | __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 833) | __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
function __STATIC_FORCEINLINE (line 859) | __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
function __STATIC_FORCEINLINE (line 986) | __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
function __STATIC_FORCEINLINE (line 1001) | __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
function __STATIC_FORCEINLINE (line 1021) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1048) | __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
function __STATIC_FORCEINLINE (line 1078) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 1107) | __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
function __STATIC_FORCEINLINE (line 1129) | __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
function __STATIC_FORCEINLINE (line 1151) | __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
function __STATIC_FORCEINLINE (line 1168) | __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *...
function __STATIC_FORCEINLINE (line 1185) | __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t...
function __STATIC_FORCEINLINE (line 1202) | __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t...
function __STATIC_FORCEINLINE (line 1215) | __STATIC_FORCEINLINE void __CLREX(void)
function __STATIC_FORCEINLINE (line 1268) | __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
function __STATIC_FORCEINLINE (line 1283) | __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1305) | __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1327) | __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1342) | __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1354) | __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1366) | __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1382) | __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1407) | __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1437) | __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1452) | __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1467) | __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1482) | __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1494) | __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1506) | __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1518) | __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1533) | __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1548) | __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1565) | __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *...
function __STATIC_FORCEINLINE (line 1582) | __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t...
function __STATIC_FORCEINLINE (line 1599) | __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t ...
function __STATIC_FORCEINLINE (line 1621) | __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1629) | __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1637) | __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1645) | __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1653) | __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1661) | __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1670) | __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1678) | __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1686) | __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1694) | __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1702) | __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1710) | __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1719) | __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1727) | __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1735) | __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1743) | __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1751) | __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1759) | __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1767) | __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1775) | __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1783) | __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1791) | __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1799) | __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1807) | __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1815) | __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1823) | __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1831) | __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1839) | __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1847) | __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1855) | __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1863) | __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1871) | __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1879) | __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1887) | __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1895) | __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1903) | __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1911) | __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1919) | __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1941) | __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1949) | __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1957) | __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1965) | __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1973) | __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1981) | __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1989) | __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1997) | __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2005) | __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2022) | __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 2039) | __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 2047) | __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 2055) | __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 2063) | __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2071) | __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2088) | __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 2105) | __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 2113) | __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 2121) | __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 2154) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
FILE: 3rd_party/CMSIS/Include/cmsis_iccarm.h
function __IAR_FT (line 181) | __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
function __IAR_FT (line 193) | __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
function __IAR_FT (line 204) | __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
function __IAR_FT (line 215) | __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
function __packed (line 226) | __packed struct __iar_u32 { uint32_t v; }
function __IAR_FT (line 403) | __IAR_FT int16_t __REVSH(int16_t val)
function __STATIC_INLINE (line 525) | __STATIC_INLINE uint8_t __CLZ(uint32_t data)
function __STATIC_INLINE (line 540) | __STATIC_INLINE uint32_t __RBIT(uint32_t v)
function __STATIC_INLINE (line 553) | __STATIC_INLINE uint32_t __get_APSR(void)
function __IAR_FT (line 581) | __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
function __IAR_FT (line 586) | __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
function __IAR_FT (line 596) | __IAR_FT uint32_t __RRX(uint32_t value)
function __IAR_FT (line 603) | __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
function __IAR_FT (line 615) | __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
function __IAR_FT (line 623) | __IAR_FT uint32_t __get_MSPLIM(void)
function __IAR_FT (line 636) | __IAR_FT void __set_MSPLIM(uint32_t value)
function __IAR_FT (line 647) | __IAR_FT uint32_t __get_PSPLIM(void)
function __IAR_FT (line 660) | __IAR_FT void __set_PSPLIM(uint32_t value)
function __IAR_FT (line 671) | __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
function __IAR_FT (line 678) | __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
function __IAR_FT (line 683) | __IAR_FT uint32_t __TZ_get_PSP_NS(void)
function __IAR_FT (line 690) | __IAR_FT void __TZ_set_PSP_NS(uint32_t value)
function __IAR_FT (line 695) | __IAR_FT uint32_t __TZ_get_MSP_NS(void)
function __IAR_FT (line 702) | __IAR_FT void __TZ_set_MSP_NS(uint32_t value)
function __IAR_FT (line 707) | __IAR_FT uint32_t __TZ_get_SP_NS(void)
function __IAR_FT (line 713) | __IAR_FT void __TZ_set_SP_NS(uint32_t value)
function __IAR_FT (line 718) | __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
function __IAR_FT (line 725) | __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
function __IAR_FT (line 730) | __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
function __IAR_FT (line 737) | __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
function __IAR_FT (line 742) | __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
function __IAR_FT (line 749) | __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
function __IAR_FT (line 754) | __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
function __IAR_FT (line 767) | __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
function __IAR_FT (line 778) | __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
function __IAR_FT (line 785) | __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
function __STATIC_INLINE (line 797) | __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_INLINE (line 815) | __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __IAR_FT (line 835) | __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
function __IAR_FT (line 842) | __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
function __IAR_FT (line 849) | __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
function __IAR_FT (line 856) | __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
function __IAR_FT (line 861) | __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
function __IAR_FT (line 866) | __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
function __IAR_FT (line 877) | __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
function __IAR_FT (line 884) | __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
function __IAR_FT (line 891) | __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
function __IAR_FT (line 898) | __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
function __IAR_FT (line 903) | __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
function __IAR_FT (line 908) | __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
function __IAR_FT (line 913) | __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
function __IAR_FT (line 920) | __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
function __IAR_FT (line 927) | __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
function __IAR_FT (line 934) | __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
function __IAR_FT (line 941) | __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
function __IAR_FT (line 948) | __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
FILE: 3rd_party/CMSIS/Include/core_armv81mml.h
type APSR_Type (line 315) | typedef union
type IPSR_Type (line 354) | typedef union
type xPSR_Type (line 372) | typedef union
type CONTROL_Type (line 423) | typedef union
type NVIC_Type (line 462) | typedef struct
type SCB_Type (line 498) | typedef struct
type SCnSCB_Type (line 1010) | typedef struct
type SysTick_Type (line 1035) | typedef struct
type DWT_Type (line 1202) | typedef struct
type TPI_Type (line 1388) | typedef struct
type MPU_Type (line 1544) | typedef struct
type SAU_Type (line 1660) | typedef struct
type FPU_Type (line 1746) | typedef struct
type CoreDebug_Type (line 1876) | typedef struct
function __STATIC_INLINE (line 2156) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2175) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2187) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2204) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2223) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2242) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2261) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2276) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2293) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2315) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2336) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2358) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2382) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2404) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2429) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2456) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2479) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2495) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2506) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2531) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2550) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2562) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2579) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2598) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2615) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2634) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2649) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2666) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2688) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2709) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2749) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2787) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2798) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2831) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2860) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2903) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2924) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2944) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/core_armv8mbl.h
type APSR_Type (line 233) | typedef union
type IPSR_Type (line 263) | typedef union
type xPSR_Type (line 281) | typedef union
type CONTROL_Type (line 320) | typedef union
type NVIC_Type (line 351) | typedef struct
type SCB_Type (line 381) | typedef struct
type SysTick_Type (line 558) | typedef struct
type DWT_Type (line 610) | typedef struct
type TPI_Type (line 725) | typedef struct
type MPU_Type (line 824) | typedef struct
type SAU_Type (line 931) | typedef struct
type CoreDebug_Type (line 988) | typedef struct
function __STATIC_INLINE (line 1252) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1271) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1290) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1309) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1328) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1343) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1360) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1382) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1403) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1425) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1449) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1473) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1498) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1525) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1549) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1569) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1584) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1605) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1622) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1641) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1658) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1677) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1692) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1709) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1731) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 1754) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1794) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1818) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 1829) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 1862) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1891) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
FILE: 3rd_party/CMSIS/Include/core_armv8mml.h
type APSR_Type (line 314) | typedef union
type IPSR_Type (line 353) | typedef union
type xPSR_Type (line 371) | typedef union
type CONTROL_Type (line 422) | typedef union
type NVIC_Type (line 461) | typedef struct
type SCB_Type (line 497) | typedef struct
type SCnSCB_Type (line 929) | typedef struct
type SysTick_Type (line 954) | typedef struct
type DWT_Type (line 1106) | typedef struct
type TPI_Type (line 1292) | typedef struct
type MPU_Type (line 1391) | typedef struct
type SAU_Type (line 1504) | typedef struct
type FPU_Type (line 1590) | typedef struct
type CoreDebug_Type (line 1720) | typedef struct
function __STATIC_INLINE (line 2021) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2040) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2052) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2071) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2090) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2109) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2128) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2143) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2160) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2182) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2203) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2225) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2249) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2271) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2296) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2323) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2346) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2362) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2373) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2398) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2417) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2429) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2446) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2465) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2482) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2501) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2516) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2533) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2555) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2576) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2616) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2654) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2665) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2698) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2727) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2770) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2791) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2811) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/core_cm0.h
type APSR_Type (line 199) | typedef union
type IPSR_Type (line 229) | typedef union
type xPSR_Type (line 247) | typedef union
type CONTROL_Type (line 286) | typedef union
type NVIC_Type (line 314) | typedef struct
type SCB_Type (line 341) | typedef struct
type SysTick_Type (line 448) | typedef struct
function __STATIC_INLINE (line 623) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 642) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 661) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 680) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 699) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 714) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 732) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 756) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 781) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 808) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 832) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 848) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 859) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 892) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 923) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: 3rd_party/CMSIS/Include/core_cm0plus.h
type APSR_Type (line 210) | typedef union
type IPSR_Type (line 240) | typedef union
type xPSR_Type (line 258) | typedef union
type CONTROL_Type (line 297) | typedef union
type NVIC_Type (line 328) | typedef struct
type SCB_Type (line 355) | typedef struct
type SysTick_Type (line 472) | typedef struct
type MPU_Type (line 524) | typedef struct
function __STATIC_INLINE (line 741) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 760) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 779) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 798) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 817) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 832) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 850) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 874) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 899) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 926) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 950) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 970) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 985) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1025) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1056) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: 3rd_party/CMSIS/Include/core_cm1.h
type APSR_Type (line 199) | typedef union
type IPSR_Type (line 229) | typedef union
type xPSR_Type (line 247) | typedef union
type CONTROL_Type (line 286) | typedef union
type NVIC_Type (line 314) | typedef struct
type SCB_Type (line 341) | typedef struct
type SCnSCB_Type (line 448) | typedef struct
type SysTick_Type (line 474) | typedef struct
function __STATIC_INLINE (line 650) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 669) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 688) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 707) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 726) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 741) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 759) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 783) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 808) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 835) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 859) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 875) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 886) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 919) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 950) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: 3rd_party/CMSIS/Include/core_cm23.h
type APSR_Type (line 233) | typedef union
type IPSR_Type (line 263) | typedef union
type xPSR_Type (line 281) | typedef union
type CONTROL_Type (line 320) | typedef union
type NVIC_Type (line 351) | typedef struct
type SCB_Type (line 381) | typedef struct
type SysTick_Type (line 558) | typedef struct
type DWT_Type (line 610) | typedef struct
type TPI_Type (line 725) | typedef struct
type MPU_Type (line 899) | typedef struct
type SAU_Type (line 1006) | typedef struct
type CoreDebug_Type (line 1063) | typedef struct
function __STATIC_INLINE (line 1327) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1346) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1365) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1384) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1403) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1418) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1435) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1457) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1478) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1500) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1524) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1548) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1573) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1600) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1624) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1644) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1659) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1680) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1697) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1716) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1733) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1752) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1767) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1784) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1806) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 1829) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1869) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1893) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 1904) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 1937) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1966) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
FILE: 3rd_party/CMSIS/Include/core_cm3.h
type APSR_Type (line 206) | typedef union
type IPSR_Type (line 240) | typedef union
type xPSR_Type (line 258) | typedef union
type CONTROL_Type (line 309) | typedef union
type NVIC_Type (line 340) | typedef struct
type SCB_Type (line 374) | typedef struct
type SCnSCB_Type (line 655) | typedef struct
type SysTick_Type (line 701) | typedef struct
type DWT_Type (line 841) | typedef struct
type TPI_Type (line 988) | typedef struct
type MPU_Type (line 1150) | typedef struct
type CoreDebug_Type (line 1246) | typedef struct
function __STATIC_INLINE (line 1472) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1491) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1503) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1522) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1541) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1560) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1579) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1594) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1611) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1633) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1655) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1680) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1707) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1730) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1746) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1757) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1799) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1830) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1872) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 1893) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 1913) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/core_cm33.h
type APSR_Type (line 314) | typedef union
type IPSR_Type (line 353) | typedef union
type xPSR_Type (line 371) | typedef union
type CONTROL_Type (line 422) | typedef union
type NVIC_Type (line 461) | typedef struct
type SCB_Type (line 497) | typedef struct
type SCnSCB_Type (line 929) | typedef struct
type SysTick_Type (line 954) | typedef struct
type DWT_Type (line 1106) | typedef struct
type TPI_Type (line 1292) | typedef struct
type MPU_Type (line 1466) | typedef struct
type SAU_Type (line 1579) | typedef struct
type FPU_Type (line 1665) | typedef struct
type CoreDebug_Type (line 1795) | typedef struct
function __STATIC_INLINE (line 2096) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2115) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2127) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2146) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2165) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2184) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2203) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2218) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2235) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2257) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2278) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2300) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2324) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2346) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2371) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2398) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2421) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2437) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2448) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2473) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2492) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2504) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2521) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2540) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2557) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2576) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2591) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2608) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2630) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2651) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2691) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2729) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2740) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2773) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2802) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2845) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2866) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2886) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/core_cm35p.h
type APSR_Type (line 314) | typedef union
type IPSR_Type (line 353) | typedef union
type xPSR_Type (line 371) | typedef union
type CONTROL_Type (line 422) | typedef union
type NVIC_Type (line 461) | typedef struct
type SCB_Type (line 497) | typedef struct
type SCnSCB_Type (line 929) | typedef struct
type SysTick_Type (line 954) | typedef struct
type DWT_Type (line 1106) | typedef struct
type TPI_Type (line 1292) | typedef struct
type MPU_Type (line 1466) | typedef struct
type SAU_Type (line 1579) | typedef struct
type FPU_Type (line 1665) | typedef struct
type CoreDebug_Type (line 1795) | typedef struct
function __STATIC_INLINE (line 2096) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2115) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2127) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2146) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2165) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2184) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2203) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2218) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2235) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2257) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2278) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2300) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2324) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2346) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2371) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2398) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2421) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2437) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2448) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2473) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2492) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2504) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2521) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2540) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2557) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2576) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2591) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2608) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2630) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2651) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2691) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2729) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2740) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2773) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2802) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2845) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2866) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2886) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/core_cm4.h
type APSR_Type (line 259) | typedef union
type IPSR_Type (line 298) | typedef union
type xPSR_Type (line 316) | typedef union
type CONTROL_Type (line 371) | typedef union
type NVIC_Type (line 406) | typedef struct
type SCB_Type (line 440) | typedef struct
type SCnSCB_Type (line 719) | typedef struct
type SysTick_Type (line 759) | typedef struct
type DWT_Type (line 899) | typedef struct
type TPI_Type (line 1046) | typedef struct
type MPU_Type (line 1208) | typedef struct
type FPU_Type (line 1304) | typedef struct
type CoreDebug_Type (line 1416) | typedef struct
function __STATIC_INLINE (line 1648) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1667) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1679) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1698) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1717) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1736) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1755) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1770) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1787) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1809) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1831) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1856) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1883) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1906) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1922) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1933) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1976) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2017) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2059) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2080) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2100) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/core_cm7.h
type APSR_Type (line 274) | typedef union
type IPSR_Type (line 313) | typedef union
type xPSR_Type (line 331) | typedef union
type CONTROL_Type (line 386) | typedef union
type NVIC_Type (line 421) | typedef struct
type SCB_Type (line 455) | typedef struct
type SCnSCB_Type (line 921) | typedef struct
type SysTick_Type (line 979) | typedef struct
type DWT_Type (line 1119) | typedef struct
type TPI_Type (line 1269) | typedef struct
type MPU_Type (line 1431) | typedef struct
type FPU_Type (line 1527) | typedef struct
type CoreDebug_Type (line 1639) | typedef struct
function __STATIC_INLINE (line 1871) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1890) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1902) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1921) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1940) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1959) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1978) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1993) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2010) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2032) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2054) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2079) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2106) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2129) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2145) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2156) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2199) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_FORCEINLINE (line 2241) | __STATIC_FORCEINLINE void SCB_EnableICache (void)
function __STATIC_FORCEINLINE (line 2262) | __STATIC_FORCEINLINE void SCB_DisableICache (void)
function __STATIC_FORCEINLINE (line 2279) | __STATIC_FORCEINLINE void SCB_InvalidateICache (void)
function __STATIC_FORCEINLINE (line 2299) | __STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int3...
function __STATIC_FORCEINLINE (line 2325) | __STATIC_FORCEINLINE void SCB_EnableDCache (void)
function __STATIC_FORCEINLINE (line 2365) | __STATIC_FORCEINLINE void SCB_DisableDCache (void)
function __STATIC_FORCEINLINE (line 2403) | __STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
function __STATIC_FORCEINLINE (line 2438) | __STATIC_FORCEINLINE void SCB_CleanDCache (void)
function __STATIC_FORCEINLINE (line 2473) | __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
function __STATIC_FORCEINLINE (line 2512) | __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int3...
function __STATIC_FORCEINLINE (line 2542) | __STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32...
function __STATIC_FORCEINLINE (line 2572) | __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *a...
function __STATIC_INLINE (line 2618) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2660) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2681) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2701) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/core_sc000.h
type APSR_Type (line 205) | typedef union
type IPSR_Type (line 235) | typedef union
type xPSR_Type (line 253) | typedef union
type CONTROL_Type (line 292) | typedef union
type NVIC_Type (line 320) | typedef struct
type SCB_Type (line 347) | typedef struct
type SCnSCB_Type (line 460) | typedef struct
type SysTick_Type (line 483) | typedef struct
type MPU_Type (line 535) | typedef struct
function __STATIC_INLINE (line 749) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 768) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 787) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 806) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 825) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 840) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 858) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 882) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 905) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 921) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 932) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 965) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 996) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: 3rd_party/CMSIS/Include/core_sc300.h
type APSR_Type (line 206) | typedef union
type IPSR_Type (line 240) | typedef union
type xPSR_Type (line 258) | typedef union
type CONTROL_Type (line 309) | typedef union
type NVIC_Type (line 340) | typedef struct
type SCB_Type (line 374) | typedef struct
type SCnSCB_Type (line 652) | typedef struct
type SysTick_Type (line 686) | typedef struct
type DWT_Type (line 826) | typedef struct
type TPI_Type (line 973) | typedef struct
type MPU_Type (line 1135) | typedef struct
type CoreDebug_Type (line 1229) | typedef struct
function __STATIC_INLINE (line 1455) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1474) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1486) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1505) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1524) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1543) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1562) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1577) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1594) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1616) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1638) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1663) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1690) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1713) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1729) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1740) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1774) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1805) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1847) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 1868) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 1888) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: 3rd_party/CMSIS/Include/mpu_armv7.h
type ARM_MPU_Region_t (line 183) | typedef struct {
function __STATIC_INLINE (line 191) | __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
function __STATIC_INLINE (line 203) | __STATIC_INLINE void ARM_MPU_Disable(void)
function __STATIC_INLINE (line 215) | __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
function __STATIC_INLINE (line 225) | __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
function __STATIC_INLINE (line 236) | __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, ui...
function __STATIC_INLINE (line 248) | __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const...
function __STATIC_INLINE (line 261) | __STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_...
FILE: 3rd_party/CMSIS/Include/mpu_armv8.h
type ARM_MPU_Region_t (line 122) | typedef struct {
function __STATIC_INLINE (line 130) | __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
function __STATIC_INLINE (line 142) | __STATIC_INLINE void ARM_MPU_Disable(void)
function __STATIC_INLINE (line 155) | __STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
function __STATIC_INLINE (line 167) | __STATIC_INLINE void ARM_MPU_Disable_NS(void)
function __STATIC_INLINE (line 182) | __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, ui...
function __STATIC_INLINE (line 199) | __STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
function __STATIC_INLINE (line 209) | __STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
function __STATIC_INLINE (line 219) | __STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
function __STATIC_INLINE (line 228) | __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
function __STATIC_INLINE (line 237) | __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
function __STATIC_INLINE (line 249) | __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, ui...
function __STATIC_INLINE (line 261) | __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint...
function __STATIC_INLINE (line 272) | __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, u...
function __STATIC_INLINE (line 283) | __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const...
function __STATIC_INLINE (line 298) | __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU...
function __STATIC_INLINE (line 328) | __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* ...
function __STATIC_INLINE (line 339) | __STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t cons...
FILE: 3rd_party/CMSIS/Include/tz_context.h
type TZ_ModuleId_t (line 39) | typedef uint32_t TZ_ModuleId_t;
type TZ_MemoryId_t (line 43) | typedef uint32_t TZ_MemoryId_t;
FILE: 3rd_party/ek-tm4c123gxl/TM4C123GH6PM.h
type IRQn_Type (line 63) | typedef enum {
type WATCHDOG0_Type (line 357) | typedef struct { /*!< WATCHDOG0 Struc...
type GPIOA_Type (line 380) | typedef struct { /*!< GPIOA Structure...
type SSI0_Type (line 419) | typedef struct { /*!< SSI0 Structure ...
type UART0_Type (line 444) | typedef struct { /*!< UART0 Structure...
type I2C0_Type (line 484) | typedef struct { /*!< I2C0 Structure ...
type PWM0_Type (line 532) | typedef struct { /*!< PWM0 Structure ...
type QEI0_Type (line 637) | typedef struct { /*!< QEI0 Structure ...
type TIMER0_Type (line 661) | typedef struct { /*!< TIMER0 Structur...
type WTIMER0_Type (line 703) | typedef struct { /*!< WTIMER0 Structu...
type ADC0_Type (line 745) | typedef struct { /*!< ADC0 Structure ...
type COMP_Type (line 825) | typedef struct { /*!< COMP Structure ...
type CAN0_Type (line 851) | typedef struct { /*!< CAN0 Structure ...
type USB0_Type (line 915) | typedef struct { /*!< USB0 Structure ...
type EEPROM_Type (line 1307) | typedef struct { /*!< EEPROM Structur...
type SYSEXC_Type (line 1341) | typedef struct { /*!< SYSEXC Structur...
type HIB_Type (line 1358) | typedef struct { /*!< HIB Structure ...
type FLASH_CTRL_Type (line 1384) | typedef struct { /*!< FLASH_CTRL Stru...
type SYSCTL_Type (line 1437) | typedef struct { /*!< SYSCTL Structur...
type UDMA_Type (line 1642) | typedef struct { /*!< UDMA Structure ...
FILE: 3rd_party/ek-tm4c123gxl/gnu/startup_TM4C123GH6PM.c
function Reset_Handler (line 363) | void Reset_Handler(void) {
function NMI_Handler (line 410) | void NMI_Handler(void) {
function HardFault_Handler (line 417) | void HardFault_Handler(void) {
function MemManage_Handler (line 424) | void MemManage_Handler(void) {
function BusFault_Handler (line 431) | void BusFault_Handler(void) {
function UsageFault_Handler (line 438) | void UsageFault_Handler(void) {
function Default_Handler (line 445) | void Default_Handler(void) {
FILE: 3rd_party/ek-tm4c123gxl/sysctl.h
type tBoolean (line 54) | typedef unsigned char tBoolean;
FILE: 3rd_party/ek-tm4c123gxl/system_TM4C123GH6PM.c
function getOscClk (line 431) | static uint32_t getOscClk (uint32_t xtal, uint32_t oscSrc) {
function SystemCoreClockUpdate (line 522) | void SystemCoreClockUpdate (void) /* Get Core Clock Frequency...
function SystemInit (line 574) | void SystemInit (void)
FILE: 3rd_party/nucleo-c031c6/gnu/startup_stm32c031xx.c
function Reset_Handler (line 154) | void Reset_Handler(void) {
function NMI_Handler (line 196) | void NMI_Handler(void) {
function HardFault_Handler (line 203) | void HardFault_Handler(void) {
function Default_Handler (line 210) | void Default_Handler(void) {
FILE: 3rd_party/nucleo-c031c6/stm32c031xx.h
type IRQn_Type (line 69) | typedef enum
type ADC_TypeDef (line 116) | typedef struct
type ADC_Common_TypeDef (line 139) | typedef struct
type CRC_TypeDef (line 148) | typedef struct
type DBG_TypeDef (line 162) | typedef struct
type DMA_Channel_TypeDef (line 173) | typedef struct
type DMA_TypeDef (line 181) | typedef struct
type DMAMUX_Channel_TypeDef (line 190) | typedef struct
type DMAMUX_ChannelStatus_TypeDef (line 195) | typedef struct
type DMAMUX_RequestGen_TypeDef (line 201) | typedef struct
type DMAMUX_RequestGenStatus_TypeDef (line 206) | typedef struct
type EXTI_TypeDef (line 215) | typedef struct
type FLASH_TypeDef (line 234) | typedef struct
type GPIO_TypeDef (line 258) | typedef struct
type I2C_TypeDef (line 276) | typedef struct
type IWDG_TypeDef (line 294) | typedef struct
type PWR_TypeDef (line 307) | typedef struct
type RCC_TypeDef (line 339) | typedef struct
type RTC_TypeDef (line 369) | typedef struct
type SPI_TypeDef (line 400) | typedef struct
type SYSCFG_TypeDef (line 416) | typedef struct
type TIM_TypeDef (line 430) | typedef struct
type USART_TypeDef (line 464) | typedef struct
type WWDG_TypeDef (line 484) | typedef struct
FILE: 3rd_party/nucleo-c031c6/stm32c0xx.h
type FlagStatus (line 111) | typedef enum
type FunctionalState (line 117) | typedef enum
type ErrorStatus (line 124) | typedef enum
FILE: 3rd_party/nucleo-c031c6/system_stm32c0xx.c
function SystemInit (line 136) | void SystemInit(void)
function SystemCoreClockUpdate (line 184) | void SystemCoreClockUpdate(void)
FILE: 3rd_party/nucleo-h743zi/gnu/startup_stm32h743xx.c
function Reset_Handler (line 391) | void Reset_Handler(void) {
function NMI_Handler (line 433) | void NMI_Handler(void) {
function HardFault_Handler (line 440) | void HardFault_Handler(void) {
function MemManage_Handler (line 447) | void MemManage_Handler(void) {
function BusFault_Handler (line 454) | void BusFault_Handler(void) {
function UsageFault_Handler (line 461) | void UsageFault_Handler(void) {
function Default_Handler (line 468) | void Default_Handler(void) {
FILE: 3rd_party/nucleo-h743zi/stm32h743xx.h
type IRQn_Type (line 48) | typedef enum
type ADC_TypeDef (line 243) | typedef struct
type ADC_Common_TypeDef (line 290) | typedef struct
type VREFBUF_TypeDef (line 305) | typedef struct
type FDCAN_GlobalTypeDef (line 316) | typedef struct
type TTCAN_TypeDef (line 377) | typedef struct
type FDCAN_ClockCalibrationUnit_TypeDef (line 404) | typedef struct
type CEC_TypeDef (line 419) | typedef struct
type CRC_TypeDef (line 433) | typedef struct
type CRS_TypeDef (line 447) | typedef struct
type DAC_TypeDef (line 460) | typedef struct
type DFSDM_Filter_TypeDef (line 487) | typedef struct
type DFSDM_Channel_TypeDef (line 509) | typedef struct
type DBGMCU_TypeDef (line 522) | typedef struct
type DCMI_TypeDef (line 541) | typedef struct
type DMA_Stream_TypeDef (line 560) | typedef struct
type DMA_TypeDef (line 570) | typedef struct
type BDMA_Channel_TypeDef (line 578) | typedef struct
type BDMA_TypeDef (line 587) | typedef struct
type DMAMUX_Channel_TypeDef (line 593) | typedef struct
type DMAMUX_ChannelStatus_TypeDef (line 598) | typedef struct
type DMAMUX_RequestGen_TypeDef (line 604) | typedef struct
type DMAMUX_RequestGenStatus_TypeDef (line 609) | typedef struct
type MDMA_TypeDef (line 618) | typedef struct
type MDMA_Channel_TypeDef (line 623) | typedef struct
type DMA2D_TypeDef (line 645) | typedef struct
type ETH_TypeDef (line 676) | typedef struct
type EXTI_TypeDef (line 850) | typedef struct
type EXTI_Core_TypeDef (line 895) | typedef struct
type FLASH_TypeDef (line 915) | typedef struct
type FMC_Bank1_TypeDef (line 966) | typedef struct
type FMC_Bank1E_TypeDef (line 975) | typedef struct
type FMC_Bank2_TypeDef (line 984) | typedef struct
type FMC_Bank3_TypeDef (line 998) | typedef struct
type FMC_Bank5_6_TypeDef (line 1013) | typedef struct
type GPIO_TypeDef (line 1026) | typedef struct
type OPAMP_TypeDef (line 1043) | typedef struct
type SYSCFG_TypeDef (line 1054) | typedef struct
type I2C_TypeDef (line 1093) | typedef struct
type IWDG_TypeDef (line 1112) | typedef struct
type JPEG_TypeDef (line 1125) | typedef struct
type LTDC_TypeDef (line 1163) | typedef struct
type LTDC_Layer_TypeDef (line 1188) | typedef struct
type PWR_TypeDef (line 1211) | typedef struct
type RCC_TypeDef (line 1230) | typedef struct
type RTC_TypeDef (line 1304) | typedef struct
type SAI_TypeDef (line 1364) | typedef struct
type SAI_Block_TypeDef (line 1372) | typedef struct
type SPDIFRX_TypeDef (line 1388) | typedef struct
type SDMMC_TypeDef (line 1405) | typedef struct
type DLYB_TypeDef (line 1440) | typedef struct
type HSEM_TypeDef (line 1450) | typedef struct
type HSEM_Common_TypeDef (line 1464) | typedef struct
type SPI_TypeDef (line 1476) | typedef struct
type QUADSPI_TypeDef (line 1501) | typedef struct
type TIM_TypeDef (line 1522) | typedef struct
type LPTIM_TypeDef (line 1556) | typedef struct
type COMPOPT_TypeDef (line 1573) | typedef struct
type COMP_TypeDef (line 1580) | typedef struct
type COMP_Common_TypeDef (line 1585) | typedef struct
type USART_TypeDef (line 1593) | typedef struct
type SWPMI_TypeDef (line 1612) | typedef struct
type WWDG_TypeDef (line 1630) | typedef struct
type RAMECC_MonitorTypeDef (line 1641) | typedef struct
type RAMECC_TypeDef (line 1651) | typedef struct
type HRTIM_Master_TypeDef (line 1665) | typedef struct
type HRTIM_Timerx_TypeDef (line 1683) | typedef struct
type HRTIM_Common_TypeDef (line 1716) | typedef struct
type HRTIM_TypeDef (line 1750) | typedef struct {
type RNG_TypeDef (line 1760) | typedef struct
type MDIOS_TypeDef (line 1771) | typedef struct
type USB_OTG_GlobalTypeDef (line 1851) | typedef struct
type USB_OTG_DeviceTypeDef (line 1886) | typedef struct
type USB_OTG_INEndpointTypeDef (line 1914) | typedef struct
type USB_OTG_OUTEndpointTypeDef (line 1930) | typedef struct
type USB_OTG_HostTypeDef (line 1945) | typedef struct
type USB_OTG_HostChannelTypeDef (line 1959) | typedef struct
type GPV_TypeDef (line 1978) | typedef struct
FILE: 3rd_party/nucleo-h743zi/stm32h7xx.h
type FlagStatus (line 179) | typedef enum
type FunctionalState (line 185) | typedef enum
type ErrorStatus (line 192) | typedef enum
FILE: 3rd_party/nucleo-h743zi/system_stm32h7xx.c
function SystemInit (line 174) | void SystemInit (void)
function SystemCoreClockUpdate (line 341) | void SystemCoreClockUpdate (void)
FILE: 3rd_party/nucleo-l053r8/gnu/startup_stm32l053xx.c
function Reset_Handler (line 154) | void Reset_Handler(void) {
function NMI_Handler (line 196) | void NMI_Handler(void) {
function HardFault_Handler (line 203) | void HardFault_Handler(void) {
function Default_Handler (line 210) | void Default_Handler(void) {
FILE: 3rd_party/nucleo-l053r8/stm32l053xx.h
type IRQn_Type (line 89) | typedef enum
type ADC_TypeDef (line 178) | typedef struct
type ADC_Common_TypeDef (line 197) | typedef struct
type COMP_TypeDef (line 207) | typedef struct
type CRC_TypeDef (line 217) | typedef struct
type CRS_TypeDef (line 232) | typedef struct
type DAC_TypeDef (line 244) | typedef struct
type DBGMCU_TypeDef (line 261) | typedef struct
type DMA_Channel_TypeDef (line 273) | typedef struct
type DMA_TypeDef (line 281) | typedef struct
type DMA_Request_TypeDef (line 287) | typedef struct
type EXTI_TypeDef (line 296) | typedef struct
type FLASH_TypeDef (line 309) | typedef struct
type OB_TypeDef (line 326) | typedef struct
type GPIO_TypeDef (line 338) | typedef struct
type LPTIM_TypeDef (line 358) | typedef struct
type SYSCFG_TypeDef (line 374) | typedef struct
type I2C_TypeDef (line 389) | typedef struct
type IWDG_TypeDef (line 408) | typedef struct
type LCD_TypeDef (line 421) | typedef struct
type FW_TypeDef (line 435) | typedef struct
type PWR_TypeDef (line 453) | typedef struct
type RCC_TypeDef (line 462) | typedef struct
type RNG_TypeDef (line 491) | typedef struct
type RTC_TypeDef (line 502) | typedef struct
type SPI_TypeDef (line 536) | typedef struct
type TIM_TypeDef (line 561) | typedef struct
type TSC_TypeDef (line 604) | typedef struct
type USART_TypeDef (line 626) | typedef struct
type WWDG_TypeDef (line 648) | typedef struct
type USB_TypeDef (line 659) | typedef struct
FILE: 3rd_party/nucleo-l053r8/stm32l0xx.h
type FlagStatus (line 145) | typedef enum
type FunctionalState (line 151) | typedef enum
type ErrorStatus (line 158) | typedef enum
FILE: 3rd_party/nucleo-l053r8/system_stm32l0xx.c
function SystemInit (line 153) | void SystemInit (void)
function SystemCoreClockUpdate (line 222) | void SystemCoreClockUpdate (void)
FILE: FreeRTOS-comparison/croutine.c
function BaseType_t (line 103) | BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
function vCoRoutineAddToDelayedList (line 163) | void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
function prvCheckPendingReadyList (line 202) | static void prvCheckPendingReadyList( void )
function prvCheckDelayedList (line 225) | static void prvCheckDelayedList( void )
function vCoRoutineSchedule (line 284) | void vCoRoutineSchedule( void )
function prvInitialiseCoRoutineLists (line 319) | static void prvInitialiseCoRoutineLists( void )
function BaseType_t (line 339) | BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList )
FILE: FreeRTOS-comparison/event_groups.c
type EventGroup_t (line 64) | typedef struct EventGroupDef_t
function EventGroupHandle_t (line 96) | EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEvent...
function EventGroupHandle_t (line 148) | EventGroupHandle_t xEventGroupCreate( void )
function EventBits_t (line 194) | EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
function EventBits_t (line 317) | EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
function EventBits_t (line 473) | EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
function BaseType_t (line 503) | BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
function EventBits_t (line 517) | EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup )
function EventBits_t (line 533) | EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
function vEventGroupDelete (line 629) | void vEventGroupDelete( EventGroupHandle_t xEventGroup )
function vEventGroupSetBitsCallback (line 677) | void vEventGroupSetBitsCallback( void * pvEventGroup,
function vEventGroupClearBitsCallback (line 686) | void vEventGroupClearBitsCallback( void * pvEventGroup,
function BaseType_t (line 693) | static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEvent...
function BaseType_t (line 732) | BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup,
function UBaseType_t (line 749) | UBaseType_t uxEventGroupGetNumber( void * xEventGroup )
function vEventGroupSetNumber (line 771) | void vEventGroupSetNumber( void * xEventGroup,
FILE: FreeRTOS-comparison/examples/blinky/blinky.c
function Blinky_task (line 33) | void Blinky_task(void *pvParameters) {
FILE: FreeRTOS-comparison/examples/blinky/bsp_nucleo-l053r8.c
function vApplicationTickHook (line 55) | void vApplicationTickHook(void) {
function vApplicationIdleHook (line 59) | void vApplicationIdleHook(void) {
function vApplicationStackOverflowHook (line 69) | void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) {
function vApplicationGetIdleTaskMemory (line 79) | void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer,
function BSP_init (line 105) | void BSP_init(void) {
function BSP_ledOn (line 131) | void BSP_ledOn(void) { GPIOA->BSRR = (1U << LED_PIN); }
function BSP_ledOff (line 132) | void BSP_ledOff(void) { GPIOA->BSRR = (1U << (LED_PIN + 16U)); }
function BSP_start (line 135) | void BSP_start(void) {
function assert_failed (line 148) | void assert_failed(char const * const module, int const label) {
FILE: FreeRTOS-comparison/examples/blinky/main.c
function main (line 33) | int main() {
FILE: FreeRTOS-comparison/examples/blinky_button/blinky1.c
type Blinky1 (line 34) | typedef struct { /* Blinky1 private data */
function Blinky1_task (line 49) | void Blinky1_task(void *pvParameters) {
function Blinky1_init (line 63) | static void Blinky1_init(Blinky1 * const me, Event const * const ie) {
function Blinky1_dispatch (line 73) | static void Blinky1_dispatch(Blinky1 * const me, Event const * const e) {
FILE: FreeRTOS-comparison/examples/blinky_button/blinky3.c
type Blinky3 (line 34) | typedef struct { /* Blinky3 task */
function Blinky3_task (line 49) | void Blinky3_task(void *pvParameters) {
function Blinky3_init (line 63) | static void Blinky3_init(Blinky3 * const me, Event const * const ie) {
function Blinky3_dispatch (line 73) | static void Blinky3_dispatch(Blinky3 * const me, Event const * const e) {
FILE: FreeRTOS-comparison/examples/blinky_button/blinky_button.h
type Signal (line 32) | typedef uint16_t Signal;
type Event (line 35) | typedef struct {
type Signals (line 45) | enum Signals {
type BlinkyWorkEvt (line 56) | typedef struct {
type ButtonWorkEvt (line 62) | typedef struct {
FILE: FreeRTOS-comparison/examples/blinky_button/bsp_nucleo-l053r8.c
function vApplicationTickHook (line 63) | void vApplicationTickHook(void) {
function vApplicationIdleHook (line 149) | void vApplicationIdleHook(void) {
function vApplicationStackOverflowHook (line 163) | void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) {
function vApplicationGetIdleTaskMemory (line 173) | void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer,
function BSP_init (line 199) | void BSP_init(void) {
function BSP_d1on (line 240) | void BSP_d1on(void) { GPIOA->BSRR = (1U << TST1_PIN); }
function BSP_d1off (line 241) | void BSP_d1off(void) { GPIOA->BSRR = (1U << (TST1_PIN + 16U)); }
function BSP_d2on (line 243) | void BSP_d2on(void) { GPIOA->BSRR = (1U << TST2_PIN); }
function BSP_d2off (line 244) | void BSP_d2off(void) { GPIOA->BSRR = (1U << (TST2_PIN + 16U)); }
function BSP_d3on (line 246) | void BSP_d3on(void) { GPIOA->BSRR = (1U << TST3_PIN); }
function BSP_d3off (line 247) | void BSP_d3off(void) { GPIOA->BSRR = (1U << (TST3_PIN + 16U)); }
function BSP_d4on (line 249) | void BSP_d4on(void) { GPIOA->BSRR = (1U << TST4_PIN); }
function BSP_d4off (line 250) | void BSP_d4off(void) { GPIOA->BSRR = (1U << (TST4_PIN + 16U)); }
function BSP_d5on (line 252) | void BSP_d5on(void) { GPIOA->BSRR = (1U << TST5_PIN); }
function BSP_d5off (line 253) | void BSP_d5off(void) { GPIOA->BSRR = (1U << (TST5_PIN + 16U)); }
function BSP_d6on (line 255) | void BSP_d6on(void) { GPIOA->BSRR = (1U << TST6_PIN); }
function BSP_d6off (line 256) | void BSP_d6off(void) { GPIOA->BSRR = (1U << (TST6_PIN + 16U)); }
function Event (line 259) | Event const *BSP_getWorkEvtBlinky1(uint8_t num) {
function Event (line 278) | Event const *BSP_getWorkEvtBlinky3(uint8_t num) {
function BSP_start (line 298) | void BSP_start(void) {
function assert_failed (line 311) | void assert_failed(char const * const module, int const label) {
FILE: FreeRTOS-comparison/examples/blinky_button/button2a.c
type Button2a (line 34) | typedef struct { /* Button2a task */
function Button2a_task (line 47) | void Button2a_task(void *pvParameters) {
function Button2a_init (line 61) | static void Button2a_init(Button2a * const me, Event const * const ie) {
function Button2a_dispatch (line 66) | static void Button2a_dispatch(Button2a * const me, Event const * const e) {
FILE: FreeRTOS-comparison/examples/blinky_button/button2b.c
type Button2b (line 34) | typedef struct { /* Button2b task */
function Button2b_task (line 47) | void Button2b_task(void *pvParameters) {
function Button2b_init (line 61) | static void Button2b_init(Button2b * const me, Event const * const ie) {
function Button2b_dispatch (line 66) | static void Button2b_dispatch(Button2b * const me, Event const * const e) {
FILE: FreeRTOS-comparison/examples/blinky_button/main.c
function main (line 34) | int main() {
FILE: FreeRTOS-comparison/include/FreeRTOS.h
type xSTATIC_LIST_ITEM (line 1201) | struct xSTATIC_LIST_ITEM
type StaticListItem_t (line 1212) | typedef struct xSTATIC_LIST_ITEM StaticListItem_t;
type xSTATIC_MINI_LIST_ITEM (line 1216) | struct xSTATIC_MINI_LIST_ITEM
type StaticMiniListItem_t (line 1224) | typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t;
type StaticMiniListItem_t (line 1226) | typedef struct xSTATIC_LIST_ITEM StaticMiniListItem_t;
type StaticList_t (line 1230) | typedef struct xSTATIC_LIST
type StaticTask_t (line 1256) | typedef struct xSTATIC_TCB
type StaticQueue_t (line 1320) | typedef struct xSTATIC_QUEUE
type StaticQueue_t (line 1347) | typedef StaticQueue_t StaticSemaphore_t;
type StaticEventGroup_t (line 1363) | typedef struct xSTATIC_EVENT_GROUP
type StaticTimer_t (line 1391) | typedef struct xSTATIC_TIMER
type StaticStreamBuffer_t (line 1418) | typedef struct xSTATIC_STREAM_BUFFER
type StaticStreamBuffer_t (line 1432) | typedef StaticStreamBuffer_t StaticMessageBuffer_t;
FILE: FreeRTOS-comparison/include/atomic.h
function portFORCE_INLINE (line 110) | static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t vol...
function portFORCE_INLINE (line 146) | static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile ...
function portFORCE_INLINE (line 178) | static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void...
function portFORCE_INLINE (line 211) | static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pul...
function portFORCE_INLINE (line 239) | static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile ...
function portFORCE_INLINE (line 265) | static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile...
function portFORCE_INLINE (line 290) | static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile...
function portFORCE_INLINE (line 317) | static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulD...
function portFORCE_INLINE (line 344) | static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pul...
function portFORCE_INLINE (line 371) | static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pu...
function portFORCE_INLINE (line 398) | static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pul...
FILE: FreeRTOS-comparison/include/croutine.h
type CRCB_t (line 53) | typedef struct corCoRoutineControlBlock
FILE: FreeRTOS-comparison/include/event_groups.h
type EventGroupDef_t (line 82) | struct EventGroupDef_t
type EventGroupDef_t (line 83) | struct EventGroupDef_t
type TickType_t (line 93) | typedef TickType_t EventBits_t;
FILE: FreeRTOS-comparison/include/list.h
type xLIST (line 143) | struct xLIST
type xLIST_ITEM (line 144) | struct xLIST_ITEM
type ListItem_t (line 154) | typedef struct xLIST_ITEM ListItem_t;
type xMINI_LIST_ITEM (line 157) | struct xMINI_LIST_ITEM
type MiniListItem_t (line 164) | typedef struct xMINI_LIST_ITEM MiniListItem_t;
type MiniListItem_t (line 166) | typedef struct xLIST_ITEM MiniListItem_t;
type xLIST (line 172) | struct xLIST
FILE: FreeRTOS-comparison/include/message_buffer.h
type StreamBufferHandle_t (line 86) | typedef StreamBufferHandle_t MessageBufferHandle_t;
FILE: FreeRTOS-comparison/include/portable.h
type HeapRegion_t (line 135) | typedef struct HeapRegion
type HeapStats_t (line 142) | typedef struct xHeapStats
type xMEMORY_REGION (line 225) | struct xMEMORY_REGION
type xMEMORY_REGION (line 227) | struct xMEMORY_REGION
FILE: FreeRTOS-comparison/include/queue.h
type QueueDefinition (line 50) | struct QueueDefinition
type QueueDefinition (line 51) | struct QueueDefinition
type QueueDefinition (line 58) | struct QueueDefinition
type QueueDefinition (line 65) | struct QueueDefinition
FILE: FreeRTOS-comparison/include/semphr.h
type QueueHandle_t (line 38) | typedef QueueHandle_t SemaphoreHandle_t;
FILE: FreeRTOS-comparison/include/stream_buffer.h
type StreamBufferDef_t (line 71) | struct StreamBufferDef_t
type StreamBufferDef_t (line 72) | struct StreamBufferDef_t
FILE: FreeRTOS-comparison/include/task.h
type tskTaskControlBlock (line 86) | struct tskTaskControlBlock
type tskTaskControlBlock (line 87) | struct tskTaskControlBlock
type BaseType_t (line 93) | typedef BaseType_t (* TaskHookFunction_t)( void * );
type eTaskState (line 96) | typedef enum
type eNotifyAction (line 107) | typedef enum
type TimeOut_t (line 119) | typedef struct xTIME_OUT
type MemoryRegion_t (line 128) | typedef struct xMEMORY_REGION
type TaskParameters_t (line 138) | typedef struct xTASK_PARAMETERS
type TaskStatus_t (line 154) | typedef struct xTASK_STATUS
type eSleepModeStatus (line 172) | typedef enum
FILE: FreeRTOS-comparison/include/timers.h
type tmrTimerControl (line 79) | struct tmrTimerControl
type tmrTimerControl (line 80) | struct tmrTimerControl
FILE: FreeRTOS-comparison/list.c
function vListInitialise (line 50) | void vListInitialise( List_t * const pxList )
function vListInitialiseItem (line 86) | void vListInitialiseItem( ListItem_t * const pxItem )
function vListInsertEnd (line 98) | void vListInsertEnd( List_t * const pxList,
function vListInsert (line 128) | void vListInsert( List_t * const pxList,
function UBaseType_t (line 199) | UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
FILE: FreeRTOS-comparison/portable/ARMv8M/copy_files.py
function copy_files_in_dir (line 99) | def copy_files_in_dir(src_abs_path, dst_abs_path):
function copy_common_files_for_compiler_and_arch (line 115) | def copy_common_files_for_compiler_and_arch(compiler, arch, src_paths, d...
function copy_portable_files_for_compiler_and_arch (line 124) | def copy_portable_files_for_compiler_and_arch(compiler, arch, src_paths,...
function copy_files (line 133) | def copy_files():
function main (line 147) | def main():
FILE: FreeRTOS-comparison/portable/ARMv8M/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c
function vRestoreContextOfFirstTask (line 47) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 136) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 158) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 174) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 190) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 213) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 227) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 240) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 424) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
function vPortAllocateSecureContext (line 448) | void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attri...
function vPortFreeSecureContext (line 461) | void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( nak...
FILE: FreeRTOS-comparison/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c
function vRestoreContextOfFirstTask (line 47) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 131) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 153) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 169) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 185) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 208) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 222) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 235) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 359) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
FILE: FreeRTOS-comparison/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 134) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 153) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 168) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 183) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 207) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 224) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 239) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 423) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
function vPortAllocateSecureContext (line 442) | void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attri...
function vPortFreeSecureContext (line 455) | void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( nak...
FILE: FreeRTOS-comparison/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 129) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 148) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 163) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 178) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 202) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 219) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function SVC_Handler (line 348) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
FILE: FreeRTOS-comparison/portable/ARMv8M/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c
function SecureContext_LoadContextAsm (line 42) | void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
function SecureContext_SaveContextAsm (line 69) | void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
FILE: FreeRTOS-comparison/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c
function SecureContext_LoadContextAsm (line 38) | void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
function SecureContext_SaveContextAsm (line 65) | void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
FILE: FreeRTOS-comparison/portable/ARMv8M/secure/context/secure_context.c
function ulGetSecureContext (line 101) | static uint32_t ulGetSecureContext( void * pvTaskHandle )
function vReturnSecureContext (line 129) | static void vReturnSecureContext( uint32_t ulSecureContextIndex )
function secureportNON_SECURE_CALLABLE (line 138) | secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
function secureportNON_SECURE_CALLABLE (line 182) | secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_Alloca...
function secureportNON_SECURE_CALLABLE (line 278) | secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 309) | secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 331) | secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureCont...
FILE: FreeRTOS-comparison/portable/ARMv8M/secure/context/secure_context.h
type SecureContext_t (line 55) | typedef struct SecureContext
type SecureContextHandle_t (line 67) | typedef uint32_t SecureContextHandle_t;
FILE: FreeRTOS-comparison/portable/ARMv8M/secure/heap/secure_heap.c
type BlockLink_t (line 82) | typedef struct A_BLOCK_LINK
function prvHeapInit (line 136) | static void prvHeapInit( void )
function prvInsertBlockIntoFreeList (line 184) | static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
function vPortFree (line 396) | void vPortFree( void * pv )
function xPortGetFreeHeapSize (line 444) | size_t xPortGetFreeHeapSize( void )
function xPortGetMinimumEverFreeHeapSize (line 450) | size_t xPortGetMinimumEverFreeHeapSize( void )
FILE: FreeRTOS-comparison/portable/ARMv8M/secure/init/secure_init.c
function secureportNON_SECURE_CALLABLE (line 63) | secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( ...
function secureportNON_SECURE_CALLABLE (line 81) | secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
FILE: FreeRTOS-comparison/portable/CCS/ARM_CM3/port.c
function StackType_t (line 169) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 196) | static void prvTaskExitError( void )
function BaseType_t (line 216) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 300) | void vPortEndScheduler( void )
function vPortEnterCritical (line 308) | void vPortEnterCritical( void )
function vPortExitCritical (line 325) | void vPortExitCritical( void )
function xPortSysTickHandler (line 337) | void xPortSysTickHandler( void )
function vPortSuppressTicksAndSleep (line 360) | void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
function vPortSetupTimerInterrupt (line 584) | void vPortSetupTimerInterrupt( void )
function vPortValidateInterruptPriority (line 607) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/CCS/ARM_CM3/portmacro.h
type portSTACK_TYPE (line 56) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 57) | typedef long BaseType_t;
type UBaseType_t (line 58) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/CCS/ARM_CM4F/port.c
function StackType_t (line 183) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 215) | static void prvTaskExitError( void )
function BaseType_t (line 235) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 325) | void vPortEndScheduler( void )
function vPortEnterCritical (line 333) | void vPortEnterCritical( void )
function vPortExitCritical (line 350) | void vPortExitCritical( void )
function xPortSysTickHandler (line 362) | void xPortSysTickHandler( void )
function vPortSuppressTicksAndSleep (line 385) | void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
function vPortSetupTimerInterrupt (line 609) | void vPortSetupTimerInterrupt( void )
function vPortValidateInterruptPriority (line 632) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/CCS/ARM_CM4F/portmacro.h
type portSTACK_TYPE (line 56) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 57) | typedef long BaseType_t;
type UBaseType_t (line 58) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/CCS/ARM_Cortex-R4/port.c
function StackType_t (line 81) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function prvSetupTimerInterrupt (line 169) | static void prvSetupTimerInterrupt(void)
function BaseType_t (line 202) | BaseType_t xPortStartScheduler(void)
function vPortEndScheduler (line 222) | void vPortEndScheduler(void)
function __interrupt (line 234) | __interrupt void vPortNonPreemptiveTick( void )
function vPortEnterCritical (line 262) | void vPortEnterCritical( void )
function vPortExitCritical (line 278) | void vPortExitCritical( void )
function vPortTaskUsesFPU (line 298) | void vPortTaskUsesFPU( void )
FILE: FreeRTOS-comparison/portable/CCS/ARM_Cortex-R4/portmacro.h
type portSTACK_TYPE (line 51) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 52) | typedef long BaseType_t;
type UBaseType_t (line 53) | typedef unsigned long UBaseType_t;
type TickType_t (line 56) | typedef uint16_t TickType_t;
type TickType_t (line 59) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/CCS/MSP430X/port.c
type TCB_t (line 45) | typedef void TCB_t;
function StackType_t (line 73) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function vPortEndScheduler (line 157) | void vPortEndScheduler( void )
function vPortSetupTimerInterrupt (line 167) | void vPortSetupTimerInterrupt( void )
function interrupt (line 174) | interrupt void vTickISREntry( void )
FILE: FreeRTOS-comparison/portable/CCS/MSP430X/portmacro.h
type portSTACK_TYPE (line 61) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 62) | typedef short BaseType_t;
type UBaseType_t (line 63) | typedef unsigned short UBaseType_t;
type TickType_t (line 66) | typedef uint16_t TickType_t;
type TickType_t (line 69) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/Common/mpu_wrappers.c
function BaseType_t (line 54) | BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode,
function TaskHandle_t (line 88) | TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
function MPU_vTaskDelete (line 123) | void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) /* FREERTOS_SYSTEM_C...
function BaseType_t (line 145) | BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
function BaseType_t (line 172) | BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_...
function MPU_vTaskDelay (line 198) | void MPU_vTaskDelay( TickType_t xTicksToDelay ) /* FREERTOS_SYSTEM_CALL */
function UBaseType_t (line 220) | UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t pxTask ) /* FREERT...
function MPU_vTaskPrioritySet (line 246) | void MPU_vTaskPrioritySet( TaskHandle_t pxTask,
function eTaskState (line 269) | eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_C...
function MPU_vTaskGetInfo (line 295) | void MPU_vTaskGetInfo( TaskHandle_t xTask,
function TaskHandle_t (line 320) | TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */
function MPU_vTaskSuspend (line 345) | void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) /* FREERTOS_SYSTEM...
function MPU_vTaskResume (line 367) | void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) /* FREERTOS_SYSTEM_C...
function MPU_vTaskSuspendAll (line 388) | void MPU_vTaskSuspendAll( void ) /* FREERTOS_SYSTEM_CALL */
function BaseType_t (line 408) | BaseType_t MPU_xTaskResumeAll( void ) /* FREERTOS_SYSTEM_CALL */
function TickType_t (line 432) | TickType_t MPU_xTaskGetTickCount( void ) /* FREERTOS_SYSTEM_CALL */
function UBaseType_t (line 456) | UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */
function TaskHandle_t (line 505) | TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) /* FREERTO...
function MPU_vTaskList (line 531) | void MPU_vTaskList( char * pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */
function MPU_vTaskGetRunTimeStats (line 553) | void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) /* FREERTOS_SYSTEM...
function configRUN_TIME_COUNTER_TYPE (line 575) | configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* F...
function configRUN_TIME_COUNTER_TYPE (line 601) | configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* F...
function MPU_vTaskSetApplicationTaskTag (line 627) | void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
function TaskHookFunction_t (line 650) | TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) ...
function MPU_vTaskSetThreadLocalStoragePointer (line 676) | void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
function BaseType_t (line 727) | BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
function UBaseType_t (line 754) | UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * pxTaskStatusArray,
function BaseType_t (line 781) | BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERT...
function UBaseType_t (line 806) | UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* FRE...
function configSTACK_DEPTH_TYPE (line 832) | configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xT...
function TaskHandle_t (line 858) | TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* FREERTOS_SYSTEM_CA...
function BaseType_t (line 883) | BaseType_t MPU_xTaskGetSchedulerState( void ) /* FREERTOS_SYSTEM_CALL */
function MPU_vTaskSetTimeOutState (line 908) | void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* FREERTOS...
function BaseType_t (line 928) | BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
function BaseType_t (line 954) | BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
function BaseType_t (line 984) | BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
function MPU_ulTaskGenericNotifyTake (line 1014) | uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
function BaseType_t (line 1042) | BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
function MPU_ulTaskGenericNotifyValueClear (line 1069) | uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
function QueueHandle_t (line 1097) | QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength,
function QueueHandle_t (line 1125) | QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLe...
function BaseType_t (line 1154) | BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue,
function BaseType_t (line 1179) | BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
function UBaseType_t (line 1206) | UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) /*...
function UBaseType_t (line 1230) | UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* ...
function BaseType_t (line 1254) | BaseType_t MPU_xQueueReceive( QueueHandle_t pxQueue,
function BaseType_t (line 1280) | BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue,
function BaseType_t (line 1306) | BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
function TaskHandle_t (line 1332) | TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* FRE...
function QueueHandle_t (line 1358) | QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) /* FREE...
function QueueHandle_t (line 1384) | QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
function QueueHandle_t (line 1411) | QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue,
function QueueHandle_t (line 1439) | QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t...
function BaseType_t (line 1467) | BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
function BaseType_t (line 1494) | BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) /* FREER...
function QueueSetHandle_t (line 1520) | QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) /...
function QueueSetMemberHandle_t (line 1546) | QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
function BaseType_t (line 1573) | BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
function BaseType_t (line 1600) | BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemap...
function MPU_vQueueAddToRegistry (line 1627) | void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
function MPU_vQueueUnregisterQueue (line 1650) | void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* FREERTOS_SYSTE...
function MPU_vQueueDelete (line 1697) | void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
function MPU_vTimerSetTimerID (line 1744) | void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
function BaseType_t (line 1767) | BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* FREERTOS_S...
function TaskHandle_t (line 1793) | TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* FREERTOS_SYST...
function MPU_vTimerSetReloadMode (line 1819) | void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
function UBaseType_t (line 1842) | UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer )
function TickType_t (line 1894) | TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* FREERTOS_SYSTE...
function TickType_t (line 1920) | TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* FREERTOS_S...
function BaseType_t (line 1946) | BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
function EventGroupHandle_t (line 1976) | EventGroupHandle_t MPU_xEventGroupCreate( void ) /* FREERTOS_SYSTEM_CALL */
function EventGroupHandle_t (line 2002) | EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxE...
function EventBits_t (line 2027) | EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
function EventBits_t (line 2055) | EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
function EventBits_t (line 2080) | EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
function EventBits_t (line 2105) | EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
function MPU_vEventGroupDelete (line 2132) | void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) /* FREERTOS...
function MPU_xStreamBufferSend (line 2152) | size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
function MPU_xStreamBufferNextMessageLengthBytes (line 2179) | size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xSt...
function MPU_xStreamBufferReceive (line 2203) | size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
function MPU_vStreamBufferDelete (line 2230) | void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) /* FR...
function BaseType_t (line 2250) | BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer )...
function BaseType_t (line 2274) | BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ...
function BaseType_t (line 2298) | BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) ...
function MPU_xStreamBufferSpacesAvailable (line 2322) | size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuf...
function MPU_xStreamBufferBytesAvailable (line 2345) | size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuff...
function BaseType_t (line 2369) | BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStrea...
function StreamBufferHandle_t (line 2395) | StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeB...
function StreamBufferHandle_t (line 2449) | StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBuffe...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CA53_64_BIT/port.c
function StackType_t (line 175) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function BaseType_t (line 267) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 346) | void vPortEndScheduler( void )
function vPortEnterCritical (line 354) | void vPortEnterCritical( void )
function vPortExitCritical (line 376) | void vPortExitCritical( void )
function FreeRTOS_Tick_Handler (line 396) | void FreeRTOS_Tick_Handler( void )
function vPortTaskUsesFPU (line 439) | void vPortTaskUsesFPU( void )
function vPortClearInterruptMask (line 450) | void vPortClearInterruptMask( UBaseType_t uxNewMaskValue )
function UBaseType_t (line 459) | UBaseType_t uxPortSetInterruptMask( void )
function vPortValidateInterruptPriority (line 486) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CA53_64_BIT/portmacro.h
type portSTACK_TYPE (line 55) | typedef portSTACK_TYPE StackType_t;
type portBASE_TYPE (line 56) | typedef portBASE_TYPE BaseType_t;
type UBaseType_t (line 57) | typedef uint64_t UBaseType_t;
type TickType_t (line 59) | typedef uint64_t TickType_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CA53_64_BIT_SRE/port.c
function StackType_t (line 160) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function BaseType_t (line 252) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 284) | void vPortEndScheduler( void )
function vPortEnterCritical (line 292) | void vPortEnterCritical( void )
function vPortExitCritical (line 314) | void vPortExitCritical( void )
function FreeRTOS_Tick_Handler (line 334) | void FreeRTOS_Tick_Handler( void )
function vPortTaskUsesFPU (line 382) | void vPortTaskUsesFPU( void )
function vPortClearInterruptMask (line 393) | void vPortClearInterruptMask( UBaseType_t uxNewMaskValue )
function UBaseType_t (line 402) | UBaseType_t uxPortSetInterruptMask( void )
function vPortValidateInterruptPriority (line 435) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h
type portSTACK_TYPE (line 55) | typedef portSTACK_TYPE StackType_t;
type portBASE_TYPE (line 56) | typedef portBASE_TYPE BaseType_t;
type UBaseType_t (line 57) | typedef uint64_t UBaseType_t;
type TickType_t (line 59) | typedef uint64_t TickType_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CA9/port.c
function StackType_t (line 221) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function prvTaskExitError (line 312) | static void prvTaskExitError( void )
function BaseType_t (line 326) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 404) | void vPortEndScheduler( void )
function vPortEnterCritical (line 412) | void vPortEnterCritical( void )
function vPortExitCritical (line 434) | void vPortExitCritical( void )
function FreeRTOS_Tick_Handler (line 454) | void FreeRTOS_Tick_Handler( void )
function vPortTaskUsesFPU (line 481) | void vPortTaskUsesFPU( void )
function vPortClearInterruptMask (line 496) | void vPortClearInterruptMask( uint32_t ulNewMaskValue )
function ulPortSetInterruptMask (line 505) | uint32_t ulPortSetInterruptMask( void )
function vPortValidateInterruptPriority (line 532) | void vPortValidateInterruptPriority( void )
function vApplicationFPUSafeIRQHandler (line 566) | void vApplicationFPUSafeIRQHandler( uint32_t ulICCIAR )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CA9/portmacro.h
type portSTACK_TYPE (line 55) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 56) | typedef long BaseType_t;
type UBaseType_t (line 57) | typedef unsigned long UBaseType_t;
type TickType_t (line 59) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM0/port.c
function StackType_t (line 148) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 168) | static void prvTaskExitError( void )
function vPortSVCHandler (line 194) | void vPortSVCHandler( void )
function vPortStartFirstTask (line 201) | void vPortStartFirstTask( void )
function BaseType_t (line 232) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 262) | void vPortEndScheduler( void )
function vPortYield (line 270) | void vPortYield( void )
function vPortEnterCritical (line 282) | void vPortEnterCritical( void )
function vPortExitCritical (line 291) | void vPortExitCritical( void )
function ulSetInterruptMaskFromISR (line 303) | uint32_t ulSetInterruptMaskFromISR( void )
function vClearInterruptMaskFromISR (line 314) | void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ul...
function xPortPendSVHandler (line 324) | void xPortPendSVHandler( void )
function xPortSysTickHandler (line 373) | void xPortSysTickHandler( void )
function vPortSetupTimerInterrupt (line 394) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
function vPortSuppressTicksAndSleep (line 417) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM0/portmacro.h
type portSTACK_TYPE (line 56) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 57) | typedef long BaseType_t;
type UBaseType_t (line 58) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 47) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 136) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 158) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 174) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 190) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 213) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 227) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 240) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 424) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
function vPortAllocateSecureContext (line 448) | void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attri...
function vPortFreeSecureContext (line 461) | void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( nak...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/secure/secure_context.c
function ulGetSecureContext (line 101) | static uint32_t ulGetSecureContext( void * pvTaskHandle )
function vReturnSecureContext (line 129) | static void vReturnSecureContext( uint32_t ulSecureContextIndex )
function secureportNON_SECURE_CALLABLE (line 138) | secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
function secureportNON_SECURE_CALLABLE (line 182) | secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_Alloca...
function secureportNON_SECURE_CALLABLE (line 278) | secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 309) | secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 331) | secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureCont...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/secure/secure_context.h
type SecureContext_t (line 55) | typedef struct SecureContext
type SecureContextHandle_t (line 67) | typedef uint32_t SecureContextHandle_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/secure/secure_context_port.c
function SecureContext_LoadContextAsm (line 42) | void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
function SecureContext_SaveContextAsm (line 69) | void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/secure/secure_heap.c
type BlockLink_t (line 82) | typedef struct A_BLOCK_LINK
function prvHeapInit (line 136) | static void prvHeapInit( void )
function prvInsertBlockIntoFreeList (line 184) | static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
function vPortFree (line 396) | void vPortFree( void * pv )
function xPortGetFreeHeapSize (line 444) | size_t xPortGetFreeHeapSize( void )
function xPortGetMinimumEverFreeHeapSize (line 450) | size_t xPortGetMinimumEverFreeHeapSize( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23/secure/secure_init.c
function secureportNON_SECURE_CALLABLE (line 63) | secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( ...
function secureportNON_SECURE_CALLABLE (line 81) | secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 47) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 131) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 153) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 169) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 185) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 208) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 222) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 235) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 359) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM3/port.c
function StackType_t (line 179) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 199) | static void prvTaskExitError( void )
function vPortSVCHandler (line 225) | void vPortSVCHandler( void )
function prvPortStartFirstTask (line 245) | static void prvPortStartFirstTask( void )
function BaseType_t (line 266) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 363) | void vPortEndScheduler( void )
function vPortEnterCritical (line 371) | void vPortEnterCritical( void )
function vPortExitCritical (line 388) | void vPortExitCritical( void )
function xPortPendSVHandler (line 400) | void xPortPendSVHandler( void )
function xPortSysTickHandler (line 437) | void xPortSysTickHandler( void )
function vPortSuppressTicksAndSleep (line 459) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 682) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
function vPortValidateInterruptPriority (line 705) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM3/portmacro.h
type portSTACK_TYPE (line 56) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 57) | typedef long BaseType_t;
type UBaseType_t (line 58) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
function ucPortCountLeadingZeros (line 132) | __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLead...
function portFORCE_INLINE (line 174) | portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
function portFORCE_INLINE (line 196) | portFORCE_INLINE static void vPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 212) | portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 232) | portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 134) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 153) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 168) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 183) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 207) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 224) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 239) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 423) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
function vPortAllocateSecureContext (line 442) | void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attri...
function vPortFreeSecureContext (line 455) | void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( nak...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/secure/secure_context.c
function ulGetSecureContext (line 101) | static uint32_t ulGetSecureContext( void * pvTaskHandle )
function vReturnSecureContext (line 129) | static void vReturnSecureContext( uint32_t ulSecureContextIndex )
function secureportNON_SECURE_CALLABLE (line 138) | secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
function secureportNON_SECURE_CALLABLE (line 182) | secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_Alloca...
function secureportNON_SECURE_CALLABLE (line 278) | secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 309) | secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 331) | secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureCont...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/secure/secure_context.h
type SecureContext_t (line 55) | typedef struct SecureContext
type SecureContextHandle_t (line 67) | typedef uint32_t SecureContextHandle_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/secure/secure_context_port.c
function SecureContext_LoadContextAsm (line 38) | void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
function SecureContext_SaveContextAsm (line 65) | void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/secure/secure_heap.c
type BlockLink_t (line 82) | typedef struct A_BLOCK_LINK
function prvHeapInit (line 136) | static void prvHeapInit( void )
function prvInsertBlockIntoFreeList (line 184) | static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
function vPortFree (line 396) | void vPortFree( void * pv )
function xPortGetFreeHeapSize (line 444) | size_t xPortGetFreeHeapSize( void )
function xPortGetMinimumEverFreeHeapSize (line 450) | size_t xPortGetMinimumEverFreeHeapSize( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33/secure/secure_init.c
function secureportNON_SECURE_CALLABLE (line 63) | secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( ...
function secureportNON_SECURE_CALLABLE (line 81) | secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 129) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 148) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 163) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 178) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 202) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 219) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function SVC_Handler (line 348) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM3_MPU/port.c
function StackType_t (line 206) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function vPortSVCHandler (line 236) | void vPortSVCHandler( void )
function prvSVCHandler (line 255) | static void prvSVCHandler( uint32_t * pulParam )
function prvRestoreContextOfFirstTask (line 335) | static void prvRestoreContextOfFirstTask( void )
function BaseType_t (line 382) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 487) | void vPortEndScheduler( void )
function vPortEnterCritical (line 495) | void vPortEnterCritical( void )
function vPortExitCritical (line 522) | void vPortExitCritical( void )
function xPortPendSVHandler (line 564) | void xPortPendSVHandler( void )
function xPortSysTickHandler (line 623) | void xPortSysTickHandler( void )
function vPortSetupTimerInterrupt (line 644) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
function prvSetupMPU (line 656) | static void prvSetupMPU( void )
function prvGetMPURegionSizeSetting (line 720) | static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
function BaseType_t (line 744) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vResetPrivilege (line 761) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vPortStoreTaskMPUSettings (line 774) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function vPortValidateInterruptPriority (line 864) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM3_MPU/portmacro.h
type portSTACK_TYPE (line 56) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 57) | typedef long BaseType_t;
type UBaseType_t (line 58) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
type xMPU_REGION_REGISTERS (line 97) | typedef struct MPU_REGION_REGISTERS
type xMPU_SETTINGS (line 104) | typedef struct MPU_SETTINGS
function ucPortCountLeadingZeros (line 168) | __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLead...
function portFORCE_INLINE (line 231) | portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
function portFORCE_INLINE (line 253) | portFORCE_INLINE static void vPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 269) | portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 289) | portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM4F/port.c
function StackType_t (line 192) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 224) | static void prvTaskExitError( void )
function vPortSVCHandler (line 250) | void vPortSVCHandler( void )
function prvPortStartFirstTask (line 269) | static void prvPortStartFirstTask( void )
function BaseType_t (line 296) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 405) | void vPortEndScheduler( void )
function vPortEnterCritical (line 413) | void vPortEnterCritical( void )
function vPortExitCritical (line 430) | void vPortExitCritical( void )
function xPortPendSVHandler (line 442) | void xPortPendSVHandler( void )
function xPortSysTickHandler (line 499) | void xPortSysTickHandler( void )
function vPortSuppressTicksAndSleep (line 521) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 744) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
function vPortEnableVFP (line 766) | static void vPortEnableVFP( void )
function vPortValidateInterruptPriority (line 783) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM4F/portmacro.h
type portSTACK_TYPE (line 56) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 57) | typedef long BaseType_t;
type UBaseType_t (line 58) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
function ucPortCountLeadingZeros (line 132) | __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLead...
function portFORCE_INLINE (line 172) | portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
function portFORCE_INLINE (line 194) | portFORCE_INLINE static void vPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 210) | portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 230) | portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM4_MPU/port.c
function StackType_t (line 226) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function vPortSVCHandler (line 262) | void vPortSVCHandler( void )
function prvSVCHandler (line 281) | static void prvSVCHandler( uint32_t * pulParam )
function prvRestoreContextOfFirstTask (line 360) | static void prvRestoreContextOfFirstTask( void )
function BaseType_t (line 413) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 541) | void vPortEndScheduler( void )
function vPortEnterCritical (line 549) | void vPortEnterCritical( void )
function vPortExitCritical (line 576) | void vPortExitCritical( void )
function xPortPendSVHandler (line 618) | void xPortPendSVHandler( void )
function xPortSysTickHandler (line 699) | void xPortSysTickHandler( void )
function vPortSetupTimerInterrupt (line 720) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
function vPortEnableVFP (line 733) | static void vPortEnableVFP( void )
function prvSetupMPU (line 748) | static void prvSetupMPU( void )
function prvGetMPURegionSizeSetting (line 831) | static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
function BaseType_t (line 855) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vResetPrivilege (line 872) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vPortStoreTaskMPUSettings (line 885) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function vPortValidateInterruptPriority (line 987) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM4_MPU/portmacro.h
type portSTACK_TYPE (line 59) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 60) | typedef long BaseType_t;
type UBaseType_t (line 61) | typedef unsigned long UBaseType_t;
type TickType_t (line 64) | typedef uint16_t TickType_t;
type TickType_t (line 67) | typedef uint32_t TickType_t;
type xMPU_REGION_REGISTERS (line 188) | typedef struct MPU_REGION_REGISTERS
type xMPU_SETTINGS (line 194) | typedef struct MPU_SETTINGS
function ucPortCountLeadingZeros (line 258) | __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLead...
function portFORCE_INLINE (line 321) | portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
function portFORCE_INLINE (line 391) | portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 134) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 153) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 168) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 183) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 207) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 224) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 239) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 423) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
function vPortAllocateSecureContext (line 442) | void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attri...
function vPortFreeSecureContext (line 455) | void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( nak...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/secure/secure_context.c
function ulGetSecureContext (line 101) | static uint32_t ulGetSecureContext( void * pvTaskHandle )
function vReturnSecureContext (line 129) | static void vReturnSecureContext( uint32_t ulSecureContextIndex )
function secureportNON_SECURE_CALLABLE (line 138) | secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
function secureportNON_SECURE_CALLABLE (line 182) | secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_Alloca...
function secureportNON_SECURE_CALLABLE (line 278) | secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 309) | secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 331) | secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureCont...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/secure/secure_context.h
type SecureContext_t (line 55) | typedef struct SecureContext
type SecureContextHandle_t (line 67) | typedef uint32_t SecureContextHandle_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/secure/secure_context_port.c
function SecureContext_LoadContextAsm (line 38) | void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
function SecureContext_SaveContextAsm (line 65) | void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/secure/secure_heap.c
type BlockLink_t (line 82) | typedef struct A_BLOCK_LINK
function prvHeapInit (line 136) | static void prvHeapInit( void )
function prvInsertBlockIntoFreeList (line 184) | static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
function vPortFree (line 396) | void vPortFree( void * pv )
function xPortGetFreeHeapSize (line 444) | size_t xPortGetFreeHeapSize( void )
function xPortGetMinimumEverFreeHeapSize (line 450) | size_t xPortGetMinimumEverFreeHeapSize( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55/secure/secure_init.c
function secureportNON_SECURE_CALLABLE (line 63) | secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( ...
function secureportNON_SECURE_CALLABLE (line 81) | secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55_NTZ/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 129) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 148) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 163) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 178) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 202) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 219) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function SVC_Handler (line 348) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM7/r0p1/port.c
function StackType_t (line 186) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 218) | static void prvTaskExitError( void )
function vPortSVCHandler (line 244) | void vPortSVCHandler( void )
function prvPortStartFirstTask (line 263) | static void prvPortStartFirstTask( void )
function BaseType_t (line 290) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 393) | void vPortEndScheduler( void )
function vPortEnterCritical (line 401) | void vPortEnterCritical( void )
function vPortExitCritical (line 418) | void vPortExitCritical( void )
function xPortPendSVHandler (line 430) | void xPortPendSVHandler( void )
function xPortSysTickHandler (line 489) | void xPortSysTickHandler( void )
function vPortSuppressTicksAndSleep (line 511) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 734) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
function vPortEnableVFP (line 756) | static void vPortEnableVFP( void )
function vPortValidateInterruptPriority (line 773) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM7/r0p1/portmacro.h
type portSTACK_TYPE (line 56) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 57) | typedef long BaseType_t;
type UBaseType_t (line 58) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
function ucPortCountLeadingZeros (line 132) | __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLead...
function portFORCE_INLINE (line 172) | portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
function portFORCE_INLINE (line 194) | portFORCE_INLINE static void vPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 212) | portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
function portFORCE_INLINE (line 234) | portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 134) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 153) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 168) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 183) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 207) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 224) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function PendSV_Handler (line 239) | void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNC...
function SVC_Handler (line 423) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
function vPortAllocateSecureContext (line 442) | void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attri...
function vPortFreeSecureContext (line 455) | void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( nak...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/secure/secure_context.c
function ulGetSecureContext (line 101) | static uint32_t ulGetSecureContext( void * pvTaskHandle )
function vReturnSecureContext (line 129) | static void vReturnSecureContext( uint32_t ulSecureContextIndex )
function secureportNON_SECURE_CALLABLE (line 138) | secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
function secureportNON_SECURE_CALLABLE (line 182) | secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_Alloca...
function secureportNON_SECURE_CALLABLE (line 278) | secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 309) | secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureCont...
function secureportNON_SECURE_CALLABLE (line 331) | secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureCont...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/secure/secure_context.h
type SecureContext_t (line 55) | typedef struct SecureContext
type SecureContextHandle_t (line 67) | typedef uint32_t SecureContextHandle_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/secure/secure_context_port.c
function SecureContext_LoadContextAsm (line 38) | void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
function SecureContext_SaveContextAsm (line 65) | void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/secure/secure_heap.c
type BlockLink_t (line 82) | typedef struct A_BLOCK_LINK
function prvHeapInit (line 136) | static void prvHeapInit( void )
function prvInsertBlockIntoFreeList (line 184) | static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
function vPortFree (line 396) | void vPortFree( void * pv )
function xPortGetFreeHeapSize (line 444) | size_t xPortGetFreeHeapSize( void )
function xPortGetMinimumEverFreeHeapSize (line 450) | size_t xPortGetMinimumEverFreeHeapSize( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85/secure/secure_init.c
function secureportNON_SECURE_CALLABLE (line 63) | secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( ...
function secureportNON_SECURE_CALLABLE (line 81) | secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85_NTZ/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
function vPortExitCritical (line 799) | void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
function SysTick_Handler (line 811) | void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
function vPortSVCHandler_C (line 828) | void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED...
function BaseType_t (line 1070) | BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortEndScheduler (line 1107) | void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
function vPortStoreTaskMPUSettings (line 1116) | void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
function BaseType_t (line 1240) | BaseType_t xPortIsInsideInterrupt( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c
function vRestoreContextOfFirstTask (line 43) | void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRI...
function BaseType_t (line 129) | BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
function vRaisePrivilege (line 148) | void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function vResetPrivilege (line 163) | void vResetPrivilege( void ) /* __attribute__ (( naked )) */
function vStartFirstTask (line 178) | void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUN...
function ulSetInterruptMask (line 202) | uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEG...
function vClearInterruptMask (line 219) | void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) ...
function SVC_Handler (line 348) | void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTIO...
FILE: FreeRTOS-comparison/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h
type portSTACK_TYPE (line 71) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 72) | typedef long BaseType_t;
type UBaseType_t (line 73) | typedef unsigned long UBaseType_t;
type TickType_t (line 76) | typedef uint16_t TickType_t;
type TickType_t (line 79) | typedef uint32_t TickType_t;
type MPURegionSettings_t (line 188) | typedef struct MPURegionSettings
type xMPU_SETTINGS (line 197) | typedef struct MPU_SETTINGS
FILE: FreeRTOS-comparison/portable/GCC/ARM_CR5/port.c
function StackType_t (line 230) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 323) | static void prvTaskExitError( void )
function vApplicationFPUSafeIRQHandler (line 340) | void vApplicationFPUSafeIRQHandler( uint32_t ulICCIAR )
function BaseType_t (line 347) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 433) | void vPortEndScheduler( void )
function vPortEnterCritical (line 441) | void vPortEnterCritical( void )
function vPortExitCritical (line 463) | void vPortExitCritical( void )
function FreeRTOS_Tick_Handler (line 483) | void FreeRTOS_Tick_Handler( void )
function vPortTaskUsesFPU (line 510) | void vPortTaskUsesFPU( void )
function vPortClearInterruptMask (line 525) | void vPortClearInterruptMask( uint32_t ulNewMaskValue )
function ulPortSetInterruptMask (line 534) | uint32_t ulPortSetInterruptMask( void )
function vPortValidateInterruptPriority (line 563) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CR5/portmacro.h
type portSTACK_TYPE (line 55) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 56) | typedef long BaseType_t;
type UBaseType_t (line 57) | typedef unsigned long UBaseType_t;
type TickType_t (line 59) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/GCC/ARM_CRx_No_GIC/port.c
function StackType_t (line 124) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function prvTaskExitError (line 196) | static void prvTaskExitError( void )
function BaseType_t (line 210) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 240) | void vPortEndScheduler( void )
function vPortEnterCritical (line 248) | void vPortEnterCritical( void )
function vPortExitCritical (line 269) | void vPortExitCritical( void )
function FreeRTOS_Tick_Handler (line 289) | void FreeRTOS_Tick_Handler( void )
function vPortTaskUsesFPU (line 307) | void vPortTaskUsesFPU( void )
FILE: FreeRTOS-comparison/portable/GCC/ARM_CRx_No_GIC/portmacro.h
type portSTACK_TYPE (line 55) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 56) | typedef long BaseType_t;
type UBaseType_t (line 57) | typedef unsigned long UBaseType_t;
type TickType_t (line 59) | typedef uint32_t TickType_t;
function portINLINE_SET_INTERRUPT_MASK_FROM_ISR (line 115) | __attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_S...
FILE: FreeRTOS-comparison/portable/IAR/ARM_CA5_No_GIC/port.c
function StackType_t (line 113) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function prvTaskExitError (line 185) | static void prvTaskExitError( void )
function BaseType_t (line 199) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 223) | void vPortEndScheduler( void )
function vPortEnterCritical (line 231) | void vPortEnterCritical( void )
function vPortExitCritical (line 252) | void vPortExitCritical( void )
function FreeRTOS_Tick_Handler (line 272) | void FreeRTOS_Tick_Handler( void )
function vPortTaskUsesFPU (line 287) | void vPortTaskUsesFPU( void )
FILE: FreeRTOS-comparison/portable/IAR/ARM_CA5_No_GIC/portASM.h
function itself (line 62) | itself
function configFPU_D32 (line 92) | configFPU_D32
FILE: FreeRTOS-comparison/portable/IAR/ARM_CA5_No_GIC/portmacro.h
type portSTACK_TYPE (line 60) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 61) | typedef long BaseType_t;
type UBaseType_t (line 62) | typedef unsigned long UBaseType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/IAR/ARM_CA9/port.c
function StackType_t (line 163) | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunct...
function prvTaskExitError (line 235) | static void prvTaskExitError( void )
function BaseType_t (line 249) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 283) | void vPortEndScheduler( void )
function vPortEnterCritical (line 291) | void vPortEnterCritical( void )
function vPortExitCritical (line 313) | void vPortExitCritical( void )
function FreeRTOS_Tick_Handler (line 333) | void FreeRTOS_Tick_Handler( void )
function vPortTaskUsesFPU (line 356) | void vPortTaskUsesFPU( void )
function vPortClearInterruptMask (line 369) | void vPortClearInterruptMask( uint32_t ulNewMaskValue )
function ulPortSetInterruptMask (line 378) | uint32_t ulPortSetInterruptMask( void )
function vPortValidateInterruptPriority (line 403) | void vPortValidateInterruptPriority( void )
FILE: FreeRTOS-comparison/portable/IAR/ARM_CA9/portASM.h
function itself (line 60) | itself
FILE: FreeRTOS-comparison/portable/IAR/ARM_CA9/portmacro.h
type portSTACK_TYPE (line 60) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 61) | typedef long BaseType_t;
type UBaseType_t (line 62) | typedef unsigned long UBaseType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/IAR/ARM_CM0/port.c
function StackType_t (line 136) | StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
function prvTaskExitError (line 156) | static void prvTaskExitError( void )
function BaseType_t (line 176) | BaseType_t xPortStartScheduler( void )
function vPortEndScheduler (line 197) | void vPortEndScheduler( void )
function vPortYield (line 205) | void vPortYield( void )
function vPortEnterCritical (line 217) | void vPortEnterCritical( void )
function vPortExitCritical (line 226) | void vPortExitCritical( void )
function xPortSysTickHandler (line 238) | void xPortSysTickHandler( void )
function __weak (line 259) | __weak void vPortSetupTimerInterrupt( void )
function __weak (line 282) | __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
FILE: FreeRTOS-comparison/portable/IAR/ARM_CM0/portmacro.h
type portSTACK_TYPE (line 55) | typedef portSTACK_TYPE StackType_t;
type BaseType_t (line 56) | typedef long BaseType_t;
type UBaseType_t (line 57) | typedef unsigned long UBaseType_t;
type TickType_t (line 61) | typedef uint16_t TickType_t;
type TickType_t (line 64) | typedef uint32_t TickType_t;
FILE: FreeRTOS-comparison/portable/IAR/ARM_CM23/non_secure/port.c
function vPortSuppressTicksAndSleep (line 394) | __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xE...
function vPortSetupTimerInterrupt (line 612) | __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVI...
function prvTaskExitError (line 633) | static void prvTaskExitError( void )
function prvSetupMPU (line 659) | static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
function prvSetupFPU (line 751) | static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
function vPortYield (line 775) | void vPortYield( void ) /* PRIVILEGED_FUNCTION */
function vPortEnterCritical (line 787) | void vPort
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}
]
// ... and 459 more files (download for full content)
About this extraction
This page contains the full source code of the QuantumLeaps/Super-Simple-Tasker GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 659 files (13.5 MB), approximately 3.6M tokens, and a symbol index with 3509 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.
Extracted by GitExtract — free GitHub repo to text converter for AI. Built by Nikandr Surkov.