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Repository: angr/pypcode
Branch: master
Commit: 1e972f2dc7cc
Files: 930
Total size: 14.9 MB
Directory structure:
gitextract_s1iu7cno/
├── .clang-format
├── .github/
│ ├── ISSUE_TEMPLATE/
│ │ ├── bug-report.yml
│ │ ├── config.yml
│ │ ├── feature-request.yml
│ │ └── question.yml
│ ├── dependabot.yml
│ └── workflows/
│ └── build.yml
├── .gitignore
├── .pre-commit-config.yaml
├── .pylintrc
├── .readthedocs.yml
├── CMakeLists.txt
├── LICENSE.txt
├── MANIFEST.in
├── README.md
├── docs/
│ ├── Makefile
│ ├── api.rst
│ ├── conf.py
│ ├── guide.rst
│ ├── index.rst
│ ├── languages.rst
│ └── make.bat
├── pypcode/
│ ├── __init__.py
│ ├── __main__.py
│ ├── __version__.py
│ ├── docs/
│ │ └── ghidra/
│ │ ├── DISCLAIMER.md
│ │ ├── LICENSE
│ │ └── NOTICE
│ ├── printing.py
│ ├── processors/
│ │ ├── 6502/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 6502.cspec
│ │ │ │ ├── 6502.ldefs
│ │ │ │ ├── 6502.pspec
│ │ │ │ ├── 6502.slaspec
│ │ │ │ └── 65c02.slaspec
│ │ │ └── manuals/
│ │ │ ├── 6502.idx
│ │ │ └── 65c02.idx
│ │ ├── 68000/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 68000.cspec
│ │ │ │ ├── 68000.dwarf
│ │ │ │ ├── 68000.ldefs
│ │ │ │ ├── 68000.opinion
│ │ │ │ ├── 68000.pspec
│ │ │ │ ├── 68000.sinc
│ │ │ │ ├── 68000_register.cspec
│ │ │ │ ├── 68020.slaspec
│ │ │ │ ├── 68030.slaspec
│ │ │ │ ├── 68040.slaspec
│ │ │ │ └── coldfire.slaspec
│ │ │ ├── manuals/
│ │ │ │ └── 68000.idx
│ │ │ └── patterns/
│ │ │ ├── 68000_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── 8048/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 8048.cspec
│ │ │ │ ├── 8048.ldefs
│ │ │ │ ├── 8048.pspec
│ │ │ │ └── 8048.slaspec
│ │ │ └── manuals/
│ │ │ └── 8048.idx
│ │ ├── 8051/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 80251.cspec
│ │ │ │ ├── 80251.pspec
│ │ │ │ ├── 80251.sinc
│ │ │ │ ├── 80251.slaspec
│ │ │ │ ├── 80390.cspec
│ │ │ │ ├── 80390.slaspec
│ │ │ │ ├── 8051.cspec
│ │ │ │ ├── 8051.ldefs
│ │ │ │ ├── 8051.opinion
│ │ │ │ ├── 8051.pspec
│ │ │ │ ├── 8051.slaspec
│ │ │ │ ├── 8051_archimedes.cspec
│ │ │ │ ├── 8051_main.sinc
│ │ │ │ ├── mx51.cspec
│ │ │ │ ├── mx51.pspec
│ │ │ │ ├── mx51.sinc
│ │ │ │ ├── mx51.slaspec
│ │ │ │ └── old/
│ │ │ │ ├── 8051v1.lang
│ │ │ │ └── 8051v1.trans
│ │ │ └── manuals/
│ │ │ └── 8051.idx
│ │ ├── 8085/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── 8085.cspec
│ │ │ ├── 8085.ldefs
│ │ │ ├── 8085.pspec
│ │ │ └── 8085.slaspec
│ │ ├── AARCH64/
│ │ │ └── data/
│ │ │ ├── aarch64-pltThunks.xml
│ │ │ ├── languages/
│ │ │ │ ├── AARCH64.cspec
│ │ │ │ ├── AARCH64.dwarf
│ │ │ │ ├── AARCH64.ldefs
│ │ │ │ ├── AARCH64.opinion
│ │ │ │ ├── AARCH64.pspec
│ │ │ │ ├── AARCH64.slaspec
│ │ │ │ ├── AARCH64BE.slaspec
│ │ │ │ ├── AARCH64_AMXext.sinc
│ │ │ │ ├── AARCH64_AppleSilicon.slaspec
│ │ │ │ ├── AARCH64_apple.cspec
│ │ │ │ ├── AARCH64_base_PACoptions.sinc
│ │ │ │ ├── AARCH64_golang.cspec
│ │ │ │ ├── AARCH64_golang.register.info
│ │ │ │ ├── AARCH64_ilp32.cspec
│ │ │ │ ├── AARCH64_swift.cspec
│ │ │ │ ├── AARCH64_win.cspec
│ │ │ │ ├── AARCH64base.sinc
│ │ │ │ ├── AARCH64instructions.sinc
│ │ │ │ ├── AARCH64ldst.sinc
│ │ │ │ ├── AARCH64neon.sinc
│ │ │ │ ├── AARCH64sve.sinc
│ │ │ │ └── AppleSilicon.ldefs
│ │ │ ├── manuals/
│ │ │ │ └── AARCH64.idx
│ │ │ └── patterns/
│ │ │ ├── AARCH64_LE_patterns.xml
│ │ │ ├── AARCH64_win_patterns.xml
│ │ │ ├── patternconstraints.xml
│ │ │ └── prepatternconstraints.xml
│ │ ├── ARM/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── ARM.cspec
│ │ │ │ ├── ARM.dwarf
│ │ │ │ ├── ARM.gdis
│ │ │ │ ├── ARM.ldefs
│ │ │ │ ├── ARM.opinion
│ │ │ │ ├── ARM.sinc
│ │ │ │ ├── ARM4_be.slaspec
│ │ │ │ ├── ARM4_le.slaspec
│ │ │ │ ├── ARM4t_be.slaspec
│ │ │ │ ├── ARM4t_le.slaspec
│ │ │ │ ├── ARM5_be.slaspec
│ │ │ │ ├── ARM5_le.slaspec
│ │ │ │ ├── ARM5t_be.slaspec
│ │ │ │ ├── ARM5t_le.slaspec
│ │ │ │ ├── ARM6_be.slaspec
│ │ │ │ ├── ARM6_le.slaspec
│ │ │ │ ├── ARM7_be.slaspec
│ │ │ │ ├── ARM7_le.slaspec
│ │ │ │ ├── ARM8_be.slaspec
│ │ │ │ ├── ARM8_le.slaspec
│ │ │ │ ├── ARM8m_be.slaspec
│ │ │ │ ├── ARM8m_le.slaspec
│ │ │ │ ├── ARMCortex.pspec
│ │ │ │ ├── ARMTHUMBinstructions.sinc
│ │ │ │ ├── ARM_CDE.sinc
│ │ │ │ ├── ARM_apcs.cspec
│ │ │ │ ├── ARM_v45.cspec
│ │ │ │ ├── ARM_v45.pspec
│ │ │ │ ├── ARM_win.cspec
│ │ │ │ ├── ARMinstructions.sinc
│ │ │ │ ├── ARMneon.dwarf
│ │ │ │ ├── ARMneon.sinc
│ │ │ │ ├── ARMt.pspec
│ │ │ │ ├── ARMtTHUMB.pspec
│ │ │ │ ├── ARMt_v45.pspec
│ │ │ │ ├── ARMt_v6.pspec
│ │ │ │ ├── ARMv8.sinc
│ │ │ │ └── old/
│ │ │ │ ├── ARMv5.lang
│ │ │ │ ├── ARMv5.trans
│ │ │ │ ├── THUMBv2.lang
│ │ │ │ └── THUMBv2.trans
│ │ │ ├── manuals/
│ │ │ │ └── ARM.idx
│ │ │ └── patterns/
│ │ │ ├── ARM_BE_patterns.xml
│ │ │ ├── ARM_LE_patterns.xml
│ │ │ ├── ARM_switch_patterns.xml
│ │ │ ├── patternconstraints.xml
│ │ │ └── prepatternconstraints.xml
│ │ ├── Atmel/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── atmega256.pspec
│ │ │ │ ├── avr32.opinion
│ │ │ │ ├── avr32a.cspec
│ │ │ │ ├── avr32a.ldefs
│ │ │ │ ├── avr32a.pspec
│ │ │ │ ├── avr32a.slaspec
│ │ │ │ ├── avr32a_arithmetic_operations.sinc
│ │ │ │ ├── avr32a_autogen.sinc
│ │ │ │ ├── avr32a_bit_operations.sinc
│ │ │ │ ├── avr32a_coprocessor_interface.sinc
│ │ │ │ ├── avr32a_data_transfer.sinc
│ │ │ │ ├── avr32a_dsp_operations.sinc
│ │ │ │ ├── avr32a_dsp_operations2.sinc
│ │ │ │ ├── avr32a_instruction_flow.sinc
│ │ │ │ ├── avr32a_logic_operations.sinc
│ │ │ │ ├── avr32a_multiplication_operations.sinc
│ │ │ │ ├── avr32a_shift_operations.sinc
│ │ │ │ ├── avr32a_simd_operations.sinc
│ │ │ │ ├── avr32a_system_control.sinc
│ │ │ │ ├── avr8.ldefs
│ │ │ │ ├── avr8.opinion
│ │ │ │ ├── avr8.pspec
│ │ │ │ ├── avr8.sinc
│ │ │ │ ├── avr8.slaspec
│ │ │ │ ├── avr8e.slaspec
│ │ │ │ ├── avr8egcc.cspec
│ │ │ │ ├── avr8eind.slaspec
│ │ │ │ ├── avr8gcc.cspec
│ │ │ │ ├── avr8iarV1.cspec
│ │ │ │ ├── avr8imgCraftV8.cspec
│ │ │ │ ├── avr8xmega.pspec
│ │ │ │ └── avr8xmega.slaspec
│ │ │ ├── manuals/
│ │ │ │ ├── AVR32.idx
│ │ │ │ └── AVR8.idx
│ │ │ └── patterns/
│ │ │ ├── AVR8_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── BPF/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── BPF.cspec
│ │ │ ├── BPF.ldefs
│ │ │ ├── BPF.pspec
│ │ │ ├── BPF.sinc
│ │ │ └── BPF_le.slaspec
│ │ ├── CP1600/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── CP1600.cspec
│ │ │ ├── CP1600.ldefs
│ │ │ ├── CP1600.opinion
│ │ │ ├── CP1600.pspec
│ │ │ └── CP1600.slaspec
│ │ ├── CR16/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── CR16.cspec
│ │ │ │ ├── CR16.ldefs
│ │ │ │ ├── CR16.opinion
│ │ │ │ ├── CR16.pspec
│ │ │ │ ├── CR16B.sinc
│ │ │ │ ├── CR16B.slaspec
│ │ │ │ ├── CR16C.sinc
│ │ │ │ └── CR16C.slaspec
│ │ │ └── manuals/
│ │ │ └── CR16.idx
│ │ ├── DATA/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── data-be-64.slaspec
│ │ │ ├── data-le-64.slaspec
│ │ │ ├── data-ptr16.cspec
│ │ │ ├── data-ptr32.cspec
│ │ │ ├── data-ptr64.cspec
│ │ │ ├── data.ldefs
│ │ │ ├── data.pspec
│ │ │ └── data.sinc
│ │ ├── Dalvik/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── Dalvik.ldefs
│ │ │ ├── Dalvik.opinion
│ │ │ ├── Dalvik_Base.cspec
│ │ │ ├── Dalvik_Base.pspec
│ │ │ ├── Dalvik_Base.sinc
│ │ │ ├── Dalvik_Base.slaspec
│ │ │ ├── Dalvik_DEX_Android10.slaspec
│ │ │ ├── Dalvik_DEX_Android11.slaspec
│ │ │ ├── Dalvik_DEX_Android12.slaspec
│ │ │ ├── Dalvik_DEX_KitKat.slaspec
│ │ │ ├── Dalvik_DEX_Lollipop.slaspec
│ │ │ ├── Dalvik_DEX_Marshmallow.slaspec
│ │ │ ├── Dalvik_DEX_Nougat.slaspec
│ │ │ ├── Dalvik_DEX_Oreo.slaspec
│ │ │ ├── Dalvik_DEX_Pie.slaspec
│ │ │ ├── Dalvik_ODEX_KitKat.slaspec
│ │ │ ├── Dalvik_OpCode_3E_43_unused.sinc
│ │ │ ├── Dalvik_OpCode_73_return_void_barrier.sinc
│ │ │ ├── Dalvik_OpCode_73_return_void_no_barrier.sinc
│ │ │ ├── Dalvik_OpCode_73_unused.sinc
│ │ │ ├── Dalvik_OpCode_79_unused.sinc
│ │ │ ├── Dalvik_OpCode_7A_unused.sinc
│ │ │ ├── Dalvik_OpCode_E3_EA_dex.sinc
│ │ │ ├── Dalvik_OpCode_E3_EA_unused.sinc
│ │ │ ├── Dalvik_OpCode_EB_F2_iput_iget.sinc
│ │ │ ├── Dalvik_OpCode_EB_F2_unused.sinc
│ │ │ ├── Dalvik_OpCode_F3_unused.sinc
│ │ │ ├── Dalvik_OpCode_F4_unused.sinc
│ │ │ ├── Dalvik_OpCode_F5_unused.sinc
│ │ │ ├── Dalvik_OpCode_F6_unused.sinc
│ │ │ ├── Dalvik_OpCode_F7_unused.sinc
│ │ │ ├── Dalvik_OpCode_F8_unused.sinc
│ │ │ ├── Dalvik_OpCode_F9_unused.sinc
│ │ │ ├── Dalvik_OpCode_FA_FD_dex.sinc
│ │ │ ├── Dalvik_OpCode_FA_unused.sinc
│ │ │ ├── Dalvik_OpCode_FB_unused.sinc
│ │ │ ├── Dalvik_OpCode_FC_unused.sinc
│ │ │ ├── Dalvik_OpCode_FD_unused.sinc
│ │ │ ├── Dalvik_OpCode_FE_FF_dex.sinc
│ │ │ ├── Dalvik_OpCode_FE_unused.sinc
│ │ │ └── Dalvik_OpCode_FF_unused.sinc
│ │ ├── HCS08/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── HC05-M68HC05TB.pspec
│ │ │ │ ├── HC05.cspec
│ │ │ │ ├── HC05.ldefs
│ │ │ │ ├── HC05.pspec
│ │ │ │ ├── HC05.slaspec
│ │ │ │ ├── HC08-MC68HC908QY4.pspec
│ │ │ │ ├── HC08.ldefs
│ │ │ │ ├── HC08.pspec
│ │ │ │ ├── HC08.slaspec
│ │ │ │ ├── HCS08-MC9S08GB60.pspec
│ │ │ │ ├── HCS08.cspec
│ │ │ │ ├── HCS08.ldefs
│ │ │ │ ├── HCS08.opinion
│ │ │ │ ├── HCS08.pspec
│ │ │ │ ├── HCS08.slaspec
│ │ │ │ └── HCS_HC.sinc
│ │ │ ├── manuals/
│ │ │ │ ├── HC05.idx
│ │ │ │ ├── HC08.idx
│ │ │ │ └── HCS08.idx
│ │ │ └── test-vectors/
│ │ │ ├── HC05_tv.s
│ │ │ ├── HC08_tv.s
│ │ │ └── HCS08_tv.s
│ │ ├── HCS12/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── HC12.cspec
│ │ │ │ ├── HC12.pspec
│ │ │ │ ├── HC12.slaspec
│ │ │ │ ├── HCS12.cspec
│ │ │ │ ├── HCS12.ldefs
│ │ │ │ ├── HCS12.opinion
│ │ │ │ ├── HCS12.pspec
│ │ │ │ ├── HCS12.slaspec
│ │ │ │ ├── HCS12X.cspec
│ │ │ │ ├── HCS12X.pspec
│ │ │ │ ├── HCS12X.slaspec
│ │ │ │ ├── HCS_HC12.sinc
│ │ │ │ └── XGATE.sinc
│ │ │ └── manuals/
│ │ │ └── HCS12.idx
│ │ ├── JVM/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── JVM.cspec
│ │ │ │ ├── JVM.ldefs
│ │ │ │ ├── JVM.opinion
│ │ │ │ ├── JVM.pspec
│ │ │ │ └── JVM.slaspec
│ │ │ └── manuals/
│ │ │ └── JVM.idx
│ │ ├── Loongarch/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── ilp32d.cspec
│ │ │ │ ├── ilp32f.cspec
│ │ │ │ ├── lasx.sinc
│ │ │ │ ├── lbt.sinc
│ │ │ │ ├── loongarch.ldefs
│ │ │ │ ├── loongarch.opinion
│ │ │ │ ├── loongarch32.pspec
│ │ │ │ ├── loongarch32_f32.slaspec
│ │ │ │ ├── loongarch32_f64.slaspec
│ │ │ │ ├── loongarch32_instructions.sinc
│ │ │ │ ├── loongarch64.pspec
│ │ │ │ ├── loongarch64_f32.slaspec
│ │ │ │ ├── loongarch64_f64.slaspec
│ │ │ │ ├── loongarch64_instructions.sinc
│ │ │ │ ├── loongarch_double.sinc
│ │ │ │ ├── loongarch_float.sinc
│ │ │ │ ├── loongarch_main.sinc
│ │ │ │ ├── lp64d.cspec
│ │ │ │ ├── lp64f.cspec
│ │ │ │ ├── lsx.sinc
│ │ │ │ └── lvz.sinc
│ │ │ ├── manuals/
│ │ │ │ └── loongarch.idx
│ │ │ └── patterns/
│ │ │ ├── loongarch_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── M16C/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── M16C_60.cspec
│ │ │ │ ├── M16C_60.ldefs
│ │ │ │ ├── M16C_60.pspec
│ │ │ │ ├── M16C_60.slaspec
│ │ │ │ ├── M16C_80.cspec
│ │ │ │ ├── M16C_80.ldefs
│ │ │ │ ├── M16C_80.pspec
│ │ │ │ └── M16C_80.slaspec
│ │ │ └── manuals/
│ │ │ ├── M16C_60.idx
│ │ │ └── M16C_80.idx
│ │ ├── M8C/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── m8c.cspec
│ │ │ ├── m8c.ldefs
│ │ │ ├── m8c.opinion
│ │ │ ├── m8c.pspec
│ │ │ └── m8c.slaspec
│ │ ├── MC6800/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 6800.ldefs
│ │ │ │ ├── 6805.cspec
│ │ │ │ ├── 6805.ldefs
│ │ │ │ ├── 6805.pspec
│ │ │ │ ├── 6805.slaspec
│ │ │ │ ├── 6809.cspec
│ │ │ │ ├── 6809.pspec
│ │ │ │ ├── 6809.slaspec
│ │ │ │ ├── 6x09.sinc
│ │ │ │ ├── 6x09_exg_tfr.sinc
│ │ │ │ ├── 6x09_pull.sinc
│ │ │ │ ├── 6x09_push.sinc
│ │ │ │ └── H6309.slaspec
│ │ │ └── manuals/
│ │ │ └── 6809.idx
│ │ ├── MCS96/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── MCS96.cspec
│ │ │ │ ├── MCS96.ldefs
│ │ │ │ ├── MCS96.pspec
│ │ │ │ ├── MCS96.sinc
│ │ │ │ └── MCS96.slaspec
│ │ │ └── manuals/
│ │ │ └── MCS96.idx
│ │ ├── MIPS/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── MIPS.opinion
│ │ │ │ ├── mips.dwarf
│ │ │ │ ├── mips.ldefs
│ │ │ │ ├── mips.sinc
│ │ │ │ ├── mips16.sinc
│ │ │ │ ├── mips32.pspec
│ │ │ │ ├── mips32Instructions.sinc
│ │ │ │ ├── mips32R6.pspec
│ │ │ │ ├── mips32R6be.slaspec
│ │ │ │ ├── mips32R6le.slaspec
│ │ │ │ ├── mips32_eabi.cspec
│ │ │ │ ├── mips32_fp64.cspec
│ │ │ │ ├── mips32be.cspec
│ │ │ │ ├── mips32be.slaspec
│ │ │ │ ├── mips32le.cspec
│ │ │ │ ├── mips32le.slaspec
│ │ │ │ ├── mips32micro.pspec
│ │ │ │ ├── mips64.pspec
│ │ │ │ ├── mips64Instructions.sinc
│ │ │ │ ├── mips64R6.pspec
│ │ │ │ ├── mips64_32_n32.cspec
│ │ │ │ ├── mips64_32_o32.cspec
│ │ │ │ ├── mips64_32_o64.cspec
│ │ │ │ ├── mips64be.cspec
│ │ │ │ ├── mips64be.slaspec
│ │ │ │ ├── mips64le.cspec
│ │ │ │ ├── mips64le.slaspec
│ │ │ │ ├── mips64micro.pspec
│ │ │ │ ├── mips_dsp.sinc
│ │ │ │ ├── mips_mt.sinc
│ │ │ │ ├── mipsfloat.sinc
│ │ │ │ └── mipsmicro.sinc
│ │ │ ├── manuals/
│ │ │ │ ├── MIPS.idx
│ │ │ │ ├── mipsM16.idx
│ │ │ │ ├── mipsMic.idx
│ │ │ │ └── r4000.idx
│ │ │ └── patterns/
│ │ │ ├── MIPS_BE_patterns.xml
│ │ │ ├── MIPS_LE_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── NDS32/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── lsmw.sinc
│ │ │ │ ├── nds32.cspec
│ │ │ │ ├── nds32.dwarf
│ │ │ │ ├── nds32.ldefs
│ │ │ │ ├── nds32.opinion
│ │ │ │ ├── nds32.pspec
│ │ │ │ ├── nds32.sinc
│ │ │ │ ├── nds32be.slaspec
│ │ │ │ └── nds32le.slaspec
│ │ │ └── patterns/
│ │ │ ├── nds32_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── PA-RISC/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── pa-risc.ldefs
│ │ │ │ ├── pa-risc.opinion
│ │ │ │ ├── pa-risc.sinc
│ │ │ │ ├── pa-risc32.cspec
│ │ │ │ ├── pa-risc32.pspec
│ │ │ │ ├── pa-risc32be.slaspec
│ │ │ │ └── pa-riscInstructions.sinc
│ │ │ ├── manuals/
│ │ │ │ └── pa11_acd.idx
│ │ │ └── patterns/
│ │ │ ├── pa-risc_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── PIC/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── PIC24.cspec
│ │ │ │ ├── PIC24.ldefs
│ │ │ │ ├── PIC24.opinion
│ │ │ │ ├── PIC24.pspec
│ │ │ │ ├── PIC24.sinc
│ │ │ │ ├── PIC24E.slaspec
│ │ │ │ ├── PIC24F.slaspec
│ │ │ │ ├── PIC24H.slaspec
│ │ │ │ ├── PIC30.dwarf
│ │ │ │ ├── PIC33.dwarf
│ │ │ │ ├── dsPIC30F.slaspec
│ │ │ │ ├── dsPIC33C.slaspec
│ │ │ │ ├── dsPIC33E.slaspec
│ │ │ │ ├── dsPIC33F.slaspec
│ │ │ │ ├── pic12.sinc
│ │ │ │ ├── pic12_instructions.sinc
│ │ │ │ ├── pic12c5xx.cspec
│ │ │ │ ├── pic12c5xx.ldefs
│ │ │ │ ├── pic12c5xx.pspec
│ │ │ │ ├── pic12c5xx.slaspec
│ │ │ │ ├── pic16.cspec
│ │ │ │ ├── pic16.ldefs
│ │ │ │ ├── pic16.pspec
│ │ │ │ ├── pic16.sinc
│ │ │ │ ├── pic16.slaspec
│ │ │ │ ├── pic16_instructions.sinc
│ │ │ │ ├── pic16c5x.cspec
│ │ │ │ ├── pic16c5x.ldefs
│ │ │ │ ├── pic16c5x.pspec
│ │ │ │ ├── pic16c5x.slaspec
│ │ │ │ ├── pic16f.cspec
│ │ │ │ ├── pic16f.pspec
│ │ │ │ ├── pic16f.slaspec
│ │ │ │ ├── pic17c7xx.cspec
│ │ │ │ ├── pic17c7xx.ldefs
│ │ │ │ ├── pic17c7xx.pspec
│ │ │ │ ├── pic17c7xx.sinc
│ │ │ │ ├── pic17c7xx.slaspec
│ │ │ │ ├── pic17c7xx_instructions.sinc
│ │ │ │ ├── pic18.cspec
│ │ │ │ ├── pic18.ldefs
│ │ │ │ ├── pic18.pspec
│ │ │ │ ├── pic18.sinc
│ │ │ │ ├── pic18.slaspec
│ │ │ │ └── pic18_instructions.sinc
│ │ │ └── manuals/
│ │ │ ├── PIC-12.idx
│ │ │ ├── PIC-16.idx
│ │ │ ├── PIC-16F.idx
│ │ │ ├── PIC-17.idx
│ │ │ ├── PIC-18.idx
│ │ │ └── PIC24.idx
│ │ ├── PowerPC/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 4xx.sinc
│ │ │ │ ├── FPRC.sinc
│ │ │ │ ├── PowerPC.opinion
│ │ │ │ ├── SPEF_SCR.sinc
│ │ │ │ ├── SPE_APU.sinc
│ │ │ │ ├── SPE_EFSD.sinc
│ │ │ │ ├── SPE_EFV.sinc
│ │ │ │ ├── SPE_FloatMulAdd.sinc
│ │ │ │ ├── Scalar_SPFP.sinc
│ │ │ │ ├── altivec.sinc
│ │ │ │ ├── evx.sinc
│ │ │ │ ├── g2.sinc
│ │ │ │ ├── lmwInstructions.sinc
│ │ │ │ ├── lswInstructions.sinc
│ │ │ │ ├── mulhwInstructions.sinc
│ │ │ │ ├── old/
│ │ │ │ │ ├── oldPPC.lang
│ │ │ │ │ └── oldPPC.trans
│ │ │ │ ├── ppc.dwarf
│ │ │ │ ├── ppc.ldefs
│ │ │ │ ├── ppc.ldefs.orig
│ │ │ │ ├── ppc_32.cspec
│ │ │ │ ├── ppc_32.pspec
│ │ │ │ ├── ppc_32_4xx_be.slaspec
│ │ │ │ ├── ppc_32_4xx_le.slaspec
│ │ │ │ ├── ppc_32_be.cspec
│ │ │ │ ├── ppc_32_be.slaspec
│ │ │ │ ├── ppc_32_be_Mac.cspec
│ │ │ │ ├── ppc_32_e200.cspec
│ │ │ │ ├── ppc_32_e200.pspec
│ │ │ │ ├── ppc_32_e200.slaspec
│ │ │ │ ├── ppc_32_e500_be.cspec
│ │ │ │ ├── ppc_32_e500_be.slaspec
│ │ │ │ ├── ppc_32_e500_le.cspec
│ │ │ │ ├── ppc_32_e500_le.slaspec
│ │ │ │ ├── ppc_32_e500mc_be.cspec
│ │ │ │ ├── ppc_32_e500mc_be.slaspec
│ │ │ │ ├── ppc_32_e500mc_le.cspec
│ │ │ │ ├── ppc_32_e500mc_le.slaspec
│ │ │ │ ├── ppc_32_le.slaspec
│ │ │ │ ├── ppc_32_mpc8270.pspec
│ │ │ │ ├── ppc_32_quicciii_be.slaspec
│ │ │ │ ├── ppc_32_quicciii_le.slaspec
│ │ │ │ ├── ppc_64.pspec
│ │ │ │ ├── ppc_64_32.cspec
│ │ │ │ ├── ppc_64_be.cspec
│ │ │ │ ├── ppc_64_be.slaspec
│ │ │ │ ├── ppc_64_be_Mac.cspec
│ │ │ │ ├── ppc_64_isa_altivec_be.slaspec
│ │ │ │ ├── ppc_64_isa_altivec_le.slaspec
│ │ │ │ ├── ppc_64_isa_altivec_vle_be.slaspec
│ │ │ │ ├── ppc_64_isa_be.slaspec
│ │ │ │ ├── ppc_64_isa_le.slaspec
│ │ │ │ ├── ppc_64_isa_vle_be.slaspec
│ │ │ │ ├── ppc_64_le.cspec
│ │ │ │ ├── ppc_64_le.slaspec
│ │ │ │ ├── ppc_a2.sinc
│ │ │ │ ├── ppc_common.sinc
│ │ │ │ ├── ppc_embedded.sinc
│ │ │ │ ├── ppc_instructions.sinc
│ │ │ │ ├── ppc_isa.sinc
│ │ │ │ ├── ppc_vle.sinc
│ │ │ │ ├── quicciii.sinc
│ │ │ │ ├── stmwInstructions.sinc
│ │ │ │ ├── stswiInstructions.sinc
│ │ │ │ └── vsx.sinc
│ │ │ ├── manuals/
│ │ │ │ ├── PowerISA.idx
│ │ │ │ └── PowerPC.idx
│ │ │ └── patterns/
│ │ │ ├── PPC_BE_patterns.xml
│ │ │ ├── PPC_BE_prepatterns.xml
│ │ │ ├── PPC_LE_patterns.xml
│ │ │ ├── PPC_LE_prepatterns.xml
│ │ │ ├── patternconstraints.xml
│ │ │ └── prepatternconstraints.xml
│ │ ├── RISCV/
│ │ │ ├── data/
│ │ │ │ ├── languages/
│ │ │ │ │ ├── RV32.pspec
│ │ │ │ │ ├── RV64.pspec
│ │ │ │ │ ├── andestar_v5.instr.sinc
│ │ │ │ │ ├── andestar_v5.ldefs
│ │ │ │ │ ├── andestar_v5.slaspec
│ │ │ │ │ ├── old/
│ │ │ │ │ │ └── riscv_deprecated.ldefs
│ │ │ │ │ ├── riscv.csr.sinc
│ │ │ │ │ ├── riscv.custom.sinc
│ │ │ │ │ ├── riscv.ilp32d.slaspec
│ │ │ │ │ ├── riscv.instr.sinc
│ │ │ │ │ ├── riscv.ldefs
│ │ │ │ │ ├── riscv.lp64d.slaspec
│ │ │ │ │ ├── riscv.opinion
│ │ │ │ │ ├── riscv.priv.sinc
│ │ │ │ │ ├── riscv.reg.sinc
│ │ │ │ │ ├── riscv.rv32a.sinc
│ │ │ │ │ ├── riscv.rv32b.sinc
│ │ │ │ │ ├── riscv.rv32d.sinc
│ │ │ │ │ ├── riscv.rv32f.sinc
│ │ │ │ │ ├── riscv.rv32i.sinc
│ │ │ │ │ ├── riscv.rv32k.sinc
│ │ │ │ │ ├── riscv.rv32m.sinc
│ │ │ │ │ ├── riscv.rv32p.sinc
│ │ │ │ │ ├── riscv.rv32q.sinc
│ │ │ │ │ ├── riscv.rv64a.sinc
│ │ │ │ │ ├── riscv.rv64b.sinc
│ │ │ │ │ ├── riscv.rv64d.sinc
│ │ │ │ │ ├── riscv.rv64f.sinc
│ │ │ │ │ ├── riscv.rv64i.sinc
│ │ │ │ │ ├── riscv.rv64k.sinc
│ │ │ │ │ ├── riscv.rv64m.sinc
│ │ │ │ │ ├── riscv.rv64p.sinc
│ │ │ │ │ ├── riscv.rv64q.sinc
│ │ │ │ │ ├── riscv.rvc.sinc
│ │ │ │ │ ├── riscv.rvv.sinc
│ │ │ │ │ ├── riscv.table.sinc
│ │ │ │ │ ├── riscv.zi.sinc
│ │ │ │ │ ├── riscv32-fp.cspec
│ │ │ │ │ ├── riscv32.cspec
│ │ │ │ │ ├── riscv32.dwarf
│ │ │ │ │ ├── riscv64-fp.cspec
│ │ │ │ │ ├── riscv64.cspec
│ │ │ │ │ └── riscv64.dwarf
│ │ │ │ └── patterns/
│ │ │ │ ├── patternconstraints.xml
│ │ │ │ └── riscv_gc_patterns.xml
│ │ │ └── scripts/
│ │ │ └── binutil.py
│ │ ├── Sparc/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── Sparc.dwarf
│ │ │ │ ├── Sparc.opinion
│ │ │ │ ├── SparcV9.ldefs
│ │ │ │ ├── SparcV9.pspec
│ │ │ │ ├── SparcV9.sinc
│ │ │ │ ├── SparcV9_32.cspec
│ │ │ │ ├── SparcV9_32.slaspec
│ │ │ │ ├── SparcV9_64.cspec
│ │ │ │ ├── SparcV9_64.slaspec
│ │ │ │ └── SparcVIS.sinc
│ │ │ ├── manuals/
│ │ │ │ └── Sparc.idx
│ │ │ └── patterns/
│ │ │ ├── SPARC_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── SuperH/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── sh-1.slaspec
│ │ │ ├── sh-2.slaspec
│ │ │ ├── sh-2a.slaspec
│ │ │ ├── superh.cspec
│ │ │ ├── superh.ldefs
│ │ │ ├── superh.pspec
│ │ │ ├── superh.sinc
│ │ │ └── superh2a.cspec
│ │ ├── SuperH4/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── SuperH4.ldefs
│ │ │ │ ├── SuperH4.opinion
│ │ │ │ ├── SuperH4.pspec
│ │ │ │ ├── SuperH4.sinc
│ │ │ │ ├── SuperH4_be.cspec
│ │ │ │ ├── SuperH4_be.slaspec
│ │ │ │ ├── SuperH4_le.cspec
│ │ │ │ ├── SuperH4_le.slaspec
│ │ │ │ └── old/
│ │ │ │ ├── SuperH4-BE-16.lang
│ │ │ │ ├── SuperH4-BE-16.trans
│ │ │ │ ├── SuperH4-LE-16.lang
│ │ │ │ └── SuperH4-LE-16.trans
│ │ │ ├── manuals/
│ │ │ │ └── superh4.idx
│ │ │ └── patterns/
│ │ │ ├── SuperH4_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── TI_MSP430/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── TI430Common.sinc
│ │ │ │ ├── TI430X.sinc
│ │ │ │ ├── TI_MSP430.cspec
│ │ │ │ ├── TI_MSP430.dwarf
│ │ │ │ ├── TI_MSP430.ldefs
│ │ │ │ ├── TI_MSP430.pspec
│ │ │ │ ├── TI_MSP430.slaspec
│ │ │ │ ├── TI_MSP430X.cspec
│ │ │ │ ├── TI_MSP430X.dwarf
│ │ │ │ ├── TI_MSP430X.slaspec
│ │ │ │ └── ti_msp430.opinion
│ │ │ └── manuals/
│ │ │ └── MSP430.idx
│ │ ├── Toy/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── old/
│ │ │ │ ├── ToyV00BE64.lang
│ │ │ │ ├── ToyV0BE64.trans
│ │ │ │ ├── ToyV0LE64.lang
│ │ │ │ ├── ToyV0LE64.trans
│ │ │ │ └── v01stuff/
│ │ │ │ ├── toy.cspec
│ │ │ │ ├── toy.ldefs_v01
│ │ │ │ ├── toy.sinc
│ │ │ │ ├── toy64.cspec
│ │ │ │ ├── toyInstructions.sinc
│ │ │ │ └── toyPosStack.cspec
│ │ │ ├── toy.cspec
│ │ │ ├── toy.ldefs
│ │ │ ├── toy.pspec
│ │ │ ├── toy.sinc
│ │ │ ├── toy64-long8.cspec
│ │ │ ├── toy64.cspec
│ │ │ ├── toy64_be.slaspec
│ │ │ ├── toy64_be_harvard.slaspec
│ │ │ ├── toy64_be_harvard_rev.slaspec
│ │ │ ├── toy64_le.slaspec
│ │ │ ├── toyInstructions.sinc
│ │ │ ├── toyPosStack.cspec
│ │ │ ├── toy_be.slaspec
│ │ │ ├── toy_be_posStack.slaspec
│ │ │ ├── toy_builder.sinc
│ │ │ ├── toy_builder_be.slaspec
│ │ │ ├── toy_builder_be_align2.slaspec
│ │ │ ├── toy_builder_le.slaspec
│ │ │ ├── toy_builder_le_align2.slaspec
│ │ │ ├── toy_harvard.pspec
│ │ │ ├── toy_le.slaspec
│ │ │ ├── toy_wsz_be.slaspec
│ │ │ └── toy_wsz_le.slaspec
│ │ ├── V850/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── Helpers/
│ │ │ │ │ ├── Conditions.sinc
│ │ │ │ │ ├── Extras.sinc
│ │ │ │ │ ├── Macros.sinc
│ │ │ │ │ ├── Register.sinc
│ │ │ │ │ ├── Tokens.sinc
│ │ │ │ │ └── Variables.sinc
│ │ │ │ ├── Instructions/
│ │ │ │ │ ├── Arithmetic.sinc
│ │ │ │ │ ├── Float.sinc
│ │ │ │ │ ├── Load_Store.sinc
│ │ │ │ │ ├── Logic.sinc
│ │ │ │ │ └── Special.sinc
│ │ │ │ ├── V850.cspec
│ │ │ │ ├── V850.ldefs
│ │ │ │ ├── V850.opinion
│ │ │ │ ├── V850.pspec
│ │ │ │ └── V850.slaspec
│ │ │ ├── manuals/
│ │ │ │ └── v850.idx
│ │ │ └── patterns/
│ │ │ ├── V850_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── Xtensa/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── cust.sinc
│ │ │ │ ├── flix.sinc
│ │ │ │ ├── xtensa.cspec
│ │ │ │ ├── xtensa.dwarf
│ │ │ │ ├── xtensa.ldefs
│ │ │ │ ├── xtensa.opinion
│ │ │ │ ├── xtensa.pspec
│ │ │ │ ├── xtensaArch.sinc
│ │ │ │ ├── xtensaInstructions.sinc
│ │ │ │ ├── xtensaMain.sinc
│ │ │ │ ├── xtensa_be.slaspec
│ │ │ │ ├── xtensa_depbits.sinc
│ │ │ │ └── xtensa_le.slaspec
│ │ │ ├── manuals/
│ │ │ │ └── xtensa.idx
│ │ │ └── patterns/
│ │ │ ├── patternconstraints.xml
│ │ │ └── xtensa_patterns.xml
│ │ ├── Z80/
│ │ │ ├── data/
│ │ │ │ ├── languages/
│ │ │ │ │ ├── z180.pspec
│ │ │ │ │ ├── z180.slaspec
│ │ │ │ │ ├── z182.pspec
│ │ │ │ │ ├── z80.cspec
│ │ │ │ │ ├── z80.ldefs
│ │ │ │ │ ├── z80.pspec
│ │ │ │ │ ├── z80.slaspec
│ │ │ │ │ └── z8401x.pspec
│ │ │ │ └── manuals/
│ │ │ │ ├── Z180.idx
│ │ │ │ └── Z80.idx
│ │ │ └── temp/
│ │ │ └── z8401x.pspec
│ │ ├── eBPF/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── eBPF.cspec
│ │ │ ├── eBPF.dwarf
│ │ │ ├── eBPF.ldefs
│ │ │ ├── eBPF.opinion
│ │ │ ├── eBPF.pspec
│ │ │ ├── eBPF.sinc
│ │ │ ├── eBPF_be.slaspec
│ │ │ └── eBPF_le.slaspec
│ │ ├── tricore/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── tc172x.pspec
│ │ │ │ ├── tc176x.pspec
│ │ │ │ ├── tc29x.pspec
│ │ │ │ ├── tricore.cspec
│ │ │ │ ├── tricore.dwarf
│ │ │ │ ├── tricore.ldefs
│ │ │ │ ├── tricore.opinion
│ │ │ │ ├── tricore.pcp.sinc
│ │ │ │ ├── tricore.pspec
│ │ │ │ ├── tricore.sinc
│ │ │ │ └── tricore.slaspec
│ │ │ ├── manuals/
│ │ │ │ ├── tricore.idx
│ │ │ │ └── tricore2.idx
│ │ │ └── patterns/
│ │ │ ├── patternconstraints.xml
│ │ │ └── tricore_patterns.xml
│ │ └── x86/
│ │ └── data/
│ │ ├── extensions/
│ │ │ └── rust/
│ │ │ ├── unix32/
│ │ │ │ ├── cc.xml
│ │ │ │ ├── probe_fixup.xml
│ │ │ │ └── try_fixup.xml
│ │ │ ├── unix64/
│ │ │ │ ├── cc.xml
│ │ │ │ ├── probe_fixup.xml
│ │ │ │ └── try_fixup.xml
│ │ │ ├── windows32/
│ │ │ │ ├── probe_fixup.xml
│ │ │ │ └── try_fixup.xml
│ │ │ └── windows64/
│ │ │ ├── probe_fixup.xml
│ │ │ └── try_fixup.xml
│ │ ├── languages/
│ │ │ ├── adx.sinc
│ │ │ ├── avx.sinc
│ │ │ ├── avx2.sinc
│ │ │ ├── avx2_manual.sinc
│ │ │ ├── avx512.sinc
│ │ │ ├── avx512_manual.sinc
│ │ │ ├── avx_manual.sinc
│ │ │ ├── bmi1.sinc
│ │ │ ├── bmi2.sinc
│ │ │ ├── cet.sinc
│ │ │ ├── clwb.sinc
│ │ │ ├── fma.sinc
│ │ │ ├── ia.sinc
│ │ │ ├── lockable.sinc
│ │ │ ├── lzcnt.sinc
│ │ │ ├── macros.sinc
│ │ │ ├── mpx.sinc
│ │ │ ├── old/
│ │ │ │ ├── x86RealV1.lang
│ │ │ │ ├── x86RealV1.trans
│ │ │ │ ├── x86RealV2.lang
│ │ │ │ ├── x86RealV2.trans
│ │ │ │ ├── x86RealV3.lang
│ │ │ │ ├── x86RealV3.trans
│ │ │ │ ├── x86V1.lang
│ │ │ │ ├── x86V1.trans
│ │ │ │ ├── x86V2.lang
│ │ │ │ ├── x86V2.trans
│ │ │ │ ├── x86V3.lang
│ │ │ │ ├── x86V3.trans
│ │ │ │ ├── x86_64bit_compat32_v2.lang
│ │ │ │ ├── x86_64bit_compat32_v2.trans
│ │ │ │ ├── x86_64bit_compat32_v3.lang
│ │ │ │ ├── x86_64bit_compat32_v3.trans
│ │ │ │ ├── x86_64bit_v1.lang
│ │ │ │ ├── x86_64bit_v1.trans
│ │ │ │ ├── x86_64bit_v2.lang
│ │ │ │ ├── x86_64bit_v2.trans
│ │ │ │ ├── x86_64bit_v3.lang
│ │ │ │ ├── x86_64bit_v3.trans
│ │ │ │ ├── x86_ProtV2.lang
│ │ │ │ ├── x86_ProtV2.trans
│ │ │ │ ├── x86_ProtV3.lang
│ │ │ │ ├── x86_ProtV3.trans
│ │ │ │ ├── x86smmV1.lang
│ │ │ │ ├── x86smmV1.trans
│ │ │ │ ├── x86smmV2.lang
│ │ │ │ ├── x86smmV2.trans
│ │ │ │ ├── x86smmV3.lang
│ │ │ │ └── x86smmV3.trans
│ │ │ ├── pclmulqdq.sinc
│ │ │ ├── rdrand.sinc
│ │ │ ├── sgx.sinc
│ │ │ ├── sha.sinc
│ │ │ ├── smx.sinc
│ │ │ ├── x86-16-real.pspec
│ │ │ ├── x86-16.cspec
│ │ │ ├── x86-16.gdis
│ │ │ ├── x86-16.pspec
│ │ │ ├── x86-32-golang.cspec
│ │ │ ├── x86-32-golang.register.info
│ │ │ ├── x86-64-compat32.pspec
│ │ │ ├── x86-64-gcc.cspec
│ │ │ ├── x86-64-golang.cspec
│ │ │ ├── x86-64-golang.register.info
│ │ │ ├── x86-64-swift.cspec
│ │ │ ├── x86-64-win.cspec
│ │ │ ├── x86-64.dwarf
│ │ │ ├── x86-64.pspec
│ │ │ ├── x86-64.slaspec
│ │ │ ├── x86.dwarf
│ │ │ ├── x86.ldefs
│ │ │ ├── x86.opinion
│ │ │ ├── x86.pspec
│ │ │ ├── x86.slaspec
│ │ │ ├── x86borland.cspec
│ │ │ ├── x86delphi.cspec
│ │ │ ├── x86gcc.cspec
│ │ │ └── x86win.cspec
│ │ ├── manuals/
│ │ │ └── x86.idx
│ │ └── patterns/
│ │ ├── patternconstraints.xml
│ │ ├── prepatternconstraints.xml
│ │ ├── x86-16_default_patterns.xml
│ │ ├── x86-64gcc_patterns.xml
│ │ ├── x86-64win_patterns.xml
│ │ ├── x86delphi_patterns.xml
│ │ ├── x86gcc_patterns.xml
│ │ ├── x86gcc_prepatterns.xml
│ │ ├── x86win_patterns.xml
│ │ └── x86win_prepatterns.xml
│ ├── py.typed
│ ├── pypcode_native.cpp
│ ├── pypcode_native.pyi
│ ├── sleigh/
│ │ ├── Makefile
│ │ ├── address.cc
│ │ ├── address.hh
│ │ ├── compression.cc
│ │ ├── compression.hh
│ │ ├── context.cc
│ │ ├── context.hh
│ │ ├── emulate.cc
│ │ ├── emulate.hh
│ │ ├── error.hh
│ │ ├── filemanage.cc
│ │ ├── filemanage.hh
│ │ ├── float.cc
│ │ ├── float.hh
│ │ ├── globalcontext.cc
│ │ ├── globalcontext.hh
│ │ ├── loadimage.cc
│ │ ├── loadimage.hh
│ │ ├── loadimage_bfd.cc
│ │ ├── loadimage_bfd.hh
│ │ ├── marshal.cc
│ │ ├── marshal.hh
│ │ ├── memstate.cc
│ │ ├── memstate.hh
│ │ ├── opbehavior.cc
│ │ ├── opbehavior.hh
│ │ ├── opcodes.cc
│ │ ├── opcodes.hh
│ │ ├── partmap.hh
│ │ ├── pcodecompile.cc
│ │ ├── pcodecompile.hh
│ │ ├── pcodeparse.cc
│ │ ├── pcodeparse.hh
│ │ ├── pcodeparse.y
│ │ ├── pcoderaw.cc
│ │ ├── pcoderaw.hh
│ │ ├── semantics.cc
│ │ ├── semantics.hh
│ │ ├── slaformat.cc
│ │ ├── slaformat.hh
│ │ ├── sleigh.cc
│ │ ├── sleigh.hh
│ │ ├── sleighbase.cc
│ │ ├── sleighbase.hh
│ │ ├── slgh_compile.cc
│ │ ├── slgh_compile.hh
│ │ ├── slghparse.cc
│ │ ├── slghparse.hh
│ │ ├── slghparse.y
│ │ ├── slghpatexpress.cc
│ │ ├── slghpatexpress.hh
│ │ ├── slghpattern.cc
│ │ ├── slghpattern.hh
│ │ ├── slghscan.cc
│ │ ├── slghscan.l
│ │ ├── slghsymbol.cc
│ │ ├── slghsymbol.hh
│ │ ├── space.cc
│ │ ├── space.hh
│ │ ├── translate.cc
│ │ ├── translate.hh
│ │ ├── types.h
│ │ ├── xml.cc
│ │ ├── xml.hh
│ │ └── xml.y
│ └── zlib/
│ ├── README.txt
│ ├── adler32.c
│ ├── deflate.c
│ ├── deflate.h
│ ├── gzguts.h
│ ├── inffast.c
│ ├── inffast.h
│ ├── inffixed.h
│ ├── inflate.c
│ ├── inflate.h
│ ├── inftrees.c
│ ├── inftrees.h
│ ├── trees.c
│ ├── trees.h
│ ├── zconf.h
│ ├── zlib.h
│ ├── zutil.c
│ └── zutil.h
├── pyproject.toml
├── scripts/
│ ├── benchmark.py
│ └── sleigh_download.sh
├── setup.py
└── tests/
├── test_cli.py
└── test_pypcode.py
================================================
FILE CONTENTS
================================================
================================================
FILE: .clang-format
================================================
# https://clang.llvm.org/docs/ClangFormat.html
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
---
Language: Cpp
AlignAfterOpenBracket: Align
AlignConsecutiveAssignments: false
AlignConsecutiveDeclarations: false
AlignEscapedNewlinesLeft: true
AlignOperands: true
AlignTrailingComments: false # churn
AllowShortBlocksOnASingleLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: None
AllowShortIfStatementsOnASingleLine: false
AllowShortLoopsOnASingleLine: false
AlwaysBreakAfterReturnType: None
AlwaysBreakBeforeMultilineStrings: false
BinPackArguments: false
BinPackParameters: false
AllowAllParametersOfDeclarationOnNextLine: false
AllowAllArgumentsOnNextLine: true
BraceWrapping:
AfterControlStatement: false
AfterEnum: false
AfterFunction: true
AfterStruct: false
AfterUnion: false
BeforeElse: false
IndentBraces: false
BreakBeforeBinaryOperators: None
BreakBeforeBraces: Custom
BreakBeforeTernaryOperators: false
BreakStringLiterals: true
ColumnLimit: 120
ContinuationIndentWidth: 4
Cpp11BracedListStyle: false
DerivePointerAlignment: false
DisableFormat: false
IncludeIsMainRegex: '$'
IndentCaseLabels: false
IndentWidth: 4
AccessModifierOffset: -4
IndentWrappedFunctionNames: false
KeepEmptyLinesAtTheStartOfBlocks: false
MacroBlockBegin: '.*_BEGIN$' # only PREC_BEGIN ?
MacroBlockEnd: '.*_END$'
MaxEmptyLinesToKeep: 2
PointerAlignment: Right
ReflowComments: true
SortIncludes: true
SpaceAfterCStyleCast: false
SpaceBeforeAssignmentOperators: true
SpaceBeforeParens: ControlStatements
SpaceInEmptyParentheses: false
SpacesBeforeTrailingComments: 1
SpacesInContainerLiterals: true
SpacesInParentheses: false
SpacesInSquareBrackets: false
Standard: Auto
UseTab: Never
...
================================================
FILE: .github/ISSUE_TEMPLATE/bug-report.yml
================================================
name: Report a bug
description: Report a bug in pypcode
labels: [bug,needs-triage]
body:
- type: markdown
attributes:
value: |
Thank you for taking the time to submit this bug report!
Before submitting this bug report, please check the following, which may resolve your issue:
* Have you checked that you are running the latest versions of angr and its components? angr is rapidly-evolving!
* Have you [searched existing issues](https://github.com/angr/pypcode/issues?q=is%3Aopen+is%3Aissue+label%3Abug) to see if this bug has been reported before?
* Have you checked the [documentation](https://docs.angr.io/)?
* Have you checked the [FAQ](https://docs.angr.io/introductory-errata/faq)?
**Important:** If this bug is a security vulnerability, please submit it privately. See our [security policy](https://github.com/angr/angr/blob/master/SECURITY.md) for more details.
Please note: The angr suite is maintained by a small team. While we cannot guarantee any timeliness for fixes and enhancements, we will do our best. For more real-time help with angr, from us and the community, join our [Slack](https://angr.io/invite/).
- type: textarea
attributes:
label: Description
description: Brief description of the bug, with any relevant log messages.
validations:
required: true
- type: textarea
attributes:
label: Steps to reproduce the bug
description: |
If appropriate, include both a **script to reproduce the bug**, and if possible **attach the binary used**.
**Tip:** You can attach files to the issue by first clicking on the textarea to select it, then dragging & dropping the file onto the textarea.
- type: textarea
attributes:
label: Environment
description: Many common issues are caused by problems with the local Python environment. Before submitting, double-check that your versions of all modules in the angr suite (angr, cle, pyvex, ...) are up to date and include the output of `python -m angr.misc.bug_report` here.
- type: textarea
attributes:
label: Additional context
description: Any additional context about the problem.
================================================
FILE: .github/ISSUE_TEMPLATE/config.yml
================================================
blank_issues_enabled: false
contact_links:
- name: Join our Slack community
url: https://angr.io/invite/
about: For questions and help with angr, you are invited to join the angr Slack community
================================================
FILE: .github/ISSUE_TEMPLATE/feature-request.yml
================================================
name: Request a feature
description: Request a new feature for pypcode
labels: [enhancement,needs-triage]
body:
- type: markdown
attributes:
value: |
Thank you for taking the time to submit this feature request!
Before submitting this feature request, please check the following:
* Have you checked that you are running the latest versions of angr and its components? angr is rapidly-evolving!
* Have you checked the [documentation](https://docs.angr.io/) to see if this feature exists already?
* Have you [searched existing issues](https://github.com/angr/pypcode/issues?q=is%3Aissue+label%3Aenhancement+) to see if this feature has been requested before?
Please note: The angr suite is maintained by a small team. While we cannot guarantee any timeliness for fixes and enhancements, we will do our best. For more real-time help with angr, from us and the community, join our [Slack](https://angr.io/invite/).
- type: textarea
attributes:
label: Description
description: |
Brief description of the desired feature. If the feature is intended to solve some problem, please clearly describe the problem, including any relevant binaries, etc.
**Tip:** You can attach files to the issue by first clicking on the textarea to select it, then dragging & dropping the file onto the textarea.
validations:
required: true
- type: textarea
attributes:
label: Alternatives
description: Possible alternative solutions or features that you have considered.
- type: textarea
attributes:
label: Additional context
description: Any other context or screenshots about the feature request.
================================================
FILE: .github/ISSUE_TEMPLATE/question.yml
================================================
name: Ask a question
description: Ask a question about pypcode
labels: [question,needs-triage]
body:
- type: markdown
attributes:
value: |
If you have a question about pypcode, that is not a bug report or a feature request, you can ask it here. For more real-time help with pypcode, from us and the community, join our [Slack](https://angr.io/invite/).
Before submitting this question, please check the following, which may answer your question:
* Have you checked the [documentation](https://docs.angr.io/)?
* Have you checked the [FAQ](https://docs.angr.io/introductory-errata/faq)?
* Have you checked our library of [examples](https://github.com/angr/angr-doc/tree/master/examples)?
* Have you [searched existing issues](https://github.com/angr/pypcode/issues?q=is%3Aissue+label%3Aquestion) to see if this question has been answered before?
* Have you checked that you are running the latest versions of angr and its components. angr is rapidly-evolving!
Please note: The angr suite is maintained by a small team. While we cannot guarantee any timeliness for fixes and enhancements, we will do our best.
- type: textarea
attributes:
label: Question
description:
validations:
required: true
================================================
FILE: .github/dependabot.yml
================================================
version: 2
updates:
- package-ecosystem: "github-actions"
directory: "/"
schedule:
interval: "weekly"
commit-message:
prefix: "ci"
================================================
FILE: .github/workflows/build.yml
================================================
name: Build
on: [push, pull_request]
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true
permissions:
contents: read
jobs:
lint:
name: Lint
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
- uses: actions/setup-python@a309ff8b426b58ec0e2a45f0f869d46889d02405 # v6.2.0
with:
python-version: '3.12'
- run: |
python -m pip install setuptools pylint
python -m pip install -e .
- uses: pre-commit/action@2c7b3805fd2a0fd8c1884dcaebf91fc102a13ecd # v3.0.1
with:
extra_args: pylint --all-files
build_sdist:
name: Build source distribution
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
- uses: actions/setup-python@a309ff8b426b58ec0e2a45f0f869d46889d02405 # v6.2.0
with:
python-version: '3.12'
- name: Build sdist
run: |
python -m pip install --user build
python -m build --sdist
- uses: actions/upload-artifact@043fb46d1a93c77aae656e7c1c64a875d1fc6a0a # v7.0.1
with:
name: source
path: dist/*.tar.gz
build_wheels:
needs: build_sdist
name: Build wheel ${{ matrix.py }}-${{ matrix.platform.wheel_tag }} on ${{ matrix.platform.os }}
runs-on: ${{ matrix.platform.os }}
strategy:
matrix:
py: [cp312, cp313, cp314]
platform:
- { arch: x86_64, os: windows-latest, wheel_tag: win_amd64 }
- { arch: x86_64, os: macos-15-intel, wheel_tag: macosx_x86_64 }
- { arch: arm64, os: macos-latest, wheel_tag: macosx_arm64 }
- { arch: x86_64, os: ubuntu-latest, wheel_tag: manylinux_x86_64 }
- { arch: aarch64, os: ubuntu-24.04-arm, wheel_tag: manylinux_aarch64 }
steps:
- name: Download source distribution
uses: actions/download-artifact@3e5f45b2cfb9172054b4087a40e8e0b5a5461e7c # v8.0.1
with:
name: source
- name: Unpack source distribution
shell: bash
run: tar --strip-components 1 -xvf *.tar.gz
- name: Build wheel
uses: pypa/cibuildwheel@8d2b08b68458a16aeb24b64e68a09ab1c8e82084 # v3.4.1
with:
output-dir: wheelhouse
env:
CIBW_ARCHS_MACOS: ${{ matrix.platform.arch }}
CIBW_BUILD: ${{ matrix.py }}-${{ matrix.platform.wheel_tag }}
CIBW_TEST_COMMAND: python -m unittest discover -v -s {package}/tests
CIBW_BUILD_VERBOSITY: 1
MACOSX_DEPLOYMENT_TARGET: ${{ matrix.platform.arch == 'arm64' && '11' || '10.14' }}
- uses: actions/upload-artifact@043fb46d1a93c77aae656e7c1c64a875d1fc6a0a # v7.0.1
with:
name: ${{ matrix.py }}-${{ matrix.platform.wheel_tag }}
path: ./wheelhouse/*.whl
build_docs:
name: Build docs
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
- uses: actions/setup-python@a309ff8b426b58ec0e2a45f0f869d46889d02405 # v6.2.0
with:
python-version: '3.12'
- run: |
pip install -e .[docs]
cd docs && make html coverage
test_coverage:
name: Test with coverage
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
- uses: actions/setup-python@a309ff8b426b58ec0e2a45f0f869d46889d02405 # v6.2.0
with:
python-version: '3.13'
- name: Run tests
run: |
pip install setuptools nanobind cmake
COVERAGE=1 pip install --no-build-isolation -e .[testing]
pytest -vv \
--junitxml=junit.xml -o junit_family=legacy \
--cov-report=xml \
|| [[ $? -lt 2 ]] # Accept success and test failures, fail on infrastructure problems (exit codes >1)
gcovr -r . \
--print-summary \
--xml-pretty \
-o coverage-native.xml \
--gcov-filter 'pypcode_native.cpp'
[[ -e ./junit.xml && -e coverage.xml && -e ./coverage-native.xml ]]
- name: Upload test results
uses: actions/upload-artifact@043fb46d1a93c77aae656e7c1c64a875d1fc6a0a # v7.0.1
with:
name: results
include-hidden-files: true
if-no-files-found: error
path: |
./junit.xml
./coverage.xml
./coverage-native.xml
upload_coverage:
name: Upload test results to Codecov
needs: [test_coverage]
runs-on: ubuntu-latest
permissions:
id-token: write
steps:
- uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
- uses: actions/download-artifact@3e5f45b2cfb9172054b4087a40e8e0b5a5461e7c # v8.0.1
with:
name: results
- name: Upload test coverage to Codecov
uses: codecov/codecov-action@v6
with:
use_oidc: true
fail_ci_if_error: true
verbose: true
files: ./coverage.xml ./coverage-native.xml
- name: Upload test results to Codecov
uses: codecov/codecov-action@v6
with:
use_oidc: true
fail_ci_if_error: true
verbose: true
files: ./junit.xml
report_type: test_results
upload_pypi:
name: Upload wheels to PyPI
needs: [lint, build_docs, build_sdist, build_wheels, upload_coverage]
environment:
name: pypi
url: https://pypi.org/p/pypcode
permissions:
id-token: write
runs-on: ubuntu-latest
# Upload to PyPI on every tag starting with 'v'
if: github.event_name == 'push' && startsWith(github.event.ref, 'refs/tags/v')
steps:
- uses: actions/download-artifact@3e5f45b2cfb9172054b4087a40e8e0b5a5461e7c # v8.0.1
with:
path: artifacts
- run: |
mkdir dist
find artifacts -type f \( -name '*.whl' -o -name '*.tar.gz' \) -exec mv {} dist \;
- uses: pypa/gh-action-pypi-publish@cef221092ed1bacb1cc03d23a2d87d1d172e277b # v1.14.0
================================================
FILE: .gitignore
================================================
*.egg-info/
__pycache__/
build/
dist/
pypcode/bin/
docs/_build/
*.so
*.sla
*.manifest
*.gradle
*.java
.coverage
coverage.xml
coverage-native.xml
================================================
FILE: .pre-commit-config.yaml
================================================
ci:
skip: [pylint]
exclude: ^pypcode/sleigh|^pypcode/processors
repos:
#
# Fail fast
#
- repo: https://github.com/abravalheri/validate-pyproject
rev: v0.25
hooks:
- id: validate-pyproject
fail_fast: true
- repo: https://github.com/pre-commit/pre-commit-hooks
rev: v6.0.0
hooks:
# General
- id: check-merge-conflict
fail_fast: true
- id: check-case-conflict
fail_fast: true
- id: destroyed-symlinks
fail_fast: true
- id: check-symlinks
fail_fast: true
- id: check-added-large-files
fail_fast: true
# Syntax
- id: check-toml
fail_fast: true
- id: check-json
fail_fast: true
- id: check-yaml
fail_fast: true
- repo: https://github.com/pre-commit/pre-commit-hooks
rev: v6.0.0
hooks:
- id: check-ast
fail_fast: true
#
# Modifiers
#
- repo: https://github.com/pre-commit/pre-commit-hooks
rev: v6.0.0
hooks:
- id: mixed-line-ending
- id: trailing-whitespace
- repo: https://github.com/dannysepler/rm_unneeded_f_str
rev: v0.2.0
hooks:
- id: rm-unneeded-f-str
- repo: https://github.com/asottile/pyupgrade
rev: v3.21.2
hooks:
- id: pyupgrade
args: [--py312-plus]
# Last modifier: Coding Standard
- repo: https://github.com/psf/black-pre-commit-mirror
rev: 26.3.1
hooks:
- id: black
- repo: https://github.com/pre-commit/mirrors-clang-format
rev: v22.1.4
hooks:
- id: clang-format
files: pypcode/pypcode_native.cpp
#
# Static Checks
#
- repo: https://github.com/pre-commit/pygrep-hooks
rev: v1.10.0
hooks:
# Python
- id: python-use-type-annotations
- id: python-no-log-warn
# Documentation
- id: rst-backticks
- id: rst-directive-colons
- id: rst-inline-touching-normal
- repo: https://github.com/pre-commit/pre-commit-hooks
rev: v6.0.0
hooks:
- id: debug-statements
- id: check-builtin-literals
- id: check-docstring-first
- repo: https://github.com/astral-sh/ruff-pre-commit
rev: v0.15.12
hooks:
- id: ruff
- repo: https://github.com/pre-commit/mirrors-mypy
rev: v1.20.2
hooks:
- id: mypy
- repo: local
hooks:
- id: pylint
name: pylint
entry: pylint
language: system
types: [python]
args:
[
"-rn", # Only display messages
"-sn", # Don't display the score
]
================================================
FILE: .pylintrc
================================================
[MASTER]
# Specify a configuration file.
#rcfile=
# Python code to execute, usually for sys.path manipulation such as
# pygtk.require().
#init-hook=
# Add files or directories to the blacklist. They should be base names, not
# paths.
ignore=CVS
# Pickle collected data for later comparisons.
persistent=yes
# List of plugins (as comma separated values of python modules names) to load,
# usually to register additional checkers.
load-plugins=pylint.extensions.no_self_use,pylint.extensions.bad_builtin
[MESSAGES CONTROL]
# Enable the message, report, category or checker with the given id(s). You can
# either give multiple identifier separated by comma (,) or put this option
# multiple time.
#enable=
# Disable the message, report, category or checker with the given id(s). You
# can either give multiple identifier separated by comma (,) or put this option
# multiple time (only on the command line, not in the configuration file where
# it should appear only once).
disable=
abstract-method,
fixme,
invalid-name,
len-as-condition,
locally-disabled,
missing-function-docstring,
missing-module-docstring,
no-else-return,
protected-access,
too-few-public-methods,
too-many-ancestors,
too-many-arguments,
too-many-branches,
too-many-instance-attributes,
too-many-lines,
too-many-locals,
too-many-nested-blocks,
too-many-public-methods,
too-many-return-statements,
too-many-statements,
unidiomatic-typecheck,
consider-using-f-string,
attribute-defined-outside-init
[REPORTS]
# Set the output format. Available formats are text, parseable, colorized, msvs
# (visual studio) and html
output-format=text
# Tells whether to display a full report or only the messages
reports=yes
# Python expression which should return a note less than 10 (10 is the highest
# note). You have access to the variables errors warning, statement which
# respectively contain the number of errors / warnings messages and the total
# number of statements analyzed. This is used by the global evaluation report
# (RP0004).
evaluation=10.0 - ((float(5 * error + warning + refactor + convention) / statement) * 10)
[TYPECHECK]
# Tells whether missing members accessed in mixin class should be ignored. A
# mixin class is detected if its name ends with "mixin" (case insensitive).
ignore-mixin-members=yes
# List of classes names for which member attributes should not be checked
# (useful for classes with attributes dynamically set).
ignored-classes=SQLObject,nose.tools,nose.tools.trivial,sympy
# List of members which are set dynamically and missed by pylint inference
# system, and so shouldn't trigger E0201 when accessed. Python regular
# expressions are accepted.
generated-members=REQUEST,acl_users,aq_parent
ignored-modules=sh,PySide2,PySide2.QtTest,PySide2.QtCore,PySide2.QtWidgets,PySide2.QtGui
[FORMAT]
# Maximum number of characters on a single line.
max-line-length=120
# Maximum number of lines in a module
max-module-lines=1000
# String used as indentation unit. This is usually " " (4 spaces) or "\t" (1
# tab).
indent-string=' '
[BASIC]
# List of builtins function names that should not be used, separated by a comma
bad-functions=map,filter,apply,input
# Regular expression which should only match correct module names
module-rgx=(([a-z_][a-z0-9_]*)|([A-Z][a-zA-Z0-9]+))$
# Regular expression which should only match correct module level names
const-rgx=(([A-Z_][A-Z0-9_]*)|(__.*__))$
# Regular expression which should only match correct class names
class-rgx=[A-Z_][a-zA-Z0-9]+$
# Regular expression which should only match correct function names
function-rgx=[a-z_][a-z0-9_]{2,30}$
# Regular expression which should only match correct method names
method-rgx=[a-z_][a-z0-9_]{2,30}$
# Regular expression which should only match correct instance attribute names
attr-rgx=[a-z_][a-z0-9_]{2,30}$
# Regular expression which should only match correct argument names
argument-rgx=[a-z_][a-z0-9_]{2,30}$
# Regular expression which should only match correct variable names
variable-rgx=[a-z_][a-z0-9_]{2,30}$
# Regular expression which should only match correct list comprehension /
# generator expression variable names
inlinevar-rgx=[A-Za-z_][A-Za-z0-9_]*$
# Good variable names which should always be accepted, separated by a comma
good-names=i,j,k,ex,Run,_,l
# Bad variable names which should always be refused, separated by a comma
bad-names=
# Regular expression which should only match functions or classes name which do
# not require a docstring
no-docstring-rgx=__.*__
[VARIABLES]
# Tells whether we should check for unused import in __init__ files.
init-import=no
# A regular expression matching the beginning of the name of dummy variables
# (i.e. not used).
dummy-variables-rgx=_|dummy
# List of additional names supposed to be defined in builtins. Remember that
# you should avoid to define new builtins when possible.
additional-builtins=
[MISCELLANEOUS]
# List of note tags to take in consideration, separated by a comma.
notes=FIXME,XXX,TODO
[SIMILARITIES]
# Minimum lines number of a similarity.
min-similarity-lines=4
# Ignore comments when computing similarities.
ignore-comments=yes
# Ignore docstrings when computing similarities.
ignore-docstrings=yes
[DESIGN]
# Maximum number of arguments for function / method
max-args=5
# Argument names that match this expression will be ignored. Default to name
# with leading underscore
ignored-argument-names=_.*
# Maximum number of locals for function / method body
max-locals=15
# Maximum number of return / yield for function / method body
max-returns=6
# Maximum number of branch for function / method body
max-branches=12
# Maximum number of statements in function / method body
max-statements=50
# Maximum number of parents for a class (see R0901).
max-parents=7
# Maximum number of attributes for a class (see R0902).
max-attributes=7
# Minimum number of public methods for a class (see R0903).
min-public-methods=2
# Maximum number of public methods for a class (see R0904).
max-public-methods=20
[IMPORTS]
# Deprecated modules which should not be used, separated by a comma
deprecated-modules=regsub,TERMIOS,Bastion,rexec
# Create a graph of every (i.e. internal and external) dependencies in the
# given file (report RP0402 must not be disabled)
import-graph=
# Create a graph of external dependencies in the given file (report RP0402 must
# not be disabled)
ext-import-graph=
# Create a graph of internal dependencies in the given file (report RP0402 must
# not be disabled)
int-import-graph=
[CLASSES]
# List of method names used to declare (i.e. assign) instance attributes.
defining-attr-methods=__init__,__new__,setUp
# List of valid names for the first argument in a class method.
valid-classmethod-first-arg=cls
[EXCEPTIONS]
# Exceptions that will emit a warning when being caught. Defaults to
# "Exception"
overgeneral-exceptions=builtins.Exception
================================================
FILE: .readthedocs.yml
================================================
# Read the Docs configuration file
# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
version: 2
build:
os: ubuntu-22.04
tools:
python: "3.12"
python:
install:
- method: pip
path: .
extra_requirements:
- docs
sphinx:
configuration: docs/conf.py
================================================
FILE: CMakeLists.txt
================================================
cmake_minimum_required(VERSION 3.18...3.22)
project(pypcode)
find_package(Python COMPONENTS Interpreter Development.Module REQUIRED)
set(CMAKE_CXX_STANDARD 17)
set(CMAKE_OSX_DEPLOYMENT_TARGET 10.14)
if(NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES)
set(CMAKE_BUILD_TYPE Release CACHE STRING "Choose the type of build." FORCE)
set_property(CACHE CMAKE_BUILD_TYPE PROPERTY STRINGS "Debug" "Release" "MinSizeRel" "RelWithDebInfo")
endif()
# Detect the installed nanobind package and import it into CMake
execute_process(
COMMAND "${Python_EXECUTABLE}" -c "import nanobind; print(nanobind.cmake_dir())"
OUTPUT_STRIP_TRAILING_WHITESPACE OUTPUT_VARIABLE NB_DIR)
list(APPEND CMAKE_PREFIX_PATH "${NB_DIR}")
find_package(nanobind CONFIG REQUIRED)
if(MSVC)
add_compile_options(/O2 /D_HAS_STD_BYTE=0 /DLOCAL_ZLIB=1 /DNO_GZIP=1)
else()
add_compile_options(-O3 -Wall -Wno-sign-compare -D__TERMINAL__ -DLOCAL_ZLIB=1 -DNO_GZIP=1)
endif()
include_directories(pypcode/thirdparty)
set(ZLIB
pypcode/zlib/adler32.c
pypcode/zlib/deflate.c
pypcode/zlib/inffast.c
pypcode/zlib/inflate.c
pypcode/zlib/inftrees.c
pypcode/zlib/trees.c
pypcode/zlib/zutil.c
)
set(SLEIGH_COMMON
pypcode/sleigh/address.cc
pypcode/sleigh/compression.cc
pypcode/sleigh/context.cc
pypcode/sleigh/float.cc
pypcode/sleigh/globalcontext.cc
pypcode/sleigh/marshal.cc
pypcode/sleigh/opcodes.cc
pypcode/sleigh/pcodecompile.cc
pypcode/sleigh/pcodeparse.cc
pypcode/sleigh/pcoderaw.cc
pypcode/sleigh/semantics.cc
pypcode/sleigh/slaformat.cc
pypcode/sleigh/sleigh.cc
pypcode/sleigh/sleighbase.cc
pypcode/sleigh/slghpatexpress.cc
pypcode/sleigh/slghpattern.cc
pypcode/sleigh/slghsymbol.cc
pypcode/sleigh/space.cc
pypcode/sleigh/translate.cc
pypcode/sleigh/xml.cc
)
add_executable(sleigh
pypcode/sleigh/filemanage.cc
pypcode/sleigh/slgh_compile.cc
pypcode/sleigh/slghparse.cc
pypcode/sleigh/slghscan.cc
${SLEIGH_COMMON}
${ZLIB}
)
install(TARGETS sleigh DESTINATION bin)
nanobind_add_module(pypcode_native
pypcode/pypcode_native.cpp
${SLEIGH_COMMON}
${ZLIB}
)
if(DEFINED ENV{COVERAGE} AND NOT "$ENV{COVERAGE}" STREQUAL "")
if(CMAKE_CXX_COMPILER_ID MATCHES "GNU|Clang")
target_compile_options(pypcode_native PRIVATE --coverage -O0 -g)
target_link_options(pypcode_native PRIVATE --coverage -O0 -g)
endif()
endif()
install(TARGETS pypcode_native DESTINATION .)
================================================
FILE: LICENSE.txt
================================================
pypcode is a library built around the SLEIGH library.
SLEIGH and the processor definition files under the pypcode/processors directory
originate from the Ghidra project (https://ghidra-sre.org/). SLEIGH is released
under the terms of the Apache 2 license as defined in docs/ghidra/LICENSE. See
NOTICE file in docs/ghidra/NOTICE.
The remaining code of pypcode, unless stated otherwise, is licensed under the
terms of the 2-clause BSD license below.
================================================================================
Copyright (c) 2021, Arizona Board of Regents
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
================================================
FILE: MANIFEST.in
================================================
graft pypcode
prune pypcode/bin
include CMakeLists.txt
include LICENSE.txt
graft tests
global-exclude *.so
global-exclude *.gitignore
================================================
FILE: README.md
================================================
pypcode
=======
[](https://pypi.org/project/pypcode/)
[](https://codecov.io/gh/angr/pypcode)
Machine code disassembly and IR translation library for Python using the
excellent SLEIGH library from the [Ghidra](https://ghidra-sre.org/) framework.
This library was created primarily for use with [angr](http://angr.io), which
provides analyses and symbolic execution of p-code.
Documentation covering how to install and use pypcode is
[available here](https://api.angr.io/projects/pypcode/en/latest/).
================================================
FILE: docs/Makefile
================================================
# Minimal makefile for Sphinx documentation
#
# You can set these variables from the command line, and also
# from the environment for the first two.
SPHINXOPTS ?=
SPHINXBUILD ?= sphinx-build
SOURCEDIR = .
BUILDDIR = _build
# Put it first so that "make" without argument is like "make help".
help:
@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
.PHONY: help Makefile
# Catch-all target: route all unknown targets to Sphinx using the new
# "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS).
%: Makefile
@$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
================================================
FILE: docs/api.rst
================================================
:mod:`pypcode`
=========================================
.. automodule:: pypcode
================================================
FILE: docs/conf.py
================================================
# Configuration file for the Sphinx documentation builder.
#
# For the full list of built-in configuration values, see the documentation:
# https://www.sphinx-doc.org/en/master/usage/configuration.html
import datetime
# -- Project information -----------------------------------------------------
# https://www.sphinx-doc.org/en/master/usage/configuration.html#project-information
project = "pypcode"
project_copyright = f"{datetime.datetime.now().year}, The angr Project contributors"
author = "The angr Project"
# -- General configuration ---------------------------------------------------
# https://www.sphinx-doc.org/en/master/usage/configuration.html#general-configuration
extensions = [
"sphinx.ext.autodoc",
"sphinx.ext.autosummary",
"IPython.sphinxext.ipython_console_highlighting",
"IPython.sphinxext.ipython_directive",
"sphinx.ext.coverage",
"sphinx.ext.napoleon",
"sphinx.ext.todo",
"sphinx.ext.viewcode",
"sphinx_autodoc_typehints",
"myst_parser",
]
templates_path = ["_templates"]
exclude_patterns = ["_build", "Thumbs.db", ".DS_Store"]
# -- Options for autodoc -----------------------------------------------------
# https://www.sphinx-doc.org/en/master/usage/extensions/autodoc.html#configuration
autoclass_content = "class"
autodoc_default_options = {
"members": True,
"member-order": "bysource",
"inherited-members": True,
"show-inheritance": True,
"undoc-members": True,
}
autodoc_inherit_docstrings = True
autodoc_typehints = "both"
# -- Options for coverage ----------------------------------------------------
# https://www.sphinx-doc.org/en/master/usage/extensions/coverage.html
coverage_write_headline = False
# -- Options for HTML output -------------------------------------------------
# https://www.sphinx-doc.org/en/master/usage/configuration.html#options-for-html-output
html_theme = "furo"
html_static_path = ["_static"]
================================================
FILE: docs/guide.rst
================================================
Guide
=====
Installation
------------
This package can be installed on Linux, macOS, and Windows platforms for recent (3.8+) versions of both CPython and
PyPy. Wheels are provided for several configurations. The latest release can be installed from PyPI using ``pip``:
.. code:: bash
pip install pypcode
The very latest development version can be installed from GitHub via:
.. code:: bash
pip install --user https://github.com/angr/pypcode/archive/refs/heads/master.zip
Usage Example
-------------
Disassemble with :meth:`pypcode.Context.disassemble`:
.. ipython::
In [0]: from pypcode import Context
...: ctx = Context("x86:LE:64:default")
...: dx = ctx.disassemble(bytes.fromhex("483578563412c3"))
...: print(dx)
Work with :class:`pypcode.Disassembly` and :class:`pypcode.Instruction`:
.. ipython::
In [0]: (dx.instructions[0].mnem, dx.instructions[0].body)
Translate to P-Code with :meth:`pypcode.Context.translate`:
.. ipython::
In [0]: from pypcode import Context
...: ctx = Context("x86:LE:64:default")
...: tx = ctx.translate(bytes.fromhex("483578563412c3"))
...: print(tx)
Work with :class:`pypcode.Translation` and :class:`pypcode.PcodeOp`:
.. ipython::
In [0]: tx.ops[3].opcode
In [0]: tx.ops[3].inputs[0].space.name
In [0]: tx.ops[3].inputs[0].getRegisterName()
Command Line Usage Example
--------------------------
The ``pypcode`` module can be invoked from command line to disassemble and translate supported machine code to P-code
from command line. Run ``python -m pypcode --help`` for usage information.
::
$ python -m pypcode -b x86:LE:64:default test-x64.bin
--------------------------------------------------------------------------------
00000000/2: XOR EAX,EAX
--------------------------------------------------------------------------------
0: CF = 0x0
1: OF = 0x0
2: EAX = EAX ^ EAX
3: RAX = zext(EAX)
4: SF = EAX s< 0x0
5: ZF = EAX == 0x0
6: unique[0x2580:4] = EAX & 0xff
7: unique[0x2590:1] = popcount(unique[0x2580:4])
8: unique[0x25a0:1] = unique[0x2590:1] & 0x1
9: PF = unique[0x25a0:1] == 0x0
--------------------------------------------------------------------------------
00000002/2: CMP ESI,EAX
--------------------------------------------------------------------------------
0: CF = ESI < EAX
1: OF = sborrow(ESI, EAX)
2: unique[0x5180:4] = ESI - EAX
3: SF = unique[0x5180:4] s< 0x0
4: ZF = unique[0x5180:4] == 0x0
5: unique[0x2580:4] = unique[0x5180:4] & 0xff
6: unique[0x2590:1] = popcount(unique[0x2580:4])
7: unique[0x25a0:1] = unique[0x2590:1] & 0x1
8: PF = unique[0x25a0:1] == 0x0
--------------------------------------------------------------------------------
00000004/2: JBE 0x17
--------------------------------------------------------------------------------
0: unique[0x18f0:1] = CF || ZF
1: if (unique[0x18f0:1]) goto ram[0x17:8]
SLEIGH & P-Code References
--------------------------
Extensive documentation covering SLEIGH and P-Code is available online:
* `SLEIGH, P-Code Introduction <https://htmlpreview.github.io/?https://github.com/NationalSecurityAgency/ghidra/blob/Ghidra_12.0.2_build/GhidraDocs/languages/html/sleigh.html>`_
* `P-Code Reference Manual <https://htmlpreview.github.io/?https://github.com/NationalSecurityAgency/ghidra/blob/Ghidra_12.0.2_build/GhidraDocs/languages/html/pcoderef.html>`_
================================================
FILE: docs/index.rst
================================================
pypcode documentation
=====================
pypcode is a machine code disassembly and IR translation library for Python using the
excellent `SLEIGH <https://ghidra.re/courses/languages/html/sleigh.html>`__ library from the `Ghidra <https://ghidra-sre.org/>`__ framework (version 12.0.2).
This library was created primarily for use with `angr <http://angr.io>`__, which provides analyses and symbolic
execution of p-code.
Table of Contents
-----------------
.. toctree::
:maxdepth: 2
Guide <guide>
Architecture Support <languages>
API Reference <api>
Indices and Tables
------------------
* :ref:`genindex`
* :ref:`modindex`
* :ref:`search`
================================================
FILE: docs/languages.rst
================================================
Architecture Support
====================
.. ipython::
In [0]: for arch in pypcode.Arch.enumerate():
...: for lang in arch.languages:
...: print(f'{lang.id:32} - {lang.description}')
================================================
FILE: docs/make.bat
================================================
@ECHO OFF
pushd %~dp0
REM Command file for Sphinx documentation
if "%SPHINXBUILD%" == "" (
set SPHINXBUILD=sphinx-build
)
set SOURCEDIR=.
set BUILDDIR=_build
%SPHINXBUILD% >NUL 2>NUL
if errorlevel 9009 (
echo.
echo.The 'sphinx-build' command was not found. Make sure you have Sphinx
echo.installed, then set the SPHINXBUILD environment variable to point
echo.to the full path of the 'sphinx-build' executable. Alternatively you
echo.may add the Sphinx directory to PATH.
echo.
echo.If you don't have Sphinx installed, grab it from
echo.https://www.sphinx-doc.org/
exit /b 1
)
if "%1" == "" goto help
%SPHINXBUILD% -M %1 %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
goto end
:help
%SPHINXBUILD% -M help %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
:end
popd
================================================
FILE: pypcode/__init__.py
================================================
"""
Pythonic interface to SLEIGH
"""
from __future__ import annotations
import os.path
import xml.etree.ElementTree as ET
from enum import IntEnum
from typing import cast
from collections.abc import Generator, Sequence, Mapping
from .__version__ import __version__
from .pypcode_native import __version__ as __pypcode_native_version__ # pylint:disable=no-name-in-module
assert __version__ == __pypcode_native_version__
from .pypcode_native import ( # pylint:disable=no-name-in-module
Address,
AddrSpace,
BadDataError,
DecoderError,
Disassembly,
Instruction,
LowlevelError,
OpCode,
PcodeOp,
TRANSLATE_FLAGS_BB_TERMINATING,
Translation,
UnimplError,
Varnode,
)
from .pypcode_native import Context as _Context # pylint:disable=no-name-in-module
from .printing import (
OpFormat,
OpFormatBinary,
OpFormatFunc,
OpFormatSpecial,
OpFormatUnary,
PcodePrettyPrinter,
)
__all__ = [
"Address",
"AddrSpace",
"Arch",
"ArchLanguage",
"BadDataError",
"Context",
"DecoderError",
"Disassembly",
"Instruction",
"LowlevelError",
"OpCode",
"OpFormat",
"OpFormatBinary",
"OpFormatFunc",
"OpFormatSpecial",
"OpFormatUnary",
"PcodeOp",
"PcodePrettyPrinter",
"TranslateFlags",
"Translation",
"UnimplError",
"Varnode",
]
class TranslateFlags(IntEnum):
"""
Flags that can be passed to Context::translate
"""
BB_TERMINATING = TRANSLATE_FLAGS_BB_TERMINATING
PKG_SRC_DIR = os.path.abspath(os.path.dirname(__file__))
SPECFILES_DIR = os.path.join(PKG_SRC_DIR, "processors")
class ArchLanguage:
"""
A specific language for an architecture. Provides access to language, pspec, and cspecs.
"""
__slots__ = (
"archdir",
"ldef",
"_pspec",
"_cspecs",
)
archdir: str
ldef: ET.Element
def __init__(self, archdir: str, ldef: ET.Element):
self.archdir = archdir
self.ldef = ldef
self._pspec: ET.Element | None = None
self._cspecs: dict[tuple[str, str], ET.Element] | None = None
@property
def pspec_path(self) -> str:
return os.path.join(self.archdir, self.processorspec)
@property
def slafile_path(self) -> str:
return os.path.join(self.archdir, self.slafile)
@property
def description(self) -> str:
elem = self.ldef.find("description")
if elem is not None:
return elem.text or ""
return ""
def __getattr__(self, key):
if key in self.ldef.attrib:
return self.ldef.attrib[key]
raise AttributeError(key)
@property
def pspec(self) -> ET.Element | None:
if self._pspec is None:
self._pspec = ET.parse(self.pspec_path).getroot()
return self._pspec
@property
def cspecs(self) -> Mapping[tuple[str, str], ET.Element]:
if self._cspecs is None:
self._cspecs = {}
for e in self.ldef.findall("compiler"):
path = os.path.join(self.archdir, e.attrib["spec"])
cspec = ET.parse(path).getroot()
self._cspecs[(e.attrib["id"], e.attrib["name"])] = cspec
return self._cspecs
def init_context_from_pspec(self, ctx: Context) -> None:
if self.pspec is None:
return
cd = self.pspec.find("context_data")
if cd is None:
return
cs = cd.find("context_set")
if cs is None:
return
for e in cs:
assert e.tag == "set"
ctx.setVariableDefault(e.attrib["name"], int(e.attrib["val"]))
@classmethod
def from_id(cls, langid: str) -> ArchLanguage | None:
"""
Return language with given id, or None if the language could not be found.
"""
for arch in Arch.enumerate():
for lang in arch.languages:
if lang.id == langid:
return lang
return None
class Arch:
"""
Main class representing an architecture describing available languages.
"""
__slots__ = (
"archpath",
"archname",
"ldefpath",
"ldef",
"languages",
)
archpath: str
archname: str
ldefpath: str
ldef: ET.ElementTree[ET.Element[str]]
languages: Sequence[ArchLanguage]
def __init__(self, name: str, ldefpath: str):
"""
Initialize the Arch.
:param name: The name of the architecture
:param ldefpath: Path to language definition files (.ldefs)
"""
self.archpath = os.path.dirname(ldefpath)
self.archname = name
self.ldefpath = ldefpath
self.ldef = ET.parse(ldefpath)
self.languages = [ArchLanguage(self.archpath, e) for e in self.ldef.getroot()]
@classmethod
def enumerate(cls) -> Generator[Arch]:
"""
Enumerate all available architectures and languages.
Language definitions are sourced from definitions shipped with pypcode and
can be found in processors/<architecture>/data/languages/<variant>.ldefs
"""
for archname in os.listdir(SPECFILES_DIR):
langdir = os.path.join(SPECFILES_DIR, archname, "data", "languages")
if not (os.path.exists(langdir) and os.path.isdir(langdir)):
continue
for langname in os.listdir(langdir):
if not langname.endswith(".ldefs"):
continue
ldefpath = os.path.join(langdir, langname)
yield Arch(archname, ldefpath)
class Context(_Context):
"""
Context for translation.
"""
__slots__ = (
"language",
"registers",
)
language: ArchLanguage
registers: dict[str, Varnode]
def __init__(self, language: ArchLanguage | str):
"""
Initialize a context for translation or disassembly.
:param language: The ``ArchLanguage`` to initialize the context with, or a language id ``str``
"""
if isinstance(language, ArchLanguage):
self.language = language
elif isinstance(language, str):
_l = ArchLanguage.from_id(cast(str, language))
assert _l is not None
self.language = _l
else:
raise TypeError("Context must be initialized with a language or language id")
super().__init__(f"<sleigh>{self.language.slafile_path}</sleigh>")
self.language.init_context_from_pspec(self)
self.registers = {n: v for v, n in self.getAllRegisters().items()}
================================================
FILE: pypcode/__main__.py
================================================
#!/usr/bin/env python
"""
Runs when invoking pypcode module from command line. Lists supported
architectures, and handles basic disassembly and translation to P-code of
supported binaries. Does not parse object files, the binary files must be plain
machine code bytes in a file.
"""
import argparse
import logging
import sys
from difflib import SequenceMatcher
from pypcode import Arch, BadDataError, Context, OpCode, TranslateFlags, UnimplError
log = logging.getLogger(__name__)
logging.basicConfig(level=logging.DEBUG, format="[%(name)s:%(levelname)s] %(message)s")
def main():
ap = argparse.ArgumentParser(
prog="pypcode",
description="Disassemble and translate machine code to P-code using SLEIGH",
)
ap.add_argument(
"-l",
"--list",
action="store_true",
help="list supported architecture languages",
)
ap.add_argument("langid", help="architecture language id")
ap.add_argument("binary", help="path to flat binary code")
ap.add_argument("base", default="0", nargs="?", help="base address to load at")
ap.add_argument("-o", "--offset", default="0", help="offset in binary file to load from")
ap.add_argument("-s", "--length", default=None, help="length of code in bytes to load")
ap.add_argument(
"-i",
"--max-instructions",
default=0,
type=int,
help="maximum number of instructions to translate",
)
ap.add_argument(
"-b",
"--basic-block",
action="store_true",
default=False,
help="stop translation at end of basic block",
)
# List supported languages
langs = {lang.id: lang for arch in Arch.enumerate() for lang in arch.languages}
if ("-l" in sys.argv) or ("--list" in sys.argv):
for langid in sorted(langs):
print("%-35s - %s" % (langid, langs[langid].description))
return
args = ap.parse_args()
# Get requested language
if args.langid not in langs:
print(f'Language "{args.langid}" not found.')
t = args.langid.upper()
suggestions = [langid for langid in langs if SequenceMatcher(None, t, langid.split()[0].upper()).ratio() > 0.25]
if len(suggestions):
print("\nSuggestions:")
for langid in sorted(suggestions):
print(" %-35s - %s" % (langid, langs[langid].description))
print("")
print("Try `--list` for full list of architectures.")
sys.exit(1)
# Load target binary code
base = int(args.base, 0)
with open(args.binary, "rb") as f:
f.seek(int(args.offset, 0))
code = f.read(int(args.length, 0)) if args.length else f.read()
# Translate
ctx = Context(langs[args.langid])
try:
flags = TranslateFlags.BB_TERMINATING if args.basic_block else 0
res = ctx.translate(code, base, max_instructions=args.max_instructions, flags=flags)
last_imark_idx = 0
for i, op in enumerate(res.ops):
if op.opcode == OpCode.IMARK:
last_imark_idx = i
disas_addr = op.inputs[0].offset
disas_offset = disas_addr - base
disas_len = sum(vn.size for vn in op.inputs)
disas_slice = code[disas_offset : disas_offset + disas_len]
print(ctx.disassemble(disas_slice, disas_addr))
else:
print(f" {i - last_imark_idx - 1:3d}: {op}")
print("")
except (BadDataError, UnimplError) as e:
print(f"An error occurred during translation: {e}")
sys.exit(1)
if __name__ == "__main__":
main()
================================================
FILE: pypcode/__version__.py
================================================
__version__ = "3.3.4.dev0"
================================================
FILE: pypcode/docs/ghidra/DISCLAIMER.md
================================================
# Disclaimer of Warranty
This Work is provided "AS IS."
Any express or implied warranties, including but not limited to, the implied warranties of merchantability and fitness for a particular purpose are disclaimed.
In no event shall the United States Government be liable for any direct, indirect, incidental, special, exemplary or consequential damages (including, but not limited to, procurement of substitute goods or services, loss of use, data or profits, or business interruption) however caused and on any theory of liability, whether in contract, strict liability, or tort (including negligence or otherwise) arising in any way out of the use of this Work, even if advised of the possibility of such damage.
The User of this Work agrees to hold harmless and indemnify the United States Government, its agents and employees from every claim or liability (whether in tort or in contract), including attorney's fees, court costs, and expenses, arising in direct consequence of Recipient's use of the item, including, but not limited to, claims or liabilities made for injury to or death of personnel of User or third parties, damage to or destruction of property of User or third parties, and infringement or other violations of intellectual property or technical data rights.
# Disclaimer of Endorsement
Nothing in this Work is intended to constitute an endorsement, explicit or implied, by the United States Government of any particular manufacturer's product or service.
Reference herein to any specific commercial product, process, or service by trade name, trademark, manufacturer, or otherwise, in this Work does not constitute an endorsement, recommendation, or favoring by the United States Government and shall not be used for advertising or product endorsement purposes.
================================================
FILE: pypcode/docs/ghidra/LICENSE
================================================
Apache License
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TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
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================================================
FILE: pypcode/docs/ghidra/NOTICE
================================================
Ghidra
This product includes software developed at National Security Agency
(https://www.nsa.gov)
Portions of this product were created by the U.S. Government and not subject to
U.S. copyright protections under 17 U.S.C.
The remaining portions are copyright their respective authors and have been
contributed under the terms of one or more open source licenses, and made
available to you under the terms of those licenses. (See LICENSE)
Licensing Intent
The intent is that this software and documentation ("Project") should be treated
as if it is licensed under the license associated with the Project ("License")
in the LICENSE file. However, because we are part of the United States (U.S.)
Federal Government, it is not that simple.
The portions of this Project written by U.S. Federal Government employees within
the scope of their federal employment are ineligible for copyright protection in
the U.S.; this is generally understood to mean that these portions of the
Project are placed in the public domain.
In countries where copyright protection is available (which does not include the
U.S.), contributions made by U.S. Federal Government employees are released
under the License. Merged contributions from private contributors are released
under the License.
The Ghidra software is released under the Apache License, Version 2.0
("Apache 2.0").
In addition, each module may contain numerous 3rd party components (libraries,
icons, etc.) that each have their own license which is compatible with Apache
2.0. Each module has a LICENSE.txt file that lists each license used in that
module and the 3rd party files that fall under that license. The license files
for each license used by Ghidra can be found in the licenses directory at the
installation root.
Also, in the GPL directory, there are several stand-alone support programs that
are released using the GPL 3 license. Ghidra executes these programs as needed
and parses the output to get the desired results. There is a licenses directory
under the GPL directory that has the GPL license files.
Consistent with the inbound=outbound model, contributions to any module must be
made available, by the contributor, under the applicable license(s). Please read
the Legal section of the CONTRIBUTING.md guide.
================================================
FILE: pypcode/printing.py
================================================
from __future__ import annotations
from .pypcode_native import ( # pylint:disable=no-name-in-module
Disassembly,
Instruction,
OpCode,
PcodeOp,
Translation,
Varnode,
)
class OpFormat:
"""
General op pretty-printer.
"""
@staticmethod
def fmt_vn(vn: Varnode) -> str:
if vn.space.name == "const":
return "%#x" % vn.offset
elif vn.space.name == "register":
name = vn.getRegisterName()
if name:
return name
return f"{vn.space.name}[{vn.offset:x}:{vn.size:d}]"
def fmt(self, op: PcodeOp) -> str:
return f'{op.opcode.__name__} {", ".join(self.fmt_vn(i) for i in op.inputs)}'
class OpFormatUnary(OpFormat):
"""
General unary op pretty-printer.
"""
__slots__ = ("operator",)
def __init__(self, operator: str):
super().__init__()
self.operator = operator
def fmt(self, op: PcodeOp) -> str:
return f"{self.operator}{self.fmt_vn(op.inputs[0])}"
class OpFormatBinary(OpFormat):
"""
General binary op pretty-printer.
"""
__slots__ = ("operator",)
def __init__(self, operator: str):
super().__init__()
self.operator = operator
def fmt(self, op: PcodeOp) -> str:
return f"{self.fmt_vn(op.inputs[0])} {self.operator} {self.fmt_vn(op.inputs[1])}"
class OpFormatFunc(OpFormat):
"""
Function-call style op pretty-printer.
"""
__slots__ = ("operator",)
def __init__(self, operator: str):
super().__init__()
self.operator = operator
def fmt(self, op: PcodeOp) -> str:
return f'{self.operator}({", ".join(self.fmt_vn(i) for i in op.inputs)})'
class OpFormatSpecial(OpFormat):
"""
Specialized op pretty-printers.
"""
def fmt_BRANCH(self, op: PcodeOp) -> str:
return f"goto {self.fmt_vn(op.inputs[0])}"
def fmt_BRANCHIND(self, op: PcodeOp) -> str:
return f"goto [{self.fmt_vn(op.inputs[0])}]"
def fmt_CALL(self, op: PcodeOp) -> str:
return f"call {self.fmt_vn(op.inputs[0])}"
def fmt_CALLIND(self, op: PcodeOp) -> str:
return f"call [{self.fmt_vn(op.inputs[0])}]"
def fmt_CALLOTHER(self, op: PcodeOp) -> str:
return f'{op.inputs[0].getUserDefinedOpName()}({", ".join(self.fmt_vn(i) for i in op.inputs[1:])})'
def fmt_CBRANCH(self, op: PcodeOp) -> str:
return f"if ({self.fmt_vn(op.inputs[1])}) goto {self.fmt_vn(op.inputs[0])}"
def fmt_LOAD(self, op: PcodeOp) -> str:
return f"*[{op.inputs[0].getSpaceFromConst().name}]{self.fmt_vn(op.inputs[1])}"
def fmt_RETURN(self, op: PcodeOp) -> str:
return f"return {self.fmt_vn(op.inputs[0])}"
def fmt_STORE(self, op: PcodeOp) -> str:
return f"*[{op.inputs[0].getSpaceFromConst().name}]{self.fmt_vn(op.inputs[1])} = {self.fmt_vn(op.inputs[2])}"
def fmt(self, op: PcodeOp) -> str:
return {
OpCode.BRANCH: self.fmt_BRANCH,
OpCode.BRANCHIND: self.fmt_BRANCHIND,
OpCode.CALL: self.fmt_CALL,
OpCode.CALLIND: self.fmt_CALLIND,
OpCode.CALLOTHER: self.fmt_CALLOTHER,
OpCode.CBRANCH: self.fmt_CBRANCH,
OpCode.LOAD: self.fmt_LOAD,
OpCode.RETURN: self.fmt_RETURN,
OpCode.STORE: self.fmt_STORE,
}.get(op.opcode, super().fmt)(op)
class PcodePrettyPrinter:
"""
P-code pretty-printer.
"""
DEFAULT_OP_FORMAT = OpFormat()
OP_FORMATS = {
OpCode.BOOL_AND: OpFormatBinary("&&"),
OpCode.BOOL_NEGATE: OpFormatUnary("!"),
OpCode.BOOL_OR: OpFormatBinary("||"),
OpCode.BOOL_XOR: OpFormatBinary("^^"),
OpCode.BRANCH: OpFormatSpecial(),
OpCode.BRANCHIND: OpFormatSpecial(),
OpCode.CALL: OpFormatSpecial(),
OpCode.CALLIND: OpFormatSpecial(),
OpCode.CALLOTHER: OpFormatSpecial(),
OpCode.CBRANCH: OpFormatSpecial(),
OpCode.COPY: OpFormatUnary(""),
OpCode.CPOOLREF: OpFormatFunc("cpool"),
OpCode.FLOAT_ABS: OpFormatFunc("abs"),
OpCode.FLOAT_ADD: OpFormatBinary("f+"),
OpCode.FLOAT_CEIL: OpFormatFunc("ceil"),
OpCode.FLOAT_DIV: OpFormatBinary("f/"),
OpCode.FLOAT_EQUAL: OpFormatBinary("f=="),
OpCode.FLOAT_FLOAT2FLOAT: OpFormatFunc("float2float"),
OpCode.FLOAT_FLOOR: OpFormatFunc("floor"),
OpCode.FLOAT_INT2FLOAT: OpFormatFunc("int2float"),
OpCode.FLOAT_LESS: OpFormatBinary("f<"),
OpCode.FLOAT_LESSEQUAL: OpFormatBinary("f<="),
OpCode.FLOAT_MULT: OpFormatBinary("f*"),
OpCode.FLOAT_NAN: OpFormatFunc("nan"),
OpCode.FLOAT_NEG: OpFormatUnary("f- "),
OpCode.FLOAT_NOTEQUAL: OpFormatBinary("f!="),
OpCode.FLOAT_ROUND: OpFormatFunc("round"),
OpCode.FLOAT_SQRT: OpFormatFunc("sqrt"),
OpCode.FLOAT_SUB: OpFormatBinary("f-"),
OpCode.FLOAT_TRUNC: OpFormatFunc("trunc"),
OpCode.INT_2COMP: OpFormatUnary("-"),
OpCode.INT_ADD: OpFormatBinary("+"),
OpCode.INT_AND: OpFormatBinary("&"),
OpCode.INT_CARRY: OpFormatFunc("carry"),
OpCode.INT_DIV: OpFormatBinary("/"),
OpCode.INT_EQUAL: OpFormatBinary("=="),
OpCode.INT_LEFT: OpFormatBinary("<<"),
OpCode.INT_LESS: OpFormatBinary("<"),
OpCode.INT_LESSEQUAL: OpFormatBinary("<="),
OpCode.INT_MULT: OpFormatBinary("*"),
OpCode.INT_NEGATE: OpFormatUnary("~"),
OpCode.INT_NOTEQUAL: OpFormatBinary("!="),
OpCode.INT_OR: OpFormatBinary("|"),
OpCode.INT_REM: OpFormatBinary("%"),
OpCode.INT_RIGHT: OpFormatBinary(">>"),
OpCode.INT_SBORROW: OpFormatFunc("sborrow"),
OpCode.INT_SCARRY: OpFormatFunc("scarry"),
OpCode.INT_SDIV: OpFormatBinary("s/"),
OpCode.INT_SEXT: OpFormatFunc("sext"),
OpCode.INT_SLESS: OpFormatBinary("s<"),
OpCode.INT_SLESSEQUAL: OpFormatBinary("s<="),
OpCode.INT_SREM: OpFormatBinary("s%"),
OpCode.INT_SRIGHT: OpFormatBinary("s>>"),
OpCode.INT_SUB: OpFormatBinary("-"),
OpCode.INT_XOR: OpFormatBinary("^"),
OpCode.INT_ZEXT: OpFormatFunc("zext"),
OpCode.LOAD: OpFormatSpecial(),
OpCode.NEW: OpFormatFunc("newobject"),
OpCode.POPCOUNT: OpFormatFunc("popcount"),
OpCode.LZCOUNT: OpFormatFunc("lzcount"),
OpCode.RETURN: OpFormatSpecial(),
OpCode.STORE: OpFormatSpecial(),
}
@staticmethod
def fmt_op(op: PcodeOp) -> str:
fmt = PcodePrettyPrinter.OP_FORMATS.get(op.opcode, PcodePrettyPrinter.DEFAULT_OP_FORMAT)
return (f"{fmt.fmt_vn(op.output)} = " if op.output else "") + fmt.fmt(op)
@staticmethod
def fmt_translation(tx: Translation) -> str:
return "\n".join(PcodePrettyPrinter.fmt_op(op) for op in tx.ops)
def fmt_instruction(insn: Instruction) -> str:
return f"{insn.addr.offset:#x}/{insn.length}: {insn.mnem} {insn.body}"
def fmt_disassembly(dx: Disassembly) -> str:
return "\n".join(fmt_instruction(insn) for insn in dx.instructions)
# Monkey patch print handlers
Disassembly.__str__ = fmt_disassembly # type: ignore[assignment,method-assign]
Instruction.__str__ = fmt_instruction # type: ignore[assignment,method-assign]
PcodeOp.__str__ = PcodePrettyPrinter.fmt_op # type: ignore[assignment,method-assign]
Translation.__str__ = PcodePrettyPrinter.fmt_translation # type: ignore[assignment,method-assign]
Varnode.__str__ = OpFormat.fmt_vn # type: ignore[assignment,method-assign]
================================================
FILE: pypcode/processors/6502/data/languages/6502.cspec
================================================
<?xml version="1.0" encoding="UTF-8"?>
<compiler_spec>
<global>
<range space="RAM"/>
</global>
<stackpointer register="SP" space="RAM" growth="negative"/>
<returnaddress>
<varnode space="stack" offset="1" size="2"/>
</returnaddress>
<default_proto>
<prototype name="__stdcall" extrapop="2" stackshift="2" strategy="register">
<input>
<pentry minsize="1" maxsize="1">
<register name="A"/>
</pentry>
<pentry minsize="1" maxsize="1">
<register name="X"/>
</pentry>
<pentry minsize="1" maxsize="1">
<register name="Y"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="1">
<register name="A"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
</unaffected>
</prototype>
</default_proto>
</compiler_spec>
================================================
FILE: pypcode/processors/6502/data/languages/6502.ldefs
================================================
<?xml version="1.0" encoding="UTF-8"?>
<language_definitions>
<language processor="6502"
endian="little"
size="16"
variant="default"
version="1.0"
slafile="6502.sla"
processorspec="6502.pspec"
manualindexfile="../manuals/6502.idx"
id="6502:LE:16:default">
<description>6502 Microcontroller Family</description>
<compiler name="default" spec="6502.cspec" id="default"/>
<external_name tool="IDA-PRO" name="m6502"/>
</language>
<language processor="65C02"
endian="little"
size="16"
variant="default"
version="1.0"
slafile="65c02.sla"
processorspec="6502.pspec"
manualindexfile="../manuals/65c02.idx"
id="65C02:LE:16:default">
<description>65C02 Microcontroller Family</description>
<compiler name="default" spec="6502.cspec" id="default"/>
<external_name tool="IDA-PRO" name="m65c02"/>
</language>
</language_definitions>
================================================
FILE: pypcode/processors/6502/data/languages/6502.pspec
================================================
<?xml version="1.0" encoding="UTF-8"?>
<processor_spec>
<programcounter register="PC"/>
<default_symbols>
<symbol name="NMI" address="FFFA" entry="true" type="code_ptr"/>
<symbol name="RES" address="FFFC" entry="true" type="code_ptr"/>
<symbol name="IRQ" address="FFFE" entry="true" type="code_ptr"/>
</default_symbols>
<default_memory_blocks>
<memory_block name="ZERO_PAGE" start_address="0x0000" length="0x0100" initialized="false"/>
<memory_block name="STACK" start_address="0x0100" length="0x0100" initialized="false"/>
</default_memory_blocks>
</processor_spec>
================================================
FILE: pypcode/processors/6502/data/languages/6502.slaspec
================================================
# sleigh specification file for MOS 6502
define endian=little;
define alignment=1;
define space RAM type=ram_space size=2 default;
define space register type=register_space size=1;
define register offset=0x00 size=1 [ A X Y P ];
define register offset=0x20 size=2 [ PC SP ];
define register offset=0x20 size=1 [ PCL PCH S SH ];
define register offset=0x30 size=1 [ N V B D I Z C ]; # status bits
#TOKENS
define token opbyte (8)
op = (0,7)
aaa = (5,7)
bbb = (2,4)
cc = (0,1)
;
define token data8 (8)
imm8 = (0,7)
rel = (0,7) signed
;
define token data (16)
imm16 = (0,15)
;
macro popSR() {
SP = SP + 1;
local ccr = *:1 SP;
N = ccr[7,1];
V = ccr[6,1];
B = ccr[4,1];
D = ccr[3,1];
I = ccr[2,1];
Z = ccr[1,1];
C = ccr[0,1];
}
macro pushSR() {
local ccr:1 = 0xff;
ccr[7,1] = N;
ccr[6,1] = V;
ccr[4,1] = B;
ccr[3,1] = D;
ccr[2,1] = I;
ccr[1,1] = Z;
ccr[0,1] = C;
*:1 (SP) = ccr;
SP = SP -1;
}
macro resultFlags(value) {
Z = (value == 0);
N = (value s< 0);
}
macro subtraction_flags1(register, operand, result) {
local complement_register = ~register;
V = ( ((register & ~operand & ~result) | (complement_register & operand & result)) & 0b10000000 ) != 0;
N = (result s< 0);
Z = (result == 0);
C = ( ((complement_register & operand) | (operand & result) | (result & complement_register)) & 0b10000000 ) != 0;
}
################################################################
# Pseudo Instructions
################################################################
define pcodeop readIRQ;
################################################################
REL: reloc is rel [ reloc = inst_next + rel; ] { export *:2 reloc; }
# Immediate
OP1: "#"imm8 is bbb=2; imm8 { tmp:1 = imm8; export tmp; }
# Zero Page
OP1: imm8 is bbb=1; imm8 { export *:1 imm8; }
# Zero Page Indexed X
OP1: imm8,X is bbb=5 & X; imm8 { tmp:2 = zext(imm8 + X); export *:1 tmp; }
# Absolute
OP1: imm16 is bbb=3; imm16 { export *:1 imm16; }
# Absolute Indexed X
OP1: imm16,X is bbb=7 & X; imm16 { tmp:2 = imm16 + zext(X); export *:1 tmp; }
# Absolute Indexed Y
OP1: imm16,Y is bbb=6 & Y; imm16 { tmp:2 = imm16 + zext(Y); export *:1 tmp; }
# Indirect X
OP1: (imm8,X) is bbb=0 & X; imm8 { addr:2 = zext(imm8 + X); tmp:2 = *:2 addr; export *:1 tmp; }
# Indirect Y
OP1: (imm8),Y is bbb=4 & Y; imm8 { addr:2 = imm8; tmp:2 = *:2 addr; tmp = tmp + zext(Y); export *:1 tmp; }
# Immediate
OP2: "#"imm8 is bbb=0; imm8 { tmp:1 = imm8; export tmp; }
# Zero Page
OP2: imm8 is bbb=1; imm8 { export *:1 imm8; }
OP2: A is bbb=2 & A { export A; }
# Absolute
OP2: imm16 is bbb=3; imm16 { export *:1 imm16; }
# Zero Page Indexed X
OP2: imm8,X is bbb=5 & X; imm8 { tmp:2 = zext(imm8 + X); export *:1 tmp; }
# Absolute Indexed X
OP2: imm16,X is bbb=7 & X; imm16 { tmp:2 = imm16 + zext(X); export *:1 tmp; }
OP2ST: OP2 is OP2 { export OP2; }
OP2ST: imm8,Y is bbb=5 & Y; imm8 { tmp:2 = zext(imm8 + Y); export *:1 tmp; }
OP2LD: OP2 is OP2 { export OP2; }
OP2LD: imm8,Y is bbb=5 & Y; imm8 { tmp:2 = zext(imm8 + Y); export *:1 tmp; }
OP2LD: imm16,Y is bbb=7 & Y; imm16 { tmp:2 = imm16 + zext(Y); export *:1 tmp; }
ADDR8: imm8 is imm8 { export *:1 imm8; }
ADDR16: imm16 is imm16 { export *:1 imm16; }
ADDRI: (imm16) is imm16 { tmp:2 = imm16; export *:2 tmp; }
# Instructions
:ADC OP1 is (cc=1 & aaa=3) ... & OP1
{
local op1 = OP1;
local tmpC = C;
C = carry(A, op1);
A = A + op1 + tmpC;
resultFlags(A);
V = C;
}
:AND OP1 is (cc=1 & aaa=1) ... & OP1
{
A = A & OP1;
resultFlags(A);
}
:ASL OP2 is (op=0x06 | op=0x0A | op=0x0E | op=0x16 | op=0x1E) ... & OP2
{
local tmp = OP2;
C = tmp >> 7;
tmp = tmp << 1;
OP2 = tmp;
resultFlags(tmp);
}
:BCC REL is op=0x90; REL
{
if (C == 0) goto REL;
}
:BCS REL is op=0xB0; REL
{
if (C) goto REL;
}
:BEQ REL is op=0xF0; REL
{
if (Z) goto REL;
}
:BIT OP2 is (op=0x24 | op=0x2C) ... & OP2
{
N = (OP2 & 0x80) == 0x80;
V = (OP2 & 0x40) == 0x40;
local value = A & OP2;
Z = (value == 0);
}
:BMI REL is op=0x30; REL
{
if (N) goto REL;
}
:BNE REL is op=0xD0; REL
{
if (Z == 0) goto REL;
}
:BPL REL is op=0x10; REL
{
if (N == 0) goto REL;
}
:BRK is op=0x00
{
*:2 (SP - 1) = inst_next;
SP = SP - 2;
B = 1;
pushSR();
I = 1;
local target:2 = 0xFFFE;
goto [*:2 target];
}
:BVC REL is op=0x50; REL
{
if (V == 0) goto REL;
}
:BVS REL is op=0x70; REL
{
if (V) goto REL;
}
:CLC is op=0x18
{
C = 0;
}
:CLD is op=0xD8
{
D = 0;
}
:CLI is op=0x58
{
I = 0;
}
:CLV is op=0xB8
{
V = 0;
}
:CMP OP1 is (cc=1 & aaa=6) ... & OP1
{
local op1 = OP1;
local tmp = A - op1;
resultFlags(tmp);
C = (A >= op1);
}
:CPX OP2 is (op=0xE0 | op=0xE4 | op=0xEC) ... & OP2
{
local op1 = OP2;
local tmp = X - op1;
resultFlags(tmp);
C = (X >= op1);
}
:CPY OP2 is (op=0xC0 | op=0xC4 | op=0xCC) ... & OP2
{
local op1 = OP2;
local tmp = Y - op1;
resultFlags(tmp);
C = (Y >= op1);
}
:DEC OP2 is (op=0xC6 | op=0xCE | op=0xD6 | op=0xDE) ... & OP2
{
local tmp = OP2 - 1;
OP2 = tmp;
resultFlags(tmp);
}
:DEX is op=0xCA
{
X = X - 1;
resultFlags(X);
}
:DEY is op=0x88
{
Y = Y -1;
resultFlags(Y);
}
:EOR OP1 is (cc=1 & aaa=2) ... & OP1
{
local op1 = OP1;
A = A ^ op1;
resultFlags(A);
}
:INC OP2 is (op=0xE6 | op=0xEE | op=0xF6 | op=0xFE) ... & OP2
{
local tmp = OP2 + 1;
OP2 = tmp;
resultFlags(tmp);
}
:INY is op=0xC8
{
Y = Y + 1;
resultFlags(Y);
}
:INX is op=0xE8
{
X = X + 1;
resultFlags(X);
}
:JMP ADDR16 is (op=0x4C); ADDR16
{
goto ADDR16;
}
:JMP ADDRI is (op=0x6c); ADDRI
{
goto [ADDRI];
}
:JSR ADDR16 is op=0x20; ADDR16
{
*:2 (SP-1) = inst_next;
SP=SP-2;
call ADDR16;
}
:LDA OP1 is (cc=1 & aaa=5) ... & OP1
{
A = OP1;
resultFlags(A);
}
:LDY OP2 is (op=0xA0 | op=0xA4 | op=0xAC | op=0xB4 | op=0xBC) ... & OP2
{
Y = OP2;
resultFlags(Y);
}
:LDX OP2LD is (op=0xA2 | op=0xA6 | op=0xAE | op=0xB6 | op=0xBE) ... & OP2LD
{
X = OP2LD;
resultFlags(X);
}
:LSR OP2 is (op=0x46 | op=0x4A | op=0x4E | op=0x56 | op=0x5E) ... & OP2
{
local tmp = OP2;
C = tmp & 1;
tmp = tmp >> 1;
OP2 = tmp;
Z = (tmp == 0);
N = 0;
}
:NOP is op=0xEA
{
}
:ORA OP1 is (cc=1 & aaa=0) ... & OP1
{
A = A | OP1;
resultFlags(A);
}
:PHP is op=0x8
{
pushSR();
}
:PLP is op=0x28
{
popSR();
}
:PHA is op=0x48
{
*:1 (SP) = A;
SP = SP - 1;
}
:PLA is op=0x68
{
SP = SP + 1;
A = *:1 (SP);
resultFlags(A);
}
:ROL OP2 is (op=0x26 | op=0x2A | op=0x2E | op=0x36 | op=0x3E) ... & OP2
{
local tmpC = C;
local op2 = OP2;
C = op2 >> 7;
local result = op2 << 1;
result = result | tmpC;
OP2 = result;
resultFlags(result);
}
:ROR OP2 is (op=0x66 | op=0x6A | op=0x6E | op=0x76 | op=0x7E) ... & OP2
{
local tmpC = C << 7;
local tmp = OP2;
C = tmp & 1;
tmp = tmp >> 1;
tmp = tmp | tmpC;
OP2 = tmp;
resultFlags(tmp);
}
:RTI is op=0x40
{
popSR();
SP = SP+1;
tmp:2 = *:2 SP;
SP = SP+1;
return [tmp];
}
:RTS is op=0x60
{
SP = SP+1;
tmp:2 = *:2 SP;
SP = SP+1;
return [tmp];
}
:SBC OP1 is (cc=1 & aaa=7) ... & OP1
{
local op1 = OP1;
local result = A - op1 - !C;
subtraction_flags1(A, op1, result);
A = result;
# resultFlags(tmp);
# C = ((A <= op1) * C) | (A < op1);
# A = tmp;
}
:SEC is op=0x38
{
C = 1;
}
:SED is op=0xF8
{
D = 1;
}
:SEI is op=0x78
{
I = 1;
}
:STA OP1 is (cc=1 & aaa=4) ... & OP1
{
OP1 = A;
}
:STX OP2ST is (op=0x86 | op=0x8E | op=0x96) ... & OP2ST
{
OP2ST = X;
}
:STY OP2 is (op=0x84 | op=0x8C | op=0x94) ... & OP2
{
OP2 = Y;
}
:TAX is op=0xAA
{
X = A;
resultFlags(X);
}
:TAY is op=0xA8
{
Y = A;
resultFlags(Y);
}
:TSX is op=0xBA
{
X = S;
resultFlags(X);
}
:TXA is op=0x8A
{
A = X;
resultFlags(A);
}
:TXS is op=0x9A
{
S = X;
}
:TYA is op=0x98
{
A = Y;
resultFlags(A);
}
================================================
FILE: pypcode/processors/6502/data/languages/65c02.slaspec
================================================
@include "6502.slaspec"
define token bitopbyte (8)
bitop = (0,7)
action = (7,7)
bitindex = (4,6) dec
optype = (0,3)
;
define token testopbyte (8)
top = (0, 7)
taaa = (5, 7)
td = (4, 4)
tbb = (2, 3)
tcc = (0, 1)
;
################################################################
# Zero Page Indirect
ZIOP: (imm8) is bbb=4; imm8 { addr:2 = imm8; tmp:2 = *:2 addr; export *:1 tmp; }
OPTB: imm8 is tbb=1; imm8 { export *:1 imm8; }
OPTB: imm16 is tbb=3; imm16 { export *:1 imm16; }
# Absolute Indexed Indirect
ADDRIX: (imm16,X) is X; imm16 { addr:2 = imm16 + zext(X); tmp:2 = *:2 addr; export tmp; }
# Instructions
:ADC ZIOP is (cc=2 & aaa=3) ... & ZIOP
{
local op1 = ZIOP;
local tmpC = C;
C = carry(A, op1);
A = A + op1 + tmpC;
resultFlags(A);
V = C;
}
:AND ZIOP is (cc=2 & aaa=1) ... & ZIOP
{
A = A & ZIOP;
resultFlags(A);
}
:BBR "#"bitindex, imm8, REL is (action=0 & optype=0xF) & bitindex ; imm8 ; REL {
local ptr:2 = imm8;
local value:1 = *:1 ptr;
local jump = (value & (1 << bitindex)) == 0;
if (jump) goto REL;
}
:BBS "#"bitindex, imm8, REL is (action=1 & optype=0xF) & bitindex ; imm8 ; REL {
local ptr:2 = imm8;
local value:1 = *:1 ptr;
local jump = (value & (1 << bitindex)) != 0;
if (jump) goto REL;
}
:BIT "#"imm8 is op=0x89; imm8
{
local value:1 = imm8;
N = (value & 0x80) == 0x80;
V = (value & 0x40) == 0x40;
value = A & value;
Z = (value == 0);
}
:BIT OP2 is (op=0x34 | op=0x3C) ... & OP2
{
N = (OP2 & 0x80) == 0x80;
V = (OP2 & 0x40) == 0x40;
local value = A & OP2;
Z = (value == 0);
}
:BRA REL is op=0x80; REL
{
goto REL;
}
:CMP ZIOP is (cc=2 & aaa=6) ... & ZIOP
{
local op1 = ZIOP;
local tmp = A - op1;
resultFlags(tmp);
C = (A >= op1);
}
:DEC A is op=0x3A & A
{
local tmp = A - 1;
A = tmp;
resultFlags(tmp);
}
:EOR ZIOP is (cc=2 & aaa=2) ... & ZIOP
{
local op1 = ZIOP;
A = A ^ op1;
resultFlags(A);
}
:INC A is op=0x1A & A
{
A = A + 1;
resultFlags(A);
}
:JMP ADDRIX is (op=0x7C); ADDRIX
{
goto [ADDRIX];
}
:LDA ZIOP is (cc=2 & aaa=5) ... & ZIOP
{
A = ZIOP;
resultFlags(A);
}
:ORA ZIOP is (cc=2 & aaa=0) ... & ZIOP
{
A = A | ZIOP;
resultFlags(A);
}
:PHX is op=0xDA
{
*:1 (SP) = X;
SP = SP - 1;
}
:PLX is op=0xFA
{
SP = SP + 1;
X = *:1 (SP);
resultFlags(X);
}
:PHY is op=0x5A
{
*:1 (SP) = Y;
SP = SP - 1;
}
:PLY is op=0x7A
{
SP = SP + 1;
Y = *:1 (SP);
resultFlags(Y);
}
:RMB "#"bitindex, imm8 is (action=0 & optype=7) & bitindex ; imm8 {
local ptr:2 = imm8;
local value:1 = *:1 ptr;
value = value & ~(1 << bitindex);
*:1 ptr = value;
}
:SBC ZIOP is (cc=2 & aaa=7) ... & ZIOP
{
local op1 = ZIOP;
local result = A - op1 - !C;
subtraction_flags1(A, op1, result);
A = result;
}
:SMB "#"bitindex, imm8 is (action=1 & optype=7) & bitindex ; imm8 {
local ptr:2 = imm8;
local value:1 = *:1 ptr;
value = value | (1 << bitindex);
*:1 ptr = value;
}
:STA ZIOP is (cc=2 & aaa=4) ... & ZIOP
{
ZIOP = A;
}
:STZ imm8 is op=0x64 ; imm8
{
local tmp:2 = imm8;
*:1 tmp = 0;
}
:STZ imm8,X is op=0x74 & X ; imm8
{
local tmp:2 = zext(imm8 + X);
*:1 tmp = 0;
}
:STZ imm16 is op=0x9C ; imm16
{
local tmp:2 = imm16;
*:1 tmp = 0;
}
:STZ imm16,X is op=0x9E & X ; imm16
{
local tmp:2 = imm16 + zext(X);
*:1 tmp = 0;
}
:TRB OPTB is (tcc=0 & taaa=0 & td=1) ... & OPTB
{
local op1 = OPTB;
local result = (~A) & op1;
OPTB = result;
Z = result == 0;
}
:TSB OPTB is (tcc=0 & taaa=0 & td=0) ... & OPTB
{
local op1 = OPTB;
local result = A | op1;
OPTB = result;
Z = result == 0;
}
================================================
FILE: pypcode/processors/6502/data/manuals/6502.idx
================================================
@mcs6500_family_programming_manual.pdf [MCS 6500 Microcomputer Family Programming Manual, January 1976]
ADC, 205
AND, 205
ASL, 206
BCC, 206
BCS, 207
BEQ, 207
BIT, 208
BMI, 208
BNE, 209
BPL, 209
BRK, 210
BVC, 210
BVS, 211
CLC, 211
CLD, 212
CLI, 212
CLV, 213
CMP, 213
CPX, 214
CPY, 214
DEC, 215
DEX, 215
DEY, 216
EOR, 216
INC, 217
INX, 217
INY, 218
JMP, 218
JSR, 219
LDA, 219
LDX, 220
LDY, 220
LSR, 221
NOP, 221
ORA, 222
PHA, 222
PHP, 223
PLA, 223
PLP, 224
ROL, 224
ROR, 225
RTI, 225
RTS, 225
SBC, 226
SEC, 226
SED, 227
SEI, 227
STA, 228
STX, 228
STY, 229
TAX, 229
TAY, 230
TSX, 231
TXA, 231
TXS, 231
TYA, 230
================================================
FILE: pypcode/processors/6502/data/manuals/65c02.idx
================================================
@wdc_65816_programming_manual.pdf [Programming the 65816 - Including the 6502, 65C02 and 65802, 2007]
ADC, 327
AND, 328
ASL, 329
BBR, 457
BBS, 458
BCC, 330
BCS, 331
BEQ, 332
BIT, 333
BMI, 334
BNE, 335
BPL, 336
BRA, 337
BRK, 338
BVC, 341
BVS, 342
CLC, 343
CLD, 344
CLI, 345
CLV, 346
CMP, 347
CPX, 350
CPY, 351
DEC, 352
DEX, 353
DEY, 354
EOR, 355
INC, 357
INX, 358
INY, 359
JMP, 360
JSR, 362
LDA, 363
LDX, 364
LDY, 365
LSR, 366
NOP, 369
ORA, 370
PHA, 375
PHP, 379
PHX, 380
PHY, 381
PLA, 382
PLP, 385
PLX, 386
PLY, 387
RMB, 459
ROL, 389
ROR, 390
RTI, 391
RTS, 393
SBC, 395
SEC, 397
SED, 398
SEI, 399
SMB, 460
STA, 401
STX, 403
STY, 404
STZ, 405
TAX, 406
TAY, 407
TRB, 411
TSB, 412
TSX, 414
TXA, 415
TXS, 416
TYA, 418
================================================
FILE: pypcode/processors/68000/data/languages/68000.cspec
================================================
<?xml version="1.0" encoding="UTF-8"?>
<compiler_spec>
<data_organization>
<absolute_max_alignment value="0" />
<machine_alignment value="8" />
<default_alignment value="1" />
<default_pointer_alignment value="4" />
<pointer_size value="4" />
<wchar_size value="4" />
<short_size value="2" />
<integer_size value="4" />
<long_size value="4" />
<long_long_size value="8" />
<float_size value="4" />
<double_size value="8" />
<long_double_size value="10" /> <!-- aligned-length=12 -->
<size_alignment_map>
<entry size="1" alignment="1" />
<entry size="2" alignment="2" />
<entry size="4" alignment="4" />
<entry size="8" alignment="4" />
</size_alignment_map>
</data_organization>
<global>
<range space="ram"/>
</global>
<stackpointer register="SP" space="ram"/>
<default_proto>
<prototype name="__stdcall" extrapop="4" stackshift="4">
<input>
<pentry minsize="1" maxsize="500" align="4">
<addr offset="4" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="4" maxsize="10" metatype="float" >
<register name="FP0"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="D0" />
</pentry>
<pentry minsize="5" maxsize="8">
<addr space="join" piece1="D0" piece2="D1"/>
</pentry>
</output>
<unaffected>
<register name="D2"/>
<register name="D3"/>
<register name="D4"/>
<register name="D5"/>
<register name="D6"/>
<register name="D7"/>
<register name="A2"/>
<register name="A3"/>
<register name="A4"/>
<register name="A5"/>
<register name="A6"/>
<register name="SP"/>
<register name="FP2"/>
<register name="FP3"/>
<register name="FP4"/>
<register name="FP5"/>
<register name="FP6"/>
<register name="FP7"/>
</unaffected>
<killedbycall>
<register name="D0"/>
<register name="D1"/>
<register name="A0"/>
<register name="A1"/>
</killedbycall>
</prototype>
</default_proto>
</compiler_spec>
================================================
FILE: pypcode/processors/68000/data/languages/68000.dwarf
================================================
<dwarf>
<register_mappings>
<register_mapping dwarf="0" ghidra="D0" auto_count="8"/> <!-- D0..D7 -->
<register_mapping dwarf="8" ghidra="A0" auto_count="7"/> <!-- A0..A6 -->
<register_mapping dwarf="15" ghidra="SP" stackpointer="true"/>
<register_mapping dwarf="16" ghidra="FP0" auto_count="8"/> <!-- FP0..FP7 -->
</register_mappings>
</dwarf>
================================================
FILE: pypcode/processors/68000/data/languages/68000.ldefs
================================================
<?xml version="1.0" encoding="UTF-8"?>
<language_definitions>
<language processor="68000"
endian="big"
size="32"
variant="default"
version="1.1"
slafile="68040.sla"
processorspec="68000.pspec"
manualindexfile="../manuals/68000.idx"
id="68000:BE:32:default">
<description>Motorola 32-bit 68040</description>
<compiler name="default" spec="68000.cspec" id="default"/>
<external_name tool="gnu" name="m68k"/>
<external_name tool="IDA-PRO" name="68000"/>
<external_name tool="IDA-PRO" name="68040"/>
<external_name tool="IDA-PRO" name="68K"/>
<external_name tool="DWARF.register.mapping.file" name="68000.dwarf"/>
<external_name tool="qemu" name="qemu-m68k"/>
<external_name tool="qemu_system" name="qemu-system-m68k"/>
</language>
<language processor="68000"
endian="big"
size="32"
variant="MC68030"
version="1.1"
slafile="68030.sla"
processorspec="68000.pspec"
manualindexfile="../manuals/68000.idx"
id="68000:BE:32:MC68030">
<description>Motorola 32-bit 68030</description>
<compiler name="default" spec="68000.cspec" id="default"/>
<external_name tool="gnu" name="m68k:68030"/>
<external_name tool="IDA-PRO" name="68030"/>
<external_name tool="DWARF.register.mapping.file" name="68000.dwarf"/>
<external_name tool="qemu" name="qemu-m68k"/>
<external_name tool="qemu_system" name="qemu-system-m68k"/>
</language>
<language processor="68000"
endian="big"
size="32"
variant="MC68020"
version="1.1"
slafile="68020.sla"
processorspec="68000.pspec"
manualindexfile="../manuals/68000.idx"
id="68000:BE:32:MC68020">
<description>Motorola 32-bit 68020</description>
<compiler name="default" spec="68000.cspec" id="default"/>
<external_name tool="gnu" name="m68k:68020"/>
<external_name tool="IDA-PRO" name="68010"/>
<external_name tool="IDA-PRO" name="68020"/>
<external_name tool="IDA-PRO" name="68020EX"/>
<external_name tool="DWARF.register.mapping.file" name="68000.dwarf"/>
<external_name tool="qemu" name="qemu-m68k"/>
<external_name tool="qemu_system" name="qemu-system-m68k"/>
</language>
<language processor="68000"
endian="big"
size="32"
variant="Coldfire"
version="1.1"
slafile="coldfire.sla"
processorspec="68000.pspec"
manualindexfile="../manuals/68000.idx"
id="68000:BE:32:Coldfire">
<description>Motorola 32-bit Coldfire</description>
<compiler name="default" spec="68000.cspec" id="default"/>
<compiler name="register" spec="68000_register.cspec" id="register"/>
<external_name tool="IDA-PRO" name="colfire"/>
<external_name tool="DWARF.register.mapping.file" name="68000.dwarf"/>
<external_name tool="qemu" name="qemu-m68k"/>
<external_name tool="qemu_system" name="qemu-system-m68k"/>
</language>
</language_definitions>
================================================
FILE: pypcode/processors/68000/data/languages/68000.opinion
================================================
<opinions>
<constraint loader="Executable and Linking Format (ELF)" compilerSpecID="default">
<constraint primary="4" processor="68000" endian="big" size="32" />
</constraint>
<constraint loader="Preferred Executable Format (PEF)" compilerSpecID="default">
<constraint primary="m68k" processor="68000" endian="big" size="32" />
</constraint>
<constraint loader="Palm Pilot Program (Palm)" compilerSpecID="default">
<constraint primary="0" processor="68000" endian="big" size="32" />
</constraint>
<constraint loader="Assembler Output (AOUT)" compilerSpecID="default">
<constraint primary="1" processor="68000" endian="big" size="32" />
<constraint primary="2" processor="68000" endian="big" size="32" />
<constraint primary="200" processor="68000" endian="big" size="32" />
<constraint primary="300" processor="68000" endian="big" size="32" />
</constraint>
</opinions>
================================================
FILE: pypcode/processors/68000/data/languages/68000.pspec
================================================
<?xml version="1.0" encoding="UTF-8"?>
<processor_spec>
<properties>
<property key="emulateInstructionStateModifierClass" value="ghidra.program.emulation.m68kEmulateInstructionStateModifier"/>
<property key="assemblyRating:68000:BE:32:default" value="PLATINUM"/>
</properties>
<programcounter register="PC"/>
</processor_spec>
================================================
FILE: pypcode/processors/68000/data/languages/68000.sinc
================================================
# SLA specification for Motorola 68000 series
define endian=big;
define alignment=2;
define space ram type=ram_space size=4 default;
define space register type=register_space size=4;
define register offset=0 size=4 [ D0 D1 D2 D3 D4 D5 D6 D7 ]; # Data registers
define register offset=0 size=2 [ D0u D0w D1u D1w D2u D2w D3u D3w D4u D4w D5u D5w D6u D6w D7u D7w];
define register offset=0 size=1 [ _ _ _ D0b _ _ _ D1b _ _ _ D2b _ _ _ D3b _ _ _ D4b _ _ _ D5b _ _ _ D6b _ _ _ D7b ];
define register offset=0x20 size=4 [ A0 A1 A2 A3 A4 A5 A6 SP ]; # Address registers
define register offset=0x20 size=2 [ A0u A0w A1u A1w A2u A2w A3u A3w A4u A4w A5u A5w A6u A6w A7u A7w];
define register offset=0x20 size=1 [ _ _ _ A0b _ _ _ A1b _ _ _ A2b _ _ _ A3b _ _ _ A4b _ _ _ A5b _ _ _ A6b _ _ _ A7b ];
define register offset=0x40 size=1 [ TF SVF IPL XF NF ZF VF CF ]; # Condition flags
define register offset=0x50 size=4 PC; # Program counter register
define register offset=0xb0 size=4 [ FPCR FPSR FPIAR ];
define register offset=0xe0 size=8 [ CRP ];
define register offset=0x100 size=4 [ ISP MSP VBR CACR CAAR AC0 AC1 USP TT0 TT1 ];
define register offset=0x140 size=4 [ SFC DFC TC ITT0 ITT1 DTT0 DTT1 MMUSR URP SRP PCR CAC ];
define register offset=0x180 size=4 [ BUSCR MBB RAMBAR0 RAMBAR1 ];
define register offset=0x200 size=2 [ SR ACUSR ];
# NOTE that SR overlaps XF, ZF, VF, CF
# NOTE that A7 refers to USP, ISP, or MSP depending on privilege level
define register offset=0x300 size=4 [ glbdenom movemptr ];
define register offset=0x400 size=4 [ contextreg ];
@ifdef COLDFIRE
# TODO: add a pure MAC variant, for now, just do EMAC
define register offset=0x500 size=4 [ MACSR MASK ];
define register offset=0x600 size=4 [ EMACSR ACC0 ACC1 ACC2 ACC3 ACCext01 ACCext23 EMASK ];
@endif
# Floating point registers are 80 bits internally, but are 96 bits to/from memory.
# Note that 12-byte float needed to be added to FloatFormat.java
# Also note that the 96 bit format is not really IEEE, because it gets mapped to 80 bits.
define register offset=0x700 size=10 [ FP0 ];
define register offset=0x70a size=10 [ FP1 ];
define register offset=0x714 size=10 [ FP2 ];
define register offset=0x71e size=10 [ FP3 ];
define register offset=0x728 size=10 [ FP4 ];
define register offset=0x732 size=10 [ FP5 ];
define register offset=0x73c size=10 [ FP6 ];
define register offset=0x746 size=10 [ FP7 ];
#TODO: These mode constraints do not constrain the various mode=7 sub-modes identified by regan bits
@define MEM_ALTER_ADDR_MODES "(op4=1 | op5=1)" # Memory alterable addressing modes (All modes except mode=1 and mode=0)
@define DAT_ALTER_ADDR_MODES "(mode=0 | op4=1 | op5=1)" # Data alterable addressing modes (All modes except mode=1)
@define DAT_DIR_CTL_ADDR_MODES "(mode=0 | mode=2 | mode=5 | mode=6 | mode=7)" # Data direct and control addressing modes
@define CTL_ADDR_MODES "(mode=2 | mode=5 | mode=6 | mode=7)" # Control addressing modes
@define POSTINC_CTL_ADDR_MODES "(mode=2 | mode=3 | mode=5 | mode=6 | mode=7)" # Control addressing modes
@define PREDEC_CTL_ADDR_MODES "(mode=2 | mode=4 | mode=5 | mode=6 | mode=7)" # Control addressing modes
#TODO: These mode constraints do not constrain the various mode=7 sub-modes identified by regan bits
@define MEM_ALTER_ADDR_MODES2 "(op7=1 | op8=1)" # Memory alterable addressing modes (All modes except mode=1 and mode=0)
@define DAT_ALTER_ADDR_MODES2 "(mode2=0 | op7=1 | op8=1)" # Data alterable addressing modes (All modes except mode=1)
@define DAT_DIR_CTL_ADDR_MODES2 "(mode2=0 | mode2=2 | mode2=5 | mode2=6 | mode=7)" # Data direct and control addressing modes
@define CTL_ADDR_MODES2 "(mode2=2 | mode2=5 | mode2=6 | mode2=7)" # Control addressing modes
# Floating-point condition code bits within FPSR
@define N_FP "FPSR[27,1]"
@define Z_FP "FPSR[26,1]"
@define I_FP "FPSR[25,1]"
@define NAN_FP "FPSR[24,1]"
define token instr (16)
mode = (3,5)
mode2 = (6,8)
regdn = (0,2)
regdnw = (0,2)
regdnb = (0,2)
regan = (0,2)
reganw = (0,2)
reganb = (0,2)
rmbit = (3,3)
reg9dn = (9,11)
reg9dnw = (9,11)
reg9dnb = (9,11)
reg9an = (9,11)
copid = (9,11)
op = (12,15)
opbig = (8,15)
op01 = (0,1)
op02 = (0,2)
op03 = (0,3)
op08 = (0,8)
op015 = (0,15)
op34 = (3,4)
op35 = (3,5)
op37 = (3,7)
op38 = (3,8)
op45 = (4,5)
op48 = (4,8)
op69 = (6,9)
op68 = (6,8)
op67 = (6,7)
op1315 = (13,15)
op4 = (4,4)
op5 = (5,5)
op7 = (7,7)
op8 = (8,8)
op10 = (10,10)
op11 = (11,11)
quick = (9,11)
op811 = (8,11)
copcc1 = (0,5)
d8base = (0,7) signed
@ifdef COLDFIRE
reg03y = (0,3)
reg03ywu = (0,3)
reg03ywl = (0,3)
op47 = (4,7)
op611 = (6,11)
op6 = (6,6)
op0910 = (9,10)
acclsb = (7,7)
d911 = (9,11)
reg315 = (3, 15)
reg9dnu = (9,11)
reg9dnl = (9,11)
reg9anu = (9,11)
reg9anl = (9,11)
@endif
;
define token extword (16)
opx015 = (0,15)
opx1315= (13,15)
opx515 = (5,15)
da = (15,15)
regda = (12,15)
regxdn = (12,14)
regxdnw = (12,14)
regxan = (12,14)
regxanw = (12,14)
wl = (11,11)
mregn = (10,12)
rwx = (9,9)
scale = (9,10)
ext_911 = (9,11)
bigopx = (8,15)
fbit = (8,8)
regdu = (6,8)
regduw = (6,8)
regdub = (6,8)
fcmask = (5,7)
aregx = (5,7)
ext_35 = (3,5)
regdc = (0,2)
regdcw = (0,2)
regdcb = (0,2)
d8 = (0,7) signed
bs = (7,7)
IS = (6,6)
bdsize = (4,5)
iis = (0,2)
odsize = (0,1)
copcc2 = (0,5)
fc4 = (4,4)
fc3 = (3,3)
fc03 = (0,3)
fc02 = (0,2)
ctl = (0,11)
@ifdef COLDFIRE
sfact = (9,10)
accmsb = (4,4)
reg03yu = (0,3)
reg03yl = (0,3)
ereg03y = (0,3)
accw = (2,3)
reg12x = (12,15)
reg12xwu = (12,15)
reg12xwl = (12,15)
@endif
;
define token extword2 (16)
regda2 = (12,15)
ext2_911 = (9,11)
ext2_35 = (3,5)
regdu2 = (6,8)
regdu2w = (6,8)
regdc2 = (0,2)
regdc2w = (0,2)
;
define token fpword (16)
fop = (12,15)
fcopid = (9,11)
fword = (0,15)
fcnt = (0,2)
f1515 = (15,15)
f1415 = (14,15)
f1315 = (13,15)
f1015 = (10,15)
f0009 = (0,9)
f0008 = (0,8)
f0808 = (8,8)
f0810 = (8,10)
f0707 = (7,7)
f0609 = (6,9)
f0608 = (6,8)
f0615 = (6,15)
f0308 = (3,8)
f0306 = (3,6)
fmode = (0,2)
frm = (14,14)
f1313 = (13,13)
fsrc = (10,12) # attached to FP registers
f1012 = (10,12)
f10 = (10,10)
f11 = (11,11)
f12 = (12,12)
fdcos = (0,2) # attached to FP registers
fdsin = (7,9) # attached to FP registers
ffmt = (10,12)
fdst = (7,9) # attached to FP registers
fdr = (13,13)
fsize = (6,6)
fcode = (0,5)
fopmode = (0,6)
fkfactor = (0,6)
fkfacreg = (4,6)
fromoffset = (0,6)
flmode_t = (11,11)
flmode_m = (12,12)
fldynreg = (4,6)
freglist = (0,7)
frlist0 = (0,0)
frlist1 = (1,1)
frlist2 = (2,2)
frlist3 = (3,3)
frlist4 = (4,4)
frlist5 = (5,5)
frlist6 = (6,6)
frlist7 = (7,7)
;
define token disp16 (16) d16 = (0,15) signed;
define token disp32 (32) d32 = (0,31) signed;
define token disp64 (64)
signD = (63,63)
exponentD = (52,62)
mantissaD = (0,51)
d64 = (0,63) signed
;
define token disp96X_1 (32)
signX = (31,31)
exponentX = (16,30)
;
define token disp96X_2 (64)
expintbitX = (63,63)
mantissaX = (0,62)
;
define token bdisp16 (16) bd16 = (0,15) signed;
define token bdisp32 (32) bd32 = (0,31) signed;
define token odisp16 (16) od16 = (0,15) signed;
define token odisp32 (32) od32 = (0,31) signed;
define token fldparm (16)
fldpar=(0,15)
flddo=(11,11)
fldoffdat=(6,10)
fldoffreg=(6,8)
flddw=(5,5)
fldwddat=(0,4)
fldwdreg=(0,2)
f_reg=(12,14)
regdr=(0,2)
regdq=(12,14)
divsgn=(11,11)
divsz=(10,10)
mvm0 = (0,0) # Bits in the register list mask for movem
mvm1 = (1,1)
mvm2 = (2,2)
mvm3 = (3,3)
mvm4 = (4,4)
mvm5 = (5,5)
mvm6 = (6,6)
mvm7 = (7,7)
mvm8 = (8,8)
mvm9 = (9,9)
mvm10 = (10,10)
mvm11 = (11,11)
mvm12 = (12,12)
mvm13 = (13,13)
mvm14 = (14,14)
mvm15 = (15,15)
;
# Context bits for getting base register bits into the addressing mode
define context contextreg
eanum = (0,0) # Which effective address is this (the regf's or the regs's)
pcmode = (1,1) # is this a PC relative mode
regfan = (2,4) # saved base register for first effective address
regtfan = (2,4)
savmod1 = (5,7)
savmod2 = (8,10) # Mode for the second effective address
regsdn = (11,13)
regsdnw = (11,13)
regsdnb = (11,13)
regsan = (11,13)
regtsan = (11,13)
regsanw = (11,13)
regsanb = (11,13)
extGUARD = (14,14) # guard for saving off modes before starting instructions
;
attach variables [ regdn regxdn reg9dn regdr regdq regsdn regdu regdc regdu2 regdc2 ] [ D0 D1 D2 D3 D4 D5 D6 D7 ];
attach variables [ fldoffreg fldwdreg f_reg fcnt fkfacreg fldynreg ] [ D0 D1 D2 D3 D4 D5 D6 D7 ];
attach variables [ regdnw regxdnw reg9dnw regsdnw regduw regdcw regdu2w regdc2w ] [ D0w D1w D2w D3w D4w D5w D6w D7w ];
attach variables [ regdnb reg9dnb regsdnb regdub regdcb ] [ D0b D1b D2b D3b D4b D5b D6b D7b ];
attach variables [ regda regda2 ] [ D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 SP ];
attach variables [ regan regxan reg9an regfan regsan aregx ] [ A0 A1 A2 A3 A4 A5 A6 SP ];
attach variables [ reganw regxanw regsanw ] [ A0w A1w A2w A3w A4w A5w A6w A7w ];
attach variables [ reganb regsanb ] [ A0b A1b A2b A3b A4b A5b A6b A7b ];
attach variables [ fsrc fdst fdcos fdsin ] [ FP0 FP1 FP2 FP3 FP4 FP5 FP6 FP7 ];
@ifdef COLDFIRE
attach variables [ reg03y ereg03y reg12x ] [ D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 SP ];
attach variables [reg03ywu reg12xwu reg03yu ] [ D0u D1u D2u D3u D4u D5u D6u D7u A0u A1u A2u A3u A4u A5u A6u A7u ];
attach variables [reg03ywl reg12xwl reg03yl ] [ D0w D1w D2w D3w D4w D5w D6w D7w A0w A1w A2w A3w A4w A5w A6w A7w ];
attach variables [reg9dnu] [ D0u D1u D2u D3u D4u D5u D6u D7u ];
attach variables [reg9dnl] [ D0w D1w D2w D3w D4w D5w D6w D7w ];
attach variables [reg9anu] [ A0u A1u A2u A3u A4u A5u A6u A7u ];
attach variables [reg9anl] [ A0w A1w A2w A3w A4w A5w A6w A7w ];
attach variables [accw] [ACC0 ACC1 ACC2 ACC3];
attach values d911 [ -1 1 2 3 4 5 6 7 ];
@endif
attach values scale [ 1 2 4 8 ];
attach values quick [ 8 1 2 3 4 5 6 7 ];
define pcodeop kfactor;
define pcodeop ftrap;
define pcodeop __m68k_trap;
define pcodeop __m68k_trapv;
define pcodeop reset;
define pcodeop saveFPUStateFrame;
define pcodeop restoreFPUStateFrame;
define pcodeop invalidateCacheLines;
define pcodeop pushInvalidateCaches;
define pcodeop fetox;
define pcodeop fetoxm1;
define pcodeop fgetexp;
define pcodeop fgetman;
define pcodeop fint;
define pcodeop flog10;
define pcodeop flog2;
define pcodeop flogn;
define pcodeop flognp1;
define pcodeop fmod;
define pcodeop frem;
define pcodeop fscale;
define pcodeop fsgldiv;
define pcodeop ftentox;
define pcodeop ftwotox;
define pcodeop bcdAdjust;
define pcodeop sin;
define pcodeop cos;
define pcodeop tan;
define pcodeop asin;
define pcodeop acos;
define pcodeop atan;
define pcodeop sinh;
define pcodeop cosh;
define pcodeop tanh;
ea_index: regxan*scale is da=1 & wl=1 & regxan & scale { tmp:4 = regxan*scale; export tmp; }
ea_index: regxanw*scale is da=1 & wl=0 & regxanw & scale { tmp:4 = sext(regxanw)*scale; export tmp; }
ea_index: regxdn*scale is da=0 & wl=1 & regxdn & scale { tmp:4 = regxdn*scale; export tmp; }
ea_index: regxdnw*scale is da=0 & wl=0 & regxdnw & scale { tmp:4 = sext(regxdnw)*scale; export tmp; }
breg: regfan is eanum=0 & regfan { export regfan; }
breg: regsan is eanum=1 & regsan { export regsan; }
#breg: PC is pcmode=1 & eanum & PC { tmp:4 = inst_start; }
fl_breg: "-" is bs=1 { export 0:4; }
fl_breg: "ZPC" is bs=1 & pcmode=1 { export 0:4; }
fl_breg: breg is bs=0 & pcmode=0 & breg { export breg; }
fl_breg: PC is PC & bs=0 & pcmode=1 { tmp:4 = inst_start + 2; export tmp; }
# shift amount parameter
cntreg: reg9dn is reg9dn & op5=1 { local tmp = reg9dn & 63; export tmp; }
cntreg: "#"^quick is quick & op5=0 { export *[const]:4 quick; }
# Extension word forms of the effective address
# 8-bit displacement (brief extension)
extw: d8,breg,ea_index is breg; ea_index & d8 & fbit=0 { local tmp = breg+d8+ea_index; export tmp; }
extw: rela,PC,ea_index is pcmode=1 & PC; ea_index & d8 & fbit=0
[ rela = inst_start+d8+2; ]
{ tmp:4 = rela; tmp = tmp+ea_index; export tmp; }
# Base displacement (indexed)
extw: fl_breg,ea_index is ea_index & fl_breg & fbit=1 & bdsize=1 & IS=0 & iis=0 { local tmp = fl_breg+ea_index; export tmp; }
extw: bd16,fl_breg,ea_index is ea_index & fl_breg & fbit=1 & bdsize=2 & IS=0 & iis=0; bd16 { local tmp = fl_breg+ea_index+bd16; export tmp; }
extw: bd32,fl_breg,ea_index is ea_index & fl_breg & fbit=1 & bdsize=3 & IS=0 & iis=0; bd32 { local tmp = fl_breg+ea_index+bd32; export tmp; }
# Memory Indirect Postindexed Mode
extw: [fl_breg],ea_index is ea_index & fl_breg & fbit=1 & bdsize=1 & IS=0 & iis=1 { local tmp = *:4 fl_breg + ea_index; export tmp; }
extw: [bd16,fl_breg],ea_index is ea_index & fl_breg & fbit=1 & bdsize=2 & IS=0 & iis=1; bd16 { local tmp = *:4 (fl_breg+bd16) + ea_index; export tmp; }
extw: [bd32,fl_breg],ea_index is ea_index & fl_breg & fbit=1 & bdsize=3 & IS=0 & iis=1; bd32 { local tmp = *:4 (fl_breg+bd32) + ea_index; export tmp; }
extw: [fl_breg],ea_index,od16 is ea_index & fl_breg & fbit=1 & bdsize=1 & IS=0 & iis=2; od16 { local tmp = *:4 fl_breg + ea_index + od16; export tmp; }
extw: [bd16,fl_breg],ea_index,od16 is ea_index & fl_breg & fbit=1 & bdsize=2 & IS=0 & iis=2; bd16; od16 { local tmp = *:4 (fl_breg+bd16) + ea_index + od16; export tmp; }
extw: [bd32,fl_breg],ea_index,od16 is ea_index & fl_breg & fbit=1 & bdsize=3 & IS=0 & iis=2; bd32; od16 { local tmp = *:4 (fl_breg+bd32) + ea_index + od16; export tmp; }
extw: [fl_breg],ea_index,od32 is ea_index & fl_breg & fbit=1 & bdsize=1 & IS=0 & iis=3; od32 { local tmp = *:4 fl_breg + ea_index + od32; export tmp; }
extw: [bd16,fl_breg],ea_index,od32 is ea_index & fl_breg & fbit=1 & bdsize=2 & IS=0 & iis=3; bd16; od32 { local tmp = *:4 (fl_breg+bd16) + ea_index + od32; export tmp; }
extw: [bd32,fl_breg],ea_index,od32 is ea_index & fl_breg & fbit=1 & bdsize=3 & IS=0 & iis=3; bd32; od32 { local tmp = *:4 (fl_breg+bd32) + ea_index + od32; export tmp; }
# Memory Indirect Preindexed Mode
extw: [fl_breg,ea_index] is ea_index & fl_breg & fbit=1 & bdsize=1 & IS=0 & iis=5 { local tmp = *:4 (fl_breg+ea_index); export tmp; }
extw: [bd16,fl_breg,ea_index] is ea_index & fl_breg & fbit=1 & bdsize=2 & IS=0 & iis=5; bd16 { local tmp = *:4 (fl_breg+ea_index+bd16); export tmp; }
extw: [bd32,fl_breg,ea_index] is ea_index & fl_breg & fbit=1 & bdsize=3 & IS=0 & iis=5; bd32 { local tmp = *:4 (fl_breg+ea_index+bd32); export tmp; }
extw: [fl_breg,ea_index],od16 is ea_index & fl_breg & fbit=1 & bdsize=1 & IS=0 & iis=6; od16 { local tmp = *:4 (fl_breg+ea_index) + od16; export tmp; }
extw: [bd16,fl_breg,ea_index],od16 is ea_index & fl_breg & fbit=1 & bdsize=2 & IS=0 & iis=6; bd16; od16 { local tmp = *:4 (fl_breg+ea_index+bd16) + od16; export tmp; }
extw: [bd32,fl_breg,ea_index],od16 is ea_index & fl_breg & fbit=1 & bdsize=3 & IS=0 & iis=6; bd32; od16 { local tmp = *:4 (fl_breg+ea_index+bd32) + od16; export tmp; }
extw: [fl_breg,ea_index],od32 is ea_index & fl_breg & fbit=1 & bdsize=1 & IS=0 & iis=7; od32 { local tmp = *:4 (fl_breg+ea_index) + od32; export tmp; }
extw: [bd16,fl_breg,ea_index],od32 is ea_index & fl_breg & fbit=1 & bdsize=2 & IS=0 & iis=7; bd16; od32 { local tmp = *:4 (fl_breg+ea_index+bd16) + od32; export tmp; }
extw: [bd32,fl_breg,ea_index],od32 is ea_index & fl_breg & fbit=1 & bdsize=3 & IS=0 & iis=7; bd32; od32 { local tmp = *:4 (fl_breg+ea_index+bd32) + od32; export tmp; }
# Base displacement
extw: fl_breg is fl_breg & fbit=1 & bdsize=1 & IS=1 & iis=0 { export fl_breg; }
extw: bd16,fl_breg is fl_breg & fbit=1 & bdsize=2 & IS=1 & iis=0; bd16 { local tmp = fl_breg+bd16; export tmp; }
extw: bd32,fl_breg is fl_breg & fbit=1 & bdsize=3 & IS=1 & iis=0; bd32 { local tmp = fl_breg+bd32; export tmp; }
# Memory Indirect
extw: [fl_breg] is fl_breg & fbit=1 & bdsize=1 & IS=1 & iis=1 { local tmp = *:4 fl_breg; export tmp; }
extw: [bd16,fl_breg] is fl_breg & fbit=1 & bdsize=2 & IS=1 & iis=1; bd16 { local tmp = *:4 (fl_breg+bd16); export tmp; }
extw: [bd32,fl_breg] is fl_breg & fbit=1 & bdsize=3 & IS=1 & iis=1; bd32 { local tmp = *:4 (fl_breg+bd32); export tmp; }
extw: [fl_breg],od16 is fl_breg & fbit=1 & bdsize=1 & IS=1 & iis=2; od16 { local tmp = *:4 fl_breg + od16; export tmp; }
extw: [bd16,fl_breg],od16 is fl_breg & fbit=1 & bdsize=2 & IS=1 & iis=2; bd16; od16 { local tmp = *:4 (fl_breg+bd16) + od16; export tmp; }
extw: [bd32,fl_breg],od16 is fl_breg & fbit=1 & bdsize=3 & IS=1 & iis=2; bd32; od16 { local tmp = *:4 (fl_breg+bd32) + od16; export tmp; }
extw: [fl_breg],od32 is fl_breg & fbit=1 & bdsize=1 & IS=1 & iis=3; od32 { local tmp = *:4 fl_breg + od32; export tmp; }
extw: [bd16,fl_breg],od32 is fl_breg & fbit=1 & bdsize=2 & IS=1 & iis=3; bd16; od32 { local tmp = *:4 (fl_breg+bd16) + od32; export tmp; }
extw: [bd32,fl_breg],od32 is fl_breg & fbit=1 & bdsize=3 & IS=1 & iis=3; bd32; od32 { local tmp = *:4 (fl_breg+bd32) + od32; export tmp; }
# The main effective address table
# size=long
eal: regdn is mode=0 & regdn { export regdn; }
eal: regan is mode=1 & regan { export regan; }
eal: (regan) is mode=2 & regan { export *:4 regan; }
eal: (regan)+ is mode=3 & regan { local tmp = regan; regan = regan + 4; export *:4 tmp; }
eal: -(regan) is mode=4 & regan { regan = regan - 4; export *:4 regan; }
eal: (d16,regan) is mode=5 & regan; d16 { local tmp = regan + d16; export *:4 tmp; }
eal: (extw) is mode=6 & regan; extw [ regtfan = regan; pcmode = 0; ] { build extw; export *:4 extw; }
eal: (d16,PC) is PC & mode=7 & regan=2; d16 { tmp:4 = inst_start + 2 + d16; export *:4 tmp; }
eal: (extw) is mode=7 & regan=3; extw [ pcmode=1; ] { build extw; export *:4 extw; }
eal: (d16)".w" is mode=7 & regan=0; d16 { export *:4 d16; }
eal: (d32)".l" is mode=7 & regan=1; d32 { export *:4 d32; }
eal: "#"^d32 is mode=7 & regan=4; d32 { export *[const]:4 d32; }
# size=word
eaw: regdnw is mode=0 & regdnw { export regdnw; }
eaw: reganw is mode=1 & reganw { export reganw; }
eaw: (regan) is mode=2 & regan { export *:2 regan; }
eaw: (regan)+ is mode=3 & regan { local tmp = regan; regan = regan + 2; export *:2 tmp; }
eaw: -(regan) is mode=4 & regan { regan = regan - 2; export *:2 regan; }
eaw: (d16,regan) is mode=5 & regan; d16 { local tmp = regan + d16; export *:2 tmp; }
eaw: (extw) is mode=6 & regan; extw [ pcmode=0; regtfan=regan; ] { build extw; export *:2 extw; }
eaw: (d16,PC) is PC & mode=7 & regan=2; d16 { tmp:4 = inst_start + 2 + d16; export *:2 tmp; }
eaw: (extw) is mode=7 & regan=3; extw [ pcmode=1; ] { build extw; export *:2 extw; }
eaw: (d16)".w" is mode=7 & regan=0; d16 { export *:2 d16; }
eaw: (d32)".l" is mode=7 & regan=1; d32 { export *:2 d32; }
eaw: "#"^d16 is mode=7 & regan=4; d16 { export *[const]:2 d16; }
# size=byte
eab: regdnb is mode=0 & regdnb { export regdnb; }
eab: reganb is mode=1 & reganb { export reganb; }
eab: (regan) is mode=2 & regan { export *:1 regan; }
eab: (regan)+ is mode=3 & regan & regan=7 { local tmp = regan; regan = regan + 2; export *:1 tmp; }
eab: (regan)+ is mode=3 & regan { local tmp = regan; regan = regan + 1; export *:1 tmp; }
eab: -(regan) is mode=4 & regan & regan=7 { regan = regan - 2; export *:1 regan; }
eab: -(regan) is mode=4 & regan { regan = regan - 1; export *:1 regan; }
eab: (d16,regan) is mode=5 & regan; d16 { local tmp = regan + d16; export *:1 tmp; }
eab: (extw) is mode=6 & regan; extw [ pcmode=0; regtfan=regan; ] { build extw; export *:1 extw; }
eab: (d16,PC) is PC & mode=7 & regan=2; d16 { tmp:4 = inst_start + 2 + d16; export *:1 tmp; }
eab: (extw) is mode=7 & regan=3; extw [ pcmode=1; ] { build extw; export *:1 extw; }
eab: (d16)".w" is mode=7 & regan=0; d16 { export *:1 d16; }
eab: (d32)".l" is mode=7 & regan=1; d32 { export *:1 d32; }
eab: "#"^d8 is mode=7 & regan=4; d8 { export *[const]:1 d8; }
# Second effective address calculation for mov
# NB- Extended-precsion are 12 bytes, so we need to increment or decrement the reg by 12 not 4
#
# size=extend | packed (96-bit)
# The fmovem.x insn needs the movemptr to be set here
e2x: (regsan) is savmod2=2 & regsan { movemptr = regsan; export *:12 regsan; }
e2x: (regsan)+ is savmod2=3 & regsan { movemptr = regsan; local tmp = regsan; regsan = regsan + 12; export *:12 tmp; }
e2x: -(regsan) is savmod2=4 & regsan { movemptr = regsan; regsan = regsan - 12; export *:12 regsan; }
e2x: (d16,regsan) is savmod2=5 & regsan; d16 { local tmp = regsan + d16; movemptr = tmp; export *:12 tmp; }
e2x: (extw) is savmod2=6; extw [ pcmode=0; eanum=1; ] { build extw; movemptr = extw; export *:12 extw; }
e2x: (d16,PC) is PC & savmod2=7 & regsan=2; d16 { tmp:4 = inst_start + 2 + d16; movemptr = tmp; export *:12 tmp; }
e2x: (extw) is savmod2=7 & regsan=3; extw [ pcmode=1; ] { build extw; movemptr = extw; export *:12 extw; }
e2x: (d16)".w" is savmod2=7 & regsan=0; d16 { movemptr = d16; export *:12 d16; }
e2x: (d32)".l" is savmod2=7 & regsan=1; d32 { movemptr = d32; export *:12 d32; }
e2x: "#( -1E"^signX^" * 2E"^exp^"*1."^mantissaX) is savmod1=7 & regtfan=4; signX & exponentX; expintbitX & mantissaX
[exp=exponentX-0x3FFF;]
{ movemptr = mantissaX; export *[const]:12 mantissaX; } # bug: doesn't construct a real, only exports the 64-bit mantissa
# size=quad (limited mode)
# NB- Doubles are 8 bytes, so we need to increment or decrement the reg by 8 not 4
#
e2d: (regsan) is savmod2=2 & regsan { export *:8 regsan; }
e2d: (regsan)+ is savmod2=3 & regsan { local tmp = regsan; regsan = regsan + 8; export *:8 tmp; }
e2d: -(regsan) is savmod2=4 & regsan { regsan = regsan - 8; export *:8 regsan; }
e2d: (d16,regsan) is savmod2=5 & regsan; d16 { local tmp = regsan + d16; export *:8 tmp; }
e2d: (extw) is savmod2=6; extw [ pcmode=0; eanum=1; ] { build extw; export *:8 extw; }
e2d: (d16,PC) is PC & savmod2=7 & regsan=2; d16 { tmp:4 = inst_start + 2 + d16; export *:8 tmp; }
e2d: (extw) is savmod2=7 & regsan=3; extw [ pcmode=1; ] { build extw; export *:8 extw; }
e2d: (d16)".w" is savmod2=7 & regsan=0; d16 { export *:8 d16; }
e2d: (d32)".l" is savmod2=7 & regsan=1; d32 { export *:8 d32; }
e2d: "#"^d64 is savmod2=7 & regsan=4; d64 { export *[const]:8 d64; }
# size=long
e2l: regsdn is savmod2=0 & regsdn { export regsdn; }
e2l: regsan is savmod2=1 & regsan { export regsan; }
e2l: (regsan) is savmod2=2 & regsan { export *:4 regsan; }
e2l: (regsan)+ is savmod2=3 & regsan { local tmp = regsan; regsan = regsan + 4; export *:4 tmp; }
e2l: -(regsan) is savmod2=4 & regsan { regsan = regsan - 4; export *:4 regsan; }
e2l: (d16,regsan) is savmod2=5 & regsan; d16 { local tmp = regsan + d16; export *:4 tmp; }
e2l: (extw) is savmod2=6; extw [ pcmode=0; eanum=1; ] { build extw; export *:4 extw; }
e2l: (d16,PC) is PC & savmod2=7 & regsan=2; d16 { tmp:4 = inst_start + 2 + d16; export *:4 tmp; }
e2l: (extw) is savmod2=7 & regsan=3; extw [ pcmode=1; ] { build extw; export *:4 extw; }
e2l: (d16)".w" is savmod2=7 & regsan=0; d16 { export *:4 d16; }
e2l: (d32)".l" is savmod2=7 & regsan=1; d32 { export *:4 d32; }
e2l: "#"^d32 is savmod2=7 & regsan=4; d32 { export *[const]:4 d32; }
# size=word
e2w: regsdnw is savmod2=0 & regsdnw { export regsdnw; }
e2w: regsanw is savmod2=1 & regsanw { export regsanw; }
e2w: (regsan) is savmod2=2 & regsan { export *:2 regsan; }
e2w: (regsan)+ is savmod2=3 & regsan { local tmp = regsan; regsan = regsan + 2; export *:2 tmp; }
e2w: -(regsan) is savmod2=4 & regsan { regsan = regsan - 2; export *:2 regsan; }
e2w: (d16,regsan) is savmod2=5 & regsan; d16 { local tmp = regsan + d16; export *:2 tmp; }
e2w: (extw) is savmod2=6; extw [ pcmode=0; eanum=1; ] { build extw; export *:2 extw; }
e2w: (d16,PC) is PC & savmod2=7 & regsan=2; d16 { tmp:4 = inst_start + 2 + d16; export *:2 tmp; }
e2w: (extw) is savmod2=7 & regsan=3; extw [ pcmode=1; ] { build extw; export *:2 extw; }
e2w: (d16)".w" is savmod2=7 & regsan=0; d16 { export *:2 d16; }
e2w: (d32)".l" is savmod2=7 & regsan=1; d32 { export *:2 d32; }
e2w: "#"^d16 is savmod2=7 & regsan=4; d16 { export *[const]:2 d16; }
# size=byte
# NB- Manual says that if in predecrement or postincrement mode and the res is the SP, then must inc/dec by 2, not by 1
e2b: regsdnb is savmod2=0 & regsdnb { export regsdnb; }
e2b: regsanb is savmod2=1 & regsanb { export regsanb; }
e2b: (regsan) is savmod2=2 & regsan { export *:1 regsan; }
e2b: (regsan)+ is savmod2=3 & regsan & regsan=7 { local tmp = regsan; regsan = regsan + 2; export *:1 tmp; }
e2b: (regsan)+ is savmod2=3 & regsan { local tmp = regsan; regsan = regsan + 1; export *:1 tmp; }
e2b: -(regsan) is savmod2=4 & regsan & regsan=7 { regsan = regsan - 2; export *:1 regsan; }
e2b: -(regsan) is savmod2=4 & regsan { regsan = regsan - 1; export *:1 regsan; }
e2b: (d16,regsan) is savmod2=5 & regsan; d16 { local tmp = regsan + d16; export *:1 tmp; }
e2b: (extw) is savmod2=6; extw [ pcmode=0; eanum=1; ] { build extw; export *:1 extw; }
e2b: (d16,PC) is PC & savmod2=7 & regsan=2; d16 { tmp:4 = inst_start + 2 + d16; export *:1 tmp; }
e2b: (extw) is savmod2=7 & regsan=3; extw [ pcmode=1; ] { build extw; export *:1 extw; }
e2b: (d16)".w" is savmod2=7 & regsan=0; d16 { export *:1 d16; }
e2b: (d32)".l" is savmod2=7 & regsan=1; d32 { export *:1 d32; }
e2b: "#"^d8 is savmod2=7 & regsan=4; d8 { export *[const]:1 d8; }
# For instructions like lea and pea that manipulative the effective address
# itself rather than the data the address is pointing at
eaptr: (regan) is mode=2 & regan { export regan; }
eaptr: (d16,regan) is mode=5 & regan; d16 { local tmp = regan+d16; export tmp; }
eaptr: (extw) is mode=6 & regan; extw [ pcmode=0; regtfan=regan; ] { export extw; }
eaptr: (d16,PC) is mode=7 & regan=2; d16 & PC { tmp:4 = inst_start+2+d16; export tmp; }
eaptr: (extw) is mode=7 & regan=3; extw [ pcmode=1; ] { export extw; }
eaptr: (d16)".w" is mode=7 & regan=0; d16 { export *[const]:4 d16; }
eaptr: (d32)".l" is mode=7 & regan=1; d32 { export *[const]:4 d32; }
# Data register or predecrement addressing
Ty: -(regan) is rmbit=1 & regan { regan = regan-4; export *:4 regan; }
Ty: regdn is rmbit=0 & regdn { export regdn; }
Tx: -(reg9an) is rmbit=1 & reg9an { reg9an = reg9an-4; export *:4 reg9an; }
Tx: reg9dn is rmbit=0 & reg9dn { export reg9dn; }
Tyw: -(regan) is rmbit=1 & regan { regan = regan-2; export *:2 regan; }
Tyw: regdnw is rmbit=0 & regdnw { export regdnw; }
Txw: -(reg9an) is rmbit=1 & reg9an { reg9an = reg9an-2; export *:2 reg9an; }
Txw: reg9dnw is rmbit=0 & reg9dnw { export reg9dnw; }
Tyb: -(regan) is rmbit=1 & regan { regan = regan-1; export *:1 regan; }
Tyb: regdnb is rmbit=0 & regdnb { export regdnb; }
Txb: -(reg9an) is rmbit=1 & reg9an { reg9an = reg9an-1; export *:1 reg9an; }
Txb: reg9dnb is rmbit=0 & reg9dnb { export reg9dnb; }
# Bit field parameters
f_off: fldoffdat is flddo=0 & fldoffdat { export *[const]:4 fldoffdat; }
f_off: fldoffreg is flddo=1 & fldoffreg { export fldoffreg; }
f_wd: fldwddat is flddw=0 & fldwddat { export *[const]:4 fldwddat; }
f_wd: fldwdreg is flddw=1 & fldwdreg { export fldwdreg; }
rreg: regxdn is da=0 & regxdn { export regxdn; }
rreg: regxan is da=1 & regxan { export regxan; }
regPlus: (regan)+ is regan { export regan; }
regxPlus: (regxan)+ is regxan { export regxan; }
reg9Plus: (reg9an)+ is reg9an { export reg9an; }
regParen: (regan) is regan { export regan; }
d32l: (d32)".l" is d32 { export *[const]:4 d32; }
# Condition codes
cc: "t" is op811=0 { export 1:1; }
cc: "f" is op811=1 { export 0:1; }
cc: "hi" is op811=2 { tmp:1 = !(CF || ZF); export tmp; }
cc: "ls" is op811=3 { tmp:1 = CF || ZF; export tmp; }
cc: "cc" is op811=4 { tmp:1 = !CF; export tmp; }
cc: "cs" is op811=5 { export CF; }
cc: "ne" is op811=6 { tmp:1 = !ZF; export tmp; }
cc: "eq" is op811=7 { export ZF; }
cc: "vc" is op811=8 { tmp:1 = !VF; export tmp; }
cc: "vs" is op811=9 { export VF; }
cc: "pl" is op811=10 { tmp:1 = !NF; export tmp; }
cc: "mi" is op811=11 { export NF; }
cc: "ge" is op811=12 { tmp:1 = (VF==NF); export tmp; }
cc: "lt" is op811=13 { tmp:1 = (VF!=NF); export tmp; }
cc: "gt" is op811=14 { tmp:1 = !ZF && (VF==NF); export tmp; }
cc: "le" is op811=15 { tmp:1 = ZF || (VF!=NF); export tmp; }
const8: "#"^d8 is d8 { export *[const]:1 d8; }
const16: "#"^d16 is d16 { export *[const]:2 d16; }
const32: "#"^d32 is d32 { export *[const]:4 d32; }
ctlreg: SFC is SFC & ctl=0x000 { export SFC; }
ctlreg: DFC is DFC & ctl=0x001 { export DFC; }
ctlreg: USP is USP & ctl=0x800 { export USP; }
ctlreg: VBR is VBR & ctl=0x801 { export VBR; }
ctlreg: CACR is CACR & ctl=0x002 { export CACR; }
ctlreg: CAAR is CAAR & ctl=0x802 { export CAAR; }
ctlreg: MSP is MSP & ctl=0x803 { export MSP; }
ctlreg: ISP is ISP & ctl=0x804 { export ISP; }
ctlreg: TC is TC & ctl=0x003 { export TC; }
ctlreg: ITT0 is ITT0 & ctl=0x004 { export ITT0; }
ctlreg: ITT1 is ITT1 & ctl=0x005 { export ITT1; }
ctlreg: DTT0 is DTT0 & ctl=0x006 { export DTT0; }
ctlreg: DTT1 is DTT1 & ctl=0x007 { export DTT1; }
ctlreg: SRP is SRP & ctl=0x008 { export BUSCR; }
ctlreg: MMUSR is MMUSR & ctl=0x805 { export MMUSR; }
ctlreg: URP is URP & ctl=0x806 { export URP; }
ctlreg: SRP is SRP & ctl=0x807 { export SRP; }
ctlreg: PCR is PCR & ctl=0x808 { export PCR; }
ctlreg: RAMBAR0 is RAMBAR0 & ctl=0xc04 { export RAMBAR0; }
ctlreg: RAMBAR1 is RAMBAR1 & ctl=0xc05 { export RAMBAR1; }
# ctlreg: PCR is PCR & ctl=0x808 { export PCR; }
ctlreg: CAC is CAC & ctl=0xffe { export CAC; }
ctlreg: MBB is MBB & ctl=0xfff { export MBB; }
ctlreg: "UNK_CTL_"^ctl is ctl { tmp:4 = 0xffffffff; export tmp; }
# Relative jump destinations
addr8: reloc is d8base [ reloc=inst_start+2+d8base; ] { export *[ram]:4 reloc; }
addr16: reloc is d16 [ reloc=inst_start+2+d16; ] { export *[ram]:4 reloc; }
addr32: reloc is d32 [ reloc=inst_start+2+d32; ] { export *[ram]:4 reloc; }
# Jump locations for coprocessor instructions
#caddr16: reloc is d16 [ reloc=inst_next-2+d16; ] { export *[ram]:4 reloc; }
#caddr32: reloc is d32 [ reloc=inst_next-4+d32; ] { export *[ram]:4 reloc; }
# Macros for flags etc
macro resflags(result) {
NF = result s< 0;
ZF = result == 0;
}
macro logflags() {
VF=0;
CF=0;
}
macro addflags(op1,op2) {
CF = carry(op1,op2);
VF = scarry(op1,op2);
XF = CF;
}
macro addxflags(op1, op2) {
local opSum = op1 + op2;
CF = carry(op1, op2) || carry(opSum, zext(XF));
VF = scarry(op1, op2) ^^ scarry(opSum, zext(XF));
}
macro add(op1, op2res) {
local var1 = op1;
local var2 = op2res;
addflags(var1, var2);
local result = var1 + var2;
op2res = result;
resflags(result);
}
macro and(op1,op2res) {
logflags();
local result = op1 & op2res;
op2res = result;
resflags(result);
}
macro eor(op1,op2res) {
logflags();
local result = op1 ^ op2res;
op2res = result;
resflags(result);
}
macro or(op1,op2res) {
logflags();
local result = op1 | op2res;
op2res = result;
resflags(result);
}
macro subflags(op1,op2) {
CF = op1 < op2;
VF = sborrow(op1,op2);
XF = CF;
}
macro sub(op1,op2res) {
local var1 = op1;
local var2 = op2res;
subflags(var2, var1);
local result = var2 - var1;
op2res = result;
resflags(result);
}
# This macro needs to consider the XF flag when finding the CF carry flag value: op1=op1-op2-XF
# original was: CF = op1 < op2;
macro subxflags(op1,op2) {
CF = (op1 < op2) || ( (XF == 1) && (op1 == op2) );
VF = sborrow(op1,op2);
XF = CF;
}
macro negxsubflags(op1) {
CF = 0 s< op1;
VF = sborrow(0,op1);
XF = CF;
}
macro resflags_fp(result) {
$(I_FP) = 0;
$(NAN_FP) = 0;
$(N_FP) = result f< 0;
$(Z_FP) = result == 0;
}
macro clearflags_fp() {
$(N_FP) = 0;
$(Z_FP) = 0;
$(NAN_FP) = 0;
}
macro bcdflags(result) {
XF = CF;
ZF = (result == 0) * ZF + (result != 0);
}
macro getbit(res,in,bitnum) {
res = ((in >> bitnum) & 1) != 0;
}
macro bitmask(res, width) {
res = (1 << width) - 1;
}
macro bfmask (res, off, width) {
res = ((1 << width) - 1) << (32 - off - width);
}
macro getbitfield(res, off, width) {
res = (res << off) >> (32 - width);
}
macro resbitflags(result, bitnum) {
NF = ((result >> bitnum) & 1) != 0;
ZF = result == 0;
}
macro packflags(res) {
res = zext((TF<<15)|(SVF<<13)|(IPL<<8)|(XF<<4)|(NF<<3)|(ZF<<2)|(VF<<1)|CF);
}
macro unpackflags(in) {
TF = (in & 0x8000)!=0;
SVF = (in & 0x2000)!=0;
IPL = in[8,3];
XF = (in & 0x10)!=0;
NF = (in & 8)!=0;
ZF = (in & 4)!=0;
VF = (in & 2)!=0;
CF = (in & 1)!=0;
}
# This macro sets the NF and ZF flags for extended arithmetic insns- addx, negx, and subx
macro extendedResultFlags(result) {
NF = result s< 0;
ZF = (result == 0) && (ZF == 1);
}
macro arithmeticShiftLeft(count, register, width) {
local modcount = count & 63;
local lbit:1 = ((register >> (width - modcount) & 1) != 0);
local msbBefore:4 = zext(register s< 0);
register = register << modcount;
resflags(register);
local msbAfter:4 = zext(register s< 0);
VF = (msbBefore ^ msbAfter) != 0;
CF = (modcount != 0) * lbit;
XF = ((modcount == 0) * XF) + ((modcount != 0) * CF);
}
macro arithmeticShiftRight(count, register, width) {
local modcount = count & 63;
local lbit:1 = ((register >> (modcount-1) & 1) != 0);
local msbBefore:4 = zext(register s< 0);
register = register s>> modcount;
resflags(register);
local msbAfter:4 = zext(register s< 0);
VF = (msbBefore ^ msbAfter) != 0;
CF = (modcount != 0) * lbit;
XF = ((modcount == 0) * XF) + ((modcount != 0) * CF);
}
macro logicalShiftLeft(count, register, width) {
local modcount = count & 63;
local lbit:1 = ((register >> (width - modcount) & 1) != 0);
local msbBefore:4 = zext(register s< 0);
register = register << modcount;
resflags(register);
local msbAfter:4 = zext(register s< 0);
VF = (msbBefore ^ msbAfter) != 0;
CF = (modcount != 0) * lbit;
XF = ((modcount == 0) * XF) + ((modcount != 0) * CF);
}
macro logicalShiftRight(count, register, width) {
local modcount = count & 63;
local lbit:1 = ((register >> (modcount-1) & 1) != 0);
local msbBefore:4 = zext(register s< 0);
register = register >> modcount;
resflags(register);
local msbAfter:4 = zext(register s< 0);
VF = (msbBefore ^ msbAfter) != 0;
CF = (modcount != 0) * lbit;
XF = ((modcount == 0) * XF) + ((modcount != 0) * CF);
}
macro rotateLeft(count, register, width) {
local modcount = count & 63;
register = (register << modcount) | (register >> (width - modcount));
resflags(register);
CF = (register & 1) != 0;
VF = 0;
}
macro rotateRight(count, register, width) {
local modcount = count & 63;
register = (register << (width - modcount)) | (register >> modcount);
resflags(register);
CF = zext(register s< 0);
VF = 0;
}
macro rotateLeftExtended(count, register, width) {
local modcount = count & 63;
local xflag = (register & (1 << (width - modcount))) != 0;
local result = (register << modcount) | (zext(XF) << (modcount - 1)) | (register >> (width - modcount + 1));
register = (zext(modcount != 0) * result) + (zext(modcount == 0) * register);
resflags(register);
XF = (zext(modcount != 0) * xflag) + (zext(modcount == 0) * XF);
CF = XF;
VF = 0;
}
macro rotateRightExtended(count, register, width) {
local modcount = count & 63;
local xflag = (register & (1 << (modcount - 1))) != 0;
local result = (zext(XF) << (width - modcount)) | (register >> modcount) | (register << (width - modcount + 1));
register = (zext(modcount != 0) * result) + (zext(modcount == 0) * register);
resflags(register);
XF = (zext(modcount != 0) * xflag) + (zext(modcount == 0) * XF);
CF = XF;
VF = 0;
}
:^instruction is extGUARD=0 & mode2 & reg9an & mode & regan & instruction
[ extGUARD=1; regtfan=regan; savmod1=mode; regtsan=reg9an; savmod2=mode2; ] {}
# Here are the instructions
with : extGUARD=1 {
:abcd Tyb,Txb is op=12 & op48=16 & Tyb & Txb {
CF = carry(Txb,carry(Tyb,XF));
Txb = Txb + Tyb + XF;
XF = bcdAdjust(Txb);
bcdflags(Txb);
}
:add.b eab,reg9dnb is (op=13 & reg9dnb & op68=0)... & eab { add(eab, reg9dnb); }
:add.w eaw,reg9dnw is (op=13 & reg9dnw & op68=1)... & eaw { add(eaw,reg9dnw); }
:add.l eal,reg9dn is (op=13 & reg9dn & op68=2)... & eal { add(eal,reg9dn); }
:add.b reg9dnb,eab is (op=13 & reg9dnb & op68=4 & $(MEM_ALTER_ADDR_MODES))... & eab { add( reg9dnb, eab); }
:add.w reg9dnw,eaw is (op=13 & reg9dnw & op68=5 & $(MEM_ALTER_ADDR_MODES))... & eaw { add(reg9dnw,eaw); }
:add.l reg9dn,eal is (op=13 & reg9dn & op68=6 & $(MEM_ALTER_ADDR_MODES))... & eal { add(reg9dn,eal); }
:adda.w eaw,reg9an is (op=13 & reg9an & op68=3)... & eaw { reg9an = sext(eaw) + reg9an; }
:adda.l eal,reg9an is (op=13 & reg9an & op68=7)... & eal { reg9an = eal + reg9an; }
:addi.b const8,e2b is opbig=6 & op67=0 & savmod1 & regtfan & $(DAT_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] { add(const8, e2b); }
:addi.w const16,e2w is opbig=6 & op67=1 & savmod1 & regtfan & $(DAT_ALTER_ADDR_MODES); const16; e2w [ savmod2=savmod1; regtsan=regtfan; ] { add(const16,e2w); }
:addi.l const32,e2l is opbig=6 & op67=2 & savmod1 & regtfan & $(DAT_ALTER_ADDR_MODES); const32; e2l [ savmod2=savmod1; regtsan=regtfan; ] { add(const32,e2l); }
:addq.b "#"^quick,eab is (op=5 & quick & op68=0)... & eab { add(quick, eab); }
:addq.w "#"^quick,eaw is (op=5 & quick & op68=1)... & eaw { add(quick, eaw); }
:addq.l "#"^quick,eal is (op=5 & quick & op68=2)... & eal { add(quick, eal); }
# special case for address register destination
:addq.w "#"^quick,regan is op=5 & quick & op68=1 & mode=1 & regan { regan = regan + quick; }
:addq.l "#"^quick,regan is op=5 & quick & op68=2 & mode=1 & regan { regan = regan + quick; }
:addx.b Tyb,Txb is op=13 & op8=1 & op67=0 & op45=0 & Tyb & Txb
{ addxflags(Tyb,Txb); Txb=Tyb+Txb+zext(XF); extendedResultFlags(Txb); }
:addx.w Tyw,Txw is op=13 & op8=1 & op67=1 & op45=0 & Tyw & Txw
{ addxflags(Tyw,Txw); Txw=Tyw+Txw+zext(XF); extendedResultFlags(Txw); }
:addx.l Ty,Tx is op=13 & op8=1 & op67=2 & op45=0 & Ty & Tx
{ addxflags(Ty,Tx); Tx=Ty+Tx+zext(XF); extendedResultFlags(Tx); }
:and.b eab,reg9dnb is (op=12 & reg9dnb & op68=0 & $(DAT_ALTER_ADDR_MODES))... & eab { and(eab, reg9dnb); }
:and.w eaw,reg9dnw is (op=12 & reg9dnw & op68=1 & $(DAT_ALTER_ADDR_MODES))... & eaw { and(eaw, reg9dnw); }
:and.l eal,reg9dn is (op=12 & reg9dn & op68=2 & $(DAT_ALTER_ADDR_MODES))... & eal { and(eal, reg9dn); }
:and.b reg9dnb,eab is (op=12 & reg9dnb & op68=4 & $(MEM_ALTER_ADDR_MODES))... & eab { and(reg9dnb, eab); }
:and.w reg9dnw,eaw is (op=12 & reg9dnw & op68=5 & $(MEM_ALTER_ADDR_MODES))... & eaw { and(reg9dnw, eaw); }
:and.l reg9dn,eal is (op=12 & reg9dn & op68=6 & $(MEM_ALTER_ADDR_MODES))... & eal { and(reg9dn, eal); }
:andi.b const8,e2b is opbig=2 & op67=0 & $(DAT_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] { and(const8, e2b); }
:andi.w const16,e2w is opbig=2 & op67=1 & $(DAT_ALTER_ADDR_MODES); const16; e2w [ savmod2=savmod1; regtsan=regtfan; ] { and(const16, e2w); }
:andi.l const32,e2l is opbig=2 & op67=2 & $(DAT_ALTER_ADDR_MODES); const32; e2l [ savmod2=savmod1; regtsan=regtfan; ] { and(const32, e2l); }
:andi const8,"CCR" is d16=0x23c; const8 { packflags(SR); SR = SR & zext(const8); unpackflags(SR); }
:andi const16,SR is opbig=0x2 & d8base=0x7c; const16 & SR { packflags(SR); SR = SR & const16; unpackflags(SR); }
:asl.b cntreg,regdnb is op=14 & cntreg & op8=1 & op67=0 & op34=0 & regdnb {
local cnt = cntreg;
local result = regdnb;
arithmeticShiftLeft(cnt, result, 8);
regdnb = result;
}
:asl.w cntreg,regdnw is op=14 & cntreg & op8=1 & op67=1 & op34=0 & regdnw {
local cnt = cntreg;
local result = regdnw;
arithmeticShiftLeft(cnt, result, 16);
regdnw = result;
}
:asl.l cntreg,regdn is op=14 & cntreg & op8=1 & op67=2 & op34=0 & regdn {
local cnt = cntreg;
local result = regdn;
arithmeticShiftLeft(cnt, result, 32);
regdn = result;
}
:asl eaw is (opbig=0xe1 & op67=3 & $(MEM_ALTER_ADDR_MODES)) ... & eaw {
local value:2 = eaw;
local msbBefore = value & 0x8000;
getbit(CF, value, 15);
value = value << 1;
resflags(value);
local msbAfter = value & 0x8000;
VF = (msbBefore ^ msbAfter) != 0;
eaw = value;
XF = CF;
}
:asr.b cntreg,regdnb is op=14 & cntreg & op8=0 & op67=0 & op34=0 & regdnb {
local cnt = cntreg;
local result = regdnb;
arithmeticShiftRight(cnt, result, 8);
regdnb = result;
}
:asr.w cntreg,regdnw is op=14 & cntreg & op8=0 & op67=1 & op34=0 & regdnw {
local cnt = cntreg;
local result = regdnw;
arithmeticShiftRight(cntreg, result, 16);
regdnw = result;
}
:asr.l cntreg,regdn is op=14 & cntreg & op8=0 & op67=2 & op34=0 & regdn {
local cnt = cntreg;
local result = regdn;
arithmeticShiftRight(cntreg, result, 32);
regdn = result;
}
:asr eaw is (opbig=0xe0 & op67=3 & $(MEM_ALTER_ADDR_MODES)) ... & eaw {
local value:2 = eaw;
local msbBefore = value & 0x8000;
getbit(CF, value, 0);
value = value s>> 1;
resflags(value);
local msbAfter = value & 0x8000;
VF = (msbBefore ^ msbAfter) != 0;
eaw = value;
XF = CF;
}
:b^cc^".b" addr8 is op=6 & cc & addr8 { if (cc) goto addr8; }
:b^cc^".w" addr16 is op=6 & cc & d8base=0; addr16 { if (cc) goto addr16; }
:b^cc^".l": addr32 is op=6 & cc & d8base=255; addr32 { if (cc) goto addr32; }
:bchg.b reg9dn,eab is (op=0 & reg9dn & op68=5 & $(MEM_ALTER_ADDR_MODES))... & eab {
local source = eab;
local mask:1 = 1 << (reg9dn & 7);
ZF = (source & mask) == 0;
eab = source ^ mask;
}
:bchg.b const8,e2b is opbig=8 & op67=1 & $(MEM_ALTER_ADDR_MODES); const8; e2b
[ savmod2=savmod1; regtsan=regtfan; ] {
local source = e2b;
local mask:1 = 1 << (const8 & 7); # target is a byte in memory, so the bit number in the byte is modulo 8
ZF = (source & mask) == 0;
e2b = source ^ mask;
}
:bchg.l reg9dn,regdn is op=0 & reg9dn & op68=5 & mode=0 & regdn {
local source = regdn;
local mask:4 = 1 << (reg9dn & 31);
ZF = (source & mask) == 0;
regdn = source ^ mask;
}
:bchg.l const8,regdn is opbig=8 & op67=1 & mode=0 & regdn; const8 {
local source = regdn;
local mask:4 = 1 << (const8 & 31);
ZF = (source & mask) == 0;
regdn = source ^ mask;
}
:bclr.b reg9dn,eab is (op=0 & reg9dn & op68=6 & $(MEM_ALTER_ADDR_MODES))... & eab {
local source = eab; mask:1 = 1 << (reg9dn & 7); ZF = (source & mask) == 0; eab = source & (~mask);
}
:bclr.b const8,e2b is opbig=8 & op67=2 & savmod1 & regtfan & $(MEM_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] {
local source = e2b; mask:1 = 1 << (const8 & 7); ZF = (source & mask) == 0; e2b = source & (~mask);
}
:bclr.l reg9dn,regdn is op=0 & reg9dn & op68=6 & mode=0 & regdn {
local source = regdn; mask:4 = 1 << (reg9dn & 31); ZF = (source & mask) == 0; regdn = source & (~mask);
}
:bclr.l const8,regdn is opbig=8 & op67=2 & mode=0 & regdn; const8 {
local source = regdn; mask:4 = 1 << (const8 & 31); ZF = (source & mask) == 0; regdn = source & (~mask);
}
bfOffWd: {f_off:f_wd} is f_off & f_wd { }
:bfchg e2l^bfOffWd is opbig=0xea & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
logflags();
tmp:4 = e2l;
getbitfield(tmp, f_off, f_wd);
resbitflags(tmp, f_wd-1);
mask:4 = 0;
bfmask(mask, f_off, f_wd);
e2l = (tmp & ~mask) | (~(tmp & mask) & mask);
}
:bfclr e2l^bfOffWd is opbig=0xec & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
logflags();
tmp:4 = e2l;
getbitfield(tmp, f_off, f_wd);
resbitflags(tmp, f_wd-1);
mask:4 = 0;
bfmask(mask, f_off, f_wd);
e2l = tmp & ~mask;
}
:bfexts e2l^bfOffWd,f_reg is opbig=0xeb & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd & f_reg; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
logflags();
tmp:4 = e2l;
tmp = tmp << f_off;
tmp = tmp s>> (32 - f_wd);
f_reg = tmp; tmp2:4 = e2l;
getbitfield(tmp2, f_off, f_wd);
resbitflags(tmp2, f_wd-1);
}
:bfextu e2l^bfOffWd,f_reg is opbig=0xe9 & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd & f_reg; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
logflags();
tmp:4 = e2l;
getbitfield(tmp, f_off, f_wd);
f_reg = tmp;
resbitflags(tmp, f_wd-1);
}
:bfffo e2l^bfOffWd,f_reg is opbig=0xed & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd & f_reg & flddo=0 & fldoffdat=0 & flddw=0 & fldwddat=0; e2l
[ savmod2=savmod1; regtsan=regtfan; ] {
# "Find First One in Bit Field" pronounced "boo-foe"
# Set the destination f_reg with the position of the first 1 bit in the source e2l.
# f_off and f_wd specify the offset and width of the field of the source to consider.
# If f_off=0 and f_wd=0 then this means the full 32-bit source is examined (implemented here).
#
local tmp:4 = e2l;
NF = (tmp & 0x80000000) != 0;
ZF = (tmp == 0);
VF = 0;
CF = 0;
f_reg = zext(tmp != 0) * lzcount(tmp);
}
:bfffo e2l^bfOffWd,f_reg is opbig=0xed & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd & f_reg ; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
local tmp:4 = e2l;
tmp = (tmp << f_off) >> (32 - f_wd);
tmp = (tmp << (32 - f_wd));
local offw = f_off + f_wd;
NF = (tmp & 0x80000000) != 0;
ZF = (tmp == 0);
VF = 0;
CF = 0;
f_reg = (zext(tmp != 0) * lzcount(tmp)) + (zext(tmp == 0) * zext(offw));
}
:bfins f_reg,e2l^bfOffWd is opbig=0xef & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd & f_reg; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
logflags();
mask:4 = 0;
bitmask(mask, f_wd);
tmp:4 = f_reg & mask;
resbitflags(tmp, f_wd-1);
bfmask(mask,f_off,f_wd);
e2l = (e2l & ~mask) | (tmp << (32 - f_off - f_wd));
}
:bfset e2l^bfOffWd is opbig=0xee & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
logflags();
tmp:4 = e2l;
getbitfield(tmp, f_off, f_wd);
resbitflags(tmp, f_wd-1);
mask:4 = 0;
bfmask(mask,f_off,f_wd);
e2l = e2l & ~mask;
}
:bftst e2l^bfOffWd is opbig=0xe8 & op67=3 & $(DAT_DIR_CTL_ADDR_MODES); bfOffWd & f_off & f_wd; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
logflags();
tmp:4 = e2l;
getbitfield(tmp, f_off, f_wd);
resbitflags(tmp, f_wd-1);
}
define pcodeop breakpoint;
:bkpt "#"op02 is opbig=0x48 & op67=1 & op5=0 & op34=1 & op02 { breakpoint(); }
:bra.b addr8 is opbig=0x60 & addr8 { goto addr8; }
:bra.w addr16 is opbig=0x60 & d8base=0; addr16 { goto addr16; }
:bra.l addr32 is opbig=0x60 & d8base=255; addr32 { goto addr32; }
:bset.b reg9dn,eab is (op=0 & reg9dn & op68=7 & $(MEM_ALTER_ADDR_MODES))... & eab {
local tmp = eab;
mask:1 = 1 << (reg9dn & 7);
ZF = (tmp & mask) == 0;
eab = tmp | mask;
}
:bset.b const8,e2b is opbig=8 & op67=3 & $(MEM_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] {
local tmp = e2b;
mask:1 = 1 << (const8 & 7);
ZF = (tmp & mask) == 0;
e2b = tmp | mask;
}
:bset.l reg9dn,regdn is op=0 & reg9dn & op68=7 & mode=0 & regdn {
local tmp = regdn;
mask:4 = 1 << (reg9dn & 31);
ZF = (tmp & mask) == 0;
regdn = tmp | mask;
}
:bset.l const8,regdn is opbig=8 & op67=3 & mode=0 & regdn; const8 {
local tmp = regdn;
mask:4 = 1 << (const8 & 31);
ZF = (tmp & mask) == 0;
regdn = tmp | mask;
}
:bsr.b addr8 is opbig=0x61 & addr8 { SP=SP-4; *:4 SP = inst_next; call addr8; }
:bsr.w addr16 is opbig=0x61 & d8base=0; addr16 { SP=SP-4; *:4 SP = inst_next; call addr16; }
:bsr.l addr32 is opbig=0x61 & d8base=255; addr32 { SP=SP-4; *:4 SP = inst_next; call addr32; }
:btst.b reg9dn,eab is (op=0 & reg9dn & op68=4 & $(MEM_ALTER_ADDR_MODES))... & eab { mask:1 = 1 << (reg9dn & 7); ZF = (eab & mask) == 0; }
:btst.b const8,e2b is opbig=8 & op67=0 & regan & $(MEM_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] { mask:1 = 1 << (const8 & 7); ZF = (e2b & mask) == 0; }
:btst.l reg9dn,regdn is op=0 & reg9dn & op68=4 & mode=0 & regdn { mask:4 = 1 << (reg9dn & 31); ZF = (regdn & mask) == 0; }
:btst.l const8,regdn is opbig=8 & op67=0 & mode=0 & regdn; const8 { mask:4 = 1 << (const8 & 31); ZF = (regdn & mask) == 0; }
@ifdef COLDFIRE
:bitrev regdn is reg315=0x18 & regdn {
local dword = regdn;
local v = regdn;
v = ((v & 0xffff0000) >> 16) | ((v & 0x0000ffff) << 16);
v = ((v & 0xff00ff00) >> 8) | ((v & 0x00ff00ff) << 8);
v = ((v & 0xf0f0f0f0) >> 4) | ((v & 0x0f0f0f0f) << 4);
v = ((v & 0xcccccccc) >> 2) | ((v & 0x33333333) << 2);
v = ((v & 0xaaaaaaaa) >> 1) | ((v & 0x55555555) << 1);
regdn = v;
}
:byterev regdn is reg315=0x58 & regdn {
regdn = ((regdn & 0x000000FF) << 24) | ((regdn & 0x0000FF00) << 8) | ((regdn & 0x00FF0000) >> 8) | ((regdn & 0xFF000000) >> 24);
}
@endif # COLDFIRE
# TODO: Determine layout of a module descriptor
define pcodeop callm;
:callm const8,e2l is opbig=6 & op67=3 & $(CTL_ADDR_MODES); const8; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
PC = callm(const8, e2l);
call [PC];
}
#TODO: should constrain CAS to ignore mode=7 & regan=4 (place CAS2 before CAS to avoid problem)
:cas2.w regdcw:regdc2w,regduw:regdu2w,(regda):(regda2) is op015=0x0cfc; regda & ext_911=0 & regduw & ext_35=0 & regdcw; regda2 & ext2_911=0 & regdu2w & ext2_35=0 & regdc2w {
dc1:4 = zext(regdcw);
dc2:4 = zext(regdc2w);
if(dc1!=regda) goto <ne>;
if(dc2!=regda2) goto <ne>;
regda = zext(regduw);
regda2 = zext(regdu2w);
ZF = 1;
NF = 0;
goto inst_next;
<ne>
regdcw = regda(2);
regdc2w = regda2(2);
ZF = 0;
NF = 1;
}
:cas2.l regdc:regdc2,regdu:regdu2,(regda):(regda2) is op015=0x0efc; regda & ext_911=0 & regdu & ext_35=0 & regdc; regda2 & ext2_911=0 & regdu2 & ext2_35=0 & regdc2 {
if(regdc!=regda) goto <ne>;
if(regdc2!=regda2) goto <ne>;
regda = regdu;
regda2 = regdu2;
ZF = 1;
NF = 0;
goto inst_next;
<ne>
regdc = regda;
regdc2 = regda2;
ZF = 0;
NF = 1;
}
:cas.b regdcb,regdub,e2b is opbig=0x0a & op67=3 & $(MEM_ALTER_ADDR_MODES); regda=0 & ext_911=0 & regdub & ext_35=0 & regdcb; e2b [ savmod2=savmod1; regtsan=regtfan; ] {
local tmp = e2b;
if(tmp==regdcb) goto <eq>;
regdcb = tmp;
ZF = 0;
NF = 1;
goto inst_next;
<eq>
e2b = regdub;
ZF = 1;
NF = 0;
}
:cas.w regdcw,regduw,e2w is opbig=0x0c & op67=3 & $(MEM_ALTER_ADDR_MODES); regda=0 & ext_911=0 & regduw & ext_35=0 & regdcw; e2w [ savmod2=savmod1; regtsan=regtfan; ] {
local tmp = e2w;
if(tmp==regdcw) goto <eq>;
regdcw = tmp;
ZF = 0;
NF = 1;
goto inst_next;
<eq>
e2w = regduw;
ZF = 1;
NF = 0;
}
:cas.l regdc,regdu,e2l is opbig=0x0e & op67=3 & $(MEM_ALTER_ADDR_MODES); regda=0 & ext_911=0 & regdu & ext_35=0 & regdc; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
local tmp = e2l;
if(tmp==regdc) goto <eq>;
regdc = tmp;
ZF = 0;
NF = 1;
goto inst_next;
<eq>
e2l = regdu;
ZF = 1;
NF = 0;
}
:chk.w eaw,reg9dnw is (op=4 & reg9dnw & op68=6 & $(DAT_ALTER_ADDR_MODES))... & eaw {
build eaw;
local address:4 = zext(eaw);
local bound:2 = *:2 address;
local signed_bound:4 = sext(bound);
local signed_register:4 = sext(reg9dnw);
if ((signed_register s>= 0) && (signed_register s<= signed_bound)) goto inst_next;
NF = signed_register s< 0;
__m68k_trap(6:1);
}
:chk.l eal,reg9dn is (op=4 & reg9dn & op68=4 & $(DAT_ALTER_ADDR_MODES))... & eal {
build eal;
local address:4 = zext(eal);
local bound:4 = *:4 address;
local signed_bound:4 = sext(bound);
local signed_register:4 = sext(reg9dn);
if ((signed_register s>= 0) && (signed_register s<= signed_bound)) goto inst_next;
NF = signed_register s< 0;
__m68k_trap(6:1);
}
:chk2.b e2b,rreg is opbig=0 & op67=3 & $(CTL_ADDR_MODES); rreg & wl=1; e2b [ savmod2=savmod1; regtsan=regtfan; ] {
build e2b;
local address:4 = zext(e2b);
local lower:1 = *:1 address;
local upper:1 = *:1 (address + 1);
local signed_lower:4 = sext(lower);
local signed_upper:4 = sext(upper);
local signed_register:4 = sext(rreg);
ZF = ((signed_register == signed_lower) || (signed_register == signed_upper));
CF = !((signed_register s>= signed_lower) && (signed_register s<= signed_upper));
if (!CF) goto inst_next;
__m68k_trap(6:1);
}
:chk2.w e2w,rreg is opbig=2 & op67=3 & $(CTL_ADDR_MODES); rreg & wl=1; e2w [ savmod2=savmod1; regtsan=regtfan; ] {
build e2w;
local address:4 = zext(e2w);
local lower:2 = *:2 address;
local upper:2 = *:2 (address + 2);
local signed_lower:4 = sext(lower);
local signed_upper:4 = sext(upper);
local signed_register:4 = sext(rreg);
ZF = ((signed_register == signed_lower) || (signed_register == signed_upper));
CF = !((signed_register s>= signed_lower) && (signed_register s<= signed_upper));
if (!CF) goto inst_next;
__m68k_trap(6:1);
}
:chk2.l e2l,rreg is opbig=4 & op67=3 & $(CTL_ADDR_MODES); rreg & wl=1; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
build e2l;
local address:4 = zext(e2l);
local lower:4 = *:4 address;
local upper:4 = *:4 (address + 4);
local signed_lower:4 = sext(lower);
local signed_upper:4 = sext(upper);
local signed_register:4 = sext(rreg);
ZF = ((signed_register == signed_lower) || (signed_register == signed_upper));
CF = !((signed_register s>= signed_lower) && (signed_register s<= signed_upper));
if (!CF) goto inst_next;
__m68k_trap(6:1);
}
:cmp2.b e2b,rreg is opbig=0 & op67=3 & $(CTL_ADDR_MODES); rreg & wl=0; e2b [ savmod2=savmod1; regtsan=regtfan; ] {
build e2b;
local address:4 = zext(e2b);
local lower:1 = *:1 address;
local upper:1 = *:1 (address + 1);
local signed_lower:4 = sext(lower);
local signed_upper:4 = sext(upper);
local signed_register:4 = sext(rreg);
ZF = ((signed_register == signed_lower) || (signed_register == signed_upper));
CF = !((signed_register s>= signed_lower) && (signed_register s<= signed_upper));
}
:cmp2.w e2w,rreg is opbig=2 & op67=3 & $(CTL_ADDR_MODES); rreg & wl=0; e2w [ savmod2=savmod1; regtsan=regtfan; ] {
build e2w;
local address:4 = zext(e2w);
local lower:2 = *:2 address;
local upper:2 = *:2 (address + 2);
local signed_lower:4 = sext(lower);
local signed_upper:4 = sext(upper);
local signed_register:4 = sext(rreg);
ZF = ((signed_register == signed_lower) || (signed_register == signed_upper));
CF = !((signed_register s>= signed_lower) && (signed_register s<= signed_upper));
}
:cmp2.l e2l,rreg is opbig=4 & op67=3 & $(CTL_ADDR_MODES); rreg & wl=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] {
build e2l;
local address:4 = zext(e2l);
local lower:4 = *:4 address;
local upper:4 = *:4 (address + 4);
local signed_lower:4 = sext(lower);
local signed_upper:4 = sext(upper);
local signed_register:4 = sext(rreg);
ZF = ((signed_register == signed_lower) || (signed_register == signed_upper));
CF = !((signed_register s>= signed_lower) && (signed_register s<= signed_upper));
}
@ifdef MC68040
cachetype: "none" is op67=0 { export 0:4; }
cachetype: "data" is op67=1 { export 1:4; }
cachetype: "instr" is op67=2 { export 2:4; }
cachetype: "both" is op67=3 { export 3:4; }
:cinvl cachetype,(regan) is opbig=0xf4 & cachetype & op5=0 & op34=1 & regan { invalidateCacheLines(cachetype, regan); }
:cinvp cachetype,(regan) is opbig=0xf4 & cachetype & op5=0 & op34=2 & regan { invalidateCacheLines(cachetype, regan); }
:cinva cachetype is opbig=0xf4 & cachetype & op5=0 & op34=3 { invalidateCacheLines(cachetype); }
@endif # MC68040
@ifdef MC68040
:cpushl cachetype,(regan) is opbig=0xf4 & cachetype & op5=1 & op34=1 & regan {pushInvalidateCaches(cachetype, regan);}
:cpushp cachetype,(regan) is opbig=0xf4 & cachetype & op5=1 & op34=2 & regan {pushInvalidateCaches(cachetype, regan);}
:cpusha cachetype is opbig=0xf4 & cachetype & op5=1 & op34=3 {pushInvalidateCaches(cachetype);}
@endif # MC68040
:clr.b eab is (opbig=0x42 & op67=0 & $(DAT_ALTER_ADDR_MODES))... & eab { eab = 0; NF=0; ZF=1; VF=0; CF=0; }
:clr.w eaw is (opbig=0x42 & op67=1 & $(DAT_ALTER_ADDR_MODES))... & eaw { eaw = 0; NF=0; ZF=1; VF=0; CF=0; }
:clr.l eal is (opbig=0x42 & op67=2 & $(DAT_ALTER_ADDR_MODES))... & eal { eal=0; NF=0; ZF=1; VF=0; CF=0; }
:cmp.b eab,reg9dnb is (op=11 & reg9dnb & op68=0)... & eab { o2:1=eab; subflags(reg9dnb,o2); local tmp =reg9dnb-o2; resflags(tmp); }
:cmp.w eaw,reg9dnw is (op=11 & reg9dnw & op68=1)... & eaw { o2:2=eaw; subflags(reg9dnw,o2); local tmp =reg9dnw-o2; resflags(tmp); }
:cmp.l eal,reg9dn is (op=11 & reg9dn & op68=2)... & eal { o2:4=eal; subflags(reg9dn,o2); local tmp =reg9dn-o2; resflags(tmp); }
:cmpa.w eaw,reg9an is (op=11 & reg9an & op68=3)... & eaw { tmp1:4 = sext(eaw); subflags(reg9an,tmp1); local tmp =reg9an-tmp1; resflags(tmp); }
:cmpa.l eal,reg9an is (op=11 & reg9an & op68=7)... & eal { o2:4=eal; subflags(reg9an,o2); local tmp =reg9an-o2; resflags(tmp); }
:cmpi.b const8,e2b is opbig=12 & op67=0 & savmod1 & regtfan & $(DAT_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] { o2:1=e2b; subflags(o2,const8); local tmp =o2-const8; resflags(tmp); }
:cmpi.w const16,e2w is opbig=12 & op67=1 & savmod1 & regtfan & $(DAT_ALTER_ADDR_MODES); const16; e2w [ savmod2=savmod1; regtsan=regtfan; ] { o2:2=e2w; subflags(o2,const16); local tmp =o2-const16; resflags(tmp);}
:cmpi.l const32,e2l is opbig=12 & op67=2 & savmod1 & regtfan & $(DAT_ALTER_ADDR_MODES); const32; e2l [ savmod2=savmod1; regtsan=regtfan; ] { o2:4=e2l; subflags(o2,const32); local tmp =o2-const32; resflags(tmp);}
:cmpm.b regPlus,reg9Plus is op=11 & reg9Plus & op8=1 & op67=0 & op5=0 & op34=1 & regPlus { local tmp1=*:1 regPlus; regPlus=regPlus+1; local tmp2=*:1 reg9Plus; reg9Plus=reg9Plus+1;
subflags(tmp2,tmp1); local tmp =tmp2-tmp1; resflags(tmp); }
:cmpm.w regPlus,reg9Plus is op=11 & reg9Plus & op8=1 & op67=1 & op5=0 & op34=1 & regPlus { local tmp1=*:2 regPlus; regPlus=regPlus+2; local tmp2=*:2 reg9Plus; reg9Plus=reg9Plus+2;
subflags(tmp2,tmp1); local tmp =tmp2-tmp1; resflags(tmp); }
:cmpm.l regPlus,reg9Plus is op=11 & reg9Plus & op8=1 & op67=2 & op5=0 & op34=1 & regPlus { local tmp1=*:4 regPlus; regPlus=regPlus+4; local tmp2=*:4 reg9Plus; reg9Plus=reg9Plus+4;
subflags(tmp2,tmp1); local tmp =tmp2-tmp1; resflags(tmp); }
# cpBcc # need to know specific copressors use copcc1
# cpDBcc # use copcc2
# cpGEN
# cpScc # use copcc2
# cpTRAPcc # use copcc2
:db^cc regdnw,addr16 is op=5 & cc & op67=3 & op5=0 & op34=1 & regdnw; addr16
{
if (cc) goto inst_next;
regdnw=regdnw-1;
if (regdnw!=-1) goto addr16;
}
:divs.w eaw,reg9dn is (op=8 & reg9dn & op68=7)... & eaw {
local denom = sext(eaw);
local divis = reg9dn;
local div = divis s/ denom;
local rem = divis s% denom;
CF=0;
resflags(div);
reg9dn = (rem << 16) | (div & 0xffff);
}
:divu.w eaw,reg9dn is (op=8 & reg9dn & op68=3)... & eaw
{
local denom = zext(eaw);
local divis = reg9dn;
local div = divis / denom;
local rem = divis % denom;
CF=0;
resflags(div);
reg9dn = (rem << 16) | (div & 0xffff);
}
#remyes: "s" is regdq & (regdr=regdq) & divsgn=1 { }
remyes: "sl" is divsgn=1 { }
#remyes: "u" is regdq & (regdr=regdq) & divsgn=0 { }
remyes: "ul" is divsgn=0 { }
#subdiv: regdq is regdq & regdr=regdq & divsz=0 & divsgn=0 { regdq = regdq/glbdenom; export regdq; }
# NB- Need to be very careful with div to not clobber when regdr and regdq refer to the same reg.
# When this happens it seems the destination reg should get the quotient, not the remainder.
#
subdiv: regdr:regdq is regdq & regdr & divsz=0 & divsgn=0 {
local divis = regdq;
local denom = glbdenom;
local rem = divis % denom;
local quot = divis / denom;
regdr = rem;
regdq = quot;
export regdq;
}
subdiv: regdr:regdq is regdq & regdr & divsz=1 & divsgn=0 {
divi:8 = (zext(regdr) << 32) | zext(regdq);
denom:8 = zext(glbdenom);
local quot = divi / denom;
local rem = divi % denom;
regdr = rem:4;
regdq = quot:4;
export regdq;
}
#subdiv: regdq is regdq & regdr=regdq & divsz=0 & divsgn=1 { regdq = regdq s/ glbdenom; export regdq; }
subdiv: regdr:regdq is regdq & regdr & divsz=0 & divsgn=1 {
local divis = regdq;
local denom = glbdenom;
local rem = divis s% denom;
local quot = divis s/ denom;
regdr = rem;
regdq = quot;
export regdq;
}
subdiv: regdr:regdq is regdq & regdr & divsz=1 & divsgn=1 {
divi:8 = (sext(regdr)<<32)|sext(regdq);
denom:8=sext(glbdenom);
local quot=divi s/ denom;
local rem=divi s% denom;
regdr=rem:4;
regdq=quot:4;
export regdq;
}
# when divsgn=0
# divu.l is regdq / e2l -> regdq
# divu.l (when divsz = 1) is regdr concat regdq / el2 - > regdr and regdq
# divul.l (when divsz = 0) is regdq / el2 -> regdr and regdq
#
:div^remyes^".l" e2l,subdiv is opbig=0x4c & op67=1 & $(DAT_ALTER_ADDR_MODES); subdiv & remyes; e2l [ savmod2=savmod1; regtsan=regtfan;] { glbdenom=e2l; build subdiv; CF=0; resflags(subdiv);}
:eor.b reg9dnb,eab is (op=11 & reg9dnb & op68=4 & $(DAT_ALTER_ADDR_MODES))... & eab { eor(reg9dnb, eab); }
:eor.w reg9dnw,eaw is (op=11 & reg9dnw & op68=5 & $(DAT_ALTER_ADDR_MODES))... & eaw { eor(reg9dnw, eaw); }
:eor.l reg9dn,eal is (op=11 & reg9dn & op68=6 & $(DAT_ALTER_ADDR_MODES))... & eal { eor(reg9dn, eal); }
:eori.b const8,e2b is opbig=10 & op67=0 & $(DAT_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] { eor(const8, e2b); }
:eori.w const16,e2w is opbig=10 & op67=1 & $(DAT_ALTER_ADDR_MODES); const16; e2w [ savmod2=savmod1; regtsan=regtfan; ] { eor(const16, e2w); }
:eori.l const32,e2l is opbig=10 & op67=2 & $(DAT_ALTER_ADDR_MODES); const32; e2l [ savmod2=savmod1; regtsan=regtfan; ] { eor(const32, e2l); }
:eori const8,"CCR" is d16=0xa3c; const8 { packflags(SR); SR = SR ^ zext(const8); unpackflags(SR); }
:eori const16,SR is opbig=0x0a & d8base=0x7c; const16 & SR { packflags(SR); SR = SR ^ const16; unpackflags(SR); }
:exg reg9dn,regdn is op=12 & reg9dn & op8=1 & op37=8 & regdn { local tmp = reg9dn; reg9dn=regdn; regdn=tmp; }
:exg reg9an,regan is op=12 & reg9an & op8=1 & op37=9 & regan { local tmp = reg9an; reg9an=regan; regan=tmp; }
:exg reg9dn,regan is op=12 & reg9dn & op8=1 & op37=17 & regan { local tmp = reg9dn; reg9dn=regan; regan=tmp; }
:ext.w regdnw is op=4 & reg9dn=4 & op68=2 & op35=0 & regdnw { local tmp = regdnw:1; regdnw = sext(tmp); resflags(regdnw); logflags(); }
:ext.l regdn is op=4 & reg9dn=4 & op68=3 & op35=0 & regdn { local tmp = regdn:2; regdn = sext(tmp); resflags(regdn); logflags(); }
:extb.l regdn is op=4 & reg9dn=4 & op68=7 & op35=0 & regdn { local tmp = regdn:1; regdn = sext(tmp); resflags(regdn); logflags(); }
@ifdef COLDFIRE
:halt is d16=0x4ac8 unimpl
@endif
:illegal is d16=0x4afc unimpl
# jump addresses derived from effective address calculation
addrpc16: reloc is d16 [ reloc = inst_start+2+d16; ] { export *[ram]:4 reloc; }
addrd16: d16".w" is d16 { export *[ram]:4 d16; }
addrd32: d32".l" is d32 { export *[ram]:4 d32; }
addrReg: (regan) is regan { export regan; }
addrRegD16: (d16,regan) is regan; d16 {local tmp = regan + d16; export *[ram]:4 tmp; }
addrextw: (extw) is extw { export extw; }
:jmp addrReg is opbig=0x4e & op67=3 & mode=2 & addrReg { goto [addrReg]; }
:jmp addrRegD16 is (opbig=0x4e & op67=3 & mode=5) ... & addrRegD16 { goto [addrRegD16]; }
:jmp addrextw is opbig=0x4e & op67=3 & mode=6 & regan; addrextw [ pcmode=0; regtfan=regan; ] { goto [addrextw]; }
:jmp addrpc16 is opbig=0x4e & op67=3 & mode=7 & regan=2; addrpc16 { goto addrpc16; }
:jmp addrextw is opbig=0x4e & op67=3 & mode=7 & regan=3; addrextw [ pcmode=1; ] { goto [addrextw]; }
:jmp addrd16 is opbig=0x4e & op67=3 & mode=7 & regan=0; addrd16 { goto addrd16; }
:jmp addrd32 is opbig=0x4e & op67=3 & mode=7 & regan=1; addrd32 { goto addrd32; }
:jsr addrReg is opbig=0x4e & op67=2 & mode=2 & addrReg { SP=SP-4; *:4 SP = inst_next; call [addrReg]; }
:jsr addrRegD16 is (opbig=0x4e & op67=2 & mode=5) ... & addrRegD16 { SP=SP-4; *:4 SP = inst_next; call [addrRegD16]; }
:jsr addrextw is opbig=0x4e & op67=2 & mode=6 & regan; addrextw [ pcmode=0; regtfan=regan;] { build addrextw; SP=SP-4; *:4 SP=inst_next; call [addrextw];}
:jsr addrpc16 is opbig=0x4e & op67=2 & mode=7 & regan=2; addrpc16 { SP=SP-4; *:4 SP = inst_next; call addrpc16; }
:jsr addrextw is opbig=0x4e & op67=2 & mode=7 & regan=3; addrextw [ pcmode=1; ] { build addrextw; SP=SP-4; *:4 SP = inst_next; call [addrextw]; }
:jsr addrd16 is opbig=0x4e & op67=2 & mode=7 & regan=0; addrd16 { SP=SP-4; *:4 SP = inst_next; call addrd16; }
:jsr addrd32 is opbig=0x4e & op67=2 & mode=7 & regan=1; addrd32 { SP=SP-4; *:4 SP = inst_next; call addrd32; }
:lea eaptr,reg9an is (op=4 & reg9an & op68=7)... & eaptr { reg9an = eaptr; }
:link.w regan,d16 is opbig=0x4e & op37=10 & regan; d16 { SP=SP-4; *:4 SP = regan; regan=SP; SP = SP + d16; }
:link.l regan,d32 is opbig=0x48 & op37=1 & regan; d32 { SP=SP-4; *:4 SP = regan; regan=SP; SP = SP + d32; }
macro shiftCXFlags(cntreg) {
CF = CF * (cntreg != 0);
XF = CF * (cntreg != 0) + XF * (cntreg == 0);
}
:lsl.b cntreg,regdnb is op=14 & cntreg & op8=1 & op67=0 & op34=1 & regdnb { logicalShiftLeft(cntreg, regdnb, 8); }
:lsl.w cntreg,regdnw is op=14 & cntreg & op8=1 & op67=1 & op34=1 & regdnw { logicalShiftLeft(cntreg, regdnw, 16); }
:lsl.l cntreg,regdn is op=14 & cntreg & op8=1 & op67=2 & op34=1 & regdn { logicalShiftLeft(cntreg, regdn, 32); }
:lsl eaw is (opbig=0xe3 & op67=3 & $(MEM_ALTER_ADDR_MODES)) ... & eaw {
local value:2 = eaw;
getbit(CF, value, 15);
value = value << 1;
resflags(value);
eaw = value;
VF = 0;
XF = CF;
}
:lsr.b cntreg,regdnb is op=14 & cntreg & op8=0 & op67=0 & op34=1 & regdnb { logicalShiftRight(cntreg, regdnb, 8); }
:lsr.w cntreg,regdnw is op=14 & cntreg & op8=0 & op67=1 & op34=1 & regdnw { logicalShiftRight(cntreg, regdnw, 16); }
:lsr.l cntreg,regdn is op=14 & cntreg & op8=0 & op67=2 & op34=1 & regdn { logicalShiftRight(cntreg, regdn, 32); }
:lsr eaw is (opbig=0xe2 & op67=3 & $(MEM_ALTER_ADDR_MODES)) ... & eaw {
local value:2 = eaw;
getbit(CF, value, 0);
value = value >> 1;
resflags(value);
eaw = value;
VF = 0;
XF = CF;
}
:move.b eab,e2b is (op=1 & $(DAT_ALTER_ADDR_MODES2))... & eab ; e2b { build eab; local tmp = eab; build e2b; e2b = tmp; resflags(tmp); logflags(); }
:move.w eaw,e2w is (op=3 & $(DAT_ALTER_ADDR_MODES2))... & eaw ; e2w { build eaw; local tmp = eaw; build e2w; e2w = tmp; resflags(tmp); logflags(); }
:move.l eal,e2l is (op=2 & $(DAT_ALTER_ADDR_MODES2))... & eal ; e2l { build eal; local tmp = eal; build e2l; e2l = tmp; resflags(tmp); logflags(); }
:move "CCR",eaw is (opbig=0x42 & op67=3 & $(DAT_ALTER_ADDR_MODES))... & eaw { packflags(SR); eaw = SR; }
:move eaw,"CCR" is (opbig=0x44 & op67=3 & $(DAT_ALTER_ADDR_MODES))... & eaw { unpackflags(eaw); }
:move SR,eaw is SR; (opbig=0x40 & op67=3 & $(DAT_ALTER_ADDR_MODES))... & eaw { packflags(SR); eaw = SR; }
:move eaw,SR is SR; (opbig=0x46 & op67=3 & $(DAT_ALTER_ADDR_MODES))... & eaw { SR = eaw; unpackflags(SR); }
:move USP,regan is opbig=0x4e & op37=13 & regan & USP { regan = USP; }
:move regan,USP is opbig=0x4e & op37=12 & regan & USP { USP = regan; }
:movea.w eaw,reg9an is (op=3 & reg9an & mode2=1)... & eaw { reg9an = sext(eaw); }
:movea.l eal,reg9an is (op=2 & reg9an & mode2=1)... & eal { reg9an = eal; }
:movec ctlreg,rreg is d16=0x4e7a; rreg & ctlreg { rreg = ctlreg; }
:movec rreg,ctlreg is d16=0x4e7b; rreg & ctlreg { ctlreg = rreg; }
@ifdef MC68040
macro move16(src, dst)
{
*:4 dst= *:4 src;
src=src+4;
dst=dst+4;
*:4 dst= *:4 src;
src=src+4;
dst=dst+4;
*:4 dst= *:4 src;
src=src+4;
dst=dst+4;
*:4 dst= *:4 src;
}
:move16 regPlus,regxPlus is opbig=0xf6 & op37=4 & regan & regPlus; regxan & regxPlus & da=1 {
local src=regan&0xfffffff0;
local dst=regxan&0xfffffff0;
regan=regan+16;
regxan=regxan+16;
move16(src, dst);
}
:move16 regPlus,d32l is opbig=0xf6 & op37=0 & regan & regPlus; d32 & d32l {
local src=regan&0xfffffff0;
local dst:4=d32&0xfffffff0;
regan=regan+16;
move16(src, dst);
}
:move16 d32l,regPlus is opbig=0xf6 & op37=1 & regan & regPlus; d32 & d32l {
local dst=regan&0xfffffff0;
local src:4=d32&0xfffffff0;
regan=regan+16;
move16(src, dst);
}
:move16 regParen,d32l is opbig=0xf6 & op37=2 & regan & regParen; d32 & d32l {
local src=regan&0xfffffff0;
local dst:4=d32&0xfffffff0;
move16(src, dst);
}
:move16 d32l,regParen is opbig=0xf6 & op37=3 & regan & regParen; d32 & d32l {
local dst=regan&0xfffffff0;
local src:4=d32&0xfffffff0;
move16(src, dst);
}
@endif # MC68040
@ifdef COLDFIRE
:mvs.b: eab, reg9dn is (op=0x7 & op68=4 & reg9dn )... & eab { reg9dn = sext(eab); }
:mvs.w: eaw, reg9dn is (op=0x7 & op68=5 & reg9dn )... & eaw { reg9dn = sext(eaw); }
:mvz.b: eab, reg9dn is (op=0x7 & op68=6 & reg9dn )... & eab { reg9dn = zext(eab); }
:mvz.w: eaw, reg9dn is (op=0x7 & op68=7 & reg9dn )... & eaw { reg9dn = zext(eaw); }
:mov3q "#"^d911, eal is (op=0xa & op68=5 & d911 ) ... & eal { eal = d911; }
:sats.l regdn is opbig=0x4c & op37=0x10 & regdn { if (VF == 0) goto inst_next; regdn = (zext(regdn == 0 ) * 0x80000000) + (zext(regdn != 0) * 0x7fffffff); VF=0; CF=0; }
skip_addr: skipAddr is op02=2 [skipAddr = inst_next + 2;] { export *[ram]:4 skipAddr; }
skip_addr: skipAddr is op02=3 [skipAddr = inst_next + 4;] { export *[ram]:4 skipAddr; }
# TPF.w/l is occassionally used as a branch over a valid instruction.
:tpf is opbig=0x51 & op37=0x1f & op02=4 { } # nop
:tpf.w is opbig=0x51 & op37=0x1f & op02=2 & skip_addr { goto skip_addr; } # nop + 1 word
:tpf.l is opbig=0x51 & op37=0x1f & op02=3 & skip_addr { goto skip_addr; } # nop + 2 word
@endif # COLDFIRE
# Tables for register lists, for the movem instruction
# Register to mememory, forward direction, via word
r2mfwf: D0w is D0w & mvm0=1 { *movemptr = D0w; movemptr = movemptr + 2; }
r2mfwf: is mvm0=0 { }
r2mfwe: r2mfwf" "D1w is D1w & mvm1=1 & r2mfwf { *movemptr = D1w; movemptr = movemptr + 2; }
r2mfwe: r2mfwf is mvm1=0 & r2mfwf { }
r2mfwd: r2mfwe" "D2w is D2w & mvm2=1 & r2mfwe { *movemptr = D2w; movemptr = movemptr + 2; }
r2mfwd: r2mfwe is mvm2=0 & r2mfwe { }
r2mfwc: r2mfwd" "D3w is D3w & mvm3=1 & r2mfwd { *movemptr = D3w; movemptr = movemptr + 2; }
r2mfwc: r2mfwd is mvm3=0 & r2mfwd { }
r2mfwb: r2mfwc" "D4w is D4w & mvm4=1 & r2mfwc { *movemptr = D4w; movemptr = movemptr + 2; }
r2mfwb: r2mfwc is mvm4=0 & r2mfwc { }
r2mfwa: r2mfwb" "D5w is D5w & mvm5=1 & r2mfwb { *movemptr = D5w; movemptr = movemptr + 2; }
r2mfwa: r2mfwb is mvm5=0 & r2mfwb { }
r2mfw9: r2mfwa" "D6w is D6w & mvm6=1 & r2mfwa { *movemptr = D6w; movemptr = movemptr + 2; }
r2mfw9: r2mfwa is mvm6=0 & r2mfwa { }
r2mfw8: r2mfw9" "D7w is D7w & mvm7=1 & r2mfw9 { *movemptr = D7w; movemptr = movemptr + 2; }
r2mfw8: r2mfw9 is mvm7=0 & r2mfw9 { }
r2mfw7: r2mfw8" "A0w is A0w & mvm8=1 & r2mfw8 { *movemptr = A0w; movemptr = movemptr + 2; }
r2mfw7: r2mfw8 is mvm8=0 & r2mfw8 { }
r2mfw6: r2mfw7" "A1w is A1w & mvm9=1 & r2mfw7 { *movemptr = A1w; movemptr = movemptr + 2; }
r2mfw6: r2mfw7 is mvm9=0 & r2mfw7 { }
r2mfw5: r2mfw6" "A2w is A2w & mvm10=1 & r2mfw6 { *movemptr = A2w; movemptr = movemptr + 2; }
r2mfw5: r2mfw6 is mvm10=0 & r2mfw6 { }
r2mfw4: r2mfw5" "A3w is A3w & mvm11=1 & r2mfw5 { *movemptr = A3w; movemptr = movemptr + 2; }
r2mfw4: r2mfw5 is mvm11=0 & r2mfw5 { }
r2mfw3: r2mfw4" "A4w is A4w & mvm12=1 & r2mfw4 { *movemptr = A4w; movemptr = movemptr + 2; }
r2mfw3: r2mfw4 is mvm12=0 & r2mfw4 { }
r2mfw2: r2mfw3" "A5w is A5w & mvm13=1 & r2mfw3 { *movemptr = A5w; movemptr = movemptr + 2; }
r2mfw2: r2mfw3 is mvm13=0 & r2mfw3 { }
r2mfw1: r2mfw2" "A6w is A6w & mvm14=1 & r2mfw2 { *movemptr = A6w; movemptr = movemptr + 2; }
r2mfw1: r2mfw2 is mvm14=0 & r2mfw2 { }
r2mfw0: { r2mfw1" "A7w} is A7w & mvm15=1 & r2mfw1 { *movemptr = A7w; movemptr = movemptr + 2; }
r2mfw0: { r2mfw1} is mvm15=0 & r2mfw1 { }
# Register to memory, forward direction, via long
r2mflf: D0 is D0 & mvm0=1 { *movemptr = D0; movemptr = movemptr + 4; }
r2mflf: is mvm0=0 { }
r2mfle: r2mflf" "D1 is D1 & mvm1=1 & r2mflf { *movemptr = D1; movemptr = movemptr + 4; }
r2mfle: r2mflf is mvm1=0 & r2mflf { }
r2mfld: r2mfle" "D2 is D2 & mvm2=1 & r2mfle { *movemptr = D2; movemptr = movemptr + 4; }
r2mfld: r2mfle is mvm2=0 & r2mfle { }
r2mflc: r2mfld" "D3 is D3 & mvm3=1 & r2mfld { *movemptr = D3; movemptr = movemptr + 4; }
r2mflc: r2mfld is mvm3=0 & r2mfld { }
r2mflb: r2mflc" "D4 is D4 & mvm4=1 & r2mflc { *movemptr = D4; movemptr = movemptr + 4; }
r2mflb: r2mflc is mvm4=0 & r2mflc { }
r2mfla: r2mflb" "D5 is D5 & mvm5=1 & r2mflb { *movemptr = D5; movemptr = movemptr + 4; }
r2mfla: r2mflb is mvm5=0 & r2mflb { }
r2mfl9: r2mfla" "D6 is D6 & mvm6=1 & r2mfla { *movemptr = D6; movemptr = movemptr + 4; }
r2mfl9: r2mfla is mvm6=0 & r2mfla { }
r2mfl8: r2mfl9" "D7 is D7 & mvm7=1 & r2mfl9 { *movemptr = D7; movemptr = movemptr + 4; }
r2mfl8: r2mfl9 is mvm7=0 & r2mfl9 { }
r2mfl7: r2mfl8" "A0 is A0 & mvm8=1 & r2mfl8 { *movemptr = A0; movemptr = movemptr + 4; }
r2mfl7: r2mfl8 is mvm8=0 & r2mfl8 { }
r2mfl6: r2mfl7" "A1 is A1 & mvm9=1 & r2mfl7 { *movemptr = A1; movemptr = movemptr + 4; }
r2mfl6: r2mfl7 is mvm9=0 & r2mfl7 { }
r2mfl5: r2mfl6" "A2 is A2 & mvm10=1 & r2mfl6 { *movemptr = A2; movemptr = movemptr + 4; }
r2mfl5: r2mfl6 is mvm10=0 & r2mfl6 { }
r2mfl4: r2mfl5" "A3 is A3 & mvm11=1 & r2mfl5 { *movemptr = A3; movemptr = movemptr + 4; }
r2mfl4: r2mfl5 is mvm11=0 & r2mfl5 { }
r2mfl3: r2mfl4" "A4 is A4 & mvm12=1 & r2mfl4 { *movemptr = A4; movemptr = movemptr + 4; }
r2mfl3: r2mfl4 is mvm12=0 & r2mfl4 { }
r2mfl2: r2mfl3" "A5 is A5 & mvm13=1 & r2mfl3 { *movemptr = A5; movemptr = movemptr + 4; }
r2mfl2: r2mfl3 is mvm13=0 & r2mfl3 { }
r2mfl1: r2mfl2" "A6 is A6 & mvm14=1 & r2mfl2 { *movemptr = A6; movemptr = movemptr + 4; }
r2mfl1: r2mfl2 is mvm14=0 & r2mfl2 { }
r2mfl0: { r2mfl1" "SP} is SP & mvm15=1 & r2mfl1 { *movemptr = SP; movemptr = movemptr + 4; }
r2mfl0: { r2mfl1} is mvm15=0 & r2mfl1 { }
# Register to memory, backward direction, via word
r2mbwf: A7w is A7w & mvm0=1 { movemptr = movemptr - 4; *movemptr = A7w; }
r2mbwf: is mvm0=0 { }
r2mbwe: r2mbwf" "A6w is A6w & mvm1=1 & r2mbwf { movemptr = movemptr - 4; *movemptr = A6w; }
r2mbwe: r2mbwf is mvm1=0 & r2mbwf { }
r2mbwd: r2mbwe" "A5w is A5w & mvm2=1 & r2mbwe { movemptr = movemptr - 4; *movemptr = A5w; }
r2mbwd: r2mbwe is mvm2=0 & r2mbwe { }
r2mbwc: r2mbwd" "A4w is A4w & mvm3=1 & r2mbwd { movemptr = movemptr - 4; *movemptr = A4w; }
r2mbwc: r2mbwd is mvm3=0 & r2mbwd { }
r2mbwb: r2mbwc" "A3w is A3w & mvm4=1 & r2mbwc { movemptr = movemptr - 4; *movemptr = A3w; }
r2mbwb: r2mbwc is mvm4=0 & r2mbwc { }
r2mbwa: r2mbwb" "A2w is A2w & mvm5=1 & r2mbwb { movemptr = movemptr - 4; *movemptr = A2w; }
r2mbwa: r2mbwb is mvm5=0 & r2mbwb { }
r2mbw9: r2mbwa" "A1w is A1w & mvm6=1 & r2mbwa { movemptr = movemptr - 4; *movemptr = A1w; }
r2mbw9: r2mbwa is mvm6=0 & r2mbwa { }
r2mbw8: r2mbw9" "A0w is A0w & mvm7=1 & r2mbw9 { movemptr = movemptr - 4; *movemptr = A0w; }
r2mbw8: r2mbw9 is mvm7=0 & r2mbw9 { }
r2mbw7: r2mbw8" "D7w is D7w & mvm8=1 & r2mbw8 { movemptr = movemptr - 4; *movemptr = D7w; }
r2mbw7: r2mbw8 is mvm8=0 & r2mbw8 { }
r2mbw6: r2mbw7" "D6w is D6w & mvm9=1 & r2mbw7 { movemptr = movemptr - 4; *movemptr = D6w; }
r2mbw6: r2mbw7 is mvm9=0 & r2mbw7 { }
r2mbw5: r2mbw6" "D5w is D5w & mvm10=1 & r2mbw6 { movemptr = movemptr - 4; *movemptr = D5w; }
r2mbw5: r2mbw6 is mvm10=0 & r2mbw6 { }
r2mbw4: r2mbw5" "D4w is D4w & mvm11=1 & r2mbw5 { movemptr = movemptr - 4; *movemptr = D4w; }
r2mbw4: r2mbw5 is mvm11=0 & r2mbw5 { }
r2mbw3: r2mbw4" "D3w is D3w & mvm12=1 & r2mbw4 { movemptr = movemptr - 4; *movemptr = D3w; }
r2mbw3: r2mbw4 is mvm12=0 & r2mbw4 { }
r2mbw2: r2mbw3" "D2w is D2w & mvm13=1 & r2mbw3 { movemptr = movemptr - 4; *movemptr = D2w; }
r2mbw2: r2mbw3 is mvm13=0 & r2mbw3 { }
r2mbw1: r2mbw2" "D1w is D1w & mvm14=1 & r2mbw2 { movemptr = movemptr - 4; *movemptr = D1w; }
r2mbw1: r2mbw2 is mvm14=0 & r2mbw2 { }
r2mbw0: { r2mbw1" "D0w} is D0w & mvm15=1 & r2mbw1 { movemptr = movemptr - 4; *movemptr = D0w; }
r2mbw0: { r2mbw1} is mvm15=0 & r2mbw1 { }
# Register to memory, backward direction, via long
r2mblf: SP is SP & mvm0=1 { movemptr = movemptr - 4; *movemptr = SP; }
r2mblf: is mvm0=0 { }
r2mble: r2mblf" "A6 is A6 & mvm1=1 & r2mblf { movemptr = movemptr - 4; *movemptr = A6; }
r2mble: r2mblf is mvm1=0 & r2mblf { }
r2mbld: r2mble" "A5 is A5 & mvm2=1 & r2mble { movemptr = movemptr - 4; *movemptr = A5; }
r2mbld: r2mble is mvm2=0 & r2mble { }
r2mblc: r2mbld" "A4 is A4 & mvm3=1 & r2mbld { movemptr = movemptr - 4; *movemptr = A4; }
r2mblc: r2mbld is mvm3=0 & r2mbld { }
r2mblb: r2mblc" "A3 is A3 & mvm4=1 & r2mblc { movemptr = movemptr - 4; *movemptr = A3; }
r2mblb: r2mblc is mvm4=0 & r2mblc { }
r2mbla: r2mblb" "A2 is A2 & mvm5=1 & r2mblb { movemptr = movemptr - 4; *movemptr = A2; }
r2mbla: r2mblb is mvm5=0 & r2mblb { }
r2mbl9: r2mbla" "A1 is A1 & mvm6=1 & r2mbla { movemptr = movemptr - 4; *movemptr = A1; }
r2mbl9: r2mbla is mvm6=0 & r2mbla { }
r2mbl8: r2mbl9" "A0 is A0 & mvm7=1 & r2mbl9 { movemptr = movemptr - 4; *movemptr = A0; }
r2mbl8: r2mbl9 is mvm7=0 & r2mbl9 { }
r2mbl7: r2mbl8" "D7 is D7 & mvm8=1 & r2mbl8 { movemptr = movemptr - 4; *movemptr = D7; }
r2mbl7: r2mbl8 is mvm8=0 & r2mbl8 { }
r2mbl6: r2mbl7" "D6 is D6 & mvm9=1 & r2mbl7 { movemptr = movemptr - 4; *movemptr = D6; }
r2mbl6: r2mbl7 is mvm9=0 & r2mbl7 { }
r2mbl5: r2mbl6" "D5 is D5 & mvm10=1 & r2mbl6 { movemptr = movemptr - 4; *movemptr = D5; }
r2mbl5: r2mbl6 is mvm10=0 & r2mbl6 { }
r2mbl4: r2mbl5" "D4 is D4 & mvm11=1 & r2mbl5 { movemptr = movemptr - 4; *movemptr = D4; }
r2mbl4: r2mbl5 is mvm11=0 & r2mbl5 { }
r2mbl3: r2mbl4" "D3 is D3 & mvm12=1 & r2mbl4 { movemptr = movemptr - 4; *movemptr = D3; }
r2mbl3: r2mbl4 is mvm12=0 & r2mbl4 { }
r2mbl2: r2mbl3" "D2 is D2 & mvm13=1 & r2mbl3 { movemptr = movemptr - 4; *movemptr = D2; }
r2mbl2: r2mbl3 is mvm13=0 & r2mbl3 { }
r2mbl1: r2mbl2" "D1 is D1 & mvm14=1 & r2mbl2 { movemptr = movemptr - 4; *movemptr = D1; }
r2mbl1: r2mbl2 is mvm14=0 & r2mbl2 { }
r2mbl0: { r2mbl1" "D0} is D0 & mvm15=1 & r2mbl1 { movemptr = movemptr - 4; *movemptr = D0; }
r2mbl0: { r2mbl1} is mvm15=0 & r2mbl1 { }
# Memory to register, forward direction, via word
m2rfwf: D0 is D0 & mvm0=1 { D0 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfwf: is mvm0=0 { }
m2rfwe: m2rfwf" "D1 is D1 & mvm1=1 & m2rfwf { D1 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfwe: m2rfwf is mvm1=0 & m2rfwf { }
m2rfwd: m2rfwe" "D2 is D2 & mvm2=1 & m2rfwe { D2 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfwd: m2rfwe is mvm2=0 & m2rfwe { }
m2rfwc: m2rfwd" "D3 is D3 & mvm3=1 & m2rfwd { D3 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfwc: m2rfwd is mvm3=0 & m2rfwd { }
m2rfwb: m2rfwc" "D4 is D4 & mvm4=1 & m2rfwc { D4 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfwb: m2rfwc is mvm4=0 & m2rfwc { }
m2rfwa: m2rfwb" "D5 is D5 & mvm5=1 & m2rfwb { D5 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfwa: m2rfwb is mvm5=0 & m2rfwb { }
m2rfw9: m2rfwa" "D6 is D6 & mvm6=1 & m2rfwa { D6 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw9: m2rfwa is mvm6=0 & m2rfwa { }
m2rfw8: m2rfw9" "D7 is D7 & mvm7=1 & m2rfw9 { D7 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw8: m2rfw9 is mvm7=0 & m2rfw9 { }
m2rfw7: m2rfw8" "A0 is A0 & mvm8=1 & m2rfw8 { A0 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw7: m2rfw8 is mvm8=0 & m2rfw8 { }
m2rfw6: m2rfw7" "A1 is A1 & mvm9=1 & m2rfw7 { A1 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw6: m2rfw7 is mvm9=0 & m2rfw7 { }
m2rfw5: m2rfw6" "A2 is A2 & mvm10=1 & m2rfw6 { A2 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw5: m2rfw6 is mvm10=0 & m2rfw6 { }
m2rfw4: m2rfw5" "A3 is A3 & mvm11=1 & m2rfw5 { A3 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw4: m2rfw5 is mvm11=0 & m2rfw5 { }
m2rfw3: m2rfw4" "A4 is A4 & mvm12=1 & m2rfw4 { A4 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw3: m2rfw4 is mvm12=0 & m2rfw4 { }
m2rfw2: m2rfw3" "A5 is A5 & mvm13=1 & m2rfw3 { A5 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw2: m2rfw3 is mvm13=0 & m2rfw3 { }
m2rfw1: m2rfw2" "A6 is A6 & mvm14=1 & m2rfw2 { A6 = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw1: m2rfw2 is mvm14=0 & m2rfw2 { }
m2rfw0: { m2rfw1" "SP} is SP & mvm15=1 & m2rfw1 { SP = sext(*:2 movemptr); movemptr = movemptr + 2; }
m2rfw0: { m2rfw1} is mvm15=0 & m2rfw1 { }
# Memory to register, forward direction, via long
m2rflf: D0 is D0 & mvm0=1 { D0 = *movemptr; movemptr = movemptr + 4; }
m2rflf: is mvm0=0 { }
m2rfle: m2rflf" "D1 is D1 & mvm1=1 & m2rflf { D1 = *movemptr; movemptr = movemptr + 4; }
m2rfle: m2rflf is mvm1=0 & m2rflf { }
m2rfld: m2rfle" "D2 is D2 & mvm2=1 & m2rfle { D2 = *movemptr; movemptr = movemptr + 4; }
m2rfld: m2rfle is mvm2=0 & m2rfle { }
m2rflc: m2rfld" "D3 is D3 & mvm3=1 & m2rfld { D3 = *movemptr; movemptr = movemptr + 4; }
m2rflc: m2rfld is mvm3=0 & m2rfld { }
m2rflb: m2rflc" "D4 is D4 & mvm4=1 & m2rflc { D4 = *movemptr; movemptr = movemptr + 4; }
m2rflb: m2rflc is mvm4=0 & m2rflc { }
m2rfla: m2rflb" "D5 is D5 & mvm5=1 & m2rflb { D5 = *movemptr; movemptr = movemptr + 4; }
m2rfla: m2rflb is mvm5=0 & m2rflb { }
m2rfl9: m2rfla" "D6 is D6 & mvm6=1 & m2rfla { D6 = *movemptr; movemptr = movemptr + 4; }
m2rfl9: m2rfla is mvm6=0 & m2rfla { }
m2rfl8: m2rfl9" "D7 is D7 & mvm7=1 & m2rfl9 { D7 = *movemptr; movemptr = movemptr + 4; }
m2rfl8: m2rfl9 is mvm7=0 & m2rfl9 { }
m2rfl7: m2rfl8" "A0 is A0 & mvm8=1 & m2rfl8 { A0 = *movemptr; movemptr = movemptr + 4; }
m2rfl7: m2rfl8 is mvm8=0 & m2rfl8 { }
m2rfl6: m2rfl7" "A1 is A1 & mvm9=1 & m2rfl7 { A1 = *movemptr; movemptr = movemptr + 4; }
m2rfl6: m2rfl7 is mvm9=0 & m2rfl7 { }
m2rfl5: m2rfl6" "A2 is A2 & mvm10=1 & m2rfl6 { A2 = *movemptr; movemptr = movemptr + 4; }
m2rfl5: m2rfl6 is mvm10=0 & m2rfl6 { }
m2rfl4: m2rfl5" "A3 is A3 & mvm11=1 & m2rfl5 { A3 = *movemptr; movemptr = movemptr + 4; }
m2rfl4: m2rfl5 is mvm11=0 & m2rfl5 { }
m2rfl3: m2rfl4" "A4 is A4 & mvm12=1 & m2rfl4 { A4 = *movemptr; movemptr = movemptr + 4; }
m2rfl3: m2rfl4 is mvm12=0 & m2rfl4 { }
m2rfl2: m2rfl3" "A5 is A5 & mvm13=1 & m2rfl3 { A5 = *movemptr; movemptr = movemptr + 4; }
m2rfl2: m2rfl3 is mvm13=0 & m2rfl3 { }
m2rfl1: m2rfl2" "A6 is A6 & mvm14=1 & m2rfl2 { A6 = *movemptr; movemptr = movemptr + 4; }
m2rfl1: m2rfl2 is mvm14=0 & m2rfl2 { }
m2rfl0: { m2rfl1" "SP} is SP & mvm15=1 & m2rfl1 { SP = *movemptr; movemptr = movemptr + 4; }
m2rfl0: { m2rfl1} is mvm15=0 & m2rfl1 { }
movemOp: (regan) is mode=2 & regan { export regan; }
movemOp: (regan)+ is mode=3 & regan { export regan; }
movemOp: -(regan) is mode=4 & regan { export regan; }
movemOp: (d16, regan) is mode=5 & regan; fldpar ; d16 { local tmp = regan + d16; export tmp; }
movemOp: (extw) is mode=6 & regan; fldpar ; extw [ pcmode=0; regtfan=regan; ] {build extw; export extw; }
movemOp: (d16)".w" is mode=7 & regan=0; fldpar; d16 { local tmp:4 = d16; export tmp; }
movemOp: (d32)".l" is mode=7 & regan=1; fldpar; d32 { local tmp:4 = d32; export tmp; }
movemOp: (d16,PC) is op10=1 & mode=7 & regan=2; fldpar; d16 & PC { local tmp = inst_start + 4 + d16:4; export tmp; }
movemOp: (extw) is op10=1 & mode=7 & regan=3; fldpar; extw [ pcmode=1; ] { build extw; export extw; }
movemWrt: is (mode=3 | mode=4) & regan { regan = movemptr; }
movemWrt: is mode { }
:movem.w r2mfw0, movemOp is (opbig=0x48 & op67=2; r2mfw0) ... & movemOp { build movemOp; movemptr = movemOp; build r2mfw0; }
:movem.w r2mbw0, movemOp is (opbig=0x48 & op67=2 & mode=4 & movemWrt; r2mbw0) ... & movemOp { build movemOp; movemptr = movemOp; build r2mbw0; build movemWrt; }
:movem.l r2mfl0, movemOp is (opbig=0x48 & op67=3; r2mfl0) ... & movemOp { build movemOp; movemptr = movemOp; build r2mfl0; }
:movem.l r2mbl0, movemOp is (opbig=0x48 & op67=3 & mode=4 & movemWrt; r2mbl0) ... & movemOp { build movemOp; movemptr = movemOp; build r2mbl0; build movemWrt; }
:movem.w movemOp, m2rfw0 is (opbig=0x4c & op67=2 & movemWrt; m2rfw0) ... & movemOp { build movemOp; movemptr = movemOp; build m2rfw0; build movemWrt; }
:movem.l movemOp, m2rfl0 is (opbig=0x4c & op67=3 & movemWrt; m2rfl0) ... & movemOp { build movemOp; movemptr = movemOp; build m2rfl0; build movemWrt; }
epw: (d16, regan) is regan; d16 { local tmp = regan + d16; export tmp; }
:movep.w epw,reg9dnw is (op=0 & reg9dnw & op68=4 & op35=1) ... & epw { src:4 = epw; ho:1 = *:1 src; lo:1 = *:1(src+2); reg9dnw = (zext(ho) << 8) | zext(lo); }
:movep.l epw,reg9dn is (op=0 & reg9dn & op68=5 & op35=1) ... & epw { src:4 = epw; ho:1 = *:1 src; mu:1 = *:1(src+2); ml:1 = *(src+4); lo:1 = *:1(src+6); reg9dn = (zext(ho) << 24) | (zext(mu) << 16) | (zext(ml) << 8) | zext(lo); }
:movep.w reg9dnw,epw is (op=0 & reg9dnw & op68=6 & op35=1) ... & epw { src:4 = epw; local tmp = (reg9dnw >> 8); *:1 src = tmp:1; src = src+2; *:1 src = reg9dnw:1; }
:movep.l reg9dn,epw is (op=0 & reg9dn & op68=7 & op35=1)... & epw { src:4 = epw; local tmp = (reg9dn >> 24); *:1 src = tmp:1; src = src+2; tmp = (reg9dn >> 16); *:1 src = tmp:1; src = src+2; tmp = (reg9dn >> 8); *:1 src = tmp:1; src = src+2; *:1 src = reg9dn:1; }
:moveq d8base,reg9dn is op=7 & reg9dn & op8=0 & d8base { reg9dn = d8base; resflags(reg9dn); logflags(); }
:moves.b rreg,e2b is opbig=0x0e & op67=0 & mode & regan; rreg & wl=1; e2b [ regtsan=regan; savmod2=mode; ] { e2b = rreg:1; }
:moves.w rreg,e2w is opbig=0x0e & op67=1 & mode & regan; rreg & wl=1; e2w [ regtsan=regan; savmod2=mode; ] { e2w = rreg:2; }
:moves.l rreg,e2l is opbig=0x0e & op67=2 & mode & regan; rreg & wl=1; e2l [ regtsan=regan; savmod2=mode; ] { e2l = rreg; }
:moves.b e2b,rreg is opbig=0x0e & op67=0 & mode & regan; da=0 & rreg & wl=0; e2b [ regtsan=regan; savmod2=mode; ] { rreg = (rreg & 0xffffff00) | zext(e2b); }
:moves.w e2w,rreg is opbig=0x0e & op67=1 & mode & regan; da=0 & rreg & wl=0; e2w [ regtsan=regan; savmod2=mode; ] { rreg = (rreg & 0xffff0000) | zext(e2w); }
:moves.b e2b,rreg is opbig=0x0e & op67=0 & mode & regan; da=1 & rreg & wl=0; e2b [ regtsan=regan; savmod2=mode; ] { rreg = sext(e2b); }
:moves.w e2w,rreg is opbig=0x0e & op67=1 & mode & regan; da=1 & rreg & wl=0; e2w [ regtsan=regan; savmod2=mode; ] { rreg = sext(e2w); }
:moves.l e2l,rreg is opbig=0x0e & op67=2 & mode & regan; rreg & wl=0; e2l [ regtsan=regan; savmod2=mode; ] { rreg = e2l; }
:muls.w eaw,reg9dn is (op=12 & reg9dn & op68=7)... & eaw {
tmp1:4 = sext( reg9dn:2 );
tmp2:4 = sext(eaw);
reg9dn = tmp1 * tmp2;
resflags(reg9dn); CF=0; VF=0;}
:mulu.w eaw,reg9dn is (op=12 & reg9dn & op68=3)... & eaw {
tmp1:4 = zext( reg9dn:2 );
tmp2:4 = zext(eaw);
reg9dn = tmp1 * tmp2;
resflags(reg9dn);
CF=0; VF=0;
}
mulsize: "s.l" is divsgn=1 { }
mulsize: "u.l" is divsgn=0 { }
submul: regdq is regdq & divsgn=1 & divsz=0 { regdq = glbdenom * regdq; resflags(regdq); CF=0; }
submul: regdr-regdq is regdq & divsgn=1 & divsz=1 & regdr {
tmp1:8 = sext(glbdenom);
tmp2:8 = sext(regdq);
local res = tmp1 * tmp2;
regdq = res:4;
regdr = res(4);
resflags(res);
CF=0;
VF=0;
}
submul: regdq is regdq & divsgn=0 & divsz=0 { regdq = glbdenom * regdq; resflags(regdq); CF=0; }
submul: regdr-regdq is regdq & divsgn=0 & divsz=1 & regdr {
tmp1:8 = zext(glbdenom);
tmp2:8 = zext(regdq);
local res = tmp1 * tmp2;
regdq = res:4;
regdr = res(4);
resflags(res);
CF=0;
VF=0;
}
:mul^mulsize e2l,submul is opbig=0x4c & op67=0 & $(DAT_ALTER_ADDR_MODES); submul & mulsize; e2l [ savmod2=savmod1; regtsan=regtfan; ] { glbdenom=e2l; build submul; }
:nbcd eab is (opbig=0x48 & op67=0 & $(DAT_ALTER_ADDR_MODES))... & eab {
local tmp = eab;
CF = (tmp != 0) || (XF == 1);
tmp = 0 - tmp - XF;
eab = bcdAdjust(tmp);
bcdflags(tmp);
}
# NB: For the neg insn the CF carry flag is not set like other insns, from the manual:
# XF - Set the same as the carry bit.
# NF - Set if the result is negative; cleared otherwise.
# ZF - Set if the result is zero; cleared otherwise.
# VF - Set if an overflow occurs; cleared otherwise.
# CF - Cleared if the result is zero; set otherwise.
macro negFlags(op1) {
VF = sborrow(0, op1);
}
macro negResFlags(result) {
NF = result s< 0;
CF = result != 0;
XF = CF;
ZF = result == 0;
}
:neg.b eab is (opbig=0x44 & op67=0 & $(DAT_ALTER_ADDR_MODES))... & eab
{ o2:1=eab; negFlags(o2); o2 = -o2; eab=o2; negResFlags(o2); }
:neg.w eaw is (opbig=0x44 & op67=1 & $(DAT_ALTER_ADDR_MODES))... & eaw
{ o2:2=eaw; negFlags(o2); o2 = -o2; eaw=o2; negResFlags(o2); }
:neg.l eal is (opbig=0x44 & op67=2 & $(DAT_ALTER_ADDR_MODES))... & eal
{ o2:4=eal; negFlags(o2); o2 = -o2; eal=o2; negResFlags(o2); }
# NB: For the negx insn the CF and ZF flags are not set like other insns, from the manual:
# XF - Set the same as the carry bit.
# NF - Set if the result is negative; cleared otherwise.
# ZF - Cleared if the result is nonzero; unchanged otherwise.
# VF - Set if an overflow occurs; cleared otherwise.
# CF - Set if borrow occurs; otherwise.
:negx.b eab is (opbig=0x40 & op67=0 & $(DAT_ALTER_ADDR_MODES))... & eab
{ local tmp = eab + XF; negxsubflags(tmp); tmp = -tmp; eab=tmp; extendedResultFlags(tmp); }
:negx.w eaw is (opbig=0x40 & op67=1 & $(DAT_ALTER_ADDR_MODES))... & eaw
{ local tmp = eaw + zext(XF); negxsubflags(tmp); tmp = -tmp; eaw=tmp; extendedResultFlags(tmp); }
:negx.l eal is (opbig=0x40 & op67=2 & $(DAT_ALTER_ADDR_MODES))... & eal
{ local tmp = eal + zext(XF); negxsubflags(tmp); tmp = -tmp; eal=tmp; extendedResultFlags(tmp); }
:nop is opbig=0x4e & op37=14 & op02=1 { }
:not.b eab is (opbig=0x46 & op67=0 & $(DAT_ALTER_ADDR_MODES))... & eab { local tmp = eab; logflags(); tmp = ~tmp; eab = tmp; resflags(tmp); }
:not.w eaw is (opbig=0x46 & op67=1 & $(DAT_ALTER_ADDR_MODES))... & eaw { local tmp = eaw; logflags(); tmp = ~tmp; eaw = tmp; resflags(tmp); }
:not.l eal is (opbig=0x46 & op67=2 & $(DAT_ALTER_ADDR_MODES))... & eal { local tmp = eal; logflags(); tmp = ~tmp; eal = tmp; resflags(tmp); }
:or.b eab,reg9dnb is (op=8 & reg9dnb & op68=0 & $(DAT_ALTER_ADDR_MODES))... & eab { or(eab, reg9dnb); }
:or.w eaw,reg9dnw is (op=8 & reg9dnw & op68=1 & $(DAT_ALTER_ADDR_MODES))... & eaw { or(eaw, reg9dnw); }
:or.l eal,reg9dn is (op=8 & reg9dn & op68=2 & $(DAT_ALTER_ADDR_MODES))... & eal { or(eal, reg9dn); }
:or.b reg9dnb,eab is (op=8 & reg9dnb & op68=4 & $(MEM_ALTER_ADDR_MODES))... & eab { or(reg9dnb, eab); }
:or.w reg9dnw,eaw is (op=8 & reg9dnw & op68=5 & $(MEM_ALTER_ADDR_MODES))... & eaw { or(reg9dnw, eaw); }
:or.l reg9dn,eal is (op=8 & reg9dn & op68=6 & $(MEM_ALTER_ADDR_MODES))... & eal { or(reg9dn, eal); }
:ori.b const8,e2b is opbig=0 & op67=0 & $(DAT_ALTER_ADDR_MODES); const8; e2b [ savmod2=savmod1; regtsan=regtfan; ] { or(const8, e2b); }
:ori.w const16,e2w is opbig=0 & op67=1 & $(DAT_ALTER_ADDR_MODES); const16; e2w [ savmod2=savmod1; regtsan=regtfan; ] { or(const16, e2w); }
:ori.l const32,e2l is opbig=0 & op67=2 & $(DAT_ALTER_ADDR_MODES); const32; e2l [ savmod2=savmod1; regtsan=regtfan; ] { or(const32, e2l); }
:ori const8,"CCR" is opbig=0 & op37=7 & op02=4; const8 { packflags(SR); SR=SR|zext(const8); unpackflags(SR); }
:ori const16,SR is SR; opbig=0x00 & d8base=0x7c; const16 { packflags(SR); SR=SR|const16; unpackflags(SR); }
:pack Tyw,Txw,const16 is op=8 & op48=20 & Txw & Tyw & rmbit=0; const16 {
local value = (Tyw & 0x0F0F) + const16;
Txw = (Txw & 0xFF00) | ((value & 0x0F00) >> 4) | (value & 0x000F);
}
:pack Tyw,Txb,const16 is op=8 & op48=20 & Tyw & Txb & rmbit=1; const16 {
local value = (Tyw & 0x0F0F) + const16;
local result:2 = ((value & 0x0F00) >> 4) | (value & 0x000F);
Txb = result:1;
}
:pea eaptr is (opbig=0x48 & op67=1 & $(CTL_ADDR_MODES))... & eaptr { value:4 = eaptr; SP = SP-4; *SP = value; }
@ifdef MC68040
:pflushn regPlus is opbig=0xf5 & op67=0 & op5=0 & op34=0 & regPlus unimpl
:pflush regPlus is opbig=0xf5 & op67=0 & op5=0 & op34=1 & regPlus unimpl
:pflushan is opbig=0xf5 & op67=0 & op5=0 & op34=2 & regan=0 unimpl
:pflusha is opbig=0xf5 & op67=0 & op5=0 & op34=3 & regan=0 unimpl
@endif # MC68040
@ifdef MC68030
:pflusha is opbig=0xf0 & op67=0 & mode=0 & regan=0; opx015=0x2400 unimpl
FC: SFC is fc4=0 & fc3=0 & fc02=0 & SFC { export SFC; }
FC: DFC is fc4=0 & fc3=0 & fc02=1 & DFC { export DFC; }
FC: regdc is fc4=0 & fc3=1 & regdc { export regdc; }
FC: "#"^fc03 is fc4=1 & fc3=0 & fc03 { export *[const]:4 fc03; }
FCmask: "#"^fcmask is fcmask { export *[const]:1 fcmask; }
:pflush FC,FCmask is opbig=0xf0 & op67=0 & mode=0 & regan=0; bigopx=0x30 & FCmask & FC unimpl
:pflush FC,FCmask,e2l is opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); bigopx=0x38 & FCmask & FC; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:ploadr FC,e2l is opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx515=0x110 & FC; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:ploadw FC,e2l is opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx515=0x100 & FC; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.l TC,e2l is TC & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=0 & rwx=1 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.l e2l,TC is TC & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=0 & rwx=0 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmovefd.l e2l,TC is TC & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=0 & rwx=0 & fbit=1 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.d SRP,e2d is SRP & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=2 & rwx=1 & fbit=0 & d8=0; e2d [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.d e2d,SRP is SRP & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=2 & rwx=0 & fbit=0 & d8=0; e2d [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmovefd.d e2d,SRP is SRP & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=2 & rwx=0 & fbit=1 & d8=0; e2d [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.d CRP,e2d is CRP & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=3 & rwx=1 & fbit=0 & d8=0; e2d [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.d e2d,CRP is CRP & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=3 & rwx=0 & fbit=0 & d8=0; e2d [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmovefd.d e2d,CRP is CRP & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=2 & mregn=3 & rwx=0 & fbit=1 & d8=0; e2d [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.w MMUSR,e2w is MMUSR & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=3 & mregn=0 & rwx=1 & fbit=0 & d8=0; e2w [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.w e2w,MMUSR is MMUSR & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=3 & mregn=0 & rwx=0 & fbit=0 & d8=0; e2w [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.l TT0,e2l is TT0 & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=2 & rwx=1 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.l e2l,TT0 is TT0 & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=2 & rwx=0 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmovefd.l e2l,TT0 is TT0 & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=2 & rwx=0 & fbit=1 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.l TT1,e2l is TT1 & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=3 & rwx=1 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmove.l e2l,TT1 is TT1 & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=3 & rwx=0 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:pmovefd.l e2l,TT1 is TT1 & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=3 & rwx=0 & fbit=1 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
#TODO: MC68EC030 only - conflicts with MMUSR form above
#:pmove.w ACUSR,e2w is ACUSR & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=3 & mregn=0 & rwx=1 & fbit=0 & d8=0; e2w [ savmod2=savmod1; regtsan=regtfan; ] unimpl
#:pmove.w e2w,ACUSR is ACUSR & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=3 & mregn=0 & rwx=0 & fbit=0 & d8=0; e2w [ savmod2=savmod1; regtsan=regtfan; ] unimpl
#TODO: MC68EC030 only - - conflicts with TTx form above
#:pmove.l ACx,e2l is ACx & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=? & rwx=1 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
#:pmove.l e2l,ACx is ACx & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=? & rwx=0 & fbit=0 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
#:pmovefd.l e2l,ACx is ACx & opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=0 & mregn=? & rwx=0 & fbit=1 & d8=0; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
@endif # MC68030
#TODO: PMOVE PMMU Register - MC68851 only
#TODO: PRESTORE PMMU Register - MC68851 only
#TODO: PSAVE PMMU Register - MC68851 only
#TODO: PScc PMMU Register - MC68851 only
@ifdef MC68030
ptestLevel: "#"^mregn is mregn { export *[const]:1 mregn; }
:ptestr FC,e2l,ptestLevel is opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=4 & ptestLevel & rwx=1 & fbit=0 & aregx=0 & FC; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:ptestr FC,e2l,ptestLevel,aregx is opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=4 & ptestLevel & rwx=1 & fbit=1 & aregx & FC; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:ptestw FC,e2l,ptestLevel is opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=4 & ptestLevel & rwx=0 & fbit=0 & aregx=0 & FC; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
:ptestw FC,e2l,ptestLevel,aregx is opbig=0xf0 & op67=0 & $(CTL_ADDR_MODES); opx1315=4 & ptestLevel & rwx=0 & fbit=1 & aregx & FC; e2l [ savmod2=savmod1; regtsan=regtfan; ] unimpl
@endif # MC68030
#TODO: PTEST FC,<ea> - MC68EX030 only
#TODO: PTEST FC,<ea>,#level,(An) - MC68851 only
@ifdef MC68040
:ptestr regPlus is opbig=0xf5 & op67=1 & op35=5 & regPlus unimpl
:ptestw regPlus is opbig=0xf5 & op67=1 & op35=1 & regPlus unimpl
@endif # MC68040
#TODO: PTRAPcc - MC68851 only
#TODO: PVALID - MC68851 only
:reset is d16=0x4e70 { reset(); }
:rol.b cntreg,regdnb is op=14 & cntreg & op8=1 & op67=0 & op34=3 & regdnb { rotateLeft(cntreg, regdnb, 8); }
:rol.w cntreg,regdnw is op=14 & cntreg & op8=1 & op67=1 & op34=3 & regdnw { rotateLeft(cntreg, regdnw, 16); }
:rol.l cntreg,regdn is op=14 & cntreg & op8=1 & op67=2 & op34=3 & regdn { rotateLeft(cntreg, regdn, 32); }
:rol eaw is (opbig=0xe7 & op67=3 & $(MEM_ALTER_ADDR_MODES)) ... & eaw {
local value:2 = eaw;
value = (value << 1) | (value >> 15);
getbit(CF, value, 0);
resflags(value);
eaw = value;
VF = 0;
}
:ror.b cntreg,regdnb is op=14 & cntreg & op8=0 & op67=0 & op34=3 & regdnb { rotateRight(cntreg, regdnb, 8); }
:ror.w cntreg,regdnw is op=14 & cntreg & op8=0 & op67=1 & op34=3 & regdnw { rotateRight(cntreg, regdnw, 16); }
:ror.l cntreg,regdn is op=14 & cntreg & op8=0 & op67=2 & op34=3 & regdn { rotateRight(cntreg, regdn, 32); }
:ror eaw is (opbig=0xe6 & op67=3 & $(MEM_ALTER_ADDR_MODES)) ... & eaw {
local value:2 = eaw;
value = (value << 15) | (value >> 1);
getbit(CF, value, 15);
resflags(value);
eaw = value;
VF = 0;
}
:roxl.b cntreg,regdnb is op=14 & cntreg & op8=1 & op67=0 & op34=2 & regdnb { rotateLeftExtended(cntreg, regdnb, 8); }
:roxl.w cntreg,regdnw is op=14 & cntreg & op8=1 & op67=1 & op34=2 & regdnw { rotateLeftExtended(cntreg, regdnw, 16); }
:roxl.l cntreg,regdn is op=14 & cntreg & op8=1 & op67=2 & op34=2 & regdn { rotateLeftExtended(cntreg, regdn, 32); }
:roxl eaw is (opbig=0xe5 & op67=3 & $(MEM_ALTER_ADDR_MODES)) ... & eaw {
local value:2 = eaw;
local xflag = (value & 0x8000) != 0;
value = (value << 1) | zext(XF);
resflags(value);
eaw = value;
VF = 0;
XF = xflag;
CF = XF;
}
:roxr.b cntreg,regdnb is op=14 & cntreg & op8=0 & op67=0 & op34=2 & regdnb { rotateRightExtended(cntreg, regdnb, 8); }
:roxr.w cntreg,regdnw is op=14 & cntreg & op8=0 & op67=1 & op34=2 & regdnw { rotateRightExtended(cntreg, regdnw, 16); }
:roxr.l cntreg,regdn is op=14 & cntreg & op8=0 & op67=2 & op34=2 & regdn { rotateRightExtended(cntreg, regdn
gitextract_s1iu7cno/
├── .clang-format
├── .github/
│ ├── ISSUE_TEMPLATE/
│ │ ├── bug-report.yml
│ │ ├── config.yml
│ │ ├── feature-request.yml
│ │ └── question.yml
│ ├── dependabot.yml
│ └── workflows/
│ └── build.yml
├── .gitignore
├── .pre-commit-config.yaml
├── .pylintrc
├── .readthedocs.yml
├── CMakeLists.txt
├── LICENSE.txt
├── MANIFEST.in
├── README.md
├── docs/
│ ├── Makefile
│ ├── api.rst
│ ├── conf.py
│ ├── guide.rst
│ ├── index.rst
│ ├── languages.rst
│ └── make.bat
├── pypcode/
│ ├── __init__.py
│ ├── __main__.py
│ ├── __version__.py
│ ├── docs/
│ │ └── ghidra/
│ │ ├── DISCLAIMER.md
│ │ ├── LICENSE
│ │ └── NOTICE
│ ├── printing.py
│ ├── processors/
│ │ ├── 6502/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 6502.cspec
│ │ │ │ ├── 6502.ldefs
│ │ │ │ ├── 6502.pspec
│ │ │ │ ├── 6502.slaspec
│ │ │ │ └── 65c02.slaspec
│ │ │ └── manuals/
│ │ │ ├── 6502.idx
│ │ │ └── 65c02.idx
│ │ ├── 68000/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 68000.cspec
│ │ │ │ ├── 68000.dwarf
│ │ │ │ ├── 68000.ldefs
│ │ │ │ ├── 68000.opinion
│ │ │ │ ├── 68000.pspec
│ │ │ │ ├── 68000.sinc
│ │ │ │ ├── 68000_register.cspec
│ │ │ │ ├── 68020.slaspec
│ │ │ │ ├── 68030.slaspec
│ │ │ │ ├── 68040.slaspec
│ │ │ │ └── coldfire.slaspec
│ │ │ ├── manuals/
│ │ │ │ └── 68000.idx
│ │ │ └── patterns/
│ │ │ ├── 68000_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── 8048/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 8048.cspec
│ │ │ │ ├── 8048.ldefs
│ │ │ │ ├── 8048.pspec
│ │ │ │ └── 8048.slaspec
│ │ │ └── manuals/
│ │ │ └── 8048.idx
│ │ ├── 8051/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 80251.cspec
│ │ │ │ ├── 80251.pspec
│ │ │ │ ├── 80251.sinc
│ │ │ │ ├── 80251.slaspec
│ │ │ │ ├── 80390.cspec
│ │ │ │ ├── 80390.slaspec
│ │ │ │ ├── 8051.cspec
│ │ │ │ ├── 8051.ldefs
│ │ │ │ ├── 8051.opinion
│ │ │ │ ├── 8051.pspec
│ │ │ │ ├── 8051.slaspec
│ │ │ │ ├── 8051_archimedes.cspec
│ │ │ │ ├── 8051_main.sinc
│ │ │ │ ├── mx51.cspec
│ │ │ │ ├── mx51.pspec
│ │ │ │ ├── mx51.sinc
│ │ │ │ ├── mx51.slaspec
│ │ │ │ └── old/
│ │ │ │ ├── 8051v1.lang
│ │ │ │ └── 8051v1.trans
│ │ │ └── manuals/
│ │ │ └── 8051.idx
│ │ ├── 8085/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── 8085.cspec
│ │ │ ├── 8085.ldefs
│ │ │ ├── 8085.pspec
│ │ │ └── 8085.slaspec
│ │ ├── AARCH64/
│ │ │ └── data/
│ │ │ ├── aarch64-pltThunks.xml
│ │ │ ├── languages/
│ │ │ │ ├── AARCH64.cspec
│ │ │ │ ├── AARCH64.dwarf
│ │ │ │ ├── AARCH64.ldefs
│ │ │ │ ├── AARCH64.opinion
│ │ │ │ ├── AARCH64.pspec
│ │ │ │ ├── AARCH64.slaspec
│ │ │ │ ├── AARCH64BE.slaspec
│ │ │ │ ├── AARCH64_AMXext.sinc
│ │ │ │ ├── AARCH64_AppleSilicon.slaspec
│ │ │ │ ├── AARCH64_apple.cspec
│ │ │ │ ├── AARCH64_base_PACoptions.sinc
│ │ │ │ ├── AARCH64_golang.cspec
│ │ │ │ ├── AARCH64_golang.register.info
│ │ │ │ ├── AARCH64_ilp32.cspec
│ │ │ │ ├── AARCH64_swift.cspec
│ │ │ │ ├── AARCH64_win.cspec
│ │ │ │ ├── AARCH64base.sinc
│ │ │ │ ├── AARCH64instructions.sinc
│ │ │ │ ├── AARCH64ldst.sinc
│ │ │ │ ├── AARCH64neon.sinc
│ │ │ │ ├── AARCH64sve.sinc
│ │ │ │ └── AppleSilicon.ldefs
│ │ │ ├── manuals/
│ │ │ │ └── AARCH64.idx
│ │ │ └── patterns/
│ │ │ ├── AARCH64_LE_patterns.xml
│ │ │ ├── AARCH64_win_patterns.xml
│ │ │ ├── patternconstraints.xml
│ │ │ └── prepatternconstraints.xml
│ │ ├── ARM/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── ARM.cspec
│ │ │ │ ├── ARM.dwarf
│ │ │ │ ├── ARM.gdis
│ │ │ │ ├── ARM.ldefs
│ │ │ │ ├── ARM.opinion
│ │ │ │ ├── ARM.sinc
│ │ │ │ ├── ARM4_be.slaspec
│ │ │ │ ├── ARM4_le.slaspec
│ │ │ │ ├── ARM4t_be.slaspec
│ │ │ │ ├── ARM4t_le.slaspec
│ │ │ │ ├── ARM5_be.slaspec
│ │ │ │ ├── ARM5_le.slaspec
│ │ │ │ ├── ARM5t_be.slaspec
│ │ │ │ ├── ARM5t_le.slaspec
│ │ │ │ ├── ARM6_be.slaspec
│ │ │ │ ├── ARM6_le.slaspec
│ │ │ │ ├── ARM7_be.slaspec
│ │ │ │ ├── ARM7_le.slaspec
│ │ │ │ ├── ARM8_be.slaspec
│ │ │ │ ├── ARM8_le.slaspec
│ │ │ │ ├── ARM8m_be.slaspec
│ │ │ │ ├── ARM8m_le.slaspec
│ │ │ │ ├── ARMCortex.pspec
│ │ │ │ ├── ARMTHUMBinstructions.sinc
│ │ │ │ ├── ARM_CDE.sinc
│ │ │ │ ├── ARM_apcs.cspec
│ │ │ │ ├── ARM_v45.cspec
│ │ │ │ ├── ARM_v45.pspec
│ │ │ │ ├── ARM_win.cspec
│ │ │ │ ├── ARMinstructions.sinc
│ │ │ │ ├── ARMneon.dwarf
│ │ │ │ ├── ARMneon.sinc
│ │ │ │ ├── ARMt.pspec
│ │ │ │ ├── ARMtTHUMB.pspec
│ │ │ │ ├── ARMt_v45.pspec
│ │ │ │ ├── ARMt_v6.pspec
│ │ │ │ ├── ARMv8.sinc
│ │ │ │ └── old/
│ │ │ │ ├── ARMv5.lang
│ │ │ │ ├── ARMv5.trans
│ │ │ │ ├── THUMBv2.lang
│ │ │ │ └── THUMBv2.trans
│ │ │ ├── manuals/
│ │ │ │ └── ARM.idx
│ │ │ └── patterns/
│ │ │ ├── ARM_BE_patterns.xml
│ │ │ ├── ARM_LE_patterns.xml
│ │ │ ├── ARM_switch_patterns.xml
│ │ │ ├── patternconstraints.xml
│ │ │ └── prepatternconstraints.xml
│ │ ├── Atmel/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── atmega256.pspec
│ │ │ │ ├── avr32.opinion
│ │ │ │ ├── avr32a.cspec
│ │ │ │ ├── avr32a.ldefs
│ │ │ │ ├── avr32a.pspec
│ │ │ │ ├── avr32a.slaspec
│ │ │ │ ├── avr32a_arithmetic_operations.sinc
│ │ │ │ ├── avr32a_autogen.sinc
│ │ │ │ ├── avr32a_bit_operations.sinc
│ │ │ │ ├── avr32a_coprocessor_interface.sinc
│ │ │ │ ├── avr32a_data_transfer.sinc
│ │ │ │ ├── avr32a_dsp_operations.sinc
│ │ │ │ ├── avr32a_dsp_operations2.sinc
│ │ │ │ ├── avr32a_instruction_flow.sinc
│ │ │ │ ├── avr32a_logic_operations.sinc
│ │ │ │ ├── avr32a_multiplication_operations.sinc
│ │ │ │ ├── avr32a_shift_operations.sinc
│ │ │ │ ├── avr32a_simd_operations.sinc
│ │ │ │ ├── avr32a_system_control.sinc
│ │ │ │ ├── avr8.ldefs
│ │ │ │ ├── avr8.opinion
│ │ │ │ ├── avr8.pspec
│ │ │ │ ├── avr8.sinc
│ │ │ │ ├── avr8.slaspec
│ │ │ │ ├── avr8e.slaspec
│ │ │ │ ├── avr8egcc.cspec
│ │ │ │ ├── avr8eind.slaspec
│ │ │ │ ├── avr8gcc.cspec
│ │ │ │ ├── avr8iarV1.cspec
│ │ │ │ ├── avr8imgCraftV8.cspec
│ │ │ │ ├── avr8xmega.pspec
│ │ │ │ └── avr8xmega.slaspec
│ │ │ ├── manuals/
│ │ │ │ ├── AVR32.idx
│ │ │ │ └── AVR8.idx
│ │ │ └── patterns/
│ │ │ ├── AVR8_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── BPF/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── BPF.cspec
│ │ │ ├── BPF.ldefs
│ │ │ ├── BPF.pspec
│ │ │ ├── BPF.sinc
│ │ │ └── BPF_le.slaspec
│ │ ├── CP1600/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── CP1600.cspec
│ │ │ ├── CP1600.ldefs
│ │ │ ├── CP1600.opinion
│ │ │ ├── CP1600.pspec
│ │ │ └── CP1600.slaspec
│ │ ├── CR16/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── CR16.cspec
│ │ │ │ ├── CR16.ldefs
│ │ │ │ ├── CR16.opinion
│ │ │ │ ├── CR16.pspec
│ │ │ │ ├── CR16B.sinc
│ │ │ │ ├── CR16B.slaspec
│ │ │ │ ├── CR16C.sinc
│ │ │ │ └── CR16C.slaspec
│ │ │ └── manuals/
│ │ │ └── CR16.idx
│ │ ├── DATA/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── data-be-64.slaspec
│ │ │ ├── data-le-64.slaspec
│ │ │ ├── data-ptr16.cspec
│ │ │ ├── data-ptr32.cspec
│ │ │ ├── data-ptr64.cspec
│ │ │ ├── data.ldefs
│ │ │ ├── data.pspec
│ │ │ └── data.sinc
│ │ ├── Dalvik/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── Dalvik.ldefs
│ │ │ ├── Dalvik.opinion
│ │ │ ├── Dalvik_Base.cspec
│ │ │ ├── Dalvik_Base.pspec
│ │ │ ├── Dalvik_Base.sinc
│ │ │ ├── Dalvik_Base.slaspec
│ │ │ ├── Dalvik_DEX_Android10.slaspec
│ │ │ ├── Dalvik_DEX_Android11.slaspec
│ │ │ ├── Dalvik_DEX_Android12.slaspec
│ │ │ ├── Dalvik_DEX_KitKat.slaspec
│ │ │ ├── Dalvik_DEX_Lollipop.slaspec
│ │ │ ├── Dalvik_DEX_Marshmallow.slaspec
│ │ │ ├── Dalvik_DEX_Nougat.slaspec
│ │ │ ├── Dalvik_DEX_Oreo.slaspec
│ │ │ ├── Dalvik_DEX_Pie.slaspec
│ │ │ ├── Dalvik_ODEX_KitKat.slaspec
│ │ │ ├── Dalvik_OpCode_3E_43_unused.sinc
│ │ │ ├── Dalvik_OpCode_73_return_void_barrier.sinc
│ │ │ ├── Dalvik_OpCode_73_return_void_no_barrier.sinc
│ │ │ ├── Dalvik_OpCode_73_unused.sinc
│ │ │ ├── Dalvik_OpCode_79_unused.sinc
│ │ │ ├── Dalvik_OpCode_7A_unused.sinc
│ │ │ ├── Dalvik_OpCode_E3_EA_dex.sinc
│ │ │ ├── Dalvik_OpCode_E3_EA_unused.sinc
│ │ │ ├── Dalvik_OpCode_EB_F2_iput_iget.sinc
│ │ │ ├── Dalvik_OpCode_EB_F2_unused.sinc
│ │ │ ├── Dalvik_OpCode_F3_unused.sinc
│ │ │ ├── Dalvik_OpCode_F4_unused.sinc
│ │ │ ├── Dalvik_OpCode_F5_unused.sinc
│ │ │ ├── Dalvik_OpCode_F6_unused.sinc
│ │ │ ├── Dalvik_OpCode_F7_unused.sinc
│ │ │ ├── Dalvik_OpCode_F8_unused.sinc
│ │ │ ├── Dalvik_OpCode_F9_unused.sinc
│ │ │ ├── Dalvik_OpCode_FA_FD_dex.sinc
│ │ │ ├── Dalvik_OpCode_FA_unused.sinc
│ │ │ ├── Dalvik_OpCode_FB_unused.sinc
│ │ │ ├── Dalvik_OpCode_FC_unused.sinc
│ │ │ ├── Dalvik_OpCode_FD_unused.sinc
│ │ │ ├── Dalvik_OpCode_FE_FF_dex.sinc
│ │ │ ├── Dalvik_OpCode_FE_unused.sinc
│ │ │ └── Dalvik_OpCode_FF_unused.sinc
│ │ ├── HCS08/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── HC05-M68HC05TB.pspec
│ │ │ │ ├── HC05.cspec
│ │ │ │ ├── HC05.ldefs
│ │ │ │ ├── HC05.pspec
│ │ │ │ ├── HC05.slaspec
│ │ │ │ ├── HC08-MC68HC908QY4.pspec
│ │ │ │ ├── HC08.ldefs
│ │ │ │ ├── HC08.pspec
│ │ │ │ ├── HC08.slaspec
│ │ │ │ ├── HCS08-MC9S08GB60.pspec
│ │ │ │ ├── HCS08.cspec
│ │ │ │ ├── HCS08.ldefs
│ │ │ │ ├── HCS08.opinion
│ │ │ │ ├── HCS08.pspec
│ │ │ │ ├── HCS08.slaspec
│ │ │ │ └── HCS_HC.sinc
│ │ │ ├── manuals/
│ │ │ │ ├── HC05.idx
│ │ │ │ ├── HC08.idx
│ │ │ │ └── HCS08.idx
│ │ │ └── test-vectors/
│ │ │ ├── HC05_tv.s
│ │ │ ├── HC08_tv.s
│ │ │ └── HCS08_tv.s
│ │ ├── HCS12/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── HC12.cspec
│ │ │ │ ├── HC12.pspec
│ │ │ │ ├── HC12.slaspec
│ │ │ │ ├── HCS12.cspec
│ │ │ │ ├── HCS12.ldefs
│ │ │ │ ├── HCS12.opinion
│ │ │ │ ├── HCS12.pspec
│ │ │ │ ├── HCS12.slaspec
│ │ │ │ ├── HCS12X.cspec
│ │ │ │ ├── HCS12X.pspec
│ │ │ │ ├── HCS12X.slaspec
│ │ │ │ ├── HCS_HC12.sinc
│ │ │ │ └── XGATE.sinc
│ │ │ └── manuals/
│ │ │ └── HCS12.idx
│ │ ├── JVM/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── JVM.cspec
│ │ │ │ ├── JVM.ldefs
│ │ │ │ ├── JVM.opinion
│ │ │ │ ├── JVM.pspec
│ │ │ │ └── JVM.slaspec
│ │ │ └── manuals/
│ │ │ └── JVM.idx
│ │ ├── Loongarch/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── ilp32d.cspec
│ │ │ │ ├── ilp32f.cspec
│ │ │ │ ├── lasx.sinc
│ │ │ │ ├── lbt.sinc
│ │ │ │ ├── loongarch.ldefs
│ │ │ │ ├── loongarch.opinion
│ │ │ │ ├── loongarch32.pspec
│ │ │ │ ├── loongarch32_f32.slaspec
│ │ │ │ ├── loongarch32_f64.slaspec
│ │ │ │ ├── loongarch32_instructions.sinc
│ │ │ │ ├── loongarch64.pspec
│ │ │ │ ├── loongarch64_f32.slaspec
│ │ │ │ ├── loongarch64_f64.slaspec
│ │ │ │ ├── loongarch64_instructions.sinc
│ │ │ │ ├── loongarch_double.sinc
│ │ │ │ ├── loongarch_float.sinc
│ │ │ │ ├── loongarch_main.sinc
│ │ │ │ ├── lp64d.cspec
│ │ │ │ ├── lp64f.cspec
│ │ │ │ ├── lsx.sinc
│ │ │ │ └── lvz.sinc
│ │ │ ├── manuals/
│ │ │ │ └── loongarch.idx
│ │ │ └── patterns/
│ │ │ ├── loongarch_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── M16C/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── M16C_60.cspec
│ │ │ │ ├── M16C_60.ldefs
│ │ │ │ ├── M16C_60.pspec
│ │ │ │ ├── M16C_60.slaspec
│ │ │ │ ├── M16C_80.cspec
│ │ │ │ ├── M16C_80.ldefs
│ │ │ │ ├── M16C_80.pspec
│ │ │ │ └── M16C_80.slaspec
│ │ │ └── manuals/
│ │ │ ├── M16C_60.idx
│ │ │ └── M16C_80.idx
│ │ ├── M8C/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── m8c.cspec
│ │ │ ├── m8c.ldefs
│ │ │ ├── m8c.opinion
│ │ │ ├── m8c.pspec
│ │ │ └── m8c.slaspec
│ │ ├── MC6800/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 6800.ldefs
│ │ │ │ ├── 6805.cspec
│ │ │ │ ├── 6805.ldefs
│ │ │ │ ├── 6805.pspec
│ │ │ │ ├── 6805.slaspec
│ │ │ │ ├── 6809.cspec
│ │ │ │ ├── 6809.pspec
│ │ │ │ ├── 6809.slaspec
│ │ │ │ ├── 6x09.sinc
│ │ │ │ ├── 6x09_exg_tfr.sinc
│ │ │ │ ├── 6x09_pull.sinc
│ │ │ │ ├── 6x09_push.sinc
│ │ │ │ └── H6309.slaspec
│ │ │ └── manuals/
│ │ │ └── 6809.idx
│ │ ├── MCS96/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── MCS96.cspec
│ │ │ │ ├── MCS96.ldefs
│ │ │ │ ├── MCS96.pspec
│ │ │ │ ├── MCS96.sinc
│ │ │ │ └── MCS96.slaspec
│ │ │ └── manuals/
│ │ │ └── MCS96.idx
│ │ ├── MIPS/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── MIPS.opinion
│ │ │ │ ├── mips.dwarf
│ │ │ │ ├── mips.ldefs
│ │ │ │ ├── mips.sinc
│ │ │ │ ├── mips16.sinc
│ │ │ │ ├── mips32.pspec
│ │ │ │ ├── mips32Instructions.sinc
│ │ │ │ ├── mips32R6.pspec
│ │ │ │ ├── mips32R6be.slaspec
│ │ │ │ ├── mips32R6le.slaspec
│ │ │ │ ├── mips32_eabi.cspec
│ │ │ │ ├── mips32_fp64.cspec
│ │ │ │ ├── mips32be.cspec
│ │ │ │ ├── mips32be.slaspec
│ │ │ │ ├── mips32le.cspec
│ │ │ │ ├── mips32le.slaspec
│ │ │ │ ├── mips32micro.pspec
│ │ │ │ ├── mips64.pspec
│ │ │ │ ├── mips64Instructions.sinc
│ │ │ │ ├── mips64R6.pspec
│ │ │ │ ├── mips64_32_n32.cspec
│ │ │ │ ├── mips64_32_o32.cspec
│ │ │ │ ├── mips64_32_o64.cspec
│ │ │ │ ├── mips64be.cspec
│ │ │ │ ├── mips64be.slaspec
│ │ │ │ ├── mips64le.cspec
│ │ │ │ ├── mips64le.slaspec
│ │ │ │ ├── mips64micro.pspec
│ │ │ │ ├── mips_dsp.sinc
│ │ │ │ ├── mips_mt.sinc
│ │ │ │ ├── mipsfloat.sinc
│ │ │ │ └── mipsmicro.sinc
│ │ │ ├── manuals/
│ │ │ │ ├── MIPS.idx
│ │ │ │ ├── mipsM16.idx
│ │ │ │ ├── mipsMic.idx
│ │ │ │ └── r4000.idx
│ │ │ └── patterns/
│ │ │ ├── MIPS_BE_patterns.xml
│ │ │ ├── MIPS_LE_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── NDS32/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── lsmw.sinc
│ │ │ │ ├── nds32.cspec
│ │ │ │ ├── nds32.dwarf
│ │ │ │ ├── nds32.ldefs
│ │ │ │ ├── nds32.opinion
│ │ │ │ ├── nds32.pspec
│ │ │ │ ├── nds32.sinc
│ │ │ │ ├── nds32be.slaspec
│ │ │ │ └── nds32le.slaspec
│ │ │ └── patterns/
│ │ │ ├── nds32_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── PA-RISC/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── pa-risc.ldefs
│ │ │ │ ├── pa-risc.opinion
│ │ │ │ ├── pa-risc.sinc
│ │ │ │ ├── pa-risc32.cspec
│ │ │ │ ├── pa-risc32.pspec
│ │ │ │ ├── pa-risc32be.slaspec
│ │ │ │ └── pa-riscInstructions.sinc
│ │ │ ├── manuals/
│ │ │ │ └── pa11_acd.idx
│ │ │ └── patterns/
│ │ │ ├── pa-risc_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── PIC/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── PIC24.cspec
│ │ │ │ ├── PIC24.ldefs
│ │ │ │ ├── PIC24.opinion
│ │ │ │ ├── PIC24.pspec
│ │ │ │ ├── PIC24.sinc
│ │ │ │ ├── PIC24E.slaspec
│ │ │ │ ├── PIC24F.slaspec
│ │ │ │ ├── PIC24H.slaspec
│ │ │ │ ├── PIC30.dwarf
│ │ │ │ ├── PIC33.dwarf
│ │ │ │ ├── dsPIC30F.slaspec
│ │ │ │ ├── dsPIC33C.slaspec
│ │ │ │ ├── dsPIC33E.slaspec
│ │ │ │ ├── dsPIC33F.slaspec
│ │ │ │ ├── pic12.sinc
│ │ │ │ ├── pic12_instructions.sinc
│ │ │ │ ├── pic12c5xx.cspec
│ │ │ │ ├── pic12c5xx.ldefs
│ │ │ │ ├── pic12c5xx.pspec
│ │ │ │ ├── pic12c5xx.slaspec
│ │ │ │ ├── pic16.cspec
│ │ │ │ ├── pic16.ldefs
│ │ │ │ ├── pic16.pspec
│ │ │ │ ├── pic16.sinc
│ │ │ │ ├── pic16.slaspec
│ │ │ │ ├── pic16_instructions.sinc
│ │ │ │ ├── pic16c5x.cspec
│ │ │ │ ├── pic16c5x.ldefs
│ │ │ │ ├── pic16c5x.pspec
│ │ │ │ ├── pic16c5x.slaspec
│ │ │ │ ├── pic16f.cspec
│ │ │ │ ├── pic16f.pspec
│ │ │ │ ├── pic16f.slaspec
│ │ │ │ ├── pic17c7xx.cspec
│ │ │ │ ├── pic17c7xx.ldefs
│ │ │ │ ├── pic17c7xx.pspec
│ │ │ │ ├── pic17c7xx.sinc
│ │ │ │ ├── pic17c7xx.slaspec
│ │ │ │ ├── pic17c7xx_instructions.sinc
│ │ │ │ ├── pic18.cspec
│ │ │ │ ├── pic18.ldefs
│ │ │ │ ├── pic18.pspec
│ │ │ │ ├── pic18.sinc
│ │ │ │ ├── pic18.slaspec
│ │ │ │ └── pic18_instructions.sinc
│ │ │ └── manuals/
│ │ │ ├── PIC-12.idx
│ │ │ ├── PIC-16.idx
│ │ │ ├── PIC-16F.idx
│ │ │ ├── PIC-17.idx
│ │ │ ├── PIC-18.idx
│ │ │ └── PIC24.idx
│ │ ├── PowerPC/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── 4xx.sinc
│ │ │ │ ├── FPRC.sinc
│ │ │ │ ├── PowerPC.opinion
│ │ │ │ ├── SPEF_SCR.sinc
│ │ │ │ ├── SPE_APU.sinc
│ │ │ │ ├── SPE_EFSD.sinc
│ │ │ │ ├── SPE_EFV.sinc
│ │ │ │ ├── SPE_FloatMulAdd.sinc
│ │ │ │ ├── Scalar_SPFP.sinc
│ │ │ │ ├── altivec.sinc
│ │ │ │ ├── evx.sinc
│ │ │ │ ├── g2.sinc
│ │ │ │ ├── lmwInstructions.sinc
│ │ │ │ ├── lswInstructions.sinc
│ │ │ │ ├── mulhwInstructions.sinc
│ │ │ │ ├── old/
│ │ │ │ │ ├── oldPPC.lang
│ │ │ │ │ └── oldPPC.trans
│ │ │ │ ├── ppc.dwarf
│ │ │ │ ├── ppc.ldefs
│ │ │ │ ├── ppc.ldefs.orig
│ │ │ │ ├── ppc_32.cspec
│ │ │ │ ├── ppc_32.pspec
│ │ │ │ ├── ppc_32_4xx_be.slaspec
│ │ │ │ ├── ppc_32_4xx_le.slaspec
│ │ │ │ ├── ppc_32_be.cspec
│ │ │ │ ├── ppc_32_be.slaspec
│ │ │ │ ├── ppc_32_be_Mac.cspec
│ │ │ │ ├── ppc_32_e200.cspec
│ │ │ │ ├── ppc_32_e200.pspec
│ │ │ │ ├── ppc_32_e200.slaspec
│ │ │ │ ├── ppc_32_e500_be.cspec
│ │ │ │ ├── ppc_32_e500_be.slaspec
│ │ │ │ ├── ppc_32_e500_le.cspec
│ │ │ │ ├── ppc_32_e500_le.slaspec
│ │ │ │ ├── ppc_32_e500mc_be.cspec
│ │ │ │ ├── ppc_32_e500mc_be.slaspec
│ │ │ │ ├── ppc_32_e500mc_le.cspec
│ │ │ │ ├── ppc_32_e500mc_le.slaspec
│ │ │ │ ├── ppc_32_le.slaspec
│ │ │ │ ├── ppc_32_mpc8270.pspec
│ │ │ │ ├── ppc_32_quicciii_be.slaspec
│ │ │ │ ├── ppc_32_quicciii_le.slaspec
│ │ │ │ ├── ppc_64.pspec
│ │ │ │ ├── ppc_64_32.cspec
│ │ │ │ ├── ppc_64_be.cspec
│ │ │ │ ├── ppc_64_be.slaspec
│ │ │ │ ├── ppc_64_be_Mac.cspec
│ │ │ │ ├── ppc_64_isa_altivec_be.slaspec
│ │ │ │ ├── ppc_64_isa_altivec_le.slaspec
│ │ │ │ ├── ppc_64_isa_altivec_vle_be.slaspec
│ │ │ │ ├── ppc_64_isa_be.slaspec
│ │ │ │ ├── ppc_64_isa_le.slaspec
│ │ │ │ ├── ppc_64_isa_vle_be.slaspec
│ │ │ │ ├── ppc_64_le.cspec
│ │ │ │ ├── ppc_64_le.slaspec
│ │ │ │ ├── ppc_a2.sinc
│ │ │ │ ├── ppc_common.sinc
│ │ │ │ ├── ppc_embedded.sinc
│ │ │ │ ├── ppc_instructions.sinc
│ │ │ │ ├── ppc_isa.sinc
│ │ │ │ ├── ppc_vle.sinc
│ │ │ │ ├── quicciii.sinc
│ │ │ │ ├── stmwInstructions.sinc
│ │ │ │ ├── stswiInstructions.sinc
│ │ │ │ └── vsx.sinc
│ │ │ ├── manuals/
│ │ │ │ ├── PowerISA.idx
│ │ │ │ └── PowerPC.idx
│ │ │ └── patterns/
│ │ │ ├── PPC_BE_patterns.xml
│ │ │ ├── PPC_BE_prepatterns.xml
│ │ │ ├── PPC_LE_patterns.xml
│ │ │ ├── PPC_LE_prepatterns.xml
│ │ │ ├── patternconstraints.xml
│ │ │ └── prepatternconstraints.xml
│ │ ├── RISCV/
│ │ │ ├── data/
│ │ │ │ ├── languages/
│ │ │ │ │ ├── RV32.pspec
│ │ │ │ │ ├── RV64.pspec
│ │ │ │ │ ├── andestar_v5.instr.sinc
│ │ │ │ │ ├── andestar_v5.ldefs
│ │ │ │ │ ├── andestar_v5.slaspec
│ │ │ │ │ ├── old/
│ │ │ │ │ │ └── riscv_deprecated.ldefs
│ │ │ │ │ ├── riscv.csr.sinc
│ │ │ │ │ ├── riscv.custom.sinc
│ │ │ │ │ ├── riscv.ilp32d.slaspec
│ │ │ │ │ ├── riscv.instr.sinc
│ │ │ │ │ ├── riscv.ldefs
│ │ │ │ │ ├── riscv.lp64d.slaspec
│ │ │ │ │ ├── riscv.opinion
│ │ │ │ │ ├── riscv.priv.sinc
│ │ │ │ │ ├── riscv.reg.sinc
│ │ │ │ │ ├── riscv.rv32a.sinc
│ │ │ │ │ ├── riscv.rv32b.sinc
│ │ │ │ │ ├── riscv.rv32d.sinc
│ │ │ │ │ ├── riscv.rv32f.sinc
│ │ │ │ │ ├── riscv.rv32i.sinc
│ │ │ │ │ ├── riscv.rv32k.sinc
│ │ │ │ │ ├── riscv.rv32m.sinc
│ │ │ │ │ ├── riscv.rv32p.sinc
│ │ │ │ │ ├── riscv.rv32q.sinc
│ │ │ │ │ ├── riscv.rv64a.sinc
│ │ │ │ │ ├── riscv.rv64b.sinc
│ │ │ │ │ ├── riscv.rv64d.sinc
│ │ │ │ │ ├── riscv.rv64f.sinc
│ │ │ │ │ ├── riscv.rv64i.sinc
│ │ │ │ │ ├── riscv.rv64k.sinc
│ │ │ │ │ ├── riscv.rv64m.sinc
│ │ │ │ │ ├── riscv.rv64p.sinc
│ │ │ │ │ ├── riscv.rv64q.sinc
│ │ │ │ │ ├── riscv.rvc.sinc
│ │ │ │ │ ├── riscv.rvv.sinc
│ │ │ │ │ ├── riscv.table.sinc
│ │ │ │ │ ├── riscv.zi.sinc
│ │ │ │ │ ├── riscv32-fp.cspec
│ │ │ │ │ ├── riscv32.cspec
│ │ │ │ │ ├── riscv32.dwarf
│ │ │ │ │ ├── riscv64-fp.cspec
│ │ │ │ │ ├── riscv64.cspec
│ │ │ │ │ └── riscv64.dwarf
│ │ │ │ └── patterns/
│ │ │ │ ├── patternconstraints.xml
│ │ │ │ └── riscv_gc_patterns.xml
│ │ │ └── scripts/
│ │ │ └── binutil.py
│ │ ├── Sparc/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── Sparc.dwarf
│ │ │ │ ├── Sparc.opinion
│ │ │ │ ├── SparcV9.ldefs
│ │ │ │ ├── SparcV9.pspec
│ │ │ │ ├── SparcV9.sinc
│ │ │ │ ├── SparcV9_32.cspec
│ │ │ │ ├── SparcV9_32.slaspec
│ │ │ │ ├── SparcV9_64.cspec
│ │ │ │ ├── SparcV9_64.slaspec
│ │ │ │ └── SparcVIS.sinc
│ │ │ ├── manuals/
│ │ │ │ └── Sparc.idx
│ │ │ └── patterns/
│ │ │ ├── SPARC_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── SuperH/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── sh-1.slaspec
│ │ │ ├── sh-2.slaspec
│ │ │ ├── sh-2a.slaspec
│ │ │ ├── superh.cspec
│ │ │ ├── superh.ldefs
│ │ │ ├── superh.pspec
│ │ │ ├── superh.sinc
│ │ │ └── superh2a.cspec
│ │ ├── SuperH4/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── SuperH4.ldefs
│ │ │ │ ├── SuperH4.opinion
│ │ │ │ ├── SuperH4.pspec
│ │ │ │ ├── SuperH4.sinc
│ │ │ │ ├── SuperH4_be.cspec
│ │ │ │ ├── SuperH4_be.slaspec
│ │ │ │ ├── SuperH4_le.cspec
│ │ │ │ ├── SuperH4_le.slaspec
│ │ │ │ └── old/
│ │ │ │ ├── SuperH4-BE-16.lang
│ │ │ │ ├── SuperH4-BE-16.trans
│ │ │ │ ├── SuperH4-LE-16.lang
│ │ │ │ └── SuperH4-LE-16.trans
│ │ │ ├── manuals/
│ │ │ │ └── superh4.idx
│ │ │ └── patterns/
│ │ │ ├── SuperH4_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── TI_MSP430/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── TI430Common.sinc
│ │ │ │ ├── TI430X.sinc
│ │ │ │ ├── TI_MSP430.cspec
│ │ │ │ ├── TI_MSP430.dwarf
│ │ │ │ ├── TI_MSP430.ldefs
│ │ │ │ ├── TI_MSP430.pspec
│ │ │ │ ├── TI_MSP430.slaspec
│ │ │ │ ├── TI_MSP430X.cspec
│ │ │ │ ├── TI_MSP430X.dwarf
│ │ │ │ ├── TI_MSP430X.slaspec
│ │ │ │ └── ti_msp430.opinion
│ │ │ └── manuals/
│ │ │ └── MSP430.idx
│ │ ├── Toy/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── old/
│ │ │ │ ├── ToyV00BE64.lang
│ │ │ │ ├── ToyV0BE64.trans
│ │ │ │ ├── ToyV0LE64.lang
│ │ │ │ ├── ToyV0LE64.trans
│ │ │ │ └── v01stuff/
│ │ │ │ ├── toy.cspec
│ │ │ │ ├── toy.ldefs_v01
│ │ │ │ ├── toy.sinc
│ │ │ │ ├── toy64.cspec
│ │ │ │ ├── toyInstructions.sinc
│ │ │ │ └── toyPosStack.cspec
│ │ │ ├── toy.cspec
│ │ │ ├── toy.ldefs
│ │ │ ├── toy.pspec
│ │ │ ├── toy.sinc
│ │ │ ├── toy64-long8.cspec
│ │ │ ├── toy64.cspec
│ │ │ ├── toy64_be.slaspec
│ │ │ ├── toy64_be_harvard.slaspec
│ │ │ ├── toy64_be_harvard_rev.slaspec
│ │ │ ├── toy64_le.slaspec
│ │ │ ├── toyInstructions.sinc
│ │ │ ├── toyPosStack.cspec
│ │ │ ├── toy_be.slaspec
│ │ │ ├── toy_be_posStack.slaspec
│ │ │ ├── toy_builder.sinc
│ │ │ ├── toy_builder_be.slaspec
│ │ │ ├── toy_builder_be_align2.slaspec
│ │ │ ├── toy_builder_le.slaspec
│ │ │ ├── toy_builder_le_align2.slaspec
│ │ │ ├── toy_harvard.pspec
│ │ │ ├── toy_le.slaspec
│ │ │ ├── toy_wsz_be.slaspec
│ │ │ └── toy_wsz_le.slaspec
│ │ ├── V850/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── Helpers/
│ │ │ │ │ ├── Conditions.sinc
│ │ │ │ │ ├── Extras.sinc
│ │ │ │ │ ├── Macros.sinc
│ │ │ │ │ ├── Register.sinc
│ │ │ │ │ ├── Tokens.sinc
│ │ │ │ │ └── Variables.sinc
│ │ │ │ ├── Instructions/
│ │ │ │ │ ├── Arithmetic.sinc
│ │ │ │ │ ├── Float.sinc
│ │ │ │ │ ├── Load_Store.sinc
│ │ │ │ │ ├── Logic.sinc
│ │ │ │ │ └── Special.sinc
│ │ │ │ ├── V850.cspec
│ │ │ │ ├── V850.ldefs
│ │ │ │ ├── V850.opinion
│ │ │ │ ├── V850.pspec
│ │ │ │ └── V850.slaspec
│ │ │ ├── manuals/
│ │ │ │ └── v850.idx
│ │ │ └── patterns/
│ │ │ ├── V850_patterns.xml
│ │ │ └── patternconstraints.xml
│ │ ├── Xtensa/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── cust.sinc
│ │ │ │ ├── flix.sinc
│ │ │ │ ├── xtensa.cspec
│ │ │ │ ├── xtensa.dwarf
│ │ │ │ ├── xtensa.ldefs
│ │ │ │ ├── xtensa.opinion
│ │ │ │ ├── xtensa.pspec
│ │ │ │ ├── xtensaArch.sinc
│ │ │ │ ├── xtensaInstructions.sinc
│ │ │ │ ├── xtensaMain.sinc
│ │ │ │ ├── xtensa_be.slaspec
│ │ │ │ ├── xtensa_depbits.sinc
│ │ │ │ └── xtensa_le.slaspec
│ │ │ ├── manuals/
│ │ │ │ └── xtensa.idx
│ │ │ └── patterns/
│ │ │ ├── patternconstraints.xml
│ │ │ └── xtensa_patterns.xml
│ │ ├── Z80/
│ │ │ ├── data/
│ │ │ │ ├── languages/
│ │ │ │ │ ├── z180.pspec
│ │ │ │ │ ├── z180.slaspec
│ │ │ │ │ ├── z182.pspec
│ │ │ │ │ ├── z80.cspec
│ │ │ │ │ ├── z80.ldefs
│ │ │ │ │ ├── z80.pspec
│ │ │ │ │ ├── z80.slaspec
│ │ │ │ │ └── z8401x.pspec
│ │ │ │ └── manuals/
│ │ │ │ ├── Z180.idx
│ │ │ │ └── Z80.idx
│ │ │ └── temp/
│ │ │ └── z8401x.pspec
│ │ ├── eBPF/
│ │ │ └── data/
│ │ │ └── languages/
│ │ │ ├── eBPF.cspec
│ │ │ ├── eBPF.dwarf
│ │ │ ├── eBPF.ldefs
│ │ │ ├── eBPF.opinion
│ │ │ ├── eBPF.pspec
│ │ │ ├── eBPF.sinc
│ │ │ ├── eBPF_be.slaspec
│ │ │ └── eBPF_le.slaspec
│ │ ├── tricore/
│ │ │ └── data/
│ │ │ ├── languages/
│ │ │ │ ├── tc172x.pspec
│ │ │ │ ├── tc176x.pspec
│ │ │ │ ├── tc29x.pspec
│ │ │ │ ├── tricore.cspec
│ │ │ │ ├── tricore.dwarf
│ │ │ │ ├── tricore.ldefs
│ │ │ │ ├── tricore.opinion
│ │ │ │ ├── tricore.pcp.sinc
│ │ │ │ ├── tricore.pspec
│ │ │ │ ├── tricore.sinc
│ │ │ │ └── tricore.slaspec
│ │ │ ├── manuals/
│ │ │ │ ├── tricore.idx
│ │ │ │ └── tricore2.idx
│ │ │ └── patterns/
│ │ │ ├── patternconstraints.xml
│ │ │ └── tricore_patterns.xml
│ │ └── x86/
│ │ └── data/
│ │ ├── extensions/
│ │ │ └── rust/
│ │ │ ├── unix32/
│ │ │ │ ├── cc.xml
│ │ │ │ ├── probe_fixup.xml
│ │ │ │ └── try_fixup.xml
│ │ │ ├── unix64/
│ │ │ │ ├── cc.xml
│ │ │ │ ├── probe_fixup.xml
│ │ │ │ └── try_fixup.xml
│ │ │ ├── windows32/
│ │ │ │ ├── probe_fixup.xml
│ │ │ │ └── try_fixup.xml
│ │ │ └── windows64/
│ │ │ ├── probe_fixup.xml
│ │ │ └── try_fixup.xml
│ │ ├── languages/
│ │ │ ├── adx.sinc
│ │ │ ├── avx.sinc
│ │ │ ├── avx2.sinc
│ │ │ ├── avx2_manual.sinc
│ │ │ ├── avx512.sinc
│ │ │ ├── avx512_manual.sinc
│ │ │ ├── avx_manual.sinc
│ │ │ ├── bmi1.sinc
│ │ │ ├── bmi2.sinc
│ │ │ ├── cet.sinc
│ │ │ ├── clwb.sinc
│ │ │ ├── fma.sinc
│ │ │ ├── ia.sinc
│ │ │ ├── lockable.sinc
│ │ │ ├── lzcnt.sinc
│ │ │ ├── macros.sinc
│ │ │ ├── mpx.sinc
│ │ │ ├── old/
│ │ │ │ ├── x86RealV1.lang
│ │ │ │ ├── x86RealV1.trans
│ │ │ │ ├── x86RealV2.lang
│ │ │ │ ├── x86RealV2.trans
│ │ │ │ ├── x86RealV3.lang
│ │ │ │ ├── x86RealV3.trans
│ │ │ │ ├── x86V1.lang
│ │ │ │ ├── x86V1.trans
│ │ │ │ ├── x86V2.lang
│ │ │ │ ├── x86V2.trans
│ │ │ │ ├── x86V3.lang
│ │ │ │ ├── x86V3.trans
│ │ │ │ ├── x86_64bit_compat32_v2.lang
│ │ │ │ ├── x86_64bit_compat32_v2.trans
│ │ │ │ ├── x86_64bit_compat32_v3.lang
│ │ │ │ ├── x86_64bit_compat32_v3.trans
│ │ │ │ ├── x86_64bit_v1.lang
│ │ │ │ ├── x86_64bit_v1.trans
│ │ │ │ ├── x86_64bit_v2.lang
│ │ │ │ ├── x86_64bit_v2.trans
│ │ │ │ ├── x86_64bit_v3.lang
│ │ │ │ ├── x86_64bit_v3.trans
│ │ │ │ ├── x86_ProtV2.lang
│ │ │ │ ├── x86_ProtV2.trans
│ │ │ │ ├── x86_ProtV3.lang
│ │ │ │ ├── x86_ProtV3.trans
│ │ │ │ ├── x86smmV1.lang
│ │ │ │ ├── x86smmV1.trans
│ │ │ │ ├── x86smmV2.lang
│ │ │ │ ├── x86smmV2.trans
│ │ │ │ ├── x86smmV3.lang
│ │ │ │ └── x86smmV3.trans
│ │ │ ├── pclmulqdq.sinc
│ │ │ ├── rdrand.sinc
│ │ │ ├── sgx.sinc
│ │ │ ├── sha.sinc
│ │ │ ├── smx.sinc
│ │ │ ├── x86-16-real.pspec
│ │ │ ├── x86-16.cspec
│ │ │ ├── x86-16.gdis
│ │ │ ├── x86-16.pspec
│ │ │ ├── x86-32-golang.cspec
│ │ │ ├── x86-32-golang.register.info
│ │ │ ├── x86-64-compat32.pspec
│ │ │ ├── x86-64-gcc.cspec
│ │ │ ├── x86-64-golang.cspec
│ │ │ ├── x86-64-golang.register.info
│ │ │ ├── x86-64-swift.cspec
│ │ │ ├── x86-64-win.cspec
│ │ │ ├── x86-64.dwarf
│ │ │ ├── x86-64.pspec
│ │ │ ├── x86-64.slaspec
│ │ │ ├── x86.dwarf
│ │ │ ├── x86.ldefs
│ │ │ ├── x86.opinion
│ │ │ ├── x86.pspec
│ │ │ ├── x86.slaspec
│ │ │ ├── x86borland.cspec
│ │ │ ├── x86delphi.cspec
│ │ │ ├── x86gcc.cspec
│ │ │ └── x86win.cspec
│ │ ├── manuals/
│ │ │ └── x86.idx
│ │ └── patterns/
│ │ ├── patternconstraints.xml
│ │ ├── prepatternconstraints.xml
│ │ ├── x86-16_default_patterns.xml
│ │ ├── x86-64gcc_patterns.xml
│ │ ├── x86-64win_patterns.xml
│ │ ├── x86delphi_patterns.xml
│ │ ├── x86gcc_patterns.xml
│ │ ├── x86gcc_prepatterns.xml
│ │ ├── x86win_patterns.xml
│ │ └── x86win_prepatterns.xml
│ ├── py.typed
│ ├── pypcode_native.cpp
│ ├── pypcode_native.pyi
│ ├── sleigh/
│ │ ├── Makefile
│ │ ├── address.cc
│ │ ├── address.hh
│ │ ├── compression.cc
│ │ ├── compression.hh
│ │ ├── context.cc
│ │ ├── context.hh
│ │ ├── emulate.cc
│ │ ├── emulate.hh
│ │ ├── error.hh
│ │ ├── filemanage.cc
│ │ ├── filemanage.hh
│ │ ├── float.cc
│ │ ├── float.hh
│ │ ├── globalcontext.cc
│ │ ├── globalcontext.hh
│ │ ├── loadimage.cc
│ │ ├── loadimage.hh
│ │ ├── loadimage_bfd.cc
│ │ ├── loadimage_bfd.hh
│ │ ├── marshal.cc
│ │ ├── marshal.hh
│ │ ├── memstate.cc
│ │ ├── memstate.hh
│ │ ├── opbehavior.cc
│ │ ├── opbehavior.hh
│ │ ├── opcodes.cc
│ │ ├── opcodes.hh
│ │ ├── partmap.hh
│ │ ├── pcodecompile.cc
│ │ ├── pcodecompile.hh
│ │ ├── pcodeparse.cc
│ │ ├── pcodeparse.hh
│ │ ├── pcodeparse.y
│ │ ├── pcoderaw.cc
│ │ ├── pcoderaw.hh
│ │ ├── semantics.cc
│ │ ├── semantics.hh
│ │ ├── slaformat.cc
│ │ ├── slaformat.hh
│ │ ├── sleigh.cc
│ │ ├── sleigh.hh
│ │ ├── sleighbase.cc
│ │ ├── sleighbase.hh
│ │ ├── slgh_compile.cc
│ │ ├── slgh_compile.hh
│ │ ├── slghparse.cc
│ │ ├── slghparse.hh
│ │ ├── slghparse.y
│ │ ├── slghpatexpress.cc
│ │ ├── slghpatexpress.hh
│ │ ├── slghpattern.cc
│ │ ├── slghpattern.hh
│ │ ├── slghscan.cc
│ │ ├── slghscan.l
│ │ ├── slghsymbol.cc
│ │ ├── slghsymbol.hh
│ │ ├── space.cc
│ │ ├── space.hh
│ │ ├── translate.cc
│ │ ├── translate.hh
│ │ ├── types.h
│ │ ├── xml.cc
│ │ ├── xml.hh
│ │ └── xml.y
│ └── zlib/
│ ├── README.txt
│ ├── adler32.c
│ ├── deflate.c
│ ├── deflate.h
│ ├── gzguts.h
│ ├── inffast.c
│ ├── inffast.h
│ ├── inffixed.h
│ ├── inflate.c
│ ├── inflate.h
│ ├── inftrees.c
│ ├── inftrees.h
│ ├── trees.c
│ ├── trees.h
│ ├── zconf.h
│ ├── zlib.h
│ ├── zutil.c
│ └── zutil.h
├── pyproject.toml
├── scripts/
│ ├── benchmark.py
│ └── sleigh_download.sh
├── setup.py
└── tests/
├── test_cli.py
└── test_pypcode.py
SYMBOL INDEX (2096 symbols across 84 files)
FILE: pypcode/__init__.py
class TranslateFlags (line 70) | class TranslateFlags(IntEnum):
class ArchLanguage (line 82) | class ArchLanguage:
method __init__ (line 97) | def __init__(self, archdir: str, ldef: ET.Element):
method pspec_path (line 104) | def pspec_path(self) -> str:
method slafile_path (line 108) | def slafile_path(self) -> str:
method description (line 112) | def description(self) -> str:
method __getattr__ (line 118) | def __getattr__(self, key):
method pspec (line 124) | def pspec(self) -> ET.Element | None:
method cspecs (line 130) | def cspecs(self) -> Mapping[tuple[str, str], ET.Element]:
method init_context_from_pspec (line 139) | def init_context_from_pspec(self, ctx: Context) -> None:
method from_id (line 153) | def from_id(cls, langid: str) -> ArchLanguage | None:
class Arch (line 164) | class Arch:
method __init__ (line 183) | def __init__(self, name: str, ldefpath: str):
method enumerate (line 197) | def enumerate(cls) -> Generator[Arch]:
class Context (line 215) | class Context(_Context):
method __init__ (line 228) | def __init__(self, language: ArchLanguage | str):
FILE: pypcode/__main__.py
function main (line 20) | def main():
FILE: pypcode/printing.py
class OpFormat (line 13) | class OpFormat:
method fmt_vn (line 19) | def fmt_vn(vn: Varnode) -> str:
method fmt (line 28) | def fmt(self, op: PcodeOp) -> str:
class OpFormatUnary (line 32) | class OpFormatUnary(OpFormat):
method __init__ (line 39) | def __init__(self, operator: str):
method fmt (line 43) | def fmt(self, op: PcodeOp) -> str:
class OpFormatBinary (line 47) | class OpFormatBinary(OpFormat):
method __init__ (line 54) | def __init__(self, operator: str):
method fmt (line 58) | def fmt(self, op: PcodeOp) -> str:
class OpFormatFunc (line 62) | class OpFormatFunc(OpFormat):
method __init__ (line 69) | def __init__(self, operator: str):
method fmt (line 73) | def fmt(self, op: PcodeOp) -> str:
class OpFormatSpecial (line 77) | class OpFormatSpecial(OpFormat):
method fmt_BRANCH (line 82) | def fmt_BRANCH(self, op: PcodeOp) -> str:
method fmt_BRANCHIND (line 85) | def fmt_BRANCHIND(self, op: PcodeOp) -> str:
method fmt_CALL (line 88) | def fmt_CALL(self, op: PcodeOp) -> str:
method fmt_CALLIND (line 91) | def fmt_CALLIND(self, op: PcodeOp) -> str:
method fmt_CALLOTHER (line 94) | def fmt_CALLOTHER(self, op: PcodeOp) -> str:
method fmt_CBRANCH (line 97) | def fmt_CBRANCH(self, op: PcodeOp) -> str:
method fmt_LOAD (line 100) | def fmt_LOAD(self, op: PcodeOp) -> str:
method fmt_RETURN (line 103) | def fmt_RETURN(self, op: PcodeOp) -> str:
method fmt_STORE (line 106) | def fmt_STORE(self, op: PcodeOp) -> str:
method fmt (line 109) | def fmt(self, op: PcodeOp) -> str:
class PcodePrettyPrinter (line 123) | class PcodePrettyPrinter:
method fmt_op (line 196) | def fmt_op(op: PcodeOp) -> str:
method fmt_translation (line 201) | def fmt_translation(tx: Translation) -> str:
function fmt_instruction (line 205) | def fmt_instruction(insn: Instruction) -> str:
function fmt_disassembly (line 209) | def fmt_disassembly(dx: Disassembly) -> str:
FILE: pypcode/processors/RISCV/scripts/binutil.py
function RV_X (line 981) | def RV_X(x, s, n):
function RV_IMM_SIGN (line 984) | def RV_IMM_SIGN(x):
function EXTRACT_ITYPE_IMM (line 987) | def EXTRACT_ITYPE_IMM(x):
function EXTRACT_STYPE_IMM (line 989) | def EXTRACT_STYPE_IMM(x):
function EXTRACT_SBTYPE_IMM (line 991) | def EXTRACT_SBTYPE_IMM(x):
function EXTRACT_UTYPE_IMM (line 993) | def EXTRACT_UTYPE_IMM(x):
function EXTRACT_UJTYPE_IMM (line 995) | def EXTRACT_UJTYPE_IMM(x):
function EXTRACT_RVC_IMM (line 997) | def EXTRACT_RVC_IMM(x):
function EXTRACT_RVC_LUI_IMM (line 999) | def EXTRACT_RVC_LUI_IMM(x):
function EXTRACT_RVC_SIMM3 (line 1001) | def EXTRACT_RVC_SIMM3(x):
function EXTRACT_RVC_UIMM8 (line 1003) | def EXTRACT_RVC_UIMM8(x):
function EXTRACT_RVC_ADDI4SPN_IMM (line 1005) | def EXTRACT_RVC_ADDI4SPN_IMM(x):
function EXTRACT_RVC_ADDI16SP_IMM (line 1007) | def EXTRACT_RVC_ADDI16SP_IMM(x):
function EXTRACT_RVC_LW_IMM (line 1009) | def EXTRACT_RVC_LW_IMM(x):
function EXTRACT_RVC_LD_IMM (line 1011) | def EXTRACT_RVC_LD_IMM(x):
function EXTRACT_RVC_LWSP_IMM (line 1013) | def EXTRACT_RVC_LWSP_IMM(x):
function EXTRACT_RVC_LDSP_IMM (line 1015) | def EXTRACT_RVC_LDSP_IMM(x):
function EXTRACT_RVC_SWSP_IMM (line 1017) | def EXTRACT_RVC_SWSP_IMM(x):
function EXTRACT_RVC_SDSP_IMM (line 1019) | def EXTRACT_RVC_SDSP_IMM(x):
function EXTRACT_RVC_B_IMM (line 1021) | def EXTRACT_RVC_B_IMM(x):
function EXTRACT_RVC_J_IMM (line 1023) | def EXTRACT_RVC_J_IMM(x):
function ENCODE_ITYPE_IMM (line 1026) | def ENCODE_ITYPE_IMM(x):
function ENCODE_STYPE_IMM (line 1028) | def ENCODE_STYPE_IMM(x):
function ENCODE_SBTYPE_IMM (line 1030) | def ENCODE_SBTYPE_IMM(x):
function ENCODE_UTYPE_IMM (line 1032) | def ENCODE_UTYPE_IMM(x):
function ENCODE_UJTYPE_IMM (line 1034) | def ENCODE_UJTYPE_IMM(x):
function ENCODE_RVC_IMM (line 1036) | def ENCODE_RVC_IMM(x):
function ENCODE_RVC_LUI_IMM (line 1038) | def ENCODE_RVC_LUI_IMM(x):
function ENCODE_RVC_SIMM3 (line 1040) | def ENCODE_RVC_SIMM3(x):
function ENCODE_RVC_UIMM8 (line 1042) | def ENCODE_RVC_UIMM8(x):
function ENCODE_RVC_ADDI4SPN_IMM (line 1044) | def ENCODE_RVC_ADDI4SPN_IMM(x):
function ENCODE_RVC_ADDI16SP_IMM (line 1046) | def ENCODE_RVC_ADDI16SP_IMM(x):
function ENCODE_RVC_LW_IMM (line 1048) | def ENCODE_RVC_LW_IMM(x):
function ENCODE_RVC_LD_IMM (line 1050) | def ENCODE_RVC_LD_IMM(x):
function ENCODE_RVC_LWSP_IMM (line 1052) | def ENCODE_RVC_LWSP_IMM(x):
function ENCODE_RVC_LDSP_IMM (line 1054) | def ENCODE_RVC_LDSP_IMM(x):
function ENCODE_RVC_SWSP_IMM (line 1056) | def ENCODE_RVC_SWSP_IMM(x):
function ENCODE_RVC_SDSP_IMM (line 1058) | def ENCODE_RVC_SDSP_IMM(x):
function ENCODE_RVC_B_IMM (line 1060) | def ENCODE_RVC_B_IMM(x):
function ENCODE_RVC_J_IMM (line 1062) | def ENCODE_RVC_J_IMM(x):
function match_opcode (line 1082) | def match_opcode(op, insn):
function match_never (line 1086) | def match_never(op, insn):
function match_rs1_eq_rs2 (line 1089) | def match_rs1_eq_rs2(op, insn):
function match_rd_nonzero (line 1094) | def match_rd_nonzero(op, insn):
function match_c_add (line 1097) | def match_c_add(op, insn):
function match_c_add_with_hint (line 1100) | def match_c_add_with_hint(op, insn):
function match_c_nop (line 1103) | def match_c_nop(op, insn):
function match_c_add16sp (line 1106) | def match_c_add16sp(op, insn):
function match_c_lui (line 1109) | def match_c_lui(op, insn):
function match_c_addi4spn (line 1112) | def match_c_addi4spn(op, insn):
function match_c_addi16sp (line 1115) | def match_c_addi16sp(op, insn):
function match_slli_as_c_slli (line 1118) | def match_slli_as_c_slli(op, insn):
function match_srxi_as_c_srxi (line 1121) | def match_srxi_as_c_srxi(op, insn):
function match_c_lui_with_hint (line 1124) | def match_c_lui_with_hint(op, insn):
function match_c_slli (line 1127) | def match_c_slli(op, insn):
function match_c_slli64 (line 1130) | def match_c_slli64(op, insn):
class OpCode (line 1135) | class OpCode:
method __init__ (line 1136) | def __init__(self, op):
method __str__ (line 1149) | def __str__(self):
method __eq__ (line 1151) | def __eq__(self, other):
function parse_operand (line 1776) | def parse_operand(op):
function parse_r (line 1974) | def parse_r(op):
function parse_i (line 1981) | def parse_i(op):
function parse_s (line 1986) | def parse_s(op):
function parse_u (line 1991) | def parse_u(op):
function parse_b (line 1994) | def parse_b(op):
function parse_j (line 1999) | def parse_j(op):
function parse_misc_mem (line 2002) | def parse_misc_mem(op):
function parse_CR (line 2010) | def parse_CR(op, rv):
function parse_CI (line 2013) | def parse_CI(op, rv):
function parse_CSS (line 2039) | def parse_CSS(op, rv):
function parse_CIW (line 2065) | def parse_CIW(op, rv):
function parse_CL (line 2068) | def parse_CL(op, rv):
function parse_CS (line 2134) | def parse_CS(op, rv):
function parse_CA (line 2178) | def parse_CA(op, rv):
function parse_CB (line 2181) | def parse_CB(op, rv):
function parse_CJ (line 2184) | def parse_CJ(op, rv):
function opcode_map_c (line 2188) | def opcode_map_c(op):
function opcode_map (line 2457) | def opcode_map(op):
function find_gaps (line 2637) | def find_gaps(op):
function parse (line 2829) | def parse():
function make_unique (line 2863) | def make_unique():
FILE: pypcode/pypcode_native.cpp
type PcodeOp (line 45) | struct PcodeOp {
class ContextPypcode (line 51) | class ContextPypcode : public ContextInternal {
method ContextPypcode (line 56) | ContextPypcode() : ContextInternal()
method finalize (line 61) | void finalize()
method registerVariable (line 66) | virtual void registerVariable(const string &nm, int4 sbit, int4 ebit)
method resetAllVariables (line 74) | void resetAllVariables()
class SimpleLoadImage (line 83) | class SimpleLoadImage : public LoadImage {
method SimpleLoadImage (line 89) | SimpleLoadImage() : LoadImage("nofile")
method setData (line 96) | void setData(uintb ad, const unsigned char *ptr, int4 sz)
method loadFill (line 103) | void loadFill(uint1 *ptr, int4 size, const Address &addr)
method string (line 132) | virtual string getArchType(void) const
method adjustVma (line 136) | virtual void adjustVma(long adjust)
class PcodeEmitCacher (line 141) | class PcodeEmitCacher : public PcodeEmit {
method PcodeEmitCacher (line 146) | PcodeEmitCacher() : m_bb_terminating_op_emitted(false)
method dump (line 152) | void dump(const Address &addr, OpCode opc, VarnodeData *outvar, Varnod...
type DisassemblyInstruction (line 176) | struct DisassemblyInstruction {
class AssemblyEmitCacher (line 183) | class AssemblyEmitCacher : public AssemblyEmit {
method AssemblyEmitCacher (line 187) | AssemblyEmitCacher(DisassemblyInstruction &disas) : m_disas(disas)
method dump (line 191) | void dump(const Address &addr, const std::string &mnem, const std::str...
class Disassembly (line 199) | class Disassembly {
method Disassembly (line 203) | Disassembly()
method Disassembly (line 208) | Disassembly(Disassembly &&o) noexcept : m_instructions(std::move(o.m_i...
class Translation (line 219) | class Translation {
method Translation (line 223) | Translation()
method Translation (line 228) | Translation(Translation &&o) noexcept : m_ops(std::move(o.m_ops))
type TranslateFlags (line 239) | enum TranslateFlags {
class Context (line 243) | class Context {
method Context (line 252) | Context(const std::string &path)
method reset (line 277) | void reset(void)
method disassemble (line 284) | std::unique_ptr<Disassembly>
method translate (line 324) | std::unique_ptr<Translation> translate(const char *bytes,
function NB_MODULE (line 400) | NB_MODULE(pypcode_native, m)
FILE: pypcode/pypcode_native.pyi
class BadDataError (line 7) | class BadDataError(Exception): ...
class DecoderError (line 8) | class DecoderError(Exception): ...
class LowlevelError (line 9) | class LowlevelError(Exception): ...
class UnimplError (line 10) | class UnimplError(Exception): ...
class AddrSpace (line 12) | class AddrSpace:
method __init__ (line 13) | def __init__(self, *args, **kwargs) -> None: ...
method name (line 15) | def name(self) -> str: ...
class Address (line 17) | class Address:
method __init__ (line 18) | def __init__(self, *args, **kwargs) -> None: ...
method offset (line 20) | def offset(self) -> int: ...
method space (line 22) | def space(self) -> AddrSpace: ...
class Instruction (line 24) | class Instruction:
method __init__ (line 25) | def __init__(self, *args, **kwargs) -> None: ...
method addr (line 27) | def addr(self) -> Address: ...
method body (line 29) | def body(self) -> str: ...
method length (line 31) | def length(self) -> int: ...
method mnem (line 33) | def mnem(self) -> str: ...
class Disassembly (line 35) | class Disassembly:
method __init__ (line 36) | def __init__(self, *args, **kwargs) -> None: ...
method instructions (line 38) | def instructions(self) -> List[Instruction]: ...
class OpCode (line 40) | class OpCode:
method name (line 117) | def name(self) -> str: ...
method value (line 119) | def value(self) -> int: ...
method __init__ (line 120) | def __init__(self, *args, **kwargs) -> None: ...
method __eq__ (line 121) | def __eq__(self, other) -> Any: ...
method __ge__ (line 122) | def __ge__(self, other) -> Any: ...
method __gt__ (line 123) | def __gt__(self, other) -> Any: ...
method __hash__ (line 124) | def __hash__(self) -> Any: ...
method __index__ (line 125) | def __index__(self) -> Any: ...
method __int__ (line 126) | def __int__(self) -> Any: ...
method __le__ (line 127) | def __le__(self, other) -> Any: ...
method __lt__ (line 128) | def __lt__(self, other) -> Any: ...
method __ne__ (line 129) | def __ne__(self, other) -> Any: ...
class Varnode (line 131) | class Varnode:
method __init__ (line 132) | def __init__(self) -> None: ...
method getRegisterName (line 133) | def getRegisterName(self) -> str: ...
method getUserDefinedOpName (line 134) | def getUserDefinedOpName(self) -> str: ...
method getSpaceFromConst (line 135) | def getSpaceFromConst(self) -> AddrSpace: ...
method offset (line 137) | def offset(self) -> int: ...
method size (line 139) | def size(self) -> int: ...
method space (line 141) | def space(self) -> AddrSpace: ...
class PcodeOp (line 143) | class PcodeOp:
method __init__ (line 144) | def __init__(self, *args, **kwargs) -> None: ...
method inputs (line 146) | def inputs(self) -> List[Varnode]: ...
method opcode (line 148) | def opcode(self) -> OpCode: ...
method output (line 150) | def output(self) -> Optional[Varnode]: ...
class Translation (line 152) | class Translation:
method __init__ (line 153) | def __init__(self, *args, **kwargs) -> None: ...
method ops (line 155) | def ops(self) -> List[PcodeOp]: ...
class Context (line 157) | class Context:
method __init__ (line 158) | def __init__(self, *args, **kwargs) -> None: ...
method disassemble (line 159) | def disassemble(
method getAllRegisters (line 167) | def getAllRegisters(self) -> dict[Varnode, str]: ...
method getRegisterName (line 168) | def getRegisterName(self, space: AddrSpace, offset: int, size: int) ->...
method reset (line 169) | def reset(self) -> None: ...
method setVariableDefault (line 170) | def setVariableDefault(self, name: str, value: int) -> None: ...
method translate (line 171) | def translate(
FILE: pypcode/sleigh/address.cc
type ghidra (line 19) | namespace ghidra {
function ostream (line 32) | ostream &operator<<(ostream &s,const SeqNum &sq)
function ostream (line 47) | ostream &operator<<(ostream &s,const Address &addr)
function SeqNum (line 69) | SeqNum SeqNum::decode(Decoder &decoder)
function int4 (line 131) | int4 Address::justifiedContain(int4 sz,const Address &op2,int4 sz2,boo...
function int4 (line 153) | int4 Address::overlap(int4 skip,const Address &op,int4 size) const
function Address (line 205) | Address Address::decode(Decoder &decoder)
function Address (line 226) | Address Address::decode(Decoder &decoder,int4 &size)
function Address (line 265) | Address Range::getLastAddrOpen(const AddrSpaceManager *manage) const
function Range (line 491) | const Range *RangeList::getRange(AddrSpace *spaceid,uintb offset) const
function uintb (line 512) | uintb RangeList::longestFit(const Address &addr,uintb maxsize) const
function Range (line 540) | const Range *RangeList::getFirstRange(void) const
function Range (line 548) | const Range *RangeList::getLastRange(void) const
function Range (line 562) | const Range *RangeList::getLastSignedRange(AddrSpace *spaceid) const
function signbit_negative (line 641) | bool signbit_negative(uintb val,int4 size)
function uintb (line 654) | uintb uintb_negate(uintb in,int4 size)
function uintb (line 666) | uintb sign_extend(uintb in,int4 sizein,int4 sizeout)
function byte_swap (line 681) | void byte_swap(intb &val,int4 size)
function uintb (line 698) | uintb byte_swap(uintb val,int4 size)
function int4 (line 714) | int4 leastsigbit_set(uintb val)
function int4 (line 735) | int4 mostsigbit_set(uintb val)
function int4 (line 756) | int4 popcount(uintb val)
function int4 (line 773) | int4 count_leading_zeros(uintb val)
function uintb (line 800) | uintb coveringmask(uintb val)
function int4 (line 818) | int4 bit_transitions(uintb val,int4 sz)
FILE: pypcode/sleigh/address.hh
type ghidra (line 31) | namespace ghidra {
class AddrSpaceManager (line 33) | class AddrSpaceManager
class Address (line 59) | class Address {
type mach_extreme (line 65) | enum mach_extreme {
class SeqNum (line 121) | class SeqNum {
method SeqNum (line 126) | SeqNum(void) {}
method SeqNum (line 130) | SeqNum(const Address &a,uintm b) : pc(a) { uniq = b; }
method SeqNum (line 133) | SeqNum(const SeqNum &op2) : pc(op2.pc) { uniq = op2.uniq; }
method Address (line 136) | const Address &getAddr(void) const { return pc; }
method uintm (line 139) | uintm getTime(void) const { return uniq; }
method uintm (line 142) | uintm getOrder(void) const { return order; }
method setOrder (line 145) | void setOrder(uintm ord) { order = ord; }
class RangeProperties (line 170) | class RangeProperties
method RangeProperties (line 223) | RangeProperties(void) { first = 0; last = 0; isRegister = false; see...
class Range (line 173) | class Range {
method Range (line 185) | Range(AddrSpace *s,uintb f,uintb l) {
method Range (line 187) | Range(void) {}
method AddrSpace (line 189) | AddrSpace *getSpace(void) const { return spc; }
method uintb (line 190) | uintb getFirst(void) const { return first; }
method uintb (line 191) | uintb getLast(void) const { return last; }
method Address (line 192) | Address getFirstAddr(void) const { return Address(spc,first); }
method Address (line 193) | Address getLastAddr(void) const { return Address(spc,last); }
class RangeProperties (line 215) | class RangeProperties {
method RangeProperties (line 223) | RangeProperties(void) { first = 0; last = 0; isRegister = false; see...
class RangeList (line 232) | class RangeList {
method RangeList (line 235) | RangeList(const RangeList &op2) { tree = op2.tree; }
method RangeList (line 236) | RangeList(void) {}
method clear (line 237) | void clear(void) { tree.clear(); }
method empty (line 238) | bool empty(void) const { return tree.empty(); }
method begin (line 239) | set<Range>::const_iterator begin(void) const { return tree.begin(); }
method end (line 240) | set<Range>::const_iterator end(void) const { return tree.end(); }
method int4 (line 241) | int4 numRanges(void) const { return tree.size(); }
function int4 (line 292) | inline int4 Address::getAddrSize(void) const {
function int4 (line 317) | inline int4 Address::read(const string &s) {
function AddrSpace (line 323) | inline AddrSpace *Address::getSpace(void) const {
function uintb (line 329) | inline uintb Address::getOffset(void) const {
function Address (line 344) | inline Address &Address::operator=(const Address &op2)
type mach_extreme (line 65) | enum mach_extreme {
function Address (line 423) | inline Address Address::operator+(int8 off) const {
type mach_extreme (line 65) | enum mach_extreme {
function Address (line 433) | inline Address Address::operator-(int8 off) const {
type mach_extreme (line 65) | enum mach_extreme {
function int4 (line 445) | inline int4 Address::overlapJoin(int4 skip,const Address &op,int4 size...
function uintb (line 499) | inline uintb calc_mask(int4 size) { return uintbmasks[((uint4)size) < ...
function uintb (line 505) | inline uintb pcode_right(uintb val,int4 sa) {
function uintb (line 514) | inline uintb pcode_left(uintb val,int4 sa) {
function uintb (line 525) | inline uintb minimalmask(uintb val)
function intb (line 543) | inline intb sign_extend(intb val,int4 bit)
function intb (line 557) | inline intb zero_extend(intb val,int4 bit)
FILE: pypcode/sleigh/compression.cc
type ghidra (line 18) | namespace ghidra {
function int4 (line 46) | int4 Compress::deflate(uint1 *buffer,int4 sz,bool finish)
function int4 (line 78) | int4 Decompress::inflate(uint1 *buffer,int4 sz)
FILE: pypcode/sleigh/compression.hh
type ghidra (line 28) | namespace ghidra {
class Compress (line 34) | class Compress {
method input (line 44) | void input(uint1 *buffer,int4 sz) {
class Decompress (line 55) | class Decompress {
method input (line 66) | void input(uint1 *buffer,int4 sz) {
method isFinished (line 71) | bool isFinished(void) const { return streamFinished; }
class CompressBuffer (line 82) | class CompressBuffer : public std::streambuf {
FILE: pypcode/sleigh/context.cc
type ghidra (line 20) | namespace ghidra {
function Address (line 49) | const Address &ParserContext::getN2addr(void) const
function uintm (line 61) | uintm ParserContext::getInstructionBytes(int4 bytestart,int4 size,uint...
function uintm (line 77) | uintm ParserContext::getInstructionBits(int4 startbit,int4 size,uint4 ...
function uintm (line 96) | uintm ParserContext::getContextBytes(int4 bytestart,int4 size) const
function uintm (line 115) | uintm ParserContext::getContextBits(int4 startbit,int4 size) const
FILE: pypcode/sleigh/context.hh
type ghidra (line 22) | namespace ghidra {
class Token (line 24) | class Token { // A multiple-byte sized chunk of pattern in a bitstream
method Token (line 30) | Token(const string &nm,int4 sz,bool be,int4 ind) : name(nm) { size =...
method int4 (line 31) | int4 getSize(void) const { return size; }
method isBigEndian (line 32) | bool isBigEndian(void) const { return bigendian; }
method int4 (line 33) | int4 getIndex(void) const { return index; }
method string (line 34) | const string &getName(void) const { return name; }
type FixedHandle (line 37) | struct FixedHandle { // A handle that is fully resolved
class Constructor (line 47) | class Constructor
type ConstructState (line 48) | struct ConstructState {
class TripleSymbol (line 57) | class TripleSymbol
type ContextSet (line 58) | struct ContextSet { // Instructions for setting a global context value
class ParserWalker (line 67) | class ParserWalker
method ParserWalker (line 138) | ParserWalker(const ParserContext *c) { const_context = c; cross_cont...
method ParserWalker (line 139) | ParserWalker(const ParserContext *c,const ParserContext *cross) { co...
method ParserContext (line 140) | const ParserContext *getParserContext(void) const { return const_con...
method baseState (line 141) | void baseState(void) { point = const_context->base_state; depth=0; b...
method isState (line 143) | bool isState(void) const { return (point != (ConstructState *)0); }
method pushOperand (line 144) | void pushOperand(int4 i) { breadcrumb[depth++] = i+1; point = point-...
method popOperand (line 145) | void popOperand(void) { point = point->parent; depth-= 1; }
method uint4 (line 146) | uint4 getOffset(int4 i) const { if (i<0) return point->offset;
method Constructor (line 148) | Constructor *getConstructor(void) const { return point->ct; }
method int4 (line 149) | int4 getOperand(void) const { return breadcrumb[depth]; }
method FixedHandle (line 150) | FixedHandle &getParentHandle(void) { return point->hand; }
method FixedHandle (line 151) | const FixedHandle &getFixedHandle(int4 i) const { return point->reso...
method AddrSpace (line 152) | AddrSpace *getCurSpace(void) const { return const_context->getCurSpa...
method AddrSpace (line 153) | AddrSpace *getConstSpace(void) const { return const_context->getCons...
method Address (line 154) | const Address &getAddr(void) const { if (cross_context != (const Par...
method Address (line 155) | const Address &getNaddr(void) const { if (cross_context != (const Pa...
method Address (line 156) | const Address &getN2addr(void) const { if (cross_context != (const P...
method Address (line 157) | const Address &getRefAddr(void) const { if (cross_context != (const ...
method Address (line 158) | const Address &getDestAddr(void) const { if (cross_context != (const...
method int4 (line 159) | int4 getLength(void) const { return const_context->getLength(); }
method uintm (line 160) | uintm getInstructionBytes(int4 byteoff,int4 numbytes) const {
method uintm (line 162) | uintm getContextBytes(int4 byteoff,int4 numbytes) const {
method uintm (line 164) | uintm getInstructionBits(int4 startbit,int4 size) const {
method uintm (line 166) | uintm getContextBits(int4 startbit,int4 size) const {
class ParserWalkerChange (line 68) | class ParserWalkerChange
method ParserWalkerChange (line 174) | ParserWalkerChange(ParserContext *c) : ParserWalker(c) { context = c; }
method ParserContext (line 175) | ParserContext *getParserContext(void) { return context; }
method ConstructState (line 176) | ConstructState *getPoint(void) { return point; }
method setOffset (line 177) | void setOffset(uint4 off) { point->offset = off; }
method setConstructor (line 178) | void setConstructor(Constructor *c) { point->ct = c; }
method setCurrentLength (line 179) | void setCurrentLength(int4 len) { point->length = len; }
class Translate (line 69) | class Translate
class ParserContext (line 71) | class ParserContext {
method uint1 (line 100) | uint1 *getBuffer(void) { return buf; }
method int4 (line 102) | int4 getParserState(void) const { return parsestate; }
method setParserState (line 103) | void setParserState(int4 st) { parsestate = st; }
method setAddr (line 106) | void setAddr(const Address &ad) { addr = ad; n2addr = Address(); }
method setNaddr (line 107) | void setNaddr(const Address &ad) { naddr = ad; }
method setCalladdr (line 108) | void setCalladdr(const Address &ad) { calladdr = ad; }
method clearCommits (line 110) | void clearCommits(void) { contextcommit.clear(); }
method Address (line 112) | const Address &getAddr(void) const { return addr; }
method Address (line 113) | const Address &getNaddr(void) const { return naddr; }
method Address (line 115) | const Address &getDestAddr(void) const { return calladdr; }
method Address (line 116) | const Address &getRefAddr(void) const { return calladdr; }
method AddrSpace (line 117) | AddrSpace *getCurSpace(void) const { return addr.getSpace(); }
method AddrSpace (line 118) | AddrSpace *getConstSpace(void) const { return const_space; }
method setContextWord (line 123) | void setContextWord(int4 i,uintm val,uintm mask) { context[i] = (con...
method loadContext (line 124) | void loadContext(void) { contcache->getContext(addr,context); }
method int4 (line 125) | int4 getLength(void) const { return base_state->length; }
method setDelaySlot (line 126) | void setDelaySlot(int4 val) { delayslot = val; }
method int4 (line 127) | int4 getDelaySlot(void) const { return delayslot; }
class ParserWalker (line 130) | class ParserWalker { // A class for walking the ParserContext
method ParserWalker (line 138) | ParserWalker(const ParserContext *c) { const_context = c; cross_cont...
method ParserWalker (line 139) | ParserWalker(const ParserContext *c,const ParserContext *cross) { co...
method ParserContext (line 140) | const ParserContext *getParserContext(void) const { return const_con...
method baseState (line 141) | void baseState(void) { point = const_context->base_state; depth=0; b...
method isState (line 143) | bool isState(void) const { return (point != (ConstructState *)0); }
method pushOperand (line 144) | void pushOperand(int4 i) { breadcrumb[depth++] = i+1; point = point-...
method popOperand (line 145) | void popOperand(void) { point = point->parent; depth-= 1; }
method uint4 (line 146) | uint4 getOffset(int4 i) const { if (i<0) return point->offset;
method Constructor (line 148) | Constructor *getConstructor(void) const { return point->ct; }
method int4 (line 149) | int4 getOperand(void) const { return breadcrumb[depth]; }
method FixedHandle (line 150) | FixedHandle &getParentHandle(void) { return point->hand; }
method FixedHandle (line 151) | const FixedHandle &getFixedHandle(int4 i) const { return point->reso...
method AddrSpace (line 152) | AddrSpace *getCurSpace(void) const { return const_context->getCurSpa...
method AddrSpace (line 153) | AddrSpace *getConstSpace(void) const { return const_context->getCons...
method Address (line 154) | const Address &getAddr(void) const { if (cross_context != (const Par...
method Address (line 155) | const Address &getNaddr(void) const { if (cross_context != (const Pa...
method Address (line 156) | const Address &getN2addr(void) const { if (cross_context != (const P...
method Address (line 157) | const Address &getRefAddr(void) const { if (cross_context != (const ...
method Address (line 158) | const Address &getDestAddr(void) const { if (cross_context != (const...
method int4 (line 159) | int4 getLength(void) const { return const_context->getLength(); }
method uintm (line 160) | uintm getInstructionBytes(int4 byteoff,int4 numbytes) const {
method uintm (line 162) | uintm getContextBytes(int4 byteoff,int4 numbytes) const {
method uintm (line 164) | uintm getInstructionBits(int4 startbit,int4 size) const {
method uintm (line 166) | uintm getContextBits(int4 startbit,int4 size) const {
class ParserWalkerChange (line 170) | class ParserWalkerChange : public ParserWalker { // Extension to walke...
method ParserWalkerChange (line 174) | ParserWalkerChange(ParserContext *c) : ParserWalker(c) { context = c; }
method ParserContext (line 175) | ParserContext *getParserContext(void) { return context; }
method ConstructState (line 176) | ConstructState *getPoint(void) { return point; }
method setOffset (line 177) | void setOffset(uint4 off) { point->offset = off; }
method setConstructor (line 178) | void setConstructor(Constructor *c) { point->ct = c; }
method setCurrentLength (line 179) | void setCurrentLength(int4 len) { point->length = len; }
type SleighError (line 183) | struct SleighError : public LowlevelError {
method SleighError (line 184) | SleighError(const string &s) : LowlevelError(s) {}
FILE: pypcode/sleigh/emulate.cc
type ghidra (line 18) | namespace ghidra {
function VarnodeData (line 114) | VarnodeData *PcodeEmitCache::createVarnode(const VarnodeData *var)
FILE: pypcode/sleigh/emulate.hh
type ghidra (line 25) | namespace ghidra {
class Emulate (line 27) | class Emulate
method Emulate (line 203) | Emulate(void) { emu_halted = true; currentBehave = (OpBehavior *)0; }
class BreakTable (line 39) | class BreakTable {
class BreakCallBack (line 79) | class BreakCallBack {
class BreakTableCallBack (line 139) | class BreakTableCallBack : public BreakTable {
class Emulate (line 170) | class Emulate {
method Emulate (line 203) | Emulate(void) { emu_halted = true; currentBehave = (OpBehavior *)0; }
class EmulateMemory (line 245) | class EmulateMemory : public Emulate {
method EmulateMemory (line 266) | EmulateMemory(MemoryState *mem) { memstate = mem; currentOp = (Pcode...
function MemoryState (line 271) | inline MemoryState *EmulateMemory::getMemoryState(void) const
class PcodeEmitCache (line 280) | class PcodeEmitCache : public PcodeEmit {
class EmulatePcodeCache (line 298) | class EmulatePcodeCache : public EmulateMemory {
function int4 (line 340) | inline int4 EmulatePcodeCache::numCurrentOps(void) const
function int4 (line 349) | inline int4 EmulatePcodeCache::getCurrentOpIndex(void) const
function PcodeOpRaw (line 359) | inline PcodeOpRaw *EmulatePcodeCache::getOpByIndex(int4 i) const
function Address (line 366) | inline Address EmulatePcodeCache::getExecuteAddress(void) const
FILE: pypcode/sleigh/error.hh
type ghidra (line 36) | namespace ghidra {
type LowlevelError (line 74) | struct LowlevelError {
method LowlevelError (line 77) | LowlevelError(const string &s) { explain = s; }
type RecovError (line 87) | struct RecovError : public LowlevelError {
method RecovError (line 89) | RecovError(const string &s) : LowlevelError(s) {}
type ParseError (line 97) | struct ParseError : public LowlevelError { // Parsing error
method ParseError (line 99) | ParseError(const string &s) : LowlevelError(s) {}
FILE: pypcode/sleigh/filemanage.cc
type ghidra (line 32) | namespace ghidra {
type stat (line 118) | struct stat
type dirent (line 181) | struct dirent
type dirent (line 189) | struct dirent
type dirent (line 249) | struct dirent
type dirent (line 259) | struct dirent
type stat (line 265) | struct stat
function string (line 324) | string FileManage::buildPath(const vector<string> &pathels,int level)
function string (line 369) | string FileManage::discoverGhidraRoot(const char *argv0)
FILE: pypcode/sleigh/filemanage.hh
type ghidra (line 27) | namespace ghidra {
class FileManage (line 34) | class FileManage {
method isAbsolutePath (line 52) | static bool isAbsolutePath(const string &full) { if (full.empty()) r...
FILE: pypcode/sleigh/float.cc
type ghidra (line 23) | namespace ghidra {
function uintb (line 113) | uintb FloatFormat::extractFractionalCode(uintb x) const
function int4 (line 132) | int4 FloatFormat::extractExponentCode(uintb x) const
function uintb (line 144) | uintb FloatFormat::setFractionalCode(uintb x,uintb code) const
function uintb (line 158) | uintb FloatFormat::setSign(uintb x,bool sign) const
function uintb (line 171) | uintb FloatFormat::setExponentCode(uintb x,uintb code) const
function uintb (line 181) | uintb FloatFormat::getZeroEncoding(bool sgn) const
function uintb (line 193) | uintb FloatFormat::getInfinityEncoding(bool sgn) const
function uintb (line 205) | uintb FloatFormat::getNaNEncoding(bool sgn) const
function uintb (line 293) | uintb FloatFormat::getEncoding(double host) const
function uintb (line 352) | uintb FloatFormat::convertEncoding(uintb encoding,
function string (line 427) | string FloatFormat::printDecimal(double host,bool forcesci) const
function uintb (line 470) | uintb FloatFormat::opEqual(uintb a,uintb b) const
function uintb (line 483) | uintb FloatFormat::opNotEqual(uintb a,uintb b) const
function uintb (line 496) | uintb FloatFormat::opLess(uintb a,uintb b) const
function uintb (line 509) | uintb FloatFormat::opLessEqual(uintb a,uintb b) const
function uintb (line 521) | uintb FloatFormat::opNan(uintb a) const
function uintb (line 533) | uintb FloatFormat::opAdd(uintb a,uintb b) const
function uintb (line 545) | uintb FloatFormat::opDiv(uintb a,uintb b) const
function uintb (line 557) | uintb FloatFormat::opMult(uintb a,uintb b) const
function uintb (line 569) | uintb FloatFormat::opSub(uintb a,uintb b) const
function uintb (line 580) | uintb FloatFormat::opNeg(uintb a) const
function uintb (line 590) | uintb FloatFormat::opAbs(uintb a) const
function uintb (line 600) | uintb FloatFormat::opSqrt(uintb a) const
function uintb (line 611) | uintb FloatFormat::opInt2Float(uintb a,int4 sizein) const
function uintb (line 622) | uintb FloatFormat::opFloat2Float(uintb a,const FloatFormat &outformat)...
function uintb (line 631) | uintb FloatFormat::opTrunc(uintb a,int4 sizeout) const
function uintb (line 644) | uintb FloatFormat::opCeil(uintb a) const
function uintb (line 654) | uintb FloatFormat::opFloor(uintb a) const
function uintb (line 664) | uintb FloatFormat::opRound(uintb a) const
FILE: pypcode/sleigh/float.hh
type ghidra (line 24) | namespace ghidra {
class FloatFormat (line 32) | class FloatFormat {
type floatclass (line 35) | enum floatclass {
method int4 (line 66) | int4 getSize(void) const { return size; }
FILE: pypcode/sleigh/globalcontext.cc
type ghidra (line 18) | namespace ghidra {
function uintm (line 114) | uintm ContextDatabase::getDefaultValue(const string &nm) const
function uintm (line 144) | uintm ContextDatabase::getVariable(const string &nm,const Address &add...
function uintb (line 224) | uintb ContextDatabase::getTrackedValue(const VarnodeData &mem,const Ad...
function ContextBitRange (line 385) | ContextBitRange &ContextInternal::getVariable(const string &nm)
function ContextBitRange (line 396) | const ContextBitRange &ContextInternal::getVariable(const string &nm) ...
function uintm (line 407) | const uintm *ContextInternal::getContext(const Address &addr,
function TrackedSet (line 470) | TrackedSet &ContextInternal::createSet(const Address &addr1,const Addr...
FILE: pypcode/sleigh/globalcontext.hh
type ghidra (line 25) | namespace ghidra {
class ContextBitRange (line 40) | class ContextBitRange {
method ContextBitRange (line 47) | ContextBitRange(void) { }
method int4 (line 49) | int4 getShift(void) const { return shift; }
method uintm (line 50) | uintm getMask(void) const { return mask; }
method int4 (line 51) | int4 getWord(void) const { return word; }
method setValue (line 57) | void setValue(uintm *vec,uintm val) const {
method uintm (line 68) | uintm getValue(const uintm *vec) const {
type TrackedContext (line 78) | struct TrackedContext {
class ContextDatabase (line 118) | class ContextDatabase {
class ContextInternal (line 264) | class ContextInternal : public ContextDatabase {
type FreeArray (line 271) | struct FreeArray {
method FreeArray (line 275) | FreeArray(void) { size=0; array = (uintm *)0; mask = (uintm *)0; }
method uintm (line 292) | virtual uintm *getDefaultValue(void) { return database.defaultValue(...
method uintm (line 293) | virtual const uintm *getDefaultValue(void) const { return database.d...
method ContextInternal (line 295) | ContextInternal(void) { size = 0; }
method int4 (line 297) | virtual int4 getContextSize(void) const { return size; }
method uintm (line 300) | virtual const uintm *getContext(const Address &addr) const { return ...
method TrackedSet (line 303) | virtual TrackedSet &getTrackedDefault(void) { return trackbase.defau...
method TrackedSet (line 304) | virtual const TrackedSet &getTrackedSet(const Address &addr) const {...
class ContextCache (line 317) | class ContextCache {
method ContextDatabase (line 326) | ContextDatabase *getDatabase(void) const { return database; }
method allowSet (line 327) | void allowSet(bool val) { allowset = val; }
FILE: pypcode/sleigh/loadimage.cc
type ghidra (line 18) | namespace ghidra {
function uint1 (line 29) | uint1 *LoadImage::load(int4 size,const Address &addr)
function string (line 71) | string RawLoadImage::getArchType(void) const
FILE: pypcode/sleigh/loadimage.hh
type ghidra (line 24) | namespace ghidra {
type DataUnavailError (line 39) | struct DataUnavailError : public LowlevelError {
method DataUnavailError (line 40) | DataUnavailError(const string &s) : LowlevelError(s) {}
type LoadImageFunc (line 46) | struct LoadImageFunc {
type LoadImageSection (line 54) | struct LoadImageSection {
class LoadImage (line 81) | class LoadImage {
class RawLoadImage (line 106) | class RawLoadImage : public LoadImage {
method attachToSpace (line 113) | void attachToSpace(AddrSpace *id) { spaceid = id; }
function string (line 135) | inline const string &LoadImage::getFileName(void) const {
FILE: pypcode/sleigh/loadimage_bfd.cc
type ghidra (line 19) | namespace ghidra {
function string (line 51) | string LoadImageBfd::getArchType(void) const
function asection (line 99) | asection *LoadImageBfd::findSection(uintb offset,uintb &secsize) const
FILE: pypcode/sleigh/loadimage_bfd.hh
type ghidra (line 49) | namespace ghidra {
type ImportRecord (line 51) | struct ImportRecord {
class LoadImageBfd (line 59) | class LoadImageBfd : public LoadImage {
method attachToSpace (line 76) | void attachToSpace(AddrSpace *id) { spaceid = id; }
method getImportTable (line 79) | void getImportTable(vector<ImportRecord> &irec) { throw LowlevelErro...
FILE: pypcode/sleigh/marshal.cc
type ghidra (line 19) | namespace ghidra {
function uint4 (line 126) | uint4 XmlDecode::peekElement(void)
function uint4 (line 145) | uint4 XmlDecode::openElement(void)
function uint4 (line 169) | uint4 XmlDecode::openElement(const ElementId &elemId)
function uint4 (line 231) | uint4 XmlDecode::getNextAttributeId(void)
function uint4 (line 243) | uint4 XmlDecode::getIndexedAttributeId(const AttributeId &attribId)
function int4 (line 269) | int4 XmlDecode::findMatchingAttribute(const Element *el,const string &...
function intb (line 296) | intb XmlDecode::readSignedInteger(void)
function intb (line 307) | intb XmlDecode::readSignedInteger(const AttributeId &attribId)
function intb (line 326) | intb XmlDecode::readSignedIntegerExpectString(const string &expect,int...
function intb (line 340) | intb XmlDecode::readSignedIntegerExpectString(const AttributeId &attri...
function uintb (line 353) | uintb XmlDecode::readUnsignedInteger(void)
function uintb (line 364) | uintb XmlDecode::readUnsignedInteger(const AttributeId &attribId)
function string (line 383) | string XmlDecode::readString(void)
function string (line 390) | string XmlDecode::readString(const AttributeId &attribId)
function AddrSpace (line 400) | AddrSpace *XmlDecode::readSpace(void)
function AddrSpace (line 411) | AddrSpace *XmlDecode::readSpace(const AttributeId &attribId)
function OpCode (line 429) | OpCode XmlDecode::readOpcode(void)
function OpCode (line 440) | OpCode XmlDecode::readOpcode(AttributeId &attribId)
function uint8 (line 603) | uint8 PackedDecode::readInteger(int4 len)
function uint4 (line 716) | uint4 PackedDecode::peekElement(void)
function uint4 (line 730) | uint4 PackedDecode::openElement(void)
function uint4 (line 755) | uint4 PackedDecode::openElement(const ElementId &elemId)
function uint4 (line 808) | uint4 PackedDecode::getNextAttributeId(void)
function uint4 (line 825) | uint4 PackedDecode::getIndexedAttributeId(const AttributeId &attribId)
function intb (line 853) | intb PackedDecode::readSignedInteger(void)
function intb (line 878) | intb PackedDecode::readSignedInteger(const AttributeId &attribId)
function intb (line 887) | intb PackedDecode::readSignedIntegerExpectString(const string &expect,...
function intb (line 912) | intb PackedDecode::readSignedIntegerExpectString(const AttributeId &at...
function uintb (line 921) | uintb PackedDecode::readUnsignedInteger(void)
function uintb (line 942) | uintb PackedDecode::readUnsignedInteger(const AttributeId &attribId)
function string (line 951) | string PackedDecode::readString(void)
function string (line 988) | string PackedDecode::readString(const AttributeId &attribId)
function AddrSpace (line 997) | AddrSpace *PackedDecode::readSpace(void)
function AddrSpace (line 1033) | AddrSpace *PackedDecode::readSpace(const AttributeId &attribId)
function OpCode (line 1042) | OpCode PackedDecode::readOpcode(void)
function OpCode (line 1051) | OpCode PackedDecode::readOpcode(AttributeId &attribId)
FILE: pypcode/sleigh/marshal.hh
type ghidra (line 24) | namespace ghidra {
class AttributeId (line 41) | class AttributeId {
method string (line 48) | const string &getName(void) const { return name; }
method uint4 (line 49) | uint4 getId(void) const { return id; }
class ElementId (line 65) | class ElementId {
method string (line 72) | const string &getName(void) const { return name; }
method uint4 (line 73) | uint4 getId(void) const { return id; }
class AddrSpace (line 83) | class AddrSpace
class AddrSpaceManager (line 84) | class AddrSpaceManager
class Decoder (line 99) | class Decoder {
method Decoder (line 103) | Decoder(const AddrSpaceManager *spc) { spcManager = spc; }
method AddrSpaceManager (line 105) | const AddrSpaceManager *getAddrSpaceManager(void) const { return spc...
method skipElement (line 291) | void skipElement(void) {
class Encoder (line 308) | class Encoder {
class XmlDecode (line 383) | class XmlDecode : public Decoder {
method XmlDecode (line 392) | XmlDecode(const AddrSpaceManager *spc,const Element *root,int4 sc=0)...
method XmlDecode (line 394) | XmlDecode(const AddrSpaceManager *spc,int4 sc=0) : Decoder(spc) {
method Element (line 396) | const Element *getCurrentXmlElement(void) const { return elStack.bac...
class XmlEncode (line 427) | class XmlEncode : public Encoder {
method XmlEncode (line 442) | XmlEncode(ostream &s,bool doFormat=true) : outStream(s) { depth=0; t...
type PackedFormat (line 480) | namespace PackedFormat {
class PackedDecode (line 512) | class PackedDecode : public Decoder {
class ByteChunk (line 517) | class ByteChunk {
method ByteChunk (line 522) | ByteChunk(uint1 *s,uint1 *e) { start = s; end = e; }
class Position (line 525) | class Position {
method uint1 (line 536) | uint1 getByte(Position &pos) { return *pos.current; }
method uint4 (line 541) | uint4 readLengthCode(uint1 typeByte) { return ((uint4)typeByte & Pac...
method PackedDecode (line 549) | PackedDecode(const AddrSpaceManager *spcManager) : Decoder(spcManage...
class PackedEncode (line 579) | class PackedEncode : public Encoder {
method PackedEncode (line 584) | PackedEncode(ostream &s) : outStream(s) {}
function uint1 (line 599) | inline uint1 PackedDecode::getBytePlus1(Position &pos)
function uint1 (line 616) | inline uint1 PackedDecode::getNextByte(Position &pos)
function uint1 (line 651) | inline uint1 *PackedDecode::allocateNextInputBuffer(int4 pad)
function uint4 (line 686) | inline uint4 AttributeId::find(const string &nm,int4 scope)
function uint4 (line 702) | inline uint4 ElementId::find(const string &nm,int4 scope)
FILE: pypcode/sleigh/memstate.cc
type ghidra (line 19) | namespace ghidra {
function uintb (line 27) | uintb MemoryBank::constructValue(const uint1 *ptr,int4 size,bool bigen...
function uintb (line 252) | uintb MemoryBank::getValue(uintb offset,int4 size) const
function uintb (line 365) | uintb MemoryImage::find(uintb addr) const
function uintb (line 450) | uintb MemoryPageOverlay::find(uintb addr) const
function uintb (line 575) | uintb MemoryHashOverlay::find(uintb addr) const
function MemoryBank (line 636) | MemoryBank *MemoryState::getMemoryBank(AddrSpace *spc) const
function uintb (line 668) | uintb MemoryState::getValue(AddrSpace *spc,uintb off,int4 size) const
function uintb (line 697) | uintb MemoryState::getValue(const string &nm) const
FILE: pypcode/sleigh/memstate.hh
type ghidra (line 25) | namespace ghidra {
class MemoryBank (line 38) | class MemoryBank {
function int4 (line 67) | inline int4 MemoryBank::getWordSize(void) const
function int4 (line 76) | inline int4 MemoryBank::getPageSize(void) const
function AddrSpace (line 84) | inline AddrSpace *MemoryBank::getSpace(void) const
class MemoryImage (line 95) | class MemoryImage : public MemoryBank {
method insert (line 98) | virtual void insert(uintb addr,uintb val) {
class MemoryPageOverlay (line 112) | class MemoryPageOverlay : public MemoryBank {
class MemoryHashOverlay (line 130) | class MemoryHashOverlay : public MemoryBank {
class Translate (line 143) | class Translate
class MemoryState (line 150) | class MemoryState {
function Translate (line 181) | inline Translate *MemoryState::getTranslate(void) const
function uintb (line 201) | inline uintb MemoryState::getValue(const VarnodeData *vn) const
FILE: pypcode/sleigh/opbehavior.cc
type ghidra (line 19) | namespace ghidra {
function uintb (line 114) | uintb OpBehavior::evaluateUnary(int4 sizeout,int4 sizein,uintb in1) const
function uintb (line 126) | uintb OpBehavior::evaluateBinary(int4 sizeout,int4 sizein,uintb in1,ui...
function uintb (line 139) | uintb OpBehavior::evaluateTernary(int4 sizeout,int4 sizein,uintb in1,u...
function uintb (line 151) | uintb OpBehavior::recoverInputUnary(int4 sizeout,uintb out,int4 sizein...
function uintb (line 165) | uintb OpBehavior::recoverInputBinary(int4 slot,int4 sizeout,uintb out,...
function uintb (line 171) | uintb OpBehaviorCopy::evaluateUnary(int4 sizeout,int4 sizein,uintb in1...
function uintb (line 177) | uintb OpBehaviorCopy::recoverInputUnary(int4 sizeout,uintb out,int4 si...
function uintb (line 183) | uintb OpBehaviorEqual::evaluateBinary(int4 sizeout,int4 sizein,uintb i...
function uintb (line 190) | uintb OpBehaviorNotEqual::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 197) | uintb OpBehaviorIntSless::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 217) | uintb OpBehaviorIntSlessEqual::evaluateBinary(int4 sizeout,int4 sizein...
function uintb (line 237) | uintb OpBehaviorIntLess::evaluateBinary(int4 sizeout,int4 sizein,uintb...
function uintb (line 244) | uintb OpBehaviorIntLessEqual::evaluateBinary(int4 sizeout,int4 sizein,...
function uintb (line 251) | uintb OpBehaviorIntZext::evaluateUnary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 257) | uintb OpBehaviorIntZext::recoverInputUnary(int4 sizeout,uintb out,int4...
function uintb (line 266) | uintb OpBehaviorIntSext::evaluateUnary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 273) | uintb OpBehaviorIntSext::recoverInputUnary(int4 sizeout,uintb out,int4...
function uintb (line 290) | uintb OpBehaviorIntAdd::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 297) | uintb OpBehaviorIntAdd::recoverInputBinary(int4 slot,int4 sizeout,uint...
function uintb (line 304) | uintb OpBehaviorIntSub::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 311) | uintb OpBehaviorIntSub::recoverInputBinary(int4 slot,int4 sizeout,uint...
function uintb (line 323) | uintb OpBehaviorIntCarry::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 330) | uintb OpBehaviorIntScarry::evaluateBinary(int4 sizeout,int4 sizein,uin...
function uintb (line 346) | uintb OpBehaviorIntSborrow::evaluateBinary(int4 sizeout,int4 sizein,ui...
function uintb (line 362) | uintb OpBehaviorInt2Comp::evaluateUnary(int4 sizeout,int4 sizein,uintb...
function uintb (line 369) | uintb OpBehaviorInt2Comp::recoverInputUnary(int4 sizeout,uintb out,int...
function uintb (line 376) | uintb OpBehaviorIntNegate::evaluateUnary(int4 sizeout,int4 sizein,uint...
function uintb (line 383) | uintb OpBehaviorIntNegate::recoverInputUnary(int4 sizeout,uintb out,in...
function uintb (line 390) | uintb OpBehaviorIntXor::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 397) | uintb OpBehaviorIntAnd::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 404) | uintb OpBehaviorIntOr::evaluateBinary(int4 sizeout,int4 sizein,uintb i...
function uintb (line 411) | uintb OpBehaviorIntLeft::evaluateBinary(int4 sizeout,int4 sizein,uintb...
function uintb (line 421) | uintb OpBehaviorIntLeft::recoverInputBinary(int4 slot,int4 sizeout,uin...
function uintb (line 432) | uintb OpBehaviorIntRight::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 442) | uintb OpBehaviorIntRight::recoverInputBinary(int4 slot,int4 sizeout,ui...
function uintb (line 454) | uintb OpBehaviorIntSright::evaluateBinary(int4 sizeout,int4 sizein,uin...
function uintb (line 474) | uintb OpBehaviorIntSright::recoverInputBinary(int4 slot,int4 sizeout,u...
function uintb (line 492) | uintb OpBehaviorIntMult::evaluateBinary(int4 sizeout,int4 sizein,uintb...
function uintb (line 499) | uintb OpBehaviorIntDiv::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 507) | uintb OpBehaviorIntSdiv::evaluateBinary(int4 sizeout,int4 sizein,uintb...
function uintb (line 519) | uintb OpBehaviorIntRem::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 529) | uintb OpBehaviorIntSrem::evaluateBinary(int4 sizeout,int4 sizein,uintb...
function uintb (line 541) | uintb OpBehaviorBoolNegate::evaluateUnary(int4 sizeout,int4 sizein,uin...
function uintb (line 548) | uintb OpBehaviorBoolXor::evaluateBinary(int4 sizeout,int4 sizein,uintb...
function uintb (line 555) | uintb OpBehaviorBoolAnd::evaluateBinary(int4 sizeout,int4 sizein,uintb...
function uintb (line 562) | uintb OpBehaviorBoolOr::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 569) | uintb OpBehaviorFloatEqual::evaluateBinary(int4 sizeout,int4 sizein,ui...
function uintb (line 579) | uintb OpBehaviorFloatNotEqual::evaluateBinary(int4 sizeout,int4 sizein...
function uintb (line 589) | uintb OpBehaviorFloatLess::evaluateBinary(int4 sizeout,int4 sizein,uin...
function uintb (line 599) | uintb OpBehaviorFloatLessEqual::evaluateBinary(int4 sizeout,int4 sizei...
function uintb (line 609) | uintb OpBehaviorFloatNan::evaluateUnary(int4 sizeout,int4 sizein,uintb...
function uintb (line 619) | uintb OpBehaviorFloatAdd::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 629) | uintb OpBehaviorFloatDiv::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 639) | uintb OpBehaviorFloatMult::evaluateBinary(int4 sizeout,int4 sizein,uin...
function uintb (line 649) | uintb OpBehaviorFloatSub::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 659) | uintb OpBehaviorFloatNeg::evaluateUnary(int4 sizeout,int4 sizein,uintb...
function uintb (line 669) | uintb OpBehaviorFloatAbs::evaluateUnary(int4 sizeout,int4 sizein,uintb...
function uintb (line 679) | uintb OpBehaviorFloatSqrt::evaluateUnary(int4 sizeout,int4 sizein,uint...
function uintb (line 689) | uintb OpBehaviorFloatInt2Float::evaluateUnary(int4 sizeout,int4 sizein...
function uintb (line 699) | uintb OpBehaviorFloatFloat2Float::evaluateUnary(int4 sizeout,int4 size...
function uintb (line 712) | uintb OpBehaviorFloatTrunc::evaluateUnary(int4 sizeout,int4 sizein,uin...
function uintb (line 722) | uintb OpBehaviorFloatCeil::evaluateUnary(int4 sizeout,int4 sizein,uint...
function uintb (line 732) | uintb OpBehaviorFloatFloor::evaluateUnary(int4 sizeout,int4 sizein,uin...
function uintb (line 742) | uintb OpBehaviorFloatRound::evaluateUnary(int4 sizeout,int4 sizein,uin...
function uintb (line 752) | uintb OpBehaviorPiece::evaluateBinary(int4 sizeout,int4 sizein,uintb i...
function uintb (line 759) | uintb OpBehaviorSubpiece::evaluateBinary(int4 sizeout,int4 sizein,uint...
function uintb (line 768) | uintb OpBehaviorPtradd::evaluateTernary(int4 sizeout,int4 sizein,uintb...
function uintb (line 775) | uintb OpBehaviorPtrsub::evaluateBinary(int4 sizeout,int4 sizein,uintb ...
function uintb (line 782) | uintb OpBehaviorPopcount::evaluateUnary(int4 sizeout,int4 sizein,uintb...
function uintb (line 788) | uintb OpBehaviorLzcount::evaluateUnary(int4 sizeout,int4 sizein,uintb ...
FILE: pypcode/sleigh/opbehavior.hh
type ghidra (line 24) | namespace ghidra {
class Translate (line 26) | class Translate
type EvaluationError (line 30) | struct EvaluationError : public LowlevelError {
method EvaluationError (line 31) | EvaluationError(const string &s) : LowlevelError(s) {}
class OpBehavior (line 44) | class OpBehavior {
function OpCode (line 108) | inline OpCode OpBehavior::getOpcode(void) const {
class OpBehaviorCopy (line 128) | class OpBehaviorCopy : public OpBehavior {
method OpBehaviorCopy (line 130) | OpBehaviorCopy(void) : OpBehavior(CPUI_COPY,true) {}
class OpBehaviorEqual (line 136) | class OpBehaviorEqual : public OpBehavior {
method OpBehaviorEqual (line 138) | OpBehaviorEqual(void) : OpBehavior(CPUI_INT_EQUAL,false) {}
class OpBehaviorNotEqual (line 143) | class OpBehaviorNotEqual : public OpBehavior {
method OpBehaviorNotEqual (line 145) | OpBehaviorNotEqual(void) : OpBehavior(CPUI_INT_NOTEQUAL,false) {}
class OpBehaviorIntSless (line 150) | class OpBehaviorIntSless : public OpBehavior {
method OpBehaviorIntSless (line 152) | OpBehaviorIntSless(void) : OpBehavior(CPUI_INT_SLESS,false) {}
class OpBehaviorIntSlessEqual (line 157) | class OpBehaviorIntSlessEqual : public OpBehavior {
method OpBehaviorIntSlessEqual (line 159) | OpBehaviorIntSlessEqual(void) : OpBehavior(CPUI_INT_SLESSEQUAL,false...
class OpBehaviorIntLess (line 164) | class OpBehaviorIntLess : public OpBehavior {
method OpBehaviorIntLess (line 166) | OpBehaviorIntLess(void) : OpBehavior(CPUI_INT_LESS,false) {}
class OpBehaviorIntLessEqual (line 171) | class OpBehaviorIntLessEqual : public OpBehavior {
method OpBehaviorIntLessEqual (line 173) | OpBehaviorIntLessEqual(void): OpBehavior(CPUI_INT_LESSEQUAL,false) {}
class OpBehaviorIntZext (line 178) | class OpBehaviorIntZext : public OpBehavior {
method OpBehaviorIntZext (line 180) | OpBehaviorIntZext(void): OpBehavior(CPUI_INT_ZEXT,true) {}
class OpBehaviorIntSext (line 186) | class OpBehaviorIntSext : public OpBehavior {
method OpBehaviorIntSext (line 188) | OpBehaviorIntSext(void): OpBehavior(CPUI_INT_SEXT,true) {}
class OpBehaviorIntAdd (line 194) | class OpBehaviorIntAdd : public OpBehavior {
method OpBehaviorIntAdd (line 196) | OpBehaviorIntAdd(void): OpBehavior(CPUI_INT_ADD,false) {}
class OpBehaviorIntSub (line 202) | class OpBehaviorIntSub : public OpBehavior {
method OpBehaviorIntSub (line 204) | OpBehaviorIntSub(void): OpBehavior(CPUI_INT_SUB,false) {}
class OpBehaviorIntCarry (line 210) | class OpBehaviorIntCarry : public OpBehavior {
method OpBehaviorIntCarry (line 212) | OpBehaviorIntCarry(void): OpBehavior(CPUI_INT_CARRY,false) {}
class OpBehaviorIntScarry (line 217) | class OpBehaviorIntScarry : public OpBehavior {
method OpBehaviorIntScarry (line 219) | OpBehaviorIntScarry(void): OpBehavior(CPUI_INT_SCARRY,false) {}
class OpBehaviorIntSborrow (line 224) | class OpBehaviorIntSborrow : public OpBehavior {
method OpBehaviorIntSborrow (line 226) | OpBehaviorIntSborrow(void): OpBehavior(CPUI_INT_SBORROW,false) {}
class OpBehaviorInt2Comp (line 231) | class OpBehaviorInt2Comp : public OpBehavior {
method OpBehaviorInt2Comp (line 233) | OpBehaviorInt2Comp(void): OpBehavior(CPUI_INT_2COMP,true) {}
class OpBehaviorIntNegate (line 239) | class OpBehaviorIntNegate : public OpBehavior {
method OpBehaviorIntNegate (line 241) | OpBehaviorIntNegate(void): OpBehavior(CPUI_INT_NEGATE,true) {}
class OpBehaviorIntXor (line 247) | class OpBehaviorIntXor : public OpBehavior {
method OpBehaviorIntXor (line 249) | OpBehaviorIntXor(void): OpBehavior(CPUI_INT_XOR,false) {}
class OpBehaviorIntAnd (line 254) | class OpBehaviorIntAnd : public OpBehavior {
method OpBehaviorIntAnd (line 256) | OpBehaviorIntAnd(void): OpBehavior(CPUI_INT_AND,false) {}
class OpBehaviorIntOr (line 261) | class OpBehaviorIntOr : public OpBehavior {
method OpBehaviorIntOr (line 263) | OpBehaviorIntOr(void): OpBehavior(CPUI_INT_OR,false) {}
class OpBehaviorIntLeft (line 268) | class OpBehaviorIntLeft : public OpBehavior {
method OpBehaviorIntLeft (line 270) | OpBehaviorIntLeft(void): OpBehavior(CPUI_INT_LEFT,false) {}
class OpBehaviorIntRight (line 276) | class OpBehaviorIntRight : public OpBehavior {
method OpBehaviorIntRight (line 278) | OpBehaviorIntRight(void): OpBehavior(CPUI_INT_RIGHT,false) {}
class OpBehaviorIntSright (line 284) | class OpBehaviorIntSright : public OpBehavior {
method OpBehaviorIntSright (line 286) | OpBehaviorIntSright(void): OpBehavior(CPUI_INT_SRIGHT,false) {}
class OpBehaviorIntMult (line 292) | class OpBehaviorIntMult : public OpBehavior {
method OpBehaviorIntMult (line 294) | OpBehaviorIntMult(void): OpBehavior(CPUI_INT_MULT,false) {}
class OpBehaviorIntDiv (line 299) | class OpBehaviorIntDiv : public OpBehavior {
method OpBehaviorIntDiv (line 301) | OpBehaviorIntDiv(void): OpBehavior(CPUI_INT_DIV,false) {}
class OpBehaviorIntSdiv (line 306) | class OpBehaviorIntSdiv : public OpBehavior {
method OpBehaviorIntSdiv (line 308) | OpBehaviorIntSdiv(void): OpBehavior(CPUI_INT_SDIV,false) {}
class OpBehaviorIntRem (line 313) | class OpBehaviorIntRem : public OpBehavior {
method OpBehaviorIntRem (line 315) | OpBehaviorIntRem(void): OpBehavior(CPUI_INT_REM,false) {}
class OpBehaviorIntSrem (line 320) | class OpBehaviorIntSrem : public OpBehavior {
method OpBehaviorIntSrem (line 322) | OpBehaviorIntSrem(void): OpBehavior(CPUI_INT_SREM,false) {}
class OpBehaviorBoolNegate (line 327) | class OpBehaviorBoolNegate : public OpBehavior {
method OpBehaviorBoolNegate (line 329) | OpBehaviorBoolNegate(void): OpBehavior(CPUI_BOOL_NEGATE,true) {}
class OpBehaviorBoolXor (line 334) | class OpBehaviorBoolXor : public OpBehavior {
method OpBehaviorBoolXor (line 336) | OpBehaviorBoolXor(void): OpBehavior(CPUI_BOOL_XOR,false) {}
class OpBehaviorBoolAnd (line 341) | class OpBehaviorBoolAnd : public OpBehavior {
method OpBehaviorBoolAnd (line 343) | OpBehaviorBoolAnd(void): OpBehavior(CPUI_BOOL_AND,false) {}
class OpBehaviorBoolOr (line 348) | class OpBehaviorBoolOr : public OpBehavior {
method OpBehaviorBoolOr (line 350) | OpBehaviorBoolOr(void): OpBehavior(CPUI_BOOL_OR,false) {}
class OpBehaviorFloatEqual (line 355) | class OpBehaviorFloatEqual : public OpBehavior {
method OpBehaviorFloatEqual (line 358) | OpBehaviorFloatEqual(const Translate *trans): OpBehavior(CPUI_FLOAT_...
class OpBehaviorFloatNotEqual (line 363) | class OpBehaviorFloatNotEqual : public OpBehavior {
method OpBehaviorFloatNotEqual (line 366) | OpBehaviorFloatNotEqual(const Translate *trans): OpBehavior(CPUI_FLO...
class OpBehaviorFloatLess (line 371) | class OpBehaviorFloatLess : public OpBehavior {
method OpBehaviorFloatLess (line 374) | OpBehaviorFloatLess(const Translate *trans) : OpBehavior(CPUI_FLOAT_...
class OpBehaviorFloatLessEqual (line 379) | class OpBehaviorFloatLessEqual : public OpBehavior {
method OpBehaviorFloatLessEqual (line 382) | OpBehaviorFloatLessEqual(const Translate *trans) : OpBehavior(CPUI_F...
class OpBehaviorFloatNan (line 387) | class OpBehaviorFloatNan : public OpBehavior {
method OpBehaviorFloatNan (line 390) | OpBehaviorFloatNan(const Translate *trans) : OpBehavior(CPUI_FLOAT_N...
class OpBehaviorFloatAdd (line 395) | class OpBehaviorFloatAdd : public OpBehavior {
method OpBehaviorFloatAdd (line 398) | OpBehaviorFloatAdd(const Translate *trans) : OpBehavior(CPUI_FLOAT_A...
class OpBehaviorFloatDiv (line 403) | class OpBehaviorFloatDiv : public OpBehavior {
method OpBehaviorFloatDiv (line 406) | OpBehaviorFloatDiv(const Translate *trans) : OpBehavior(CPUI_FLOAT_D...
class OpBehaviorFloatMult (line 411) | class OpBehaviorFloatMult : public OpBehavior {
method OpBehaviorFloatMult (line 414) | OpBehaviorFloatMult(const Translate *trans) : OpBehavior(CPUI_FLOAT_...
class OpBehaviorFloatSub (line 419) | class OpBehaviorFloatSub : public OpBehavior {
method OpBehaviorFloatSub (line 422) | OpBehaviorFloatSub(const Translate *trans) : OpBehavior(CPUI_FLOAT_S...
class OpBehaviorFloatNeg (line 427) | class OpBehaviorFloatNeg : public OpBehavior {
method OpBehaviorFloatNeg (line 430) | OpBehaviorFloatNeg(const Translate *trans) : OpBehavior(CPUI_FLOAT_N...
class OpBehaviorFloatAbs (line 435) | class OpBehaviorFloatAbs : public OpBehavior {
method OpBehaviorFloatAbs (line 438) | OpBehaviorFloatAbs(const Translate *trans) : OpBehavior(CPUI_FLOAT_A...
class OpBehaviorFloatSqrt (line 443) | class OpBehaviorFloatSqrt : public OpBehavior {
method OpBehaviorFloatSqrt (line 446) | OpBehaviorFloatSqrt(const Translate *trans) : OpBehavior(CPUI_FLOAT_...
class OpBehaviorFloatInt2Float (line 451) | class OpBehaviorFloatInt2Float : public OpBehavior {
method OpBehaviorFloatInt2Float (line 454) | OpBehaviorFloatInt2Float(const Translate *trans) : OpBehavior(CPUI_F...
class OpBehaviorFloatFloat2Float (line 459) | class OpBehaviorFloatFloat2Float : public OpBehavior {
method OpBehaviorFloatFloat2Float (line 462) | OpBehaviorFloatFloat2Float(const Translate *trans) : OpBehavior(CPUI...
class OpBehaviorFloatTrunc (line 467) | class OpBehaviorFloatTrunc : public OpBehavior {
method OpBehaviorFloatTrunc (line 470) | OpBehaviorFloatTrunc(const Translate *trans) : OpBehavior(CPUI_FLOAT...
class OpBehaviorFloatCeil (line 475) | class OpBehaviorFloatCeil : public OpBehavior {
method OpBehaviorFloatCeil (line 478) | OpBehaviorFloatCeil(const Translate *trans) : OpBehavior(CPUI_FLOAT_...
class OpBehaviorFloatFloor (line 483) | class OpBehaviorFloatFloor : public OpBehavior {
method OpBehaviorFloatFloor (line 486) | OpBehaviorFloatFloor(const Translate *trans) : OpBehavior(CPUI_FLOAT...
class OpBehaviorFloatRound (line 491) | class OpBehaviorFloatRound : public OpBehavior {
method OpBehaviorFloatRound (line 494) | OpBehaviorFloatRound(const Translate *trans) : OpBehavior(CPUI_FLOAT...
class OpBehaviorPiece (line 499) | class OpBehaviorPiece : public OpBehavior {
method OpBehaviorPiece (line 501) | OpBehaviorPiece(void) : OpBehavior(CPUI_PIECE,false) {}
class OpBehaviorSubpiece (line 506) | class OpBehaviorSubpiece : public OpBehavior {
method OpBehaviorSubpiece (line 508) | OpBehaviorSubpiece(void) : OpBehavior(CPUI_SUBPIECE,false) {}
class OpBehaviorPtradd (line 513) | class OpBehaviorPtradd : public OpBehavior {
method OpBehaviorPtradd (line 515) | OpBehaviorPtradd(void) : OpBehavior(CPUI_PTRADD,false) {}
class OpBehaviorPtrsub (line 520) | class OpBehaviorPtrsub : public OpBehavior {
method OpBehaviorPtrsub (line 522) | OpBehaviorPtrsub(void) : OpBehavior(CPUI_PTRSUB,false) {}
class OpBehaviorPopcount (line 527) | class OpBehaviorPopcount : public OpBehavior {
method OpBehaviorPopcount (line 529) | OpBehaviorPopcount(void) : OpBehavior(CPUI_POPCOUNT,true) {}
class OpBehaviorLzcount (line 534) | class OpBehaviorLzcount : public OpBehavior {
method OpBehaviorLzcount (line 536) | OpBehaviorLzcount(void) : OpBehavior(CPUI_LZCOUNT,true) {}
FILE: pypcode/sleigh/opcodes.cc
type ghidra (line 19) | namespace ghidra {
function OpCode (line 68) | OpCode get_opcode(const string &nm)
function OpCode (line 94) | OpCode get_booleanflip(OpCode opc,bool &reorder)
FILE: pypcode/sleigh/opcodes.hh
type ghidra (line 24) | namespace ghidra {
type OpCode (line 37) | enum OpCode {
FILE: pypcode/sleigh/partmap.hh
type ghidra (line 24) | namespace ghidra {
class partmap (line 50) | class partmap {
method _valuetype (line 63) | const _valuetype &defaultValue(void) const { return defaultvalue; }
method _valuetype (line 64) | _valuetype &defaultValue(void) { return defaultvalue; }
method const_iterator (line 66) | const_iterator begin(void) const { return database.begin(); }
method const_iterator (line 67) | const_iterator end(void) const { return database.end(); }
method iterator (line 68) | iterator begin(void) { return database.begin(); }
method iterator (line 69) | iterator end(void) { return database.end(); }
method const_iterator (line 70) | const_iterator begin(const _linetype &pnt) const { return database.l...
method iterator (line 71) | iterator begin(const _linetype &pnt) { return database.lower_bound(p...
method clear (line 72) | void clear(void) { database.clear(); }
method empty (line 73) | bool empty(void) const { return database.empty(); }
function _valuetype (line 82) | _valuetype &partmap<_linetype,_valuetype>::
function _valuetype (line 101) | const _valuetype &partmap<_linetype,_valuetype>::
function _valuetype (line 118) | _valuetype &partmap<_linetype,_valuetype>::
function _valuetype (line 145) | _valuetype &partmap<_linetype,_valuetype>::
function _valuetype (line 173) | const _valuetype &partmap<_linetype,_valuetype>::
function main (line 208) | int main(int argc,char **argv)
FILE: pypcode/sleigh/pcodecompile.cc
type ghidra (line 18) | namespace ghidra {
function string (line 20) | string Location::format(void) const
function VarnodeTpl (line 295) | VarnodeTpl *PcodeCompile::buildTemporary(void)
function LabelSymbol (line 305) | LabelSymbol *PcodeCompile::defineLabel(string *name)
function ExprTree (line 360) | ExprTree *PcodeCompile::createOp(OpCode opc,ExprTree *vn)
function ExprTree (line 374) | ExprTree *PcodeCompile::createOp(OpCode opc,ExprTree *vn1,
function ExprTree (line 394) | ExprTree *PcodeCompile::createOpOut(VarnodeTpl *outvn,OpCode opc,
function ExprTree (line 410) | ExprTree *PcodeCompile::createOpOutUnary(VarnodeTpl *outvn,OpCode opc,...
function ExprTree (line 467) | ExprTree *PcodeCompile::createLoad(StarQuality *qual,ExprTree *ptr)
function ExprTree (line 518) | ExprTree *PcodeCompile::createUserOp(UserOpSymbol *sym,vector<ExprTree...
function ExprTree (line 540) | ExprTree *PcodeCompile::createVariadic(OpCode opc,vector<ExprTree *> *...
function VarnodeTpl (line 568) | VarnodeTpl *PcodeCompile::buildTruncatedVarnode(VarnodeTpl *basevn,uin...
function ExprTree (line 676) | ExprTree *PcodeCompile::createBitRange(SpecificSymbol *sym,uint4 bitof...
function VarnodeTpl (line 757) | VarnodeTpl *PcodeCompile::addressOf(VarnodeTpl *var,uint4 size)
FILE: pypcode/sleigh/pcodecompile.hh
type ghidra (line 21) | namespace ghidra {
class Location (line 23) | class Location {
method Location (line 27) | Location(void) {}
method Location (line 28) | Location(const string &fname, const int4 line) { filename = fname; l...
method string (line 29) | string getFilename(void) const { return filename; }
method int4 (line 30) | int4 getLineno(void) const { return lineno; }
type StarQuality (line 34) | struct StarQuality {
class ExprTree (line 39) | class ExprTree { // A flattened expression tree
method ExprTree (line 46) | ExprTree(void) { ops = (vector<OpTpl *> *)0; outvn = (VarnodeTpl *)0; }
method VarnodeTpl (line 51) | VarnodeTpl *getOut(void) { return outvn; }
method ConstTpl (line 52) | const ConstTpl &getSize(void) const { return outvn->getSize(); }
class PcodeCompile (line 57) | class PcodeCompile {
method PcodeCompile (line 66) | PcodeCompile(void) { defaultspace=(AddrSpace *)0; constantspace=(Add...
method resetLabelCount (line 72) | void resetLabelCount(void) { local_labelcount=0; }
method setDefaultSpace (line 73) | void setDefaultSpace(AddrSpace *spc) { defaultspace = spc; }
method setConstantSpace (line 74) | void setConstantSpace(AddrSpace *spc) { constantspace = spc; }
method setUniqueSpace (line 75) | void setUniqueSpace(AddrSpace *spc) { uniqspace = spc; }
method setEnforceLocalKey (line 76) | void setEnforceLocalKey(bool val) { enforceLocalKey = val; }
method AddrSpace (line 77) | AddrSpace *getDefaultSpace(void) const { return defaultspace; }
method AddrSpace (line 78) | AddrSpace *getConstantSpace(void) const { return constantspace; }
FILE: pypcode/sleigh/pcodeparse.cc
type ghidra (line 96) | namespace ghidra {
type pcodetokentype (line 152) | enum pcodetokentype
function yy_symbol_value_print (line 1364) | static void
function yy_symbol_print (line 1385) | static void
function yy_stack_print (line 1400) | static void
function yy_reduce_print (line 1423) | static void
function YYPTRDIFF_T (line 1484) | static YYPTRDIFF_T
function YYPTRDIFF_T (line 1523) | static YYPTRDIFF_T
function yysyntax_error (line 1574) | static int
function yydestruct (line 1713) | static void
function yyparse (line 1790) | int
function int4 (line 2776) | int4 PcodeLexer::findIdentifier(const string &str) const
function int4 (line 2795) | int4 PcodeLexer::moveState(void)
function int4 (line 3058) | int4 PcodeLexer::getNextToken(void)
function uint4 (line 3130) | uint4 PcodeSnippet::allocateTemp(void)
function int4 (line 3215) | int4 PcodeSnippet::lex(void)
function pcodelex (line 3292) | int pcodelex(void) {
function pcodeerror (line 3296) | int pcodeerror(const char *s)
FILE: pypcode/sleigh/pcodeparse.hh
type ghidra (line 22) | namespace ghidra {
type IdentRec (line 26) | struct IdentRec {
class PcodeLexer (line 31) | class PcodeLexer {
method starttoken (line 57) | void starttoken(void) { curtoken[0] = curchar; tokpos = 1; }
method advancetoken (line 58) | void advancetoken(void) { curtoken[tokpos++] = curchar; }
method isIdent (line 59) | bool isIdent(char c) const { return (isalnum(c)||(c=='_')||(c=='.')); }
method isHex (line 60) | bool isHex(char c) const { return isxdigit(c); }
method isDec (line 61) | bool isDec(char c) const { return isdigit(c); }
method PcodeLexer (line 65) | PcodeLexer(void) { s = (istream *)0; }
method string (line 68) | const string &getIdentifier(void) const { return curidentifier; }
method uintb (line 69) | uintb getNumber(void) const { return curnum; }
class PcodeSnippet (line 72) | class PcodeSnippet : public PcodeCompile {
method setResult (line 84) | void setResult(ConstructTpl *res) { result = res; }
method ConstructTpl (line 85) | ConstructTpl *releaseResult(void) { ConstructTpl *res = result; resu...
method Location (line 87) | virtual const Location *getLocation(SleighSymbol *sym) const { retur...
method reportWarning (line 89) | virtual void reportWarning(const Location *loc, const string &msg) {}
method hasErrors (line 90) | bool hasErrors(void) const { return (errorcount != 0); }
method string (line 91) | const string getErrorMessage(void) const { return firsterror; }
method setUniqueBase (line 92) | void setUniqueBase(uint4 val) { tempbase = val; }
method uint4 (line 93) | uint4 getUniqueBase(void) const { return tempbase; }
FILE: pypcode/sleigh/pcoderaw.cc
type ghidra (line 19) | namespace ghidra {
function OpCode (line 96) | OpCode PcodeOpRaw::decode(Decoder &decoder,int4 isize,VarnodeData *inv...
FILE: pypcode/sleigh/pcoderaw.hh
type ghidra (line 24) | namespace ghidra {
type VarnodeData (line 35) | struct VarnodeData {
function Address (line 96) | inline Address VarnodeData::getAddr(void) const {
function AddrSpace (line 101) | inline AddrSpace *VarnodeData::getSpaceFromConst(void) const {
class PcodeOpRaw (line 110) | class PcodeOpRaw {
function OpBehavior (line 145) | inline OpBehavior *PcodeOpRaw::getBehavior(void) const
function OpCode (line 154) | inline OpCode PcodeOpRaw::getOpcode(void) const
function SeqNum (line 176) | inline const SeqNum &PcodeOpRaw::getSeqNum(void) const
function Address (line 185) | inline const Address &PcodeOpRaw::getAddr(void) const
function VarnodeData (line 201) | inline VarnodeData *PcodeOpRaw::getOutput(void) const
function int4 (line 225) | inline int4 PcodeOpRaw::numInput(void) const
function VarnodeData (line 236) | inline VarnodeData *PcodeOpRaw::getInput(int4 i) const
FILE: pypcode/sleigh/semantics.cc
type ghidra (line 19) | namespace ghidra {
function uintb (line 116) | uintb ConstTpl::fix(const ParserWalker &walker) const
function AddrSpace (line 181) | AddrSpace *ConstTpl::fixSpace(const ParserWalker &walker) const
function int4 (line 466) | int4 VarnodeTpl::transfer(const vector<HandleTpl *> ¶ms)
function int4 (line 763) | int4 ConstructTpl::fillinBuild(vector<int4> &check,AddrSpace *const_sp...
function int4 (line 888) | int4 ConstructTpl::decode(Decoder &decoder)
FILE: pypcode/sleigh/semantics.hh
type ghidra (line 22) | namespace ghidra {
class Translate (line 32) | class Translate
class HandleTpl (line 33) | class HandleTpl
method HandleTpl (line 119) | HandleTpl(void) {}
method ConstTpl (line 123) | const ConstTpl &getSpace(void) const { return space; }
method ConstTpl (line 124) | const ConstTpl &getPtrSpace(void) const { return ptrspace; }
method ConstTpl (line 125) | const ConstTpl &getPtrOffset(void) const { return ptroffset; }
method ConstTpl (line 126) | const ConstTpl &getPtrSize(void) const { return ptrsize; }
method ConstTpl (line 127) | const ConstTpl &getSize(void) const { return size; }
method ConstTpl (line 128) | const ConstTpl &getTempSpace(void) const { return temp_space; }
method ConstTpl (line 129) | const ConstTpl &getTempOffset(void) const { return temp_offset; }
method setSize (line 130) | void setSize(const ConstTpl &sz) { size = sz; }
method setPtrSize (line 131) | void setPtrSize(const ConstTpl &sz) { ptrsize=sz; }
method setPtrOffset (line 132) | void setPtrOffset(uintb val) { ptroffset = ConstTpl(ConstTpl::real,v...
method setTempOffset (line 133) | void setTempOffset(uintb val) { temp_offset = ConstTpl(ConstTpl::rea...
class ConstTpl (line 34) | class ConstTpl {
type const_type (line 36) | enum const_type { real=0, handle=1, j_start=2, j_next=3, j_next2=4, ...
type v_field (line 39) | enum v_field { v_space=0, v_offset=1, v_size=2, v_offset_plus=3 }
method ConstTpl (line 50) | ConstTpl(void) { type = real; value_real = 0; }
method ConstTpl (line 51) | ConstTpl(const ConstTpl &op2) {
method uintb (line 62) | uintb getReal(void) const { return value_real; }
method AddrSpace (line 63) | AddrSpace *getSpace(void) const { return value.spaceid; }
method int4 (line 64) | int4 getHandleIndex(void) const { return value.handle_index; }
method const_type (line 65) | const_type getType(void) const { return type; }
method v_field (line 66) | v_field getSelect(void) const { return select; }
method isZero (line 70) | bool isZero(void) const { return ((type==real)&&(value_real==0)); }
class VarnodeTpl (line 78) | class VarnodeTpl {
method VarnodeTpl (line 85) | VarnodeTpl(void) : space(), offset(), size() { unnamed_flag=false; }
method ConstTpl (line 88) | const ConstTpl &getSpace(void) const { return space; }
method ConstTpl (line 89) | const ConstTpl &getOffset(void) const { return offset; }
method ConstTpl (line 90) | const ConstTpl &getSize(void) const { return size; }
method isZeroSize (line 93) | bool isZeroSize(void) const { return size.isZero(); }
method setOffset (line 97) | void setOffset(uintb constVal) { offset = ConstTpl(ConstTpl::real,co...
method setRelative (line 98) | void setRelative(uintb constVal) { offset = ConstTpl(ConstTpl::j_rel...
method setSize (line 99) | void setSize(const ConstTpl &sz ) { size = sz; }
method isUnnamed (line 100) | bool isUnnamed(void) const { return unnamed_flag; }
method setUnnamed (line 101) | void setUnnamed(bool val) { unnamed_flag = val; }
method isRelative (line 103) | bool isRelative(void) const { return (offset.getType() == ConstTpl::...
class HandleTpl (line 110) | class HandleTpl {
method HandleTpl (line 119) | HandleTpl(void) {}
method ConstTpl (line 123) | const ConstTpl &getSpace(void) const { return space; }
method ConstTpl (line 124) | const ConstTpl &getPtrSpace(void) const { return ptrspace; }
method ConstTpl (line 125) | const ConstTpl &getPtrOffset(void) const { return ptroffset; }
method ConstTpl (line 126) | const ConstTpl &getPtrSize(void) const { return ptrsize; }
method ConstTpl (line 127) | const ConstTpl &getSize(void) const { return size; }
method ConstTpl (line 128) | const ConstTpl &getTempSpace(void) const { return temp_space; }
method ConstTpl (line 129) | const ConstTpl &getTempOffset(void) const { return temp_offset; }
method setSize (line 130) | void setSize(const ConstTpl &sz) { size = sz; }
method setPtrSize (line 131) | void setPtrSize(const ConstTpl &sz) { ptrsize=sz; }
method setPtrOffset (line 132) | void setPtrOffset(uintb val) { ptroffset = ConstTpl(ConstTpl::real,v...
method setTempOffset (line 133) | void setTempOffset(uintb val) { temp_offset = ConstTpl(ConstTpl::rea...
class OpTpl (line 140) | class OpTpl {
method OpTpl (line 145) | OpTpl(void) {}
method OpTpl (line 146) | OpTpl(OpCode oc) { opc = oc; output = (VarnodeTpl *)0; }
method VarnodeTpl (line 148) | VarnodeTpl *getOut(void) const { return output; }
method int4 (line 149) | int4 numInput(void) const { return input.size(); }
method VarnodeTpl (line 150) | VarnodeTpl *getIn(int4 i) const { return input[i]; }
method OpCode (line 151) | OpCode getOpcode(void) const { return opc; }
method setOpcode (line 153) | void setOpcode(OpCode o) { opc = o; }
method setOutput (line 154) | void setOutput(VarnodeTpl *vt) { output = vt; }
method clearOutput (line 155) | void clearOutput(void) { delete output; output = (VarnodeTpl *)0; }
method addInput (line 156) | void addInput(VarnodeTpl *vt) { input.push_back(vt); }
method setInput (line 157) | void setInput(VarnodeTpl *vt,int4 slot) { input[slot] = vt; }
class ConstructTpl (line 164) | class ConstructTpl {
method setOpvec (line 171) | void setOpvec(vector<OpTpl *> &opvec) { vec = opvec; }
method setNumLabels (line 172) | void setNumLabels(uint4 val) { numlabels = val; }
method ConstructTpl (line 174) | ConstructTpl(void) { delayslot=0; numlabels=0; result = (HandleTpl *...
method uint4 (line 176) | uint4 delaySlot(void) const { return delayslot; }
method uint4 (line 177) | uint4 numLabels(void) const { return numlabels; }
method HandleTpl (line 179) | HandleTpl *getResult(void) const { return result; }
method setResult (line 182) | void setResult(HandleTpl *t) { result = t; }
class PcodeEmit (line 193) | class PcodeEmit
class PcodeBuilder (line 195) | class PcodeBuilder { // SLEIGH specific pcode generator
method PcodeBuilder (line 202) | PcodeBuilder(uint4 lbcnt) { labelbase=labelcount=lbcnt; }
method uint4 (line 205) | uint4 getLabelBase(void) const { return labelbase; }
method ParserWalker (line 206) | ParserWalker *getCurrentWalker() const { return walker; }
FILE: pypcode/sleigh/slaformat.cc
type ghidra (line 18) | namespace ghidra {
type sla (line 19) | namespace sla {
function isSlaFormat (line 174) | bool isSlaFormat(istream &s)
function writeSlaHeader (line 190) | void writeSlaHeader(ostream &s)
FILE: pypcode/sleigh/slaformat.hh
type ghidra (line 24) | namespace ghidra {
type sla (line 25) | namespace sla {
class FormatEncode (line 182) | class FormatEncode : public PackedEncode {
class FormatDecode (line 193) | class FormatDecode : public PackedDecode {
FILE: pypcode/sleigh/sleigh.cc
type ghidra (line 19) | namespace ghidra {
function VarnodeData (line 41) | VarnodeData *PcodeCacher::expandPool(uint4 size)
function AddrSpace (line 176) | AddrSpace *SleighBuilder::generatePointer(const VarnodeTpl *vntpl,Varn...
function ParserContext (line 502) | ParserContext *DisassemblyCache::getParserContext(const Address &addr)
function ParserContext (line 605) | ParserContext *Sleigh::obtainContext(const Address &addr,int4 state) c...
function int4 (line 730) | int4 Sleigh::instructionLength(const Address &baseaddr) const
function int4 (line 737) | int4 Sleigh::printAssembly(AssemblyEmit &emit,const Address &baseaddr)...
function int4 (line 756) | int4 Sleigh::oneInstruction(PcodeEmit &emit,const Address &baseaddr) c...
FILE: pypcode/sleigh/sleigh.hh
type ghidra (line 24) | namespace ghidra {
class LoadImage (line 26) | class LoadImage
type RelativeRecord (line 36) | struct RelativeRecord {
type PcodeData (line 44) | struct PcodeData {
class PcodeCacher (line 58) | class PcodeCacher {
method VarnodeData (line 74) | VarnodeData *allocateVarnodes(uint4 size) {
method PcodeData (line 87) | PcodeData *allocateInstruction(void) {
class DisassemblyCache (line 107) | class DisassemblyCache {
class SleighBuilder (line 132) | class SleighBuilder : public PcodeBuilder {
class Sleigh (line 163) | class Sleigh : public SleighBase {
FILE: pypcode/sleigh/sleighbase.cc
type ghidra (line 18) | namespace ghidra {
function int4 (line 22) | int4 SourceFileIndexer::index(const string filename){
function int4 (line 32) | int4 SourceFileIndexer::getIndex(string filename){
function string (line 36) | string SourceFileIndexer::getFilename(int4 index){
function VarnodeData (line 133) | const VarnodeData &SleighBase::getRegister(const string &nm) const
function string (line 144) | string SleighBase::getRegisterName(AddrSpace *base,uintb off,int4 size...
function string (line 170) | string SleighBase::getExactRegisterName(AddrSpace *base,uintb off,int4...
function AddrSpace (line 263) | AddrSpace *SleighBase::decodeSlaSpace(Decoder &decoder,const Translate...
FILE: pypcode/sleigh/sleighbase.hh
type ghidra (line 25) | namespace ghidra {
class SourceFileIndexer (line 37) | class SourceFileIndexer {
method SourceFileIndexer (line 39) | SourceFileIndexer() {leastUnusedIndex = 0;}
class SleighBase (line 60) | class SleighBase : public Translate {
method isInitialized (line 78) | bool isInitialized(void) const { return (root != (SubtableSymbol *)0...
method SleighSymbol (line 86) | SleighSymbol *findSymbol(const string &nm) const { return symtab.fin...
method SleighSymbol (line 87) | SleighSymbol *findSymbol(uintm id) const { return symtab.findSymbol(...
method SleighSymbol (line 88) | SleighSymbol *findGlobalSymbol(const string &nm) const { return symt...
FILE: pypcode/sleigh/slgh_compile.cc
type ghidra (line 23) | namespace ghidra {
function PatternEquation (line 121) | PatternEquation *WithBlock::collectAndPrependPattern(const list<WithBl...
function SubtableSymbol (line 172) | SubtableSymbol *WithBlock::getCurrentSubtable(const list<WithBlock> &s...
function int4 (line 281) | int4 ConsistencyChecker::recoverSize(const ConstTpl &sizeconst,Constru...
function OperandSymbol (line 875) | OperandSymbol *ConsistencyChecker::getOperandSymbol(int4 slot,OpTpl *o...
function ostream (line 1753) | ostream& operator<<(ostream &os, const ConsistencyChecker::OptimizeRec...
function uint4 (line 1916) | uint4 SleighPcode::allocateTemp(void)
function Location (line 1922) | const Location *SleighPcode::getLocation(SleighSymbol *sym) const
function int4 (line 2011) | int4 SleighCompile::calcContextVarLayout(int4 start,int4 sz,int4 numbits)
function int4 (line 2179) | int4 SleighCompile::findCollision(map<uintb,int4> &local2Operand,const...
function string (line 2320) | string SleighCompile::checkSymbols(SymbolScope *scope)
function Location (line 2355) | const Location *SleighCompile::getLocation(Constructor *ctor) const
function Location (line 2363) | const Location *SleighCompile::getLocation(SleighSymbol *sym) const
function Location (line 2376) | const Location *SleighCompile::getCurrentLocation(void) const
function string (line 2389) | string SleighCompile::formatStatusMessage(const Location* loc, const s...
function uint4 (line 2451) | uint4 SleighCompile::getUniqueAddr(void)
function string (line 2532) | string SleighCompile::grabCurrentFilePath(void) const
function TokenSymbol (line 2626) | TokenSymbol *SleighCompile::defineToken(string *name,uintb *sz,int4 en...
function SectionSymbol (line 2728) | SectionSymbol *SleighCompile::newSectionSymbol(const string &nm)
function SleighSymbol (line 2835) | SleighSymbol *SleighCompile::dedupSymbolList(vector<SleighSymbol *> *s...
function SubtableSymbol (line 2954) | SubtableSymbol *SleighCompile::newTable(string *nm)
function PatternEquation (line 2986) | PatternEquation *SleighCompile::constrainOperand(OperandSymbol *sym,Pa...
function PatternEquation (line 3030) | PatternEquation *SleighCompile::defineInvisibleOperand(TripleSymbol *sym)
function ConstructTpl (line 3085) | ConstructTpl *SleighCompile::setResultVarnode(ConstructTpl *ct,Varnode...
function ConstructTpl (line 3101) | ConstructTpl *SleighCompile::setResultStarVarnode(ConstructTpl *ct,Sta...
function MacroSymbol (line 3166) | MacroSymbol *SleighCompile::createMacro(string *name,vector<string> *p...
function SectionVector (line 3243) | SectionVector *SleighCompile::standaloneSection(ConstructTpl *main)
function SectionVector (line 3258) | SectionVector *SleighCompile::firstNamedSection(ConstructTpl *main,Sec...
function SectionVector (line 3281) | SectionVector *SleighCompile::nextNamedSection(SectionVector *vec,Cons...
function SectionVector (line 3303) | SectionVector *SleighCompile::finalNamedSection(SectionVector *vec,Con...
function ConstructTpl (line 3337) | ConstructTpl *SleighCompile::enterSection(void)
function Constructor (line 3350) | Constructor *SleighCompile::createConstructor(SubtableSymbol *sym)
function VarnodeTpl (line 3498) | VarnodeTpl *SleighCompile::findSize(const ConstTpl &offset,const Const...
function uintb (line 3552) | uintb SleighCompile::insertCrossBuildRegion(uintb addr)
function int4 (line 3757) | int4 SleighCompile::run_compilation(const string &filein,const string ...
function int4 (line 3805) | static int4 run_xml(const string &filein,SleighCompile &compiler)
function findSlaSpecs (line 3859) | static void findSlaSpecs(vector<string> &res, const string &dir, const...
function segvHandler (line 3903) | static void segvHandler(int sig) {
function main (line 3909) | int main(int argc,char **argv)
FILE: pypcode/sleigh/slgh_compile.hh
type ghidra (line 28) | namespace ghidra {
type RtlPair (line 42) | struct RtlPair {
method RtlPair (line 45) | RtlPair(void) { section = (ConstructTpl *)0; scope = (SymbolScope *)...
method RtlPair (line 46) | RtlPair(ConstructTpl *sec,SymbolScope *sc) { section = sec; scope = ...
class SectionVector (line 58) | class SectionVector {
method ConstructTpl (line 64) | ConstructTpl *getMainSection(void) const { return main.section; }
method ConstructTpl (line 65) | ConstructTpl *getNamedSection(int4 index) const { return named[index...
method RtlPair (line 66) | RtlPair getMainPair(void) const { return main; }
method RtlPair (line 67) | RtlPair getNamedPair(int4 i) const { return named[i]; }
method setNextIndex (line 68) | void setNextIndex(int4 i) { nextindex = i; }
method int4 (line 69) | int4 getMaxId(void) const { return named.size(); }
type SpaceQuality (line 77) | struct SpaceQuality {
type FieldQuality (line 96) | struct FieldQuality {
class WithBlock (line 111) | class WithBlock {
method WithBlock (line 116) | WithBlock(void) { pateq = (PatternEquation *)0; }
class SleighCompile (line 124) | class SleighCompile
method int4 (line 368) | int4 numErrors(void) const { return errors; }
method setUnnecessaryPcodeWarning (line 375) | void setUnnecessaryPcodeWarning(bool val) { warnunnecessarypcode = v...
method setDeadTempWarning (line 380) | void setDeadTempWarning(bool val) { warndeadtemps = val; }
method setEnforceLocalKeyWord (line 385) | void setEnforceLocalKeyWord(bool val) { pcode.setEnforceLocalKey(val...
method setLenientConflict (line 390) | void setLenientConflict(bool val) { lenientconflicterrors = val; }
method setLocalCollisionWarning (line 395) | void setLocalCollisionWarning(bool val) { warnalllocalcollisions = v...
method setAllNopWarning (line 400) | void setAllNopWarning(bool val) { warnallnops = val; }
method setInsensitiveDuplicateError (line 405) | void setInsensitiveDuplicateError(bool val) { failinsensitivedups = ...
method setDebugOutput (line 410) | void setDebugOutput(bool val) { debugoutput = val; }
method nextLine (line 418) | void nextLine(void) { lineno.back() += 1; }
method setAlignment (line 434) | void setAlignment(int4 val) { alignment = val; }
method isInRoot (line 462) | bool isInRoot(Constructor *ct) const { return (root == ct->getParent...
method initialize (line 471) | virtual void initialize(DocumentStorage &store) {}
method int4 (line 472) | virtual int4 instructionLength(const Address &baseaddr) const { retu...
method int4 (line 473) | virtual int4 oneInstruction(PcodeEmit &emit,const Address &baseaddr)...
method int4 (line 474) | virtual int4 printAssembly(AssemblyEmit &emit,const Address &baseadd...
class ConsistencyChecker (line 141) | class ConsistencyChecker {
type OptimizeRecord (line 148) | struct OptimizeRecord {
method OptimizeRecord (line 161) | OptimizeRecord(uintb offset, int4 size) {
class UniqueState (line 174) | class UniqueState {
method uintb (line 176) | static uintb endOf(map<uintb,OptimizeRecord>::iterator &iter) { re...
method clear (line 180) | void clear(void) { recs.clear(); }
method begin (line 183) | map<uintb,OptimizeRecord>::const_iterator begin(void) const { retu...
method end (line 184) | map<uintb,OptimizeRecord>::const_iterator end(void) const { return...
method int4 (line 229) | int4 getNumUnnecessaryPcode(void) const { return unnecessarypcode; }
method int4 (line 230) | int4 getNumReadNoWrite(void) const { return readnowrite; }
method int4 (line 231) | int4 getNumWriteNoRead(void) const { return writenoread; }
type FieldContext (line 238) | struct FieldContext {
method FieldContext (line 242) | FieldContext(VarnodeSymbol *s,FieldQuality *q) { sym=s; qual=q; }
class MacroBuilder (line 253) | class MacroBuilder : public PcodeBuilder {
method MacroBuilder (line 263) | MacroBuilder(SleighCompile *sl,vector<OpTpl *> &ovec,uint4 lbcnt) : ...
method hasError (line 266) | bool hasError(void) const { return haserror; }
method appendBuild (line 268) | virtual void appendBuild(OpTpl *bld,int4 secnum) { dump(bld); }
method delaySlot (line 269) | virtual void delaySlot(OpTpl *op) { dump(op); }
method appendCrossBuild (line 271) | virtual void appendCrossBuild(OpTpl *bld,int4 secnum) { dump(bld); }
class SleighPcode (line 279) | class SleighPcode : public PcodeCompile {
method SleighPcode (line 287) | SleighPcode(void) : PcodeCompile() { compiler = (SleighCompile *)0; }
method setCompiler (line 288) | void setCompiler(SleighCompile *comp) { compiler = comp; }
class SleighCompile (line 299) | class SleighCompile : public SleighBase {
method int4 (line 368) | int4 numErrors(void) const { return errors; }
method setUnnecessaryPcodeWarning (line 375) | void setUnnecessaryPcodeWarning(bool val) { warnunnecessarypcode = v...
method setDeadTempWarning (line 380) | void setDeadTempWarning(bool val) { warndeadtemps = val; }
method setEnforceLocalKeyWord (line 385) | void setEnforceLocalKeyWord(bool val) { pcode.setEnforceLocalKey(val...
method setLenientConflict (line 390) | void setLenientConflict(bool val) { lenientconflicterrors = val; }
method setLocalCollisionWarning (line 395) | void setLocalCollisionWarning(bool val) { warnalllocalcollisions = v...
method setAllNopWarning (line 400) | void setAllNopWarning(bool val) { warnallnops = val; }
method setInsensitiveDuplicateError (line 405) | void setInsensitiveDuplicateError(bool val) { failinsensitivedups = ...
method setDebugOutput (line 410) | void setDebugOutput(bool val) { debugoutput = val; }
method nextLine (line 418) | void nextLine(void) { lineno.back() += 1; }
method setAlignment (line 434) | void setAlignment(int4 val) { alignment = val; }
method isInRoot (line 462) | bool isInRoot(Constructor *ct) const { return (root == ct->getParent...
method initialize (line 471) | virtual void initialize(DocumentStorage &store) {}
method int4 (line 472) | virtual int4 instructionLength(const Address &baseaddr) const { retu...
method int4 (line 473) | virtual int4 oneInstruction(PcodeEmit &emit,const Address &baseaddr)...
method int4 (line 474) | virtual int4 printAssembly(AssemblyEmit &emit,const Address &baseadd...
FILE: pypcode/sleigh/slghparse.cc
type ghidra (line 98) | namespace ghidra {
type sleightokentype (line 158) | enum sleightokentype
function yy_symbol_value_print (line 1768) | static void
function yy_symbol_print (line 1789) | static void
function yy_stack_print (line 1804) | static void
function yy_reduce_print (line 1827) | static void
function YYPTRDIFF_T (line 1888) | static YYPTRDIFF_T
function YYPTRDIFF_T (line 1927) | static YYPTRDIFF_T
function yysyntax_error (line 1978) | static int
function yydestruct (line 2117) | static void
function yyparse (line 2146) | int
function sleigherror (line 3864) | int sleigherror(const char *s)
FILE: pypcode/sleigh/slghparse.hh
type sleightokentype (line 73) | enum sleightokentype
FILE: pypcode/sleigh/slghpatexpress.cc
type ghidra (line 19) | namespace ghidra {
function int4 (line 21) | int4 TokenPattern::resolveTokens(const TokenPattern &tok1,const TokenP...
function PatternBlock (line 155) | PatternBlock *TokenPattern::buildSingle(int4 startbit,int4 endbit,uint...
function PatternBlock (line 177) | PatternBlock *TokenPattern::buildBigBlock(int4 size,int4 bitstart,int4...
function PatternBlock (line 207) | PatternBlock *TokenPattern::buildLittleBlock(int4 size,int4 bitstart,i...
function TokenPattern (line 325) | const TokenPattern &TokenPattern::operator=(const TokenPattern &tokpat)
function TokenPattern (line 337) | TokenPattern TokenPattern::doAnd(const TokenPattern &tokpat) const
function TokenPattern (line 347) | TokenPattern TokenPattern::doOr(const TokenPattern &tokpat) const
function TokenPattern (line 357) | TokenPattern TokenPattern::doCat(const TokenPattern &tokpat) const
function TokenPattern (line 397) | TokenPattern TokenPattern::commonSubPattern(const TokenPattern &tokpat...
function int4 (line 448) | int4 TokenPattern::getMinimumLength(void) const
function PatternExpression (line 465) | PatternExpression *PatternExpression::decodeExpression(Decoder &decode...
function intb (line 512) | static intb getInstructionBytes(ParserWalker &walker,int4 bytestart,in...
function intb (line 538) | static intb getContextBytes(ParserWalker &walker,int4 bytestart,int4 b...
function intb (line 580) | intb TokenField::getValue(ParserWalker &walker) const
function TokenPattern (line 593) | TokenPattern TokenField::genPattern(intb val) const
function intb (line 640) | intb ContextField::getValue(ParserWalker &walker) const
function TokenPattern (line 652) | TokenPattern ContextField::genPattern(intb val) const
function TokenPattern (line 742) | TokenPattern OperandValue::genPattern(intb val) const
function intb (line 757) | intb OperandValue::minValue(void) const
function intb (line 763) | intb OperandValue::maxValue(void) const
function intb (line 769) | intb OperandValue::getValue(ParserWalker &walker) const
function intb (line 789) | intb OperandValue::getSubValue(const vector<intb> &replace,int4 &listp...
function string (line 803) | const string &OperandValue::getName(void) const
function intb (line 895) | intb PlusExpression::getValue(ParserWalker &walker) const
function intb (line 903) | intb PlusExpression::getSubValue(const vector<intb> &replace,int4 &lis...
function intb (line 919) | intb SubExpression::getValue(ParserWalker &walker) const
function intb (line 927) | intb SubExpression::getSubValue(const vector<intb> &replace,int4 &list...
function intb (line 943) | intb MultExpression::getValue(ParserWalker &walker) const
function intb (line 951) | intb MultExpression::getSubValue(const vector<intb> &replace,int4 &lis...
function intb (line 967) | intb LeftShiftExpression::getValue(ParserWalker &walker) const
function intb (line 975) | intb LeftShiftExpression::getSubValue(const vector<intb> &replace,int4...
function intb (line 991) | intb RightShiftExpression::getValue(ParserWalker &walker) const
function intb (line 999) | intb RightShiftExpression::getSubValue(const vector<intb> &replace,int...
function intb (line 1015) | intb AndExpression::getValue(ParserWalker &walker) const
function intb (line 1023) | intb AndExpression::getSubValue(const vector<intb> &replace,int4 &list...
function intb (line 1039) | intb OrExpression::getValue(ParserWalker &walker) const
function intb (line 1047) | intb OrExpression::getSubValue(const vector<intb> &replace,int4 &listp...
function intb (line 1063) | intb XorExpression::getValue(ParserWalker &walker) const
function intb (line 1071) | intb XorExpression::getSubValue(const vector<intb> &replace,int4 &list...
function intb (line 1087) | intb DivExpression::getValue(ParserWalker &walker) const
function intb (line 1095) | intb DivExpression::getSubValue(const vector<intb> &replace,int4 &list...
function intb (line 1111) | intb MinusExpression::getValue(ParserWalker &walker) const
function intb (line 1118) | intb MinusExpression::getSubValue(const vector<intb> &replace,int4 &li...
function intb (line 1133) | intb NotExpression::getValue(ParserWalker &walker) const
function intb (line 1140) | intb NotExpression::getSubValue(const vector<intb> &replace,int4 &list...
function advance_combo (line 1155) | static bool advance_combo(vector<intb> &val,const vector<intb> &min,ve...
function TokenPattern (line 1171) | static TokenPattern buildPattern(PatternValue *lhs,intb lhsval,vector<...
FILE: pypcode/sleigh/slghpatexpress.hh
type ghidra (line 21) | namespace ghidra {
class TokenPattern (line 23) | class TokenPattern {
method TokenPattern (line 32) | TokenPattern(Pattern *pat) { pattern = pat; leftellipsis=false; righ...
method setLeftEllipsis (line 42) | void setLeftEllipsis(bool val) { leftellipsis = val; }
method setRightEllipsis (line 43) | void setRightEllipsis(bool val) { rightellipsis = val; }
method getLeftEllipsis (line 44) | bool getLeftEllipsis(void) const { return leftellipsis; }
method getRightEllipsis (line 45) | bool getRightEllipsis(void) const { return rightellipsis; }
method Pattern (line 50) | Pattern *getPattern(void) const { return pattern; }
method alwaysTrue (line 52) | bool alwaysTrue(void) const { return pattern->alwaysTrue(); }
method alwaysFalse (line 53) | bool alwaysFalse(void) const { return pattern->alwaysFalse(); }
method alwaysInstructionTrue (line 54) | bool alwaysInstructionTrue(void) const { return pattern->alwaysInstr...
class PatternValue (line 57) | class PatternValue
method listValues (line 83) | virtual void listValues(vector<const PatternValue *> &list) const { ...
method getMinMax (line 84) | virtual void getMinMax(vector<intb> &minlist,vector<intb> &maxlist) ...
method intb (line 86) | virtual intb getSubValue(const vector<intb> &replace,int4 &listpos) ...
class PatternExpression (line 58) | class PatternExpression {
method PatternExpression (line 64) | PatternExpression(void) { refcount = 0; }
method intb (line 72) | intb getSubValue(const vector<intb> &replace) {
method layClaim (line 75) | void layClaim(void) { refcount += 1; }
class PatternValue (line 80) | class PatternValue : public PatternExpression {
method listValues (line 83) | virtual void listValues(vector<const PatternValue *> &list) const { ...
method getMinMax (line 84) | virtual void getMinMax(vector<intb> &minlist,vector<intb> &maxlist) ...
method intb (line 86) | virtual intb getSubValue(const vector<intb> &replace,int4 &listpos) ...
class TokenField (line 91) | class TokenField : public PatternValue {
method TokenField (line 99) | TokenField(void) {}
method TokenPattern (line 102) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method intb (line 104) | virtual intb minValue(void) const { return 0; }
method intb (line 105) | virtual intb maxValue(void) const { intb res=0; return zero_extend(~...
class ContextField (line 110) | class ContextField : public PatternValue {
method ContextField (line 116) | ContextField(void) {}
method int4 (line 118) | int4 getStartBit(void) const { return startbit; }
method int4 (line 119) | int4 getEndBit(void) const { return endbit; }
method getSignBit (line 120) | bool getSignBit(void) const { return signbit; }
method TokenPattern (line 122) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method intb (line 124) | virtual intb minValue(void) const { return 0; }
method intb (line 125) | virtual intb maxValue(void) const { intb res=0; return zero_extend(~...
class ConstantValue (line 130) | class ConstantValue : public PatternValue {
method ConstantValue (line 133) | ConstantValue(void) {}
method ConstantValue (line 134) | ConstantValue(intb v) { val = v; }
method intb (line 135) | virtual intb getValue(ParserWalker &walker) const { return val; }
method TokenPattern (line 136) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method TokenPattern (line 137) | virtual TokenPattern genPattern(intb v) const { return TokenPattern(...
method intb (line 138) | virtual intb minValue(void) const { return val; }
method intb (line 139) | virtual intb maxValue(void) const { return val; }
class StartInstructionValue (line 144) | class StartInstructionValue : public PatternValue {
method StartInstructionValue (line 146) | StartInstructionValue(void) {}
method intb (line 147) | virtual intb getValue(ParserWalker &walker) const {
method TokenPattern (line 149) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method TokenPattern (line 150) | virtual TokenPattern genPattern(intb val) const { return TokenPatter...
method intb (line 151) | virtual intb minValue(void) const { return (intb)0; }
method intb (line 152) | virtual intb maxValue(void) const { return (intb)0; }
class EndInstructionValue (line 157) | class EndInstructionValue : public PatternValue {
method EndInstructionValue (line 159) | EndInstructionValue(void) {}
method intb (line 160) | virtual intb getValue(ParserWalker &walker) const {
method TokenPattern (line 162) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method TokenPattern (line 163) | virtual TokenPattern genPattern(intb val) const { return TokenPatter...
method intb (line 164) | virtual intb minValue(void) const { return (intb)0; }
method intb (line 165) | virtual intb maxValue(void) const { return (intb)0; }
class Next2InstructionValue (line 170) | class Next2InstructionValue : public PatternValue {
method Next2InstructionValue (line 172) | Next2InstructionValue(void) {}
method intb (line 173) | virtual intb getValue(ParserWalker &walker) const {
method TokenPattern (line 175) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method TokenPattern (line 176) | virtual TokenPattern genPattern(intb val) const { return TokenPatter...
method intb (line 177) | virtual intb minValue(void) const { return (intb)0; }
method intb (line 178) | virtual intb maxValue(void) const { return (intb)0; }
class Constructor (line 183) | class Constructor
class OperandSymbol (line 184) | class OperandSymbol
class OperandValue (line 185) | class OperandValue : public PatternValue {
method OperandValue (line 189) | OperandValue(void) { }
method OperandValue (line 190) | OperandValue(int4 ind,Constructor *c) { index = ind; ct = c; }
method changeIndex (line 191) | void changeIndex(int4 newind) { index = newind; }
method TokenPattern (line 195) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
class BinaryExpression (line 204) | class BinaryExpression : public PatternExpression {
method BinaryExpression (line 209) | BinaryExpression(void) { left = (PatternExpression *)0; right = (Pat...
method PatternExpression (line 211) | PatternExpression *getLeft(void) const { return left; }
method PatternExpression (line 212) | PatternExpression *getRight(void) const { return right; }
method TokenPattern (line 213) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method listValues (line 214) | virtual void listValues(vector<const PatternValue *> &list) const {
method getMinMax (line 216) | virtual void getMinMax(vector<intb> &minlist,vector<intb> &maxlist) ...
class UnaryExpression (line 222) | class UnaryExpression : public PatternExpression {
method UnaryExpression (line 227) | UnaryExpression(void) { unary = (PatternExpression *)0; }
method PatternExpression (line 229) | PatternExpression *getUnary(void) const { return unary; }
method TokenPattern (line 230) | virtual TokenPattern genMinPattern(const vector<TokenPattern> &ops) ...
method listValues (line 231) | virtual void listValues(vector<const PatternValue *> &list) const {
method getMinMax (line 233) | virtual void getMinMax(vector<intb> &minlist,vector<intb> &maxlist) ...
class PlusExpression (line 240) | class PlusExpression : public BinaryExpression {
method PlusExpression (line 242) | PlusExpression(void) {}
method PlusExpression (line 243) | PlusExpression(PatternExpression *l,PatternExpression *r) : BinaryEx...
class SubExpression (line 249) | class SubExpression : public BinaryExpression {
method SubExpression (line 251) | SubExpression(void) {}
method SubExpression (line 252) | SubExpression(PatternExpression *l,PatternExpression *r) : BinaryExp...
class MultExpression (line 258) | class MultExpression : public BinaryExpression {
method MultExpression (line 260) | MultExpression(void) {}
method MultExpression (line 261) | MultExpression(PatternExpression *l,PatternExpression *r) : BinaryEx...
class LeftShiftExpression (line 267) | class LeftShiftExpression : public BinaryExpression {
method LeftShiftExpression (line 269) | LeftShiftExpression(void) {}
method LeftShiftExpression (line 270) | LeftShiftExpression(PatternExpression *l,PatternExpression *r) : Bin...
class RightShiftExpression (line 276) | class RightShiftExpression : public BinaryExpression {
method RightShiftExpression (line 278) | RightShiftExpression(void) {}
method RightShiftExpression (line 279) | RightShiftExpression(PatternExpression *l,PatternExpression *r) : Bi...
class AndExpression (line 285) | class AndExpression : public BinaryExpression {
method AndExpression (line 287) | AndExpression(void) {}
method AndExpression (line 288) | AndExpression(PatternExpression *l,PatternExpression *r) : BinaryExp...
class OrExpression (line 294) | class OrExpression : public BinaryExpression {
method OrExpression (line 296) | OrExpression(void) {}
method OrExpression (line 297) | OrExpression(PatternExpression *l,PatternExpression *r) : BinaryExpr...
class XorExpression (line 303) | class XorExpression : public BinaryExpression {
method XorExpression (line 305) | XorExpression(void) {}
method XorExpression (line 306) | XorExpression(PatternExpression *l,PatternExpression *r) : BinaryExp...
class DivExpression (line 312) | class DivExpression : public BinaryExpression {
method DivExpression (line 314) | DivExpression(void) {}
method DivExpression (line 315) | DivExpression(PatternExpression *l,PatternExpression *r) : BinaryExp...
class MinusExpression (line 321) | class MinusExpression : public UnaryExpression {
method MinusExpression (line 323) | MinusExpression(void) {}
method MinusExpression (line 324) | MinusExpression(PatternExpression *u) : UnaryExpression(u) {}
class NotExpression (line 330) | class NotExpression : public UnaryExpression {
method NotExpression (line 332) | NotExpression(void) {}
method NotExpression (line 333) | NotExpression(PatternExpression *u) : UnaryExpression(u) {}
type OperandResolve (line 339) | struct OperandResolve {
method OperandResolve (line 341) | OperandResolve(vector<OperandSymbol *> &ops) : operands(ops) {
class PatternEquation (line 351) | class PatternEquation {
method PatternEquation (line 357) | PatternEquation(void) { refcount = 0; }
method TokenPattern (line 358) | const TokenPattern &getTokenPattern(void) const { return resultpatte...
method operandOrder (line 361) | virtual void operandOrder(Constructor *ct,vector<OperandSymbol *> &o...
method layClaim (line 362) | void layClaim(void) { refcount += 1; }
class OperandEquation (line 366) | class OperandEquation : public PatternEquation { // Equation that defi...
method OperandEquation (line 369) | OperandEquation(int4 ind) { index = ind; }
class UnconstrainedEquation (line 375) | class UnconstrainedEquation : public PatternEquation { // Unconstraine...
class ValExpressEquation (line 385) | class ValExpressEquation : public PatternEquation {
class EqualEquation (line 395) | class EqualEquation : public ValExpressEquation {
method EqualEquation (line 397) | EqualEquation(PatternValue *l,PatternExpression *r) : ValExpressEqua...
class NotEqualEquation (line 401) | class NotEqualEquation : public ValExpressEquation {
method NotEqualEquation (line 403) | NotEqualEquation(PatternValue *l,PatternExpression *r) : ValExpressE...
class LessEquation (line 407) | class LessEquation : public ValExpressEquation {
method LessEquation (line 409) | LessEquation(PatternValue *l,PatternExpression *r) : ValExpressEquat...
class LessEqualEquation (line 413) | class LessEqualEquation : public ValExpressEquation {
method LessEqualEquation (line 415) | LessEqualEquation(PatternValue *l,PatternExpression *r) : ValExpress...
class GreaterEquation (line 419) | class GreaterEquation : public ValExpressEquation {
method GreaterEquation (line 421) | GreaterEquation(PatternValue *l,PatternExpression *r) : ValExpressEq...
class GreaterEqualEquation (line 425) | class GreaterEqualEquation : public ValExpressEquation {
method GreaterEqualEquation (line 427) | GreaterEqualEquation(PatternValue *l,PatternExpression *r) : ValExpr...
class EquationAnd (line 431) | class EquationAnd : public PatternEquation { // Pattern Equations ANDe...
class EquationOr (line 443) | class EquationOr : public PatternEquation { // Pattern Equations ORed ...
class EquationCat (line 455) | class EquationCat : public PatternEquation { // Pattern Equations conc...
class EquationLeftEllipsis (line 467) | class EquationLeftEllipsis : public PatternEquation { // Equation prec...
method EquationLeftEllipsis (line 472) | EquationLeftEllipsis(PatternEquation *e) { (eq=e)->layClaim(); }
class EquationRightEllipsis (line 478) | class EquationRightEllipsis : public PatternEquation { // Equation pre...
method EquationRightEllipsis (line 483) | EquationRightEllipsis(PatternEquation *e) { (eq=e)->layClaim(); }
FILE: pypcode/sleigh/slghpattern.cc
type ghidra (line 19) | namespace ghidra {
function uintm (line 21) | uintm DisjointPattern::getMask(int4 startbit,int4 size,bool context) c...
function uintm (line 30) | uintm DisjointPattern::getValue(int4 startbit,int4 size,bool context) ...
function int4 (line 39) | int4 DisjointPattern::getLength(bool context) const
function resolveIntersectBlock (line 105) | static bool resolveIntersectBlock(PatternBlock *bl1,PatternBlock *bl2,...
function DisjointPattern (line 141) | DisjointPattern *DisjointPattern::decodeDisjoint(Decoder &decoder)
function PatternBlock (line 283) | PatternBlock *PatternBlock::clone(void) const
function PatternBlock (line 295) | PatternBlock *PatternBlock::commonSubPattern(const PatternBlock *b) const
function PatternBlock (line 323) | PatternBlock *PatternBlock::intersect(const PatternBlock *b) const
function uintm (line 405) | uintm PatternBlock::getMask(int4 startbit,int4 size) const
function uintm (line 437) | uintm PatternBlock::getValue(int4 startbit,int4 size) const
function Pattern (line 523) | Pattern *InstructionPattern::doAnd(const Pattern *b,int4 sa) const
function Pattern (line 558) | Pattern *InstructionPattern::commonSubPattern(const Pattern *b,int4 sa...
function Pattern (line 591) | Pattern *InstructionPattern::doOr(const Pattern *b,int4 sa) const
function Pattern (line 628) | Pattern *ContextPattern::doOr(const Pattern *b,int4 sa) const
function Pattern (line 638) | Pattern *ContextPattern::doAnd(const Pattern *b,int4 sa) const
function Pattern (line 649) | Pattern *ContextPattern::commonSubPattern(const Pattern *b,int4 sa) const
function Pattern (line 706) | Pattern *CombinePattern::doAnd(const Pattern *b,int4 sa) const
function Pattern (line 737) | Pattern *CombinePattern::commonSubPattern(const Pattern *b,int4 sa) const
function Pattern (line 761) | Pattern *CombinePattern::doOr(const Pattern *b,int4 sa) const
function Pattern (line 777) | Pattern *CombinePattern::simplifyClone(void) const
function Pattern (line 884) | Pattern *OrPattern::doAnd(const Pattern *b,int4 sa) const
function Pattern (line 910) | Pattern *OrPattern::commonSubPattern(const Pattern *b,int4 sa) const
function Pattern (line 931) | Pattern *OrPattern::doOr(const Pattern *b,int4 sa) const
function Pattern (line 958) | Pattern *OrPattern::simplifyClone(void) const
FILE: pypcode/sleigh/slghpattern.hh
type ghidra (line 21) | namespace ghidra {
class PatternBlock (line 24) | class PatternBlock {
method shift (line 40) | void shift(int4 sa) { offset += sa; normalize(); }
method int4 (line 41) | int4 getLength(void) const { return offset+nonzerosize; }
method alwaysTrue (line 44) | bool alwaysTrue(void) const { return (nonzerosize==0); }
method alwaysFalse (line 45) | bool alwaysFalse(void) const { return (nonzerosize==-1); }
class DisjointPattern (line 52) | class DisjointPattern
method int4 (line 74) | virtual int4 numDisjoint(void) const { return 0; }
method DisjointPattern (line 75) | virtual DisjointPattern *getDisjoint(int4 i) const { return (Disjoin...
class Pattern (line 53) | class Pattern {
class DisjointPattern (line 71) | class DisjointPattern : public Pattern { // A pattern with no ORs in it
method int4 (line 74) | virtual int4 numDisjoint(void) const { return 0; }
method DisjointPattern (line 75) | virtual DisjointPattern *getDisjoint(int4 i) const { return (Disjoin...
class InstructionPattern (line 85) | class InstructionPattern : public DisjointPattern { // Matches the ins...
method PatternBlock (line 87) | virtual PatternBlock *getBlock(bool context) const { return context ...
method InstructionPattern (line 89) | InstructionPattern(void) { maskvalue = (PatternBlock *)0; }
method InstructionPattern (line 90) | InstructionPattern(PatternBlock *mv) { maskvalue = mv; }
method InstructionPattern (line 91) | InstructionPattern(bool tf) { maskvalue = new PatternBlock(tf); }
method PatternBlock (line 92) | PatternBlock *getBlock(void) { return maskvalue; }
method Pattern (line 94) | virtual Pattern *simplifyClone(void) const { return new InstructionP...
method shiftInstruction (line 95) | virtual void shiftInstruction(int4 sa) { maskvalue->shift(sa); }
method isMatch (line 99) | virtual bool isMatch(ParserWalker &walker) const { return maskvalue-...
method alwaysTrue (line 100) | virtual bool alwaysTrue(void) const { return maskvalue->alwaysTrue(); }
method alwaysFalse (line 101) | virtual bool alwaysFalse(void) const { return maskvalue->alwaysFalse...
method alwaysInstructionTrue (line 102) | virtual bool alwaysInstructionTrue(void) const { return maskvalue->a...
class ContextPattern (line 107) | class ContextPattern : public DisjointPattern { // Matches the context...
method PatternBlock (line 109) | virtual PatternBlock *getBlock(bool context) const { return context ...
method ContextPattern (line 111) | ContextPattern(void) { maskvalue = (PatternBlock *)0; }
method ContextPattern (line 112) | ContextPattern(PatternBlock *mv) { maskvalue = mv; }
method PatternBlock (line 113) | PatternBlock *getBlock(void) { return maskvalue; }
method Pattern (line 115) | virtual Pattern *simplifyClone(void) const { return new ContextPatte...
method shiftInstruction (line 116) | virtual void shiftInstruction(int4 sa) { }
method isMatch (line 120) | virtual bool isMatch(ParserWalker &walker) const { return maskvalue-...
method alwaysTrue (line 121) | virtual bool alwaysTrue(void) const { return maskvalue->alwaysTrue(); }
method alwaysFalse (line 122) | virtual bool alwaysFalse(void) const { return maskvalue->alwaysFalse...
method alwaysInstructionTrue (line 123) | virtual bool alwaysInstructionTrue(void) const { return true; }
class CombinePattern (line 129) | class CombinePattern : public DisjointPattern {
method PatternBlock (line 132) | virtual PatternBlock *getBlock(bool cont) const { return cont ? cont...
method CombinePattern (line 134) | CombinePattern(void) { context = (ContextPattern *)0; instr = (Instr...
method CombinePattern (line 135) | CombinePattern(ContextPattern *con,InstructionPattern *in) {
method shiftInstruction (line 139) | virtual void shiftInstruction(int4 sa) { instr->shiftInstruction(sa); }
method alwaysInstructionTrue (line 143) | virtual bool alwaysInstructionTrue(void) const { return instr->alway...
class OrPattern (line 151) | class OrPattern : public Pattern {
method OrPattern (line 154) | OrPattern(void) {}
method int4 (line 161) | virtual int4 numDisjoint(void) const { return orlist.size(); }
method DisjointPattern (line 162) | virtual DisjointPattern *getDisjoint(int4 i) const { return orlist[i...
FILE: pypcode/sleigh/slghscan.cc
type yy_buffer_state (line 421) | struct yy_buffer_state
type yy_buffer_state (line 457) | struct yy_buffer_state
type yy_trans_info (line 629) | struct yy_trans_info
function isatty (line 1145) | static int isatty (int fildes) { return 0; }
type ghidra (line 1150) | namespace ghidra {
type FileStreamState (line 1154) | struct FileStreamState {
function preproc_error (line 1167) | void preproc_error(const string &err)
function check_to_endofline (line 1175) | void check_to_endofline(istream &s)
function string (line 1184) | string read_identifier(istream &s)
function preprocess_string (line 1201) | void preprocess_string(istream &s,string &res)
function int4 (line 1221) | int4 read_defined_operator(istream &s)
function int4 (line 1239) | int4 read_boolean_clause(istream &s)
function int4 (line 1290) | int4 preprocess_if(istream &s)
function expand_preprocmacros (line 1316) | void expand_preprocmacros(string &str)
function int4 (line 1351) | int4 preprocess(int4 cur_state,int4 blank_state)
function preproc_macroexpand (line 1492) | void preproc_macroexpand(void)
function int4 (line 1508) | int4 find_symbol(void) {
function int4 (line 1578) | int4 scan_number(char *numtext,SLEIGHSTYPE *lval,bool signednum)
function YY_BREAK (line 1896) | YY_BREAK
function YY_BREAK (line 1900) | YY_BREAK
function YY_BREAK (line 1904) | YY_BREAK
function YY_BREAK (line 1908) | YY_BREAK
function YY_BREAK (line 1925) | YY_BREAK
function YY_BREAK (line 1929) | YY_BREAK
function YY_BREAK (line 1933) | YY_BREAK
function YY_BREAK (line 1937) | YY_BREAK
function YY_BREAK (line 1941) | YY_BREAK
function YY_BREAK (line 1945) | YY_BREAK
function YY_BREAK (line 1949) | YY_BREAK
function YY_BREAK (line 1954) | YY_BREAK
function YY_BREAK (line 1958) | YY_BREAK
function YY_BREAK (line 1962) | YY_BREAK
function YY_BREAK (line 1966) | YY_BREAK
function YY_BREAK (line 1979) | YY_BREAK
function YY_BREAK (line 1983) | YY_BREAK
function YY_BREAK (line 1988) | YY_BREAK
function YY_BREAK (line 1992) | YY_BREAK
function YY_BREAK (line 1996) | YY_BREAK
function YY_BREAK (line 2000) | YY_BREAK
function YY_BREAK (line 2004) | YY_BREAK
function YY_BREAK (line 2008) | YY_BREAK
function YY_BREAK (line 2012) | YY_BREAK
function YY_BREAK (line 2016) | YY_BREAK
function YY_BREAK (line 2020) | YY_BREAK
function YY_BREAK (line 2024) | YY_BREAK
function YY_BREAK (line 2028) | YY_BREAK
function YY_BREAK (line 2032) | YY_BREAK
function YY_BREAK (line 2036) | YY_BREAK
function YY_BREAK (line 2040) | YY_BREAK
function YY_BREAK (line 2044) | YY_BREAK
function YY_BREAK (line 2048) | YY_BREAK
function YY_BREAK (line 2052) | YY_BREAK
function YY_BREAK (line 2056) | YY_BREAK
function YY_BREAK (line 2060) | YY_BREAK
function YY_BREAK (line 2064) | YY_BREAK
function YY_BREAK (line 2068) | YY_BREAK
function YY_BREAK (line 2072) | YY_BREAK
function YY_BREAK (line 2076) | YY_BREAK
function YY_BREAK (line 2080) | YY_BREAK
function YY_BREAK (line 2084) | YY_BREAK
function YY_BREAK (line 2088) | YY_BREAK
function yyunput (line 2918) | static void yyunput (int c, char * yy_bp )
function input (line 2961) | static int input (void)
function yyrestart (line 3038) | void yyrestart (FILE * input_file )
function yy_switch_to_buffer (line 3055) | void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
function yy_load_buffer_state (line 3086) | static void yy_load_buffer_state (void)
function YY_BUFFER_STATE (line 3100) | YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
function yy_delete_buffer (line 3128) | void yy_delete_buffer (YY_BUFFER_STATE b )
function yy_init_buffer (line 3147) | static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
function yy_flush_buffer (line 3175) | void yy_flush_buffer (YY_BUFFER_STATE b )
function yypush_buffer_state (line 3204) | void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
function yypop_buffer_state (line 3234) | void yypop_buffer_state (void)
function yyensure_buffer_stack (line 3253) | static void yyensure_buffer_stack (void)
function YY_BUFFER_STATE (line 3302) | YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
function YY_BUFFER_STATE (line 3339) | YY_BUFFER_STATE yy_scan_string (const char * yystr )
function YY_BUFFER_STATE (line 3352) | YY_BUFFER_STATE yy_scan_bytes (const char * yybytes, int _yybytes_len )
FILE: pypcode/sleigh/slghsymbol.cc
type ghidra (line 20) | namespace ghidra {
function SleighSymbol (line 24) | SleighSymbol *SymbolScope::addSymbol(SleighSymbol *a)
function SleighSymbol (line 35) | SleighSymbol *SymbolScope::findSymbol(const string &nm) const
function SymbolScope (line 72) | SymbolScope *SymbolTable::skipScope(int4 i) const
function SleighSymbol (line 107) | SleighSymbol *SymbolTable::findSymbolInternal(SymbolScope *scope,const...
function VarnodeTpl (line 419) | VarnodeTpl *EpsilonSymbol::getVarnode(void) const
function Constructor (line 520) | Constructor *ValueMapSymbol::resolve(ParserWalker &walker)
function Constructor (line 610) | Constructor *NameSymbol::resolve(ParserWalker &walker)
function VarnodeTpl (line 686) | VarnodeTpl *VarnodeSymbol::getVarnode(void) const
function Constructor (line 822) | Constructor *VarnodeListSymbol::resolve(ParserWalker &walker)
function int4 (line 850) | int4 VarnodeListSymbol::getSize(void) const
function VarnodeTpl (line 953) | VarnodeTpl *OperandSymbol::getVarnode(void) const
function int4 (line 978) | int4 OperandSymbol::getSize(void) const
function VarnodeTpl (line 1090) | VarnodeTpl *StartSymbol::getVarnode(void) const
function VarnodeTpl (line 1155) | VarnodeTpl *EndSymbol::getVarnode(void) const
function VarnodeTpl (line 1220) | VarnodeTpl *Next2Symbol::getVarnode(void) const
function VarnodeTpl (line 1276) | VarnodeTpl *FlowDestSymbol::getVarnode(void) const
function VarnodeTpl (line 1308) | VarnodeTpl *FlowRefSymbol::getVarnode(void) const
function ConstructTpl (line 1436) | ConstructTpl *Constructor::getNamedTempl(int4 secnum) const
function TokenPattern (line 1742) | TokenPattern *Constructor::buildPattern(ostream &s)
function TokenPattern (line 1929) | TokenPattern *SubtableSymbol::buildPattern(ostream &s)
function int4 (line 2017) | int4 DecisionNode::getMaximumLength(bool context)
function int4 (line 2031) | int4 DecisionNode::getNumFixed(int4 low,int4 size,bool context)
function Constructor (line 2282) | Constructor *DecisionNode::resolve(ParserWalker &walker) const
function calc_maskword (line 2352) | static void calc_maskword(int4 sbit,int4 ebit,int4 &num,int4 &shift,ui...
function ContextChange (line 2423) | ContextChange *ContextOp::clone(void) const
function ContextChange (line 2473) | ContextChange *ContextCommit::clone(void) const
FILE: pypcode/sleigh/slghsymbol.hh
type ghidra (line 22) | namespace ghidra {
class SleighBase (line 24) | class SleighBase
class SleighSymbol (line 25) | class SleighSymbol {
type symbol_type (line 28) | enum symbol_type { space_symbol, token_symbol, userop_symbol, value_...
method SleighSymbol (line 38) | SleighSymbol(void) {}
method SleighSymbol (line 39) | SleighSymbol(const string &nm) { name = nm; id = 0; }
method string (line 41) | const string &getName(void) const { return name; }
method uintm (line 42) | uintm getId(void) const { return id; }
method symbol_type (line 43) | virtual symbol_type getType(void) const { return dummy_symbol; }
type SymbolCompare (line 50) | struct SymbolCompare {
class SymbolScope (line 56) | class SymbolScope {
method SymbolScope (line 62) | SymbolScope(SymbolScope *p,uintm i) { parent = p; id = i; }
method SymbolScope (line 63) | SymbolScope *getParent(void) const { return parent; }
method begin (line 66) | SymbolTree::const_iterator begin(void) const { return tree.begin(); }
method end (line 67) | SymbolTree::const_iterator end(void) const { return tree.end(); }
method uintm (line 68) | uintm getId(void) const { return id; }
method removeSymbol (line 69) | void removeSymbol(SleighSymbol *a) { tree.erase(a); }
class SymbolTable (line 72) | class SymbolTable {
method SymbolTable (line 80) | SymbolTable(void) { curscope = (SymbolScope *)0; }
method SymbolScope (line 82) | SymbolScope *getCurrentScope(void) { return curscope; }
method SymbolScope (line 83) | SymbolScope *getGlobalScope(void) { return table[0]; }
method setCurrentScope (line 85) | void setCurrentScope(SymbolScope *scope) { curscope = scope; }
method SleighSymbol (line 90) | SleighSymbol *findSymbol(const string &nm) const { return findSymbol...
method SleighSymbol (line 91) | SleighSymbol *findSymbol(const string &nm,int4 skip) const { return ...
method SleighSymbol (line 92) | SleighSymbol *findGlobalSymbol(const string &nm) const { return find...
method SleighSymbol (line 93) | SleighSymbol *findSymbol(uintm id) const { return symbollist[id]; }
class SpaceSymbol (line 101) | class SpaceSymbol : public SleighSymbol {
method SpaceSymbol (line 104) | SpaceSymbol(AddrSpace *spc) : SleighSymbol(spc->getName()) { space =...
method AddrSpace (line 105) | AddrSpace *getSpace(void) const { return space; }
method symbol_type (line 106) | virtual symbol_type getType(void) const { return space_symbol; }
class TokenSymbol (line 109) | class TokenSymbol : public SleighSymbol {
method TokenSymbol (line 112) | TokenSymbol(Token *t) : SleighSymbol(t->getName()) { tok = t; }
method Token (line 114) | Token *getToken(void) const { return tok; }
method symbol_type (line 115) | virtual symbol_type getType(void) const { return token_symbol; }
class SectionSymbol (line 118) | class SectionSymbol : public SleighSymbol { // Named p-code sections
method SectionSymbol (line 123) | SectionSymbol(const string &nm,int4 id) : SleighSymbol(nm) { templat...
method int4 (line 124) | int4 getTemplateId(void) const { return templateid; }
method incrementDefineCount (line 125) | void incrementDefineCount(void) { define_count += 1; }
method incrementRefCount (line 126) | void incrementRefCount(void) { ref_count += 1; }
method int4 (line 127) | int4 getDefineCount(void) const { return define_count; }
method int4 (line 128) | int4 getRefCount(void) const { return ref_count; }
method symbol_type (line 129) | virtual symbol_type getType(void) const { return section_symbol; }
class UserOpSymbol (line 132) | class UserOpSymbol : public SleighSymbol { // A user-defined pcode-op
method UserOpSymbol (line 135) | UserOpSymbol(void) {}
method UserOpSymbol (line 136) | UserOpSymbol(const string &nm) : SleighSymbol(nm) { index = 0; }
method setIndex (line 137) | void setIndex(uint4 ind) { index = ind; }
method uint4 (line 138) | uint4 getIndex(void) const { return index; }
method symbol_type (line 139) | virtual symbol_type getType(void) const { return userop_symbol; }
class Constructor (line 145) | class Constructor
method TokenPattern (line 498) | TokenPattern *getPattern(void) const { return pattern; }
method setMinimumLength (line 499) | void setMinimumLength(int4 l) { minimumlength = l; }
method int4 (line 500) | int4 getMinimumLength(void) const { return minimumlength; }
method setId (line 501) | void setId(uintm i) { id = i; }
method uintm (line 502) | uintm getId(void) const { return id; }
method setLineno (line 503) | void setLineno(int4 ln) { lineno = ln; }
method int4 (line 504) | int4 getLineno(void) const { return lineno; }
method setSrcIndex (line 505) | void setSrcIndex(int4 index) {src_index = index;}
method int4 (line 506) | int4 getSrcIndex(void) {return src_index;}
method addContext (line 507) | void addContext(const vector<ContextChange *> &vec) { context = vec; }
method setMainSection (line 512) | void setMainSection(ConstructTpl *tpl) { templ = tpl; }
method SubtableSymbol (line 514) | SubtableSymbol *getParent(void) const { return parent; }
method int4 (line 515) | int4 getNumOperands(void) const { return operands.size(); }
method OperandSymbol (line 516) | OperandSymbol *getOperand(int4 i) const { return operands[i]; }
method PatternEquation (line 517) | PatternEquation *getPatternEquation(void) const { return pateq; }
method ConstructTpl (line 518) | ConstructTpl *getTempl(void) const { return templ; }
method int4 (line 520) | int4 getNumSections(void) const { return namedtempl.size(); }
method applyContext (line 526) | void applyContext(ParserWalkerChange &walker) const {
method setError (line 533) | void setError(bool val) const { inerror = val; }
method isError (line 534) | bool isError(void) const { return inerror; }
class TripleSymbol (line 147) | class TripleSymbol : public SleighSymbol {
method TripleSymbol (line 149) | TripleSymbol(void) {}
method TripleSymbol (line 150) | TripleSymbol(const string &nm) : SleighSymbol(nm) {}
method Constructor (line 151) | virtual Constructor *resolve(ParserWalker &walker) { return (Constru...
method int4 (line 154) | virtual int4 getSize(void) const { return 0; }
method collectLocalValues (line 156) | virtual void collectLocalValues(vector<uintb> &results) const {}
class FamilySymbol (line 159) | class FamilySymbol : public TripleSymbol {
method FamilySymbol (line 161) | FamilySymbol(void) {}
method FamilySymbol (line 162) | FamilySymbol(const string &nm) : TripleSymbol(nm) {}
class SpecificSymbol (line 166) | class SpecificSymbol : public TripleSymbol {
method SpecificSymbol (line 168) | SpecificSymbol(void) {}
method SpecificSymbol (line 169) | SpecificSymbol(const string &nm) : TripleSymbol(nm) {}
class PatternlessSymbol (line 173) | class PatternlessSymbol : public SpecificSymbol { // Behaves like cons...
method PatternExpression (line 179) | virtual PatternExpression *getPatternExpression(void) const { return...
class EpsilonSymbol (line 182) | class EpsilonSymbol : public PatternlessSymbol { // Another name for z...
method EpsilonSymbol (line 185) | EpsilonSymbol(void) {}
method EpsilonSymbol (line 186) | EpsilonSymbol(const string &nm,AddrSpace *spc) : PatternlessSymbol(n...
method symbol_type (line 189) | virtual symbol_type getType(void) const { return epsilon_symbol; }
class ValueSymbol (line 196) | class ValueSymbol : public FamilySymbol {
method ValueSymbol (line 200) | ValueSymbol(void) { patval = (PatternValue *)0; }
method PatternValue (line 203) | virtual PatternValue *getPatternValue(void) const { return patval; }
method PatternExpression (line 204) | virtual PatternExpression *getPatternExpression(void) const { return...
method symbol_type (line 207) | virtual symbol_type getType(void) const { return value_symbol; }
class ValueMapSymbol (line 213) | class ValueMapSymbol : public ValueSymbol {
method ValueMapSymbol (line 218) | ValueMapSymbol(void) {}
method ValueMapSymbol (line 219) | ValueMapSymbol(const string &nm,PatternValue *pv,const vector<intb> ...
method symbol_type (line 223) | virtual symbol_type getType(void) const { return valuemap_symbol; }
class NameSymbol (line 229) | class NameSymbol : public ValueSymbol {
method NameSymbol (line 234) | NameSymbol(void) {}
method NameSymbol (line 235) | NameSymbol(const string &nm,PatternValue *pv,const vector<string> &n...
method symbol_type (line 238) | virtual symbol_type getType(void) const { return name_symbol; }
class VarnodeSymbol (line 244) | class VarnodeSymbol : public PatternlessSymbol { // A global varnode
method VarnodeSymbol (line 248) | VarnodeSymbol(void) {}
method markAsContext (line 250) | void markAsContext(void) { context_bits = true; }
method VarnodeData (line 251) | const VarnodeData &getFixedVarnode(void) const { return fix; }
method int4 (line 254) | virtual int4 getSize(void) const { return fix.size; }
method print (line 255) | virtual void print(ostream &s,ParserWalker &walker) const {
method symbol_type (line 258) | virtual symbol_type getType(void) const { return varnode_symbol; }
class BitrangeSymbol (line 264) | class BitrangeSymbol : public SleighSymbol { // A smaller bitrange wit...
method BitrangeSymbol (line 269) | BitrangeSymbol(void) {}
method BitrangeSymbol (line 270) | BitrangeSymbol(const string &nm,VarnodeSymbol *sym,uint4 bitoff,uint...
method VarnodeSymbol (line 272) | VarnodeSymbol *getParentSymbol(void) const { return varsym; }
method uint4 (line 273) | uint4 getBitOffset(void) const { return bitoffset; }
method uint4 (line 274) | uint4 numBits(void) const { return numbits; }
method symbol_type (line 275) | virtual symbol_type getType(void) const { return bitrange_symbol; }
class ContextSymbol (line 278) | class ContextSymbol : public ValueSymbol {
method ContextSymbol (line 283) | ContextSymbol(void) {}
method VarnodeSymbol (line 285) | VarnodeSymbol *getVarnode(void) const { return vn; }
method uint4 (line 286) | uint4 getLow(void) const { return low; }
method uint4 (line 287) | uint4 getHigh(void) const { return high; }
method getFlow (line 288) | bool getFlow(void) const { return flow; }
method symbol_type (line 289) | virtual symbol_type getType(void) const { return context_symbol; }
class VarnodeListSymbol (line 295) | class VarnodeListSymbol : public ValueSymbol {
method VarnodeListSymbol (line 300) | VarnodeListSymbol(void) {}
method symbol_type (line 306) | virtual symbol_type getType(void) const { return varnodelist_symbol; }
class OperandSymbol (line 312) | class OperandSymbol : public SpecificSymbol {
method setVariableLength (line 326) | void setVariableLength(void) { flags |= variable_len; }
method isVariableLength (line 327) | bool isVariableLength(void) const { return ((flags&variable_len)!=0); }
method OperandSymbol (line 329) | OperandSymbol(void) {}
method uint4 (line 331) | uint4 getRelativeOffset(void) const { return reloffset; }
method int4 (line 332) | int4 getOffsetBase(void) const { return offsetbase; }
method int4 (line 333) | int4 getMinimumLength(void) const { return minimumlength; }
method PatternExpression (line 334) | PatternExpression *getDefiningExpression(void) const { return defexp; }
method TripleSymbol (line 335) | TripleSymbol *getDefiningSymbol(void) const { return triple; }
method int4 (line 336) | int4 getIndex(void) const { return hand; }
method setCodeAddress (line 339) | void setCodeAddress(void) { flags |= code_address; }
method isCodeAddress (line 340) | bool isCodeAddress(void) const { return ((flags&code_address)!=0); }
method setOffsetIrrelevant (line 341) | void setOffsetIrrelevant(void) { flags |= offset_irrel; }
method isOffsetIrrelevant (line 342) | bool isOffsetIrrelevant(void) const { return ((flags&offset_irrel)!=...
method setMark (line 343) | void setMark(void) { flags |= marked; }
method clearMark (line 344) | void clearMark(void) { flags &= ~((uint4)marked); }
method isMarked (line 345) | bool isMarked(void) const { return ((flags&marked)!=0); }
method PatternExpression (line 348) | virtual PatternExpression *getPatternExpression(void) const { return...
method symbol_type (line 353) | virtual symbol_type getType(void) const { return operand_symbol; }
class StartSymbol (line 359) | class StartSymbol : public SpecificSymbol {
method StartSymbol (line 363) | StartSymbol(void) { patexp = (PatternExpression *)0; }
method PatternExpression (line 367) | virtual PatternExpression *getPatternExpression(void) const { return...
method symbol_type (line 370) | virtual symbol_type getType(void) const { return start_symbol; }
class EndSymbol (line 376) | class EndSymbol : public SpecificSymbol {
method EndSymbol (line 380) | EndSymbol(void) { patexp = (PatternExpression *)0; }
method PatternExpression (line 384) | virtual PatternExpression *getPatternExpression(void) const { return...
method symbol_type (line 387) | virtual symbol_type getType(void) const { return end_symbol; }
class Next2Symbol (line 393) | class Next2Symbol : public SpecificSymbol {
method Next2Symbol (line 397) | Next2Symbol(void) { patexp = (PatternExpression *)0; }
method PatternExpression (line 401) | virtual PatternExpression *getPatternExpression(void) const { return...
method symbol_type (line 404) | virtual symbol_type getType(void) const { return next2_symbol; }
class FlowDestSymbol (line 410) | class FlowDestSymbol : public SpecificSymbol {
method FlowDestSymbol (line 413) | FlowDestSymbol(void) {}
method PatternExpression (line 416) | virtual PatternExpression *getPatternExpression(void) const { throw ...
method symbol_type (line 419) | virtual symbol_type getType(void) const { return flowdest_symbol; }
class FlowRefSymbol (line 422) | class FlowRefSymbol : public SpecificSymbol {
method FlowRefSymbol (line 425) | FlowRefSymbol(void) {}
method PatternExpression (line 428) | virtual PatternExpression *getPatternExpression(void) const { throw ...
method symbol_type (line 431) | virtual symbol_type getType(void) const { return flowref_symbol; }
class ContextChange (line 434) | class ContextChange { // Change to context command
class ContextOp (line 444) | class ContextOp : public ContextChange {
method ContextOp (line 451) | ContextOp(void) {}
class ContextCommit (line 460) | class ContextCommit : public ContextChange {
method ContextCommit (line 466) | ContextCommit(void) {}
method validate (line 468) | virtual void validate(void) const {}
class SubtableSymbol (line 475) | class SubtableSymbol
method SubtableSymbol (line 580) | SubtableSymbol(void) { pattern = (TokenPattern *)0; decisiontree = (...
method isBeingBuilt (line 583) | bool isBeingBuilt(void) const { return beingbuilt; }
method isError (line 584) | bool isError(void) const { return errors; }
method addConstructor (line 585) | void addConstructor(Constructor *ct) { ct->setId(construct.size()); ...
method TokenPattern (line 588) | TokenPattern *getPattern(void) const { return pattern; }
method int4 (line 589) | int4 getNumConstructors(void) const { return construct.size(); }
method Constructor (line 590) | Constructor *getConstructor(uintm id) const { return construct[id]; }
method Constructor (line 591) | virtual Constructor *resolve(ParserWalker &walker) { return decision...
method PatternExpression (line 592) | virtual PatternExpression *getPatternExpression(void) const { throw ...
method getFixedHandle (line 593) | virtual void getFixedHandle(FixedHandle &hand,ParserWalker &walker) ...
method int4 (line 595) | virtual int4 getSize(void) const { return -1; }
method print (line 596) | virtual void print(ostream &s,ParserWalker &walker) const {
method symbol_type (line 599) | virtual symbol_type getType(void) const { return subtable_symbol; }
class Constructor (line 476) | class Constructor { // This is NOT a symbol
method TokenPattern (line 498) | TokenPattern *getPattern(void) const { return pattern; }
method setMinimumLength (line 499) | void setMinimumLength(int4 l) { minimumlength = l; }
method int4 (line 500) | int4 getMinimumLength(void) const { return minimumlength; }
method setId (line 501) | void setId(uintm i) { id = i; }
method uintm (line 502) | uintm getId(void) const { return id; }
method setLineno (line 503) | void setLineno(int4 ln) { lineno = ln; }
method int4 (line 504) | int4 getLineno(void) const { return lineno; }
method setSrcIndex (line 505) | void setSrcIndex(int4 index) {src_index = index;}
method int4 (line 506) | int4 getSrcIndex(void) {return src_index;}
method addContext (line 507) | void addContext(const vector<ContextChange *> &vec) { context = vec; }
method setMainSection (line 512) | void setMainSection(ConstructTpl *tpl) { templ = tpl; }
method SubtableSymbol (line 514) | SubtableSymbol *getParent(void) const { return parent; }
method int4 (line 515) | int4 getNumOperands(void) const { return operands.size(); }
method OperandSymbol (line 516) | OperandSymbol *getOperand(int4 i) const { return operands[i]; }
method PatternEquation (line 517) | PatternEquation *getPatternEquation(void) const { return pateq; }
method ConstructTpl (line 518) | ConstructTpl *getTempl(void) const { return templ; }
method int4 (line 520) | int4 getNumSections(void) const { return namedtempl.size(); }
method applyContext (line 526) | void applyContext(ParserWalkerChange &walker) const {
method setError (line 533) | void setError(bool val) const { inerror = val; }
method isError (line 534) | bool isError(void) const { return inerror; }
class DecisionProperties (line 540) | class DecisionProperties {
class DecisionNode (line 550) | class DecisionNode {
method DecisionNode (line 563) | DecisionNode(void) {}
class SubtableSymbol (line 574) | class SubtableSymbol : public TripleSymbol {
method SubtableSymbol (line 580) | SubtableSymbol(void) { pattern = (TokenPattern *)0; decisiontree = (...
method isBeingBuilt (line 583) | bool isBeingBuilt(void) const { return beingbuilt; }
method isError (line 584) | bool isError(void) const { return errors; }
method addConstructor (line 585) | void addConstructor(Constructor *ct) { ct->setId(construct.size()); ...
method TokenPattern (line 588) | TokenPattern *getPattern(void) const { return pattern; }
method int4 (line 589) | int4 getNumConstructors(void) const { return construct.size(); }
method Constructor (line 590) | Constructor *getConstructor(uintm id) const { return construct[id]; }
method Constructor (line 591) | virtual Constructor *resolve(ParserWalker &walker) { return decision...
method PatternExpression (line 592) | virtual PatternExpression *getPatternExpression(void) const { throw ...
method getFixedHandle (line 593) | virtual void getFixedHandle(FixedHandle &hand,ParserWalker &walker) ...
method int4 (line 595) | virtual int4 getSize(void) const { return -1; }
method print (line 596) | virtual void print(ostream &s,ParserWalker &walker) const {
method symbol_type (line 599) | virtual symbol_type getType(void) const { return subtable_symbol; }
class MacroSymbol (line 605) | class MacroSymbol : public SleighSymbol { // A user-defined pcode-macro
method MacroSymbol (line 610) | MacroSymbol(const string &nm,int4 i) : SleighSymbol(nm) { index = i;...
method int4 (line 611) | int4 getIndex(void) const { return index; }
method setConstruct (line 612) | void setConstruct(ConstructTpl *ct) { construct = ct; }
method ConstructTpl (line 613) | ConstructTpl *getConstruct(void) const { return construct; }
method addOperand (line 614) | void addOperand(OperandSymbol *sym) { operands.push_back(sym); }
method int4 (line 615) | int4 getNumOperands(void) const { return operands.size(); }
method OperandSymbol (line 616) | OperandSymbol *getOperand(int4 i) const { return operands[i]; }
method symbol_type (line 618) | virtual symbol_type getType(void) const { return macro_symbol; }
class LabelSymbol (line 621) | class LabelSymbol : public SleighSymbol { // A branch label
method LabelSymbol (line 626) | LabelSymbol(const string &nm,uint4 i) : SleighSymbol(nm) { index = i...
method uint4 (line 627) | uint4 getIndex(void) const { return index; }
method incrementRefCount (line 628) | void incrementRefCount(void) { refcount += 1; }
method uint4 (line 629) | uint4 getRefCount(void) const { return refcount; }
method setPlaced (line 630) | void setPlaced(void) { isplaced = true; }
method isPlaced (line 631) | bool isPlaced(void) const { return isplaced; }
method symbol_type (line 632) | virtual symbol_type getType(void) const { return label_symbol; }
FILE: pypcode/sleigh/space.cc
type ghidra (line 19) | namespace ghidra {
function int4 (line 126) | int4 AddrSpace::overlapJoin(uintb offset,int4 size,AddrSpace *pointSpa...
function uintb (line 169) | uintb AddrSpace::decodeAttributes(Decoder &decoder,uint4 &size) const
function int4 (line 224) | static int4 get_offset_size(const char *ptr,uintb &offset)
function uintb (line 255) | uintb AddrSpace::read(const string &s,int4 &size) const
function int4 (line 364) | int4 ConstantSpace::overlapJoin(uintb offset,int4 size,AddrSpace *poin...
function int4 (line 454) | int4 JoinSpace::overlapJoin(uintb offset,int4 size,AddrSpace *pointSpa...
function uintb (line 539) | uintb JoinSpace::decodeAttributes(Decoder &decoder,uint4 &size) const
function uintb (line 609) | uintb JoinSpace::read(const string &s,int4 &size) const
FILE: pypcode/sleigh/space.hh
type ghidra (line 25) | namespace ghidra {
type spacetype (line 30) | enum spacetype {
class AddrSpace (line 40) | class AddrSpace
class AddrSpaceManager (line 41) | class AddrSpaceManager
type VarnodeData (line 42) | struct VarnodeData
class Translate (line 43) | class Translate
class AddrSpace (line 82) | class AddrSpace {
class ConstantSpace (line 187) | class ConstantSpace : public AddrSpace {
class OtherSpace (line 198) | class OtherSpace : public AddrSpace {
class UniqueSpace (line 216) | class UniqueSpace : public AddrSpace {
class JoinSpace (line 232) | class JoinSpace : public AddrSpace {
class OverlaySpace (line 254) | class OverlaySpace : public AddrSpace {
method AddrSpace (line 258) | virtual AddrSpace *getContain(void) const { return baseSpace; }
function string (line 277) | inline const string &AddrSpace::getName(void) const {
function AddrSpaceManager (line 284) | inline AddrSpaceManager *AddrSpace::getManager(void) const {
function Translate (line 292) | inline const Translate *AddrSpace::getTrans(void) const {
function spacetype (line 304) | inline spacetype AddrSpace::getType(void) const {
function int4 (line 315) | inline int4 AddrSpace::getDelay(void) const {
function int4 (line 325) | inline int4 AddrSpace::getDeadcodeDelay(void) const {
function int4 (line 332) | inline int4 AddrSpace::getIndex(void) const {
function uint4 (line 340) | inline uint4 AddrSpace::getWordSize(void) const {
function uint4 (line 348) | inline uint4 AddrSpace::getAddrSize(void) const {
function uintb (line 354) | inline uintb AddrSpace::getHighest(void) const {
function uintb (line 361) | inline uintb AddrSpace::getPointerLowerBound(void) const {
function uintb (line 368) | inline uintb AddrSpace::getPointerUpperBound(void) const {
function int4 (line 374) | inline int4 AddrSpace::getMinimumPtrSize(void) const {
function uintb (line 383) | inline uintb AddrSpace::wrapOffset(uintb off) const {
function int4 (line 474) | inline int4 AddrSpace::numSpacebase(void) const {
function VarnodeData (line 482) | inline const VarnodeData &AddrSpace::getSpacebase(int4 i) const {
function VarnodeData (line 490) | inline const VarnodeData &AddrSpace::getSpacebaseFull(int4 i) const {
function AddrSpace (line 505) | inline AddrSpace *AddrSpace::getContain(void) const {
function uintb (line 514) | inline uintb AddrSpace::addressToByte(uintb val,uint4 ws) {
function uintb (line 523) | inline uintb AddrSpace::byteToAddress(uintb val,uint4 ws) {
function int8 (line 532) | inline int8 AddrSpace::addressToByteInt(int8 val,uint4 ws) {
function int8 (line 541) | inline int8 AddrSpace::byteToAddressInt(int8 val,uint4 ws) {
FILE: pypcode/sleigh/translate.cc
type ghidra (line 18) | namespace ghidra {
function int4 (line 104) | int4 SpacebaseSpace::numSpacebase(void) const
function VarnodeData (line 110) | const VarnodeData &SpacebaseSpace::getSpacebase(int4 i) const
function VarnodeData (line 118) | const VarnodeData &SpacebaseSpace::getSpacebaseFull(int4 i) const
function Address (line 141) | Address JoinRecord::getEquivalentAddress(uintb offset,int4 &pos) const
function AddrSpace (line 257) | AddrSpace *AddrSpaceManager::decodeSpace(Decoder &decoder,const Transl...
function AddrSpace (line 590) | AddrSpace *AddrSpaceManager::getSpaceByName(const string &nm) const
function AddrSpace (line 604) | AddrSpace *AddrSpaceManager::getSpaceByShortcut(char sc) const
function Address (line 628) | Address AddrSpaceManager::resolveConstant(AddrSpace *spc,uintb val,int...
function AddrSpace (line 647) | AddrSpace *AddrSpaceManager::getNextSpaceInOrder(AddrSpace *spc) const
function JoinRecord (line 671) | JoinRecord *AddrSpaceManager::findAddJoin(const vector<VarnodeData> &p...
function JoinRecord (line 722) | JoinRecord *AddrSpaceManager::findJoinInternal(uintb offset) const
function JoinRecord (line 746) | JoinRecord *AddrSpaceManager::findJoin(uintb offset) const
function Address (line 792) | Address AddrSpaceManager::constructFloatExtensionAddress(const Address...
function Address (line 817) | Address AddrSpaceManager::constructJoinAddress(const Translate *transl...
function Address (line 923) | Address AddrSpaceManager::parseAddressSimple(const string &val)
function FloatFormat (line 979) | const FloatFormat *Translate::getFloatFormat(int4 size) const
FILE: pypcode/sleigh/translate.hh
type ghidra (line 27) | namespace ghidra {
type UnimplError (line 53) | struct UnimplError : public LowlevelError {
method UnimplError (line 59) | UnimplError(const string &s,int4 l) : LowlevelError(s) { instruction...
type BadDataError (line 68) | struct BadDataError : public LowlevelError {
method BadDataError (line 72) | BadDataError(const string &s) : LowlevelError(s) {}
class Translate (line 75) | class Translate
type UniqueLayout (line 302) | enum UniqueLayout {
method registerContext (line 344) | virtual void registerContext(const string &name,int4 sbit,int4 ebit) {}
method setContextDefault (line 353) | virtual void setContextDefault(const string &name,uintm val) {}
method allowContextSet (line 363) | virtual void allowContextSet(bool val) const {}
class TruncationTag (line 81) | class TruncationTag {
method string (line 86) | const string &getName(void) const { return spaceName; }
method uint4 (line 87) | uint4 getSize(void) const { return size; }
class PcodeEmit (line 94) | class PcodeEmit {
class AssemblyEmit (line 120) | class AssemblyEmit {
class AddressResolver (line 142) | class AddressResolver {
class SpacebaseSpace (line 172) | class SpacebaseSpace : public AddrSpace {
method stackGrowsNegative (line 186) | virtual bool stackGrowsNegative(void) const { return isNegativeStack; }
method AddrSpace (line 187) | virtual AddrSpace *getContain(void) const { return contain; }
class JoinRecord (line 196) | class JoinRecord {
method int4 (line 201) | int4 numPieces(void) const { return pieces.size(); }
method isFloatExtension (line 202) | bool isFloatExtension(void) const { return (pieces.size() == 1); }
method VarnodeData (line 203) | const VarnodeData &getPiece(int4 i) const { return pieces[i]; }
method VarnodeData (line 204) | const VarnodeData &getUnified(void) const { return unified; }
type JoinRecordCompare (line 211) | struct JoinRecordCompare {
class AddrSpaceManager (line 220) | class AddrSpaceManager {
class Translate (line 299) | class Translate : public AddrSpaceManager {
type UniqueLayout (line 302) | enum UniqueLayout {
method registerContext (line 344) | virtual void registerContext(const string &name,int4 sbit,int4 ebit) {}
method setContextDefault (line 353) | virtual void setContextDefault(const string &name,uintm val) {}
method allowContextSet (line 363) | virtual void allowContextSet(bool val) const {}
function int4 (line 448) | inline int4 AddrSpaceManager::getDefaultSize(void) const {
function AddrSpace (line 457) | inline AddrSpace *AddrSpaceManager::getIopSpace(void) const {
function AddrSpace (line 466) | inline AddrSpace *AddrSpaceManager::getFspecSpace(void) const {
function AddrSpace (line 475) | inline AddrSpace *AddrSpaceManager::getJoinSpace(void) const {
function AddrSpace (line 484) | inline AddrSpace *AddrSpaceManager::getStackSpace(void) const {
function AddrSpace (line 496) | inline AddrSpace *AddrSpaceManager::getUniqueSpace(void) const {
function AddrSpace (line 505) | inline AddrSpace *AddrSpaceManager::getDefaultCodeSpace(void) const {
function AddrSpace (line 514) | inline AddrSpace *AddrSpaceManager::getDefaultDataSpace(void) const {
function AddrSpace (line 522) | inline AddrSpace *AddrSpaceManager::getConstantSpace(void) const {
function Address (line 532) | inline Address AddrSpaceManager::getConstant(uintb val) const {
function Address (line 542) | inline Address AddrSpaceManager::createConstFromSpace(AddrSpace *spc) ...
function int4 (line 550) | inline int4 AddrSpaceManager::numSpaces(void) const {
function AddrSpace (line 559) | inline AddrSpace *AddrSpaceManager::getSpace(int4 i) const {
function int4 (line 596) | inline int4 Translate::getAlignment(void) const {
function uint4 (line 603) | inline uint4 Translate::getUniqueBase(void) const {
function uint4 (line 611) | inline uint4 Translate::getUniqueStart(UniqueLayout layout) const {
FILE: pypcode/sleigh/types.h
function namespace (line 24) | namespace ghidra {
FILE: pypcode/sleigh/xml.cc
type ghidra (line 104) | namespace ghidra {
class XmlScan (line 113) | class XmlScan {
type mode (line 116) | enum mode { CharDataMode, CDataMode, AttValueSingleMode,
type token (line 120) | enum token { CharDataToken = 258,
method int4 (line 143) | int4 getxmlchar(void) {
method int4 (line 160) | int4 next(int4 i) { return lookahead[(pos+i)&3]; }
method isLetter (line 161) | bool isLetter(int4 val) { return (((val>=0x41)&&(val<=0x5a))||((val>...
method setmode (line 176) | void setmode(mode m) { curmode = m; }
method string (line 178) | string *lval(void) { string *ret = lvalue; lvalue = (string *)0; ret...
type NameValue (line 182) | struct NameValue {
type xmltokentype (line 235) | enum xmltokentype
function yy_symbol_value_print (line 867) | static void
function yy_symbol_print (line 886) | static void
function yy_stack_print (line 901) | static void
function yy_reduce_print (line 924) | static void
function YYSIZE_T (line 985) | static YYSIZE_T
function YYSIZE_T (line 1024) | static YYSIZE_T
function yysyntax_error (line 1072) | static int
function yydestruct (line 1204) | static void
function yyparse (line 1364) | int
function int4 (line 2106) | int4 XmlScan::scanSingle(void)
function int4 (line 2117) | int4 XmlScan::scanCharData(void)
function int4 (line 2137) | int4 XmlScan::scanCData(void)
function int4 (line 2154) | int4 XmlScan::scanCharRef(void)
function int4 (line 2186) | int4 XmlScan::scanAttValue(int4 quote)
function int4 (line 2202) | int4 XmlScan::scanComment(void)
function int4 (line 2218) | int4 XmlScan::scanName(void)
function int4 (line 2234) | int4 XmlScan::scanSName(void)
function int4 (line 2284) | int4 XmlScan::nexttoken(void)
function print_content (line 2312) | void print_content(const string &str)
function int4 (line 2329) | int4 convertEntityRef(const string &ref)
function int4 (line 2340) | int4 convertCharRef(const string &ref)
function xmllex (line 2365) | int xmllex(void)
function xmlerror (line 2374) | int xmlerror(const char *str)
function int4 (line 2381) | int4 xml_parse(istream &i,ContentHandler *hand,int4 dbg)
function string (line 2431) | const string &Element::getAttributeValue(const string &nm) const
function Document (line 2449) | Document *DocumentStorage::parseDocument(istream &s)
function Document (line 2457) | Document *DocumentStorage::openDocument(const string &filename)
function Element (line 2474) | const Element *DocumentStorage::getTag(const string &nm) const
function Document (line 2485) | Document *xml_tree(istream &i)
function xml_escape (line 2497) | void xml_escape(ostream &s,const char *str)
FILE: pypcode/sleigh/xml.hh
type ghidra (line 28) | namespace ghidra {
class Attributes (line 45) | class Attributes {
method Attributes (line 52) | Attributes(string *el) { elementname = el; }
method string (line 57) | const string &getelemURI(void) const { return bogus_uri; }
method string (line 58) | const string &getelemName(void) const { return *elementname; }
method add_attribute (line 59) | void add_attribute(string *nm,string *vl) { name.push_back(nm); valu...
method int4 (line 61) | int4 getLength(void) const { return name.size(); }
method string (line 62) | const string &getURI(int4 i) const { return bogus_uri; }
method string (line 63) | const string &getLocalName(int4 i) const { return *name[i]; }
method string (line 64) | const string &getQName(int4 i) const { return *name[i]; }
method string (line 70) | const string &getValue(int4 i) const { return *value[i]; }
method string (line 73) | const string &getValue(const string &qualifiedName) const {
class ContentHandler (line 86) | class ContentHandler {
class Element (line 153) | class Element
method Element (line 168) | Element(Element *par) { parent = par; }
method setName (line 170) | void setName(const string &nm) { name = nm; }
method addContent (line 177) | void addContent(const char *str,int4 start,int4 length) {
method addChild (line 184) | void addChild(Element *child) { children.push_back(child); }
method addAttribute (line 190) | void addAttribute(const string &nm,const string &vl) {
method Element (line 193) | Element *getParent(void) const { return parent; }
method string (line 194) | const string &getName(void) const { return name; }
method List (line 195) | const List &getChildren(void) const { return children; }
method string (line 196) | const string &getContent(void) const { return content; }
method int4 (line 206) | int4 getNumAttributes(void) const { return attr.size(); }
method string (line 207) | const string &getAttributeName(int4 i) const { return attr[i]; }
method string (line 208) | const string &getAttributeValue(int4 i) const { return value[i]; }
class Element (line 159) | class Element {
method Element (line 168) | Element(Element *par) { parent = par; }
method setName (line 170) | void setName(const string &nm) { name = nm; }
method addContent (line 177) | void addContent(const char *str,int4 start,int4 length) {
method addChild (line 184) | void addChild(Element *child) { children.push_back(child); }
method addAttribute (line 190) | void addAttribute(const string &nm,const string &vl) {
method Element (line 193) | Element *getParent(void) const { return parent; }
method string (line 194) | const string &getName(void) const { return name; }
method List (line 195) | const List &getChildren(void) const { return children; }
method string (line 196) | const string &getContent(void) const { return content; }
method int4 (line 206) | int4 getNumAttributes(void) const { return attr.size(); }
method string (line 207) | const string &getAttributeName(int4 i) const { return attr[i]; }
method string (line 208) | const string &getAttributeValue(int4 i) const { return value[i]; }
class Document (line 215) | class Document : public Element {
method Document (line 217) | Document(void) : Element((Element *)0) {}
method Element (line 218) | Element *getRoot(void) const { return *children.begin(); }
class TreeHandler (line 226) | class TreeHandler : public ContentHandler {
method TreeHandler (line 231) | TreeHandler(Element *rt) { root = rt; cur = root; }
method setDocumentLocator (line 233) | virtual void setDocumentLocator(Locator locator) {}
method startDocument (line 234) | virtual void startDocument(void) {}
method endDocument (line 235) | virtual void endDocument(void) {}
method startPrefixMapping (line 236) | virtual void startPrefixMapping(const string &prefix,const string &u...
method endPrefixMapping (line 237) | virtual void endPrefixMapping(const string &prefix) {}
method ignorableWhitespace (line 243) | virtual void ignorableWhitespace(const char *text,int4 start,int4 le...
method processingInstruction (line 244) | virtual void processingInstruction(const string &target,const string...
method setVersion (line 245) | virtual void setVersion(const string &val) {}
method setEncoding (line 246) | virtual void setEncoding(const string &val) {}
method skippedEntity (line 247) | virtual void skippedEntity(const string &name) {}
method setError (line 248) | virtual void setError(const string &errmsg) { error = errmsg; }
method string (line 249) | const string &getError(void) const { return error; }
class DocumentStorage (line 258) | class DocumentStorage {
type DecoderError (line 297) | struct DecoderError {
method DecoderError (line 299) | DecoderError(const string &s) { explain = s; }
function a_v (line 340) | inline void a_v(ostream &s,const string &attr,const string &val)
function a_v_i (line 353) | inline void a_v_i(ostream &s,const string &attr,intb val)
function a_v_u (line 364) | inline void a_v_u(ostream &s,const string &attr,uintb val)
function a_v_b (line 375) | inline void a_v_b(ostream &s,const string &attr,bool val)
function xml_readbool (line 392) | inline bool xml_readbool(const string &attr)
FILE: pypcode/zlib/adler32.c
function uLong (line 65) | uLong ZEXPORT adler32_z(uLong adler, const Bytef *buf, z_size_t len) {
function uLong (line 132) | uLong ZEXPORT adler32(uLong adler, const Bytef *buf, uInt len) {
function local (line 137) | local uLong adler32_combine_(uLong adler1, uLong adler2, z_off64_t len2) {
function uLong (line 162) | uLong ZEXPORT adler32_combine(uLong adler1, uLong adler2, z_off_t len2) {
function uLong (line 166) | uLong ZEXPORT adler32_combine64(uLong adler1, uLong adler2, z_off64_t le...
FILE: pypcode/zlib/deflate.c
type block_state (line 67) | typedef enum {
type block_state (line 74) | typedef block_state (*compress_func)(deflate_state *s, int flush);
type config (line 102) | typedef struct config_s {
function local (line 191) | local void slide_hash(deflate_state *s) {
function read_buf (line 222) | local unsigned read_buf(z_streamp strm, Bytef *buf, unsigned size) {
function local (line 255) | local void fill_window(deflate_state *s) {
function deflateInit_ (line 375) | int ZEXPORT deflateInit_(z_streamp strm, int level, const char *version,
function deflateInit2_ (line 383) | int ZEXPORT deflateInit2_(z_streamp strm, int level, int method,
function local (line 533) | local int deflateStateCheck(z_streamp strm) {
function deflateSetDictionary (line 554) | int ZEXPORT deflateSetDictionary(z_streamp strm, const Bytef *dictionary,
function deflateGetDictionary (line 620) | int ZEXPORT deflateGetDictionary(z_streamp strm, Bytef *dictionary,
function local (line 677) | local void lm_init(deflate_state *s) {
function deflateReset (line 699) | int ZEXPORT deflateReset(z_streamp strm) {
function deflateSetHeader (line 709) | int ZEXPORT deflateSetHeader(z_streamp strm, gz_headerp head) {
function deflatePending (line 717) | int ZEXPORT deflatePending(z_streamp strm, unsigned *pending, int *bits) {
function deflatePrime (line 727) | int ZEXPORT deflatePrime(z_streamp strm, int bits, int value) {
function deflateParams (line 756) | int ZEXPORT deflateParams(z_streamp strm, int level, int strategy) {
function deflateTune (line 801) | int ZEXPORT deflateTune(z_streamp strm, int good_length, int max_lazy,
function uLong (line 838) | uLong ZEXPORT deflateBound(z_streamp strm, uLong sourceLen) {
function local (line 908) | local void putShortMSB(deflate_state *s, uInt b) {
function local (line 919) | local void flush_pending(z_streamp strm) {
function deflate (line 950) | int ZEXPORT deflate(z_streamp strm, int flush) {
function deflateEnd (line 1262) | int ZEXPORT deflateEnd(z_streamp strm) {
function deflateCopy (line 1286) | int ZEXPORT deflateCopy(z_streamp dest, z_streamp source) {
function local (line 1352) | local uInt longest_match(deflate_state *s, IPos cur_match) {
function local (line 1500) | local uInt longest_match(deflate_state *s, IPos cur_match) {
function local (line 1561) | local void check_match(deflate_state *s, IPos start, IPos match, int len...
function local (line 1631) | local block_state deflate_stored(deflate_state *s, int flush) {
function local (line 1815) | local block_state deflate_fast(deflate_state *s, int flush) {
function local (line 1914) | local block_state deflate_slow(deflate_state *s, int flush) {
function local (line 2042) | local block_state deflate_rle(deflate_state *s, int flush) {
function local (line 2113) | local block_state deflate_huff(deflate_state *s, int flush) {
FILE: pypcode/zlib/deflate.h
type ct_data (line 76) | typedef struct ct_data_s {
type static_tree_desc (line 92) | typedef struct static_tree_desc_s static_tree_desc;
type tree_desc (line 94) | typedef struct tree_desc_s {
type ush (line 100) | typedef ush Pos;
type Pos (line 101) | typedef Pos FAR Posf;
type IPos (line 102) | typedef unsigned IPos;
type deflate_state (line 108) | typedef struct internal_state {
FILE: pypcode/zlib/gzguts.h
type gz_state (line 173) | typedef struct {
type gz_state (line 206) | typedef gz_state FAR *gz_statep;
FILE: pypcode/zlib/inffast.c
function inflate_fast (line 54) | void ZLIB_INTERNAL inflate_fast(z_streamp strm, unsigned start) {
FILE: pypcode/zlib/inflate.c
function local (line 98) | local int inflateStateCheck(z_streamp strm) {
function inflateResetKeep (line 110) | int ZEXPORT inflateResetKeep(z_streamp strm) {
function inflateReset (line 134) | int ZEXPORT inflateReset(z_streamp strm) {
function inflateReset2 (line 145) | int ZEXPORT inflateReset2(z_streamp strm, int windowBits) {
function inflateInit2_ (line 182) | int ZEXPORT inflateInit2_(z_streamp strm, int windowBits,
function inflateInit_ (line 222) | int ZEXPORT inflateInit_(z_streamp strm, const char *version,
function inflatePrime (line 227) | int ZEXPORT inflatePrime(z_streamp strm, int bits, int value) {
function local (line 256) | local void fixedtables(struct inflate_state FAR *state) {
function makefixed (line 318) | void makefixed(void)
function local (line 372) | local int updatewindow(z_streamp strm, const Bytef *end, unsigned copy) {
type inflate_state (line 595) | struct inflate_state
type inflate_state (line 618) | struct inflate_state
type inflate_state (line 1271) | struct inflate_state
type inflate_state (line 1274) | struct inflate_state
type inflate_state (line 1284) | struct inflate_state
type inflate_state (line 1288) | struct inflate_state
type inflate_state (line 1304) | struct inflate_state
type inflate_state (line 1310) | struct inflate_state
type inflate_state (line 1335) | struct inflate_state
type inflate_state (line 1339) | struct inflate_state
type inflate_state (line 1384) | struct inflate_state
type inflate_state (line 1388) | struct inflate_state
type inflate_state (line 1436) | struct inflate_state
type inflate_state (line 1439) | struct inflate_state
type inflate_state (line 1444) | struct inflate_state
type inflate_state (line 1445) | struct inflate_state
type inflate_state (line 1452) | struct inflate_state
type inflate_state (line 1455) | struct inflate_state
type inflate_state (line 1456) | struct inflate_state
type inflate_state (line 1470) | struct inflate_state
type internal_state (line 1483) | struct internal_state
type inflate_state (line 1488) | struct inflate_state
type inflate_state (line 1491) | struct inflate_state
type inflate_state (line 1503) | struct inflate_state
type inflate_state (line 1506) | struct inflate_state
type inflate_state (line 1515) | struct inflate_state
type inflate_state (line 1519) | struct inflate_state
type inflate_state (line 1526) | struct inflate_state
type inflate_state (line 1528) | struct inflate_state
FILE: pypcode/zlib/inflate.h
type inflate_mode (line 24) | typedef enum {
type inflate_state (line 86) | struct inflate_state {
FILE: pypcode/zlib/inftrees.c
function inflate_table (line 36) | int ZLIB_INTERNAL inflate_table(codetype type, unsigned short FAR *lens,
FILE: pypcode/zlib/inftrees.h
type code (line 28) | typedef struct {
type codetype (line 58) | typedef enum {
FILE: pypcode/zlib/trees.c
type static_tree_desc_s (line 121) | struct static_tree_desc_s {
function bi_reverse (line 158) | local unsigned bi_reverse(unsigned code, int len) {
function local (line 170) | local void bi_flush(deflate_state *s) {
function local (line 185) | local void bi_windup(deflate_state *s) {
function local (line 206) | local void gen_codes(ct_data *tree, int max_code, ushf *bl_count) {
function local (line 256) | local void send_bits(deflate_state *s, int value, int length) {
function local (line 298) | local void tr_static_init(void) {
function gen_trees_header (line 391) | void gen_trees_header(void) {
function local (line 443) | local void init_block(deflate_state *s) {
function _tr_init (line 459) | void ZLIB_INTERNAL _tr_init(deflate_state *s) {
function local (line 511) | local void pqdownheap(deflate_state *s, ct_data *tree, int k) {
function local (line 542) | local void gen_bitlen(deflate_state *s, tree_desc *desc) {
function local (line 629) | local void build_tree(deflate_state *s, tree_desc *desc) {
function local (line 714) | local void scan_tree(deflate_state *s, ct_data *tree, int max_code) {
function local (line 755) | local void send_tree(deflate_state *s, ct_data *tree, int max_code) {
function local (line 802) | local int build_bl_tree(deflate_state *s) {
function local (line 835) | local void send_all_trees(deflate_state *s, int lcodes, int dcodes,
function _tr_stored_block (line 862) | void ZLIB_INTERNAL _tr_stored_block(deflate_state *s, charf *buf,
function _tr_flush_bits (line 882) | void ZLIB_INTERNAL _tr_flush_bits(deflate_state *s) {
function _tr_align (line 890) | void ZLIB_INTERNAL _tr_align(deflate_state *s) {
function local (line 902) | local void compress_block(deflate_state *s, const ct_data *ltree,
function local (line 968) | local int detect_data_type(deflate_state *s) {
function _tr_tally (line 1097) | int ZLIB_INTERNAL _tr_tally(deflate_state *s, unsigned dist, unsigned lc) {
FILE: pypcode/zlib/zconf.h
type z_size_t (line 249) | typedef unsigned long long z_size_t;
type z_size_t (line 251) | typedef unsigned long z_size_t;
type z_size_t (line 256) | typedef unsigned NO_SIZE_T z_size_t;
type z_size_t (line 259) | typedef size_t z_size_t;
type z_size_t (line 261) | typedef unsigned long z_size_t;
type Byte (line 397) | typedef unsigned char Byte;
type uInt (line 399) | typedef unsigned int uInt;
type uLong (line 400) | typedef unsigned long uLong;
type Byte (line 406) | typedef Byte FAR Bytef;
type charf (line 408) | typedef char FAR charf;
type intf (line 409) | typedef int FAR intf;
type uInt (line 410) | typedef uInt FAR uIntf;
type uLong (line 411) | typedef uLong FAR uLongf;
type Byte (line 418) | typedef Byte const *voidpc;
type Byte (line 419) | typedef Byte FAR *voidpf;
type Byte (line 420) | typedef Byte *voidp;
type Z_U4 (line 435) | typedef Z_U4 z_crc_t;
type z_crc_t (line 437) | typedef unsigned long z_crc_t;
FILE: pypcode/zlib/zlib.h
type voidpf (line 85) | typedef voidpf (*alloc_func)(voidpf opaque, uInt items, uInt size);
type internal_state (line 88) | struct internal_state
type z_stream (line 90) | typedef struct z_stream_s {
type z_stream (line 112) | typedef z_stream FAR *z_streamp;
type gz_header (line 118) | typedef struct gz_header_s {
type gz_header (line 135) | typedef gz_header FAR *gz_headerp;
type gzFile_s (line 1309) | struct gzFile_s
type gzFile_s (line 1841) | struct gzFile_s {
FILE: pypcode/zlib/zutil.c
function uLong (line 35) | uLong ZEXPORT zlibCompileFlags(void) {
function z_error (line 126) | void ZLIB_INTERNAL z_error(char *m) {
function zmemcpy (line 149) | void ZLIB_INTERNAL zmemcpy(Bytef* dest, const Bytef* source, uInt len) {
function zmemcmp (line 156) | int ZLIB_INTERNAL zmemcmp(const Bytef* s1, const Bytef* s2, uInt len) {
function zmemzero (line 165) | void ZLIB_INTERNAL zmemzero(Bytef* dest, uInt len) {
type ptr_table (line 193) | typedef struct ptr_table_s {
function voidpf (line 206) | voidpf ZLIB_INTERNAL zcalloc(voidpf opaque, unsigned items, unsigned siz...
function zcfree (line 231) | void ZLIB_INTERNAL zcfree(voidpf opaque, voidpf ptr) {
function voidpf (line 267) | voidpf ZLIB_INTERNAL zcalloc(voidpf opaque, uInt items, uInt size) {
function zcfree (line 272) | void ZLIB_INTERNAL zcfree(voidpf opaque, voidpf ptr) {
function voidpf (line 290) | voidpf ZLIB_INTERNAL zcalloc(voidpf opaque, unsigned items, unsigned siz...
function zcfree (line 296) | void ZLIB_INTERNAL zcfree(voidpf opaque, voidpf ptr) {
FILE: pypcode/zlib/zutil.h
type uch (line 43) | typedef unsigned char uch;
type uch (line 44) | typedef uch FAR uchf;
type ush (line 45) | typedef unsigned short ush;
type ush (line 46) | typedef ush FAR ushf;
type ulg (line 47) | typedef unsigned long ulg;
FILE: scripts/benchmark.py
class Block (line 64) | class Block:
class BenchmarkResult (line 72) | class BenchmarkResult:
function get_file_hash (line 79) | def get_file_hash(binary_path: str) -> str:
function get_blocks (line 89) | def get_blocks(binary_path: str) -> list[Block]:
function benchmark_pypcode (line 125) | def benchmark_pypcode(blocks: list[Block], iter_ops: bool = False, iter_...
function benchmark_pypcode_disassembly (line 148) | def benchmark_pypcode_disassembly(blocks: list[Block]) -> BenchmarkResult:
function benchmark_pyvex (line 165) | def benchmark_pyvex(blocks: list[Block], **vex_args) -> BenchmarkResult:
function benchmark_capstone (line 180) | def benchmark_capstone(blocks: list[Block], lite: bool = False) -> Bench...
function gen_benchmarks_from_configurations (line 202) | def gen_benchmarks_from_configurations(
function main (line 214) | def main() -> None:
FILE: setup.py
class BuildExtension (line 13) | class BuildExtension(build_ext):
method run (line 18) | def run(self):
function add_pkg_data_dirs (line 89) | def add_pkg_data_dirs(pkg, dirs):
FILE: tests/test_cli.py
function run_cli (line 15) | def run_cli(*args):
class TestCli (line 24) | class TestCli(unittest.TestCase):
method test_language_list (line 29) | def test_language_list(self):
method test_language_suggestions (line 33) | def test_language_suggestions(self):
method test_language_no_suggestions (line 40) | def test_language_no_suggestions(self):
method test_translate (line 44) | def test_translate(self):
method test_failed_translation (line 56) | def test_failed_translation(self):
FILE: tests/test_pypcode.py
function get_imarks (line 30) | def get_imarks(translation: Translation) -> list[PcodeOp]:
class ContextTests (line 34) | class ContextTests(TestCase):
method tearDown (line 39) | def tearDown(self):
method test_bad_context_language_type (line 42) | def test_bad_context_language_type(self):
method test_can_create_all_language_contexts (line 46) | def test_can_create_all_language_contexts(self):
method test_context_creation_failure (line 53) | def test_context_creation_failure(self):
method test_context_premature_release (line 59) | def test_context_premature_release(self):
class RegistersTests (line 95) | class RegistersTests(TestCase):
method test_registers (line 100) | def test_registers(self):
method test_getRegisterName (line 104) | def test_getRegisterName(self):
class AddrSpaceTests (line 110) | class AddrSpaceTests(TestCase):
method test_name (line 115) | def test_name(self):
class VarnodeTests (line 120) | class VarnodeTests(TestCase):
method test_getSpaceFromConst (line 125) | def test_getSpaceFromConst(self):
method test_getRegisterName (line 130) | def test_getRegisterName(self):
method test_getUserDefinedOpName (line 136) | def test_getUserDefinedOpName(self):
class DisassembleTests (line 151) | class DisassembleTests(TestCase):
method test_disassemble (line 156) | def test_disassemble(self):
method test_decode_failure (line 166) | def test_decode_failure(self):
method test_partial_decode_failure (line 171) | def test_partial_decode_failure(self):
method test_not_cached (line 176) | def test_not_cached(self):
method test_arg_base_address (line 186) | def test_arg_base_address(self):
method test_arg_offset (line 193) | def test_arg_offset(self):
method test_arg_offset_out_of_range (line 198) | def test_arg_offset_out_of_range(self):
method test_arg_max_bytes (line 203) | def test_arg_max_bytes(self):
method test_arg_max_instructions (line 208) | def test_arg_max_instructions(self):
method test_pretty_printing (line 213) | def test_pretty_printing(self):
class TranslateTests (line 220) | class TranslateTests(TestCase):
method test_translate (line 225) | def test_translate(self):
method test_decode_failure (line 230) | def test_decode_failure(self):
method test_partial_decode_failure (line 235) | def test_partial_decode_failure(self):
method test_unimpl_failure (line 240) | def test_unimpl_failure(self):
method test_partial_unimpl_failure (line 245) | def test_partial_unimpl_failure(self):
method test_not_cached (line 250) | def test_not_cached(self):
method test_translate_and_disassemble_not_cached (line 256) | def test_translate_and_disassemble_not_cached(self):
method test_arg_base_address (line 272) | def test_arg_base_address(self):
method test_arg_offset (line 280) | def test_arg_offset(self):
method test_arg_offset_out_of_range (line 285) | def test_arg_offset_out_of_range(self):
method test_arg_max_bytes (line 290) | def test_arg_max_bytes(self):
method test_arg_max_instructions (line 295) | def test_arg_max_instructions(self):
method test_arg_flag_bb_terminating (line 300) | def test_arg_flag_bb_terminating(self):
method test_delay_slot (line 305) | def test_delay_slot(self):
method test_pretty_printing (line 316) | def test_pretty_printing(self):
class PrintingTests (line 322) | class PrintingTests(TestCase):
method test_branches (line 327) | def test_branches(self):
method test_cbranch (line 347) | def test_cbranch(self):
method test_load (line 365) | def test_load(self):
method test_store (line 390) | def test_store(self):
method test_callother (line 415) | def test_callother(self):
method test_no_regname (line 431) | def test_no_regname(self):
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Download .json
Condensed preview — 930 files, each showing path, character count, and a content snippet. Download the .json file for the full structured content (16,570K chars).
[
{
"path": ".clang-format",
"chars": 1803,
"preview": "# https://clang.llvm.org/docs/ClangFormat.html\n# https://clang.llvm.org/docs/ClangFormatStyleOptions.html\n---\nLanguage: "
},
{
"path": ".github/ISSUE_TEMPLATE/bug-report.yml",
"chars": 2222,
"preview": "name: Report a bug\ndescription: Report a bug in pypcode\nlabels: [bug,needs-triage]\nbody:\n - type: markdown\n attribut"
},
{
"path": ".github/ISSUE_TEMPLATE/config.yml",
"chars": 205,
"preview": "blank_issues_enabled: false\ncontact_links:\n - name: Join our Slack community\n url: https://angr.io/invite/\n about"
},
{
"path": ".github/ISSUE_TEMPLATE/feature-request.yml",
"chars": 1718,
"preview": "name: Request a feature\ndescription: Request a new feature for pypcode\nlabels: [enhancement,needs-triage]\nbody:\n - type"
},
{
"path": ".github/ISSUE_TEMPLATE/question.yml",
"chars": 1300,
"preview": "name: Ask a question\ndescription: Ask a question about pypcode\nlabels: [question,needs-triage]\nbody:\n - type: markdown\n"
},
{
"path": ".github/dependabot.yml",
"chars": 157,
"preview": "version: 2\nupdates:\n - package-ecosystem: \"github-actions\"\n directory: \"/\"\n schedule:\n interval: \"weekly\"\n "
},
{
"path": ".github/workflows/build.yml",
"chars": 6174,
"preview": "name: Build\n\non: [push, pull_request]\n\nconcurrency:\n group: ${{ github.workflow }}-${{ github.ref }}\n cancel-in-progre"
},
{
"path": ".gitignore",
"chars": 145,
"preview": "*.egg-info/\n__pycache__/\nbuild/\ndist/\npypcode/bin/\ndocs/_build/\n*.so\n*.sla\n*.manifest\n*.gradle\n*.java\n.coverage\ncoverage"
},
{
"path": ".pre-commit-config.yaml",
"chars": 2551,
"preview": "ci:\n skip: [pylint]\n\nexclude: ^pypcode/sleigh|^pypcode/processors\nrepos:\n\n#\n# Fail fast\n#\n\n- repo: https://github.c"
},
{
"path": ".pylintrc",
"chars": 6985,
"preview": "[MASTER]\n\n# Specify a configuration file.\n#rcfile=\n\n# Python code to execute, usually for sys.path manipulation such as\n"
},
{
"path": ".readthedocs.yml",
"chars": 309,
"preview": "# Read the Docs configuration file\n# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details\n\nversion:"
},
{
"path": "CMakeLists.txt",
"chars": 2420,
"preview": "cmake_minimum_required(VERSION 3.18...3.22)\nproject(pypcode)\nfind_package(Python COMPONENTS Interpreter Development.Modu"
},
{
"path": "LICENSE.txt",
"chars": 1813,
"preview": "pypcode is a library built around the SLEIGH library.\n\nSLEIGH and the processor definition files under the pypcode/proce"
},
{
"path": "MANIFEST.in",
"chars": 134,
"preview": "graft pypcode\nprune pypcode/bin\ninclude CMakeLists.txt\ninclude LICENSE.txt\ngraft tests\nglobal-exclude *.so\nglobal-exclud"
},
{
"path": "README.md",
"chars": 627,
"preview": "pypcode\n=======\n[](https://pypi.org/project/pypcode/)\n[![codecov](https://"
},
{
"path": "docs/Makefile",
"chars": 634,
"preview": "# Minimal makefile for Sphinx documentation\n#\n\n# You can set these variables from the command line, and also\n# from the "
},
{
"path": "docs/api.rst",
"chars": 82,
"preview": ":mod:`pypcode`\n=========================================\n\n.. automodule:: pypcode\n"
},
{
"path": "docs/conf.py",
"chars": 1923,
"preview": "# Configuration file for the Sphinx documentation builder.\n#\n# For the full list of built-in configuration values, see t"
},
{
"path": "docs/guide.rst",
"chars": 3479,
"preview": "Guide\n=====\n\nInstallation\n------------\nThis package can be installed on Linux, macOS, and Windows platforms for recent ("
},
{
"path": "docs/index.rst",
"chars": 658,
"preview": "pypcode documentation\n=====================\npypcode is a machine code disassembly and IR translation library for Python "
},
{
"path": "docs/languages.rst",
"chars": 212,
"preview": "Architecture Support\n====================\n\n.. ipython::\n\n In [0]: for arch in pypcode.Arch.enumerate():\n ...: "
},
{
"path": "docs/make.bat",
"chars": 765,
"preview": "@ECHO OFF\n\npushd %~dp0\n\nREM Command file for Sphinx documentation\n\nif \"%SPHINXBUILD%\" == \"\" (\n\tset SPHINXBUILD=sphinx-bu"
},
{
"path": "pypcode/__init__.py",
"chars": 6615,
"preview": "\"\"\"\nPythonic interface to SLEIGH\n\"\"\"\n\nfrom __future__ import annotations\nimport os.path\nimport xml.etree.ElementTree as "
},
{
"path": "pypcode/__main__.py",
"chars": 3639,
"preview": "#!/usr/bin/env python\n\"\"\"\nRuns when invoking pypcode module from command line. Lists supported\narchitectures, and handle"
},
{
"path": "pypcode/__version__.py",
"chars": 27,
"preview": "__version__ = \"3.3.4.dev0\"\n"
},
{
"path": "pypcode/docs/ghidra/DISCLAIMER.md",
"chars": 1792,
"preview": "# Disclaimer of Warranty\n\nThis Work is provided \"AS IS.\"\nAny express or implied warranties, including but not limited to"
},
{
"path": "pypcode/docs/ghidra/LICENSE",
"chars": 11357,
"preview": " Apache License\n Version 2.0, January 2004\n "
},
{
"path": "pypcode/docs/ghidra/NOTICE",
"chars": 2281,
"preview": "Ghidra\n\nThis product includes software developed at National Security Agency\n(https://www.nsa.gov)\n\nPortions of this pro"
},
{
"path": "pypcode/printing.py",
"chars": 7552,
"preview": "from __future__ import annotations\n\nfrom .pypcode_native import ( # pylint:disable=no-name-in-module\n Disassembly,\n "
},
{
"path": "pypcode/processors/6502/data/languages/6502.cspec",
"chars": 893,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"RAM\"/>\n </global>\n <stackpointer "
},
{
"path": "pypcode/processors/6502/data/languages/6502.ldefs",
"chars": 1049,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n \n <language processor=\"6502\"\n endian=\"littl"
},
{
"path": "pypcode/processors/6502/data/languages/6502.pspec",
"chars": 604,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <programcounter register=\"PC\"/>\n \n <default_symbols>\n <s"
},
{
"path": "pypcode/processors/6502/data/languages/6502.slaspec",
"chars": 8059,
"preview": "# sleigh specification file for MOS 6502\n\ndefine endian=little;\ndefine alignment=1;\n\ndefine space RAM type=ram_space"
},
{
"path": "pypcode/processors/6502/data/languages/65c02.slaspec",
"chars": 4419,
"preview": "@include \"6502.slaspec\"\n\ndefine token bitopbyte (8)\n bitop = (0,7)\n\n action = (7,7)\n bitinde"
},
{
"path": "pypcode/processors/6502/data/manuals/6502.idx",
"chars": 608,
"preview": "@mcs6500_family_programming_manual.pdf [MCS 6500 Microcomputer Family Programming Manual, January 1976]\nADC, 205\nAND, 20"
},
{
"path": "pypcode/processors/6502/data/manuals/65c02.idx",
"chars": 714,
"preview": "@wdc_65816_programming_manual.pdf [Programming the 65816 - Including the 6502, 65C02 and 65802, 2007]\nADC, 327\nAND, 328\n"
},
{
"path": "pypcode/processors/68000/data/languages/68000.cspec",
"chars": 2182,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n\t<absolute_max_alignment value=\"0\" />\n\t<ma"
},
{
"path": "pypcode/processors/68000/data/languages/68000.dwarf",
"chars": 356,
"preview": "<dwarf>\n\t<register_mappings>\n\t\t<register_mapping dwarf=\"0\" ghidra=\"D0\" auto_count=\"8\"/> <!-- D0..D7 -->\n\n\t\t<register_map"
},
{
"path": "pypcode/processors/68000/data/languages/68000.ldefs",
"chars": 3159,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n <language processor=\"68000\"\n endian=\"big\"\n "
},
{
"path": "pypcode/processors/68000/data/languages/68000.opinion",
"chars": 973,
"preview": "<opinions>\n <constraint loader=\"Executable and Linking Format (ELF)\" compilerSpecID=\"default\">\n <constraint pr"
},
{
"path": "pypcode/processors/68000/data/languages/68000.pspec",
"chars": 342,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"emulateInstructionStateModifi"
},
{
"path": "pypcode/processors/68000/data/languages/68000.sinc",
"chars": 157635,
"preview": "# SLA specification for Motorola 68000 series\n\ndefine endian=big;\ndefine alignment=2;\n\ndefine space ram type=ram_space s"
},
{
"path": "pypcode/processors/68000/data/languages/68000_register.cspec",
"chars": 3351,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n\t<absolute_max_alignment value=\"0\" />\n\t<ma"
},
{
"path": "pypcode/processors/68000/data/languages/68020.slaspec",
"chars": 22,
"preview": "@include \"68000.sinc\"\n"
},
{
"path": "pypcode/processors/68000/data/languages/68030.slaspec",
"chars": 41,
"preview": "@define MC68030 \"\"\n@include \"68000.sinc\"\n"
},
{
"path": "pypcode/processors/68000/data/languages/68040.slaspec",
"chars": 41,
"preview": "@define MC68040 \"\"\n@include \"68000.sinc\"\n"
},
{
"path": "pypcode/processors/68000/data/languages/coldfire.slaspec",
"chars": 95,
"preview": "# Motorola's Coldfire processor\n\n@define COLDFIRE \"\"\n@define MC68040 \"\"\n\n@include \"68000.sinc\"\n"
},
{
"path": "pypcode/processors/68000/data/manuals/68000.idx",
"chars": 2267,
"preview": "@M68000PRM.pdf [M68000 FAMILY Programmer's Reference Manual, 1992 (M68000PRM/AD REV.1)]\nABCD, 106\nADD, 108\nADDA, 111\nADD"
},
{
"path": "pypcode/processors/68000/data/patterns/68000_patterns.xml",
"chars": 2008,
"preview": "<patternlist>\n\n <patternpairs totalbits=\"32\" postbits=\"16\">\n <!-- Higher confidence patterns, after a return and mo"
},
{
"path": "pypcode/processors/68000/data/patterns/patternconstraints.xml",
"chars": 138,
"preview": "<patternconstraints>\n <language id=\"68000:BE:*:*\">\n <patternfile>68000_patterns.xml</patternfile>\n </language>\n</pa"
},
{
"path": "pypcode/processors/8048/data/languages/8048.cspec",
"chars": 802,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"CODE\"/>\n <range space=\"INTMEM\"/>"
},
{
"path": "pypcode/processors/8048/data/languages/8048.ldefs",
"chars": 520,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n \n <language processor=\"8048\"\n endian=\"littl"
},
{
"path": "pypcode/processors/8048/data/languages/8048.pspec",
"chars": 2319,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n\n <programcounter register=\"PC\"/>\n \n <default_symbols>\n\n "
},
{
"path": "pypcode/processors/8048/data/languages/8048.slaspec",
"chars": 12016,
"preview": "# sleigh specification file for Intel 8048\n#\n# The MCS-48 family can only handle a 4kB (12 bits) address space.\n# Howeve"
},
{
"path": "pypcode/processors/8048/data/manuals/8048.idx",
"chars": 498,
"preview": "@8048.pdf [MCS-48 Microcomputer User's Manual, February 1978]\nADD, 63\nADDC, 63\nANL, 64\nANLD, 65\nCALL, 66\nCLR, 67\nCPL, 67"
},
{
"path": "pypcode/processors/8051/data/languages/80251.cspec",
"chars": 1490,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"RAM\"/>\n <range space=\"SFR\"/>\n "
},
{
"path": "pypcode/processors/8051/data/languages/80251.pspec",
"chars": 47189,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n\n <programcounter register=\"PC\"/>\n \n <volatile outputop=\"wri"
},
{
"path": "pypcode/processors/8051/data/languages/80251.sinc",
"chars": 28072,
"preview": "# 80251 Instructions\n\n# NOTE! 80251 implementation is preliminary and has not tested !!\n\ndefine token srcDestByte (8)\n "
},
{
"path": "pypcode/processors/8051/data/languages/80251.slaspec",
"chars": 68,
"preview": "@define MCS251 \"\"\n\n@include \"8051_main.sinc\"\n\n@include \"80251.sinc\"\n"
},
{
"path": "pypcode/processors/8051/data/languages/80390.cspec",
"chars": 1748,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"CODE\"/>\n <range space=\"INTMEM\"/>"
},
{
"path": "pypcode/processors/8051/data/languages/80390.slaspec",
"chars": 47,
"preview": "@define MCS80390 \"\"\n\n@include \"8051_main.sinc\"\n"
},
{
"path": "pypcode/processors/8051/data/languages/8051.cspec",
"chars": 1932,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"CODE\"/>\n <range space=\"INTMEM\"/>"
},
{
"path": "pypcode/processors/8051/data/languages/8051.ldefs",
"chars": 1823,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n <language processor=\"8051\"\n endian=\"big\"\n "
},
{
"path": "pypcode/processors/8051/data/languages/8051.opinion",
"chars": 239,
"preview": "<opinions>\n <constraint loader=\"Object Module Format (OMF-51)\">\n <constraint compilerSpecID=\"default\">\n <"
},
{
"path": "pypcode/processors/8051/data/languages/8051.pspec",
"chars": 18035,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n\n <programcounter register=\"PC\"/>\n \n <volatile outputop=\"wri"
},
{
"path": "pypcode/processors/8051/data/languages/8051.slaspec",
"chars": 44,
"preview": "@define MCS51 \"\"\n\n@include \"8051_main.sinc\"\n"
},
{
"path": "pypcode/processors/8051/data/languages/8051_archimedes.cspec",
"chars": 3022,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n\t<global>\n\t\t<range space=\"CODE\"/>\n \t\t<range space=\"INTMEM\"/>\n "
},
{
"path": "pypcode/processors/8051/data/languages/8051_main.sinc",
"chars": 38245,
"preview": "# sleigh specification file for Intel 8051\n\n#@define BIT_OPS \"PCODEOPS\"\n#@define BIT_OPS \"SHIFTS\" \n@define BIT_OPS \"BIT_"
},
{
"path": "pypcode/processors/8051/data/languages/mx51.cspec",
"chars": 2140,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"RAM\"/>\n <range space=\"SFR\"/>\n "
},
{
"path": "pypcode/processors/8051/data/languages/mx51.pspec",
"chars": 18676,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n\n <programcounter register=\"PC\"/>\n \n <volatile outputop=\"wri"
},
{
"path": "pypcode/processors/8051/data/languages/mx51.sinc",
"chars": 16232,
"preview": "# Extended mx51 instructions live here, so as to avoid further\n# complicating the main 8051 file.\n\n# All have 0xa5 as pr"
},
{
"path": "pypcode/processors/8051/data/languages/mx51.slaspec",
"chars": 133,
"preview": "@define MX51 \"\"\n@define OMIT_RETADDR 1\n@define DUAL_DPTR \"\"\n@define DPS_REG_NUM 0xa2\n\n@include \"8051_main.sinc\"\n@include"
},
{
"path": "pypcode/processors/8051/data/languages/old/8051v1.lang",
"chars": 2009,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<language version=\"1\" endian=\"big\">\n <description>\n <id>8051:BE:16:defa"
},
{
"path": "pypcode/processors/8051/data/languages/old/8051v1.trans",
"chars": 329,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<language_translation>\n <from_language version=\"1\">8051:BE:16:default</from_la"
},
{
"path": "pypcode/processors/8051/data/manuals/8051.idx",
"chars": 702,
"preview": "@8xc251sx_um.pdf [8XC251SA, 8XC251SB,8XC251SP, 8XC251SQ Embedded Microcontroller User�s Manual, May 1996]\nACALL, 278\nADD"
},
{
"path": "pypcode/processors/8085/data/languages/8085.cspec",
"chars": 697,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"ram\"/>\n </global>\n <stackpointer "
},
{
"path": "pypcode/processors/8085/data/languages/8085.ldefs",
"chars": 447,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n <language processor=\"8085\"\n endian=\"little\"\n"
},
{
"path": "pypcode/processors/8085/data/languages/8085.pspec",
"chars": 1278,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <programcounter register=\"PC\"/>\n <register_data>\n <regist"
},
{
"path": "pypcode/processors/8085/data/languages/8085.slaspec",
"chars": 10404,
"preview": "# sleigh specification file for Intel 8085\n\ndefine endian=little;\ndefine alignment=1;\n\ndefine space ram type=ram_sp"
},
{
"path": "pypcode/processors/AARCH64/data/aarch64-pltThunks.xml",
"chars": 836,
"preview": "<patternlist>\n <!-- \n \tThis file contains AARCH64 ELF PLT Thunk patterns.\n \tAll patterns must end with \"br x17\" instr"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64.cspec",
"chars": 8276,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n <absolute_max_alignment value=\"0\" />\n"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64.dwarf",
"chars": 309,
"preview": "<dwarf>\n\t<register_mappings>\n\t\t<register_mapping dwarf=\"0\" ghidra=\"x0\" auto_count=\"31\"/> <!-- x0..x30 -->\n\t\t<register_ma"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64.ldefs",
"chars": 3682,
"preview": "<?xml version=\"1.1\" encoding=\"UTF-8\"?>\n<language_definitions>\n <language processor=\"AARCH64\"\n endian=\"littl"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64.opinion",
"chars": 1896,
"preview": "<opinions>\n <constraint loader=\"Executable and Linking Format (ELF)\" compilerSpecID=\"default\">\n <constraint pr"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64.pspec",
"chars": 5512,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"addressesDoNotAppearDirectlyI"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64.slaspec",
"chars": 68,
"preview": "\n@define DATA_ENDIAN \"little\"\n\n@include \"AARCH64instructions.sinc\"\n\n"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64BE.slaspec",
"chars": 65,
"preview": "\n@define DATA_ENDIAN \"big\"\n\n@include \"AARCH64instructions.sinc\"\n\n"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_AMXext.sinc",
"chars": 4364,
"preview": "#\n# Apple AARCH64 extended matrix instructions\n# Contents based on evolving information published on Web\n#\n#\n\ndefine pco"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_AppleSilicon.slaspec",
"chars": 99,
"preview": "\n@define DATA_ENDIAN \"little\"\n\n@include \"AARCH64instructions.sinc\"\n@include \"AARCH64_AMXext.sinc\"\n\n"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_apple.cspec",
"chars": 8548,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n <absolute_max_alignment value=\"0\" />\n"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_base_PACoptions.sinc",
"chars": 10297,
"preview": "autda__PACpart: \"show_and_clobber\" is ShowPAC=1 & PAC_clobber=1 & Rn_GPR64xsp & Rd_GPR64 { Rd_GPR64 = AuthDA(Rd_GPR64, R"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_golang.cspec",
"chars": 10038,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n\t<data_organization>\n\t\t<absolute_max_alignment value=\"0\" />\n\t\t<m"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_golang.register.info",
"chars": 854,
"preview": "<golang>\n\t<!-- see https://github.com/golang/go/blob/master/src/internal/abi/abi_arm64.go -->\n\t<register_info versions=\""
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_ilp32.cspec",
"chars": 6359,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n <absolute_max_alignment value=\"0\" />\n"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_swift.cspec",
"chars": 12239,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n <absolute_max_alignment value=\"0\" />\n"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64_win.cspec",
"chars": 9510,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <!-- Copied from AARCH.cspec and modified... \n See: https://d"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64base.sinc",
"chars": 361249,
"preview": "# C6.2.1 ADC page C6-1144 line 67905 MATCH x1a000000/mask=x7fe0fc00\n# C6.2.2 ADCS page C6-1146 line 67991 MATCH x3a00000"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64instructions.sinc",
"chars": 141727,
"preview": "# Specification for the AARCH64 64-bit ARM instruction set\n#\n# See \"ARM Architecture Reference Manual ARMv8, for ARMv8-A"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64ldst.sinc",
"chars": 396489,
"preview": "# C7.2.162 LD1 (multiple structures) page C7-1359 line 78995 KEEPWITH\n# INFO This file automatically generated by andre "
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64neon.sinc",
"chars": 1448616,
"preview": "# C7.2.1 ABS page C7-1009 line 58362 KEEPWITH\n#\n# The semantics in this file are auto-generated with armit.py script\n# i"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AARCH64sve.sinc",
"chars": 313658,
"preview": "# INFO This file automatically generated by andre on Mon Apr 30 14:51:39 2018\n# INFO Direct edits to this file may be lo"
},
{
"path": "pypcode/processors/AARCH64/data/languages/AppleSilicon.ldefs",
"chars": 1001,
"preview": "<?xml version=\"1.1\" encoding=\"UTF-8\"?>\n<language_definitions>\n <language processor=\"AARCH64\"\n endian=\"little"
},
{
"path": "pypcode/processors/AARCH64/data/manuals/AARCH64.idx",
"chars": 7698,
"preview": "@DDI0487H_a_a-profile_architecture_reference_manual.pdf[ARM Architecture Reference Manual - ARM A-profile architecture, "
},
{
"path": "pypcode/processors/AARCH64/data/patterns/AARCH64_LE_patterns.xml",
"chars": 4601,
"preview": "<patternlist> \n <patternpairs totalbits=\"32\" postbits=\"16\"> <!-- AARCH64 -->\n <prepatterns>\n <data>0xc0 0x03 "
},
{
"path": "pypcode/processors/AARCH64/data/patterns/AARCH64_win_patterns.xml",
"chars": 1490,
"preview": "<patternlist>\n \n <!-- Special functions with side-effects -->\n <!-- -->\n \n <pat"
},
{
"path": "pypcode/processors/AARCH64/data/patterns/patternconstraints.xml",
"chars": 145,
"preview": "<patternconstraints>\n <language id=\"AARCH64:*:64:*\">\n <patternfile>AARCH64_LE_patterns.xml</patternfile>\n </languag"
},
{
"path": "pypcode/processors/AARCH64/data/patterns/prepatternconstraints.xml",
"chars": 192,
"preview": "<patternconstraints>\n <language id=\"AARCH64:LE:64:*\">\n <compiler id=\"windows\">\n <patternfile>AARCH64_win_patter"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM.cspec",
"chars": 13580,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <!--\n \tAssumes Procedure Call Standard for the ARM Architectu"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM.dwarf",
"chars": 787,
"preview": "<dwarf>\n\t<register_mappings>\n\t\t<register_mapping dwarf=\"0\" ghidra=\"r0\" auto_count=\"13\"/> <!-- r0..r12 -->\n\t\t<register_ma"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM.gdis",
"chars": 1896,
"preview": "<!-- \n This file determines the disassembler options sent to the GNU external disassembler.\n You can see which o"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM.ldefs",
"chars": 19966,
"preview": "<?xml version=\"1.1\" encoding=\"UTF-8\"?>\n<language_definitions>\n\n <language processor=\"ARM\"\n endian=\"little\"\n "
},
{
"path": "pypcode/processors/ARM/data/languages/ARM.opinion",
"chars": 4411,
"preview": "<opinions>\n <!--\n NOTE: secondary key constraints can be matched at the bit level or as a hex value (if the\n "
},
{
"path": "pypcode/processors/ARM/data/languages/ARM.sinc",
"chars": 12117,
"preview": "# Specification for the ARM Version 4, 4T, 5, 5T, 5E\n# The following boolean defines control specific support: T_VARIANT"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM4_be.slaspec",
"chars": 44,
"preview": "\n@define ENDIAN \"big\"\n\n@include \"ARM.sinc\"\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM4_le.slaspec",
"chars": 47,
"preview": "\n@define ENDIAN \"little\"\n\n@include \"ARM.sinc\"\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM4t_be.slaspec",
"chars": 65,
"preview": "\n@define ENDIAN \"big\"\n@define T_VARIANT \"\"\n\n@include \"ARM.sinc\"\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM4t_le.slaspec",
"chars": 68,
"preview": "\n@define ENDIAN \"little\"\n@define T_VARIANT \"\"\n\n@include \"ARM.sinc\"\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM5_be.slaspec",
"chars": 87,
"preview": "\n@define ENDIAN \"big\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n\n@include \"ARM.sinc\"\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM5_le.slaspec",
"chars": 90,
"preview": "\n@define ENDIAN \"little\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n\n@include \"ARM.sinc\"\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM5t_be.slaspec",
"chars": 109,
"preview": "\n@define ENDIAN \"big\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n\n@include \"ARM.sinc\"\n\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM5t_le.slaspec",
"chars": 111,
"preview": "\n@define ENDIAN \"little\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n\n@include \"ARM.sinc\"\n\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM6_be.slaspec",
"chars": 191,
"preview": "\n@define ENDIAN \"big\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VERSI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM6_le.slaspec",
"chars": 194,
"preview": "\n@define ENDIAN \"little\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VE"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM7_be.slaspec",
"chars": 267,
"preview": "\n@define ENDIAN \"big\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VERSI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM7_le.slaspec",
"chars": 270,
"preview": "\n@define ENDIAN \"little\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VE"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM8_be.slaspec",
"chars": 288,
"preview": "\n@define ENDIAN \"big\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VERSI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM8_le.slaspec",
"chars": 291,
"preview": "\n@define ENDIAN \"little\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VE"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM8m_be.slaspec",
"chars": 344,
"preview": "\n@define ENDIAN \"big\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VERSI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM8m_le.slaspec",
"chars": 347,
"preview": "\n@define ENDIAN \"little\"\n@define T_VARIANT \"\"\n@define VERSION_5 \"\"\n@define VERSION_5E \"\"\n@define VERSION_6 \"\"\n@define VE"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMCortex.pspec",
"chars": 2263,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"addressesDoNotAppearDirectlyI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMTHUMBinstructions.sinc",
"chars": 177783,
"preview": "# Specification for the THUMB Version 2\n# This closely follows\n# \"Architecture Reference Manual\" Second Edition Edite"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM_CDE.sinc",
"chars": 8970,
"preview": "@if defined(CDE)\n# ARMv8-M Custom Datapath Extension\n\nacc: \"a\" is thc1212=1 { local tmp:1 = 1; export *[const]:1 tmp; }\n"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM_apcs.cspec",
"chars": 8370,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <!--\n \tAssumes compilation with the deprecated ARM APCS stand"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM_v45.cspec",
"chars": 5986,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<!-- \n This arm cspec split from the main arm.cspec.\n The difference is no flo"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM_v45.pspec",
"chars": 1863,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"addressesDoNotAppearDirectlyI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARM_win.cspec",
"chars": 7962,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <!-- Copied from ARM.cspec and modified... See: https://docs.m"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMinstructions.sinc",
"chars": 176765,
"preview": "# Specification for the ARM Version 4, 4T, 5, 5T, 5E\n# The following boolean defines control specific support: T_VARIANT"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMneon.dwarf",
"chars": 944,
"preview": "<dwarf>\n\t<register_mappings>\n\t\t<register_mapping dwarf=\"0\" ghidra=\"r0\" auto_count=\"13\"/> <!-- r0..r12 -->\n\t\t<register_ma"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMneon.sinc",
"chars": 322100,
"preview": "# Advanced SIMD support / NEON\n\n# WARNING NOTE: Be very careful taking a subpiece or truncating a register with :# or (#"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMt.pspec",
"chars": 3252,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"addressesDoNotAppearDirectlyI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMtTHUMB.pspec",
"chars": 3359,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <!-- THIS PSPEC IS A COPY OF ARMt.pspec AND ONLY DIFFERS WITH"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMt_v45.pspec",
"chars": 2078,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"addressesDoNotAppearDirectlyI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMt_v6.pspec",
"chars": 2147,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"addressesDoNotAppearDirectlyI"
},
{
"path": "pypcode/processors/ARM/data/languages/ARMv8.sinc",
"chars": 56045,
"preview": "\n# This macro is always defined in this file, but the ifdef may be\n# useful if it is moved to ARMinstructions.sinc.\n\ncrc"
},
{
"path": "pypcode/processors/ARM/data/languages/old/ARMv5.lang",
"chars": 3246,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<language version=\"1\" endian=\"little\">\n <description>\n <id>ARM:LE:32:DE"
},
{
"path": "pypcode/processors/ARM/data/languages/old/ARMv5.trans",
"chars": 203,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<language_translation>\n <from_language version=\"1\">Sleigh-ARMv5</from_language"
},
{
"path": "pypcode/processors/ARM/data/languages/old/THUMBv2.lang",
"chars": 2822,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<language version=\"1\" endian=\"little\">\n <description>\n <id>ARM:LE:32:DE"
},
{
"path": "pypcode/processors/ARM/data/languages/old/THUMBv2.trans",
"chars": 314,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<language_translation>\n <from_language version=\"1\">Sleigh-THUMBv2</from_langua"
},
{
"path": "pypcode/processors/ARM/data/manuals/ARM.idx",
"chars": 4864,
"preview": "@DDI0487H_a_a-profile_architecture_reference_manual.pdf[ARM Architecture Reference Manual - ARM A-profile architecture, "
},
{
"path": "pypcode/processors/ARM/data/patterns/ARM_BE_patterns.xml",
"chars": 15442,
"preview": "<patternlist>\n <patternpairs totalbits=\"32\" postbits=\"16\"> <!-- 16 bit Thumb -->\n <prepatterns>\n <data>0xbd ..."
},
{
"path": "pypcode/processors/ARM/data/patterns/ARM_LE_patterns.xml",
"chars": 16969,
"preview": "<patternlist>\n <patternpairs totalbits=\"32\" postbits=\"16\"> <!-- 16 bit Thumb -->\n <prepatterns>\n <data>.......0"
},
{
"path": "pypcode/processors/ARM/data/patterns/ARM_switch_patterns.xml",
"chars": 4503,
"preview": "<patternlist>\n \n <!-- Special functions with side-effects -->\n <!-- -->\n \n <pat"
},
{
"path": "pypcode/processors/ARM/data/patterns/patternconstraints.xml",
"chars": 341,
"preview": "<patternconstraints>\n <language id=\"ARM:LE:32:*\">\n <patternfile>ARM_LE_patterns.xml</patternfile>\n </language>\n \n "
},
{
"path": "pypcode/processors/ARM/data/patterns/prepatternconstraints.xml",
"chars": 140,
"preview": "<patternconstraints>\n <language id=\"ARM:*:32:*\">\n <patternfile>ARM_switch_patterns.xml</patternfile>\n </language>\n<"
},
{
"path": "pypcode/processors/Atmel/data/languages/atmega256.pspec",
"chars": 19072,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n\n <programcounter register=\"PC\"/> \n <data_space space=\"mem\"/>"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32.opinion",
"chars": 309,
"preview": "<opinions>\n <constraint loader=\"Executable and Linking Format (ELF)\" compilerSpecID=\"default\">\n <constraint pr"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a.cspec",
"chars": 1474,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <global>\n <range space=\"RAM\"/>\n </global>\n <stackpointer "
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a.ldefs",
"chars": 566,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n <language processor=\"AVR32\"\n endian=\"big\"\n "
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a.pspec",
"chars": 214,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"assemblyRating:avr32:BE:32:de"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a.slaspec",
"chars": 21461,
"preview": "define endian=big;\ndefine alignment=2;\n\ndefine space RAM type=ram_space size=4 default;\n\ndefine space register type=regi"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_arithmetic_operations.sinc",
"chars": 20959,
"preview": "#---------------------------------------------------------------------\n# 8.3.2 Arithmetic Operations\n#------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_autogen.sinc",
"chars": 43214,
"preview": "define token gen_instr1(16)\n g_op13_3 = (13,15)\n g_op12_4 = (12,15)\n g_regsel11_1 = (11,11)\n g_op11_5 = (11,"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_bit_operations.sinc",
"chars": 9879,
"preview": "#---------------------------------------------------------------------\n# 8.3.6 Bit Operations\n#-------------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_coprocessor_interface.sinc",
"chars": 19876,
"preview": "#---------------------------------------------------------------------\n# Coprocessor Interface\n#------------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_data_transfer.sinc",
"chars": 40727,
"preview": "#---------------------------------------------------------------------\n# 8.3.9 Data Transfer\n#--------------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_dsp_operations.sinc",
"chars": 43298,
"preview": "#---------------------------------------------------------------------\n# 8.3.4 DSP Operations\n#-------------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_dsp_operations2.sinc",
"chars": 10829,
"preview": "#---------------------------------------------------------------------\n# 8.3.4 DSP Operations\n#\n# Note: all DSP operati"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_instruction_flow.sinc",
"chars": 7164,
"preview": "#---------------------------------------------------------------------\n# 8.3.8 INSTRUCTION FLOW\n#-----------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_logic_operations.sinc",
"chars": 14048,
"preview": "#---------------------------------------------------------------------\n# 8.3.5 Logic Operations\n#-----------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_multiplication_operations.sinc",
"chars": 5679,
"preview": "#---------------------------------------------------------------------\n# 8.3.3 Multiplication Operations\n#--------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_shift_operations.sinc",
"chars": 4417,
"preview": "#---------------------------------------------------------------------\n# 8.3.7 Shift Operations\n#-----------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_simd_operations.sinc",
"chars": 18819,
"preview": "\nmacro satub(RES) {\n\tRES = (zext(RES > 0x00FF) * 0x00FF) + (zext(RES < 0x0100) * RES);\n}\n\nmacro satsb(RES) {\n\tRES = (0x0"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr32a_system_control.sinc",
"chars": 2522,
"preview": "#---------------------------------------------------------------------\n# 8.3.10 System/Control\n#------------------------"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8.ldefs",
"chars": 2403,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n\n <language processor=\"AVR8\"\n endian=\"little\""
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8.opinion",
"chars": 674,
"preview": "<opinions>\n <constraint loader=\"Executable and Linking Format (ELF)\" compilerSpecID=\"gcc\">\n <constraint primar"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8.pspec",
"chars": 7667,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <properties>\n <property key=\"assemblyRating:avr8:LE:16:ext"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8.sinc",
"chars": 36286,
"preview": "# sleigh specification for the avr8\n#\n# Currently designed for ATMega64 in non-ATmel103 configuration\n# - 0x20-0xff as "
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8.slaspec",
"chars": 110,
"preview": "# AVR8 with 16-bit addressable code space\n\n@define PCBYTESIZE \"2\"\n@define HASEIND \"0\"\n \n@include \"avr8.sinc\"\n\n"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8e.slaspec",
"chars": 127,
"preview": "# AVR8 with 16-bit addressable code space and support for \n\n@define PCBYTESIZE \"2\"\n@define HASEIND \"1\"\n \n@include \"avr8."
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8egcc.cspec",
"chars": 5116,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n <absolute_max_alignment value=\"1\" />\n"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8eind.slaspec",
"chars": 110,
"preview": "# AVR8 with 22-bit addressable code space\n\n@define PCBYTESIZE \"3\"\n@define HASEIND \"1\"\n \n@include \"avr8.sinc\"\n\n"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8gcc.cspec",
"chars": 7825,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n <absolute_max_alignment value=\"1\" />\n"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8iarV1.cspec",
"chars": 1585,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<!-- Stock IAR Embedded workbench compiler as described in Atmel doc AVR034. --"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8imgCraftV8.cspec",
"chars": 1194,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<!-- ImageCraft AVR C compiler. Version 8.0 examined. Use R20-R23\n option not"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8xmega.pspec",
"chars": 73107,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n\n <programcounter register=\"PC\"/> \n <data_space space=\"mem\"/>"
},
{
"path": "pypcode/processors/Atmel/data/languages/avr8xmega.slaspec",
"chars": 186,
"preview": "# AVR8 with 22-bit addressable code space\n\n@define PCBYTESIZE \"3\"\n@define HASEIND \"1\"\n\n@define IO_START \"0\"\n@define REGI"
},
{
"path": "pypcode/processors/Atmel/data/manuals/AVR32.idx",
"chars": 6971,
"preview": "@doc32000.pdf [Atmel AVR32 Architecture Document - 04/2011]\nABS,\t\t123\nACALL,\t\t124\nACR,\t\t125\nADC,\t\t126\nADD,\t\t127\nADD{EQ},"
},
{
"path": "pypcode/processors/Atmel/data/manuals/AVR8.idx",
"chars": 1943,
"preview": "@atmel-0856-avr-instruction-set-manual.pdf [Atmel AVR Instruction Set Manual, 11/2016 (Rev. 0856L)]\nADC, 30\nADD, "
},
{
"path": "pypcode/processors/Atmel/data/patterns/AVR8_patterns.xml",
"chars": 1460,
"preview": "<patternlist>\n\n <patternpairs totalbits=\"32\" postbits=\"16\">\n <prepatterns>\n <data>0x08 0x95</data> <!-- ret -->"
},
{
"path": "pypcode/processors/Atmel/data/patterns/patternconstraints.xml",
"chars": 135,
"preview": "<patternconstraints>\n <language id=\"avr8:*:*:*\">\n <patternfile>AVR8_patterns.xml</patternfile>\n </language>\n</patte"
},
{
"path": "pypcode/processors/BPF/data/languages/BPF.cspec",
"chars": 1322,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<compiler_spec>\n <data_organization> \n <absolute_max_alignment value=\"0\" />\n"
},
{
"path": "pypcode/processors/BPF/data/languages/BPF.ldefs",
"chars": 471,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<language_definitions>\n <language processor=\"BPF\"\n endian=\"little\"\n "
},
{
"path": "pypcode/processors/BPF/data/languages/BPF.pspec",
"chars": 384,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<processor_spec>\n\t <programcounter register=\"PC\"/>\n <default_memory_blocks>\n "
},
{
"path": "pypcode/processors/BPF/data/languages/BPF.sinc",
"chars": 8131,
"preview": "###############################################################################\n# BPF Processor Specification for Ghidra"
},
{
"path": "pypcode/processors/BPF/data/languages/BPF_le.slaspec",
"chars": 42,
"preview": "define endian=little;\n\n@include \"BPF.sinc\""
},
{
"path": "pypcode/processors/CP1600/data/languages/CP1600.cspec",
"chars": 1156,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<compiler_spec>\n <data_organization>\n <pointer_size value=\"2\" />\n </data_or"
},
{
"path": "pypcode/processors/CP1600/data/languages/CP1600.ldefs",
"chars": 472,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<language_definitions>\n <language processor=\"CP1600\"\n endian=\"big\"\n"
},
{
"path": "pypcode/processors/CP1600/data/languages/CP1600.opinion",
"chars": 23,
"preview": "<opinions>\n</opinions>\n"
},
{
"path": "pypcode/processors/CP1600/data/languages/CP1600.pspec",
"chars": 109,
"preview": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n\n<processor_spec>\n <programcounter register=\"R7\"/>\n</processor_spec>\n"
},
{
"path": "pypcode/processors/CP1600/data/languages/CP1600.slaspec",
"chars": 17494,
"preview": "define endian=big;\ndefine alignment=2;\ndefine space ram type=ram_space wordsize=2 size=2 default;\ndefine space register "
}
]
// ... and 730 more files (download for full content)
About this extraction
This page contains the full source code of the angr/pypcode GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 930 files (14.9 MB), approximately 4.0M tokens, and a symbol index with 2096 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.
Extracted by GitExtract — free GitHub repo to text converter for AI. Built by Nikandr Surkov.