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Repository: cambridgehackers/connectal
Branch: master
Commit: f182656bfe21
Files: 1351
Total size: 7.9 MB

Directory structure:
gitextract_q6vy71mg/

├── .gitignore
├── .travis.yml
├── LICENSE.txt
├── Makefile
├── Makefile.connectal
├── Makefile.version
├── README.md
├── boardinfo/
│   ├── ac701.json
│   ├── ac701_untethered.json
│   ├── ac701g2.json
│   ├── asic.json
│   ├── awsf1.json
│   ├── bluesim.json
│   ├── cvc.json
│   ├── de5.json
│   ├── htg4.json
│   ├── kc160g2.json
│   ├── kc705.json
│   ├── kc705_untethered.json
│   ├── kc705g1.json
│   ├── kc705g2.json
│   ├── kcu105.json
│   ├── miniitx100.json
│   ├── ncverilog.json
│   ├── nfsume.json
│   ├── parallella.json
│   ├── ultra96.json
│   ├── v2000t.json
│   ├── vc707.json
│   ├── vc707g2.json
│   ├── vc709.json
│   ├── vcs.json
│   ├── vcu108.json
│   ├── vcu118.json
│   ├── verilator.json
│   ├── vsim.json
│   ├── xsim.json
│   ├── zc702.json
│   ├── zc706.json
│   ├── zc706_ubuntu.json
│   ├── zcu102.json
│   ├── zcu111.json
│   ├── zedboard.json
│   ├── zedboard_ubuntu.json
│   ├── zybo.json
│   └── zynq100.json
├── bsv/
│   ├── Adapter.bsv
│   ├── AddressGenerator.bsv
│   ├── AsicTop.bsv
│   ├── AvalonBits.bsv
│   ├── AvalonDdr3Controller.bsv
│   ├── AvalonDma.bsv
│   ├── AvalonGather.bsv
│   ├── AvalonMasterSlave.bsv
│   ├── AvalonSplitter.bsv
│   ├── AwsF1Top.bsv
│   ├── Axi4MasterSlave.bsv
│   ├── AxiBits.bsv
│   ├── AxiDdr3Controller.bsv
│   ├── AxiDma.bsv
│   ├── AxiGather.bsv
│   ├── AxiMasterSlave.bsv
│   ├── AxiStream.bsv
│   ├── BpiFlash.bsv
│   ├── BramMux.bsv
│   ├── CnocPortal.bsv
│   ├── ConnectableWithTrace.bsv
│   ├── ConnectalAlteraCells.bsv
│   ├── ConnectalBram.bsv
│   ├── ConnectalBramFifo.bsv
│   ├── ConnectalClocks.bsv
│   ├── ConnectalCompletionBuffer.bsv
│   ├── ConnectalConfig.bsv
│   ├── ConnectalEHR.bsv
│   ├── ConnectalFIFO.bsv
│   ├── ConnectalMMU.bsv
│   ├── ConnectalMemTypes.bsv
│   ├── ConnectalMemUtils.bsv
│   ├── ConnectalMemory.bsv
│   ├── ConnectalMimo.bsv
│   ├── ConnectalPrelude.bsv
│   ├── ConnectalXilinxCells.bsv
│   ├── CtrlMux.bsv
│   ├── DisplayInd.bsv
│   ├── Dsp48E1.bsv
│   ├── GearboxGetPut.bsv
│   ├── GetPutM.bsv
│   ├── GetPutWithClocks.bsv
│   ├── HostInterface.bsv
│   ├── LinkerLib.bsv
│   ├── MIFO.bsv
│   ├── MemPipe.bsv
│   ├── MemReadEngine.bsv
│   ├── MemServer.bsv
│   ├── MemServerInternal.bsv
│   ├── MemServerPortal.bsv
│   ├── MemToPcie.bsv
│   ├── MemWriteEngine.bsv
│   ├── OldEHR.bsv
│   ├── PS4LIB.bsv
│   ├── PS5LIB.bsv
│   ├── PS7LIB.bsv
│   ├── PS7Trace.bsv
│   ├── PS8LIB.bsv
│   ├── ParallellaTop.bsv
│   ├── Pcie1EndpointX7.bsv
│   ├── Pcie2EndpointX7.bsv
│   ├── Pcie3EndpointX7.bsv
│   ├── Pcie3RootPortX7.bsv
│   ├── PcieCsr.bsv
│   ├── PcieEndpointS5.bsv
│   ├── PcieEndpointS5Test.bsv
│   ├── PcieGearbox.bsv
│   ├── PcieHost.bsv
│   ├── PcieRootDevice.bsv
│   ├── PcieRootPortX7.bsv
│   ├── PcieSplitter.bsv
│   ├── PcieStateChanges.bsv
│   ├── PcieToMem.bsv
│   ├── PcieTop.bsv
│   ├── PcieTracer.bsv
│   ├── PhysMemSlaveFromBram.bsv
│   ├── Pipe.bsv
│   ├── Platform.bsv
│   ├── Portal.bsv
│   ├── SimDma.bsv
│   ├── SimLink.bsv
│   ├── SyncAxisFifo32x8.bsv
│   ├── SyncBits.bsv
│   ├── Trace.bsv
│   ├── TraceMemClient.bsv
│   ├── UntetheredTop.bsv
│   ├── XsimIF.bsv
│   ├── XsimTop.bsv
│   ├── ZynqTop.bsv
│   └── ZynqUltraTop.bsv
├── constraints/
│   ├── altera/
│   │   ├── de5.qsf
│   │   ├── de5.sdc
│   │   ├── htg4.qsf
│   │   └── htg4.sdc
│   └── xilinx/
│       ├── Readme.md
│       ├── ac701.xdc
│       ├── awsf1.xdc
│       ├── bluesim.xdc
│       ├── bluesim_pcie.xdc
│       ├── cdc.tcl
│       ├── kc160g2.xdc
│       ├── kc705-3.0.xdc
│       ├── kc705-ddr3.prj
│       ├── kc705.xdc
│       ├── kc705g2.xdc
│       ├── kcu105.xdc
│       ├── miniitx100-axiddr3.prj
│       ├── miniitx100.xdc
│       ├── nfsume-axiddr3.prj
│       ├── nfsume.xdc
│       ├── ok/
│       │   ├── zc7z010clg400.xdc
│       │   ├── zc7z020clg400.xdc
│       │   ├── zc7z020clg484.xdc
│       │   ├── zc7z045ffg900.xdc
│       │   └── zc7z100ffg900.xdc
│       ├── parallella.xdc
│       ├── pcie-clocks.xdc
│       ├── v2000t.xdc
│       ├── vc707-axiddr3.prj
│       ├── vc707-portal-pblock.xdc
│       ├── vc707.xdc
│       ├── vc707_aurora.xdc
│       ├── vc707_ddr3.xdc
│       ├── vc707_ddr3_pins.xdc
│       ├── vc707g2-axiddr3.prj
│       ├── vc707g2.xdc
│       ├── vc709.xdc
│       ├── vcu108.xdc
│       ├── vcu118.xdc
│       ├── verilator.xdc
│       ├── xc7z010clg400.xdc
│       ├── xc7z045ffg900.xdc
│       ├── xc7z100ffg900.xdc
│       ├── zc706-axiddr3.prj
│       ├── zc706.xdc
│       ├── zc706_pl_ddr3_pins.xdc
│       ├── zc7z020clg400.xdc
│       ├── zc7z020clg484.xdc
│       ├── zcu102.xdc
│       ├── zcu111.xdc
│       ├── zybo.xdc
│       └── zynq100.xdc
├── contrib/
│   ├── bluescope/
│   │   ├── Makefile
│   │   ├── Memcpy.bsv
│   │   ├── Top.bsv
│   │   └── testbluescope.cpp
│   ├── bluescopeevent/
│   │   ├── Makefile
│   │   ├── SignalGen.bsv
│   │   ├── Top.bsv
│   │   └── testbluescopeevent.cpp
│   ├── bluescopeeventpio/
│   │   ├── Makefile
│   │   ├── SignalGen.bsv
│   │   ├── Top.bsv
│   │   └── testbluescopeeventpio.cpp
│   ├── channelselect/
│   │   ├── ChannelSelect.bsv
│   │   ├── ChannelSelectTest.bsv
│   │   ├── ChannelSelectTestInterfaces.bsv
│   │   ├── DDS.bsv
│   │   ├── DDSTest.bsv
│   │   ├── DDSTestInterfaces.bsv
│   │   ├── FPCMult.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── SDRTypes.bsv
│   │   ├── Top.bsv
│   │   ├── sinetable.c
│   │   └── testchannelselecttest.cpp
│   ├── fib/
│   │   ├── Fib.bsv
│   │   ├── FibNarrow.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   └── testfib.cpp
│   ├── flowcontrol/
│   │   ├── Makefile
│   │   ├── Sink.bsv
│   │   ├── Top.bsv
│   │   └── test.cpp
│   ├── importverilog/
│   │   ├── .gitignore
│   │   ├── Main.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── regfile.v
│   │   ├── regfile_tb.v
│   │   └── testmain.cpp
│   ├── maxcommonsubseq/
│   │   ├── HirschA.bsv
│   │   ├── HirschB.bsv
│   │   ├── HirschC.bsv
│   │   ├── MCSAlgorithm.bsv
│   │   ├── Makefile
│   │   ├── Maxcommonsubseq.bsv
│   │   ├── Top.bsv
│   │   ├── hirschberg.py
│   │   └── testmaxcommonsubseq.cpp
│   ├── noc/
│   │   ├── Makefile
│   │   ├── Noc.bsv
│   │   ├── NocNode.bsv
│   │   ├── Readme.md
│   │   ├── Top.bsv
│   │   └── testnoc.cpp
│   ├── noc2d/
│   │   ├── Makefile
│   │   ├── Noc2d.bsv
│   │   ├── NocNode.bsv
│   │   ├── Readme.md
│   │   ├── Top.bsv
│   │   └── testnoc2d.cpp
│   ├── parallella/
│   │   ├── ELink.bsv
│   │   ├── Makefile
│   │   ├── PParallellaLIB.bsv
│   │   ├── ParallellaLib.bsv
│   │   ├── ParallellaLibDefs.bsv
│   │   ├── Top.bsv
│   │   ├── notes.txt
│   │   ├── parallella.v
│   │   └── testmain.cpp
│   ├── perf/
│   │   ├── Makefile
│   │   ├── Perf.bsv
│   │   ├── Top.bsv
│   │   └── testperf.cpp
│   ├── pipe_mul/
│   │   ├── Makefile
│   │   ├── PipeMulTB.bsv
│   │   ├── Top.bsv
│   │   └── testpipe_mul.cpp
│   ├── pipe_mul2/
│   │   ├── Makefile
│   │   ├── PipeMulTB.bsv
│   │   ├── Top.bsv
│   │   └── testpipe_mul.cpp
│   ├── portalperf/
│   │   ├── Makefile
│   │   ├── PortalPerf.bsv
│   │   ├── Repeat.bsv
│   │   ├── Top.bsv
│   │   └── testportalperf.cpp
│   ├── ptest/
│   │   ├── Makefile
│   │   ├── PTest.bsv
│   │   ├── PTest.bsv.bad
│   │   └── PTest.bsv.good
│   ├── serialconfig/
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── Serialconfig.bsv
│   │   └── testserialconfig.cpp
│   ├── smithwaterman/
│   │   ├── GotohB.bsv
│   │   ├── GotohC.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── Smithwaterman.bsv
│   │   ├── Top.bsv
│   │   ├── sw.py
│   │   └── testsmithwaterman.cpp
│   └── splice/
│       ├── Makefile
│       ├── Splice.bsv
│       ├── Top.bsv
│       └── testsplice.cpp
├── cpp/
│   ├── BsimDma.cpp
│   ├── DmaBuffer.cpp
│   ├── DmaBuffer.h
│   ├── MMUServer.h
│   ├── TlpReplay.cpp
│   ├── XsimTop.cpp
│   ├── XsimTop.h
│   ├── bluesim_main.cxx
│   ├── bsim_relay.c
│   ├── dmaManager.c
│   ├── dmaManager.h
│   ├── dmaSendFd.h
│   ├── kernel_module.c
│   ├── manualMMUIndication.h
│   ├── monkit.h
│   ├── platformMemory.cpp
│   ├── poller.cpp
│   ├── portal.c
│   ├── portal.h
│   ├── portalJson.c
│   ├── portalKernel.h
│   ├── portalPrintf.c
│   ├── portalPython.cpp
│   ├── runpython.cpp
│   ├── sock_utils.c
│   ├── sock_utils.h
│   ├── timer.c
│   ├── transportHardware.c
│   ├── transportPortal.c
│   ├── transportSerial.c
│   ├── transportShared.c
│   ├── transportSocket.c
│   ├── transportWebSocket.c
│   ├── transportXsim.c
│   └── verilatortop.cpp
├── debian/
│   ├── changelog
│   ├── compat
│   ├── connectal-doc.docs
│   ├── connectal-doc.install
│   ├── connectal-zynqdrivers.install
│   ├── connectal.dkms
│   ├── connectal.install
│   ├── connectal.udev
│   ├── control
│   ├── copyright
│   ├── docs
│   └── rules
├── doc/
│   ├── Makefile
│   ├── ReadmePartialReconfiguration.md
│   ├── SmithWaterman.md
│   ├── axi_tracing.md
│   ├── centos.md
│   ├── generated/
│   │   └── html/
│   │       └── portal.html
│   ├── ifdef.md
│   ├── library/
│   │   ├── Makefile
│   │   └── source/
│   │       ├── bsv/
│   │       │   ├── addressgenerator.rst
│   │       │   ├── arith.rst
│   │       │   ├── axistream.rst
│   │       │   ├── bsv.rst
│   │       │   ├── ctrlmux.rst
│   │       │   ├── hostinterface.rst
│   │       │   ├── leds.rst
│   │       │   ├── memportal.rst
│   │       │   ├── memreadengine.rst
│   │       │   ├── memtypes.rst
│   │       │   ├── mmu.rst
│   │       │   ├── pipe.rst
│   │       │   └── portal.rst
│   │       ├── bsvsphinx.py
│   │       ├── c/
│   │       │   ├── c.rst
│   │       │   └── portal.rst
│   │       ├── conf.py
│   │       ├── design/
│   │       │   ├── Makefile
│   │       │   ├── abstract.rst
│   │       │   ├── bs-related-papers.bib
│   │       │   ├── conclusion.rst
│   │       │   ├── connectal-framework.rst
│   │       │   ├── design.rst
│   │       │   ├── flowcontrol.rst
│   │       │   ├── host_interface.rst
│   │       │   ├── images/
│   │       │   │   ├── Makefile
│   │       │   │   ├── MemreadEngine.pptx
│   │       │   │   ├── PortalImpl0.pptx
│   │       │   │   ├── data_accel_logical0.pptx
│   │       │   │   ├── data_accel_logical1.pptx
│   │       │   │   ├── data_accel_logical2.pptx
│   │       │   │   ├── data_accel_logical3.pptx
│   │       │   │   ├── data_accel_logical4.pptx
│   │       │   │   ├── msc0.pptx
│   │       │   │   ├── msc1.pptx
│   │       │   │   ├── msc2.pptx
│   │       │   │   ├── platform.pptx
│   │       │   │   └── platforms.pptx
│   │       │   ├── implementing-string-search.rst
│   │       │   ├── interface_definitions.rst
│   │       │   ├── introduction.rst
│   │       │   ├── performance.rst
│   │       │   ├── portal.rst
│   │       │   ├── portalstructure.rst
│   │       │   ├── references.bib
│   │       │   ├── related-work.rst
│   │       │   ├── string-search.rst
│   │       │   └── toolchain.rst
│   │       ├── devguide/
│   │       │   ├── clocks.rst
│   │       │   ├── compilingproject.rst
│   │       │   ├── design.rst
│   │       │   ├── devguide.rst
│   │       │   └── projectstructure.rst
│   │       ├── examples/
│   │       │   ├── index.rst
│   │       │   └── simple.rst
│   │       ├── index.rst
│   │       ├── installation.rst
│   │       ├── intro.rst
│   │       ├── make.rst
│   │       ├── makefile.connectal.build.rst
│   │       ├── makefile.connectal.rst
│   │       ├── themes/
│   │       │   └── connectal/
│   │       │       ├── layout.html
│   │       │       ├── static/
│   │       │       │   └── tracking.js_t
│   │       │       └── theme.conf
│   │       └── tools/
│   │           ├── generate-constraints.rst
│   │           ├── makefilegen.rst
│   │           ├── pcieflat.rst
│   │           ├── tools.rst
│   │           └── topgen.rst
│   ├── makefilegen.md
│   ├── maxcommonsubseq.md
│   ├── previous/
│   │   └── portal.asciidoc
│   ├── server.md
│   └── syntax.md
├── docker/
│   └── Dockerfile
├── drivers/
│   ├── awsf1portal/
│   │   ├── Makefile
│   │   ├── Makefile.dkms
│   │   ├── cdev_bypass.c
│   │   ├── cdev_ctrl.c
│   │   ├── cdev_ctrl.h
│   │   ├── cdev_events.c
│   │   ├── cdev_sgdma.c
│   │   ├── cdev_sgdma.h
│   │   ├── cdev_xvc.c
│   │   ├── cdev_xvc.h
│   │   ├── dkms.conf
│   │   ├── driverversion.h
│   │   ├── libxdma.c
│   │   ├── libxdma.h
│   │   ├── libxdma_api.h
│   │   ├── linux/
│   │   │   └── dma-buf.h
│   │   ├── pcieportal.h
│   │   ├── portal.c
│   │   ├── portal_internal.h
│   │   ├── version.h
│   │   ├── xdma_cdev.c
│   │   ├── xdma_cdev.h
│   │   ├── xdma_ioctl.h
│   │   ├── xdma_mod.c
│   │   └── xdma_mod.h
│   ├── connectalsdhci/
│   │   ├── Makefile
│   │   └── connectalsdhci.c
│   ├── connectalspi/
│   │   ├── Makefile
│   │   └── connectalspi.c
│   ├── pcieportal/
│   │   ├── Makefile
│   │   ├── Makefile.dkms
│   │   ├── dkms.conf
│   │   ├── driverversion.h
│   │   ├── linux/
│   │   │   └── dma-buf.h
│   │   ├── pcieportal.c
│   │   └── pcieportal.h
│   ├── portalmem/
│   │   ├── Makefile
│   │   ├── portalmem.c
│   │   └── portalmem.h
│   └── zynqportal/
│       ├── Makefile
│       ├── zynqportal.c
│       └── zynqportal.h
├── etc/
│   ├── modules-load.d/
│   │   └── connectal.conf
│   └── udev/
│       └── rules.d/
│           ├── 51-connectaltty.rules
│           ├── 52-altera-usb.rules
│           ├── 52-connectaltest.rules
│           ├── 52-digilent-usb.rules
│           └── 99-pcieportal.rules
├── examples/
│   ├── algo1_nandsim/
│   │   ├── Algo1NandSim.bsv
│   │   ├── Makefile
│   │   ├── nandsim.cpp
│   │   └── test.cpp
│   ├── algo2_nandsim/
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── jregexp.charMap
│   │   ├── jregexp.stateMap
│   │   ├── jregexp.stateTransitions
│   │   └── test.cpp
│   ├── aurora/
│   │   ├── Aurora.bsv
│   │   ├── BviAurora.bsv
│   │   ├── Gtx.bsv
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── aurora-clocks.xdc
│   │   ├── aurora.json
│   │   ├── clock.tcl
│   │   ├── synth-ip.tcl
│   │   └── testaurora.cpp
│   ├── bscan/
│   │   ├── BscanIF.bsv
│   │   ├── Makefile
│   │   └── testbscan.cpp
│   ├── caffe/
│   │   ├── Conv.bsv
│   │   ├── INSTALL
│   │   ├── Makefile
│   │   └── README.md
│   ├── echo/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   └── testecho.cpp
│   ├── echo2ind/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   └── testecho.cpp
│   ├── echofast/
│   │   └── Makefile
│   ├── echohost/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── testecho.cpp
│   │   └── vc707_floorplan.xdc
│   ├── echoinvert/
│   │   ├── Echo.bsv
│   │   ├── EchoInterface.bsv
│   │   ├── Makefile
│   │   └── testecho.cpp
│   ├── echojson/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echojsonpy/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   ├── old_testecho.py
│   │   └── testecho.py
│   ├── echomux/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Services.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echoproto/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── echo.proto
│   │   └── testecho.cpp
│   ├── echopy/
│   │   ├── Echo.bsv
│   │   ├── EchoInterface.bsv
│   │   ├── Makefile
│   │   ├── testecho.py
│   │   └── ubuntu-python-dev.sh
│   ├── echoshared/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echoslow/
│   │   ├── Echo.bsv
│   │   └── Makefile
│   ├── echosoft/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echotrace/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── testecho.cpp
│   │   └── vc707_floorplan.xdc
│   ├── echowebsocket/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── fmcomms1/
│   │   ├── ExtraXilinxCells.bsv
│   │   ├── ExtraXilinxCells.bsv.pp
│   │   ├── FMComms1.bsv
│   │   ├── FMComms1ADC.bsv
│   │   ├── FMComms1DAC.bsv
│   │   ├── FMComms1Pins.bsv
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── clock.tcl
│   │   ├── fmci2c.c
│   │   ├── fmci2c.h
│   │   ├── fmcomms1-fmc.json
│   │   ├── i2c_zedboardandroid.c
│   │   ├── i2c_zedboardandroid.h
│   │   ├── readtrace.py
│   │   ├── testfmcomms1.cpp
│   │   └── testi2c.c
│   ├── gyro_simple/
│   │   ├── Makefile
│   │   ├── clock.tcl
│   │   ├── gyro.h
│   │   ├── gyroVisualize.py
│   │   ├── gyro_simple.h
│   │   ├── pinout.json
│   │   ├── test_gyro.cpp
│   │   └── test_gyro.py
│   ├── gyrospi/
│   │   ├── Makefile
│   │   ├── STest.bsv
│   │   ├── gyro.h
│   │   ├── pinout.json
│   │   └── testspi.cpp
│   ├── hbridge_simple/
│   │   ├── Makefile
│   │   ├── hbridge_simple.h
│   │   ├── pinout.json
│   │   └── test_hbridge.cpp
│   ├── hdmidisplay/
│   │   ├── BsimHdmi.cpp
│   │   ├── HDMI16.bsv
│   │   ├── Makefile
│   │   ├── TestHdmi.pro
│   │   ├── hdmi.json
│   │   ├── hdmidisplay-bluesim.xdc
│   │   ├── hdmidisplay-vc707.xdc
│   │   ├── hdmidisplay-zc702.xdc
│   │   ├── hdmidisplay-zedboard.xdc
│   │   ├── i2c.json
│   │   ├── qtmain.cpp
│   │   ├── testhdmidisplay.cpp
│   │   └── worker.h
│   ├── imageon/
│   │   ├── ImageonCapture.bsv
│   │   ├── ImageonCapturePins.bsv
│   │   ├── Makefile
│   │   ├── Makefile.dump
│   │   ├── clock.tcl
│   │   ├── dump_image.cpp
│   │   ├── i2ccamera.h
│   │   ├── imageon-clocks.xdc
│   │   ├── imageon-fmc.json
│   │   ├── imageon-zedboard.json
│   │   └── testimagecapture.cpp
│   ├── leds/
│   │   ├── LedController.bsv
│   │   ├── Makefile
│   │   ├── pinout.json
│   │   └── testleds.cpp
│   ├── linking/
│   │   ├── GetInverse.v
│   │   ├── LinkerLib.bsv
│   │   ├── Makefile
│   │   ├── Processor.bsv
│   │   ├── ProcessorTop.bsv
│   │   └── Processor_Generated.bsv
│   ├── matmul/
│   │   ├── Makefile
│   │   ├── Makefile.mm
│   │   ├── Makefile.mmif
│   │   ├── clocks.tcl
│   │   ├── design-vc707.tcl
│   │   ├── design.tcl
│   │   ├── mkZynqTop_flpn.xdc
│   │   ├── perf.txt
│   │   ├── synth-ip.tcl
│   │   └── testmm.cpp
│   ├── maxsonar_simple/
│   │   ├── Makefile
│   │   ├── maxsonar_simple.h
│   │   ├── pinout.json
│   │   └── test_maxsonar.cpp
│   ├── memcpy/
│   │   ├── Makefile
│   │   ├── Memcpy.bsv
│   │   └── testmemcpy.cpp
│   ├── memcpyslow/
│   │   └── Makefile
│   ├── memlatency/
│   │   ├── Makefile
│   │   ├── Memlatency.bsv
│   │   └── testmemlatency.cpp
│   ├── memread/
│   │   ├── Makefile
│   │   ├── ReadTest.bsv
│   │   ├── design_vc707.tcl
│   │   ├── testmemread.cpp
│   │   └── vc707_floorplan.xdc
│   ├── memread128/
│   │   └── Makefile
│   ├── memread2/
│   │   ├── Makefile
│   │   ├── Memread2.bsv
│   │   └── testmemread2.cpp
│   ├── memread256/
│   │   └── Makefile
│   ├── memread_4m/
│   │   ├── Makefile
│   │   └── ReadTest.bsv
│   ├── memread_simple/
│   │   ├── Makefile
│   │   ├── ReadTest.bsv
│   │   ├── design_vc707.tcl
│   │   ├── testmemread.cpp
│   │   └── vc707_floorplan.xdc
│   ├── memwrite/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memwrite128/
│   │   └── Makefile
│   ├── memwrite256/
│   │   └── Makefile
│   ├── memwrite_4m/
│   │   ├── Makefile
│   │   └── Memwrite.bsv
│   ├── nandsim/
│   │   ├── Makefile
│   │   └── testnandsim.cpp
│   ├── portal-synth-boundary/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   ├── Top.bsv
│   │   └── testsimple.cpp
│   ├── printf/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── SwallowIF.bsv
│   │   ├── Top.bsv
│   │   └── testecho.cpp
│   ├── rbm/
│   │   ├── LICENSE.txt
│   │   ├── Makefile
│   │   ├── Makefile.rbm
│   │   ├── Readme.md
│   │   └── testrbm.cpp
│   ├── readbw/
│   │   ├── ReadBW.bsv
│   │   └── testreadbw.cpp
│   ├── regexp/
│   │   ├── Makefile
│   │   ├── jregexp.charMap
│   │   ├── jregexp.stateMap
│   │   ├── jregexp.stateTransitions
│   │   └── testregexp.cpp
│   ├── sdcard_spi/
│   │   ├── Makefile
│   │   ├── SPI.bsv
│   │   ├── SPITest.bsv
│   │   ├── pin_translation.json
│   │   ├── readme.txt
│   │   └── sdcard_spi.cpp
│   ├── simple/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   ├── boards/
│   │   │   ├── de5.json
│   │   │   └── htg4.json
│   │   ├── simple.h
│   │   └── testsimple.cpp
│   ├── simplemultibluesim/
│   │   ├── Link.bsv
│   │   ├── LinkIF.bsv
│   │   ├── Makefile
│   │   ├── run.sh
│   │   ├── testsimple.cpp
│   │   └── xsimrun.sh
│   ├── simplesharedhw/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   └── testsimple.cpp
│   ├── strstr/
│   │   ├── Makefile
│   │   ├── StrstrExample.bsv
│   │   └── teststrstr.cpp
│   ├── swmemcpy/
│   │   ├── Makefile
│   │   ├── SWmemcpy.bsv
│   │   └── testswmemcpy.cpp
│   ├── vectoradd_hls/
│   │   ├── Makefile
│   │   ├── README.md
│   │   ├── bsv/
│   │   │   ├── Vadd.bsv
│   │   │   └── VaddBvi.bsv
│   │   ├── solution1/
│   │   │   └── impl/
│   │   │       └── verilog/
│   │   │           └── vectoradd.v
│   │   ├── src/
│   │   │   └── vectoradd.cpp
│   │   └── testvadd.cpp
│   ├── zedboard_robot/
│   │   ├── Controller.bsv
│   │   ├── Makefile
│   │   ├── pinout.json
│   │   ├── sonarVisualize.py
│   │   ├── test_zedboard_robot.cpp
│   │   └── test_zedboard_robot.py
│   └── zynqpcie/
│       ├── Makefile
│       ├── SimpleIF.bsv
│       ├── Top.bsv
│       ├── ZynqPcieTestIF.bsv
│       ├── synth-ip.tcl
│       ├── testsimple.cpp
│       ├── testzynqpcie.cpp
│       └── zynqpcie.json
├── generated/
│   ├── altera/
│   │   ├── ALTERA_DDR3_WRAPPER.bsv
│   │   ├── ALTERA_ETH_PMA_RECONFIG_WRAPPER.bsv
│   │   ├── ALTERA_ETH_PMA_RESET_CONTROL_WRAPPER.bsv
│   │   ├── ALTERA_ETH_PMA_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_ED_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_RECONFIG_DRIVER_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_SIV_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_SV_WRAPPER.bsv
│   │   ├── ALTERA_PLL_WRAPPER.bsv
│   │   └── ALTERA_XCVR_RECONFIG_WRAPPER.bsv
│   ├── cpp/
│   │   ├── GeneratedTypes.h
│   │   ├── MMURequest.c
│   │   └── README
│   └── scripts/
│       ├── generate_altera_ddrbvi.sh
│       ├── generate_altera_ethbvi.sh
│       ├── generate_altera_macbvi.sh
│       ├── generate_altera_pciebvi.sh
│       ├── generate_bscane2.sh
│       ├── generate_bufgcrtl.sh
│       ├── generate_pcie2wrapper.sh
│       ├── generate_pcie3.sh
│       ├── generate_pcie3u.sh
│       ├── generate_pcie3uplus.sh
│       ├── generate_pcie_2_1.sh
│       ├── generate_pciewrapper.sh
│       ├── generate_pipeclock.sh
│       ├── generate_pps7.sh
│       ├── generate_pps7lib.sh
│       ├── generate_zynq_mpsoc.sh
│       └── importbvi.py
├── gralloc/
│   ├── Android.mk
│   ├── Makefile
│   ├── README
│   ├── bitset
│   ├── gr.h
│   ├── gralloc.cpp
│   ├── gralloc_priv.h
│   └── mapper.cpp
├── jtag/
│   ├── README
│   ├── bsd/
│   │   ├── xc7k325t_ffg900.bsd
│   │   ├── xc7vx485t_ffg1761.bsd
│   │   ├── xc7vx690t_ffg1761.bsd
│   │   └── xc7z020_clg484.bsd
│   ├── digilent-hs1.cfg
│   ├── digilent-hs2.cfg
│   ├── dumptrace.py
│   ├── kc705.cfg
│   ├── kc705program.cfg
│   ├── pcietrace.cfg
│   ├── readll.py
│   ├── run_jtag.sh
│   ├── run_trace.sh
│   ├── zedboard.cfg
│   └── zedtrace.cfg
├── lib/
│   ├── bsv/
│   │   ├── Arith.bsv
│   │   ├── BRAMFIFOFLevel.bsv
│   │   ├── BlueScope.bsv
│   │   ├── BlueScopeEvent.bsv
│   │   ├── BlueScopeEventPIO.bsv
│   │   ├── Bscan.bsv
│   │   ├── ConfigCounter.bsv
│   │   ├── ConnectalSpi.bsv
│   │   ├── Dma2BRAM.bsv
│   │   ├── FrequencyCounter.bsv
│   │   ├── HDMI.bsv
│   │   ├── HdmiDisplay.bsv
│   │   ├── ImageonVita.bsv
│   │   ├── IserdesDatadeser.bsv
│   │   ├── IserdesDatadeserIF.bsv
│   │   ├── Leds.bsv
│   │   ├── PipeMul.bsv
│   │   ├── SharedMemoryFifo.bsv
│   │   ├── SharedMemoryPortal.bsv
│   │   ├── SpiRoot.bsv
│   │   ├── SpiTap.bsv
│   │   ├── Stack.bsv
│   │   ├── StackReg.bsv
│   │   ├── XADC.bsv
│   │   ├── XilinxVirtex7PCIE.bsv
│   │   └── YUV.bsv
│   ├── cpp/
│   │   ├── connectal_conv.cpp
│   │   ├── connectal_conv.h
│   │   ├── connectal_convmm.cpp
│   │   ├── edid.h
│   │   ├── i2chdmi.h
│   │   ├── printfInd.h
│   │   └── userReference.h
│   ├── deprecated/
│   │   ├── BurstFunnel.bsv
│   │   ├── DirectoryRF.bsv
│   │   ├── DmaUtils.bsv
│   │   ├── OldMemServer.bsv
│   │   ├── RegFileA.bsv
│   │   ├── SGListComb.bsv
│   │   ├── bsv_Makefile
│   │   ├── pcietestbench/
│   │   │   ├── Makefile
│   │   │   ├── PcieTestBench.bsv
│   │   │   ├── Top.bsv
│   │   │   └── testpcie.cpp
│   │   ├── pcietestbench_dma_io/
│   │   │   ├── Makefile
│   │   │   ├── Memread.bsv
│   │   │   ├── PcieTestBench.bsv
│   │   │   ├── Top.bsv
│   │   │   ├── memread_nobuff_io.tstlp
│   │   │   └── testpcie.cpp
│   │   └── pcietestbench_dma_oo/
│   │       ├── Makefile
│   │       ├── Memread.bsv
│   │       ├── PcieTestBench.bsv
│   │       ├── Top.bsv
│   │       ├── memread_nobuff_oo.tstlp
│   │       └── testpcie.cpp
│   ├── matmul/
│   │   ├── bar.m
│   │   ├── bsv/
│   │   │   ├── DotProdServer.bsv
│   │   │   ├── FloatOps.bsv
│   │   │   ├── FpAdd.bsv
│   │   │   ├── FpMac.bsv
│   │   │   ├── FpMacTb.bsv
│   │   │   ├── FpMul.bsv
│   │   │   ├── MatrixNT.bsv
│   │   │   └── MatrixTN.bsv
│   │   └── cpp/
│   │       ├── cuda.cpp
│   │       ├── portalmat.cpp
│   │       └── portalmat.h
│   ├── nandsim/
│   │   ├── bsv/
│   │   │   ├── NandSim.bsv
│   │   │   └── NandSimNames.bsv
│   │   └── cpp/
│   │       └── nandsim.h
│   ├── nvme/
│   │   ├── bsv/
│   │   │   ├── AxiPcie3RootPort.bsv
│   │   │   ├── AxiPcieRootPort.bsv
│   │   │   ├── Nvme.bsv
│   │   │   ├── NvmeIfc.bsv
│   │   │   └── NvmePins.bsv
│   │   ├── cpp/
│   │   │   ├── nvme.cpp
│   │   │   └── nvme.h
│   │   └── tcl/
│   │       └── package.tcl
│   ├── qemu/
│   │   ├── fpgadev.cpp
│   │   └── fpgadev.h
│   ├── rbm/
│   │   ├── bsv/
│   │   │   ├── DmaVector.bsv
│   │   │   ├── Rbm.bsv
│   │   │   ├── RbmTypes.bsv
│   │   │   ├── Sigmoid.bsv
│   │   │   └── Timer.bsv
│   │   └── cpp/
│   │       ├── mnist.h
│   │       ├── rbm.cpp
│   │       └── rbm.h
│   ├── regexp/
│   │   ├── bsv/
│   │   │   ├── Regexp.bsv
│   │   │   └── RegexpEngine.bsv
│   │   └── cpp/
│   │       └── regexp_utils.h
│   ├── strstr/
│   │   ├── bsv/
│   │   │   ├── MPEngine.bsv
│   │   │   └── Strstr.bsv
│   │   └── cpp/
│   │       ├── mp.h
│   │       └── strstr.h
│   └── zedboard_robot/
│       ├── bsv/
│       │   ├── GyroController.bsv
│       │   ├── HBridgeController.bsv
│       │   └── MaxSonarController.bsv
│       └── cpp/
│           ├── read_buffer.cpp
│           └── read_buffer.h
├── pcie/
│   ├── Makefile
│   ├── pcieflat
│   └── tlp.py
├── scripts/
│   ├── AST.py
│   ├── Doxyfile
│   ├── Makefile.connectal.application
│   ├── Makefile.connectal.build
│   ├── adb/
│   │   ├── LICENSE
│   │   ├── README.rst
│   │   ├── __init__.py
│   │   ├── adb_commands.py
│   │   ├── adb_debug.py
│   │   ├── adb_protocol.py
│   │   ├── adb_test.py
│   │   ├── common.py
│   │   ├── common_cli.py
│   │   ├── common_stub.py
│   │   ├── fastboot.py
│   │   ├── fastboot_debug.py
│   │   ├── fastboot_protocol.txt
│   │   ├── fastboot_test.py
│   │   ├── filesync_protocol.py
│   │   ├── filesync_protocol.txt
│   │   └── usb_exceptions.py
│   ├── aws/
│   │   ├── build.sh
│   │   ├── create-fpga-image.sh
│   │   ├── create_dcp_from_cl.tcl
│   │   ├── describe-latest-fpga-image.sh
│   │   ├── encrypt.tcl
│   │   ├── notify_via_sns.py
│   │   ├── run.awsf1
│   │   ├── synth_awsf1.tcl
│   │   ├── upload.sh
│   │   └── wait_for_afi.py
│   ├── boardinfo.py
│   ├── bsv.filter
│   ├── bsvdepend.py
│   ├── bsvdependencies.py
│   ├── bsvgen.py
│   ├── bsvpreprocess.py
│   ├── cadb
│   ├── check-timing.py
│   ├── connectal-make
│   ├── connectal-synth-avalonddr3.tcl
│   ├── connectal-synth-axichecker.tcl
│   ├── connectal-synth-axiddr3.tcl
│   ├── connectal-synth-axidma.tcl
│   ├── connectal-synth-axieth.tcl
│   ├── connectal-synth-axiintc.tcl
│   ├── connectal-synth-eth.tcl
│   ├── connectal-synth-ila.tcl
│   ├── connectal-synth-ip.tcl
│   ├── connectal-synth-pcie-rp.tcl
│   ├── connectal-synth-pcie.tcl
│   ├── connectal-synth-pll.tcl
│   ├── connectal-synth-zynq-mpsoc.tcl
│   ├── cppgen.py
│   ├── deprecated/
│   │   ├── mkpcietop-partial-reconfiguration.tcl
│   │   ├── mkpcietop-synth.tcl
│   │   ├── portaltop-impl.tcl
│   │   └── portaltop-synth.tcl
│   ├── discover_icmp.py
│   ├── discover_tcp.py
│   ├── driver_signature.sed
│   ├── extract-bvi-schedule.py
│   ├── generate-constraints.py
│   ├── globalv.py
│   ├── makefilegen.py
│   ├── packagesource.py
│   ├── parse_qsf.py
│   ├── parse_xdc.py
│   ├── portal.py
│   ├── portalJson.py
│   ├── power.py
│   ├── preprocess_trace.py
│   ├── reorderbytes.py
│   ├── run.android
│   ├── run.android.sh
│   ├── run.parallella.sh
│   ├── run.pcietest
│   ├── run.pcietest.altera
│   ├── run_on_daffodil
│   ├── syntax.py
│   ├── topgen.py
│   └── util.py
├── tests/
│   ├── adapter/
│   │   ├── Makefile
│   │   ├── Test.bsv
│   │   └── test.cpp
│   ├── aecho/
│   │   ├── Echo.orig.bsv
│   │   ├── EchoReq.bsv
│   │   ├── Makefile
│   │   ├── generated/
│   │   │   ├── Echo.bsv
│   │   │   ├── EchoVerilog.v
│   │   │   ├── L_class_OC_Echo.bsv
│   │   │   ├── L_class_OC_Fifo.bsv
│   │   │   ├── L_class_OC_Fifo1.bsv
│   │   │   ├── l_class_OC_Echo.cpp
│   │   │   ├── l_class_OC_Echo.h
│   │   │   ├── l_class_OC_Echo.v
│   │   │   ├── l_class_OC_EchoIndication.cpp
│   │   │   ├── l_class_OC_EchoIndication.h
│   │   │   ├── l_class_OC_EchoRequest.cpp
│   │   │   ├── l_class_OC_EchoRequest.h
│   │   │   ├── l_class_OC_EchoTest.cpp
│   │   │   ├── l_class_OC_EchoTest.h
│   │   │   ├── l_class_OC_Fifo.cpp
│   │   │   ├── l_class_OC_Fifo.h
│   │   │   ├── l_class_OC_Fifo.v
│   │   │   ├── l_class_OC_Fifo1.cpp
│   │   │   ├── l_class_OC_Fifo1.h
│   │   │   ├── l_class_OC_Fifo1.v
│   │   │   ├── output.cpp
│   │   │   └── output.h
│   │   └── testecho.cpp
│   ├── algo1_flashmodel/
│   │   ├── AuroraCommon.bsv
│   │   ├── AuroraGearbox.bsv
│   │   ├── AuroraImportFmc1.bsv
│   │   ├── ChipscopeWrapper.bsv
│   │   ├── ControllerTypes.bsv
│   │   ├── FlashBusModel.bsv
│   │   ├── FlashCtrlModel.bsv
│   │   ├── FlashTop.bsv
│   │   ├── Makefile
│   │   ├── NandSimMod.bsv
│   │   ├── NullResetN.bsv
│   │   ├── PageBuffers.bsv
│   │   ├── Top.bsv
│   │   ├── TopPins.bsv
│   │   ├── flashaccess.cpp
│   │   └── test.cpp
│   ├── algo1_nandsim_manual/
│   │   ├── Makefile
│   │   ├── algo1.cpp
│   │   ├── haystack.txt
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   └── nandsim_manual.c
│   ├── avalon_mm/
│   │   ├── AvalonBfmWrapper.bsv
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── TestProgram.bsv
│   │   ├── avlm_avls_1x1.qsys
│   │   ├── testecho.cpp
│   │   └── verilog/
│   │       ├── tb.sv
│   │       └── test_program.v
│   ├── axieth/
│   │   ├── AxiEth.bsv
│   │   ├── EthPins.bsv
│   │   ├── Makefile
│   │   ├── axieth.h
│   │   ├── axieth.json
│   │   ├── axieth.xdc
│   │   ├── testaxieth.cpp
│   │   └── xsim_export.tcl
│   ├── bluecheck-bram/
│   │   ├── Bram2Example.bsv
│   │   ├── BramExample.bsv
│   │   └── make.sh
│   ├── bluecheck-sharedmemfifo/
│   │   ├── ConnectalProjectConfig.bsv
│   │   ├── SharedMemoryFifoCheck.bsv
│   │   └── make.sh
│   ├── bluecheck_harness/
│   │   ├── Harness.bsv
│   │   ├── Makefile
│   │   └── harness.py
│   ├── bpiflash/
│   │   ├── BpiFlashTest.bsv
│   │   ├── I28F512P33.bsv
│   │   ├── Makefile
│   │   ├── bpiflash.h
│   │   ├── bpiflash.json
│   │   ├── i28f512p33.v
│   │   └── testbpiflash.cpp
│   ├── ddr3/
│   │   ├── Ddr3Test.bsv
│   │   ├── Makefile
│   │   ├── synth-ip.tcl
│   │   └── testddr3.cpp
│   ├── ddr3_altera/
│   │   ├── Ddr3Test.bsv
│   │   ├── Makefile
│   │   ├── de5.json
│   │   ├── synth-ip.tcl
│   │   └── testddr3.cpp
│   ├── ddr_minimal/
│   │   ├── Ddr3Test.bsv
│   │   ├── Makefile
│   │   ├── synth-ip.tcl
│   │   └── testddr3.cpp
│   ├── dma2bram/
│   │   ├── Makefile
│   │   ├── Test.bsv
│   │   └── test.cpp
│   ├── dram_awsf1/
│   │   ├── Axi4.bsv
│   │   ├── DdrAws.bsv
│   │   ├── Makefile
│   │   └── testddr3.cpp
│   ├── echosoft2/
│   │   ├── EchoId.bsv
│   │   ├── Makefile
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── fastecho/
│   │   ├── FastEcho.bsv
│   │   ├── Makefile
│   │   ├── about_this_test.txt
│   │   ├── synth-ip.tcl
│   │   └── testfastecho.cpp
│   ├── float/
│   │   ├── FloatTest.bsv
│   │   ├── Makefile
│   │   └── ftest.c
│   ├── fp/
│   │   ├── BviFpAdd.bsv
│   │   ├── FpOps.bsv
│   │   ├── FpTest.bsv
│   │   ├── Makefile
│   │   ├── synth-ip.tcl
│   │   └── testfp.cpp
│   ├── guard/
│   │   ├── GuardTest.bsv
│   │   ├── Makefile
│   │   └── gtest.c
│   ├── ipcperf/
│   │   ├── IpcTest.bsv
│   │   ├── Makefile
│   │   ├── testipctest.cpp
│   │   └── vc707_floorplan.xdc
│   ├── memcpy_manysglists/
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   └── testmemcpy.cpp
│   ├── memread_err/
│   │   ├── Makefile
│   │   ├── Memread.bsv
│   │   └── testmemread.cpp
│   ├── memread_manual/
│   │   ├── Makefile
│   │   ├── ReadTest.bsv
│   │   ├── design_vc707.tcl
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   ├── memread_manual_manager.c
│   │   └── vc707_floorplan.xdc
│   ├── memread_manyclients/
│   │   ├── Makefile
│   │   └── performance.txt
│   ├── memread_manyclients128/
│   │   └── Makefile
│   ├── memread_manyengines/
│   │   ├── Makefile
│   │   └── ReadTest.bsv
│   ├── memserver_copy/
│   │   ├── Makefile
│   │   ├── Memcopy.bsv
│   │   └── testmemcopy.cpp
│   ├── memserver_copy128/
│   │   └── Makefile
│   ├── memserver_copy_slow/
│   │   └── Makefile
│   ├── memserver_write/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memserver_write128/
│   │   └── Makefile
│   ├── memtopcie_bluesim/
│   │   ├── Makefile
│   │   └── Top.bsv
│   ├── memwrite_acp/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memwrite_manyclients/
│   │   └── Makefile
│   ├── memwrite_manyclients128/
│   │   └── Makefile
│   ├── memwrite_trivial/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memwriteengine_test/
│   │   ├── Makefile
│   │   ├── MemWriteEngineTest.bsv
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── method/
│   │   ├── Makefile
│   │   ├── Method.bsv
│   │   └── mtest.cpp
│   ├── mifo/
│   │   ├── Makefile
│   │   ├── MifoTest.bsv
│   │   └── testmifo.cpp
│   ├── nandsim_manual/
│   │   ├── Makefile
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   ├── nandsim_manual.c
│   │   ├── testnandsim.cpp
│   │   └── testnandsim_test.cpp
│   ├── nvme_core/
│   │   └── string_search.cpp
│   ├── nvme_strstr/
│   │   ├── Makefile
│   │   ├── NvmeSearch.bsv
│   │   ├── StringSearchIfc.bsv
│   │   ├── fmc.json
│   │   ├── main.cpp
│   │   ├── nfsume.json
│   │   ├── nvme.json
│   │   ├── nvme.xdc
│   │   ├── package100.tcl
│   │   └── synth-ip.tcl
│   ├── nvme_test/
│   │   ├── Makefile
│   │   ├── NvmeTest.bsv
│   │   ├── fmc.json
│   │   ├── impl.tcl
│   │   ├── main.cpp
│   │   ├── miniitx100.json
│   │   ├── nfsume.json
│   │   ├── nfsume.xdc
│   │   ├── nvme.xdc
│   │   └── synth-ip.tcl
│   ├── ov7670/
│   │   ├── Makefile
│   │   ├── Ov7670Controller.bsv
│   │   ├── Ov7670Interface.bsv
│   │   ├── SCCB.bsv
│   │   ├── pinout.json
│   │   └── testcam.cpp
│   ├── partial/
│   │   ├── Bounce.bsv
│   │   ├── Bounce1.bsv
│   │   ├── Bounce2.bsv
│   │   ├── Bounce3.bsv
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── README
│   │   ├── floorplan-zc702.xdc
│   │   └── testecho.cpp
│   ├── pcie-debug/
│   │   ├── Makefile
│   │   ├── TestPins.bsv
│   │   ├── TracePcie.bsv
│   │   ├── pin_translation.json
│   │   └── tracepcie.cpp
│   ├── pciememcheck/
│   │   ├── CheckMPM.bsv
│   │   ├── Makefile
│   │   ├── PcieMemCheck.bsv
│   │   └── pciememcheck.cpp
│   ├── physmaster/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── PhysReq.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── qemuaccel/
│   │   ├── AccelIfcNames.bsv
│   │   ├── AccelTop.bsv
│   │   ├── BlockDev.bsv
│   │   ├── Devices.bsv
│   │   ├── Makefile
│   │   ├── QemuAccel.bsv
│   │   ├── QemuAccelIfc.bsv
│   │   ├── Serial.bsv
│   │   └── qemuaccel.cpp
│   ├── rootport/
│   │   ├── AxiPcieRootPort.bsv
│   │   ├── Makefile
│   │   ├── RootPort.bsv
│   │   ├── RootPortIfc.bsv
│   │   ├── RootPortPins.bsv
│   │   ├── gencores.tcl
│   │   ├── rootport.cpp
│   │   ├── rootport.json
│   │   └── rootport.xdc
│   ├── serialportal/
│   │   ├── Makefile
│   │   ├── SerialPortalIfc.bsv
│   │   ├── SerialPortalTest.bsv
│   │   ├── rs232.json
│   │   └── serialportal.cpp
│   ├── simmethodtime/
│   │   ├── Makefile
│   │   ├── Simm.bsv
│   │   └── test.cpp
│   ├── simple_manual/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   ├── simple_manual.c
│   │   └── testsimple.cpp
│   ├── spi/
│   │   ├── ConnectalProjectConfig.bsv
│   │   ├── Makefile
│   │   └── spitest.gtkw
│   ├── spikehw/
│   │   ├── AxiEthBufferBvi.bsv
│   │   ├── AxiEthSubsystem.bsv
│   │   ├── AxiIic.bsv
│   │   ├── AxiSpiBvi.bsv
│   │   ├── AxiUart.bsv
│   │   ├── GigEthPcsPmaBvi.bsv
│   │   ├── Makefile
│   │   ├── README.md
│   │   ├── SpikeHw.bsv
│   │   ├── SpikeHwIfc.bsv
│   │   ├── SpikeHwPins.bsv
│   │   ├── SyncAxisFifo32x1024.bsv
│   │   ├── TriModeMacBvi.bsv
│   │   ├── boot/
│   │   │   ├── Makefile
│   │   │   ├── copybbl.c
│   │   │   └── entry.S
│   │   ├── bootromx4.hex
│   │   ├── eth.json
│   │   ├── flash.json
│   │   ├── gencores.tcl
│   │   ├── geneth.tcl
│   │   ├── i2c-standard.json
│   │   ├── nfsume.json
│   │   ├── program.tcl
│   │   ├── rtscts.json
│   │   ├── spikehw-miniitx100.json
│   │   ├── spikehw-vc707g2.json
│   │   ├── spikehw-vc709.json
│   │   ├── spikehw.cpp
│   │   ├── spikehw.h
│   │   ├── spikehw.json
│   │   ├── spikehw.xdc
│   │   ├── test-spikehw.cpp
│   │   └── trace.tcl
│   ├── test_pmod/
│   │   ├── Controller.bsv
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── pinout.json
│   │   └── testpmod.cpp
│   ├── test_sdio1/
│   │   ├── Makefile
│   │   ├── SDIO.bsv
│   │   ├── Top.bsv
│   │   ├── pinout.json
│   │   └── test_sdio1.cpp
│   ├── test_spi0/
│   │   ├── Makefile
│   │   ├── SPI.bsv
│   │   ├── Top.bsv
│   │   ├── foo.cpp
│   │   └── test_spi0.cpp
│   ├── testfpmul/
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   └── testfpmul.cpp
│   ├── testldstrex/
│   │   ├── Makefile
│   │   └── testldstrex.cpp
│   ├── testmm16.16.2/
│   │   └── Makefile
│   ├── testmm16.16.4/
│   │   └── Makefile
│   ├── testmm2.4.2/
│   │   ├── Makefile
│   │   └── zc706_floorplan.xdc
│   ├── testmm32.16.2/
│   │   └── Makefile
│   ├── testmm32.32.2/
│   │   └── Makefile
│   ├── testmm4.2.2/
│   │   └── Makefile
│   ├── testmm4.4.2/
│   │   └── Makefile
│   ├── testmm4.4.4/
│   │   └── Makefile
│   ├── testmm8.8.2/
│   │   ├── Makefile
│   │   └── zc706_floorplan.xdc
│   ├── testmm8.8.4/
│   │   └── Makefile
│   ├── testmm_cuda_perf/
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── cuda_opencv_example/
│   │   │   ├── Makefile
│   │   │   ├── main.cpp
│   │   │   └── main.cu
│   │   ├── run_exe
│   │   ├── synth-ip.tcl
│   │   └── zc706_floorplan.xdc
│   ├── testrbm16.16.2/
│   │   ├── Makefile
│   │   └── synth-ip.tcl
│   ├── testrbm8.8.2/
│   │   ├── Makefile
│   │   └── synth-ip.tcl
│   └── yuv/
│       ├── Makefile
│       ├── YuvIF.bsv
│       └── testyuv.cpp
└── verilog/
    ├── CONNECTNET.v
    ├── CONNECTNET2.v
    ├── FpgaReset.v
    ├── GenBIBUF.v
    ├── LinkInverter.v
    ├── PositiveReset.v
    ├── PutInverter.v
    ├── SyncFIFO.v
    ├── SyncFIFO1.v
    ├── SyncReset.v
    ├── XsimDmaReadWrite.sv
    ├── XsimFinish.sv
    ├── XsimLink.sv
    ├── XsimSink.sv
    ├── XsimSource.sv
    ├── altera/
    │   ├── BRAM1.v
    │   ├── BRAM1BE.v
    │   ├── BRAM2.v
    │   └── siv_gen2x8/
    │       └── siv_gen2x8.v
    ├── awsf1.sv
    ├── cl_id_defines.vh
    └── xsimtop.sv

================================================
FILE CONTENTS
================================================

================================================
FILE: .gitignore
================================================
*~
*.pyc
*.o
lextab.py
parselog.txt
parser.out
parsetab.py
*.bo
*.so
*.ba
*.cmd
*.mod.c
*.ko
Module.symvers
*.jou
*.log
.build
mk*.cxx
mk*.h
*.bspec
model_*.cxx
model_*.h
mk*.sched
mk*.v
modules.order
xilinx/pcie_7x_v2_1
examples/*/ac701
examples/*/kc705
examples/*/vc707
examples/*/zc702
examples/*/zc706
examples/*/de5
examples/*/htg4
examples/*/zedboard
examples/*/zybo
generated/xilinx/*
dkms.conf.out
*.vcd
bluesim
xsim
vc709
vc707
vc707g2
usage_statistics_webtalk.*
vivado_pid*
nfsume
.cache
ubuntu.exe
*signature_file.h
.tmp_versions
.Xil
*.mcs
verilator
zc706
*.png
*.bit
*.prm
zedboard
miniitx100
*.pb
kc705g2
ac701g2
*.ltx
zedboard_ubuntu


================================================
FILE: .travis.yml
================================================
language: cpp
cache:
  directories:
before_script:
- if [ -d Bluespec-2018.10.beta1 ] ; then echo bluespec cached; else curl http://buildbot.connectal.org/downloads/Bluespec-2018.10.beta1.tar.gz | tar -zxf - ; fi
- mkdir -p lib
- ln -s /usr/lib/x86_64-linux-gnu/libgmp.so.10 lib/libgmp.so.3
- if [ "$CONNECTAL_ARCH" == "cvc" ]; then if [ -d open-src-cvc-700c-1 ] ; then echo cvc cached; else curl -L https://github.com/cambridgehackers/open-src-cvc/archive/700c-1.tar.gz | tar -zxf - ; (cd open-src-cvc-700c-1/src; make -j4 -f makefile.cvc64); fi; fi
- (if [ "$CONNECTAL_ARCH" == "verilator" ]; then curl -L http://www.veripool.org/ftp/verilator-3.888.tgz | tar -zxf -; cd verilator-3.888/; ./configure --prefix=`dirname $PWD`/verilator; make -j4;  make install; fi)
- curl http://www.dabeaz.com/ply/ply-3.9.tar.gz | tar -zxf -
- ln -s ../ply-3.9/ply scripts
- ls -l scripts/ply
env:
  global:
    - BLUESPECDIR=$PWD/Bluespec-2018.10.beta1/lib
    - PATH=$PATH:$PWD/Bluespec-2018.10.beta1/bin:$PWD/open-src-cvc-700c-1/src:$PWD/verilator/bin
    - LD_LIBRARY_PATH=$PWD/lib
  matrix:
    - CONNECTAL_TEST=examples/echo CONNECTAL_ARCH=verilator
    - CONNECTAL_TEST=examples/echopy CONNECTAL_ARCH=verilator
    - CONNECTAL_TEST=examples/echo CONNECTAL_ARCH=cvc
    - CONNECTAL_TEST=examples/echopy CONNECTAL_ARCH=cvc
    - CONNECTAL_TEST=examples/echoslow CONNECTAL_ARCH=verilator
    - CONNECTAL_TEST=examples/echoslow CONNECTAL_ARCH=cvc
    - CONNECTAL_TEST=examples/simple CONNECTAL_ARCH=bluesim
    - CONNECTAL_TEST=examples/simple CONNECTAL_ARCH=verilator
    - CONNECTAL_TEST=examples/simple CONNECTAL_ARCH=cvc
    - CONNECTAL_TEST=examples/memcpy CONNECTAL_ARCH=bluesim
    - CONNECTAL_TEST=examples/memcpy CONNECTAL_ARCH=verilator
    - CONNECTAL_TEST=examples/memcpy CONNECTAL_ARCH=cvc
    - CONNECTAL_TEST=examples/strstr CONNECTAL_ARCH=bluesim
    - CONNECTAL_TEST=tests/memserver_write128 CONNECTAL_ARCH=verilator
    - CONNECTAL_TEST=tests/memserver_copy128 CONNECTAL_ARCH=verilator
script:
- export PYTHONPATH=$PWD/scripts; make scripts/syntax/parsetab.py; cd $CONNECTAL_TEST; make build.$CONNECTAL_ARCH run.$CONNECTAL_ARCH
sudo: no
dist: trusty
os:
- linux
addons:
  apt:
    sources:
    - sourceline: 'ppa:jamey-hicks/connectal'
    packages:
    - python-dev
    - libgmp10
    - libjsoncpp-dev
    - flex
    - bison
notifications:
  email: false
  irc:
    channels:
    - chat.freenode.net#connectal

  slack:
    secure: mQApKri2F2TZEyLEs530x+snMA8aDdL6o0e/HCVqk3t4pfSfj2OfPQ5edVrvIh+dsFjhX1GNDk94LSmZTS6AVCQ4+VPXORN1VjvB+xIeyP/PsIjSUoWqvS2V0t8CYV5K+5HRJq2H7tNmY4wxZYQnPAAGplsrKgJBxjccMhSqO30=


================================================
FILE: LICENSE.txt
================================================
Copyright (c) 2012 Nokia, Inc.
Copyright (c) 2013-2015 Quanta Research Cambridge, Inc.

Permission is hereby granted, free of charge, to any person
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use, copy,
modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.


================================================
FILE: Makefile
================================================
# Copyright (c) 2014 Quanta Research Cambridge, Inc
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#

include Makefile.version

export UDEV_RULES_DIR=/etc/udev/rules.d
UDEV_RULES=$(shell ls etc/udev/rules.d)
MODULES_LOAD_D_DIR=/etc/modules-load.d

all: pciedrivers scripts/syntax/parsetab.py
	echo version "$(VERSION)"

pciedrivers:
	(cd drivers/pcieportal; make)
	make -C pcie

pciedrivers-clean:
	(cd drivers/pcieportal; make clean)
	make -C pcie clean

ifneq ("$(DESTDIR)", "")
INSTALL_SHARED = install-shared
endif

install: $(INSTALL_SHARED)
	install -d -m755 $(DESTDIR)/$(UDEV_RULES_DIR) $(DESTDIR)/etc/modules-load.d
	if [ -d $(DESTDIR)/$(MODULES_LOAD_D_DIR) ]; then \
	    for fname in ./$(MODULES_LOAD_D_DIR)/* ; do \
		install -m644 $$fname $(DESTDIR)$(MODULES_LOAD_D_DIR) ; \
	    done; \
	fi
	echo 'Installing from' $(CURDIR)
	(cd drivers/pcieportal; CONNECTALDIR=$(CURDIR) make install)
	install -m644 etc/modules-load.d/connectal.conf $(DESTDIR)/etc/modules-load.d
	make -C pcie install
	install -d -m755 $(DESTDIR)$(UDEV_RULES_DIR)
	for fname in $(UDEV_RULES) ; do \
	    install -m644 etc/udev/rules.d/$$fname $(DESTDIR)$(UDEV_RULES_DIR) ; \
	done
ifeq ( _$(DESTDIR), _)
	service udev restart;
	rmmod portalmem;
	rmmod pcieportal;
	modprobe portalmem;
	modprobe pcieportal;
endif

INSTALL_DIRS = $(shell ls | grep -v debian)

install-shared:
	find $(INSTALL_DIRS) -type d -exec install -d -m755 $(DESTDIR)/usr/share/connectal/{} \; -print
	find $(INSTALL_DIRS) -type f -exec install -m644 {} $(DESTDIR)/usr/share/connectal/{} \; -print
	chmod agu+rx $(DESTDIR)/usr/share/connectal/scripts/*

uninstall:
	for fname in ./$(MODULES_LOAD_D_DIR)/* ; do \
	    rm -vf $(MODULES_LOAD_D_DIR)/`basename $$fname` ; \
	done;
	(cd drivers/pcieportal; make uninstall)
	make -C pcie/connectalutil uninstall
	for fname in $(UDEV_RULES) ; do \
	    rm -f $(UDEV_RULES_DIR)/$$fname ; \
	done
	service udev restart

docs:
	doxygen scripts/Doxyfile

spkg:
	git clean -fdx
	git checkout debian
	sed -i s/precise/precise/g debian/changelog
	gbp buildpackage --git-upstream-branch=master --git-debian-branch=ubuntu --git-ignore-new -S -tc '--git-upstream-tag=v%(version)s'
	git checkout debian
	sed -i s/precise/trusty/g debian/changelog
	gbp buildpackage --git-upstream-branch=master --git-debian-branch=ubuntu --git-ignore-new -S -tc '--git-upstream-tag=v%(version)s'
	git checkout debian
	sed -i s/precise/xenial/g debian/changelog
	gbp buildpackage --git-upstream-branch=master --git-debian-branch=ubuntu --git-ignore-new -S -tc '--git-upstream-tag=v%(version)s'
	git checkout debian
	sed -i s/precise/artful/g debian/changelog
	gbp buildpackage --git-upstream-branch=master --git-debian-branch=ubuntu --git-ignore-new -S -tc '--git-upstream-tag=v%(version)s'
	git checkout debian

upload:
	git push origin v$(VERSION)
	(cd  ../obs/home:jameyhicks:connectaldeb/connectal/; osc rm * || true)
	cp -v ../connectal_$(VERSION)*stable*.diff.gz ../connectal_$(VERSION)*stable*.dsc ../connectal_$(VERSION)*.orig.tar.gz ../obs/home:jameyhicks:connectaldeb/connectal/
	rm -fv ../connectal_$(VERSION)*stable*
	dput ppa:jamey-hicks/connectal ../connectal_$(VERSION)-*_source.changes
	(cd ../obs/home:jameyhicks:connectaldeb/connectal/; osc add *; osc commit -m $(VERSION) )
	(cd ../obs/home:jameyhicks:connectal/connectal; sed -i "s/>v.....</>v$(VERSION)</" _service; osc commit -m "v$(VERSION)" )

## PLY's home is http://www.dabeaz.com/ply/
install-dependencies: install-dependences

install-dependences:
ifeq ($(shell uname), Darwin)
	port install asciidoc
	easy_install ply
else
	if [ -f /usr/bin/yum ] ; then yum install gmp strace python-argparse python-ply python-gevent; else apt-get install libgmp10 strace python-ply python-gevent; fi
	if [ -f /usr/lib/x86_64-linux-gnu/libgmp.so ] ; then ln -sf /usr/lib/x86_64-linux-gnu/libgmp.so /usr/lib/x86_64-linux-gnu/libgmp.so.3 ; fi
	if [ ! -f /usr/lib64/libgmp.so.3 ] && [ -f /usr/lib64/libgmp.so.10 ] ; then ln -s /usr/lib64/libgmp.so.10 /usr/lib64/libgmp.so.3; fi
endif

install-python-example-dependences:
	sudo apt-get install python-dev

install-doc-dependences:
	apt-get install asciidoc python-setuptools
	easy_install blockdiag seqdiag actdiag nwdiag libusb1
	wget https://asciidoc-diag-filter.googlecode.com/files/diag_filter.zip
	asciidoc --filter install diag_filter.zip
	wget http://laurent-laville.org/asciidoc/bootstrap/bootstrap-3.3.0.zip
	asciidoc --backend install bootstrap-3.3.0.zip

BOARD=zedboard

scripts/syntax/parsetab.py: scripts/syntax.py
	[ -e out ] || mkdir out
	python3 scripts/syntax.py

allarchlist = ac701 zedboard zc702 zc706 kc705 vc707 zynq100 v2000t bluesim miniitx100 de5 htg4 vsim parallella xsim zybo kc705g2 vc707g2

#################################################################################################

KROOT_ZYNQ := $(PWD)/../linux-xlnx/

zynqdrivers:
	(cd drivers/zynqportal/; KROOT=$(KROOT_ZYNQ) make zynqportal.ko)
	(cd drivers/portalmem/;  KROOT=$(KROOT_ZYNQ) make portalmem.ko)

zynqdrivers-clean:
	(cd drivers/zynqportal/; KROOT=$(KROOT_ZYNQ) make clean)
	(cd drivers/portalmem/;  KROOT=$(KROOT_ZYNQ) make clean)

zynqdrivers-install:
	install -d -m755 $(DESTDIR)/usr/share/connectal-zynqdrivers/
	install -m644 drivers/zynqportal/zynqportal.ko drivers/portalmem/portalmem.ko $(DESTDIR)/usr/share/connectal-zynqdrivers/

# For the parallella build to work, the cross compilers need to be in your path
# and the parallella kernel needs to be parallel to connectal and built
KROOT_PAR  := $(PWD)/../parallella-linux/
parallelladrivers:
	(cd drivers/zynqportal/; CROSS_COMPILE=arm-linux-gnueabihf- KROOT=$(KROOT_PAR) make parallellazynqportal.ko)
	(cd drivers/portalmem/; CROSS_COMPILE=arm-linux-gnueabihf- KROOT=$(KROOT_PAR) make parallellaportalmem.ko)

parallelladrivers-clean:
	(cd drivers/zynqportal/;  CROSS_COMPILE=arm-linux-gnueabihf- KROOT=$(KROOT_ZYNQ) make clean)
	(cd drivers/portalmem/;   CROSS_COMPILE=arm-linux-gnueabihf- KROOT=$(KROOT_ZYNQ) make clean)

RUNPARAMTEMP=$(subst :, ,$(RUNPARAM):5555)
RUNIP=$(wordlist 1,1,$(RUNPARAMTEMP))
RUNPORT=$(wordlist 2,2,$(RUNPARAMTEMP))

zynqdrivers-adb:
	adb connect $(RUNPARAM)
	adb -s $(RUNIP):$(RUNPORT) shell pwd || true
	adb connect $(RUNPARAM)
	adb -s $(RUNIP):$(RUNPORT) root || true
	sleep 1
	adb connect $(RUNPARAM)
	adb -s $(RUNIP):$(RUNPORT) push drivers/zynqportal/zynqportal.ko /mnt/sdcard
	adb -s $(RUNIP):$(RUNPORT) push drivers/portalmem/portalmem.ko /mnt/sdcard
	adb -s $(RUNIP):$(RUNPORT) shell rmmod zynqportal
	adb -s $(RUNIP):$(RUNPORT) shell rmmod portalmem
	adb -s $(RUNIP):$(RUNPORT) shell insmod /mnt/sdcard/zynqportal.ko
	adb -s $(RUNIP):$(RUNPORT) shell insmod /mnt/sdcard/portalmem.ko

connectalspi-clean:
	(cd drivers/connectalspi/; KROOT=$(KROOT_ZYNQ) make clean)

connectalspi:
	(cd drivers/connectalspi/; KROOT=$(KROOT_ZYNQ) make connectalspi.ko)

connectalspi-adb: 
	adb connect $(RUNPARAM)
	adb -s $(RUNIP):$(RUNPORT) shell pwd || true
	adb connect $(RUNPARAM)
	adb -s $(RUNIP):$(RUNPORT) root || true
	sleep 1
	adb connect $(RUNPARAM)
	adb -s $(RUNIP):$(RUNPORT) push drivers/connectalspi/connectalspi.ko /mnt/sdcard
	adb -s $(RUNIP):$(RUNPORT) shell rmmod connectalspi
	adb -s $(RUNIP):$(RUNPORT) shell insmod /mnt/sdcard/connectalspi.ko
	adb -s $(RUNIP):$(RUNPORT) shell chmod 777 /dev/spi*

distclean: pciedrivers-clean
	for archname in $(allarchlist) ; do  \
	   rm -rf examples/*/"$$archname" tests/*/"$$archname"; \
	done
	rm -rf pcie/connectalutil/connectalutil tests/memread_manual/kernel/bsim_relay
	rm -rf out/ exit.status cpp/*.o scripts/*.pyc
	rm -rf tests/*/train-images-idx3-ubyte examples/*/train-images-idx3-ubyte
	rm -rf doc/library/build/ examples/rbm/datasets/
	rm -f doc/library/source/devguide/connectalbuild-1.png
	rm -rf tests/partial/variant2


================================================
FILE: Makefile.connectal
================================================
# Copyright (c) 2014 Quanta Research Cambridge, Inc
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#

CONNECTALDIR=$(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))
include $(CONNECTALDIR)/Makefile.version

V?=0
ifeq ($(V),0)
Q=@
VERBOSE_SWITCH=
else
Q=
VERBOSE_SWITCH=--verbose
endif

#PROJECTDIR?=$(BOARD)

bozotarget:
	@echo "Makefile.connectal: please invoke with make gen.boardname"

VARIANT_PROJECTS := $(foreach item,$(VARIANT_LIST),variantgen.$(item))
#
## use "make gen.board" to generate the build directory
gen.%:
ifeq ($(BOARD),)
	$(eval BOARD := $*)
endif
ifeq ($(PROJECTDIR),)
	$(eval PROJECTDIR := $*)
endif
	+BOARD=$(BOARD) PROJECTDIR=$(PROJECTDIR) $(MAKE) --no-print-directory gentarget prebuild $(VARIANT_PROJECTS)

variantgen.%:
	BOARD=$(BOARD) PROJECTDIR=variant$* \
	    VARIANT=$* PRTOP_FILE=../$(BOARD)/Impl/TopDown/top-post-route.dcp \
	    $(MAKE) --no-print-directory gentarget prebuild

build.%: gen.%
	$(MAKE) -C $(PROJECTDIR) --no-print-directory all

verilog.%: gen.%
	$(MAKE) -C $(PROJECTDIR) --no-print-directory verilog
exe.%: gen.%
	$(MAKE) -C $(PROJECTDIR) --no-print-directory exe
bits.%: verilog.%
	$(MAKE) -C $(PROJECTDIR) --no-print-directory bits

run.%:
ifeq ($(PROJECTDIR),)
	$(eval PROJECTDIR := $*)
endif
	$(MAKE) -C $(PROJECTDIR) --no-print-directory run

IPDIR?=$(CONNECTALDIR)/out
NUMBER_OF_USER_TILES?=1
SLAVE_DATA_BUS_WIDTH?=32
SLAVE_CONTROL_ADDR_WIDTH?=5
PLATFORM_NUMBER_OF_MASTERS?=1
PIN_TYPE?=Empty
PIN_TYPE_INCLUDE?=Misc
#need to import into HostInterface, can't use HostInterface

ifndef BURST_LEN_SIZE
BURST_LEN_SIZE=10
endif

CONNECTALFLAGS += -D ConnectalVersion=$(VERSION)
CONNECTALFLAGS += -D NumberOfMasters=$(PLATFORM_NUMBER_OF_MASTERS) -D PinType=$(PIN_TYPE) -D PinTypeInclude=$(PIN_TYPE_INCLUDE)
CONNECTALFLAGS += -D NumberOfUserTiles=$(NUMBER_OF_USER_TILES)
CONNECTALFLAGS += -D SlaveDataBusWidth=$(SLAVE_DATA_BUS_WIDTH)
CONNECTALFLAGS += -D SlaveControlAddrWidth=$(SLAVE_CONTROL_ADDR_WIDTH)
CONNECTALFLAGS += -D BurstLenSize=$(BURST_LEN_SIZE)
CONNECTALFLAGS += --ipdir=$(IPDIR)
CNOC?=$(shell grep -q CnocTop $(CONNECTALDIR)/boardinfo/$(BOARD).json && echo --cnoc)
USE_CNOC?=$(shell grep -q SIMULATION $(CONNECTALDIR)/boardinfo/$(BOARD).json && echo cnoc)
ifneq ($(AUTOTOP),)
USE_AUTOTOP = 1
endif
ifneq ($(S2H_INTERFACES),)
USE_AUTOTOP = 1
endif
ifneq ($(H2S_INTERFACES),)
USE_AUTOTOP = 1
endif
ifneq ($(MEM_INTERFACES),)
$(error Convert use of MEM_INTERFACES into MEM_READ_INTERFACES and MEM_WRITE_INTERFACES)
endif
ifneq ($(MEM_READ_INTERFACES),)
USE_AUTOTOP = 1
endif
ifneq ($(MEM_WRITE_INTERFACES),)
USE_AUTOTOP = 1
endif

INTERFACES += MemServerRequest MMURequest MemServerIndication MMUIndication
BSVFILES += $(CONNECTALDIR)/bsv/ConnectalMemory.bsv
ifneq ($(NUMBER_OF_MASTERS), 0)
CPPFILES += $(CONNECTALDIR)/cpp/dmaManager.c $(CONNECTALDIR)/cpp/platformMemory.cpp
CPPFILES2_dma = $(CONNECTALDIR)/cpp/dmaManager.c $(CONNECTALDIR)/cpp/platformMemory.cpp
endif

INTERFACES_cnoc = XsimMsgRequest XsimMsgIndication
CPPFILES_cnoc   = $(CONNECTALDIR)/cpp/transportXsim.c
BSVFILES_cnoc   = $(CONNECTALDIR)/bsv/XsimIF.bsv
CPPFILES2_cnoc  = $(CONNECTALDIR)/cpp/transportXsim.c

INTERFACES += $(INTERFACES_$(USE_CNOC))
CPPFILES   += $(CPPFILES_$(USE_CNOC))
BSVFILES   += $(BSVFILES_$(USE_CNOC))

ifneq ($(PYFILES),)
CONNECTALFLAGS += --shared -D PORTAL_JSON
CPPFILES += $(CONNECTALDIR)/cpp/portalPython.cpp
CPPFILES2 = $(CONNECTALDIR)/cpp/runpython.cpp
ifneq ($(BOARD),zedboard)
ifneq ($(BOARD),zedboard_ubuntu)
CONNECTALFLAGS += -ljsoncpp
endif
endif

ifeq ($(BOARD),zedboard)
## git clone git://github.com/cambridgehackers/python-for-android-sdk
PYTHON_FOR_ANDROID ?= $(CONNECTALDIR)/../python-for-android-sdk
CONNECTALFLAGS += -I$(PYTHON_FOR_ANDROID)/include/ -I.
CONNECTALFLAGS += -L$(PYTHON_FOR_ANDROID)/lib -lpython2.7
CONNECTALFLAGS += --stl=gnustl_static --cxxflags=-fexceptions --android-toolchain=4.8

CPPFILES  += jsoncpp/dist/jsoncpp.cpp
CPPFILES2 += jsoncpp/dist/jsoncpp.cpp

prebuild::
	[ -d jsoncpp ] || git clone git://github.com/open-source-parsers/jsoncpp
	cd jsoncpp; python3 amalgamate.py; mkdir -p json; cd json; ln -sf ../dist/json/*.h .
endif #zedboard

ifeq ($(BOARD),zedboard_ubuntu)
CONNECTALFLAGS += --cxxflags=-std=c++11
CONNECTALFLAGS += -I usr/include
CONNECTALFLAGS += -L usr/lib/arm-linux-gnueabihf -lpython2.7

CPPFILES  += jsoncpp/dist/jsoncpp.cpp
CPPFILES2 += jsoncpp/dist/jsoncpp.cpp

prebuild::
	[ -d jsoncpp ] || git clone git://github.com/open-source-parsers/jsoncpp
	cd jsoncpp; python3 amalgamate.py; mkdir -p json; cd json; ln -sf ../dist/json/*.h .
endif # zedboard_ubuntu
endif # PYFILES

ifneq ($(CPPFILES2),)
ALL_CPPFILES2 = $(CPPFILES2) $(CPPFILES2_$(USE_CNOC)) $(CPPFILES2_dma)
endif

all bits verilog implementation bsim xsim vsim xsimrun: gentarget prebuild
	+make -C $(PROJECTDIR) --no-print-directory $@

android.exe bsim_exe ubuntu.exe exe: gentarget
	+make -C $(PROJECTDIR) --no-print-directory $@

ZYNQ_MPSOC=$(shell jq -r .options.ZYNQ_MPSOC < $(CONNECTALDIR)/boardinfo/$(BOARD).json)
PCIEGEN=$(shell jq -r .options.need_pcie < $(CONNECTALDIR)/boardinfo/$(BOARD).json | sed 's/.*gen\([123]\).*/\1/')
NEED_XILINX_PCIE_ac701=$(PCIEGEN)
NEED_XILINX_PCIE_ac701g2=$(PCIEGEN)
NEED_XILINX_PCIE_kc160g2=$(PCIEGEN)
NEED_XILINX_PCIE_kc705g2=$(PCIEGEN)
NEED_XILINX_PCIE_vc707g2=$(PCIEGEN)
NEED_XILINX_PCIE_kc705=$(PCIEGEN)
NEED_XILINX_PCIE_vc707=$(PCIEGEN)
NEED_XILINX_PCIE_kcu105=3u
NEED_XILINX_PCIE_vcu108=3u
NEED_XILINX_PCIE_zcu102=3u
NEED_XILINX_PCIE_nfsume=3
NEED_XILINX_PCIE_vc709=3
NEED_XILINX_PCIE_v2000t=1
NEED_XILINX_PCIE_vcu118=3u_plus

NEED_ALTERA_PCIE_de5=1
NEED_ALTERA_PCIE_htg4=1

NEED_ALTERA_ETH_de5=1
NEED_ALTERA_ETH_htg4=1
QUARTUS_SH=$(shell which quartus_sh)

ifeq ($(NEED_XILINX_PCIE_$(BOARD)),1)
#    FPGAMAKE_CONNECTALFLAGS += -P mkPcieEndpointX7 -P mkPcieHost
    CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/pcie_7x_0/pcie_7x_0.xci
    CONNECTALFLAGS += --bscflags="+RTS -K46777216 -RTS"
endif
ifeq ($(PCIEGEN),2)
    FPGAMAKE_CONNECTALFLAGS += -P mkPcieHost
    CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/pcie2_7x_0/pcie2_7x_0.xci
    CONNECTALFLAGS += --bscflags="+RTS -K46777216 -RTS"
endif

ifeq ($(NEED_XILINX_PCIE_$(BOARD)),3)
    FPGAMAKE_CONNECTALFLAGS += -P mkPcieHost
    CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/pcie3_7x_0/pcie3_7x_0.xci
    CONNECTALFLAGS += --bscflags="+RTS -K46777216 -RTS"
endif
ifeq ($(NEED_XILINX_PCIE_$(BOARD)),3u)
    CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/pcie3_ultrascale_0/pcie3_ultrascale_0.xci
    CONNECTALFLAGS += --bscflags="+RTS -K46777216 -RTS"
endif
ifeq ($(NEED_XILINX_PCIE_$(BOARD)),3u_plus)
    CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/pcie_uscale_plus_0/pcie_uscale_plus_0.xci
    CONNECTALFLAGS += --bscflags="+RTS -K46777216 -RTS"
endif

ifeq ($(NEED_ALTERA_PCIE_$(BOARD)),1)
	FPGAMAKE_CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/synthesis/altera_pcie_reconfig_driver_wrapper/altera_pcie_reconfig_driver_wrapper.qip
	FPGAMAKE_CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/synthesis/altera_pcie_sv_hip_ast_wrapper/altera_pcie_sv_hip_ast_wrapper.qip
	FPGAMAKE_CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/synthesis/alt_xcvr_reconfig_wrapper/alt_xcvr_reconfig_wrapper.qip
	#FPGAMAKE_CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/siv_gen2x8/siv_gen2x8.qip
	FPGAMAKE_CONNECTALFLAGS += --tcl=$(PROJECTDIR)/generatedbsv/$(BOARD).qsf
	FPGAMAKE_CONNECTALFLAGS += --tcl=$(CONNECTALDIR)/constraints/altera/$(BOARD).sdc
	CONNECTALFLAGS += --bscflags="+RTS -K46777216 -RTS -demote-errors G0066:G0045 -suppress-warnings G0046:G0020:S0015:S0080:S0039"
endif
ifeq ($(ZYNQ_MPSOC),zynq_ultra_ps_e)
    CONNECTALFLAGS += --xci=$(IPDIR)/$(BOARD)/zynq_ultra_ps_e_0/zynq_ultra_ps_e_0.xci
endif

CONNECTALFLAGS += $(FPGAMAKE_CONNECTALFLAGS)
ifeq ($(USE_BUILDCACHE),1)
BUILDCACHE?=$(CONNECTALDIR)/../buildcache/buildcache
BUILDCACHE_CACHEDIR?=$(CONNECTALDIR)/../fpgamake-cache/$(shell basename `/bin/pwd`)/$(PROJECTDIR)
CONNECTALFLAGS += --cache=$(BUILDCACHE_CACHEDIR)
endif

CONNECTALFLAGS += $(EXTRA_CONNECTALFLAGS)

ifeq ($(USE_PRINTF),1)
PRINTF_EXTRA=$(PROJECTDIR)/generatedbsv/DisplayInd.bsv
else
PRINTF_EXTRA=$(CONNECTALDIR)/bsv/DisplayInd.bsv
endif

ifneq ($(USE_AUTOTOP),)
GPROJ = $(PROJECTDIR)/generatedbsv
GENTOP = $(GPROJ)/IfcNames.bsv
endif

comma := ,
gentarget:: process_autotop generate_altera_custom
	@[ -e $(CONNECTALDIR)/scripts/syntax/parsetab.py ] || make -C $(CONNECTALDIR) scripts/syntax/parsetab.py
ifeq ($(USE_PRINTF),1)
	$(CONNECTALDIR)/scripts/preprocess_trace.py $(PROJECTDIR) $(BSVFILES)
endif
	$(Q)$(CONNECTALDIR)/scripts/makefilegen.py -B$(BOARD) --project-dir $(PROJECTDIR) \
	$(foreach interfaces, $(INTERFACES), -interfaces $(interfaces)) \
	$(foreach f, $(CPPFILES), --source $f) \
	$(foreach f, $(ALL_CPPFILES2), --source2 $f) \
	$(foreach f, $(BSVPATH), --bsvpath $f) \
	$(foreach f, $(PINOUT_FILE), --pinout $f) \
	$(foreach f, $(PIN_BINDINGS), --pin-binding $f) \
	$(foreach f, $(PRTOP_FILE), --prtop $f) \
	$(foreach f, $(VARIANT_LIST), --prvariant $f) \
	$(foreach f, $(RECONFIG_MODULE), --reconfig $f) \
	$(foreach f, $(S2H_INTERFACES), -interfaces $(word 1, $(subst /,, $(subst :, , $f)))) \
	$(foreach f, $(H2S_INTERFACES), $(foreach g, $(subst $(comma), , $(word 2, $(subst :, , $f))), -interfaces $g)) \
	$(foreach f, $(PORTAL_DUMP_MAP), --dump_map $f) \
        $(CONNECTALFLAGS) $(BSVFILES) $(GENTOP) $(PRINTF_EXTRA) $(VERBOSE_SWITCH)

process_autotop::
	$(Q)[ -e $(PROJECTDIR) ] || mkdir -p $(PROJECTDIR)
	touch $(PROJECTDIR)/Makefile.autotop
ifneq ($(USE_AUTOTOP),)
	$(Q)[ -e $(GPROJ) ] || mkdir -p $(GPROJ)
	$(Q)$(CONNECTALDIR)/scripts/topgen.py --project-dir $(GPROJ) $(AUTOTOP) $(CNOC) \
	    $(foreach f, $(S2H_INTERFACES), --wrapper $f) \
	    $(foreach f, $(H2S_INTERFACES), --proxy $f)   \
	    $(foreach f, $(MEM_READ_INTERFACES), --memread $f)   \
	    $(foreach f, $(MEM_WRITE_INTERFACES), --memwrite $f)
endif

generate_altera_custom::
ifneq ($(PIN_BINDINGS), )
ifneq ($(filter $(BOARD), de5 htg4), )
	$(Q)[ -e $(PROJECTDIR)/generatedbsv ] || mkdir -p $(PROJECTDIR)/generatedbsv
	$(CONNECTALDIR)/scripts/generate-constraints.py -f altera \
		$(foreach f, $(PIN_BINDINGS), -b $f) \
		-o $(PROJECTDIR)/generatedbsv/$(BOARD).qsf \
		--boardfile $(CONNECTALDIR)/boardinfo/$(BOARD).json --pinoutfile $(PINOUT_FILE)
endif
else
	$(Q) if [ -e $(CONNECTALDIR)/constraints/altera/$(BOARD).qsf ]; then cp $(CONNECTALDIR)/constraints/altera/$(BOARD).qsf $(PROJECTDIR)/generatedbsv/$(BOARD).qsf; fi
endif

prebuild::
	@# additional steps needed before making verilog etc
ifneq ($(NEED_XILINX_PCIE_$(BOARD)),)
	@echo "building ... $(BOARD) PCIe gen$(PCIEGEN)"
	$(Q)[ -e $(IPDIR) ] || mkdir -p $(IPDIR)
	cd $(PROJECTDIR); BUILDCACHE_CACHEDIR=$(BUILDCACHE_CACHEDIR) $(BUILDCACHE) vivado -notrace -mode batch -source $(shell cd $(CONNECTALDIR); /bin/pwd)/scripts/connectal-synth-pcie.tcl
endif
ifeq ($(ZYNQ_MPSOC),zynq_ultra_ps_e)
	@echo "building ... $(BOARD) Zynq MPSOC core"
	$(Q)[ -e $(IPDIR) ] || mkdir -p $(IPDIR)
	cd $(PROJECTDIR); BUILDCACHE_CACHEDIR=$(BUILDCACHE_CACHEDIR) $(BUILDCACHE) vivado -notrace -mode batch -source $(shell cd $(CONNECTALDIR); /bin/pwd)/scripts/connectal-synth-zynq-mpsoc.tcl
endif

ifneq (, $(QUARTUS_SH))
# Synthesis Altera PCIe Core and PLL
ifeq ($(NEED_ALTERA_PCIE_$(BOARD)),1)
	cd $(PROJECTDIR); BUILDCACHE_CACHEDIR=$(BUILDCACHE_CACHEDIR) $(BUILDCACHE) $(QUARTUS_SH) -t $(shell cd $(CONNECTALDIR); /bin/pwd)/scripts/connectal-synth-pcie.tcl
endif

# Synthesize Altera Ethernet Core
ifeq ($(NEED_ALTERA_ETH_$(BOARD)), 1)
	cd $(PROJECTDIR); BUILDCACHE_CACHEDIR=$(BUILDCACHE_CACHEDIR) $(BUILDCACHE) $(QUARTUS_SH) -t $(shell cd $(CONNECTALDIR); /bin/pwd)/scripts/connectal-synth-eth.tcl
endif
endif



================================================
FILE: Makefile.version
================================================
VERSION=22.05.23b


================================================
FILE: README.md
================================================
Connectal
====


Connectal provides a hardware-software interface for applications split
between user mode code and custom hardware in an FPGA.  Portal can
automatically build the software and hardware glue for a message based
interface and also provides for configuring and using shared memory
between applications and hardware. Communications between hardware and
software are provided by a bidirectional flow of events and regions of
memory shared between hardware and software.  Events from software to
hardware are called requests and events from hardware to software are
called indications, but in fact they are symmetric.

A logical request/indication pair is referred to as a portal".  An
application can make use of multiple portals, which may be specified
independently. A portal is specified by a BSV interface declaration,
from which `connectalgen` generates BSV and C++ wrappers and
proxies.

Connectal has a mailing list:
   https://groups.google.com/forum/#!forum/connectal

See the documentation for more details:
   http://www.connectal.org/doc/current/ref/

Supported Platforms
-------------------

Connectal supports Android on Zynq platforms, including zedboard and zc702.

Connectal supports Linux on x86 with PCIe-attached Virtex and Kintex boards (vc707, kc705).

Connectal supports bluesim as a simulated hardware platform. 


Installation
------------

1. Install the Bluespec compiler. Connectal is known to work with 2014.07.A and 2015.05.beta1

Install the bluespec compiler. Make sure the BLUESPECDIR environment
variable is set appropriately:

    export BLUESPECDIR=~/bluespec/Bluespec-2014.07.A/lib

2. Install Vivado 2015.2 or 2015.4

3. Install Connectal

       sudo add-apt-repository -y ppa:jamey-hicks/connectal
       sudo apt-get update
       sudo apt-get -y install connectal

Building from Source
--------------------

1. Checkout out the following from github:

       git clone git://github.com/cambridgehackers/connectal

   If you are generating code for an FPGA, check out fpgamake:

       git clone git://github.com/cambridgehackers/fpgamake

   It appears that this requires buildcache to be checked out also:

       git clone git://github.com/cambridgehackers/buildcache

   Add `USE_BUILDCACHE=1` to your calls to make to enable it to cache, otherwise it will rerun all compilation steps.

2. Install connectal dependences. This installs ubuntu packages used by connectal or during compilation:

       cd connectal;
       sudo make install-dependences

3. If you are using an FPGA attached to your machine, install the drivers:

       make all
       sudo make install


Preparation for Zynq
--------------------

0. Get [http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2015-2.html](Vivado 2015.2)


1. Download the Android Native Development Kit (NDK) from: 
     http://developer.android.com/tools/sdk/ndk/index.html
     (actual file might be:
         http://dl.google.com/android/ndk/android-ndk-r10e-linux-x86_64.tar.bz2
     )

   Connectal uses NDK to compile code to run on Zynq platforms.

   Add the NDK to your PATH.

       URL=http://dl.google.com/android/ndk/android-ndk-r10e-linux-x86_64.tar.bz2
       curl -O `basename $URL` $URL
       tar -jxvf `basename $URL`
       PATH=$PATH:/scratch/android-ndk-r10e/

2. Download and install ADB from the Android Development Tools.

   The Android Debug Bridge (adb) is packaged in platform-tools. Connectal
   uses [adb](http://developer.android.com/tools/help/adb.html) to
   transfer files to and from the Zedboard over ethernet and to run
   commands on the Zedboard.

   User your browser to accept the conditions and download the SDK installation tarball:

       http://dl.google.com/android/android-sdk_r22.6.2-linux.tgz

   Unpack the installation tarball:

       tar -zxvf android-sdk_r22.6.2-linux.tgz

   Run the `android` tool to install SDK components

       ./android-sdk-linux/tools/android

   Deselect all components except for "Android SDK Platform-Tools" [(screenshot)](doc/android-sdk-screenshots/android-sdk-manager.png) and
   then click the "Install ... package" button to install [(screenshot)](doc/android-sdk-screenshots/android-sdk-license.png) and then
   accept the license. [(screenshot)](doc/android-sdk-screenshots/android-sdk-manager-log.png)

   Add adb to your path:

       PATH=$PATH:$PWD/android-sdk-linux/platform-tools

3. Create/obtain a boot.bin and SD card image for your board

Follow the instructions at https://github.com/cambridgehackers/zynq-boot

Copy the files to the SD card, eject the card from the PC, and plug it into the zedboard/zc702/zc706 and boot.


Preparation for Kintex and Virtex boards
----------------------------------------

0. Get [http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2013-2.html](Vivado 2013.2)

1. Install the drivers

       make
       sudo make install
       sudo modprobe portalmem

2. Get fpgajtag

       git clone git://github.com/cambridgehackers/fpgajtag
       cd fpgajtag
       make all && sudo make install

Examples
--------

Generally cd to the project directory, then type

    cd examples/examplename
    make build.<target>
    make run.<target>

where target is

Command suffix | Function
--------------|----------
bluesim | compile for simulation
zedboard| compile for zedboard
zybo| compile for zybo
zc702| compile for zc702 board
zc706| compile for zc706 board
kc705| compile for kc705 board
vc707| compile for vc707 board
vc709| compile for vc709 board
nfsume| compile for NetFPGA-SUME board

To turn on more verbosity for debugging when running make,
add V=1 to command line, as

    make examples/examplename.<something> V=1
or

    V=1 make examples/examplename.<something>

To run the example on a machine different than the build machine, use RUNPARAM=hostname-or-addr:

    make RUNPARAM=zedtest run.zedboard
    make RUNPARAM=192.168.1.123 run.vc707

### Bitstream Packaging


The FPGA bitstream is included in the application executable, and the
FPGA is automatically programmed when the application is run:

    cd examples/echo
    make build.vc707
    ./vc707/bin/ubuntu.exe

We are running Android on the Zynq devices and so the application
executable is called android.exe.

### Echo Example


    ## this has only been tested with the Vivado 2013.2 release
    . Xilinx/Vivado/2013.2/settings64.sh

    make -C examples/echo build..zedboard
or

    make -C examples/echo build.zc702
or

    make -C examples/echo build.kc705
or

    make -C examples/echo build.vc707

To run on a zedboard with IP address aa.bb.cc.dd:

    RUNPARAM=aa.bb.cc.dd make -C examples/echo run.zedboard

### Memcpy Example

    make -C examples/memcpy build.vc707


[![Analytics](https://ga-beacon.appspot.com/UA-15845210-3/connectal/README.md)](https://github.com/igrigorik/ga-beacon)


================================================
FILE: boardinfo/ac701.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Artix7",  "PCIE", "PCIE1", "PcieHostInterface", "PhysAddrWidth=40", "PcieLanes=4",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7a200tfbg676-2",
        "need_pcie" : "x7_gen1x8",
        "TOP" : "PcieTop",
        "constraints": [],
        "implconstraints": ["constraints/xilinx/ac701.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=8", "--derivedclockperiod=4", "--pcieclockperiod=8"],
        "rewireclockstring" : ""
    },
    "uart": {
		"d_in": {
			"PACKAGE_PIN": "T19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"d_out": {
			"PACKAGE_PIN": "U19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		},
		"rts": {
			"PACKAGE_PIN": "V19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"cts": {
			"PACKAGE_PIN": "W19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		}
    },
    "sdio": {
        "dat0": {
            "PACKAGE_PIN": "P19",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat1": {
            "PACKAGE_PIN": "N19",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat2": {
            "PACKAGE_PIN": "P23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "cd_dat3": {
            "PACKAGE_PIN": "P21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "clk": {
            "PACKAGE_PIN": "N24",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "OUTPUT"
        },
        "cmd": {
            "PACKAGE_PIN": "N23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "sddet": {
            "PACKAGE_PIN": "P24",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        },
        "sdwp": {
            "PACKAGE_PIN": "R20",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        }
    },
    "fmc": {
    }
}


================================================
FILE: boardinfo/ac701_untethered.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Artix7", "PhysAddrWidth=40", "PcieLanes=4", "UNTETHERED=1",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7a200tfbg676-2",
        "TOP" : "UntetheredTop",
        "constraints": [],
        "implconstraints": ["constraints/xilinx/ac701.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=8", "--derivedclockperiod=4", "--pcieclockperiod=8"],
        "rewireclockstring" : ""
    },
    "uart": {
		"d_in": {
			"PACKAGE_PIN": "T19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"d_out": {
			"PACKAGE_PIN": "U19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		},
		"rts": {
			"PACKAGE_PIN": "V19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"cts": {
			"PACKAGE_PIN": "W19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		}
    },
    "sdio": {
        "dat0": {
            "PACKAGE_PIN": "P19",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat1": {
            "PACKAGE_PIN": "N19",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat2": {
            "PACKAGE_PIN": "P23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "cd_dat3": {
            "PACKAGE_PIN": "P21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "clk": {
            "PACKAGE_PIN": "N24",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "OUTPUT"
        },
        "cmd": {
            "PACKAGE_PIN": "N23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "sddet": {
            "PACKAGE_PIN": "P24",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        },
        "sdwp": {
            "PACKAGE_PIN": "R20",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        }
    },
    "fmc": {
    },
    "pins": {
	"cpu_reset": {
	    "PACKAGE_PIN": "U4",
	    "IOSTANDARD": "LVCMOS15",
	    "PIO_DIRECTION": "INPUT"
	}
    }	
}


================================================
FILE: boardinfo/ac701g2.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Artix7",  "PCIE", "PCIE2", "PcieHostInterface", "PhysAddrWidth=40", "PcieLanes=4",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7a200tfbg676-2",
        "need_pcie" : "x7_gen2x8",
        "TOP" : "PcieTop",
        "constraints": ["constraints/xilinx/ac701.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "implconstraints": ["constraints/xilinx/ac701.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=4", "--derivedclockperiod=4", "--pcieclockperiod=4"],
        "rewireclockstring" : ""
    },
    "fmc": {
    }
}


================================================
FILE: boardinfo/asic.json
================================================
{
    "options": {
        "os" : "ubuntu",
        "partname" : "asic",
	"rewireclockstring" : "",
        "TOP" : "AsicTop",
	"bsvdefines": ["ASIC", "CnocTop", "XsimHostInterface", "PhysAddrWidth=32"],
        "CONNECTALFLAGS" : ["--mainclockperiod=20", "--derivedclockperiod=10"],
        "need_pcie" : "unused"
    }
}




================================================
FILE: boardinfo/awsf1.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "VirtexUltrascale", "PhysAddrWidth=40", "DataBusWidth=512", "XsimHostInterface", "AWSF1=1",
			"MemTagSize=16", "MemServerTags=8",
			"DEFAULT_NOPROGRAM=1",
		       	"CONNECTAL_BITS_DEPENDENCES=build/checkpoints/to_aws/mkTop.SH_CL_routed.dcp", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.aws"],
        "os" : "ubuntu",
        "partname" : "xcvu9p-flgb2104-2-i",
        "TOP" : "AwsF1Top",
        "constraints": ["constraints/xilinx/awsf1.xdc"],
        "implconstraints": ["constraints/xilinx/awsf1.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=8", "--derivedclockperiod=8", "--pcieclockperiod=8"],
        "rewireclockstring" : ""
    },
    "pins": {
	}
}




================================================
FILE: boardinfo/bluesim.json
================================================
{
    "options": {
        "os" : "ubuntu",
        "partname" : "xc7z020clg484-1",
        "rewireclockstring" : "tclzynqrewireclock",
        "TOP" : "XsimTop",
	"bsvdefines": ["CnocTop", "XsimHostInterface", "PhysAddrWidth=40", "SIMULATION",
		       	"CONNECTAL_BITS_DEPENDENCES=bsim"],
        "CONNECTALFLAGS" : ["--mainclockperiod=20", "--derivedclockperiod=10"],
        "need_pcie" : "unused"
    },
    "fmc": {
    "CLK0_M2C_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "CLK0_M2C_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA00_n_CC": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA00_p_CC": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA01_n_CC": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA05_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA05_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA07_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA07_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA08_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA08_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA09_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA09_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA10_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA10_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA11_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA11_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA12_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA12_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA13_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA13_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA14_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA14_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA15_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA15_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA16_n": { "LOC": "ZZZ", "IOSTANDARD": "YY" },
    "LA16_p": { "LOC": "ZZZ", "IOSTANDARD": "YY" }
    },
    "pins": {
    "GPIO_sw_left":   {"PACKAGE_PIN": "XXXX","IOSTANDARD": "YYYY","slew": "ZZZZ","PIO_DIRECTION": "INPUT"},
    "GPIO_sw_center": {"PACKAGE_PIN": "XXXX","IOSTANDARD": "YYYY","slew": "ZZZZ","PIO_DIRECTION": "INPUT"},
    "GPIO_sw_right":  {"PACKAGE_PIN": "XXXX","IOSTANDARD": "YYYY","slew": "ZZZZ","PIO_DIRECTION": "INPUT"},
    "GPIO_sw_down":   {"PACKAGE_PIN": "XXXX","IOSTANDARD": "YYYY","slew": "ZZZZ","PIO_DIRECTION": "INPUT"},
    "GPIO_sw_up":     {"PACKAGE_PIN": "XXXX","IOSTANDARD": "YYYY","slew": "ZZZZ","PIO_DIRECTION": "INPUT"}
    },
    "pmoda" : {
        "J1" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J2" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J3" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J4" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J7" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J8" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J9" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J10" : { "LOC" : "XX", "IOSTANDARD" : "YY"}
    },
    "pmodb" : {
        "J1" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J2" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J3" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J4" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J7" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J8" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J9" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J10" : { "LOC" : "XX", "IOSTANDARD" : "YY"}
    },
    "pmodc" : {
        "J1" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J2" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J3" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J4" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J7" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J8" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J9" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J10" : { "LOC" : "XX", "IOSTANDARD" : "YY"}
    },
    "pmodd" : {
        "J1" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J2" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J3" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J4" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J7" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J8" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J9" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J10" : { "LOC" : "XX", "IOSTANDARD" : "YY"}
    },
    "pmode" : {
        "J1" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J2" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J3" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J4" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J7" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J8" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J9" : { "LOC" : "XX", "IOSTANDARD" : "YY"},
        "J10" : { "LOC" : "XX", "IOSTANDARD" : "YY"}
    },
    "leds" : {
    	"L0" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     },
    	"L1" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     },
    	"L2" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     },
    	"L3" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     },
    	"L4" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     },
    	"L5" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     },
    	"L6" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     },
    	"L7" : {
	     "LOC" : "XX",
             "IOSTANDARD" : "YY",
	     "PIO_DIRECTION" : "OUTPUT"
	     }
    }
}




================================================
FILE: boardinfo/cvc.json
================================================
{
    "options": {
        "os" : "ubuntu",
        "partname" : "xc7z020clg484-1",
        "rewireclockstring" : "tclzynqrewireclock",
        "TOP" : "XsimTop",
	"bsvdefines": ["CnocTop", "XsimHostInterface", "PhysAddrWidth=40", "SIMULATION", "SVDPI",
		       	"CONNECTAL_BITS_DEPENDENCES=cvcsim"],
        "CONNECTALFLAGS" : ["--mainclockperiod=20", "--derivedclockperiod=10"],
        "need_pcie" : "unused"
    }
}




================================================
FILE: boardinfo/de5.json
================================================
{
    "options": {
        "bsvdefines" : ["ALTERA=1", "StratixV", "PCIE", "PCIE_NO_BSCAN", "PcieHostInterface", "PhysAddrWidth=40", "NUMBER_OF_LEDS=4", "NUMBER_OF_10G_PORTS=4", "SYNTHESIS", "PcieLanes=8", "DEFAULT_NOPROGRAM=1",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest.altera"],
        "os" : "ubuntu",
        "partname" : "5SGXEA7N2F45C2",
        "need_pcie" : "s5_gen2x8",
        "TOP" : "PcieTop",
        "constraints": ["constraints/altera/de5.sdc"],
        "runscript" : "run.pcietest.altera",
        "CONNECTALFLAGS" : ["--mainclockperiod=8", "--derivedclockperiod=4", "--pcieclockperiod=8"],
        "rewireclockstring" : ""
    },
    "BUTTON": {
        "BUTTON[0]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AK15"
        }, 
        "BUTTON[1]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AK14"
        }, 
        "BUTTON[2]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AL14"
        }, 
        "BUTTON[3]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AL15"
        }
    }, 
    "I2C": {
        "CLOCK_SCL": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE15"
        }, 
        "CLOCK_SDA": {
            "PIO_DIRECTION": "BIDIR",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE16"
        }
    }, 
    "CPU": {
        "CPU_RESET_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BC37"
        }
    }, 
    "DDR3A": {
        "DDR3A_A[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M39"
        }, 
        "DDR3A_A[10]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M38"
        }, 
        "DDR3A_A[11]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C37"
        }, 
        "DDR3A_A[12]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K36"
        }, 
        "DDR3A_A[13]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M33"
        }, 
        "DDR3A_A[14]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K34"
        }, 
        "DDR3A_A[15]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B38"
        }, 
        "DDR3A_A[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L35"
        }, 
        "DDR3A_A[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N38"
        }, 
        "DDR3A_A[3]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L36"
        }, 
        "DDR3A_A[4]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H36"
        }, 
        "DDR3A_A[5]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K29"
        }, 
        "DDR3A_A[6]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D37"
        }, 
        "DDR3A_A[7]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K35"
        }, 
        "DDR3A_A[8]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K32"
        }, 
        "DDR3A_A[9]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K37"
        }, 
        "DDR3A_BA[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M37"
        }, 
        "DDR3A_BA[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P39"
        }, 
        "DDR3A_BA[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J36"
        }, 
        "DDR3A_CAS_n": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M36"
        }, 
        "DDR3A_CKE[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E36"
        }, 
        "DDR3A_CKE[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B35"
        }, 
        "DDR3A_CK[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_G37"
        }, 
        "DDR3A_CK[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_J37"
        }, 
        "DDR3A_CK_n[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_F36"
        }, 
        "DDR3A_CK_n[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_H37"
        }, 
        "DDR3A_CS_n[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P36"
        }, 
        "DDR3A_CS_n[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R28"
        }, 
        "DDR3A_DM[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C36"
        }, 
        "DDR3A_DM[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E32"
        }, 
        "DDR3A_DM[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H34"
        }, 
        "DDR3A_DM[3]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L32"
        }, 
        "DDR3A_DM[4]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N32"
        }, 
        "DDR3A_DM[5]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W32"
        }, 
        "DDR3A_DM[6]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K30"
        }, 
        "DDR3A_DM[7]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T28"
        }, 
        "DDR3A_DQS[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_C34"
        }, 
        "DDR3A_DQS[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_C31"
        }, 
        "DDR3A_DQS[2]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_H35"
        }, 
        "DDR3A_DQS[3]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_U35"
        }, 
        "DDR3A_DQS[4]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_T33"
        }, 
        "DDR3A_DQS[5]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_T30"
        }, 
        "DDR3A_DQS[6]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_J30"
        }, 
        "DDR3A_DQS[7]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_Y30"
        }, 
        "DDR3A_DQS_n[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_B34"
        }, 
        "DDR3A_DQS_n[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_B31"
        }, 
        "DDR3A_DQS_n[2]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_G35"
        }, 
        "DDR3A_DQS_n[3]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_T35"
        }, 
        "DDR3A_DQS_n[4]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_T32"
        }, 
        "DDR3A_DQS_n[5]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_R30"
        }, 
        "DDR3A_DQS_n[6]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_H30"
        }, 
        "DDR3A_DQS_n[7]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_Y29"
        }, 
        "DDR3A_DQ[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A35"
        }, 
        "DDR3A_DQ[10]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C30"
        }, 
        "DDR3A_DQ[11]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D30"
        }, 
        "DDR3A_DQ[12]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B29"
        }, 
        "DDR3A_DQ[13]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E30"
        }, 
        "DDR3A_DQ[14]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F31"
        }, 
        "DDR3A_DQ[15]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G31"
        }, 
        "DDR3A_DQ[16]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F35"
        }, 
        "DDR3A_DQ[17]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G34"
        }, 
        "DDR3A_DQ[18]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J33"
        }, 
        "DDR3A_DQ[19]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J34"
        }, 
        "DDR3A_DQ[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A34"
        }, 
        "DDR3A_DQ[20]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F34"
        }, 
        "DDR3A_DQ[21]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E35"
        }, 
        "DDR3A_DQ[22]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J31"
        }, 
        "DDR3A_DQ[23]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K31"
        }, 
        "DDR3A_DQ[24]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P34"
        }, 
        "DDR3A_DQ[25]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R33"
        }, 
        "DDR3A_DQ[26]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M34"
        }, 
        "DDR3A_DQ[27]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L33"
        }, 
        "DDR3A_DQ[28]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R34"
        }, 
        "DDR3A_DQ[29]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T34"
        }, 
        "DDR3A_DQ[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D36"
        }, 
        "DDR3A_DQ[30]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W34"
        }, 
        "DDR3A_DQ[31]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V35"
        }, 
        "DDR3A_DQ[32]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P33"
        }, 
        "DDR3A_DQ[33]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P32"
        }, 
        "DDR3A_DQ[34]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V33"
        }, 
        "DDR3A_DQ[35]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V34"
        }, 
        "DDR3A_DQ[36]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N31"
        }, 
        "DDR3A_DQ[37]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M31"
        }, 
        "DDR3A_DQ[38]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U32"
        }, 
        "DDR3A_DQ[39]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U33"
        }, 
        "DDR3A_DQ[3]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C33"
        }, 
        "DDR3A_DQ[40]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R31"
        }, 
        "DDR3A_DQ[41]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W31"
        }, 
        "DDR3A_DQ[42]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U30"
        }, 
        "DDR3A_DQ[43]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P31"
        }, 
        "DDR3A_DQ[44]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T31"
        }, 
        "DDR3A_DQ[45]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_Y32"
        }, 
        "DDR3A_DQ[46]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T29"
        }, 
        "DDR3A_DQ[47]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P30"
        }, 
        "DDR3A_DQ[48]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H32"
        }, 
        "DDR3A_DQ[49]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H31"
        }, 
        "DDR3A_DQ[4]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B32"
        }, 
        "DDR3A_DQ[50]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L30"
        }, 
        "DDR3A_DQ[51]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L29"
        }, 
        "DDR3A_DQ[52]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F32"
        }, 
        "DDR3A_DQ[53]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G32"
        }, 
        "DDR3A_DQ[54]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M30"
        }, 
        "DDR3A_DQ[55]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N29"
        }, 
        "DDR3A_DQ[56]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U29"
        }, 
        "DDR3A_DQ[57]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V28"
        }, 
        "DDR3A_DQ[58]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_Y28"
        }, 
        "DDR3A_DQ[59]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W29"
        }, 
        "DDR3A_DQ[5]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D35"
        }, 
        "DDR3A_DQ[60]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V30"
        }, 
        "DDR3A_DQ[61]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V29"
        }, 
        "DDR3A_DQ[62]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W28"
        }, 
        "DDR3A_DQ[63]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_Y27"
        }, 
        "DDR3A_DQ[6]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D33"
        }, 
        "DDR3A_DQ[7]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E33"
        }, 
        "DDR3A_DQ[8]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A32"
        }, 
        "DDR3A_DQ[9]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A31"
        }, 
        "DDR3A_EVENT_n": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_K19"
        }, 
        "DDR3A_ODT[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V36"
        }, 
        "DDR3A_ODT[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W35"
        }, 
        "DDR3A_RAS_n": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P38"
        }, 
        "DDR3A_RESET_n": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_H33"
        }, 
        "DDR3A_SCL": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_C15"
        }, 
        "DDR3A_SDA": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_P15"
        }, 
        "DDR3A_WE_n": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N37"
        }
    }, 
    "DDR3B": {
        "DDR3B_A[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G17"
        }, 
        "DDR3B_A[10]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C19"
        }, 
        "DDR3B_A[11]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R18"
        }, 
        "DDR3B_A[12]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K18"
        }, 
        "DDR3B_A[13]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E18"
        }, 
        "DDR3B_A[14]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T19"
        }, 
        "DDR3B_A[15]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R19"
        }, 
        "DDR3B_A[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F17"
        }, 
        "DDR3B_A[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N17"
        }, 
        "DDR3B_A[3]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F19"
        }, 
        "DDR3B_A[4]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N19"
        }, 
        "DDR3B_A[5]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H16"
        }, 
        "DDR3B_A[6]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M17"
        }, 
        "DDR3B_A[7]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T18"
        }, 
        "DDR3B_A[8]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H17"
        }, 
        "DDR3B_A[9]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J19"
        }, 
        "DDR3B_BA[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C18"
        }, 
        "DDR3B_BA[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G19"
        }, 
        "DDR3B_BA[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M20"
        }, 
        "DDR3B_CAS_n": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A17"
        }, 
        "DDR3B_CKE[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P17"
        }, 
        "DDR3B_CKE[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V18"
        }, 
        "DDR3B_CK[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_B16"
        }, 
        "DDR3B_CK[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_E17"
        }, 
        "DDR3B_CK_n[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_A16"
        }, 
        "DDR3B_CK_n[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_D17"
        }, 
        "DDR3B_CS_n[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B19"
        }, 
        "DDR3B_CS_n[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B17"
        }, 
        "DDR3B_DM[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R15"
        }, 
        "DDR3B_DM[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K15"
        }, 
        "DDR3B_DM[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V12"
        }, 
        "DDR3B_DM[3]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G10"
        }, 
        "DDR3B_DM[4]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T12"
        }, 
        "DDR3B_DM[5]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C16"
        }, 
        "DDR3B_DM[6]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H15"
        }, 
        "DDR3B_DM[7]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B11"
        }, 
        "DDR3B_DQS[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_Y16"
        }, 
        "DDR3B_DQS[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_V17"
        }, 
        "DDR3B_DQS[2]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_P14"
        }, 
        "DDR3B_DQS[3]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_K11"
        }, 
        "DDR3B_DQS[4]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_U9"
        }, 
        "DDR3B_DQS[5]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_E15"
        }, 
        "DDR3B_DQS[6]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_L15"
        }, 
        "DDR3B_DQS[7]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_D12"
        }, 
        "DDR3B_DQS_n[0]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_W16"
        }, 
        "DDR3B_DQS_n[1]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_U17"
        }, 
        "DDR3B_DQS_n[2]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_N14"
        }, 
        "DDR3B_DQS_n[3]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_L11"
        }, 
        "DDR3B_DQS_n[4]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_T9"
        }, 
        "DDR3B_DQS_n[5]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_D15"
        }, 
        "DDR3B_DQS_n[6]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_K14"
        }, 
        "DDR3B_DQS_n[7]": {
            "IO_STANDARD": "DIFFERENTIAL 1.5-V SSTL CLASS I", 
            "LOC": "PIN_C12"
        }, 
        "DDR3B_DQ[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_Y17"
        }, 
        "DDR3B_DQ[10]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R16"
        }, 
        "DDR3B_DQ[11]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P16"
        }, 
        "DDR3B_DQ[12]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N16"
        }, 
        "DDR3B_DQ[13]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M15"
        }, 
        "DDR3B_DQ[14]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M14"
        }, 
        "DDR3B_DQ[15]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L14"
        }, 
        "DDR3B_DQ[16]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T14"
        }, 
        "DDR3B_DQ[17]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U14"
        }, 
        "DDR3B_DQ[18]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U11"
        }, 
        "DDR3B_DQ[19]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T13"
        }, 
        "DDR3B_DQ[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W17"
        }, 
        "DDR3B_DQ[20]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U12"
        }, 
        "DDR3B_DQ[21]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R13"
        }, 
        "DDR3B_DQ[22]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P13"
        }, 
        "DDR3B_DQ[23]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N13"
        }, 
        "DDR3B_DQ[24]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K12"
        }, 
        "DDR3B_DQ[25]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J12"
        }, 
        "DDR3B_DQ[26]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J10"
        }, 
        "DDR3B_DQ[27]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H12"
        }, 
        "DDR3B_DQ[28]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_N11"
        }, 
        "DDR3B_DQ[29]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M11"
        }, 
        "DDR3B_DQ[2]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V15"
        }, 
        "DDR3B_DQ[30]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H10"
        }, 
        "DDR3B_DQ[31]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H11"
        }, 
        "DDR3B_DQ[32]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T10"
        }, 
        "DDR3B_DQ[33]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R10"
        }, 
        "DDR3B_DQ[34]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M12"
        }, 
        "DDR3B_DQ[35]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_L12"
        }, 
        "DDR3B_DQ[36]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V10"
        }, 
        "DDR3B_DQ[37]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V9"
        }, 
        "DDR3B_DQ[38]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_R12"
        }, 
        "DDR3B_DQ[39]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_P12"
        }, 
        "DDR3B_DQ[3]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T15"
        }, 
        "DDR3B_DQ[40]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D14"
        }, 
        "DDR3B_DQ[41]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C13"
        }, 
        "DDR3B_DQ[42]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B14"
        }, 
        "DDR3B_DQ[43]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B13"
        }, 
        "DDR3B_DQ[44]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E14"
        }, 
        "DDR3B_DQ[45]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F14"
        }, 
        "DDR3B_DQ[46]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A14"
        }, 
        "DDR3B_DQ[47]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A13"
        }, 
        "DDR3B_DQ[48]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K13"
        }, 
        "DDR3B_DQ[49]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_K16"
        }, 
        "DDR3B_DQ[4]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V13"
        }, 
        "DDR3B_DQ[50]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H13"
        }, 
        "DDR3B_DQ[51]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H14"
        }, 
        "DDR3B_DQ[52]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J13"
        }, 
        "DDR3B_DQ[53]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_J16"
        }, 
        "DDR3B_DQ[54]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G13"
        }, 
        "DDR3B_DQ[55]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F13"
        }, 
        "DDR3B_DQ[56]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D11"
        }, 
        "DDR3B_DQ[57]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_C10"
        }, 
        "DDR3B_DQ[58]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A10"
        }, 
        "DDR3B_DQ[59]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_B10"
        }, 
        "DDR3B_DQ[5]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_V16"
        }, 
        "DDR3B_DQ[60]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_G11"
        }, 
        "DDR3B_DQ[61]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_F11"
        }, 
        "DDR3B_DQ[62]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E11"
        }, 
        "DDR3B_DQ[63]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_E12"
        }, 
        "DDR3B_DQ[6]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_W14"
        }, 
        "DDR3B_DQ[7]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_U15"
        }, 
        "DDR3B_DQ[8]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T17"
        }, 
        "DDR3B_DQ[9]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T16"
        }, 
        "DDR3B_EVENT_n": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_K17"
        }, 
        "DDR3B_ODT[0]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_M18"
        }, 
        "DDR3B_ODT[1]": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_A19"
        }, 
        "DDR3B_RAS_n": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_H19"
        }, 
        "DDR3B_RESET_n": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_T20"
        }, 
        "DDR3B_SCL": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_P18"
        }, 
        "DDR3B_SDA": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_P19"
        }, 
        "DDR3B_WE_n": {
            "IO_STANDARD": "SSTL-15 CLASS I", 
            "LOC": "PIN_D18"
        }
    }, 
    "FAN": {
        "FAN_CTRL": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AR32"
        }
    }, 
    "FLASH": {
        "FLASH_ADV_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AK29"
        }, 
        "FLASH_CE_n[0]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE27"
        }, 
        "FLASH_CE_n[1]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BA31"
        }, 
        "FLASH_CLK": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AL29"
        }, 
        "FLASH_OE_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AY30"
        }, 
        "FLASH_RDY_BSY_n[0]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BA29"
        }, 
        "FLASH_RDY_BSY_n[1]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BB32"
        }, 
        "FLASH_RESET_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE28"
        }, 
        "FLASH_WE_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AR31"
        }
    }, 
    "FSM": {
        "FSM_A[0]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AU32"
        }, 
        "FSM_A[10]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AN30"
        }, 
        "FSM_A[11]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AH33"
        }, 
        "FSM_A[12]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AK32"
        }, 
        "FSM_A[13]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AM32"
        }, 
        "FSM_A[14]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AM31"
        }, 
        "FSM_A[15]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AL31"
        }, 
        "FSM_A[16]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AN33"
        }, 
        "FSM_A[17]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AP33"
        }, 
        "FSM_A[18]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AT32"
        }, 
        "FSM_A[19]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AT29"
        }, 
        "FSM_A[1]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AH30"
        }, 
        "FSM_A[20]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AP31"
        }, 
        "FSM_A[21]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AR30"
        }, 
        "FSM_A[22]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AU30"
        }, 
        "FSM_A[23]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AJ31"
        }, 
        "FSM_A[24]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AP30"
        }, 
        "FSM_A[25]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AN31"
        }, 
        "FSM_A[26]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AT30"
        }, 
        "FSM_A[2]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AJ30"
        }, 
        "FSM_A[3]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AH31"
        }, 
        "FSM_A[4]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AK30"
        }, 
        "FSM_A[5]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AJ32"
        }, 
        "FSM_A[6]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG33"
        }, 
        "FSM_A[7]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AL30"
        }, 
        "FSM_A[8]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AK33"
        }, 
        "FSM_A[9]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AJ33"
        }, 
        "FSM_D[0]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG26"
        }, 
        "FSM_D[10]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE33"
        }, 
        "FSM_D[11]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE31"
        }, 
        "FSM_D[12]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AF28"
        }, 
        "FSM_D[13]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE30"
        }, 
        "FSM_D[14]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG29"
        }, 
        "FSM_D[15]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG27"
        }, 
        "FSM_D[16]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AP28"
        }, 
        "FSM_D[17]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AN28"
        }, 
        "FSM_D[18]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AU31"
        }, 
        "FSM_D[19]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AW32"
        }, 
        "FSM_D[1]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AD33"
        }, 
        "FSM_D[20]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BD32"
        }, 
        "FSM_D[21]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AY31"
        }, 
        "FSM_D[22]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BA30"
        }, 
        "FSM_D[23]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BB30"
        }, 
        "FSM_D[24]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AM29"
        }, 
        "FSM_D[25]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AR29"
        }, 
        "FSM_D[26]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AV31"
        }, 
        "FSM_D[27]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AV32"
        }, 
        "FSM_D[28]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BC31"
        }, 
        "FSM_D[29]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AW30"
        }, 
        "FSM_D[2]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE34"
        }, 
        "FSM_D[30]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BC32"
        }, 
        "FSM_D[31]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BD31"
        }, 
        "FSM_D[3]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AF31"
        }, 
        "FSM_D[4]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG28"
        }, 
        "FSM_D[5]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG30"
        }, 
        "FSM_D[6]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AF29"
        }, 
        "FSM_D[7]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE29"
        }, 
        "FSM_D[8]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG25"
        }, 
        "FSM_D[9]": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AF34"
        }
    }, 
    "HEX0": {
        "HEX0_DP": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_P8"
        }, 
        "HEX0_D[0]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_G8"
        }, 
        "HEX0_D[1]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_H8"
        }, 
        "HEX0_D[2]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_J9"
        }, 
        "HEX0_D[3]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_K10"
        }, 
        "HEX0_D[4]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_K8"
        }, 
        "HEX0_D[5]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_K9"
        }, 
        "HEX0_D[6]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_N8"
        }
    }, 
    "HEX1": {
        "HEX1_DP": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_E9"
        }, 
        "HEX1_D[0]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_H18"
        }, 
        "HEX1_D[1]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_G16"
        }, 
        "HEX1_D[2]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_F16"
        }, 
        "HEX1_D[3]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_A7"
        }, 
        "HEX1_D[4]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_B7"
        }, 
        "HEX1_D[5]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_C9"
        }, 
        "HEX1_D[6]": {
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_D10"
        }
    }, 
    "LED": {
        "LED[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AW37"
        }, 
        "LED[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AV37"
        }, 
        "LED[2]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BB36"
        }, 
        "LED[3]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BB39"
        }, 
        "LED_BRACKET[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AH15"
        }, 
        "LED_BRACKET[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AH13"
        }, 
        "LED_BRACKET[2]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AJ13"
        }, 
        "LED_BRACKET[3]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AJ14"
        }, 
        "LED_RJ45_L": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG15"
        }, 
        "LED_RJ45_R": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG16"
        }
    }, 
    "OSC": {
        "OSC_50_B3B": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AW35"
        }, 
        "OSC_50_B3D": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_BC28"
        }, 
        "OSC_50_B4A": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_AP10"
        }, 
        "OSC_50_B4D": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_AY18"
        }, 
        "OSC_50_B7A": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_M8"
        }, 
        "OSC_50_B7D": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_J18"
        }, 
        "OSC_50_B8A": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_R36"
        }, 
        "OSC_50_B8D": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_R25"
        }
    }, 
    "PCIE": {
        "PCIE_PERST_n": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AU33"
        }, 
        "PCIE_REFCLK_p": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_AK38"
        }, 
        "PCIE_RX_p[0]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_BB43"
        }, 
        "PCIE_RX_p[1]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_BA41"
        }, 
        "PCIE_RX_p[2]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AW41"
        }, 
        "PCIE_RX_p[3]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AY43"
        }, 
        "PCIE_RX_p[4]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT43"
        }, 
        "PCIE_RX_p[5]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AP43"
        }, 
        "PCIE_RX_p[6]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AM43"
        }, 
        "PCIE_RX_p[7]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AK43"
        }, 
        "PCIE_SMBCLK": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BD34"
        }, 
        "PCIE_SMBDAT": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AT33"
        }, 
        "PCIE_TX_p[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AY39"
        }, 
        "PCIE_TX_p[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AV39"
        }, 
        "PCIE_TX_p[2]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT39"
        }, 
        "PCIE_TX_p[3]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AU41"
        }, 
        "PCIE_TX_p[4]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AN41"
        }, 
        "PCIE_TX_p[5]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AL41"
        }, 
        "PCIE_TX_p[6]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AJ41"
        }, 
        "PCIE_TX_p[7]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AG41"
        }, 
        "PCIE_WAKE_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BD35"
        },
        "PCIE_REFCLK_p(n)": {
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_AK39"
        }, 
        "PCIE_RX_p[0](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_BB44"
        }, 
        "PCIE_RX_p[1](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_BA42"
        }, 
        "PCIE_RX_p[2](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AW42"
        }, 
        "PCIE_RX_p[3](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AY44"
        }, 
        "PCIE_RX_p[4](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT44"
        }, 
        "PCIE_RX_p[5](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AP44"
        }, 
        "PCIE_RX_p[6](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AM44"
        }, 
        "PCIE_RX_p[7](n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AK44"
        }, 
        "PCIE_TX_p[0](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AY40"
        }, 
        "PCIE_TX_p[1](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AV40"
        }, 
        "PCIE_TX_p[2](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT40"
        }, 
        "PCIE_TX_p[3](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AU42"
        }, 
        "PCIE_TX_p[4](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AN42"
        }, 
        "PCIE_TX_p[5](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AL42"
        }, 
        "PCIE_TX_p[6](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AJ42"
        }, 
        "PCIE_TX_p[7](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AG42"
        }
    }, 
    "SATA": {
        "SATA_DEVICE_REFCLK_p(n)": {
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_V40"
        }, 
        "SATA_DEVICE_RX_p[0](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K44"
        }, 
        "SATA_DEVICE_RX_p[1](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H44"
        }, 
        "SATA_DEVICE_TX_p[0](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K40"
        }, 
        "SATA_DEVICE_TX_p[1](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H40"
        }, 
        "SATA_HOST_REFCLK_p(n)": {
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_V5"
        }, 
        "SATA_HOST_RX_p[0](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K1"
        }, 
        "SATA_HOST_RX_p[1](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H1"
        }, 
        "SATA_HOST_TX_p[0](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K5"
        }, 
        "SATA_HOST_TX_p[1](n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H5"
        }
    }, 
    "SFP": {
        "SFP1G_REFCLK_p": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_AH6"
        },
        "SFP1G_REFCLK_p(n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_AH5"
        }, 
        "SFP_REFCLK_p(n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_AK6"
        },
        "SFP_REFCLK_p": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_AK7"
        }
    }, 
    "PLL": {
        "PLL_SCL": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AF32"
        }, 
        "PLL_SDA": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG32"
        } 
    }, 
    "QDRIIA": {
        "QDRIIA_A[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU29"
        }, 
        "QDRIIA_A[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW27"
        }, 
        "QDRIIA_A[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY28"
        }, 
        "QDRIIA_A[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD28"
        }, 
        "QDRIIA_A[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV29"
        }, 
        "QDRIIA_A[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW29"
        }, 
        "QDRIIA_A[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB29"
        }, 
        "QDRIIA_A[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD29"
        }, 
        "QDRIIA_A[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL27"
        }, 
        "QDRIIA_A[18]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR27"
        }, 
        "QDRIIA_A[19]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL28"
        }, 
        "QDRIIA_A[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BA28"
        }, 
        "QDRIIA_A[20]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR28"
        }, 
        "QDRIIA_A[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP27"
        }, 
        "QDRIIA_A[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK27"
        }, 
        "QDRIIA_A[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN27"
        }, 
        "QDRIIA_A[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM28"
        }, 
        "QDRIIA_A[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV28"
        }, 
        "QDRIIA_A[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY27"
        }, 
        "QDRIIA_A[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC29"
        }, 
        "QDRIIA_A[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU28"
        }, 
        "QDRIIA_BWS_n[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ24"
        }, 
        "QDRIIA_BWS_n[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT27"
        }, 
        "QDRIIA_CQ_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BA25"
        }, 
        "QDRIIA_CQ_p": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH22"
        }, 
        "QDRIIA_DOFF_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR23"
        }, 
        "QDRIIA_D[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH28"
        }, 
        "QDRIIA_D[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM26"
        }, 
        "QDRIIA_D[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM25"
        }, 
        "QDRIIA_D[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL26"
        }, 
        "QDRIIA_D[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK26"
        }, 
        "QDRIIA_D[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU27"
        }, 
        "QDRIIA_D[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU26"
        }, 
        "QDRIIA_D[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV26"
        }, 
        "QDRIIA_D[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW26"
        }, 
        "QDRIIA_D[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH27"
        }, 
        "QDRIIA_D[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH25"
        }, 
        "QDRIIA_D[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ28"
        }, 
        "QDRIIA_D[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ27"
        }, 
        "QDRIIA_D[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ26"
        }, 
        "QDRIIA_D[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ25"
        }, 
        "QDRIIA_D[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL25"
        }, 
        "QDRIIA_D[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH24"
        }, 
        "QDRIIA_D[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN25"
        }, 
        "QDRIIA_K_n": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR26"
        }, 
        "QDRIIA_K_p": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP25"
        }, 
        "QDRIIA_ODT": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN23"
        }, 
        "QDRIIA_QVLD": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM23"
        }, 
        "QDRIIA_Q[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK23"
        }, 
        "QDRIIA_Q[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC26"
        }, 
        "QDRIIA_Q[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY25"
        }, 
        "QDRIIA_Q[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU24"
        }, 
        "QDRIIA_Q[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV25"
        }, 
        "QDRIIA_Q[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU25"
        }, 
        "QDRIIA_Q[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR25"
        }, 
        "QDRIIA_Q[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP24"
        }, 
        "QDRIIA_Q[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL24"
        }, 
        "QDRIIA_Q[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB26"
        }, 
        "QDRIIA_Q[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD26"
        }, 
        "QDRIIA_Q[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BA24"
        }, 
        "QDRIIA_Q[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL23"
        }, 
        "QDRIIA_Q[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ23"
        }, 
        "QDRIIA_Q[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL21"
        }, 
        "QDRIIA_Q[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK21"
        }, 
        "QDRIIA_Q[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ22"
        }, 
        "QDRIIA_Q[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW24"
        }, 
        "QDRIIA_RPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT26"
        }, 
        "QDRIIA_WPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK24"
        }
    }, 
    "QDRIIB": {
        "QDRIIB_A[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR24"
        }, 
        "QDRIIB_A[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ20"
        }, 
        "QDRIIB_A[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG20"
        }, 
        "QDRIIB_A[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW23"
        }, 
        "QDRIIB_A[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB24"
        }, 
        "QDRIIB_A[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY24"
        }, 
        "QDRIIB_A[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD23"
        }, 
        "QDRIIB_A[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC23"
        }, 
        "QDRIIB_A[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG21"
        }, 
        "QDRIIB_A[18]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM20"
        }, 
        "QDRIIB_A[19]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK18"
        }, 
        "QDRIIB_A[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB23"
        }, 
        "QDRIIB_A[20]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN22"
        }, 
        "QDRIIB_A[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK20"
        }, 
        "QDRIIB_A[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ19"
        }, 
        "QDRIIB_A[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL20"
        }, 
        "QDRIIB_A[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG19"
        }, 
        "QDRIIB_A[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT23"
        }, 
        "QDRIIB_A[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU23"
        }, 
        "QDRIIB_A[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV23"
        }, 
        "QDRIIB_A[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM22"
        }, 
        "QDRIIB_BWS_n[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV20"
        }, 
        "QDRIIB_BWS_n[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU21"
        }, 
        "QDRIIB_CQ_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP18"
        }, 
        "QDRIIB_CQ_p": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ15"
        }, 
        "QDRIIB_DOFF_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH19"
        }, 
        "QDRIIB_D[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB21"
        }, 
        "QDRIIB_D[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR21"
        }, 
        "QDRIIB_D[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP21"
        }, 
        "QDRIIB_D[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD22"
        }, 
        "QDRIIB_D[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC22"
        }, 
        "QDRIIB_D[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BA22"
        }, 
        "QDRIIB_D[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV22"
        }, 
        "QDRIIB_D[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY22"
        }, 
        "QDRIIB_D[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW22"
        }, 
        "QDRIIB_D[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD20"
        }, 
        "QDRIIB_D[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC20"
        }, 
        "QDRIIB_D[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR22"
        }, 
        "QDRIIB_D[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB20"
        }, 
        "QDRIIB_D[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU22"
        }, 
        "QDRIIB_D[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BA21"
        }, 
        "QDRIIB_D[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY21"
        }, 
        "QDRIIB_D[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW21"
        }, 
        "QDRIIB_D[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT21"
        }, 
        "QDRIIB_K_n": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT20"
        }, 
        "QDRIIB_K_p": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR20"
        }, 
        "QDRIIB_ODT": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH18"
        }, 
        "QDRIIB_QVLD": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ16"
        }, 
        "QDRIIB_Q[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR19"
        }, 
        "QDRIIB_Q[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ18"
        }, 
        "QDRIIB_Q[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ17"
        }, 
        "QDRIIB_Q[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG18"
        }, 
        "QDRIIB_Q[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU19"
        }, 
        "QDRIIB_Q[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW19"
        }, 
        "QDRIIB_Q[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV19"
        }, 
        "QDRIIB_Q[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP19"
        }, 
        "QDRIIB_Q[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN20"
        }, 
        "QDRIIB_Q[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM19"
        }, 
        "QDRIIB_Q[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL19"
        }, 
        "QDRIIB_Q[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM17"
        }, 
        "QDRIIB_Q[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL18"
        }, 
        "QDRIIB_Q[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN19"
        }, 
        "QDRIIB_Q[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU18"
        }, 
        "QDRIIB_Q[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK17"
        }, 
        "QDRIIB_Q[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL17"
        }, 
        "QDRIIB_Q[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG17"
        }, 
        "QDRIIB_RPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW20"
        }, 
        "QDRIIB_WPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU20"
        }
    }, 
    "QDRIIC": {
        "QDRIIC_A[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV16"
        }, 
        "QDRIIC_A[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH21"
        }, 
        "QDRIIC_A[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU17"
        }, 
        "QDRIIC_A[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU16"
        }, 
        "QDRIIC_A[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB8"
        }, 
        "QDRIIC_A[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT18"
        }, 
        "QDRIIC_A[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW17"
        }, 
        "QDRIIC_A[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV17"
        }, 
        "QDRIIC_A[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU8"
        }, 
        "QDRIIC_A[18]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT9"
        }, 
        "QDRIIC_A[19]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV8"
        }, 
        "QDRIIC_A[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW16"
        }, 
        "QDRIIC_A[20]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN17"
        }, 
        "QDRIIC_A[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP16"
        }, 
        "QDRIIC_A[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW9"
        }, 
        "QDRIIC_A[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD7"
        }, 
        "QDRIIC_A[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC7"
        }, 
        "QDRIIC_A[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR17"
        }, 
        "QDRIIC_A[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR18"
        }, 
        "QDRIIC_A[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT17"
        }, 
        "QDRIIC_A[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB9"
        }, 
        "QDRIIC_BWS_n[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ11"
        }, 
        "QDRIIC_BWS_n[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ10"
        }, 
        "QDRIIC_CQ_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AF13"
        }, 
        "QDRIIC_CQ_p": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC11"
        }, 
        "QDRIIC_DOFF_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AE14"
        }, 
        "QDRIIC_D[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG9"
        }, 
        "QDRIIC_D[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AM13"
        }, 
        "QDRIIC_D[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR12"
        }, 
        "QDRIIC_D[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AR13"
        }, 
        "QDRIIC_D[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU9"
        }, 
        "QDRIIC_D[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU10"
        }, 
        "QDRIIC_D[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AU11"
        }, 
        "QDRIIC_D[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV11"
        }, 
        "QDRIIC_D[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AT12"
        }, 
        "QDRIIC_D[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG10"
        }, 
        "QDRIIC_D[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG12"
        }, 
        "QDRIIC_D[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AG11"
        }, 
        "QDRIIC_D[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AV10"
        }, 
        "QDRIIC_D[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH12"
        }, 
        "QDRIIC_D[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AK12"
        }, 
        "QDRIIC_D[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL12"
        }, 
        "QDRIIC_D[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AJ12"
        }, 
        "QDRIIC_D[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AN12"
        }, 
        "QDRIIC_K_n": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP13"
        }, 
        "QDRIIC_K_p": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_AP12"
        }, 
        "QDRIIC_ODT": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD10"
        }, 
        "QDRIIC_QVLD": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BD11"
        }, 
        "QDRIIC_Q[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BA12"
        }, 
        "QDRIIC_Q[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW11"
        }, 
        "QDRIIC_Q[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AF10"
        }, 
        "QDRIIC_Q[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY12"
        }, 
        "QDRIIC_Q[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AW10"
        }, 
        "QDRIIC_Q[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AY10"
        }, 
        "QDRIIC_Q[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB12"
        }, 
        "QDRIIC_Q[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BC10"
        }, 
        "QDRIIC_Q[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BA10"
        }, 
        "QDRIIC_Q[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AF14"
        }, 
        "QDRIIC_Q[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AE13"
        }, 
        "QDRIIC_Q[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AD14"
        }, 
        "QDRIIC_Q[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AE12"
        }, 
        "QDRIIC_Q[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AF11"
        }, 
        "QDRIIC_Q[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AE11"
        }, 
        "QDRIIC_Q[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AE10"
        }, 
        "QDRIIC_Q[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AE9"
        }, 
        "QDRIIC_Q[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_BB11"
        }, 
        "QDRIIC_RPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AH10"
        }, 
        "QDRIIC_WPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_AL11"
        }
    }, 
    "QDRIID": {
        "QDRIID_A[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_N26"
        }, 
        "QDRIID_A[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_U27"
        }, 
        "QDRIID_A[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_R27"
        }, 
        "QDRIID_A[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_P27"
        }, 
        "QDRIID_A[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_V25"
        }, 
        "QDRIID_A[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_V26"
        }, 
        "QDRIID_A[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_T25"
        }, 
        "QDRIID_A[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_P26"
        }, 
        "QDRIID_A[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_M27"
        }, 
        "QDRIID_A[18]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_M28"
        }, 
        "QDRIID_A[19]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_P29"
        }, 
        "QDRIID_A[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_P28"
        }, 
        "QDRIID_A[20]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_D29"
        }, 
        "QDRIID_A[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_N28"
        }, 
        "QDRIID_A[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_L26"
        }, 
        "QDRIID_A[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_K27"
        }, 
        "QDRIID_A[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_L27"
        }, 
        "QDRIID_A[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_U26"
        }, 
        "QDRIID_A[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_T26"
        }, 
        "QDRIID_A[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_T27"
        }, 
        "QDRIID_A[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_V27"
        }, 
        "QDRIID_BWS_n[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_E26"
        }, 
        "QDRIID_BWS_n[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_K26"
        }, 
        "QDRIID_CQ_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_H27"
        }, 
        "QDRIID_CQ_p": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_E29"
        }, 
        "QDRIID_DOFF_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_E27"
        }, 
        "QDRIID_D[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_H25"
        }, 
        "QDRIID_D[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_P24"
        }, 
        "QDRIID_D[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_P23"
        }, 
        "QDRIID_D[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_L24"
        }, 
        "QDRIID_D[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_R24"
        }, 
        "QDRIID_D[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_U23"
        }, 
        "QDRIID_D[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_U24"
        }, 
        "QDRIID_D[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_T24"
        }, 
        "QDRIID_D[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_T23"
        }, 
        "QDRIID_D[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_H24"
        }, 
        "QDRIID_D[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_H23"
        }, 
        "QDRIID_D[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_J25"
        }, 
        "QDRIID_D[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_J24"
        }, 
        "QDRIID_D[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_K25"
        }, 
        "QDRIID_D[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_D26"
        }, 
        "QDRIID_D[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_F25"
        }, 
        "QDRIID_D[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_G25"
        }, 
        "QDRIID_D[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_N23"
        }, 
        "QDRIID_K_n": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_K24"
        }, 
        "QDRIID_K_p": {
            "IO_STANDARD": "DIFFERENTIAL 1.8-V HSTL CLASS I", 
            "LOC": "PIN_L23"
        }, 
        "QDRIID_ODT": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_H26"
        }, 
        "QDRIID_QVLD": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_J27"
        }, 
        "QDRIID_Q[0]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_C27"
        }, 
        "QDRIID_Q[10]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_F28"
        }, 
        "QDRIID_Q[11]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_D27"
        }, 
        "QDRIID_Q[12]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_G29"
        }, 
        "QDRIID_Q[13]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_F29"
        }, 
        "QDRIID_Q[14]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_H28"
        }, 
        "QDRIID_Q[15]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_K28"
        }, 
        "QDRIID_Q[16]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_J28"
        }, 
        "QDRIID_Q[17]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_H29"
        }, 
        "QDRIID_Q[1]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_A26"
        }, 
        "QDRIID_Q[2]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_B26"
        }, 
        "QDRIID_Q[3]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_F26"
        }, 
        "QDRIID_Q[4]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_G26"
        }, 
        "QDRIID_Q[5]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_C28"
        }, 
        "QDRIID_Q[6]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_A29"
        }, 
        "QDRIID_Q[7]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_A28"
        }, 
        "QDRIID_Q[8]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_B28"
        }, 
        "QDRIID_Q[9]": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_G28"
        }, 
        "QDRIID_RPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_F24"
        }, 
        "QDRIID_WPS_n": {
            "IO_STANDARD": "1.8-V HSTL CLASS I", 
            "LOC": "PIN_M23"
        }
    }, 
    "RS422": {
        "RS422_DE": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AG14"
        }, 
        "RS422_DIN": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE18"
        }, 
        "RS422_DOUT": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AE17"
        }, 
        "RS422_RE_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AF17"
        }, 
        "RS422_TE": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AF16"
        }
    }, 
    "RZQ": {
        "RZQ_0": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BA36"
        }, 
        "RZQ_1": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_AR8"
        }, 
        "RZQ_4": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_H9"
        }, 
        "RZQ_5": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.5 V", 
            "LOC": "PIN_P35"
        }
    }, 
    "SATA": {
        "SATA_DEVICE_REFCLK_p": {
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_V39"
        }, 
        "SATA_DEVICE_RX_p[0]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K43"
        }, 
        "SATA_DEVICE_RX_p[1]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H43"
        }, 
        "SATA_DEVICE_TX_p[0]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K39"
        }, 
        "SATA_DEVICE_TX_p[1]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H39"
        }, 
        "SATA_HOST_REFCLK_p": {
            "IO_STANDARD": "HCSL", 
            "LOC": "PIN_V6"
        }, 
        "SATA_HOST_RX_p[0]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K2"
        }, 
        "SATA_HOST_RX_p[1]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H2"
        }, 
        "SATA_HOST_TX_p[0]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_K6"
        }, 
        "SATA_HOST_TX_p[1]": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_H6"
        }
    }, 
    "SFPA": {
        "SFPA_LOS": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_F22"
        }, 
        "SFPA_MOD0_PRSNT_n": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_E21"
        }, 
        "SFPA_MOD1_SCL": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_B20"
        }, 
        "SFPA_MOD2_SDA": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_A20"
        }, 
        "SFPA_RATESEL[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_E20"
        }, 
        "SFPA_RATESEL[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_G22"
        }, 
        "SFPA_RX_p": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AK2"
        }, 
        "SFPA_TXDISABLE": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_B22"
        }, 
        "SFPA_TXFAULT": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_A22"
        }, 
        "SFPA_TX_p": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AG4"
        },
        "SFPA_RX_p(n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AK1"
        }, 
        "SFPA_TX_p(n)": {
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AG3"
        } 
    }, 
    "SFPB": {
        "SFPB_LOS": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_R22"
        }, 
        "SFPB_MOD0_PRSNT_n": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_K22"
        }, 
        "SFPB_MOD1_SCL": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_K21"
        }, 
        "SFPB_MOD2_SDA": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_K20"
        }, 
        "SFPB_RATESEL[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_R21"
        }, 
        "SFPB_RATESEL[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_T22"
        }, 
        "SFPB_RX_p": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AP2"
        }, 
        "SFPB_TXDISABLE": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_H22"
        }, 
        "SFPB_TXFAULT": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_H20"
        }, 
        "SFPB_TX_p": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AL4"
        },
        "SFPB_RX_p(n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AP1"
        }, 
        "SFPB_TX_p(n)": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AL3"
        } 
    }, 
    "SFPC": {
        "SFPC_LOS": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_L21"
        }, 
        "SFPC_MOD0_PRSNT_n": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_J21"
        }, 
        "SFPC_MOD1_SCL": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_H21"
        }, 
        "SFPC_MOD2_SDA": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_G20"
        }, 
        "SFPC_RATESEL[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_J22"
        }, 
        "SFPC_RATESEL[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_P21"
        }, 
        "SFPC_RX_p": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AW4"
        }, 
        "SFPC_TXDISABLE": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_F21"
        }, 
        "SFPC_TXFAULT": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_F20"
        }, 
        "SFPC_TX_p": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT6"
        },
        "SFPC_RX_p(n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AW3"
        }, 
        "SFPC_TX_p(n)": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT5"
        }
    }, 
    "SFPD": {
        "SFPD_LOS": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_N22"
        }, 
        "SFPD_MOD0_PRSNT_n": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_V20"
        }, 
        "SFPD_MOD1_SCL": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_U21"
        }, 
        "SFPD_MOD2_SDA": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_V19"
        }, 
        "SFPD_RATESEL[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_V21"
        }, 
        "SFPD_RATESEL[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_M22"
        }, 
        "SFPD_RX_p": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_BB2"
        }, 
        "SFPD_TXDISABLE": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_U20"
        }, 
        "SFPD_TXFAULT": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_T21"
        }, 
        "SFPD_TX_p": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AY6"
        }, 
        "SFPD_RX_p(n)": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_BB1"
        }, 
        "SFPD_TX_p(n)": {
            "PIO_DIRECTION": "OUTPUT",
            "IO_STANDARD": "1.4-V PCML", 
            "LOC": "PIN_AY5"
        }
    }, 
    "SMA": {
        "SMA_CLKIN": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_BB33"
        }, 
        "SMA_CLKOUT": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_AV34"
        }
    }, 
    "SW": {
        "SW[0]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_B25"
        }, 
        "SW[1]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_A25"
        }, 
        "SW[2]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_B23"
        }, 
        "SW[3]": {
            "PIO_DIRECTION": "INPUT",
            "IO_STANDARD": "1.8 V", 
            "LOC": "PIN_A23"
        }
    }, 
    "TEMP": {
        "TEMP_CLK": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_D21"
        }, 
        "TEMP_DATA": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_D20"
        }, 
        "TEMP_INT_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_C21"
        }, 
        "TEMP_OVERT_n": {
            "IO_STANDARD": "2.5 V", 
            "LOC": "PIN_C22"
        }
    }

}




================================================
FILE: boardinfo/htg4.json
================================================
{
    "options": {
        "bsvdefines" : ["ALTERA=1", "StratixIV", "PCIE", "PCIE_NO_BSCAN", "PcieHostInterface", "PhysAddrWidth=40", "NUMBER_OF_LEDS=4", "NUMBER_OF_10G_PORTS=2", "PcieLanes=8", "DEFAULT_NOPROGRAM=1",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest.altera"],
        "os" : "ubuntu",
        "partname" : "EP4S100G2F40I2",
        "need_pcie" : "s4_gen2x8",
        "TOP" : "PcieTop",
        "constraints": ["constraints/altera/htg4.xdc"],
        "runscript" : "run.pcietest.altera",
        "CONNECTALFLAGS" : ["--mainclockperiod=8", "--derivedclockperiod=4", "--pcieclockperiod=8"],
        "rewireclockstring" : ""
    },
    "PCIE": {
        "PCIE_PERST_n": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_AG24"
        }, 
        "PCIE_REFCLK_p": {
            "IOSTANDARD": "DIFFERENTIAL LVPECL", 
            "LOC": "PIN_AA38"
        }, 
        "PCIE_RX_p[0]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AU38"
        }, 
        "PCIE_RX_p[1]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AR38"
        }, 
        "PCIE_RX_p[2]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AJ38"
        }, 
        "PCIE_RX_p[3]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AG38"
        }, 
        "PCIE_RX_p[4]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AE38"
        }, 
        "PCIE_RX_p[5]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AC38"
        }, 
        "PCIE_RX_p[6]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_U38"
        }, 
        "PCIE_RX_p[7]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_R38"
        }, 
        "PCIE_SMBCLK": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_W35"
        }, 
        "PCIE_SMBDAT": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_W34"
        }, 
        "PCIE_TX_p[0]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT36"
        }, 
        "PCIE_TX_p[1]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AP36"
        }, 
        "PCIE_TX_p[2]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AH36"
        }, 
        "PCIE_TX_p[3]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AF36"
        }, 
        "PCIE_TX_p[4]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AD36"
        }, 
        "PCIE_TX_p[5]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AB36"
        }, 
        "PCIE_TX_p[6]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_T36"
        }, 
        "PCIE_TX_p[7]": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_P36"
        }, 
        "PCIE_WAKE_n": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_R33"
        },
        "PCIE_REFCLK_p(n)": {
            "IOSTANDARD": "HCSL", 
            "LOC": "PIN_AA39"
        }, 
        "PCIE_RX_p[0](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AU39"
        }, 
        "PCIE_RX_p[1](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AR39"
        }, 
        "PCIE_RX_p[2](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AJ39"
        }, 
        "PCIE_RX_p[3](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AG39"
        }, 
        "PCIE_RX_p[4](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AE39"
        }, 
        "PCIE_RX_p[5](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AC39"
        }, 
        "PCIE_RX_p[6](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_U39"
        }, 
        "PCIE_RX_p[7](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_R39"
        }, 
        "PCIE_TX_p[0](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AT37"
        }, 
        "PCIE_TX_p[1](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AP37"
        }, 
        "PCIE_TX_p[2](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AH37"
        }, 
        "PCIE_TX_p[3](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AF37"
        }, 
        "PCIE_TX_p[4](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AO37"
        }, 
        "PCIE_TX_p[5](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_AB37"
        }, 
        "PCIE_TX_p[6](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_T37"
        }, 
        "PCIE_TX_p[7](n)": {
            "IOSTANDARD": "1.4-V PCML", 
            "LOC": "PIN_P37"
        }
    },
    "LED": {
        "LED[0]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_D33"
        }, 
        "LED[1]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_C34"
        }, 
        "LED[2]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_M28"
        }, 
        "LED[3]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_D34"
        },
        "LED[4]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_E34"
        }, 
        "LED[5]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_R27"
        }, 
        "LED[6]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_F34"
        }, 
        "LED[7]": {
            "IOSTANDARD": "2.5 V", 
            "LOC": "PIN_N28"
        } 
	},
    "OSC": {
        "CLK200": {
            "IOSTANDARD": "LVDS", 
            "LOC": "PIN_K34"
        }, 
        "CLK644": {
            "IOSTANDARD": "DIFFERENTIAL LVPECL", 
            "LOC": "PIN_J2"
        },
        "CLK100": {
            "IOSTANDARD": "DIFFERENTIAL LVPECL", 
            "LOC": "PIN_J2"
        }
	}
}


================================================
FILE: boardinfo/kc160g2.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Kintex7", "PCIE", "PCIE2", "PcieHostInterface", "PhysAddrWidth=40", "PcieLanes=8",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7k160tffg676-2",
        "need_pcie" : "x7_gen2x8",
        "TOP" : "PcieTop",
        "constraints": [],
        "implconstraints": ["constraints/xilinx/kc160g2.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=4", "--derivedclockperiod=4", "--pcieclockperiod=4"],
        "rewireclockstring" : ""
    }
}


================================================
FILE: boardinfo/kc705.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Kintex7", "PCIE", "PCIE1", "PcieHostInterface", "PhysAddrWidth=40", "PcieLanes=8",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7k325tffg900-2",
        "need_pcie" : "x7_gen1x8",
        "TOP" : "PcieTop",
        "constraints": ["constraints/xilinx/kc705.xdc"],
        "implconstraints": ["constraints/xilinx/kc705.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=8", "--derivedclockperiod=4", "--pcieclockperiod=8"],
        "rewireclockstring" : ""
    },
    "fmc1": {
    "LA00_p_CC": {
        "LOC": "C25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA00_n_CC": {
        "LOC": "B25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_p_CC": {
        "LOC": "D26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_n_CC": {
        "LOC": "C26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_p": {
        "LOC": "H24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_n": {
        "LOC": "H25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_p": {
        "LOC": "H26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_n": {
        "LOC": "H27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_p": {
        "LOC": "G28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_n": {
        "LOC": "F28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_p": {
        "LOC": "G29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_n": {
        "LOC": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_p": {
        "LOC": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_n": {
        "LOC": "G30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_p": {
        "LOC": "E28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_n": {
        "LOC": "D28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_p": {
        "LOC": "E29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_n": {
        "LOC": "E30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_p": {
        "LOC": "B30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_n": {
        "LOC": "A30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_p": {
        "LOC": "D29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_n": {
        "LOC": "C30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_p": {
        "LOC": "G27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_n": {
        "LOC": "F27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_p": {
        "LOC": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_n": {
        "LOC": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_p": {
        "LOC": "A25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_n": {
        "LOC": "A26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_p": {
        "LOC": "B28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_n": {
        "LOC": "A28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_p": {
        "LOC": "C24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_n": {
        "LOC": "B24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_p": {
        "LOC": "B27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_n": {
        "LOC": "A27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_p_CC": {
        "LOC": "AB27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_n_CC": {
        "LOC": "AC27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_p_CC": {
        "LOC": "AD27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_n_CC": {
        "LOC": "AD28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_p": {
        "LOC": "AJ26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_n": {
        "LOC": "AK26",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_p": {
        "LOC": "bogus",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_n": {
        "LOC": "bogus",
        "IOSTANDARD": "LVCMOS25"
        }
    },
    "uart": {
		"d_in": {
			"PACKAGE_PIN": "M19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"d_out": {
			"PACKAGE_PIN": "K24",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		},
		"rts": {
			"PACKAGE_PIN": "K23",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"cts": {
			"PACKAGE_PIN": "L27",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		}
    },
    "sdio": {
        "dat0": {
            "PACKAGE_PIN": "AC20",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat1": {
            "PACKAGE_PIN": "AA23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat2": {
            "PACKAGE_PIN": "AA22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "cd_dat3": {
            "PACKAGE_PIN": "AC21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "clk": {
            "PACKAGE_PIN": "AB23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "OUTPUT"
        },
        "cmd": {
            "PACKAGE_PIN": "AB22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "sddet": {
            "PACKAGE_PIN": "AA21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        },
        "sdwp": {
            "PACKAGE_PIN": "Y21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        }
    },
    "pins": {
	"userClk_p": {
	    "PACKAGE_PIN": "K29",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"userClk_n": {
	    "PACKAGE_PIN": "K28",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"smaUserClk_p": {
	    "PACKAGE_PIN": "L25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"smaUserClk_n": {
	    "PACKAGE_PIN": "K25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtRefClk_p": {
	    "PACKAGE_PIN": "J8",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRefClk_n": {
	    "PACKAGE_PIN": "J7",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_p": {
	    "PACKAGE_PIN": "K6",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_n": {
	    "PACKAGE_PIN": "K5",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtTx_p": {
	    "PACKAGE_PIN": "K2",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtTx_n": {
	    "PACKAGE_PIN": "K1",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"uart_d_in": {
	    "PACKAGE_PIN": "M19",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "INPUT"
	},
	"uart_d_out": {
	    "PACKAGE_PIN": "K24",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "OUTPUT"
	}
    }
}


================================================
FILE: boardinfo/kc705_untethered.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Kintex7", "PhysAddrWidth=40", "PcieLanes=8", "UNTETHERED=1",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7k325tffg900-2",
        "TOP" : "UntetheredTop",
        "constraints":     ["constraints/xilinx/kc705g2.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "implconstraints": ["constraints/xilinx/kc705g2.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=4", "--derivedclockperiod=4", "--pcieclockperiod=4"],
        "rewireclockstring" : ""
    },
    "fmc1": {
    "LA00_p_CC": {
        "PACKAGE_PIN": "C25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA00_n_CC": {
        "PACKAGE_PIN": "B25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_p_CC": {
        "PACKAGE_PIN": "D26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_n_CC": {
        "PACKAGE_PIN": "C26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_p": {
        "PACKAGE_PIN": "H24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_n": {
        "PACKAGE_PIN": "H25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_p": {
        "PACKAGE_PIN": "H26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_n": {
        "PACKAGE_PIN": "H27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_p": {
        "PACKAGE_PIN": "G28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_n": {
        "PACKAGE_PIN": "F28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_p": {
        "PACKAGE_PIN": "G29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_n": {
        "PACKAGE_PIN": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_p": {
        "PACKAGE_PIN": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_n": {
        "PACKAGE_PIN": "G30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_p": {
        "PACKAGE_PIN": "E28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_n": {
        "PACKAGE_PIN": "D28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_p": {
        "PACKAGE_PIN": "E29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_n": {
        "PACKAGE_PIN": "E30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_p": {
        "PACKAGE_PIN": "B30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_n": {
        "PACKAGE_PIN": "A30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_p": {
        "PACKAGE_PIN": "D29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_n": {
        "PACKAGE_PIN": "C30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_p": {
        "PACKAGE_PIN": "G27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_n": {
        "PACKAGE_PIN": "F27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_p": {
        "PACKAGE_PIN": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_n": {
        "PACKAGE_PIN": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_p": {
        "PACKAGE_PIN": "A25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_n": {
        "PACKAGE_PIN": "A26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_p": {
        "PACKAGE_PIN": "B28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_n": {
        "PACKAGE_PIN": "A28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_p": {
        "PACKAGE_PIN": "C24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_n": {
        "PACKAGE_PIN": "B24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_p": {
        "PACKAGE_PIN": "B27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_n": {
        "PACKAGE_PIN": "A27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_p_CC": {
        "PACKAGE_PIN": "AB27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_n_CC": {
        "PACKAGE_PIN": "AC27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_p_CC": {
        "PACKAGE_PIN": "AD27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_n_CC": {
        "PACKAGE_PIN": "AD28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_p": {
        "PACKAGE_PIN": "AJ26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_n": {
        "PACKAGE_PIN": "AK26",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_p": {
        "PACKAGE_PIN": "bogus",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_n": {
        "PACKAGE_PIN": "bogus",
        "IOSTANDARD": "LVCMOS25"
        }
    },
    "uart": {
		"d_in": {
			"PACKAGE_PIN": "M19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"d_out": {
			"PACKAGE_PIN": "K24",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		},
		"rts": {
			"PACKAGE_PIN": "K23",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"cts": {
			"PACKAGE_PIN": "L27",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		}
    },
    "sdio": {
        "dat0": {
            "PACKAGE_PIN": "AC20",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat1": {
            "PACKAGE_PIN": "AA23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat2": {
            "PACKAGE_PIN": "AA22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "cd_dat3": {
            "PACKAGE_PIN": "AC21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "clk": {
            "PACKAGE_PIN": "AB23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "OUTPUT"
        },
        "cmd": {
            "PACKAGE_PIN": "AB22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "sddet": {
            "PACKAGE_PIN": "AA21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        },
        "sdwp": {
            "PACKAGE_PIN": "Y21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        }
    },
    "pins": {
	"cpu_reset": {
	    "PACKAGE_PIN": "",
	    "IOSTANDARD": "LVCMOS15",
	    "PIO_DIRECTION": "INPUT"
	},
	"userClk_p": {
	    "PACKAGE_PIN": "K29",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"userClk_n": {
	    "PACKAGE_PIN": "K28",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"smaUserClk_p": {
	    "PACKAGE_PIN": "L25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"smaUserClk_n": {
	    "PACKAGE_PIN": "K25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtRefClk_p": {
	    "PACKAGE_PIN": "J8",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRefClk_n": {
	    "PACKAGE_PIN": "J7",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_p": {
	    "PACKAGE_PIN": "K6",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_n": {
	    "PACKAGE_PIN": "K5",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtTx_p": {
	    "PACKAGE_PIN": "K2",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtTx_n": {
	    "PACKAGE_PIN": "K1",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"uart_d_in": {
	    "PACKAGE_PIN": "M19",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "INPUT"
	},
	"uart_d_out": {
	    "PACKAGE_PIN": "K24",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "OUTPUT"
	}
    }
}


================================================
FILE: boardinfo/kc705g1.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Kintex7", "PCIE", "PCIE1", "PcieHostInterface", "PhysAddrWidth=40", "PcieLanes=8",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7k325tffg900-2",
        "need_pcie" : "x7_gen1x8",
        "TOP" : "PcieTop",
        "constraints": ["constraints/xilinx/kc705.xdc"],
        "implconstraints": ["constraints/xilinx/kc705.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=8", "--derivedclockperiod=4", "--pcieclockperiod=8"],
        "rewireclockstring" : ""
    },
    "fmc1": {
    "LA00_p_CC": {
        "LOC": "C25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA00_n_CC": {
        "LOC": "B25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_p_CC": {
        "LOC": "D26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_n_CC": {
        "LOC": "C26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_p": {
        "LOC": "H24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_n": {
        "LOC": "H25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_p": {
        "LOC": "H26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_n": {
        "LOC": "H27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_p": {
        "LOC": "G28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_n": {
        "LOC": "F28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_p": {
        "LOC": "G29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_n": {
        "LOC": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_p": {
        "LOC": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_n": {
        "LOC": "G30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_p": {
        "LOC": "E28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_n": {
        "LOC": "D28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_p": {
        "LOC": "E29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_n": {
        "LOC": "E30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_p": {
        "LOC": "B30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_n": {
        "LOC": "A30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_p": {
        "LOC": "D29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_n": {
        "LOC": "C30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_p": {
        "LOC": "G27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_n": {
        "LOC": "F27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_p": {
        "LOC": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_n": {
        "LOC": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_p": {
        "LOC": "A25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_n": {
        "LOC": "A26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_p": {
        "LOC": "B28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_n": {
        "LOC": "A28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_p": {
        "LOC": "C24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_n": {
        "LOC": "B24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_p": {
        "LOC": "B27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_n": {
        "LOC": "A27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_p_CC": {
        "LOC": "AB27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_n_CC": {
        "LOC": "AC27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_p_CC": {
        "LOC": "AD27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_n_CC": {
        "LOC": "AD28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_p": {
        "LOC": "AJ26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_n": {
        "LOC": "AK26",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_p": {
        "LOC": "bogus",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_n": {
        "LOC": "bogus",
        "IOSTANDARD": "LVCMOS25"
        }
    },
    "uart": {
		"d_in": {
			"PACKAGE_PIN": "M19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"d_out": {
			"PACKAGE_PIN": "K24",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		},
		"rts": {
			"PACKAGE_PIN": "K23",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"cts": {
			"PACKAGE_PIN": "L27",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		}
    },
    "sdio": {
        "dat0": {
            "PACKAGE_PIN": "AC20",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat1": {
            "PACKAGE_PIN": "AA23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat2": {
            "PACKAGE_PIN": "AA22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "cd_dat3": {
            "PACKAGE_PIN": "AC21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "clk": {
            "PACKAGE_PIN": "AB23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "OUTPUT"
        },
        "cmd": {
            "PACKAGE_PIN": "AB22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "sddet": {
            "PACKAGE_PIN": "AA21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        },
        "sdwp": {
            "PACKAGE_PIN": "Y21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        }
    },
    "pins": {
	"userClk_p": {
	    "PACKAGE_PIN": "K29",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"userClk_n": {
	    "PACKAGE_PIN": "K28",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"smaUserClk_p": {
	    "PACKAGE_PIN": "L25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"smaUserClk_n": {
	    "PACKAGE_PIN": "K25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtRefClk_p": {
	    "PACKAGE_PIN": "J8",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRefClk_n": {
	    "PACKAGE_PIN": "J7",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_p": {
	    "PACKAGE_PIN": "K6",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_n": {
	    "PACKAGE_PIN": "K5",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtTx_p": {
	    "PACKAGE_PIN": "K2",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtTx_n": {
	    "PACKAGE_PIN": "K1",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"uart_d_in": {
	    "PACKAGE_PIN": "M19",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "INPUT"
	},
	"uart_d_out": {
	    "PACKAGE_PIN": "K24",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "OUTPUT"
	}
    }
}


================================================
FILE: boardinfo/kc705g2.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Kintex7", "PCIE", "PCIE2", "PcieHostInterface", "PhysAddrWidth=40", "PcieLanes=8",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7k325tffg900-2",
        "need_pcie" : "x7_gen2x8",
        "TOP" : "PcieTop",
        "constraints":     ["constraints/xilinx/kc705g2.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "implconstraints": ["constraints/xilinx/kc705g2.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=4", "--derivedclockperiod=4", "--pcieclockperiod=4"],
        "rewireclockstring" : ""
    },
    "fmc1": {
    "LA00_p_CC": {
        "PACKAGE_PIN": "C25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA00_n_CC": {
        "PACKAGE_PIN": "B25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_p_CC": {
        "PACKAGE_PIN": "D26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA01_n_CC": {
        "PACKAGE_PIN": "C26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_p": {
        "PACKAGE_PIN": "H24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA02_n": {
        "PACKAGE_PIN": "H25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_p": {
        "PACKAGE_PIN": "H26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA03_n": {
        "PACKAGE_PIN": "H27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_p": {
        "PACKAGE_PIN": "G28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA04_n": {
        "PACKAGE_PIN": "F28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_p": {
        "PACKAGE_PIN": "G29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA05_n": {
        "PACKAGE_PIN": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_p": {
        "PACKAGE_PIN": "H30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA06_n": {
        "PACKAGE_PIN": "G30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_p": {
        "PACKAGE_PIN": "E28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA07_n": {
        "PACKAGE_PIN": "D28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_p": {
        "PACKAGE_PIN": "E29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA08_n": {
        "PACKAGE_PIN": "E30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_p": {
        "PACKAGE_PIN": "B30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA09_n": {
        "PACKAGE_PIN": "A30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_p": {
        "PACKAGE_PIN": "D29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA10_n": {
        "PACKAGE_PIN": "C30",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_p": {
        "PACKAGE_PIN": "G27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA11_n": {
        "PACKAGE_PIN": "F27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_p": {
        "PACKAGE_PIN": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA12_n": {
        "PACKAGE_PIN": "C29",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_p": {
        "PACKAGE_PIN": "A25",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA13_n": {
        "PACKAGE_PIN": "A26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_p": {
        "PACKAGE_PIN": "B28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA14_n": {
        "PACKAGE_PIN": "A28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_p": {
        "PACKAGE_PIN": "C24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA15_n": {
        "PACKAGE_PIN": "B24",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_p": {
        "PACKAGE_PIN": "B27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA16_n": {
        "PACKAGE_PIN": "A27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_p_CC": {
        "PACKAGE_PIN": "AB27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA17_n_CC": {
        "PACKAGE_PIN": "AC27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_p_CC": {
        "PACKAGE_PIN": "AD27",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA18_n_CC": {
        "PACKAGE_PIN": "AD28",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_p": {
        "PACKAGE_PIN": "AJ26",
        "IOSTANDARD": "LVCMOS25"
        },
    "LA19_n": {
        "PACKAGE_PIN": "AK26",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_p": {
        "PACKAGE_PIN": "bogus",
        "IOSTANDARD": "LVCMOS25"
        },
    "CLK0_M2C_n": {
        "PACKAGE_PIN": "bogus",
        "IOSTANDARD": "LVCMOS25"
        }
    },
    "uart": {
		"d_in": {
			"PACKAGE_PIN": "M19",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"d_out": {
			"PACKAGE_PIN": "K24",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		},
		"rts": {
			"PACKAGE_PIN": "K23",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "INPUT"
		},
		"cts": {
			"PACKAGE_PIN": "L27",
			"IOSTANDARD": "LVCMOS25",
			"PIO_DIRECTION": "OUTPUT"
		}
    },
    "sdio": {
        "dat0": {
            "PACKAGE_PIN": "AC20",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat1": {
            "PACKAGE_PIN": "AA23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "dat2": {
            "PACKAGE_PIN": "AA22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "cd_dat3": {
            "PACKAGE_PIN": "AC21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "clk": {
            "PACKAGE_PIN": "AB23",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "OUTPUT"
        },
        "cmd": {
            "PACKAGE_PIN": "AB22",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "BIDIR"
        },
        "sddet": {
            "PACKAGE_PIN": "AA21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        },
        "sdwp": {
            "PACKAGE_PIN": "Y21",
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "INPUT"
        }
    },
    "pins": {
	"userClk_p": {
	    "PACKAGE_PIN": "K29",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"userClk_n": {
	    "PACKAGE_PIN": "K28",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"smaUserClk_p": {
	    "PACKAGE_PIN": "L25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"smaUserClk_n": {
	    "PACKAGE_PIN": "K25",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtRefClk_p": {
	    "PACKAGE_PIN": "J8",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRefClk_n": {
	    "PACKAGE_PIN": "J7",
	    "IOSTANDARD": "LVDS_25",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_p": {
	    "PACKAGE_PIN": "K6",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtRx_n": {
	    "PACKAGE_PIN": "K5",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "INPUT"
	},
	"mgtTx_p": {
	    "PACKAGE_PIN": "K2",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"mgtTx_n": {
	    "PACKAGE_PIN": "K1",
	    "DIFF_TERM": "TRUE",
	    "PIO_DIRECTION": "OUTPUT"
	},
	"uart_d_in": {
	    "PACKAGE_PIN": "M19",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "INPUT"
	},
	"uart_d_out": {
	    "PACKAGE_PIN": "K24",
	    "IOSTANDARD": "LVCMOS25",
	    "PIO_DIRECTION": "OUTPUT"
	}
    }
}


================================================
FILE: boardinfo/kcu105.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Virtex7", "PCIE", "PCIE3", "PcieHostInterface", "PhysAddrWidth=40", "NUMBER_OF_LEDS=8", "PcieLanes=8",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "XCKU040-2FFVA1156E",
        "need_pcie" : "x7_gen3x8",
        "TOP" : "PcieTop",
        "constraints": [],
        "implconstraints": ["constraints/xilinx/kcu105.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=4", "--derivedclockperiod=4", "--pcieclockperiod=4"],
        "rewireclockstring" : ""
    },
    "leds" : {
		"L0" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 },
		"L1" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 },
		"L2" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 },
		"L3" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 },
		"L4" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 },
		"L5" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 },
		"L6" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 },
		"L7" : {
		 "LOC" : "bogus",
		 "IOSTANDARD" : "LVCMOS15",
		 "PIO_DIRECTION" : "OUTPUT"
		 }
	},
    "sfp1": {
		 "rxp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "rxn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "txp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 },
		 "txn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 }
    },
    "sfp2": {
		 "rxp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "rxn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "txp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 },
		 "txn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 }
    },
    "sfp3": {
		 "rxp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "rxn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "txp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 },
		 "txn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 }
    },
    "sfp4": {
		 "rxp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "rxn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "INPUT"
		 },
		 "txp" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 },
		 "txn" : {
			     "LOC" : "bogus",
			     "PIO_DIRECTION" : "OUTPUT"
		 }
    },
    "uart": {
		"d_in": {
			"LOC": "bogus",
			"IOSTANDARD": "LVCMOS18",
			"PIO_DIRECTION": "INPUT"
		},
		"d_out": {
			"LOC": "bogus",
			"IOSTANDARD": "LVCMOS18",
			"PIO_DIRECTION": "OUTPUT"
		},
		"rts": {
			"LOC": "bogus",
			"IOSTANDARD": "LVCMOS18",
			"PIO_DIRECTION": "INPUT"
		},
		"cts": {
			"LOC": "bogus",
			"IOSTANDARD": "LVCMOS18",
			"PIO_DIRECTION": "OUTPUT"
		}
    },
    "iic_main": {
		"sda": {
			"LOC": "bogus",
			"IOSTANDARD": "LVCMOS18",
			"PIO_DIRECTION": "BIDIR"
		},
		"scl": {
			"LOC": "bogus",
			"IOSTANDARD": "LVCMOS18",
			"PIO_DIRECTION": "BIDIR"
		}
    },
    "pins": {
		"userClk_p": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
		"userClk_n": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
		"smaUserClk_p": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "OUTPUT"
		},
		"smaUserClk_n": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "OUTPUT"
		},
	        "sys_clk_p": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
	        "sys_clk_n": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
	        "si5324_clk_p": {
			"LOC": "bogus",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
	        "si5324_clk_n": {
			"LOC": "bogus",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
		"mgtRefClk_p": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
		"mgtRefClk_n": {
			"LOC": "bogus",
			"IOSTANDARD": "LVDS_25",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
		"mgtRx_p": {
			"LOC": "bogus",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
		"mgtRx_n": {
			"LOC": "bogus",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "INPUT"
		},
		"mgtTx_p": {
			"LOC": "bogus",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "OUTPUT"
		},
		"mgtTx_n": {
			"LOC": "bogus",
			"DIFF_TERM": "TRUE",
			"PIO_DIRECTION": "OUTPUT"
		},
		"si5324_rst_n": {
			"LOC": "bogus",
			"IOSTANDARD": "LVCMOS18",
			"PIO_DIRECTION": "OUTPUT"
		}
    }
}




================================================
FILE: boardinfo/miniitx100.json
================================================
{
    "options": {
        "os" : "android",
        "partname" : "xc7z100ffg900-2",
        "rewireclockstring" : "tclzynqrewireclock",
        "constraints": ["constraints/xilinx/xc7z100ffg900.xdc", "constraints/xilinx/miniitx100.xdc"],
        "implconstraints": ["constraints/xilinx/xc7z100ffg900.xdc", "constraints/xilinx/miniitx100.xdc"],
        "TOP" : "ZynqTop",
        "runscript" : "run.android",
        "bsvdefines" : ["XILINX=1", "ZYNQ", "ZynqHostInterface", "PhysAddrWidth=32", "NUMBER_OF_LEDS=8", "PcieLanes=4",
			"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.android",
			"CONNECTAL_EXENAME=android.exe", "CONNECTAL_EXENAME2=android.exe2"],
	"CONNECTALFLAGS": ["--mainclockperiod=5", "--derivedclockperiod=2.5"],
        "need_pcie" : "unused"
    },
    "uart": {
        "d_out": {
            "IOSTANDARD": "LVCMOS15",
            "PIO_DIRECTION": "OUTPUT",
            "LOC": "C19"
        },
        "d_in": {
            "IOSTANDARD": "LVCMOS15",
            "PIO_DIRECTION": "INPUT",
            "LOC": "D18"
        }
    },
    "i2c_main": {
        "scl": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "LOC": "A19"
        },
        "sda": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "LOC": "F19"
        },
        "mux_reset": {
            "IOSTANDARD": "LVCMOS15",
            "PIO_DIRECTION": "OUTPUT",
            "LOC": "F20"
        }
    },
    "pcie": {
        "sys_clk_p": {
            "IOSTANDARD": "DIFF_SSTL15",
            "PIO_DIRECTION": "OUTPUT",
            "LOC": "N8"
        },
        "sys_clk_n": {
            "IOSTANDARD": "DIFF_SSTL15",
            "PIO_DIRECTION": "OUTPUT",
            "LOC": "N7"
        },
        "sys_reset_n": {
            "IOSTANDARD": "LVCMOS25",
            "PIO_DIRECTION": "OUTPUT",
            "LOC": "AC18"
        }
    },
    "sfp1": {
        "mod_def0": {
            "IOSTANDARD": "LVCMOS25",
            "LOC": "AB20"
        },
        "mod_def1": {
            "IOSTANDARD": "LVCMOS25",
            "LOC": "AB19"
        },
        "mod_def2": {
            "IOSTANDARD": "LVCMOS25",
            "LOC": "AA19"
        },
        "rx_los": {
            "PIO_DIRECTION": "INPUT",
            "IOSTANDARD": "LVCMOS25",
            "LOC": "AE20"
        },
        "tx_disable": {
            "PIO_DIRECTION": "OUTPUT",
            "IOSTANDARD": "LVCMOS25",
            "LOC": "AA18"
        },
        "tx_fault": {
            "PIO_DIRECTION": "INPUT",
            "IOSTANDARD": "LVCMOS25",
            "LOC": "AD19"
        },
        "rxp": {
            "PIO_DIRECTION": "INPUT",
            "LOC": "AC4"
        },
        "rxn": {
            "PIO_DIRECTION": "INPUT",
            "LOC": "AC3"
        },
        "txp": {
            "PIO_DIRECTION": "OUTPUT",
            "LOC": "AB2"
        },
        "txn": {
            "PIO_DIRECTION": "OUTPUT",
            "LOC": "AB1"
        }
    }
}


================================================
FILE: boardinfo/ncverilog.json
================================================
{
    "options": {
        "os" : "ubuntu",
        "partname" : "xc7z020clg484-1",
        "TOP" : "XsimTop",
	"bsvdefines": ["CnocTop", "XsimHostInterface", "PhysAddrWidth=40", "SIMULATION", "SVDPI",
		       	"CONNECTAL_BITS_DEPENDENCES=ncverilogsim"],
        "CONNECTALFLAGS" : ["--mainclockperiod=20", "--derivedclockperiod=10"],
        "need_pcie" : "unused"
    }
}




================================================
FILE: boardinfo/nfsume.json
================================================
{
    "options": {
        "bsvdefines" : ["XILINX=1", "Virtex7", "PCIE", "PCIE3", "PcieHostInterface", "PhysAddrWidth=40", "NUMBER_OF_LEDS=2", "PcieLanes=8",
		       	"CONNECTAL_BITS_DEPENDENCES=hw/mkTop.bit", "CONNECTAL_RUN_SCRIPT=$(CONNECTALDIR)/scripts/run.pcietest"],
        "os" : "ubuntu",
        "partname" : "xc7vx690tffg1761-3",
        "need_pcie" : "x7_gen3x8",
        "TOP" : "PcieTop",
        "constraints": ["constraints/xilinx/nfsume.xdc"],
        "implconstraints": ["constraints/xilinx/nfsume.xdc", "constraints/xilinx/pcie-clocks.xdc"],
        "runscript" : "run.pcietest",
        "CONNECTALFLAGS" : ["--mainclockperiod=4", "--derivedclockperiod=4", "--pcieclockperiod=4"],
        "rewireclockstring" : ""
    },
    "BTN": {
        "BTN[0]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AR13"
        },
        "BTN[1]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "BB12"
        }
    },
    "CLK": {
        "FPGA_SYSCLK_N": {
            "PIO_DIRECTION": "INPUT",
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "G18"
        },
        "FPGA_SYSCLK_P": {
            "PIO_DIRECTION": "INPUT",
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "H19"
        }
    },
    "CPLD": {
        "CPLD_IMGSEL[0]": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AP31"
        },
        "CPLD_IMGSEL[1]": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AP33"
        },
        "CPLD_IMGSEL[2]": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AR33"
        },
        "CPLD_RECONFIG": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AK32"
        }
    },
    "DDR": {
        "DDR3_SYSCLK_N": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "E35"
        },
        "DDR3_SYSCLK_P": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "E34"
        }
    },
    "FMC": {
	"FMC_GBTCLK_P[00]": {
	    "DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AT8"
	},
	"FMC_GBTCLK_N[00]": {
	    "DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AT7"
	},
        "FMC_CLK0_M2C_N": {
            "IOSTANDARD": "LVDS",
	    "DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AT27"
        },
        "FMC_CLK0_M2C_P": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AR27"
        },
        "FMC_CLK1_M2C_N": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AV35"
        },
        "FMC_CLK1_M2C_P": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AV34"
        },
        "FMC_LA_N[00]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV28"
        },
        "FMC_LA_N[01]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AR28"
        },
        "FMC_LA_N[02]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AT29"
        },
        "FMC_LA_N[03]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB27"
        },
        "FMC_LA_N[04]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB29"
        },
        "FMC_LA_N[05]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV26"
        },
        "FMC_LA_N[06]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA27"
        },
        "FMC_LA_N[07]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AY28"
        },
        "FMC_LA_N[08]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AP28"
        },
        "FMC_LA_N[09]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AR25"
        },
        "FMC_LA_N[10]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AW26"
        },
        "FMC_LA_N[11]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AT26"
        },
        "FMC_LA_N[12]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV29"
        },
        "FMC_LA_N[13]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AW28"
        },
        "FMC_LA_N[14]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AN26"
        },
        "FMC_LA_N[15]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AM27"
        },
        "FMC_LA_N[16]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AL27"
        },
        "FMC_LA_N[17]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AY33"
        },
        "FMC_LA_N[18]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV33"
        },
        "FMC_LA_N[19]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AW31"
        },
        "FMC_LA_N[20]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AY30"
        },
        "FMC_LA_N[21]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB31"
        },
        "FMC_LA_N[22]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA32"
        },
        "FMC_LA_N[23]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB34"
        },
        "FMC_LA_N[24]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AU34"
        },
        "FMC_LA_N[25]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AU33"
        },
        "FMC_LA_N[26]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB33"
        },
        "FMC_LA_N[27]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV31"
        },
        "FMC_LA_N[28]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AT35"
        },
        "FMC_LA_N[29]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB36"
        },
        "FMC_LA_N[30]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA35"
        },
        "FMC_LA_N[31]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AP30"
        },
        "FMC_LA_N[32]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AW36"
        },
        "FMC_LA_N[33]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AU36"
        },
        "FMC_LA_P[00]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AU28"
        },
        "FMC_LA_P[01]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AP27"
        },
        "FMC_LA_P[02]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AR29"
        },
        "FMC_LA_P[03]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB26"
        },
        "FMC_LA_P[04]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB28"
        },
        "FMC_LA_P[05]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV25"
        },
        "FMC_LA_P[06]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA26"
        },
        "FMC_LA_P[07]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AY27"
        },
        "FMC_LA_P[08]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AN28"
        },
        "FMC_LA_P[09]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AP25"
        },
        "FMC_LA_P[10]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AW25"
        },
        "FMC_LA_P[11]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AT25"
        },
        "FMC_LA_P[12]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AU29"
        },
        "FMC_LA_P[13]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AW27"
        },
        "FMC_LA_P[14]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AN25"
        },
        "FMC_LA_P[15]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AM26"
        },
        "FMC_LA_P[16]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AK27"
        },
        "FMC_LA_P[17]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AY32"
        },
        "FMC_LA_P[18]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AU32"
        },
        "FMC_LA_P[19]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV30"
        },
        "FMC_LA_P[20]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AW30"
        },
        "FMC_LA_P[21]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA30"
        },
        "FMC_LA_P[22]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA31"
        },
        "FMC_LA_P[23]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA34"
        },
        "FMC_LA_P[24]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AT34"
        },
        "FMC_LA_P[25]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AT32"
        },
        "FMC_LA_P[26]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BB32"
        },
        "FMC_LA_P[27]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AU31"
        },
        "FMC_LA_P[28]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AR34"
        },
        "FMC_LA_P[29]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "BA36"
        },
        "FMC_LA_P[30]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AY34"
        },
        "FMC_LA_P[31]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AN30"
        },
        "FMC_LA_P[32]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AV36"
        },
        "FMC_LA_P[33]": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AT36"
        },
        "FMC_PRSNT_LS": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AR30"
        }
    },
    "Fan": {
        "FAN_PWM": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AN34"
        },
        "FAN_TACH": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AP32"
        }
    },
    "I2C": {
        "I2C_FPGA_SCL": {
            "PIO_DIRECTION": "INPUT",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AK24"
        },
        "I2C_FPGA_SDA": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AK25"
        },
        "I2C_MUX_RESET": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AM39"
        }
    },
    "sdio": {
        "cmd": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AJ26"
        },
        "clk": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AJ25"
        },
        "cd": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AW35"
        },
        "d0": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AY29"
        },
        "d1": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AM28"
        },
        "d2": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AL25"
        },
        "d3": {
            "PIO_DIRECTION": "BIDIR",
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AL26"
        }
    },
    "LED": {
        "LED[0]": {
            "PIO_DIRECTION": "OUTPUT",
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AR22"
        },
        "LED[1]": {
            "PIO_DIRECTION": "OUTPUT",
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AR23"
        }
    },
    "PCIE": {
        "PCIE_SYS_RESETN": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AY35"
        },
        "PCIE_PRSNT_B_LS": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AR35"
        },
        "PCIE_WAKE": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AT31"
        },
        "PCIE_SYSCLK_N": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AB8"
        },
        "PCIE_SYSCLK_P": {
            "IOSTANDARD": "LVDS",
            "PACKAGE_PIN": "AB7"
        }
    },
    "PMODCTRL": {
        "DIR_JA[0]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AT16"
        },
        "DIR_JA[1]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AU16"
        },
        "DIR_JA[2]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "BB19"
        },
        "DIR_JA[3]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AV20"
        },
        "DIR_JA[4]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AW20"
        },
        "DIR_JA[5]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "BA17"
        },
        "DIR_JA[6]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "BB17"
        },
        "DIR_JA[7]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AY20"
        },
        "PMOD_OE_B": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "C40"
        }
    },
    "PMODData": {
        "JA_FPGA[0]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AW18"
        },
        "JA_FPGA[1]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AW17"
        },
        "JA_FPGA[2]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AU19"
        },
        "JA_FPGA[3]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AV19"
        },
        "JA_FPGA[4]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AT20"
        },
        "JA_FPGA[5]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AT19"
        },
        "JA_FPGA[6]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AV16"
        },
        "JA_FPGA[7]": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AW16"
        }
    },
    "POWER": {
        "PCON_ALERT_B": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "J41"
        },
        "PCON_AUXFAULT_B": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "M41"
        },
        "PCON_FAULT": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "N40"
        },
        "PWR_SNS": {
            "IOSTANDARD": "LVCMOS15",
            "PACKAGE_PIN": "AW42"
        }
    },
    "QDRIIA": {
        "QDRII_SYSCLK_N": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AD33"
        },
        "QDRII_SYSCLK_P": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AD32"
        }
    },
    "QDRIIC": {
        "QDRIIC_SYSCLK_N": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AU13"
        },
        "QDRIIC_SYSCLK_P": {
            "IOSTANDARD": "LVDS",
			"DIFF_TERM": "TRUE",
            "PACKAGE_PIN": "AU14"
        }
    },
    "MICRO_SD": {
        "SD_CCLK": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AJ25"
        },
        "SD_CD": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AW35"
        },
        "SD_CMD": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AJ26"
        },
        "SD_D[0]": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AY29"
        },
        "SD_D[1]": {
            "IOSTANDARD": "LVCMOS18",
            "PACKAGE_PIN": "AM28"
        },
        "SD_
Download .txt
gitextract_q6vy71mg/

├── .gitignore
├── .travis.yml
├── LICENSE.txt
├── Makefile
├── Makefile.connectal
├── Makefile.version
├── README.md
├── boardinfo/
│   ├── ac701.json
│   ├── ac701_untethered.json
│   ├── ac701g2.json
│   ├── asic.json
│   ├── awsf1.json
│   ├── bluesim.json
│   ├── cvc.json
│   ├── de5.json
│   ├── htg4.json
│   ├── kc160g2.json
│   ├── kc705.json
│   ├── kc705_untethered.json
│   ├── kc705g1.json
│   ├── kc705g2.json
│   ├── kcu105.json
│   ├── miniitx100.json
│   ├── ncverilog.json
│   ├── nfsume.json
│   ├── parallella.json
│   ├── ultra96.json
│   ├── v2000t.json
│   ├── vc707.json
│   ├── vc707g2.json
│   ├── vc709.json
│   ├── vcs.json
│   ├── vcu108.json
│   ├── vcu118.json
│   ├── verilator.json
│   ├── vsim.json
│   ├── xsim.json
│   ├── zc702.json
│   ├── zc706.json
│   ├── zc706_ubuntu.json
│   ├── zcu102.json
│   ├── zcu111.json
│   ├── zedboard.json
│   ├── zedboard_ubuntu.json
│   ├── zybo.json
│   └── zynq100.json
├── bsv/
│   ├── Adapter.bsv
│   ├── AddressGenerator.bsv
│   ├── AsicTop.bsv
│   ├── AvalonBits.bsv
│   ├── AvalonDdr3Controller.bsv
│   ├── AvalonDma.bsv
│   ├── AvalonGather.bsv
│   ├── AvalonMasterSlave.bsv
│   ├── AvalonSplitter.bsv
│   ├── AwsF1Top.bsv
│   ├── Axi4MasterSlave.bsv
│   ├── AxiBits.bsv
│   ├── AxiDdr3Controller.bsv
│   ├── AxiDma.bsv
│   ├── AxiGather.bsv
│   ├── AxiMasterSlave.bsv
│   ├── AxiStream.bsv
│   ├── BpiFlash.bsv
│   ├── BramMux.bsv
│   ├── CnocPortal.bsv
│   ├── ConnectableWithTrace.bsv
│   ├── ConnectalAlteraCells.bsv
│   ├── ConnectalBram.bsv
│   ├── ConnectalBramFifo.bsv
│   ├── ConnectalClocks.bsv
│   ├── ConnectalCompletionBuffer.bsv
│   ├── ConnectalConfig.bsv
│   ├── ConnectalEHR.bsv
│   ├── ConnectalFIFO.bsv
│   ├── ConnectalMMU.bsv
│   ├── ConnectalMemTypes.bsv
│   ├── ConnectalMemUtils.bsv
│   ├── ConnectalMemory.bsv
│   ├── ConnectalMimo.bsv
│   ├── ConnectalPrelude.bsv
│   ├── ConnectalXilinxCells.bsv
│   ├── CtrlMux.bsv
│   ├── DisplayInd.bsv
│   ├── Dsp48E1.bsv
│   ├── GearboxGetPut.bsv
│   ├── GetPutM.bsv
│   ├── GetPutWithClocks.bsv
│   ├── HostInterface.bsv
│   ├── LinkerLib.bsv
│   ├── MIFO.bsv
│   ├── MemPipe.bsv
│   ├── MemReadEngine.bsv
│   ├── MemServer.bsv
│   ├── MemServerInternal.bsv
│   ├── MemServerPortal.bsv
│   ├── MemToPcie.bsv
│   ├── MemWriteEngine.bsv
│   ├── OldEHR.bsv
│   ├── PS4LIB.bsv
│   ├── PS5LIB.bsv
│   ├── PS7LIB.bsv
│   ├── PS7Trace.bsv
│   ├── PS8LIB.bsv
│   ├── ParallellaTop.bsv
│   ├── Pcie1EndpointX7.bsv
│   ├── Pcie2EndpointX7.bsv
│   ├── Pcie3EndpointX7.bsv
│   ├── Pcie3RootPortX7.bsv
│   ├── PcieCsr.bsv
│   ├── PcieEndpointS5.bsv
│   ├── PcieEndpointS5Test.bsv
│   ├── PcieGearbox.bsv
│   ├── PcieHost.bsv
│   ├── PcieRootDevice.bsv
│   ├── PcieRootPortX7.bsv
│   ├── PcieSplitter.bsv
│   ├── PcieStateChanges.bsv
│   ├── PcieToMem.bsv
│   ├── PcieTop.bsv
│   ├── PcieTracer.bsv
│   ├── PhysMemSlaveFromBram.bsv
│   ├── Pipe.bsv
│   ├── Platform.bsv
│   ├── Portal.bsv
│   ├── SimDma.bsv
│   ├── SimLink.bsv
│   ├── SyncAxisFifo32x8.bsv
│   ├── SyncBits.bsv
│   ├── Trace.bsv
│   ├── TraceMemClient.bsv
│   ├── UntetheredTop.bsv
│   ├── XsimIF.bsv
│   ├── XsimTop.bsv
│   ├── ZynqTop.bsv
│   └── ZynqUltraTop.bsv
├── constraints/
│   ├── altera/
│   │   ├── de5.qsf
│   │   ├── de5.sdc
│   │   ├── htg4.qsf
│   │   └── htg4.sdc
│   └── xilinx/
│       ├── Readme.md
│       ├── ac701.xdc
│       ├── awsf1.xdc
│       ├── bluesim.xdc
│       ├── bluesim_pcie.xdc
│       ├── cdc.tcl
│       ├── kc160g2.xdc
│       ├── kc705-3.0.xdc
│       ├── kc705-ddr3.prj
│       ├── kc705.xdc
│       ├── kc705g2.xdc
│       ├── kcu105.xdc
│       ├── miniitx100-axiddr3.prj
│       ├── miniitx100.xdc
│       ├── nfsume-axiddr3.prj
│       ├── nfsume.xdc
│       ├── ok/
│       │   ├── zc7z010clg400.xdc
│       │   ├── zc7z020clg400.xdc
│       │   ├── zc7z020clg484.xdc
│       │   ├── zc7z045ffg900.xdc
│       │   └── zc7z100ffg900.xdc
│       ├── parallella.xdc
│       ├── pcie-clocks.xdc
│       ├── v2000t.xdc
│       ├── vc707-axiddr3.prj
│       ├── vc707-portal-pblock.xdc
│       ├── vc707.xdc
│       ├── vc707_aurora.xdc
│       ├── vc707_ddr3.xdc
│       ├── vc707_ddr3_pins.xdc
│       ├── vc707g2-axiddr3.prj
│       ├── vc707g2.xdc
│       ├── vc709.xdc
│       ├── vcu108.xdc
│       ├── vcu118.xdc
│       ├── verilator.xdc
│       ├── xc7z010clg400.xdc
│       ├── xc7z045ffg900.xdc
│       ├── xc7z100ffg900.xdc
│       ├── zc706-axiddr3.prj
│       ├── zc706.xdc
│       ├── zc706_pl_ddr3_pins.xdc
│       ├── zc7z020clg400.xdc
│       ├── zc7z020clg484.xdc
│       ├── zcu102.xdc
│       ├── zcu111.xdc
│       ├── zybo.xdc
│       └── zynq100.xdc
├── contrib/
│   ├── bluescope/
│   │   ├── Makefile
│   │   ├── Memcpy.bsv
│   │   ├── Top.bsv
│   │   └── testbluescope.cpp
│   ├── bluescopeevent/
│   │   ├── Makefile
│   │   ├── SignalGen.bsv
│   │   ├── Top.bsv
│   │   └── testbluescopeevent.cpp
│   ├── bluescopeeventpio/
│   │   ├── Makefile
│   │   ├── SignalGen.bsv
│   │   ├── Top.bsv
│   │   └── testbluescopeeventpio.cpp
│   ├── channelselect/
│   │   ├── ChannelSelect.bsv
│   │   ├── ChannelSelectTest.bsv
│   │   ├── ChannelSelectTestInterfaces.bsv
│   │   ├── DDS.bsv
│   │   ├── DDSTest.bsv
│   │   ├── DDSTestInterfaces.bsv
│   │   ├── FPCMult.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── SDRTypes.bsv
│   │   ├── Top.bsv
│   │   ├── sinetable.c
│   │   └── testchannelselecttest.cpp
│   ├── fib/
│   │   ├── Fib.bsv
│   │   ├── FibNarrow.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   └── testfib.cpp
│   ├── flowcontrol/
│   │   ├── Makefile
│   │   ├── Sink.bsv
│   │   ├── Top.bsv
│   │   └── test.cpp
│   ├── importverilog/
│   │   ├── .gitignore
│   │   ├── Main.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── regfile.v
│   │   ├── regfile_tb.v
│   │   └── testmain.cpp
│   ├── maxcommonsubseq/
│   │   ├── HirschA.bsv
│   │   ├── HirschB.bsv
│   │   ├── HirschC.bsv
│   │   ├── MCSAlgorithm.bsv
│   │   ├── Makefile
│   │   ├── Maxcommonsubseq.bsv
│   │   ├── Top.bsv
│   │   ├── hirschberg.py
│   │   └── testmaxcommonsubseq.cpp
│   ├── noc/
│   │   ├── Makefile
│   │   ├── Noc.bsv
│   │   ├── NocNode.bsv
│   │   ├── Readme.md
│   │   ├── Top.bsv
│   │   └── testnoc.cpp
│   ├── noc2d/
│   │   ├── Makefile
│   │   ├── Noc2d.bsv
│   │   ├── NocNode.bsv
│   │   ├── Readme.md
│   │   ├── Top.bsv
│   │   └── testnoc2d.cpp
│   ├── parallella/
│   │   ├── ELink.bsv
│   │   ├── Makefile
│   │   ├── PParallellaLIB.bsv
│   │   ├── ParallellaLib.bsv
│   │   ├── ParallellaLibDefs.bsv
│   │   ├── Top.bsv
│   │   ├── notes.txt
│   │   ├── parallella.v
│   │   └── testmain.cpp
│   ├── perf/
│   │   ├── Makefile
│   │   ├── Perf.bsv
│   │   ├── Top.bsv
│   │   └── testperf.cpp
│   ├── pipe_mul/
│   │   ├── Makefile
│   │   ├── PipeMulTB.bsv
│   │   ├── Top.bsv
│   │   └── testpipe_mul.cpp
│   ├── pipe_mul2/
│   │   ├── Makefile
│   │   ├── PipeMulTB.bsv
│   │   ├── Top.bsv
│   │   └── testpipe_mul.cpp
│   ├── portalperf/
│   │   ├── Makefile
│   │   ├── PortalPerf.bsv
│   │   ├── Repeat.bsv
│   │   ├── Top.bsv
│   │   └── testportalperf.cpp
│   ├── ptest/
│   │   ├── Makefile
│   │   ├── PTest.bsv
│   │   ├── PTest.bsv.bad
│   │   └── PTest.bsv.good
│   ├── serialconfig/
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── Serialconfig.bsv
│   │   └── testserialconfig.cpp
│   ├── smithwaterman/
│   │   ├── GotohB.bsv
│   │   ├── GotohC.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── Smithwaterman.bsv
│   │   ├── Top.bsv
│   │   ├── sw.py
│   │   └── testsmithwaterman.cpp
│   └── splice/
│       ├── Makefile
│       ├── Splice.bsv
│       ├── Top.bsv
│       └── testsplice.cpp
├── cpp/
│   ├── BsimDma.cpp
│   ├── DmaBuffer.cpp
│   ├── DmaBuffer.h
│   ├── MMUServer.h
│   ├── TlpReplay.cpp
│   ├── XsimTop.cpp
│   ├── XsimTop.h
│   ├── bluesim_main.cxx
│   ├── bsim_relay.c
│   ├── dmaManager.c
│   ├── dmaManager.h
│   ├── dmaSendFd.h
│   ├── kernel_module.c
│   ├── manualMMUIndication.h
│   ├── monkit.h
│   ├── platformMemory.cpp
│   ├── poller.cpp
│   ├── portal.c
│   ├── portal.h
│   ├── portalJson.c
│   ├── portalKernel.h
│   ├── portalPrintf.c
│   ├── portalPython.cpp
│   ├── runpython.cpp
│   ├── sock_utils.c
│   ├── sock_utils.h
│   ├── timer.c
│   ├── transportHardware.c
│   ├── transportPortal.c
│   ├── transportSerial.c
│   ├── transportShared.c
│   ├── transportSocket.c
│   ├── transportWebSocket.c
│   ├── transportXsim.c
│   └── verilatortop.cpp
├── debian/
│   ├── changelog
│   ├── compat
│   ├── connectal-doc.docs
│   ├── connectal-doc.install
│   ├── connectal-zynqdrivers.install
│   ├── connectal.dkms
│   ├── connectal.install
│   ├── connectal.udev
│   ├── control
│   ├── copyright
│   ├── docs
│   └── rules
├── doc/
│   ├── Makefile
│   ├── ReadmePartialReconfiguration.md
│   ├── SmithWaterman.md
│   ├── axi_tracing.md
│   ├── centos.md
│   ├── generated/
│   │   └── html/
│   │       └── portal.html
│   ├── ifdef.md
│   ├── library/
│   │   ├── Makefile
│   │   └── source/
│   │       ├── bsv/
│   │       │   ├── addressgenerator.rst
│   │       │   ├── arith.rst
│   │       │   ├── axistream.rst
│   │       │   ├── bsv.rst
│   │       │   ├── ctrlmux.rst
│   │       │   ├── hostinterface.rst
│   │       │   ├── leds.rst
│   │       │   ├── memportal.rst
│   │       │   ├── memreadengine.rst
│   │       │   ├── memtypes.rst
│   │       │   ├── mmu.rst
│   │       │   ├── pipe.rst
│   │       │   └── portal.rst
│   │       ├── bsvsphinx.py
│   │       ├── c/
│   │       │   ├── c.rst
│   │       │   └── portal.rst
│   │       ├── conf.py
│   │       ├── design/
│   │       │   ├── Makefile
│   │       │   ├── abstract.rst
│   │       │   ├── bs-related-papers.bib
│   │       │   ├── conclusion.rst
│   │       │   ├── connectal-framework.rst
│   │       │   ├── design.rst
│   │       │   ├── flowcontrol.rst
│   │       │   ├── host_interface.rst
│   │       │   ├── images/
│   │       │   │   ├── Makefile
│   │       │   │   ├── MemreadEngine.pptx
│   │       │   │   ├── PortalImpl0.pptx
│   │       │   │   ├── data_accel_logical0.pptx
│   │       │   │   ├── data_accel_logical1.pptx
│   │       │   │   ├── data_accel_logical2.pptx
│   │       │   │   ├── data_accel_logical3.pptx
│   │       │   │   ├── data_accel_logical4.pptx
│   │       │   │   ├── msc0.pptx
│   │       │   │   ├── msc1.pptx
│   │       │   │   ├── msc2.pptx
│   │       │   │   ├── platform.pptx
│   │       │   │   └── platforms.pptx
│   │       │   ├── implementing-string-search.rst
│   │       │   ├── interface_definitions.rst
│   │       │   ├── introduction.rst
│   │       │   ├── performance.rst
│   │       │   ├── portal.rst
│   │       │   ├── portalstructure.rst
│   │       │   ├── references.bib
│   │       │   ├── related-work.rst
│   │       │   ├── string-search.rst
│   │       │   └── toolchain.rst
│   │       ├── devguide/
│   │       │   ├── clocks.rst
│   │       │   ├── compilingproject.rst
│   │       │   ├── design.rst
│   │       │   ├── devguide.rst
│   │       │   └── projectstructure.rst
│   │       ├── examples/
│   │       │   ├── index.rst
│   │       │   └── simple.rst
│   │       ├── index.rst
│   │       ├── installation.rst
│   │       ├── intro.rst
│   │       ├── make.rst
│   │       ├── makefile.connectal.build.rst
│   │       ├── makefile.connectal.rst
│   │       ├── themes/
│   │       │   └── connectal/
│   │       │       ├── layout.html
│   │       │       ├── static/
│   │       │       │   └── tracking.js_t
│   │       │       └── theme.conf
│   │       └── tools/
│   │           ├── generate-constraints.rst
│   │           ├── makefilegen.rst
│   │           ├── pcieflat.rst
│   │           ├── tools.rst
│   │           └── topgen.rst
│   ├── makefilegen.md
│   ├── maxcommonsubseq.md
│   ├── previous/
│   │   └── portal.asciidoc
│   ├── server.md
│   └── syntax.md
├── docker/
│   └── Dockerfile
├── drivers/
│   ├── awsf1portal/
│   │   ├── Makefile
│   │   ├── Makefile.dkms
│   │   ├── cdev_bypass.c
│   │   ├── cdev_ctrl.c
│   │   ├── cdev_ctrl.h
│   │   ├── cdev_events.c
│   │   ├── cdev_sgdma.c
│   │   ├── cdev_sgdma.h
│   │   ├── cdev_xvc.c
│   │   ├── cdev_xvc.h
│   │   ├── dkms.conf
│   │   ├── driverversion.h
│   │   ├── libxdma.c
│   │   ├── libxdma.h
│   │   ├── libxdma_api.h
│   │   ├── linux/
│   │   │   └── dma-buf.h
│   │   ├── pcieportal.h
│   │   ├── portal.c
│   │   ├── portal_internal.h
│   │   ├── version.h
│   │   ├── xdma_cdev.c
│   │   ├── xdma_cdev.h
│   │   ├── xdma_ioctl.h
│   │   ├── xdma_mod.c
│   │   └── xdma_mod.h
│   ├── connectalsdhci/
│   │   ├── Makefile
│   │   └── connectalsdhci.c
│   ├── connectalspi/
│   │   ├── Makefile
│   │   └── connectalspi.c
│   ├── pcieportal/
│   │   ├── Makefile
│   │   ├── Makefile.dkms
│   │   ├── dkms.conf
│   │   ├── driverversion.h
│   │   ├── linux/
│   │   │   └── dma-buf.h
│   │   ├── pcieportal.c
│   │   └── pcieportal.h
│   ├── portalmem/
│   │   ├── Makefile
│   │   ├── portalmem.c
│   │   └── portalmem.h
│   └── zynqportal/
│       ├── Makefile
│       ├── zynqportal.c
│       └── zynqportal.h
├── etc/
│   ├── modules-load.d/
│   │   └── connectal.conf
│   └── udev/
│       └── rules.d/
│           ├── 51-connectaltty.rules
│           ├── 52-altera-usb.rules
│           ├── 52-connectaltest.rules
│           ├── 52-digilent-usb.rules
│           └── 99-pcieportal.rules
├── examples/
│   ├── algo1_nandsim/
│   │   ├── Algo1NandSim.bsv
│   │   ├── Makefile
│   │   ├── nandsim.cpp
│   │   └── test.cpp
│   ├── algo2_nandsim/
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── jregexp.charMap
│   │   ├── jregexp.stateMap
│   │   ├── jregexp.stateTransitions
│   │   └── test.cpp
│   ├── aurora/
│   │   ├── Aurora.bsv
│   │   ├── BviAurora.bsv
│   │   ├── Gtx.bsv
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── aurora-clocks.xdc
│   │   ├── aurora.json
│   │   ├── clock.tcl
│   │   ├── synth-ip.tcl
│   │   └── testaurora.cpp
│   ├── bscan/
│   │   ├── BscanIF.bsv
│   │   ├── Makefile
│   │   └── testbscan.cpp
│   ├── caffe/
│   │   ├── Conv.bsv
│   │   ├── INSTALL
│   │   ├── Makefile
│   │   └── README.md
│   ├── echo/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   └── testecho.cpp
│   ├── echo2ind/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   └── testecho.cpp
│   ├── echofast/
│   │   └── Makefile
│   ├── echohost/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── testecho.cpp
│   │   └── vc707_floorplan.xdc
│   ├── echoinvert/
│   │   ├── Echo.bsv
│   │   ├── EchoInterface.bsv
│   │   ├── Makefile
│   │   └── testecho.cpp
│   ├── echojson/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echojsonpy/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   ├── old_testecho.py
│   │   └── testecho.py
│   ├── echomux/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Services.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echoproto/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── echo.proto
│   │   └── testecho.cpp
│   ├── echopy/
│   │   ├── Echo.bsv
│   │   ├── EchoInterface.bsv
│   │   ├── Makefile
│   │   ├── testecho.py
│   │   └── ubuntu-python-dev.sh
│   ├── echoshared/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echoslow/
│   │   ├── Echo.bsv
│   │   └── Makefile
│   ├── echosoft/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── echotrace/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── testecho.cpp
│   │   └── vc707_floorplan.xdc
│   ├── echowebsocket/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Swallow.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── fmcomms1/
│   │   ├── ExtraXilinxCells.bsv
│   │   ├── ExtraXilinxCells.bsv.pp
│   │   ├── FMComms1.bsv
│   │   ├── FMComms1ADC.bsv
│   │   ├── FMComms1DAC.bsv
│   │   ├── FMComms1Pins.bsv
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── clock.tcl
│   │   ├── fmci2c.c
│   │   ├── fmci2c.h
│   │   ├── fmcomms1-fmc.json
│   │   ├── i2c_zedboardandroid.c
│   │   ├── i2c_zedboardandroid.h
│   │   ├── readtrace.py
│   │   ├── testfmcomms1.cpp
│   │   └── testi2c.c
│   ├── gyro_simple/
│   │   ├── Makefile
│   │   ├── clock.tcl
│   │   ├── gyro.h
│   │   ├── gyroVisualize.py
│   │   ├── gyro_simple.h
│   │   ├── pinout.json
│   │   ├── test_gyro.cpp
│   │   └── test_gyro.py
│   ├── gyrospi/
│   │   ├── Makefile
│   │   ├── STest.bsv
│   │   ├── gyro.h
│   │   ├── pinout.json
│   │   └── testspi.cpp
│   ├── hbridge_simple/
│   │   ├── Makefile
│   │   ├── hbridge_simple.h
│   │   ├── pinout.json
│   │   └── test_hbridge.cpp
│   ├── hdmidisplay/
│   │   ├── BsimHdmi.cpp
│   │   ├── HDMI16.bsv
│   │   ├── Makefile
│   │   ├── TestHdmi.pro
│   │   ├── hdmi.json
│   │   ├── hdmidisplay-bluesim.xdc
│   │   ├── hdmidisplay-vc707.xdc
│   │   ├── hdmidisplay-zc702.xdc
│   │   ├── hdmidisplay-zedboard.xdc
│   │   ├── i2c.json
│   │   ├── qtmain.cpp
│   │   ├── testhdmidisplay.cpp
│   │   └── worker.h
│   ├── imageon/
│   │   ├── ImageonCapture.bsv
│   │   ├── ImageonCapturePins.bsv
│   │   ├── Makefile
│   │   ├── Makefile.dump
│   │   ├── clock.tcl
│   │   ├── dump_image.cpp
│   │   ├── i2ccamera.h
│   │   ├── imageon-clocks.xdc
│   │   ├── imageon-fmc.json
│   │   ├── imageon-zedboard.json
│   │   └── testimagecapture.cpp
│   ├── leds/
│   │   ├── LedController.bsv
│   │   ├── Makefile
│   │   ├── pinout.json
│   │   └── testleds.cpp
│   ├── linking/
│   │   ├── GetInverse.v
│   │   ├── LinkerLib.bsv
│   │   ├── Makefile
│   │   ├── Processor.bsv
│   │   ├── ProcessorTop.bsv
│   │   └── Processor_Generated.bsv
│   ├── matmul/
│   │   ├── Makefile
│   │   ├── Makefile.mm
│   │   ├── Makefile.mmif
│   │   ├── clocks.tcl
│   │   ├── design-vc707.tcl
│   │   ├── design.tcl
│   │   ├── mkZynqTop_flpn.xdc
│   │   ├── perf.txt
│   │   ├── synth-ip.tcl
│   │   └── testmm.cpp
│   ├── maxsonar_simple/
│   │   ├── Makefile
│   │   ├── maxsonar_simple.h
│   │   ├── pinout.json
│   │   └── test_maxsonar.cpp
│   ├── memcpy/
│   │   ├── Makefile
│   │   ├── Memcpy.bsv
│   │   └── testmemcpy.cpp
│   ├── memcpyslow/
│   │   └── Makefile
│   ├── memlatency/
│   │   ├── Makefile
│   │   ├── Memlatency.bsv
│   │   └── testmemlatency.cpp
│   ├── memread/
│   │   ├── Makefile
│   │   ├── ReadTest.bsv
│   │   ├── design_vc707.tcl
│   │   ├── testmemread.cpp
│   │   └── vc707_floorplan.xdc
│   ├── memread128/
│   │   └── Makefile
│   ├── memread2/
│   │   ├── Makefile
│   │   ├── Memread2.bsv
│   │   └── testmemread2.cpp
│   ├── memread256/
│   │   └── Makefile
│   ├── memread_4m/
│   │   ├── Makefile
│   │   └── ReadTest.bsv
│   ├── memread_simple/
│   │   ├── Makefile
│   │   ├── ReadTest.bsv
│   │   ├── design_vc707.tcl
│   │   ├── testmemread.cpp
│   │   └── vc707_floorplan.xdc
│   ├── memwrite/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memwrite128/
│   │   └── Makefile
│   ├── memwrite256/
│   │   └── Makefile
│   ├── memwrite_4m/
│   │   ├── Makefile
│   │   └── Memwrite.bsv
│   ├── nandsim/
│   │   ├── Makefile
│   │   └── testnandsim.cpp
│   ├── portal-synth-boundary/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   ├── Top.bsv
│   │   └── testsimple.cpp
│   ├── printf/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── SwallowIF.bsv
│   │   ├── Top.bsv
│   │   └── testecho.cpp
│   ├── rbm/
│   │   ├── LICENSE.txt
│   │   ├── Makefile
│   │   ├── Makefile.rbm
│   │   ├── Readme.md
│   │   └── testrbm.cpp
│   ├── readbw/
│   │   ├── ReadBW.bsv
│   │   └── testreadbw.cpp
│   ├── regexp/
│   │   ├── Makefile
│   │   ├── jregexp.charMap
│   │   ├── jregexp.stateMap
│   │   ├── jregexp.stateTransitions
│   │   └── testregexp.cpp
│   ├── sdcard_spi/
│   │   ├── Makefile
│   │   ├── SPI.bsv
│   │   ├── SPITest.bsv
│   │   ├── pin_translation.json
│   │   ├── readme.txt
│   │   └── sdcard_spi.cpp
│   ├── simple/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   ├── boards/
│   │   │   ├── de5.json
│   │   │   └── htg4.json
│   │   ├── simple.h
│   │   └── testsimple.cpp
│   ├── simplemultibluesim/
│   │   ├── Link.bsv
│   │   ├── LinkIF.bsv
│   │   ├── Makefile
│   │   ├── run.sh
│   │   ├── testsimple.cpp
│   │   └── xsimrun.sh
│   ├── simplesharedhw/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   └── testsimple.cpp
│   ├── strstr/
│   │   ├── Makefile
│   │   ├── StrstrExample.bsv
│   │   └── teststrstr.cpp
│   ├── swmemcpy/
│   │   ├── Makefile
│   │   ├── SWmemcpy.bsv
│   │   └── testswmemcpy.cpp
│   ├── vectoradd_hls/
│   │   ├── Makefile
│   │   ├── README.md
│   │   ├── bsv/
│   │   │   ├── Vadd.bsv
│   │   │   └── VaddBvi.bsv
│   │   ├── solution1/
│   │   │   └── impl/
│   │   │       └── verilog/
│   │   │           └── vectoradd.v
│   │   ├── src/
│   │   │   └── vectoradd.cpp
│   │   └── testvadd.cpp
│   ├── zedboard_robot/
│   │   ├── Controller.bsv
│   │   ├── Makefile
│   │   ├── pinout.json
│   │   ├── sonarVisualize.py
│   │   ├── test_zedboard_robot.cpp
│   │   └── test_zedboard_robot.py
│   └── zynqpcie/
│       ├── Makefile
│       ├── SimpleIF.bsv
│       ├── Top.bsv
│       ├── ZynqPcieTestIF.bsv
│       ├── synth-ip.tcl
│       ├── testsimple.cpp
│       ├── testzynqpcie.cpp
│       └── zynqpcie.json
├── generated/
│   ├── altera/
│   │   ├── ALTERA_DDR3_WRAPPER.bsv
│   │   ├── ALTERA_ETH_PMA_RECONFIG_WRAPPER.bsv
│   │   ├── ALTERA_ETH_PMA_RESET_CONTROL_WRAPPER.bsv
│   │   ├── ALTERA_ETH_PMA_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_ED_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_RECONFIG_DRIVER_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_SIV_WRAPPER.bsv
│   │   ├── ALTERA_PCIE_SV_WRAPPER.bsv
│   │   ├── ALTERA_PLL_WRAPPER.bsv
│   │   └── ALTERA_XCVR_RECONFIG_WRAPPER.bsv
│   ├── cpp/
│   │   ├── GeneratedTypes.h
│   │   ├── MMURequest.c
│   │   └── README
│   └── scripts/
│       ├── generate_altera_ddrbvi.sh
│       ├── generate_altera_ethbvi.sh
│       ├── generate_altera_macbvi.sh
│       ├── generate_altera_pciebvi.sh
│       ├── generate_bscane2.sh
│       ├── generate_bufgcrtl.sh
│       ├── generate_pcie2wrapper.sh
│       ├── generate_pcie3.sh
│       ├── generate_pcie3u.sh
│       ├── generate_pcie3uplus.sh
│       ├── generate_pcie_2_1.sh
│       ├── generate_pciewrapper.sh
│       ├── generate_pipeclock.sh
│       ├── generate_pps7.sh
│       ├── generate_pps7lib.sh
│       ├── generate_zynq_mpsoc.sh
│       └── importbvi.py
├── gralloc/
│   ├── Android.mk
│   ├── Makefile
│   ├── README
│   ├── bitset
│   ├── gr.h
│   ├── gralloc.cpp
│   ├── gralloc_priv.h
│   └── mapper.cpp
├── jtag/
│   ├── README
│   ├── bsd/
│   │   ├── xc7k325t_ffg900.bsd
│   │   ├── xc7vx485t_ffg1761.bsd
│   │   ├── xc7vx690t_ffg1761.bsd
│   │   └── xc7z020_clg484.bsd
│   ├── digilent-hs1.cfg
│   ├── digilent-hs2.cfg
│   ├── dumptrace.py
│   ├── kc705.cfg
│   ├── kc705program.cfg
│   ├── pcietrace.cfg
│   ├── readll.py
│   ├── run_jtag.sh
│   ├── run_trace.sh
│   ├── zedboard.cfg
│   └── zedtrace.cfg
├── lib/
│   ├── bsv/
│   │   ├── Arith.bsv
│   │   ├── BRAMFIFOFLevel.bsv
│   │   ├── BlueScope.bsv
│   │   ├── BlueScopeEvent.bsv
│   │   ├── BlueScopeEventPIO.bsv
│   │   ├── Bscan.bsv
│   │   ├── ConfigCounter.bsv
│   │   ├── ConnectalSpi.bsv
│   │   ├── Dma2BRAM.bsv
│   │   ├── FrequencyCounter.bsv
│   │   ├── HDMI.bsv
│   │   ├── HdmiDisplay.bsv
│   │   ├── ImageonVita.bsv
│   │   ├── IserdesDatadeser.bsv
│   │   ├── IserdesDatadeserIF.bsv
│   │   ├── Leds.bsv
│   │   ├── PipeMul.bsv
│   │   ├── SharedMemoryFifo.bsv
│   │   ├── SharedMemoryPortal.bsv
│   │   ├── SpiRoot.bsv
│   │   ├── SpiTap.bsv
│   │   ├── Stack.bsv
│   │   ├── StackReg.bsv
│   │   ├── XADC.bsv
│   │   ├── XilinxVirtex7PCIE.bsv
│   │   └── YUV.bsv
│   ├── cpp/
│   │   ├── connectal_conv.cpp
│   │   ├── connectal_conv.h
│   │   ├── connectal_convmm.cpp
│   │   ├── edid.h
│   │   ├── i2chdmi.h
│   │   ├── printfInd.h
│   │   └── userReference.h
│   ├── deprecated/
│   │   ├── BurstFunnel.bsv
│   │   ├── DirectoryRF.bsv
│   │   ├── DmaUtils.bsv
│   │   ├── OldMemServer.bsv
│   │   ├── RegFileA.bsv
│   │   ├── SGListComb.bsv
│   │   ├── bsv_Makefile
│   │   ├── pcietestbench/
│   │   │   ├── Makefile
│   │   │   ├── PcieTestBench.bsv
│   │   │   ├── Top.bsv
│   │   │   └── testpcie.cpp
│   │   ├── pcietestbench_dma_io/
│   │   │   ├── Makefile
│   │   │   ├── Memread.bsv
│   │   │   ├── PcieTestBench.bsv
│   │   │   ├── Top.bsv
│   │   │   ├── memread_nobuff_io.tstlp
│   │   │   └── testpcie.cpp
│   │   └── pcietestbench_dma_oo/
│   │       ├── Makefile
│   │       ├── Memread.bsv
│   │       ├── PcieTestBench.bsv
│   │       ├── Top.bsv
│   │       ├── memread_nobuff_oo.tstlp
│   │       └── testpcie.cpp
│   ├── matmul/
│   │   ├── bar.m
│   │   ├── bsv/
│   │   │   ├── DotProdServer.bsv
│   │   │   ├── FloatOps.bsv
│   │   │   ├── FpAdd.bsv
│   │   │   ├── FpMac.bsv
│   │   │   ├── FpMacTb.bsv
│   │   │   ├── FpMul.bsv
│   │   │   ├── MatrixNT.bsv
│   │   │   └── MatrixTN.bsv
│   │   └── cpp/
│   │       ├── cuda.cpp
│   │       ├── portalmat.cpp
│   │       └── portalmat.h
│   ├── nandsim/
│   │   ├── bsv/
│   │   │   ├── NandSim.bsv
│   │   │   └── NandSimNames.bsv
│   │   └── cpp/
│   │       └── nandsim.h
│   ├── nvme/
│   │   ├── bsv/
│   │   │   ├── AxiPcie3RootPort.bsv
│   │   │   ├── AxiPcieRootPort.bsv
│   │   │   ├── Nvme.bsv
│   │   │   ├── NvmeIfc.bsv
│   │   │   └── NvmePins.bsv
│   │   ├── cpp/
│   │   │   ├── nvme.cpp
│   │   │   └── nvme.h
│   │   └── tcl/
│   │       └── package.tcl
│   ├── qemu/
│   │   ├── fpgadev.cpp
│   │   └── fpgadev.h
│   ├── rbm/
│   │   ├── bsv/
│   │   │   ├── DmaVector.bsv
│   │   │   ├── Rbm.bsv
│   │   │   ├── RbmTypes.bsv
│   │   │   ├── Sigmoid.bsv
│   │   │   └── Timer.bsv
│   │   └── cpp/
│   │       ├── mnist.h
│   │       ├── rbm.cpp
│   │       └── rbm.h
│   ├── regexp/
│   │   ├── bsv/
│   │   │   ├── Regexp.bsv
│   │   │   └── RegexpEngine.bsv
│   │   └── cpp/
│   │       └── regexp_utils.h
│   ├── strstr/
│   │   ├── bsv/
│   │   │   ├── MPEngine.bsv
│   │   │   └── Strstr.bsv
│   │   └── cpp/
│   │       ├── mp.h
│   │       └── strstr.h
│   └── zedboard_robot/
│       ├── bsv/
│       │   ├── GyroController.bsv
│       │   ├── HBridgeController.bsv
│       │   └── MaxSonarController.bsv
│       └── cpp/
│           ├── read_buffer.cpp
│           └── read_buffer.h
├── pcie/
│   ├── Makefile
│   ├── pcieflat
│   └── tlp.py
├── scripts/
│   ├── AST.py
│   ├── Doxyfile
│   ├── Makefile.connectal.application
│   ├── Makefile.connectal.build
│   ├── adb/
│   │   ├── LICENSE
│   │   ├── README.rst
│   │   ├── __init__.py
│   │   ├── adb_commands.py
│   │   ├── adb_debug.py
│   │   ├── adb_protocol.py
│   │   ├── adb_test.py
│   │   ├── common.py
│   │   ├── common_cli.py
│   │   ├── common_stub.py
│   │   ├── fastboot.py
│   │   ├── fastboot_debug.py
│   │   ├── fastboot_protocol.txt
│   │   ├── fastboot_test.py
│   │   ├── filesync_protocol.py
│   │   ├── filesync_protocol.txt
│   │   └── usb_exceptions.py
│   ├── aws/
│   │   ├── build.sh
│   │   ├── create-fpga-image.sh
│   │   ├── create_dcp_from_cl.tcl
│   │   ├── describe-latest-fpga-image.sh
│   │   ├── encrypt.tcl
│   │   ├── notify_via_sns.py
│   │   ├── run.awsf1
│   │   ├── synth_awsf1.tcl
│   │   ├── upload.sh
│   │   └── wait_for_afi.py
│   ├── boardinfo.py
│   ├── bsv.filter
│   ├── bsvdepend.py
│   ├── bsvdependencies.py
│   ├── bsvgen.py
│   ├── bsvpreprocess.py
│   ├── cadb
│   ├── check-timing.py
│   ├── connectal-make
│   ├── connectal-synth-avalonddr3.tcl
│   ├── connectal-synth-axichecker.tcl
│   ├── connectal-synth-axiddr3.tcl
│   ├── connectal-synth-axidma.tcl
│   ├── connectal-synth-axieth.tcl
│   ├── connectal-synth-axiintc.tcl
│   ├── connectal-synth-eth.tcl
│   ├── connectal-synth-ila.tcl
│   ├── connectal-synth-ip.tcl
│   ├── connectal-synth-pcie-rp.tcl
│   ├── connectal-synth-pcie.tcl
│   ├── connectal-synth-pll.tcl
│   ├── connectal-synth-zynq-mpsoc.tcl
│   ├── cppgen.py
│   ├── deprecated/
│   │   ├── mkpcietop-partial-reconfiguration.tcl
│   │   ├── mkpcietop-synth.tcl
│   │   ├── portaltop-impl.tcl
│   │   └── portaltop-synth.tcl
│   ├── discover_icmp.py
│   ├── discover_tcp.py
│   ├── driver_signature.sed
│   ├── extract-bvi-schedule.py
│   ├── generate-constraints.py
│   ├── globalv.py
│   ├── makefilegen.py
│   ├── packagesource.py
│   ├── parse_qsf.py
│   ├── parse_xdc.py
│   ├── portal.py
│   ├── portalJson.py
│   ├── power.py
│   ├── preprocess_trace.py
│   ├── reorderbytes.py
│   ├── run.android
│   ├── run.android.sh
│   ├── run.parallella.sh
│   ├── run.pcietest
│   ├── run.pcietest.altera
│   ├── run_on_daffodil
│   ├── syntax.py
│   ├── topgen.py
│   └── util.py
├── tests/
│   ├── adapter/
│   │   ├── Makefile
│   │   ├── Test.bsv
│   │   └── test.cpp
│   ├── aecho/
│   │   ├── Echo.orig.bsv
│   │   ├── EchoReq.bsv
│   │   ├── Makefile
│   │   ├── generated/
│   │   │   ├── Echo.bsv
│   │   │   ├── EchoVerilog.v
│   │   │   ├── L_class_OC_Echo.bsv
│   │   │   ├── L_class_OC_Fifo.bsv
│   │   │   ├── L_class_OC_Fifo1.bsv
│   │   │   ├── l_class_OC_Echo.cpp
│   │   │   ├── l_class_OC_Echo.h
│   │   │   ├── l_class_OC_Echo.v
│   │   │   ├── l_class_OC_EchoIndication.cpp
│   │   │   ├── l_class_OC_EchoIndication.h
│   │   │   ├── l_class_OC_EchoRequest.cpp
│   │   │   ├── l_class_OC_EchoRequest.h
│   │   │   ├── l_class_OC_EchoTest.cpp
│   │   │   ├── l_class_OC_EchoTest.h
│   │   │   ├── l_class_OC_Fifo.cpp
│   │   │   ├── l_class_OC_Fifo.h
│   │   │   ├── l_class_OC_Fifo.v
│   │   │   ├── l_class_OC_Fifo1.cpp
│   │   │   ├── l_class_OC_Fifo1.h
│   │   │   ├── l_class_OC_Fifo1.v
│   │   │   ├── output.cpp
│   │   │   └── output.h
│   │   └── testecho.cpp
│   ├── algo1_flashmodel/
│   │   ├── AuroraCommon.bsv
│   │   ├── AuroraGearbox.bsv
│   │   ├── AuroraImportFmc1.bsv
│   │   ├── ChipscopeWrapper.bsv
│   │   ├── ControllerTypes.bsv
│   │   ├── FlashBusModel.bsv
│   │   ├── FlashCtrlModel.bsv
│   │   ├── FlashTop.bsv
│   │   ├── Makefile
│   │   ├── NandSimMod.bsv
│   │   ├── NullResetN.bsv
│   │   ├── PageBuffers.bsv
│   │   ├── Top.bsv
│   │   ├── TopPins.bsv
│   │   ├── flashaccess.cpp
│   │   └── test.cpp
│   ├── algo1_nandsim_manual/
│   │   ├── Makefile
│   │   ├── algo1.cpp
│   │   ├── haystack.txt
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   └── nandsim_manual.c
│   ├── avalon_mm/
│   │   ├── AvalonBfmWrapper.bsv
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── TestProgram.bsv
│   │   ├── avlm_avls_1x1.qsys
│   │   ├── testecho.cpp
│   │   └── verilog/
│   │       ├── tb.sv
│   │       └── test_program.v
│   ├── axieth/
│   │   ├── AxiEth.bsv
│   │   ├── EthPins.bsv
│   │   ├── Makefile
│   │   ├── axieth.h
│   │   ├── axieth.json
│   │   ├── axieth.xdc
│   │   ├── testaxieth.cpp
│   │   └── xsim_export.tcl
│   ├── bluecheck-bram/
│   │   ├── Bram2Example.bsv
│   │   ├── BramExample.bsv
│   │   └── make.sh
│   ├── bluecheck-sharedmemfifo/
│   │   ├── ConnectalProjectConfig.bsv
│   │   ├── SharedMemoryFifoCheck.bsv
│   │   └── make.sh
│   ├── bluecheck_harness/
│   │   ├── Harness.bsv
│   │   ├── Makefile
│   │   └── harness.py
│   ├── bpiflash/
│   │   ├── BpiFlashTest.bsv
│   │   ├── I28F512P33.bsv
│   │   ├── Makefile
│   │   ├── bpiflash.h
│   │   ├── bpiflash.json
│   │   ├── i28f512p33.v
│   │   └── testbpiflash.cpp
│   ├── ddr3/
│   │   ├── Ddr3Test.bsv
│   │   ├── Makefile
│   │   ├── synth-ip.tcl
│   │   └── testddr3.cpp
│   ├── ddr3_altera/
│   │   ├── Ddr3Test.bsv
│   │   ├── Makefile
│   │   ├── de5.json
│   │   ├── synth-ip.tcl
│   │   └── testddr3.cpp
│   ├── ddr_minimal/
│   │   ├── Ddr3Test.bsv
│   │   ├── Makefile
│   │   ├── synth-ip.tcl
│   │   └── testddr3.cpp
│   ├── dma2bram/
│   │   ├── Makefile
│   │   ├── Test.bsv
│   │   └── test.cpp
│   ├── dram_awsf1/
│   │   ├── Axi4.bsv
│   │   ├── DdrAws.bsv
│   │   ├── Makefile
│   │   └── testddr3.cpp
│   ├── echosoft2/
│   │   ├── EchoId.bsv
│   │   ├── Makefile
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── fastecho/
│   │   ├── FastEcho.bsv
│   │   ├── Makefile
│   │   ├── about_this_test.txt
│   │   ├── synth-ip.tcl
│   │   └── testfastecho.cpp
│   ├── float/
│   │   ├── FloatTest.bsv
│   │   ├── Makefile
│   │   └── ftest.c
│   ├── fp/
│   │   ├── BviFpAdd.bsv
│   │   ├── FpOps.bsv
│   │   ├── FpTest.bsv
│   │   ├── Makefile
│   │   ├── synth-ip.tcl
│   │   └── testfp.cpp
│   ├── guard/
│   │   ├── GuardTest.bsv
│   │   ├── Makefile
│   │   └── gtest.c
│   ├── ipcperf/
│   │   ├── IpcTest.bsv
│   │   ├── Makefile
│   │   ├── testipctest.cpp
│   │   └── vc707_floorplan.xdc
│   ├── memcpy_manysglists/
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   └── testmemcpy.cpp
│   ├── memread_err/
│   │   ├── Makefile
│   │   ├── Memread.bsv
│   │   └── testmemread.cpp
│   ├── memread_manual/
│   │   ├── Makefile
│   │   ├── ReadTest.bsv
│   │   ├── design_vc707.tcl
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   ├── memread_manual_manager.c
│   │   └── vc707_floorplan.xdc
│   ├── memread_manyclients/
│   │   ├── Makefile
│   │   └── performance.txt
│   ├── memread_manyclients128/
│   │   └── Makefile
│   ├── memread_manyengines/
│   │   ├── Makefile
│   │   └── ReadTest.bsv
│   ├── memserver_copy/
│   │   ├── Makefile
│   │   ├── Memcopy.bsv
│   │   └── testmemcopy.cpp
│   ├── memserver_copy128/
│   │   └── Makefile
│   ├── memserver_copy_slow/
│   │   └── Makefile
│   ├── memserver_write/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memserver_write128/
│   │   └── Makefile
│   ├── memtopcie_bluesim/
│   │   ├── Makefile
│   │   └── Top.bsv
│   ├── memwrite_acp/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memwrite_manyclients/
│   │   └── Makefile
│   ├── memwrite_manyclients128/
│   │   └── Makefile
│   ├── memwrite_trivial/
│   │   ├── Makefile
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── memwriteengine_test/
│   │   ├── Makefile
│   │   ├── MemWriteEngineTest.bsv
│   │   ├── Memwrite.bsv
│   │   └── testmemwrite.cpp
│   ├── method/
│   │   ├── Makefile
│   │   ├── Method.bsv
│   │   └── mtest.cpp
│   ├── mifo/
│   │   ├── Makefile
│   │   ├── MifoTest.bsv
│   │   └── testmifo.cpp
│   ├── nandsim_manual/
│   │   ├── Makefile
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   ├── nandsim_manual.c
│   │   ├── testnandsim.cpp
│   │   └── testnandsim_test.cpp
│   ├── nvme_core/
│   │   └── string_search.cpp
│   ├── nvme_strstr/
│   │   ├── Makefile
│   │   ├── NvmeSearch.bsv
│   │   ├── StringSearchIfc.bsv
│   │   ├── fmc.json
│   │   ├── main.cpp
│   │   ├── nfsume.json
│   │   ├── nvme.json
│   │   ├── nvme.xdc
│   │   ├── package100.tcl
│   │   └── synth-ip.tcl
│   ├── nvme_test/
│   │   ├── Makefile
│   │   ├── NvmeTest.bsv
│   │   ├── fmc.json
│   │   ├── impl.tcl
│   │   ├── main.cpp
│   │   ├── miniitx100.json
│   │   ├── nfsume.json
│   │   ├── nfsume.xdc
│   │   ├── nvme.xdc
│   │   └── synth-ip.tcl
│   ├── ov7670/
│   │   ├── Makefile
│   │   ├── Ov7670Controller.bsv
│   │   ├── Ov7670Interface.bsv
│   │   ├── SCCB.bsv
│   │   ├── pinout.json
│   │   └── testcam.cpp
│   ├── partial/
│   │   ├── Bounce.bsv
│   │   ├── Bounce1.bsv
│   │   ├── Bounce2.bsv
│   │   ├── Bounce3.bsv
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── README
│   │   ├── floorplan-zc702.xdc
│   │   └── testecho.cpp
│   ├── pcie-debug/
│   │   ├── Makefile
│   │   ├── TestPins.bsv
│   │   ├── TracePcie.bsv
│   │   ├── pin_translation.json
│   │   └── tracepcie.cpp
│   ├── pciememcheck/
│   │   ├── CheckMPM.bsv
│   │   ├── Makefile
│   │   ├── PcieMemCheck.bsv
│   │   └── pciememcheck.cpp
│   ├── physmaster/
│   │   ├── Echo.bsv
│   │   ├── Makefile
│   │   ├── PhysReq.bsv
│   │   ├── daemon.cpp
│   │   └── testecho.cpp
│   ├── qemuaccel/
│   │   ├── AccelIfcNames.bsv
│   │   ├── AccelTop.bsv
│   │   ├── BlockDev.bsv
│   │   ├── Devices.bsv
│   │   ├── Makefile
│   │   ├── QemuAccel.bsv
│   │   ├── QemuAccelIfc.bsv
│   │   ├── Serial.bsv
│   │   └── qemuaccel.cpp
│   ├── rootport/
│   │   ├── AxiPcieRootPort.bsv
│   │   ├── Makefile
│   │   ├── RootPort.bsv
│   │   ├── RootPortIfc.bsv
│   │   ├── RootPortPins.bsv
│   │   ├── gencores.tcl
│   │   ├── rootport.cpp
│   │   ├── rootport.json
│   │   └── rootport.xdc
│   ├── serialportal/
│   │   ├── Makefile
│   │   ├── SerialPortalIfc.bsv
│   │   ├── SerialPortalTest.bsv
│   │   ├── rs232.json
│   │   └── serialportal.cpp
│   ├── simmethodtime/
│   │   ├── Makefile
│   │   ├── Simm.bsv
│   │   └── test.cpp
│   ├── simple_manual/
│   │   ├── Makefile
│   │   ├── Simple.bsv
│   │   ├── kernel/
│   │   │   └── Makefile
│   │   ├── simple_manual.c
│   │   └── testsimple.cpp
│   ├── spi/
│   │   ├── ConnectalProjectConfig.bsv
│   │   ├── Makefile
│   │   └── spitest.gtkw
│   ├── spikehw/
│   │   ├── AxiEthBufferBvi.bsv
│   │   ├── AxiEthSubsystem.bsv
│   │   ├── AxiIic.bsv
│   │   ├── AxiSpiBvi.bsv
│   │   ├── AxiUart.bsv
│   │   ├── GigEthPcsPmaBvi.bsv
│   │   ├── Makefile
│   │   ├── README.md
│   │   ├── SpikeHw.bsv
│   │   ├── SpikeHwIfc.bsv
│   │   ├── SpikeHwPins.bsv
│   │   ├── SyncAxisFifo32x1024.bsv
│   │   ├── TriModeMacBvi.bsv
│   │   ├── boot/
│   │   │   ├── Makefile
│   │   │   ├── copybbl.c
│   │   │   └── entry.S
│   │   ├── bootromx4.hex
│   │   ├── eth.json
│   │   ├── flash.json
│   │   ├── gencores.tcl
│   │   ├── geneth.tcl
│   │   ├── i2c-standard.json
│   │   ├── nfsume.json
│   │   ├── program.tcl
│   │   ├── rtscts.json
│   │   ├── spikehw-miniitx100.json
│   │   ├── spikehw-vc707g2.json
│   │   ├── spikehw-vc709.json
│   │   ├── spikehw.cpp
│   │   ├── spikehw.h
│   │   ├── spikehw.json
│   │   ├── spikehw.xdc
│   │   ├── test-spikehw.cpp
│   │   └── trace.tcl
│   ├── test_pmod/
│   │   ├── Controller.bsv
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   ├── pinout.json
│   │   └── testpmod.cpp
│   ├── test_sdio1/
│   │   ├── Makefile
│   │   ├── SDIO.bsv
│   │   ├── Top.bsv
│   │   ├── pinout.json
│   │   └── test_sdio1.cpp
│   ├── test_spi0/
│   │   ├── Makefile
│   │   ├── SPI.bsv
│   │   ├── Top.bsv
│   │   ├── foo.cpp
│   │   └── test_spi0.cpp
│   ├── testfpmul/
│   │   ├── Makefile
│   │   ├── Top.bsv
│   │   └── testfpmul.cpp
│   ├── testldstrex/
│   │   ├── Makefile
│   │   └── testldstrex.cpp
│   ├── testmm16.16.2/
│   │   └── Makefile
│   ├── testmm16.16.4/
│   │   └── Makefile
│   ├── testmm2.4.2/
│   │   ├── Makefile
│   │   └── zc706_floorplan.xdc
│   ├── testmm32.16.2/
│   │   └── Makefile
│   ├── testmm32.32.2/
│   │   └── Makefile
│   ├── testmm4.2.2/
│   │   └── Makefile
│   ├── testmm4.4.2/
│   │   └── Makefile
│   ├── testmm4.4.4/
│   │   └── Makefile
│   ├── testmm8.8.2/
│   │   ├── Makefile
│   │   └── zc706_floorplan.xdc
│   ├── testmm8.8.4/
│   │   └── Makefile
│   ├── testmm_cuda_perf/
│   │   ├── Makefile
│   │   ├── Readme.md
│   │   ├── cuda_opencv_example/
│   │   │   ├── Makefile
│   │   │   ├── main.cpp
│   │   │   └── main.cu
│   │   ├── run_exe
│   │   ├── synth-ip.tcl
│   │   └── zc706_floorplan.xdc
│   ├── testrbm16.16.2/
│   │   ├── Makefile
│   │   └── synth-ip.tcl
│   ├── testrbm8.8.2/
│   │   ├── Makefile
│   │   └── synth-ip.tcl
│   └── yuv/
│       ├── Makefile
│       ├── YuvIF.bsv
│       └── testyuv.cpp
└── verilog/
    ├── CONNECTNET.v
    ├── CONNECTNET2.v
    ├── FpgaReset.v
    ├── GenBIBUF.v
    ├── LinkInverter.v
    ├── PositiveReset.v
    ├── PutInverter.v
    ├── SyncFIFO.v
    ├── SyncFIFO1.v
    ├── SyncReset.v
    ├── XsimDmaReadWrite.sv
    ├── XsimFinish.sv
    ├── XsimLink.sv
    ├── XsimSink.sv
    ├── XsimSource.sv
    ├── altera/
    │   ├── BRAM1.v
    │   ├── BRAM1BE.v
    │   ├── BRAM2.v
    │   └── siv_gen2x8/
    │       └── siv_gen2x8.v
    ├── awsf1.sv
    ├── cl_id_defines.vh
    └── xsimtop.sv
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SYMBOL INDEX (2734 symbols across 288 files)

FILE: contrib/bluescope/testbluescope.cpp
  function memdump (line 43) | static void memdump(void *p, int len, const char *title)
  function exit_test (line 62) | void exit_test()
  class MemcpyIndication (line 68) | class MemcpyIndication : public MemcpyIndicationWrapper
    method MemcpyIndication (line 72) | MemcpyIndication(unsigned int id) : MemcpyIndicationWrapper(id){}
    method started (line 75) | virtual void started(){
    method done (line 78) | virtual void done() {
  class BlueScopeIndication (line 91) | class BlueScopeIndication : public BlueScopeIndicationWrapper
    method BlueScopeIndication (line 94) | BlueScopeIndication(unsigned int id) : BlueScopeIndicationWrapper(id){}
    method done (line 96) | virtual void done( ){
    method triggerFired (line 99) | virtual void triggerFired( ){
    method reportStateDbg (line 103) | virtual void reportStateDbg(uint64_t mask, uint64_t value){
  function main (line 116) | int main(int argc, const char **argv)

FILE: contrib/bluescopeevent/testbluescopeevent.cpp
  function exit_test (line 40) | void exit_test()
  class BlueScopeEventIndication (line 46) | class BlueScopeEventIndication : public BlueScopeEventIndicationWrapper
    method BlueScopeEventIndication (line 49) | BlueScopeEventIndication(unsigned int id) : BlueScopeEventIndicationWr...
    method dmaDone (line 51) | virtual void dmaDone( ){
    method counterValue (line 56) | virtual void counterValue(uint32_t v){
  class SignalGenIndication (line 64) | class SignalGenIndication : public SignalGenIndicationWrapper
    method SignalGenIndication (line 67) | SignalGenIndication(unsigned int id) : SignalGenIndicationWrapper(id){}
    method ack1 (line 69) | virtual void ack1(unsigned int d1 ){
    method ack2 (line 72) | virtual void ack2(unsigned int d1, unsigned int d2){
  function main (line 85) | int main(int argc, const char **argv)

FILE: contrib/bluescopeeventpio/testbluescopeeventpio.cpp
  function exit_test (line 41) | void exit_test()
  class BlueScopeEventPIOIndication (line 47) | class BlueScopeEventPIOIndication : public BlueScopeEventPIOIndicationWr...
    method BlueScopeEventPIOIndication (line 50) | BlueScopeEventPIOIndication(unsigned int id) : BlueScopeEventPIOIndica...
    method reportEvent (line 52) | virtual void reportEvent(uint32_t v, uint32_t timestamp ){
    method counterValue (line 55) | virtual void counterValue(uint32_t v){
  class SignalGenIndication (line 63) | class SignalGenIndication : public SignalGenIndicationWrapper
    method SignalGenIndication (line 66) | SignalGenIndication(unsigned int id) : SignalGenIndicationWrapper(id){}
    method ack1 (line 68) | virtual void ack1(unsigned int d1 ){
  function main (line 81) | int main(int argc, const char **argv)

FILE: contrib/channelselect/sinetable.c
  function main (line 33) | int main(int argc, char *argv[])

FILE: contrib/channelselect/testchannelselecttest.cpp
  class ChannelSelectTestIndication (line 37) | class ChannelSelectTestIndication : public ChannelSelectTestIndicationWr...
    method ChannelSelectTestIndication (line 41) | ChannelSelectTestIndication(unsigned int id) : ChannelSelectTestIndica...
    method ifreqData (line 43) | virtual void ifreqData(unsigned dataRe, unsigned dataIm){
    method setDataResp (line 46) | virtual void setDataResp(){
    method setConfigResp (line 50) | virtual void setConfigResp(){
  class DDSTestIndication (line 56) | class DDSTestIndication : public DDSTestIndicationWrapper
    method DDSTestIndication (line 60) | DDSTestIndication(unsigned int id) : DDSTestIndicationWrapper(id){}
    method ddsData (line 62) | virtual void ddsData(unsigned phase, unsigned dataRe, unsigned dataIm){
    method setConfigResp (line 66) | virtual void setConfigResp(){
  function main (line 73) | int main(int argc, const char **argv)

FILE: contrib/fib/testfib.cpp
  class FibIndication (line 33) | class FibIndication : public FibIndicationWrapper
    method fibresult (line 36) | virtual void fibresult(uint32_t v) {
    method FibIndication (line 40) | FibIndication(unsigned int id) : FibIndicationWrapper(id) {}
  function main (line 47) | int main(int argc, const char **argv)

FILE: contrib/flowcontrol/test.cpp
  class SinkIndication (line 37) | class SinkIndication : public SinkIndicationWrapper
    method returnTokens (line 40) | virtual void returnTokens(uint32_t v) {
    method SinkIndication (line 50) | SinkIndication(unsigned int id) : SinkIndicationWrapper(id){}
  function main (line 53) | int main(int argc, const char **argv)

FILE: contrib/importverilog/testmain.cpp
  class Main (line 30) | class Main : public MainRequestWrapper
    method incr_cnt (line 34) | void incr_cnt(){
    method write_rf (line 38) | virtual void write_rf(uint16_t address, uint16_t data) {
    method read_rf (line 42) | virtual void read_rf(uint16_t address, uint16_t data) {
    method Main (line 46) | Main(unsigned int id) : MainRequestWrapper(id), cnt(0){}
  function main (line 51) | int main(int argc, const char **argv)

FILE: contrib/maxcommonsubseq/hirschberg.py
  function hirschbergalga (line 38) | def hirschbergalga(A, B):
  function hirschbergalgb (line 62) | def hirschbergalgb(A, B):
  function hirschbergalgc (line 80) | def hirschbergalgc(A, B):
  function hirschbergalgc2 (line 110) | def hirschbergalgc2(sa, sb, A, B):

FILE: contrib/maxcommonsubseq/testmaxcommonsubseq.cpp
  class MaxcommonsubseqIndication (line 37) | class MaxcommonsubseqIndication : public MaxcommonsubseqIndicationWrapper
    method MaxcommonsubseqIndication (line 40) | MaxcommonsubseqIndication(unsigned int id) : MaxcommonsubseqIndication...
    method setupAComplete (line 42) | virtual void setupAComplete() {
    method setupBComplete (line 46) | virtual void setupBComplete() {
    method fetchComplete (line 50) | virtual void fetchComplete() {
    method searchResult (line 54) | virtual void searchResult (uint32_t v){
  function main (line 62) | int main(int argc, const char **argv)

FILE: contrib/noc/testnoc.cpp
  class NocIndication (line 45) | class NocIndication : public NocIndicationWrapper
    method NocIndication (line 48) | NocIndication(unsigned int id) : NocIndicationWrapper(id){}
    method ack (line 50) | virtual void ack(uint32_t heardby, uint32_t to, uint32_t msg) {
  function lastheardbyshouldbe (line 59) | void lastheardbyshouldbe(uint32_t heardby)
  function lastmsgshouldbe (line 65) | void lastmsgshouldbe(uint32_t msg)
  function lasttoshouldbe (line 71) | void lasttoshouldbe(uint32_t to)
  function dosend (line 77) | void dosend(uint32_t from, uint32_t to, uint32_t msg)
  function dotest (line 86) | void dotest()
  function main (line 97) | int main(int argc, const char **argv)

FILE: contrib/noc2d/testnoc2d.cpp
  class NocIndication (line 45) | class NocIndication : public NocIndicationWrapper
    method NocIndication (line 48) | NocIndication(unsigned int id) : NocIndicationWrapper(id){}
    method ack (line 50) | virtual void ack(uint32_t heardby, uint32_t to, uint32_t msg) {
  function lastheardbyshouldbe (line 62) | void lastheardbyshouldbe(uint32_t heardby)
  function lastmsgshouldbe (line 68) | void lastmsgshouldbe(uint32_t msg)
  function lasttoshouldbe (line 74) | void lasttoshouldbe(uint32_t to)
  function dosend (line 80) | void dosend(uint32_t from, uint32_t to, uint32_t msg)
  function dotest (line 89) | void dotest()
  function main (line 104) | int main(int argc, const char **argv)

FILE: contrib/parallella/testmain.cpp
  function main (line 26) | int main(int argc, const char **argv)

FILE: contrib/perf/testperf.cpp
  function dump (line 48) | void dump(const char *prefix, char *buf, size_t len)
  class PerfIndication (line 59) | class PerfIndication : public PerfIndicationWrapper
    method PerfIndication (line 63) | PerfIndication(unsigned int id) : PerfIndicationWrapper(id){}
    method started (line 66) | virtual void started(uint32_t words){
    method readWordResult (line 71) | virtual void readWordResult ( uint32_t v ){
    method done (line 74) | virtual void done(uint32_t v) {
    method rData (line 78) | virtual void rData ( uint64_t v ){
    method readReq (line 81) | virtual void readReq(uint32_t v){
    method writeReq (line 84) | virtual void writeReq(uint32_t v){
    method writeAck (line 87) | virtual void writeAck(uint32_t v){
    method reportStateDbg (line 90) | virtual void reportStateDbg(uint32_t srcGen, uint32_t streamRdCnt,
  function deltatime (line 108) | long long deltatime( struct timeval start, struct timeval stop)
  function dotest (line 115) | int dotest(unsigned size, unsigned repeatCount)
  function main (line 139) | int main(int argc, const char **argv)

FILE: contrib/pipe_mul/testpipe_mul.cpp
  class PipeMulIndication (line 32) | class PipeMulIndication : public PipeMulIndicationWrapper
    method res (line 35) | virtual void res(uint32_t v) {
    method PipeMulIndication (line 39) | PipeMulIndication(unsigned int id) : PipeMulIndicationWrapper(id) {}
  function main (line 43) | int main(int argc, const char **argv)

FILE: contrib/pipe_mul2/testpipe_mul.cpp
  class PipeMulIndication (line 32) | class PipeMulIndication : public PipeMulIndicationWrapper
    method res (line 35) | virtual void res(uint64_t v) {
    method PipeMulIndication (line 39) | PipeMulIndication(unsigned int id) : PipeMulIndicationWrapper(id) {}
  function main (line 43) | int main(int argc, const char **argv)

FILE: contrib/portalperf/testportalperf.cpp
  class PortalPerfIndication (line 59) | class PortalPerfIndication : public PortalPerfIndicationWrapper
    method spit (line 62) | virtual void spit() {
    method spitl (line 66) | virtual void spitl(uint32_t v1) {
    method spitll (line 71) | virtual void spitll(uint32_t v1, uint32_t v2) {
    method spitlll (line 77) | virtual void spitlll(uint32_t v1, uint32_t v2, uint32_t v3) {
    method spitllll (line 84) | virtual void spitllll(uint32_t v1, uint32_t v2, uint32_t v3, uint32_t ...
    method spitd (line 92) | virtual void spitd(uint64_t v1) {
    method spitdd (line 97) | virtual void spitdd(uint64_t v1, uint64_t v2) {
    method spitddd (line 103) | virtual void spitddd(uint64_t v1, uint64_t v2, uint64_t v3) {
    method spitdddd (line 110) | virtual void spitdddd(uint64_t v1, uint64_t v2, uint64_t v3, uint64_t ...
    method PortalPerfIndication (line 118) | PortalPerfIndication(unsigned int id) : PortalPerfIndicationWrapper(id...
  function call_swallow (line 124) | void call_swallow(void)
  function call_swallowl (line 133) | void call_swallowl(void)
  function call_swallowll (line 142) | void call_swallowll(void)
  function call_swallowlll (line 151) | void call_swallowlll(void)
  function call_swallowllll (line 160) | void call_swallowllll(void)
  function call_swallowd (line 169) | void call_swallowd(void)
  function call_swallowdd (line 178) | void call_swallowdd(void)
  function call_swallowddd (line 187) | void call_swallowddd(void)
  function call_swallowdddd (line 196) | void call_swallowdddd(void)
  function dotestout (line 205) | void dotestout(const char *testname, void (*testfn)(void))
  function dotestin (line 218) | void dotestin(const char *testname, int which)
  function main (line 236) | int main(int argc, const char **argv)

FILE: contrib/serialconfig/testserialconfig.cpp
  class SerialconfigIndication (line 44) | class SerialconfigIndication : public SerialconfigIndicationWrapper
    method SerialconfigIndication (line 47) | SerialconfigIndication(unsigned int id) : SerialconfigIndicationWrappe...
    method ack (line 49) | virtual void ack(uint32_t a, uint32_t d) {
  function lastdshouldbe (line 57) | void lastdshouldbe(uint32_t v)
  function lastashouldbe (line 62) | void lastashouldbe(uint32_t a)
  function doread (line 68) | void doread(uint32_t a, uint32_t expect)
  function dowrite (line 76) | void dowrite(uint32_t a, uint32_t d)
  function dotest (line 84) | void dotest()
  function main (line 114) | int main(int argc, const char **argv)

FILE: contrib/smithwaterman/sw.py
  function printmatrix (line 8) | def printmatrix(m):
  function w (line 23) | def w(a, b):
  function gap (line 32) | def gap(k):
  function gotoh (line 35) | def gotoh(A, B):
  function gotohb (line 71) | def gotohb(A, B):
  function gotohb2 (line 101) | def gotohb2(A, B, t):
  function gotohc (line 137) | def gotohc(A, B, sa, sb, m, n, tb, te):

FILE: contrib/smithwaterman/testsmithwaterman.cpp
  class SmithwatermanIndication (line 35) | class SmithwatermanIndication : public SmithwatermanIndicationWrapper
    method SmithwatermanIndication (line 38) | SmithwatermanIndication(unsigned int id) : SmithwatermanIndicationWrap...
    method setupAComplete (line 40) | virtual void setupAComplete() {
    method setupBComplete (line 44) | virtual void setupBComplete() {
    method searchResult (line 48) | virtual void searchResult (uint32_t v){
  function main (line 56) | int main(int argc, const char **argv)

FILE: contrib/splice/testsplice.cpp
  class SpliceIndication (line 38) | class SpliceIndication : public SpliceIndicationWrapper
    method SpliceIndication (line 41) | SpliceIndication(unsigned int id) : SpliceIndicationWrapper(id){}
    method setupAComplete (line 43) | virtual void setupAComplete() {
    method setupBComplete (line 47) | virtual void setupBComplete() {
    method fetchComplete (line 51) | virtual void fetchComplete() {
    method searchResult (line 56) | virtual void searchResult (int v){
  function main (line 64) | int main(int argc, const char **argv)

FILE: cpp/BsimDma.cpp
  function write_simDma32 (line 50) | void write_simDma32(uint32_t pref, uint32_t offset, unsigned int data, u...
  function read_simDma32 (line 73) | unsigned int read_simDma32(uint32_t pref, uint32_t offset)
  function write_simDma64 (line 85) | void write_simDma64(uint32_t pref, uint32_t offset, uint64_t data, uint8...
  function read_simDma64 (line 106) | uint64_t read_simDma64(uint32_t pref, uint32_t offset)
  function simDma_initfd (line 118) | void simDma_initfd(uint32_t aid, uint32_t fd)
  function simDma_init (line 128) | void simDma_init(uint32_t id, uint32_t pref, uint32_t size)
  function simDma_idreturn (line 149) | void simDma_idreturn(uint32_t aid)

FILE: cpp/DmaBuffer.h
  function class (line 27) | class DmaBuffer {

FILE: cpp/MMUServer.h
  function class (line 28) | class MMUServer : public MMURequestWrapper

FILE: cpp/TlpReplay.cpp
  function cvt (line 41) | uint8_t cvt(char c)
  function load_tlp (line 50) | void load_tlp()
  function portnum (line 78) | uint8_t portnum()
  function can_put_tlp (line 84) | bool can_put_tlp()
  function can_get_tlp (line 90) | bool can_get_tlp()
  function put_tlp (line 96) | void put_tlp(unsigned int* tlp)
  function get_tlp (line 102) | void get_tlp(unsigned int* tlp)

FILE: cpp/XsimTop.cpp
  class XsimMsgRequest (line 29) | class XsimMsgRequest : public XsimMsgRequestWrapper {
    method XsimMsgRequest (line 33) | XsimMsgRequest(int id, PortalTransportFunctions *item, void *param, Po...
    method msgSink (line 39) | void msgSink ( const uint32_t portal, const uint32_t data ) {
    method msgSinkFd (line 46) | void msgSinkFd ( const uint32_t portal, const uint32_t data ) {
    method notEmpty (line 53) | bool notEmpty(int portal) {
    method get (line 59) | uint32_t get(int portal) {
  function xsim_disconnect (line 73) | static int xsim_disconnect(struct PortalInternal *pint)
  function dpi_cycle (line 86) | int dpi_cycle()
  function sc_time_stamp (line 92) | double sc_time_stamp()
  function dpi_init (line 97) | void dpi_init()
  function dpi_poll (line 113) | void dpi_poll()
  function dpi_msgSink_beat (line 122) | long long dpi_msgSink_beat(int portal)
  function dpi_msgSource_beat (line 135) | void dpi_msgSource_beat(int portal, int beat)

FILE: cpp/bluesim_main.cxx
  function process_command_line_args (line 49) | static
  function main (line 102) | int main (int argc, char *argv[])

FILE: cpp/bsim_relay.c
  function memdump (line 32) | static void memdump(unsigned char *p, int len, char *title)
  function main (line 51) | int main(int argc, char *argv[])

FILE: cpp/dmaManager.c
  function dmaManagerOnce (line 42) | static void dmaManagerOnce(void)
  function DmaManager_init (line 49) | void DmaManager_init(DmaManagerPrivate *priv, PortalInternal *sglDevice)
  function DmaManager_dereference (line 65) | void DmaManager_dereference(DmaManagerPrivate *priv, int ref)
  function DmaManager_reference (line 82) | int DmaManager_reference(DmaManagerPrivate *priv, int fd)
  function DmaManager_idresp (line 135) | void DmaManager_idresp(DmaManagerPrivate *priv, uint32_t sglId)
  function DmaManager_confresp (line 143) | void DmaManager_confresp(DmaManagerPrivate *priv, uint32_t channelId)

FILE: cpp/dmaManager.h
  type sem_t (line 35) | typedef struct semaphore sem_t;
  type DmaManagerPrivate (line 50) | typedef struct {
  function class (line 78) | class DmaManager
  type DmaManager (line 101) | struct DmaManager
  type DmaManager (line 105) | typedef struct DmaManager DmaManager;

FILE: cpp/dmaSendFd.h
  type scatterlist (line 58) | struct scatterlist
  type file (line 59) | struct file
  type sg_table (line 60) | struct sg_table
  type pa_buffer (line 62) | struct pa_buffer
  type dma_buf (line 62) | struct dma_buf

FILE: cpp/kernel_module.c
  type semaphore (line 39) | struct semaphore
  function pthread_create (line 42) | int pthread_create(pthread_t *thread, void *attr, void *(*start_routine)...
  function memdump (line 49) | void memdump(unsigned char *p, int len, char *title)
  type file (line 68) | struct file
  type file (line 69) | struct file
  type file_operations (line 72) | struct file_operations
  type miscdevice (line 79) | struct miscdevice
  function pa_init (line 95) | static int __init pa_init(void)
  function pa_exit (line 106) | static void __exit pa_exit(void)

FILE: cpp/manualMMUIndication.h
  function manualDisconnect (line 29) | static int manualDisconnect(struct PortalInternal *p)
  function manualIdResponse (line 33) | static int manualIdResponse(struct PortalInternal *p, const uint32_t sgl...
  function manualConfigResp (line 39) | static int manualConfigResp(struct PortalInternal *p, const uint32_t sgl...
  function manualError (line 45) | static int manualError(struct PortalInternal *p, const uint32_t code, co...
  function manualWaitForResp (line 52) | static int manualWaitForResp(PortalInternal *p, uint32_t *arg_id)

FILE: cpp/monkit.h
  function class (line 29) | class MonkitFile {
  function writeFile (line 70) | void MonkitFile::writeFile()

FILE: cpp/platformMemory.cpp
  class PortalPoller (line 32) | class PortalPoller
  class MMUIndication (line 45) | class MMUIndication : public MMUIndicationWrapper
    method MMUIndication (line 49) | MMUIndication(DmaManager *pm, unsigned int  id, int tile=PLATFORM_TILE...
    method MMUIndication (line 50) | MMUIndication(DmaManager *pm, unsigned int  id, PortalTransportFunctio...
    method configResp (line 51) | virtual void configResp(uint32_t pointer){
    method error (line 54) | virtual void error (uint32_t code, uint32_t pointer, uint64_t offset, ...
    method idResponse (line 59) | virtual void idResponse(uint32_t sglId){
  class MemServerIndication (line 64) | class MemServerIndication : public MemServerIndicationWrapper
    method init (line 69) | void init(){
    method MemServerIndication (line 74) | MemServerIndication(unsigned int  id, int tile=PLATFORM_TILE) : MemSer...
    method MemServerIndication (line 75) | MemServerIndication(MemServerRequestProxy *p, unsigned int  id, int ti...
    method addrResponse (line 76) | virtual void addrResponse(uint64_t physAddr){
    method reportStateDbg (line 79) | virtual void reportStateDbg(const DmaDbgRec rec){
    method reportMemoryTraffic (line 82) | virtual void reportMemoryTraffic(uint64_t words){
    method error (line 87) | virtual void error (uint32_t code, uint32_t pointer, uint64_t offset, ...
    method receiveMemoryTraffic (line 92) | uint64_t receiveMemoryTraffic(){
    method getMemoryTraffic (line 96) | uint64_t getMemoryTraffic(const ChannelType rc){
  function platformInitOnce (line 108) | void platformInitOnce(void)
  function DmaManager (line 123) | DmaManager *platformInit(void)
  function platformStatistics (line 129) | void platformStatistics(void)

FILE: cpp/poller.cpp
  type pollfd (line 99) | struct pollfd
  type pollfd (line 100) | struct pollfd
  function addFdToPoller (line 205) | void addFdToPoller(struct PortalPoller *poller, int fd)

FILE: cpp/portal.c
  type PortalInternal (line 70) | struct PortalInternal
  function init_portal_internal (line 79) | void init_portal_internal(PortalInternal *pint, int id, int tile,
  function portal_disconnect (line 118) | int portal_disconnect(struct PortalInternal *pint)
  function portal_event (line 128) | int portal_event(struct PortalInternal *pint)
  function initPortalHardwareOnce (line 185) | static void initPortalHardwareOnce(void)
  function initPortalHardware (line 360) | void initPortalHardware(void)
  function initPortalMemory (line 368) | void initPortalMemory(void)
  function portalAlloc (line 386) | int portalAlloc(size_t size, int cached)
  type file (line 430) | struct file
  function portalMunmap (line 441) | int portalMunmap(void *addr, size_t size)
  function portalCacheFlush (line 450) | int portalCacheFlush(int fd, void *__p, long size, int flush)
  function setClockFrequency (line 509) | int setClockFrequency(int clkNum, long requestedFrequency, long *actualF...

FILE: cpp/portal.h
  type task_struct (line 28) | struct task_struct
  type PortalInternal (line 72) | struct PortalInternal
  type PortalInternal (line 73) | struct PortalInternal
  type PortalInternal (line 74) | struct PortalInternal
  type PortalInternal (line 75) | struct PortalInternal
  type PortalInternal (line 76) | struct PortalInternal
  type PortalInternal (line 77) | struct PortalInternal
  type PortalInternal (line 78) | struct PortalInternal
  type PortalInternal (line 79) | struct PortalInternal
  type PortalInternal (line 80) | struct PortalInternal
  type PortalInternal (line 81) | struct PortalInternal
  type PortalInternal (line 82) | struct PortalInternal
  type PortalInternal (line 83) | struct PortalInternal
  type PortalInternal (line 84) | struct PortalInternal
  type PortalTransportFunctions (line 85) | typedef struct {
  type PortalInternal (line 103) | struct PortalInternal
  type PortalInternal (line 108) | struct PortalInternal
  type PortalHandlerTemplate (line 109) | typedef struct {
  type PortalInternal (line 116) | typedef struct PortalInternal {
  type PortalMuxHandler (line 152) | typedef struct PortalMuxHandler {
  type PortalInternal (line 159) | struct PortalInternal
  type PortalSharedParam (line 161) | typedef struct {
  type PortalMuxParam (line 183) | typedef struct {
  type ConnectalParamJsonInfo (line 188) | typedef struct {
  type ConnectalMethodJsonInfo (line 193) | typedef struct {
  type Bool (line 211) | typedef int Bool;
  type fixed32 (line 212) | typedef uint32_t fixed32;
  type PortalInternal (line 264) | struct PortalInternal
  type PortalInternal (line 281) | struct PortalInternal
  type PortalInternal (line 282) | struct PortalInternal
  type PortalInternal (line 284) | struct PortalInternal
  type PortalInternal (line 285) | struct PortalInternal
  type PortalInternal (line 286) | struct PortalInternal
  type PortalInternal (line 287) | struct PortalInternal
  type PortalInternal (line 291) | struct PortalInternal
  type PortalInternal (line 292) | struct PortalInternal
  type PortalInternal (line 294) | struct PortalInternal
  type PortalInternal (line 295) | struct PortalInternal
  type PortalInternal (line 296) | struct PortalInternal
  type PortalInternal (line 297) | struct PortalInternal
  type PortalInternal (line 298) | struct PortalInternal
  type PortalInternal (line 299) | struct PortalInternal
  type PortalInternal (line 300) | struct PortalInternal
  type PortalPoller (line 317) | struct PortalPoller
  type PortalInternal (line 326) | struct PortalInternal
  function class (line 352) | class PortalPoller {
  function class (line 380) | class Portal {

FILE: cpp/portalJson.c
  function connectalJsonEncode (line 32) | void connectalJsonEncode(char *datap, void *binarydata, ConnectalMethodJ...
  function connectalJsonEncodeAndSend (line 110) | void connectalJsonEncodeAndSend(PortalInternal *pint, void *binarydata, ...
  function connectalJsonSend (line 123) | void connectalJsonSend(PortalInternal *pint, const char *jsonp, int meth...
  function connectalJsonDecode (line 152) | int connectalJsonDecode(PortalInternal *pint, int _unused_channel, void ...

FILE: cpp/portalKernel.h
  function send_portal_null (line 23) | void send_portal_null(struct PortalInternal *pint, volatile unsigned int...
  function recv_portal_null (line 26) | int recv_portal_null(struct PortalInternal *pint, volatile unsigned int ...
  type PortalInternal (line 30) | struct PortalInternal
  type PortalInternal (line 34) | struct PortalInternal
  function notfull_kernel (line 38) | int notfull_kernel(PortalInternal *pint, unsigned int v)
  function busy_portal_kernel (line 43) | int busy_portal_kernel(struct PortalInternal *pint, unsigned int v, cons...
  function enableint_portal_kernel (line 54) | void enableint_portal_kernel(struct PortalInternal *pint, int val)
  function event_portal_kernel (line 59) | int event_portal_kernel(struct PortalInternal *pint)
  function init_portal_kernel (line 66) | static int init_portal_kernel(struct PortalInternal *pint, void *param)
  function read_portal_kernel (line 71) | static unsigned int read_portal_kernel(PortalInternal *pint, volatile un...
  function write_portal_kernel (line 75) | static void write_portal_kernel(PortalInternal *pint, volatile unsigned ...
  function write_fd_portal_kernel (line 79) | static void write_fd_portal_kernel(PortalInternal *pint, volatile unsign...

FILE: cpp/portalPrintf.c
  function portal_printf (line 30) | int portal_printf(const char *format, ...)

FILE: cpp/portalPython.cpp
  type PortalInternal (line 35) | struct PortalInternal
  type PortalInternal (line 39) | struct PortalInternal
  function pythonTransportSENDMSG (line 43) | static void pythonTransportSENDMSG(struct PortalInternal *pint, volatile...
  type PortalInternal (line 48) | struct PortalInternal
  type PortalInternal (line 49) | struct PortalInternal
  type PortalInternal (line 50) | struct PortalInternal
  type PortalInternal (line 51) | struct PortalInternal
  type PortalInternal (line 52) | struct PortalInternal
  type PortalInternal (line 53) | struct PortalInternal
  type PortalInternal (line 54) | struct PortalInternal
  type PortalInternal (line 55) | struct PortalInternal
  type PortalInternal (line 56) | struct PortalInternal
  type PortalInternal (line 64) | struct PortalInternal
  type PortalPython (line 66) | struct PortalPython {
    type PortalInternal (line 67) | struct PortalInternal
  function handleIndicationMessage (line 72) | static int handleIndicationMessage(struct PortalInternal *pint, unsigned...
  function set_callback (line 90) | void set_callback(struct PortalPython *ppython, PyObject *param)
  type PortalInternal (line 100) | struct PortalInternal
  type PortalInternal (line 100) | struct PortalInternal
  type PortalInternal (line 100) | struct PortalInternal
  type PortalPython (line 110) | struct PortalPython
    type PortalInternal (line 67) | struct PortalInternal
  type PortalPython (line 110) | struct PortalPython
    type PortalInternal (line 67) | struct PortalInternal
  type PortalPython (line 110) | struct PortalPython
    type PortalInternal (line 67) | struct PortalInternal

FILE: cpp/runpython.cpp
  function main (line 15) | int main(int argc, char * const *argv)

FILE: cpp/sock_utils.c
  function init_listening (line 47) | int init_listening(const char *arg_name, PortalSocketParam *param)
  function accept_socket (line 92) | int accept_socket(int arg_listening)
  function init_connecting (line 106) | int init_connecting(const char *arg_name, PortalSocketParam *param)
  function sock_fd_write (line 150) | ssize_t sock_fd_write(int sockfd, void *ptr, size_t nbytes, int sendfd)
  function sock_fd_read (line 190) | ssize_t sock_fd_read(int sockfd, void *ptr, size_t nbytes, int *recvfd)
  function portalSendFd (line 234) | void portalSendFd(int fd, void *data, int len, int sendFd)
  function portalRecvFd (line 244) | int portalRecvFd(int fd, void *data, int len, int *recvFd)

FILE: cpp/sock_utils.h
  type PortalSocketParam (line 33) | typedef struct PortalSocketParam {
  type memrequest (line 37) | struct memrequest{
  type memresponse (line 43) | struct memresponse{
  type PortalSocketParam (line 58) | struct PortalSocketParam
  type PortalSocketParam (line 59) | struct PortalSocketParam

FILE: cpp/timer.c
  type PORTAL_TIMETYPE (line 27) | typedef struct {
  function portalCycleCount (line 35) | uint64_t portalCycleCount()
  function portalTimerStart (line 49) | void portalTimerStart(unsigned int i)
  function portalTimerLap (line 55) | uint64_t portalTimerLap(unsigned int i)
  function portalTimerInit (line 64) | void portalTimerInit(void)
  function portalTimerCatch (line 72) | uint64_t portalTimerCatch(unsigned int i)
  function portalTimerPrint (line 87) | void portalTimerPrint(int loops)

FILE: cpp/transportHardware.c
  function send_portal_null (line 38) | void send_portal_null(struct PortalInternal *pint, volatile unsigned int...
  function recv_portal_null (line 41) | int recv_portal_null(struct PortalInternal *pint, volatile unsigned int ...
  function notfull_null (line 45) | int notfull_null(PortalInternal *pint, unsigned int v)
  function busy_portal_null (line 49) | int busy_portal_null(struct PortalInternal *pint, unsigned int v, const ...
  function enableint_portal_null (line 53) | void enableint_portal_null(struct PortalInternal *pint, int val)
  function event_null (line 56) | int event_null(struct PortalInternal *pint)
  function read_portal_memory (line 60) | unsigned int read_portal_memory(PortalInternal *pint, volatile unsigned ...
  function write_portal_memory (line 66) | void write_portal_memory(PortalInternal *pint, volatile unsigned int **a...
  function write_fd_portal_memory (line 71) | void write_fd_portal_memory(PortalInternal *pint, volatile unsigned int ...
  type PortalInternal (line 76) | struct PortalInternal
  type PortalInternal (line 80) | struct PortalInternal
  function notfull_hardware (line 84) | int notfull_hardware(PortalInternal *pint, unsigned int v)
  function busy_hardware (line 89) | int busy_hardware(struct PortalInternal *pint, unsigned int v, const cha...
  function enableint_hardware (line 115) | void enableint_hardware(struct PortalInternal *pint, int val)
  function event_hardware (line 120) | int event_hardware(struct PortalInternal *pint)
  function init_hardware (line 147) | static int init_hardware(struct PortalInternal *pint, void *param)
  function read_hardware (line 200) | static unsigned int read_hardware(PortalInternal *pint, volatile unsigne...
  function write_hardware (line 204) | static void write_hardware(PortalInternal *pint, volatile unsigned int *...
  function write_fd_hardware (line 208) | static void write_fd_hardware(PortalInternal *pint, volatile unsigned in...

FILE: cpp/transportPortal.c
  function enableint_portal (line 31) | static void enableint_portal(struct PortalInternal *pint, int val)
  function event_portal (line 35) | static int event_portal(struct PortalInternal *pint)
  function init_portal (line 53) | static int init_portal(struct PortalInternal *pint, void *param)
  function send_portal (line 84) | static void send_portal(struct PortalInternal *pint, volatile unsigned i...
  function recv_portal (line 102) | static int recv_portal(struct PortalInternal *pint, volatile unsigned in...

FILE: cpp/transportSerial.c
  function init_serial (line 49) | static int init_serial(struct PortalInternal *pint, void *aparam)
  type PortalInternal (line 78) | struct PortalInternal
  type PortalInternal (line 82) | struct PortalInternal
  function busywait_serial (line 86) | static int busywait_serial(struct PortalInternal *pint, unsigned int v, ...
  function send_serial (line 90) | static void send_serial(struct PortalInternal *pint, volatile unsigned i...
  function event_serial (line 108) | static int event_serial(struct PortalInternal *pint)
  function init_serialmux (line 139) | static int init_serialmux(struct PortalInternal *pint, void *aparam)
  function send_serialmux (line 152) | static void send_serialmux(struct PortalInternal *pint, volatile unsigne...
  function recv_serialmux (line 160) | static int recv_serialmux(struct PortalInternal *pint, volatile unsigned...
  function portal_serialmux_handler (line 164) | int portal_serialmux_handler(struct PortalInternal *pint, unsigned int c...

FILE: cpp/transportShared.c
  function init_shared (line 45) | static int init_shared(struct PortalInternal *pint, void *aparam)
  type PortalInternal (line 84) | struct PortalInternal
  type PortalInternal (line 88) | struct PortalInternal
  function busywait_shared (line 92) | static int busywait_shared(struct PortalInternal *pint, unsigned int v, ...
  function increment_shared (line 116) | static inline unsigned int increment_shared(PortalInternal *pint, unsign...
  function send_shared (line 124) | static void send_shared(struct PortalInternal *pint, volatile unsigned i...
  function event_shared (line 139) | static int event_shared(struct PortalInternal *pint)
  type PortalInternal (line 155) | struct PortalInternal
  type PortalInternal (line 159) | struct PortalInternal
  function send_trace (line 164) | static void send_trace(struct PortalInternal *pint, volatile unsigned in...

FILE: cpp/transportSocket.c
  function memdump (line 44) | void memdump(unsigned char *p, int len, const char *title)
  function init_socketResp (line 65) | static int init_socketResp(struct PortalInternal *pint, void *aparam)
  function init_socketInit (line 82) | static int init_socketInit(struct PortalInternal *pint, void *aparam)
  type PortalInternal (line 100) | struct PortalInternal
  function recv_socket (line 104) | static int recv_socket(struct PortalInternal *pint, volatile unsigned in...
  function event_socket (line 117) | static int event_socket(struct PortalInternal *pint)
  function send_socket (line 162) | static void send_socket(struct PortalInternal *pint, volatile unsigned i...
  function init_mux (line 185) | static int init_mux(struct PortalInternal *pint, void *aparam)
  function send_mux (line 200) | static void send_mux(struct PortalInternal *pint, volatile unsigned int ...
  function recv_mux (line 209) | static int recv_mux(struct PortalInternal *pint, volatile unsigned int *...
  function portal_mux_handler (line 213) | int portal_mux_handler(struct PortalInternal *pint, unsigned int channel...
  type memresponse (line 235) | struct memresponse
  function poll_response (line 238) | int poll_response(uint32_t id)
  function bsim_poll_interrupt (line 251) | unsigned int bsim_poll_interrupt(void)
  type semaphore (line 273) | struct semaphore
  type semaphore (line 274) | struct semaphore
  type semaphore (line 275) | struct semaphore
  type memrequest (line 278) | struct memrequest
  type memresponse (line 279) | struct memresponse
  function connectal_kernel_read (line 283) | ssize_t connectal_kernel_read (struct file *f, char __user *arg, size_t ...
  function connectal_kernel_write (line 302) | ssize_t connectal_kernel_write (struct file *f, const char __user *arg, ...
  function connect_to_bsim (line 313) | void connect_to_bsim(void)
  type memresponse (line 325) | struct memresponse
  function poll_response (line 328) | static int poll_response(int id)

FILE: cpp/transportWebSocket.c
  type per_session_data_connectal (line 33) | struct per_session_data_connectal {
  function callback_connectal (line 39) | static int
  function event_webSocket (line 113) | static int event_webSocket(struct PortalInternal *pint)
  type libwebsocket_protocols (line 129) | struct libwebsocket_protocols
  function get_context (line 134) | static void get_context(PortalInternal *pint, int port)
  function init_webSocketInit (line 150) | static int init_webSocketInit(struct PortalInternal *pint, void *aparam)
  function init_webSocketResp (line 180) | static int init_webSocketResp(struct PortalInternal *pint, void *aparam)
  function send_webSocket (line 201) | static void send_webSocket(struct PortalInternal *pint, volatile unsigne...

FILE: cpp/transportXsim.c
  function indMsgSource (line 31) | static int indMsgSource (PortalInternal *pint, const uint32_t portal, co...
  function init_xsim (line 58) | static int init_xsim(struct PortalInternal *pint, void *init_param)
  function write_portal_xsim (line 83) | void write_portal_xsim(PortalInternal *pint, volatile unsigned int **add...
  function write_fd_portal_xsim (line 89) | void write_fd_portal_xsim(PortalInternal *pint, volatile unsigned int **...
  type PortalInternal (line 96) | struct PortalInternal
  function event_xsim (line 104) | int event_xsim(struct PortalInternal *pint)

FILE: cpp/verilatortop.cpp
  function parseArgs (line 22) | void parseArgs(int argc, char **argv)
  function main (line 37) | int main(int argc, char **argv, char **env)

FILE: doc/library/source/bsvsphinx.py
  function _pseudo_parse_arglist (line 30) | def _pseudo_parse_arglist(signode, arglist):
  class BsvObject (line 77) | class BsvObject(ObjectDescription):
    method get_signatures (line 108) | def get_signatures(self):
    method get_signature_prefix (line 112) | def get_signature_prefix(self, sig):
    method needs_arglist (line 118) | def needs_arglist(self):
    method handle_signature (line 124) | def handle_signature(self, sig, signode):
    method get_index_text (line 252) | def get_index_text(self, modname, name):
    method add_target_and_index (line 256) | def add_target_and_index(self, name_cls, sig, signode):
    method before_content (line 281) | def before_content(self):
    method after_content (line 285) | def after_content(self):
  class BsvPackagelevel (line 290) | class BsvPackagelevel(BsvObject):
    method get_signature_prefix (line 295) | def get_signature_prefix(self, sig):
    method needs_arglist (line 298) | def needs_arglist(self):
    method get_index_text (line 301) | def get_index_text(self, modname, name_cls):
  class BsvInterfacelike (line 308) | class BsvInterfacelike(BsvObject):
    method get_signature_prefix (line 313) | def get_signature_prefix(self, sig):
    method get_index_text (line 316) | def get_index_text(self, modname, name_cls):
    method before_content (line 322) | def before_content(self):
  class BsvInterfacemember (line 329) | class BsvInterfacemember(BsvObject):
    method needs_arglist (line 342) | def needs_arglist(self):
    method get_signature_prefix (line 345) | def get_signature_prefix(self, sig):
    method get_index_text (line 352) | def get_index_text(self, modname, name_cls):
    method before_content (line 409) | def before_content(self):
  class BsvDecoratorMixin (line 417) | class BsvDecoratorMixin(object):
    method handle_signature (line 421) | def handle_signature(self, sig, signode):
    method needs_arglist (line 427) | def needs_arglist(self):
  class BsvDecoratorFunction (line 431) | class BsvDecoratorFunction(BsvDecoratorMixin, BsvPackagelevel):
    method run (line 435) | def run(self):
  class BsvDecoratorMethod (line 441) | class BsvDecoratorMethod(BsvDecoratorMixin, BsvInterfacemember):
    method run (line 445) | def run(self):
  class BsvPackage (line 450) | class BsvPackage(SphinxDirective):
    method run (line 466) | def run(self):
  class BsvCurrentPackage (line 492) | class BsvCurrentPackage(SphinxDirective):
    method run (line 504) | def run(self):
  class BsvXRefRole (line 514) | class BsvXRefRole(XRefRole):
    method process_link (line 515) | def process_link(self, env, refnode, has_explicit_title, title, target):
  class BsvPackageIndex (line 536) | class BsvPackageIndex(Index):
    method generate (line 545) | def generate(self, docnames=None):
  class BsvModuleIndex (line 605) | class BsvModuleIndex(Index):
    method generate (line 614) | def generate(self, docnames=None):
  class BsvDomain (line 675) | class BsvDomain(Domain):
    method clear_doc (line 744) | def clear_doc(self, docname):
    method find_obj (line 752) | def find_obj(self, env, modname, interfacename, name, type, searchmode...
    method resolve_xref (line 812) | def resolve_xref(self, env, fromdocname, builder,
    method get_objects (line 845) | def get_objects(self):
  function setup (line 852) | def setup(app):

FILE: drivers/awsf1portal/cdev_bypass.c
  function copy_desc_data (line 30) | static int copy_desc_data(struct xdma_transfer *transfer, char __user *buf,
  function char_bypass_read (line 62) | static ssize_t char_bypass_read(struct file *file, char __user *buf,
  function char_bypass_write (line 114) | static ssize_t char_bypass_write(struct file *file, const char __user *buf,
  type file_operations (line 180) | struct file_operations
  function cdev_bypass_init (line 189) | void cdev_bypass_init(struct xdma_cdev *xcdev)

FILE: drivers/awsf1portal/cdev_ctrl.c
  function char_ctrl_read (line 34) | static ssize_t char_ctrl_read(struct file *fp, char __user *buf, size_t ...
  function char_ctrl_write (line 65) | static ssize_t char_ctrl_write(struct file *file, const char __user *buf,
  function version_ioctl (line 98) | static long version_ioctl(struct xdma_cdev *xcdev, void __user *arg)
  function char_ctrl_ioctl (line 126) | long char_ctrl_ioctl(struct file *filp, unsigned int cmd, unsigned long ...
  function bridge_mmap (line 201) | int bridge_mmap(struct file *file, struct vm_area_struct *vma)
  type file_operations (line 261) | struct file_operations
  function cdev_ctrl_init (line 271) | void cdev_ctrl_init(struct xdma_cdev *xcdev)

FILE: drivers/awsf1portal/cdev_ctrl.h
  type XDMA_IOC_TYPES (line 53) | enum XDMA_IOC_TYPES {
  type xdma_ioc_base (line 61) | struct xdma_ioc_base {
  type xdma_ioc_info (line 66) | struct xdma_ioc_info {

FILE: drivers/awsf1portal/cdev_events.c
  function char_events_read (line 31) | static ssize_t char_events_read(struct file *file, char __user *buf,
  function char_events_poll (line 81) | static unsigned int char_events_poll(struct file *file, poll_table *wait)
  type file_operations (line 112) | struct file_operations
  function cdev_event_init (line 120) | void cdev_event_init(struct xdma_cdev *xcdev)

FILE: drivers/awsf1portal/cdev_sgdma.c
  function loff_t (line 39) | static loff_t char_sgdma_llseek(struct file *file, loff_t off, int whence)
  function check_transfer_align (line 84) | static int check_transfer_align(struct xdma_engine *engine,
  function xdma_io_cb_release (line 136) | static inline void xdma_io_cb_release(struct xdma_io_cb *cb)
  function char_sgdma_unmap_user_buf (line 149) | static void char_sgdma_unmap_user_buf(struct xdma_io_cb *cb, bool write)
  function char_sgdma_map_user_buf_to_sgl (line 174) | static int char_sgdma_map_user_buf_to_sgl(struct xdma_io_cb *cb, bool wr...
  function char_sgdma_read_write (line 252) | static ssize_t char_sgdma_read_write(struct file *file, char __user *buf,
  function char_sgdma_write (line 304) | static ssize_t char_sgdma_write(struct file *file, const char __user *buf,
  function char_sgdma_read (line 310) | static ssize_t char_sgdma_read(struct file *file, char __user *buf,
  function ioctl_do_perf_start (line 334) | static int ioctl_do_perf_start(struct xdma_engine *engine, unsigned long...
  function ioctl_do_perf_stop (line 378) | static int ioctl_do_perf_stop(struct xdma_engine *engine, unsigned long ...
  function ioctl_do_perf_get (line 414) | static int ioctl_do_perf_get(struct xdma_engine *engine, unsigned long arg)
  function ioctl_do_addrmode_set (line 439) | static int ioctl_do_addrmode_set(struct xdma_engine *engine, unsigned lo...
  function ioctl_do_addrmode_get (line 444) | static int ioctl_do_addrmode_get(struct xdma_engine *engine, unsigned lo...
  function ioctl_do_align_get (line 458) | static int ioctl_do_align_get(struct xdma_engine *engine, unsigned long ...
  function char_sgdma_ioctl (line 466) | static long char_sgdma_ioctl(struct file *file, unsigned int cmd,
  function char_sgdma_open (line 510) | static int char_sgdma_open(struct inode *inode, struct file *file)
  function char_sgdma_close (line 530) | static int char_sgdma_close(struct inode *inode, struct file *file)
  type file_operations (line 550) | struct file_operations
  function cdev_sgdma_init (line 560) | void cdev_sgdma_init(struct xdma_cdev *xcdev)

FILE: drivers/awsf1portal/cdev_sgdma.h
  type xdma_performance_ioctl (line 53) | struct xdma_performance_ioctl

FILE: drivers/awsf1portal/cdev_xvc.c
  function __write_register (line 39) | inline void __write_register(const char *fn, u32 value, void *base,
  function u32 (line 46) | inline u32 __read_register(const char *fn, void *base, unsigned int off)
  function xvc_shift_bits (line 62) | static int xvc_shift_bits(void *base, u32 tms_bits, u32 tdi_bits,
  function xvc_ioctl (line 97) | static long xvc_ioctl(struct file *filp, unsigned int cmd, unsigned long...
  type file_operations (line 226) | struct file_operations
  function cdev_xvc_init (line 233) | void cdev_xvc_init(struct xdma_cdev *xcdev)

FILE: drivers/awsf1portal/cdev_xvc.h
  type xvc_ioc (line 37) | struct xvc_ioc {

FILE: drivers/awsf1portal/libxdma.c
  function xdev_list_add (line 89) | static inline void xdev_list_add(struct xdma_dev *xdev)
  function xdev_list_remove (line 113) | static inline void xdev_list_remove(struct xdma_dev *xdev)
  type xdma_dev (line 125) | struct xdma_dev
  type pci_dev (line 125) | struct pci_dev
  type xdma_dev (line 127) | struct xdma_dev
  function debug_check_dev_hndl (line 141) | static inline int debug_check_dev_hndl(const char *fname, struct pci_dev...
  function __write_register (line 166) | inline void __write_register(const char *fn, u32 value, void *iomem, uns...
  function u32 (line 176) | inline u32 read_register(void *iomem)
  function u32 (line 181) | static inline u32 build_u32(u32 hi, u32 lo)
  function u64 (line 186) | static inline u64 build_u64(u64 hi, u64 lo)
  function check_nonzero_interrupt_status (line 191) | static void check_nonzero_interrupt_status(struct xdma_dev *xdev)
  function channel_interrupts_enable (line 227) | static void channel_interrupts_enable(struct xdma_dev *xdev, u32 mask)
  function channel_interrupts_disable (line 236) | static void channel_interrupts_disable(struct xdma_dev *xdev, u32 mask)
  function user_interrupts_enable (line 245) | static void user_interrupts_enable(struct xdma_dev *xdev, u32 mask)
  function user_interrupts_disable (line 254) | static void user_interrupts_disable(struct xdma_dev *xdev, u32 mask)
  function u32 (line 263) | static u32 read_interrupts(struct xdma_dev *xdev)
  function enable_perf (line 282) | void enable_perf(struct xdma_engine *engine)
  function get_perf_stats (line 302) | void get_perf_stats(struct xdma_engine *engine)
  function engine_reg_dump (line 333) | static void engine_reg_dump(struct xdma_engine *engine)
  function engine_status_dump (line 379) | static void engine_status_dump(struct xdma_engine *engine)
  function u32 (line 466) | static u32 engine_status_read(struct xdma_engine *engine, bool clear, bo...
  function xdma_engine_stop (line 492) | static void xdma_engine_stop(struct xdma_engine *engine)
  function engine_start_mode_config (line 526) | static void engine_start_mode_config(struct xdma_engine *engine)
  type xdma_transfer (line 598) | struct xdma_transfer
  type xdma_engine (line 598) | struct xdma_engine
  type xdma_transfer (line 600) | struct xdma_transfer
  function engine_service_shutdown (line 669) | static void engine_service_shutdown(struct xdma_engine *engine)
  type xdma_transfer (line 680) | struct xdma_transfer
  type xdma_engine (line 680) | struct xdma_engine
  type xdma_transfer (line 681) | struct xdma_transfer
  type xdma_transfer (line 697) | struct xdma_transfer
  type xdma_engine (line 697) | struct xdma_engine
  type xdma_transfer (line 698) | struct xdma_transfer
  function engine_err_handle (line 744) | static void engine_err_handle(struct xdma_engine *engine,
  type xdma_transfer (line 772) | struct xdma_transfer
  type xdma_engine (line 772) | struct xdma_engine
  type xdma_transfer (line 773) | struct xdma_transfer
  function engine_service_perf (line 838) | static void engine_service_perf(struct xdma_engine *engine, u32 desc_com...
  function engine_transfer_dequeue (line 864) | static void engine_transfer_dequeue(struct xdma_engine *engine)
  function engine_ring_process (line 884) | static int engine_ring_process(struct xdma_engine *engine)
  function engine_service_cyclic_polled (line 926) | static int engine_service_cyclic_polled(struct xdma_engine *engine)
  function engine_service_cyclic_interrupt (line 968) | static int engine_service_cyclic_interrupt(struct xdma_engine *engine)
  function engine_service_cyclic (line 1011) | static int engine_service_cyclic(struct xdma_engine *engine)
  function engine_service_resume (line 1029) | static void engine_service_resume(struct xdma_engine *engine)
  function engine_service (line 1070) | static int engine_service(struct xdma_engine *engine, int desc_writeback)
  function engine_service_work (line 1158) | static void engine_service_work(struct work_struct *work)
  function u32 (line 1189) | static u32 engine_service_wb_monitor(struct xdma_engine *engine,
  function engine_service_poll (line 1242) | static int engine_service_poll(struct xdma_engine *engine,
  function irqreturn_t (line 1281) | static irqreturn_t user_irq_service(int irq, struct xdma_user_irq *user_...
  function irqreturn_t (line 1305) | static irqreturn_t xdma_isr(int irq, void *dev_id)
  function irqreturn_t (line 1401) | static irqreturn_t xdma_user_irq(int irq, void *dev_id)
  function irqreturn_t (line 1418) | static irqreturn_t xdma_channel_irq(int irq, void *dev_id)
  function unmap_bars (line 1461) | static void unmap_bars(struct xdma_dev *xdev, struct pci_dev *dev)
  function map_single_bar (line 1476) | static int map_single_bar(struct xdma_dev *xdev, struct pci_dev *dev, in...
  function is_config_bar (line 1518) | static int is_config_bar(struct xdma_dev *xdev, int idx)
  function identify_bars (line 1545) | static void identify_bars(struct xdma_dev *xdev, int *bar_id_list, int n...
  function map_bars (line 1614) | static int map_bars(struct xdma_dev *xdev, struct pci_dev *dev)
  function arch_msi_check_device (line 1678) | int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
  function msi_msix_capable (line 1685) | static int msi_msix_capable(struct pci_dev *dev, int type)
  function disable_msi_msix (line 1707) | static void disable_msi_msix(struct xdma_dev *xdev, struct pci_dev *pdev)
  function enable_msi_msix (line 1718) | static int enable_msi_msix(struct xdma_dev *xdev, struct pci_dev *pdev)
  function pci_check_intr_pend (line 1763) | static void pci_check_intr_pend(struct pci_dev *pdev)
  function pci_keep_intx_enabled (line 1775) | static void pci_keep_intx_enabled(struct pci_dev *pdev)
  function prog_irq_msix_user (line 1793) | static void prog_irq_msix_user(struct xdma_dev *xdev, bool clear)
  function prog_irq_msix_channel (line 1823) | static void prog_irq_msix_channel(struct xdma_dev *xdev, bool clear)
  function irq_msix_channel_teardown (line 1852) | static void irq_msix_channel_teardown(struct xdma_dev *xdev)
  function irq_msix_channel_setup (line 1882) | static int irq_msix_channel_setup(struct xdma_dev *xdev)
  function irq_msix_user_teardown (line 1933) | static void irq_msix_user_teardown(struct xdma_dev *xdev)
  function irq_msix_user_setup (line 1957) | static int irq_msix_user_setup(struct xdma_dev *xdev)
  function irq_msi_setup (line 1999) | static int irq_msi_setup(struct xdma_dev *xdev, struct pci_dev *pdev)
  function irq_legacy_setup (line 2013) | static int irq_legacy_setup(struct xdma_dev *xdev, struct pci_dev *pdev)
  function irq_teardown (line 2048) | static void irq_teardown(struct xdma_dev *xdev)
  function irq_setup (line 2059) | static int irq_setup(struct xdma_dev *xdev, struct pci_dev *pdev)
  function dump_desc (line 2081) | static void dump_desc(struct xdma_desc *desc_virt)
  function transfer_dump (line 2103) | static void transfer_dump(struct xdma_transfer *transfer)
  function transfer_desc_init (line 2134) | static void transfer_desc_init(struct xdma_transfer *transfer, int count)
  function xdma_desc_link (line 2189) | static void xdma_desc_link(struct xdma_desc *first, struct xdma_desc *se...
  function xdma_desc_adjacent (line 2221) | static void xdma_desc_adjacent(struct xdma_desc *desc, int next_adjacent)
  function xdma_desc_control_set (line 2249) | static void xdma_desc_control_set(struct xdma_desc *first, u32 control_f...
  function xdma_desc_control_clear (line 2262) | static void xdma_desc_control_clear(struct xdma_desc *first, u32 clear_m...
  function xdma_desc_done (line 2282) | static inline void xdma_desc_done(struct xdma_desc *desc_virt)
  function xdma_desc_set (line 2298) | static void xdma_desc_set(struct xdma_desc *desc, dma_addr_t rc_bus_addr,
  function transfer_abort (line 2323) | static void transfer_abort(struct xdma_engine *engine,
  function transfer_queue (line 2354) | static int transfer_queue(struct xdma_engine *engine,
  function engine_alignments (line 2414) | static void engine_alignments(struct xdma_engine *engine)
  function engine_free_resource (line 2446) | static void engine_free_resource(struct xdma_engine *engine)
  function engine_destroy (line 2479) | static void engine_destroy(struct xdma_dev *xdev, struct xdma_engine *en...
  type xdma_transfer (line 2513) | struct xdma_transfer
  type xdma_engine (line 2513) | struct xdma_engine
  type xdma_transfer (line 2515) | struct xdma_transfer
  function engine_writeback_setup (line 2553) | static int engine_writeback_setup(struct xdma_engine *engine)
  function engine_init_regs (line 2597) | static int engine_init_regs(struct xdma_engine *engine)
  function engine_alloc_resource (line 2658) | static int engine_alloc_resource(struct xdma_engine *engine)
  function engine_init (line 2702) | static int engine_init(struct xdma_engine *engine, struct xdma_dev *xdev,
  function transfer_destroy (line 2760) | static void transfer_destroy(struct xdma_dev *xdev, struct xdma_transfer...
  function transfer_build (line 2776) | static int transfer_build(struct xdma_engine *engine,
  function transfer_init (line 2802) | static int transfer_init(struct xdma_engine *engine, struct xdma_request...
  function sgt_dump (line 2849) | static void sgt_dump(struct sg_table *sgt)
  function xdma_request_cb_dump (line 2863) | static void xdma_request_cb_dump(struct xdma_request_cb *req)
  function xdma_request_free (line 2877) | static void xdma_request_free(struct xdma_request_cb *req)
  type xdma_request_cb (line 2886) | struct xdma_request_cb
  type xdma_request_cb (line 2888) | struct xdma_request_cb
  type xdma_request_cb (line 2889) | struct xdma_request_cb
  type sw_desc (line 2890) | struct sw_desc
  type xdma_request_cb (line 2906) | struct xdma_request_cb
  type sg_table (line 2906) | struct sg_table
  type xdma_request_cb (line 2909) | struct xdma_request_cb
  type scatterlist (line 2910) | struct scatterlist
  function xdma_xfer_submit (line 2959) | ssize_t xdma_xfer_submit(void *dev_hndl, int channel, bool write, u64 ep...
  function xdma_performance_submit (line 3158) | int xdma_performance_submit(struct xdma_dev *xdev, struct xdma_engine *e...
  type xdma_dev (line 3237) | struct xdma_dev
  type pci_dev (line 3237) | struct pci_dev
  type xdma_dev (line 3240) | struct xdma_dev
  type xdma_engine (line 3241) | struct xdma_engine
  type xdma_dev (line 3246) | struct xdma_dev
  function request_regions (line 3293) | static int request_regions(struct xdma_dev *xdev, struct pci_dev *pdev)
  function set_dma_mask (line 3314) | static int set_dma_mask(struct pci_dev *pdev)
  function u32 (line 3342) | static u32 get_engine_channel_id(struct engine_regs *regs)
  function u32 (line 3353) | static u32 get_engine_id(struct engine_regs *regs)
  function remove_engines (line 3363) | static void remove_engines(struct xdma_dev *xdev)
  function probe_for_engine (line 3390) | static int probe_for_engine(struct xdma_dev *xdev, enum dma_data_directi...
  function probe_engines (line 3442) | static int probe_engines(struct xdma_dev *xdev)
  function pci_enable_relaxed_ordering (line 3468) | static void pci_enable_relaxed_ordering(struct pci_dev *pdev)
  function pci_enable_relaxed_ordering (line 3473) | static void pci_enable_relaxed_ordering(struct pci_dev *pdev)
  function pci_check_extended_tag (line 3487) | static void pci_check_extended_tag(struct xdma_dev *xdev, struct pci_dev...
  type pci_dev (line 3525) | struct pci_dev
  type xdma_dev (line 3528) | struct xdma_dev
  function xdma_device_close (line 3641) | void xdma_device_close(struct pci_dev *pdev, void *dev_hndl)
  function xdma_device_offline (line 3686) | void xdma_device_offline(struct pci_dev *pdev, void *dev_hndl)
  function xdma_device_online (line 3741) | void xdma_device_online(struct pci_dev *pdev, void *dev_hndl)
  function xdma_device_restart (line 3790) | int xdma_device_restart(struct pci_dev *pdev, void *dev_hndl)
  function xdma_user_isr_register (line 3805) | int xdma_user_isr_register(void *dev_hndl, unsigned int mask,
  function xdma_user_isr_enable (line 3832) | int xdma_user_isr_enable(void *dev_hndl, unsigned int mask)
  function xdma_user_isr_disable (line 3851) | int xdma_user_isr_disable(void *dev_hndl, unsigned int mask)
  function xdma_base_init (line 3870) | static int __init xdma_base_init(void)
  function xdma_base_exit (line 3876) | static void __exit xdma_base_exit(void)
  function xdma_transfer_cyclic (line 3885) | static void xdma_transfer_cyclic(struct xdma_transfer *transfer)
  function transfer_monitor_cyclic (line 3894) | static int transfer_monitor_cyclic(struct xdma_engine *engine,
  type scatterlist (line 3941) | struct scatterlist
  type sg_table (line 3941) | struct sg_table
  type scatterlist (line 3943) | struct scatterlist
  function copy_cyclic_to_user (line 3958) | static int copy_cyclic_to_user(struct xdma_engine *engine, int pkt_length,
  function complete_cyclic (line 4017) | static int complete_cyclic(struct xdma_engine *engine, char __user *buf,
  function xdma_engine_read_cyclic (line 4104) | ssize_t xdma_engine_read_cyclic(struct xdma_engine *engine, char __user ...
  function sgt_free_with_pages (line 4140) | static void sgt_free_with_pages(struct sg_table *sgt, int dir,
  function sgt_alloc_with_pages (line 4162) | static int sgt_alloc_with_pages(struct sg_table *sgt, unsigned int npages,
  function xdma_cyclic_transfer_setup (line 4206) | int xdma_cyclic_transfer_setup(struct xdma_engine *engine)
  function cyclic_shutdown_polled (line 4313) | static int cyclic_shutdown_polled(struct xdma_engine *engine)
  function cyclic_shutdown_interrupt (line 4340) | static int cyclic_shutdown_interrupt(struct xdma_engine *engine)
  function xdma_cyclic_transfer_teardown (line 4364) | int xdma_cyclic_transfer_teardown(struct xdma_engine *engine)
  function engine_addrmode_set (line 4412) | int engine_addrmode_set(struct xdma_engine *engine, unsigned long arg)

FILE: drivers/awsf1portal/libxdma.h
  type transfer_state (line 225) | enum transfer_state {
  type shutdown_state (line 233) | enum shutdown_state {
  type dev_capabilities (line 239) | enum dev_capabilities {
  type config_regs (line 248) | struct config_regs {
  type engine_regs (line 265) | struct engine_regs {
  type engine_sgdma_regs (line 294) | struct engine_sgdma_regs {
  type msix_vec_table_entry (line 306) | struct msix_vec_table_entry {
  type msix_vec_table (line 313) | struct msix_vec_table {
  type interrupt_regs (line 317) | struct interrupt_regs {
  type sgdma_common_regs (line 337) | struct sgdma_common_regs {
  type xdma_poll_wb (line 346) | struct xdma_poll_wb {
  type xdma_desc (line 361) | struct xdma_desc {
  type xdma_result (line 378) | struct xdma_result {
  type sw_desc (line 384) | struct sw_desc {
  type xdma_transfer (line 390) | struct xdma_transfer {
  type xdma_request_cb (line 408) | struct xdma_request_cb {
  type xdma_engine (line 420) | struct xdma_engine {
  type xdma_user_irq (line 487) | struct xdma_user_irq {
  type xdma_dev (line 500) | struct xdma_dev {
  function xdma_device_flag_check (line 548) | static inline int xdma_device_flag_check(struct xdma_dev *xdev, unsigned...
  function xdma_device_flag_test_n_set (line 561) | static inline int xdma_device_flag_test_n_set(struct xdma_dev *xdev,
  function xdma_device_flag_set (line 577) | static inline void xdma_device_flag_set(struct xdma_dev *xdev, unsigned ...
  function xdma_device_flag_clear (line 586) | static inline void xdma_device_flag_clear(struct xdma_dev *xdev, unsigne...
  type xdma_dev (line 598) | struct xdma_dev
  type pci_dev (line 598) | struct pci_dev
  type pci_dev (line 600) | struct pci_dev
  type pci_dev (line 601) | struct pci_dev
  type xdma_dev (line 603) | struct xdma_dev
  type xdma_engine (line 603) | struct xdma_engine
  type xdma_transfer (line 604) | struct xdma_transfer
  type xdma_engine (line 604) | struct xdma_engine
  type xdma_engine (line 605) | struct xdma_engine
  type xdma_engine (line 606) | struct xdma_engine
  type xdma_engine (line 608) | struct xdma_engine
  type xdma_engine (line 609) | struct xdma_engine
  type xdma_engine (line 610) | struct xdma_engine
  type xdma_engine (line 612) | struct xdma_engine

FILE: drivers/awsf1portal/libxdma_api.h
  type xdma_statistics (line 24) | typedef struct {
  type pci_dev (line 58) | struct pci_dev
  type pci_dev (line 68) | struct pci_dev
  type pci_dev (line 78) | struct pci_dev
  type sg_table (line 127) | struct sg_table

FILE: drivers/awsf1portal/linux/dma-buf.h
  type device (line 34) | struct device
  type dma_buf (line 35) | struct dma_buf
  type dma_buf_attachment (line 36) | struct dma_buf_attachment
  type dma_buf_ops (line 72) | struct dma_buf_ops {
  type dma_buf (line 117) | struct dma_buf {
  type dma_buf_attachment (line 140) | struct dma_buf_attachment {
  function get_dma_buf (line 156) | static inline void get_dma_buf(struct dma_buf *dmabuf)
  type dma_buf_attachment (line 161) | struct dma_buf_attachment
  type dma_buf (line 161) | struct dma_buf
  type device (line 162) | struct device
  type dma_buf (line 163) | struct dma_buf
  type dma_buf_attachment (line 164) | struct dma_buf_attachment
  type dma_buf (line 165) | struct dma_buf
  type dma_buf_ops (line 165) | struct dma_buf_ops
  type dma_buf (line 167) | struct dma_buf
  type dma_buf (line 168) | struct dma_buf
  type dma_buf (line 169) | struct dma_buf
  type sg_table (line 171) | struct sg_table
  type dma_buf_attachment (line 171) | struct dma_buf_attachment
  type dma_data_direction (line 172) | enum dma_data_direction
  type dma_buf_attachment (line 173) | struct dma_buf_attachment
  type sg_table (line 173) | struct sg_table
  type dma_data_direction (line 174) | enum dma_data_direction
  type dma_buf (line 175) | struct dma_buf
  type dma_data_direction (line 176) | enum dma_data_direction
  type dma_buf (line 177) | struct dma_buf
  type dma_data_direction (line 178) | enum dma_data_direction
  type dma_buf (line 179) | struct dma_buf
  type dma_buf (line 180) | struct dma_buf
  type dma_buf (line 181) | struct dma_buf
  type dma_buf (line 182) | struct dma_buf
  type dma_buf (line 184) | struct dma_buf
  type vm_area_struct (line 184) | struct vm_area_struct
  type dma_buf (line 186) | struct dma_buf
  type dma_buf (line 187) | struct dma_buf

FILE: drivers/awsf1portal/pcieportal.h
  type tTraceInfo (line 39) | typedef struct {
  type tSendFd (line 47) | typedef struct {
  type PortalSignaturePcie (line 52) | typedef struct {
  type tChangeEntry (line 60) | typedef struct ChangeEntry {

FILE: drivers/awsf1portal/portal.c
  type class (line 94) | struct class
  function irqreturn_t (line 103) | static irqreturn_t intr_handler(int irq, void *p)
  function pcieportal_open (line 123) | static int pcieportal_open(struct inode *inode, struct file *filp)
  function pcieportal_release (line 147) | static int pcieportal_release(struct inode *inode, struct file *filp)
  function pcieportal_poll (line 171) | static unsigned int pcieportal_poll(struct file *filp, poll_table *poll_...
  function pcieportal_ioctl (line 193) | static long pcieportal_ioctl(struct file *filp, unsigned int cmd, unsign...
  function portal_mmap (line 266) | static int portal_mmap(struct file *filp, struct vm_area_struct *vma)
  function pcieportal_read (line 304) | static ssize_t pcieportal_read(struct file *filp,
  type file_operations (line 311) | struct file_operations
  function connectal_open (line 322) | static int connectal_open(struct inode *inode, struct file *filp)
  function connectal_read (line 333) | static ssize_t connectal_read(struct file *filp,
  type file_operations (line 339) | struct file_operations
  function pcieportal_dma_pcis_open (line 346) | static int pcieportal_dma_pcis_open(struct inode *inode, struct file *filp)
  function pcieportal_dma_pcis_release (line 360) | static int pcieportal_dma_pcis_release(struct inode *inode, struct file ...
  function portal_dma_pcis_mmap (line 367) | static int portal_dma_pcis_mmap(struct file *filp, struct vm_area_struct...
  type file_operations (line 397) | struct file_operations
  function tune_pcie_caps (line 406) | static void tune_pcie_caps(struct pci_dev *dev)
  function pcieportal_board_activate (line 458) | int pcieportal_board_activate(int activate, tBoard *this_board, struct x...
  function pcieportal_probe (line 742) | static int pcieportal_probe(struct pci_dev *dev, const struct pci_device...
  function pcieportal_remove (line 774) | static void pcieportal_remove(struct pci_dev *dev)
  type pci_device_id (line 790) | struct pci_device_id
  function pci_ers_result_t (line 800) | static pci_ers_result_t pcieportal_error_detected(struct pci_dev *pdev, ...
  function pci_ers_result_t (line 806) | static pci_ers_result_t pcieportal_error_mmio_enabled(struct pci_dev *pdev)
  function pci_ers_result_t (line 812) | static pci_ers_result_t pcieportal_error_slot_reset(struct pci_dev *pdev)
  function pcieportal_error_resume (line 818) | static void pcieportal_error_resume(struct pci_dev *pdev)
  type pci_error_handlers (line 823) | struct pci_error_handlers
  type pci_driver (line 842) | struct pci_driver
  function pcieportal_init (line 851) | static int pcieportal_init(void)
  function pcieportal_exit (line 886) | static void pcieportal_exit(void)

FILE: drivers/awsf1portal/portal_internal.h
  type tPortal (line 32) | typedef struct {
  type tTile (line 48) | typedef struct {
  type pmentry (line 53) | struct pmentry {
  type tBoard (line 59) | typedef struct tBoard {
  type xdma_pci_dev (line 81) | struct xdma_pci_dev
  type xdma_pci_dev (line 82) | struct xdma_pci_dev
  type pci_dev (line 82) | struct pci_dev

FILE: drivers/awsf1portal/xdma_cdev.c
  type class (line 28) | struct class
  type cdev_type (line 30) | enum cdev_type {
  type xpdev_flags_bits (line 54) | enum xpdev_flags_bits {
  function xpdev_flag_set (line 63) | static inline void xpdev_flag_set(struct xdma_pci_dev *xpdev,
  function xcdev_flag_clear (line 69) | static inline void xcdev_flag_clear(struct xdma_pci_dev *xpdev,
  function xpdev_flag_test (line 75) | static inline int xpdev_flag_test(struct xdma_pci_dev *xpdev,
  function show_device_numbers (line 82) | ssize_t show_device_numbers(struct device *dev, struct device_attribute ...
  function config_kobject (line 94) | static int config_kobject(struct xdma_cdev *xcdev, enum cdev_type type)
  function xcdev_check (line 130) | int xcdev_check(const char *fname, struct xdma_cdev *xcdev, bool check_e...
  function char_open (line 159) | int char_open(struct inode *inode, struct file *file)
  function char_close (line 175) | int char_close(struct inode *inode, struct file *file)
  function create_sys_device (line 198) | static int create_sys_device(struct xdma_cdev *xcdev, enum cdev_type type)
  function destroy_xcdev (line 221) | static int destroy_xcdev(struct xdma_cdev *cdev)
  function create_xcdev (line 243) | static int create_xcdev(struct xdma_pci_dev *xpdev, struct xdma_cdev *xc...
  function xpdev_destroy_interfaces (line 348) | void xpdev_destroy_interfaces(struct xdma_pci_dev *xpdev)
  function xpdev_create_interfaces (line 398) | int xpdev_create_interfaces(struct xdma_pci_dev *xpdev)
  function xdma_cdev_init (line 535) | int xdma_cdev_init(void)
  function xdma_cdev_cleanup (line 546) | void xdma_cdev_cleanup(void)

FILE: drivers/awsf1portal/xdma_cdev.h
  type inode (line 40) | struct inode
  type file (line 40) | struct file
  type inode (line 41) | struct inode
  type file (line 41) | struct file
  type xdma_cdev (line 42) | struct xdma_cdev
  type xdma_cdev (line 44) | struct xdma_cdev
  type xdma_cdev (line 45) | struct xdma_cdev
  type xdma_cdev (line 46) | struct xdma_cdev
  type xdma_cdev (line 47) | struct xdma_cdev
  type xdma_cdev (line 48) | struct xdma_cdev
  type xdma_pci_dev (line 50) | struct xdma_pci_dev
  type xdma_pci_dev (line 51) | struct xdma_pci_dev
  type file (line 53) | struct file
  type vm_area_struct (line 53) | struct vm_area_struct

FILE: drivers/awsf1portal/xdma_ioctl.h
  type XDMA_IOC_TYPES (line 45) | enum XDMA_IOC_TYPES {
  type xdma_ioc_base (line 51) | struct xdma_ioc_base {
  type xdma_ioc_info (line 56) | struct xdma_ioc_info {

FILE: drivers/awsf1portal/xdma_mod.c
  type pci_device_id (line 52) | struct pci_device_id
  function xpdev_free (line 122) | static void xpdev_free(struct xdma_pci_dev *xpdev)
  type xdma_pci_dev (line 136) | struct xdma_pci_dev
  type pci_dev (line 136) | struct pci_dev
  type xdma_pci_dev (line 138) | struct xdma_pci_dev
  function probe_one (line 154) | static int probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
  function remove_one (line 218) | static void remove_one(struct pci_dev *pdev)
  function pci_ers_result_t (line 238) | static pci_ers_result_t xdma_error_detected(struct pci_dev *pdev,
  function pci_ers_result_t (line 260) | static pci_ers_result_t xdma_slot_reset(struct pci_dev *pdev)
  function xdma_error_resume (line 278) | static void xdma_error_resume(struct pci_dev *pdev)
  function xdma_reset_prepare (line 291) | static void xdma_reset_prepare(struct pci_dev *pdev)
  function xdma_reset_done (line 299) | static void xdma_reset_done(struct pci_dev *pdev)
  function xdma_reset_notify (line 308) | static void xdma_reset_notify(struct pci_dev *pdev, bool prepare)
  type pci_error_handlers (line 321) | struct pci_error_handlers
  type pci_driver (line 333) | struct pci_driver
  function xdma_mod_init (line 341) | static int __init xdma_mod_init(void)
  function xdma_mod_exit (line 361) | static void __exit xdma_mod_exit(void)

FILE: drivers/awsf1portal/xdma_mod.h
  type xdma_cdev (line 60) | struct xdma_cdev {
  type xdma_pci_dev (line 75) | struct xdma_pci_dev {
  type xdma_io_cb (line 104) | struct xdma_io_cb {

FILE: drivers/connectalsdhci/connectalsdhci.c
  type platform_device (line 17) | struct platform_device
  type platform_device (line 18) | struct platform_device
  type device (line 19) | struct device
  type device (line 20) | struct device
  type dev_pm_ops (line 23) | struct dev_pm_ops
  type of_device_id (line 31) | struct of_device_id
  type platform_driver (line 38) | struct platform_driver

FILE: drivers/connectalspi/connectalspi.c
  type platform_device (line 19) | struct platform_device
  type platform_device (line 20) | struct platform_device
  type device (line 21) | struct device
  type device (line 22) | struct device
  function bit_sel (line 69) | uint32_t bit_sel(uint32_t lsb, uint32_t msb, uint32_t v)
  function local_probe (line 74) | static int local_probe(struct platform_device *pdev)
  function local_remove (line 116) | static int local_remove(struct platform_device *pdev)
  type dev_pm_ops (line 127) | struct dev_pm_ops
  type of_device_id (line 135) | struct of_device_id
  type platform_driver (line 144) | struct platform_driver

FILE: drivers/pcieportal/linux/dma-buf.h
  type device (line 34) | struct device
  type dma_buf (line 35) | struct dma_buf
  type dma_buf_attachment (line 36) | struct dma_buf_attachment
  type dma_buf_ops (line 72) | struct dma_buf_ops {
  type dma_buf (line 117) | struct dma_buf {
  type dma_buf_attachment (line 140) | struct dma_buf_attachment {
  function get_dma_buf (line 156) | static inline void get_dma_buf(struct dma_buf *dmabuf)
  type dma_buf_attachment (line 161) | struct dma_buf_attachment
  type dma_buf (line 161) | struct dma_buf
  type device (line 162) | struct device
  type dma_buf (line 163) | struct dma_buf
  type dma_buf_attachment (line 164) | struct dma_buf_attachment
  type dma_buf (line 165) | struct dma_buf
  type dma_buf_ops (line 165) | struct dma_buf_ops
  type dma_buf (line 167) | struct dma_buf
  type dma_buf (line 168) | struct dma_buf
  type dma_buf (line 169) | struct dma_buf
  type sg_table (line 171) | struct sg_table
  type dma_buf_attachment (line 171) | struct dma_buf_attachment
  type dma_data_direction (line 172) | enum dma_data_direction
  type dma_buf_attachment (line 173) | struct dma_buf_attachment
  type sg_table (line 173) | struct sg_table
  type dma_data_direction (line 174) | enum dma_data_direction
  type dma_buf (line 175) | struct dma_buf
  type dma_data_direction (line 176) | enum dma_data_direction
  type dma_buf (line 177) | struct dma_buf
  type dma_data_direction (line 178) | enum dma_data_direction
  type dma_buf (line 179) | struct dma_buf
  type dma_buf (line 180) | struct dma_buf
  type dma_buf (line 181) | struct dma_buf
  type dma_buf (line 182) | struct dma_buf
  type dma_buf (line 184) | struct dma_buf
  type vm_area_struct (line 184) | struct vm_area_struct
  type dma_buf (line 186) | struct dma_buf
  type dma_buf (line 187) | struct dma_buf

FILE: drivers/pcieportal/pcieportal.c
  type class (line 90) | struct class
  type extra_info (line 91) | typedef struct extra_info { /* these datatypes are not available to user...
  function irqreturn_t (line 110) | static irqreturn_t intr_handler(int irq, void *p)
  function pcieportal_open (line 131) | static int pcieportal_open(struct inode *inode, struct file *filp)
  function pcieportal_release (line 155) | static int pcieportal_release(struct inode *inode, struct file *filp)
  function pcieportal_poll (line 179) | static unsigned int pcieportal_poll(struct file *filp, poll_table *poll_...
  function pcieportal_ioctl (line 201) | static long pcieportal_ioctl(struct file *filp, unsigned int cmd, unsign...
  function portal_mmap (line 329) | static int portal_mmap(struct file *filp, struct vm_area_struct *vma)
  function pcieportal_read (line 367) | static ssize_t pcieportal_read(struct file *filp,
  type file_operations (line 374) | struct file_operations
  function pcieportal_dma_pcis_open (line 385) | static int pcieportal_dma_pcis_open(struct inode *inode, struct file *filp)
  function pcieportal_dma_pcis_release (line 399) | static int pcieportal_dma_pcis_release(struct inode *inode, struct file ...
  function portal_dma_pcis_mmap (line 406) | static int portal_dma_pcis_mmap(struct file *filp, struct vm_area_struct...
  type file_operations (line 435) | struct file_operations
  function tune_pcie_caps (line 445) | static void tune_pcie_caps(struct pci_dev *dev)
  function board_activate (line 497) | static int board_activate(int activate, tBoard *this_board, struct pci_d...
  function pcieportal_probe (line 782) | static int pcieportal_probe(struct pci_dev *dev, const struct pci_device...
  function pcieportal_remove (line 816) | static void pcieportal_remove(struct pci_dev *dev)
  type pci_device_id (line 832) | struct pci_device_id
  function pci_ers_result_t (line 842) | static pci_ers_result_t pcieportal_error_detected(struct pci_dev *pdev, ...
  function pci_ers_result_t (line 848) | static pci_ers_result_t pcieportal_error_mmio_enabled(struct pci_dev *pdev)
  function pci_ers_result_t (line 854) | static pci_ers_result_t pcieportal_error_slot_reset(struct pci_dev *pdev)
  function pcieportal_error_resume (line 860) | static void pcieportal_error_resume(struct pci_dev *pdev)
  type pci_error_handlers (line 865) | struct pci_error_handlers
  type pci_driver (line 873) | struct pci_driver
  function tBoard (line 887) | tBoard* get_pcie_portal_descriptor(void)
  function pcieportal_init (line 902) | static int pcieportal_init(void)
  function pcieportal_exit (line 937) | static void pcieportal_exit(void)

FILE: drivers/pcieportal/pcieportal.h
  type tTraceInfo (line 39) | typedef struct {
  type tSendFd (line 47) | typedef struct {
  type PortalSignaturePcie (line 52) | typedef struct {
  type tChangeEntry (line 60) | typedef struct ChangeEntry {
  type tPortal (line 79) | typedef struct {
  type tTile (line 92) | typedef struct {
  type pmentry (line 97) | struct pmentry {
  type tBoard (line 103) | typedef struct tBoard {

FILE: drivers/portalmem/portalmem.c
  type miscdevice (line 52) | struct miscdevice
  function free_buffer_page (line 54) | static void free_buffer_page(struct page *page, unsigned int order)
  function pa_buffer_free (line 59) | static int pa_buffer_free(struct pa_buffer *buffer)
  type sg_table (line 79) | struct sg_table
  type dma_buf_attachment (line 79) | struct dma_buf_attachment
  type dma_data_direction (line 80) | enum dma_data_direction
  type pa_buffer (line 82) | struct pa_buffer
  function pa_dma_buf_unmap (line 85) | static void pa_dma_buf_unmap(struct dma_buf_attachment *attachment,
  function custom_vma_access (line 91) | static inline int custom_vma_access(struct vm_area_struct *vma, unsigned...
  type vm_operations_struct (line 119) | struct vm_operations_struct
  function llshow_pte (line 127) | static void llshow_pte(struct mm_struct *mm, unsigned long addr)
  function pa_dma_buf_mmap (line 174) | static int pa_dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct...
  function pa_dma_buf_release (line 235) | static void pa_dma_buf_release(struct dma_buf *dmabuf)
  type dma_buf (line 242) | struct dma_buf
  type pa_buffer (line 244) | struct pa_buffer
  function pa_dma_buf_kunmap (line 248) | static void pa_dma_buf_kunmap(struct dma_buf *dmabuf, unsigned long offset,
  function pa_dma_buf_begin_cpu_access (line 253) | static int pa_dma_buf_begin_cpu_access(struct dma_buf *dmabuf,
  type dma_buf (line 303) | struct dma_buf
  type dma_buf (line 323) | struct dma_buf
  type pa_buffer (line 325) | struct pa_buffer
  function pa_dma_buf_vunmap (line 334) | static void pa_dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr)
  type dma_buf_ops (line 340) | struct dma_buf_ops
  function portalmem_dmabuffer_destroy (line 366) | int portalmem_dmabuffer_destroy(int fd)
  function portalmem_dmabuffer_create (line 375) | int portalmem_dmabuffer_create(PortalAlloc portalAlloc)
  function pa_unlocked_ioctl (line 527) | static long pa_unlocked_ioctl(struct file *filep, unsigned int cmd, unsi...
  type file_operations (line 566) | struct file_operations
  function pa_init (line 575) | static int __init pa_init(void)
  function pa_exit (line 587) | static void __exit pa_exit(void)

FILE: drivers/portalmem/portalmem.h
  type DmaEntry (line 26) | typedef struct DmaEntry {
  type PortalAlloc (line 31) | typedef struct PortalAlloc {
  type PortalElementSize (line 36) | typedef struct PortalElementSize {
  type PortalSignatureMem (line 41) | typedef struct {
  type pa_buffer (line 60) | struct pa_buffer {
  type PortalAlloc (line 68) | struct PortalAlloc

FILE: drivers/zynqportal/zynqportal.c
  type pmentry (line 64) | struct pmentry {
  type portal_data (line 70) | struct portal_data {
  type connectal_data (line 80) | struct connectal_data{
  type connectal_data (line 94) | struct connectal_data
  type workqueue_struct (line 96) | struct workqueue_struct
  type work_struct (line 97) | struct work_struct
  function irqreturn_t (line 104) | static irqreturn_t portal_isr(int irq, void *dev_id)
  function portal_open (line 127) | static int portal_open(struct inode *inode, struct file *filep)
  function portal_unlocked_ioctl (line 134) | long portal_unlocked_ioctl(struct file *filep, unsigned int cmd, unsigne...
  function portal_mmap (line 313) | int portal_mmap(struct file *filep, struct vm_area_struct *vma)
  function portal_poll (line 330) | unsigned int portal_poll (struct file *filep, poll_table *poll_table)
  function portal_release (line 339) | static int portal_release(struct inode *inode, struct file *filep)
  type file_operations (line 361) | struct file_operations
  function remove_portal_devices (line 370) | static int remove_portal_devices(struct connectal_data *connectal_data)
  function connectal_work_handler (line 383) | static void connectal_work_handler(struct work_struct *__xxx)
  function connectal_open (line 421) | static int connectal_open(struct inode *inode, struct file *filep)
  function connectal_unlocked_ioctl (line 429) | long connectal_unlocked_ioctl(struct file *filep, unsigned int cmd, unsi...
  function connectal_read (line 538) | static ssize_t connectal_read(struct file *filp,
  type file_operations (line 547) | struct file_operations
  function connectal_of_probe (line 554) | static int connectal_of_probe(struct platform_device *pdev)
  function connectal_of_remove (line 600) | static int connectal_of_remove(struct platform_device *pdev)
  type of_device_id (line 619) | struct of_device_id
  type platform_driver (line 630) | struct platform_driver
  function connectal_of_init (line 643) | static int __init connectal_of_init(void)
  function connectal_of_exit (line 652) | static void __exit connectal_of_exit(void)

FILE: drivers/zynqportal/zynqportal.h
  type PortalClockRequest (line 16) | typedef struct {
  type PortalSendFd (line 22) | typedef struct {
  type PortalInterruptTime (line 27) | typedef struct {
  type PortalCacheRequest (line 32) | typedef struct {
  type PortalSignature (line 38) | typedef struct {

FILE: examples/algo1_nandsim/nandsim.cpp
  class NandCfgIndication (line 13) | class NandCfgIndication : public NandCfgIndicationWrapper
    method readDone (line 17) | virtual void readDone(uint32_t v){
    method writeDone (line 21) | virtual void writeDone(uint32_t v){
    method eraseDone (line 25) | virtual void eraseDone(uint32_t v){
    method configureNandDone (line 29) | virtual void configureNandDone(){
    method NandCfgIndication (line 34) | NandCfgIndication(int id) : NandCfgIndicationWrapper(id) {
    method wait (line 37) | void wait() {
  function initNandSim (line 45) | int initNandSim(DmaManager *hostDma)

FILE: examples/algo1_nandsim/test.cpp
  class MMUIndicationNandSim (line 49) | class MMUIndicationNandSim : public MMUIndicationWrapper
    method MMUIndicationNandSim (line 56) | MMUIndicationNandSim(DmaManager *pm, unsigned int  id, int tile=DEFAUL...
    method wait (line 59) | void wait() {
    method configResp (line 63) | virtual void configResp(uint32_t pointer){
    method error (line 67) | virtual void error (uint32_t code, uint32_t pointer, uint64_t offset, ...
    method idResponse (line 72) | virtual void idResponse(uint32_t sglId){
  class MemServerIndicationNandSim (line 81) | class MemServerIndicationNandSim : public MemServerIndicationWrapper
    method init (line 86) | void init(){
    method MemServerIndicationNandSim (line 91) | MemServerIndicationNandSim(unsigned int  id, int tile=DEFAULT_TILE) : ...
    method addrResponse (line 92) | virtual void addrResponse(uint64_t physAddr){
    method reportStateDbg (line 95) | virtual void reportStateDbg(const DmaDbgRec rec){
    method reportMemoryTraffic (line 98) | virtual void reportMemoryTraffic(uint64_t words){
    method error (line 103) | virtual void error (uint32_t code, uint32_t pointer, uint64_t offset, ...
    method receiveMemoryTraffic (line 108) | uint64_t receiveMemoryTraffic(){
    method getMemoryTraffic (line 112) | uint64_t getMemoryTraffic(const ChannelType rc){
  function main (line 123) | int main(int argc, const char **argv)

FILE: examples/algo2_nandsim/test.cpp
  class MMUIndicationNAND (line 47) | class MMUIndicationNAND : public MMUIndicationWrapper
    method MMUIndicationNAND (line 51) | MMUIndicationNAND(DmaManager *pm, unsigned int  id, int tile=DEFAULT_T...
    method MMUIndicationNAND (line 52) | MMUIndicationNAND(DmaManager *pm, unsigned int  id, PortalTransportFun...
    method configResp (line 53) | virtual void configResp(uint32_t pointer){
    method error (line 57) | virtual void error (uint32_t code, uint32_t pointer, uint64_t offset, ...
    method idResponse (line 62) | virtual void idResponse(uint32_t sglId){
  function main (line 69) | int main(int argc, const char **argv)

FILE: examples/aurora/testaurora.cpp
  class AuroraIndication (line 32) | class AuroraIndication : public AuroraIndicationWrapper
    method incr_cnt (line 36) | void incr_cnt(){
    method received (line 40) | virtual void received(uint64_t v) {
    method debug (line 43) | virtual void debug(uint32_t channelUp, uint32_t laneUp, uint32_t hardE...
    method userClkElapsedCycles (line 46) | virtual void userClkElapsedCycles(uint32_t ec) {
    method mgtRefClkElapsedCycles (line 49) | virtual void mgtRefClkElapsedCycles(uint32_t ec) {
    method outClkElapsedCycles (line 52) | virtual void outClkElapsedCycles(uint32_t ec) {
    method outRefClkElapsedCycles (line 55) | virtual void outRefClkElapsedCycles(uint32_t ec) {
    method drpResponse (line 58) | virtual void drpResponse(uint32_t v) {
    method AuroraIndication (line 61) | AuroraIndication(unsigned int id) : AuroraIndicationWrapper(id), cnt(0){}
  function main (line 66) | int main(int argc, const char **argv)

FILE: examples/bscan/testbscan.cpp
  class BscanIndication (line 32) | class BscanIndication : public BscanIndicationWrapper
    method bscanGet (line 35) | virtual void bscanGet(uint64_t v) {
    method BscanIndication (line 39) | BscanIndication(unsigned int id) : BscanIndicationWrapper(id) { }
  function main (line 42) | int main(int argc, const char **argv)

FILE: examples/echo/testecho.cpp
  class EchoIndication (line 31) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 34) | virtual void heard(uint32_t v) {
    method heard2 (line 38) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 42) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 45) | static void call_say(int v)
  function call_say2 (line 52) | static void call_say2(int v, int v2)
  function main (line 58) | int main(int argc, const char **argv)

FILE: examples/echo2ind/testecho.cpp
  class EchoIndication (line 32) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 35) | virtual void heard(uint32_t v) {
    method heard2 (line 39) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 43) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 46) | static void call_say(int v)
  function call_say2 (line 53) | static void call_say2(int v, int v2)
  function main (line 59) | int main(int argc, const char **argv)

FILE: examples/echohost/testecho.cpp
  class EchoIndication (line 31) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 34) | virtual void heard(uint32_t v) {
    method heard2 (line 38) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 42) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 45) | static void call_say(int v)
  function call_say2 (line 52) | static void call_say2(int v, int v2)
  function main (line 58) | int main(int argc, const char **argv)

FILE: examples/echoinvert/testecho.cpp
  class EchoIndication (line 31) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 34) | virtual void heard(uint32_t v) {
    method heard2 (line 38) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 42) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 45) | static void call_say(int v)
  function call_say2 (line 52) | static void call_say2(int v, int v2)
  function main (line 58) | int main(int argc, const char **argv)

FILE: examples/echojson/daemon.cpp
  class EchoIndication (line 34) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 37) | void heard(uint32_t v) {
    method heard2 (line 42) | void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 47) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  class EchoRequest (line 50) | class EchoRequest : public EchoRequestWrapper
    method say (line 53) | void say ( const uint32_t v ) {
    method say2 (line 58) | void say2 ( const uint16_t a, const uint16_t b ) {
    method setLeds (line 63) | void setLeds ( const uint8_t v ) {
    method EchoRequest (line 69) | EchoRequest(unsigned int id, PortalTransportFunctions *item, void *par...
  function main (line 72) | int main(int argc, const char **argv)

FILE: examples/echojson/testecho.cpp
  class EchoIndication (line 33) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 36) | virtual void heard(uint32_t v) {
    method heard2 (line 40) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 44) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  function call_say (line 47) | static void call_say(int v)
  function call_say2 (line 54) | static void call_say2(int v, int v2)
  function main (line 60) | int main(int argc, const char **argv)

FILE: examples/echojsonpy/daemon.cpp
  class EchoRequest (line 34) | class EchoRequest : public EchoRequestWrapper
    method say (line 37) | void say ( const uint32_t v ) {
    method say2 (line 41) | void say2 ( const uint16_t a, const uint16_t b ) {
    method setLeds (line 45) | void setLeds ( const uint8_t v ) {
    method EchoRequest (line 50) | EchoRequest(unsigned int id, PortalTransportFunctions *item, void *par...
  function main (line 53) | int main(int argc, const char **argv)

FILE: examples/echojsonpy/old_testecho.py
  class BaseClass (line 35) | class BaseClass(object):
    method __init__ (line 36) | def __init__(self, classtype):
  class socket_client (line 39) | class socket_client:
    method __init__ (line 40) | def __init__(self, devaddr, devport):
    method recv_frame (line 44) | def recv_frame(self):
    method send_frame (line 61) | def send_frame(self, data):
    method shutdown (line 66) | def shutdown(self):
  function toascii (line 70) | def toascii(u):
  function createSendMethod (line 73) | def createSendMethod(methname):
  function createDefaultCallbackMethod (line 80) | def createDefaultCallbackMethod(methname):
  function createWrapperEvent (line 85) | def createWrapperEvent(meths):
  function ProxyClassFactory (line 93) | def ProxyClassFactory(name, meths, BaseClass=BaseClass):
  function WrapperClassFactory (line 101) | def WrapperClassFactory(name, meths, BaseClass=BaseClass):
  function new_heard (line 134) | def new_heard(d):

FILE: examples/echomux/daemon.cpp
  class EchoIndication (line 41) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 44) | void heard(uint32_t id, uint32_t v) {
    method heard2 (line 50) | void heard2(uint32_t id, uint16_t a, uint16_t b) {
    method EchoIndication (line 56) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  class EchoRequest (line 59) | class EchoRequest : public EchoRequestSWWrapper
    method say (line 62) | void say ( const uint32_t v ) {
    method say2 (line 67) | void say2 ( const uint16_t a, const uint16_t b ) {
    method setLeds (line 72) | void setLeds ( const uint8_t v ) {
    method disconnect (line 76) | void disconnect(void) {
    method EchoRequest (line 81) | EchoRequest(unsigned int id, PortalTransportFunctions *item, void *par...
  class SecondRequest (line 85) | class SecondRequest : public SecondRequestWrapper
    method say (line 88) | void say(uint32_t v, uint64_t a, uint32_t b) {
    method SecondRequest (line 94) | SecondRequest(unsigned int id, PortalTransportFunctions *item, void *p...
  class ThirdRequest (line 98) | class ThirdRequest : public ThirdRequestWrapper
    method say (line 101) | void say ( ) {
    method ThirdRequest (line 107) | ThirdRequest(unsigned int id, PortalTransportFunctions *item, void *pa...
  function main (line 110) | int main(int argc, const char **argv)

FILE: examples/echomux/testecho.cpp
  class EchoIndication (line 37) | class EchoIndication : public EchoIndicationSWWrapper
    method heard (line 40) | virtual void heard(uint32_t v) {
    method heard2 (line 44) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 48) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  function call_say (line 51) | static void call_say(int v)
  function call_say2 (line 58) | static void call_say2(int v, int v2)
  class SecondIndication (line 67) | class SecondIndication : public SecondIndicationWrapper
    method heard (line 70) | virtual void heard(uint32_t v, uint32_t a) {
    method SecondIndication (line 73) | SecondIndication(unsigned int id, PortalTransportFunctions *item, void...
  class ThirdIndication (line 79) | class ThirdIndication : public ThirdIndicationWrapper
    method heard (line 82) | virtual void heard() {
    method ThirdIndication (line 85) | ThirdIndication(unsigned int id, PortalTransportFunctions *item, void ...
  function main (line 88) | int main(int argc, const char **argv)

FILE: examples/echoproto/testecho.cpp
  class EchoIndication (line 31) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 34) | virtual void heard(EchoHeard v) {
    method heard2 (line 39) | virtual void heard2(EchoHeard2 v) {
    method EchoIndication (line 43) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 46) | static void call_say(fixed32 v)
  function call_say2 (line 54) | static void call_say2(fixed32 v, fixed32 v2)
  function main (line 61) | int main(int argc, const char **argv)

FILE: examples/echopy/testecho.py
  class Echo (line 27) | class Echo:
    method __init__ (line 28) | def __init__(self):
    method call_say (line 32) | def call_say(self, a):
    method call_say2 (line 36) | def call_say2(self, a, b):
    method heard (line 40) | def heard(self, v):
    method heard2 (line 44) | def heard2(self, a, b):

FILE: examples/echoshared/daemon.cpp
  class EchoIndication (line 31) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 34) | void heard(uint32_t v) {
    method heard2 (line 39) | void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 44) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  class EchoRequest (line 47) | class EchoRequest : public EchoRequestWrapper
    method say (line 50) | void say ( const uint32_t v ) {
    method say2 (line 55) | void say2 ( const uint16_t a, const uint16_t b ) {
    method setLeds (line 60) | void setLeds ( const uint8_t v ) {
    method EchoRequest (line 66) | EchoRequest(unsigned int id, PortalTransportFunctions *item, void *par...
  function main (line 71) | int main(int argc, const char **argv)

FILE: examples/echoshared/testecho.cpp
  class EchoIndication (line 29) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 32) | virtual void heard(uint32_t v) {
    method heard2 (line 36) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 40) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  function call_say (line 43) | static void call_say(int v)
  function call_say2 (line 50) | static void call_say2(int v, int v2)
  function main (line 56) | int main(int argc, const char **argv)

FILE: examples/echosoft/daemon.cpp
  class EchoIndication (line 31) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 34) | void heard(uint32_t v) {
    method heard2 (line 39) | void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 44) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  class EchoRequest (line 47) | class EchoRequest : public EchoRequestWrapper
    method say (line 50) | void say ( const uint32_t v ) {
    method say2 (line 55) | void say2 ( const uint16_t a, const uint16_t b ) {
    method setLeds (line 60) | void setLeds ( const uint8_t v ) {
    method disconnect (line 64) | void disconnect (void) {
    method EchoRequest (line 69) | EchoRequest(unsigned int id, PortalTransportFunctions *item, void *par...
  function main (line 72) | int main(int argc, const char **argv)

FILE: examples/echosoft/testecho.cpp
  class EchoIndication (line 30) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 33) | void heard(uint32_t v) {
    method heard2 (line 37) | void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 41) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  function call_say (line 44) | static void call_say(int v)
  function call_say2 (line 51) | static void call_say2(int v, int v2)
  function main (line 57) | int main(int argc, const char **argv)

FILE: examples/echotrace/testecho.cpp
  function memdump (line 30) | static void memdump(uint8_t *p, int len, const char *title)
  class EchoIndication (line 48) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 51) | virtual void heard(uint32_t v) {
    method heard2 (line 56) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 60) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 63) | static void call_say(int v)
  function call_say2 (line 71) | static void call_say2(int v, int v2)
  function main (line 78) | int main(int argc, const char **argv)

FILE: examples/echowebsocket/daemon.cpp
  class EchoIndication (line 34) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 37) | void heard(uint32_t v) {
    method heard2 (line 42) | void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 47) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  class EchoRequest (line 50) | class EchoRequest : public EchoRequestWrapper
    method say (line 53) | void say ( const uint32_t v ) {
    method say2 (line 58) | void say2 ( const uint16_t a, const uint16_t b ) {
    method setLeds (line 63) | void setLeds ( const uint8_t v ) {
    method EchoRequest (line 69) | EchoRequest(unsigned int id, PortalTransportFunctions *item, void *par...
  function main (line 72) | int main(int argc, const char **argv)

FILE: examples/echowebsocket/testecho.cpp
  class EchoIndication (line 33) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 36) | virtual void heard(uint32_t v) {
    method heard2 (line 40) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 44) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  function call_say (line 47) | static void call_say(int v)
  function call_say2 (line 54) | static void call_say2(int v, int v2)
  function main (line 60) | int main(int argc, const char **argv)

FILE: examples/fmcomms1/fmci2c.c
  function fmcomms1_get_version (line 37) | int fmcomms1_get_version(int fd, int device, unsigned char *datap, int s...
  function testi2c (line 69) | void testi2c(const char *i2cdevice, int deviceid)

FILE: examples/fmcomms1/i2c_zedboardandroid.c
  function dump_i2c_msg (line 19) | void dump_i2c_msg(struct i2c_msg *msg)
  function dump_i2c_rdwr (line 38) | void dump_i2c_rdwr(struct i2c_rdwr_ioctl_data *arg)
  function I2C_Init (line 53) | uint32_t I2C_Init(char * devfile, uint32_t i2cAddr)
  function I2C_Write (line 77) | uint32_t I2C_Write(uint32_t i2cAddr, uint32_t regAddr,
  function I2C_Read (line 122) | uint32_t I2C_Read(uint32_t i2cAddr, uint32_t regAddr,

FILE: examples/fmcomms1/readtrace.py
  function reportEvent (line 13) | def reportEvent(v, timestamp):

FILE: examples/fmcomms1/testfmcomms1.cpp
  class FMComms1Indication (line 48) | class FMComms1Indication : public FMComms1IndicationWrapper
    method FMComms1Indication (line 52) | FMComms1Indication(unsigned int id) : FMComms1IndicationWrapper(id){}
    method readStatus (line 54) | virtual void readStatus(unsigned iterCount, unsigned running){
    method writeStatus (line 58) | virtual void writeStatus(unsigned iterCount, unsigned running){
  class BlueScopeEventPIOIndication (line 70) | class BlueScopeEventPIOIndication : public BlueScopeEventPIOIndicationWr...
    method BlueScopeEventPIOIndication (line 73) | BlueScopeEventPIOIndication(unsigned int id) : BlueScopeEventPIOIndica...
    method reportEvent (line 75) | virtual void reportEvent(uint32_t v, uint32_t timestamp ){
    method counterValue (line 82) | virtual void counterValue(uint32_t v){
  function main (line 91) | int main(int argc, const char **argv)

FILE: examples/fmcomms1/testi2c.c
  function fmcomms1_read_eeprom (line 35) | int fmcomms1_read_eeprom(int fd, int device, unsigned char *datap, int s...
  function fmcomms1_get_version (line 68) | int fmcomms1_get_version(int fd, int device, unsigned char *datap, int s...
  function main (line 99) | int main(int argc, char *argv[])

FILE: examples/gyro_simple/gyroVisualize.py
  class gv (line 26) | class gv:
    method __init__ (line 27) | def __init__(self):
    method update (line 60) | def update(self, direction, sampling_period):

FILE: examples/gyro_simple/gyro_simple.h
  function class (line 42) | class GyroCtrlIndication : public GyroCtrlIndicationWrapper
  function read_reg (line 76) | void read_reg(GyroCtrlIndication *ind, GyroCtrlRequestProxy *device, uns...
  function write_reg (line 82) | void write_reg(GyroCtrlIndication *ind, GyroCtrlRequestProxy *device, un...
  function set_en (line 88) | void set_en(GyroCtrlIndication *ind, GyroCtrlRequestProxy *device, unsig...
  function send (line 94) | int send(GyroSampleStreamProxy *gssp, void*b, int len, int drop, int spe...
  function setup_registers (line 108) | void setup_registers(GyroCtrlIndication *ind, GyroCtrlRequestProxy *devi...

FILE: examples/gyro_simple/test_gyro.cpp
  function main (line 40) | int main(int argc, const char **argv)

FILE: examples/gyro_simple/test_gyro.py
  class gyro_stream (line 43) | class gyro_stream:
    method __init__ (line 44) | def __init__(self, lpf=False):
    method radians (line 52) | def radians(self, sample):
    method next_samples (line 61) | def next_samples(self,samples):

FILE: examples/gyrospi/testspi.cpp
  class STestIndication (line 31) | class STestIndication: public STestIndicationWrapper {
    method STestIndication (line 33) | STestIndication(int id): STestIndicationWrapper(id) {}
    method result (line 34) | void result(uint16_t val ) {
  function read_reg (line 40) | int read_reg(int addr)
  function write_reg (line 47) | void write_reg(int addr, int data)
  function main (line 53) | int main(int argc, const char **argv)

FILE: examples/hbridge_simple/hbridge_simple.h
  function class (line 54) | class HBridgeCtrlIndication : public HBridgeCtrlIndicationWrapper

FILE: examples/hbridge_simple/test_hbridge.cpp
  function main (line 26) | int main(int argc, const char **argv)

FILE: examples/hdmidisplay/BsimHdmi.cpp
  function startmeup (line 39) | static void startmeup()
  function bdpi_hdmi_vsync (line 71) | void bdpi_hdmi_vsync(unsigned int v)
  function bdpi_hdmi_hsync (line 76) | void bdpi_hdmi_hsync(unsigned int v)
  function bdpi_hdmi_de (line 81) | void bdpi_hdmi_de(unsigned int v)
  function bdpi_hdmi_data (line 86) | void bdpi_hdmi_data(unsigned int v)

FILE: examples/hdmidisplay/qtmain.cpp
  function show_data (line 42) | void show_data(unsigned int vsync, unsigned int hsync, unsigned int de, ...
  function qtmain (line 73) | int qtmain(void *param)

FILE: examples/hdmidisplay/testhdmidisplay.cpp
  function memdump (line 46) | void memdump(unsigned char *p, int len, char *title)
  function fill_pixels (line 66) | static void fill_pixels(int offset)
  class HdmiIndication (line 101) | class HdmiIndication : public HdmiGeneratorIndicationWrapper {
    method HdmiIndication (line 103) | HdmiIndication(int id) : HdmiGeneratorIndicationWrapper(id) {}
    method vsync (line 104) | virtual void vsync ( uint64_t v, uint32_t w ) {
  class DisplayIndication (line 119) | class DisplayIndication : public HdmiDisplayIndicationWrapper {
    method DisplayIndication (line 121) | DisplayIndication(int id) : HdmiDisplayIndicationWrapper(id) {}
    method transferStarted (line 122) | virtual void transferStarted ( uint32_t v ) {
    method transferFinished (line 125) | virtual void transferFinished ( uint32_t v, uint32_t len ) {
    method transferStats (line 128) | virtual void transferStats ( uint32_t count, uint32_t cycles, uint64_t...
  type edid (line 159) | struct edid

FILE: examples/hdmidisplay/worker.h
  function class (line 25) | class Worker: public QObject {
  function class (line 35) | class PinsUpdate: public QObject {

FILE: examples/imageon/dump_image.cpp
  function main (line 53) | int main(int argc, char *argv[])

FILE: examples/imageon/i2ccamera.h
  function init_i2c_camera (line 22) | static void init_i2c_camera(void)

FILE: examples/imageon/testimagecapture.cpp
  class ImageonSerdesIndication (line 56) | class ImageonSerdesIndication : public ImageonSerdesIndicationWrapper {
    method ImageonSerdesIndication (line 58) | ImageonSerdesIndication(int id) : ImageonSerdesIndicationWrapper(id) {}
    method iserdes_control_value (line 59) | void iserdes_control_value ( const uint32_t v ){
    method iserdes_dma (line 63) | void iserdes_dma ( const uint32_t v ){
  class ImageonCaptureIndication (line 68) | class ImageonCaptureIndication : public ImageonCaptureIndicationWrapper {
    method ImageonCaptureIndication (line 70) | ImageonCaptureIndication(int id) : ImageonCaptureIndicationWrapper(id) {}
    method spi_response (line 71) | void spi_response(uint32_t v){
  class HdmiGeneratorIndication (line 78) | class HdmiGeneratorIndication: public HdmiGeneratorIndicationWrapper {
    method HdmiGeneratorIndication (line 81) | HdmiGeneratorIndication(int id, HdmiGeneratorRequestProxy *proxy) : Hd...
    method vsync (line 82) | virtual void vsync ( uint64_t v, uint32_t w ) {
  function memdump (line 89) | static void memdump(unsigned char *p, int len, const char *title)
  function init_local_semaphores (line 107) | static void init_local_semaphores(void)
  function spi_transfer (line 230) | static uint32_t spi_transfer (uint32_t v)
  function vita_spi_read_internal (line 238) | static uint32_t vita_spi_read_internal(uint32_t uAddr)
  function vita_spi_write (line 242) | static int vita_spi_write(uint32_t uAddr, uint16_t uData)
  function vita_spi_read (line 253) | static uint16_t vita_spi_read(uint32_t uAddr)
  function vita_spi_write_sequence (line 265) | static void vita_spi_write_sequence(uint16_t pConfig[][3], uint32_t uLen...
  function fmc_imageon_demo_enable_ipipe (line 287) | static void fmc_imageon_demo_enable_ipipe( void)
  function main (line 420) | int main(int argc, const char **argv)

FILE: examples/leds/testleds.cpp
  function main (line 24) | int main(int argc, const char **argv)

FILE: examples/matmul/testmm.cpp
  function compare (line 57) | bool compare(cv::Mat& m1, cv::Mat& m2, float epsilon)
  function main (line 72) | int main(int argc, const char **argv)

FILE: examples/maxsonar_simple/maxsonar_simple.h
  function class (line 36) | class MaxSonarCtrlIndication : public MaxSonarCtrlIndicationWrapper

FILE: examples/maxsonar_simple/test_maxsonar.cpp
  function main (line 27) | int main(int argc, const char **argv)

FILE: examples/memcpy/testmemcpy.cpp
  function dump (line 50) | void dump(const char *prefix, char *buf, size_t len)
  class MemcpyIndication (line 61) | class MemcpyIndication : public MemcpyIndicationWrapper
    method MemcpyIndication (line 65) | MemcpyIndication(unsigned int id) : MemcpyIndicationWrapper(id){}
    method started (line 67) | virtual void started(){
    method done (line 70) | virtual void done() {
  function main (line 110) | int main(int argc, const char **argv)

FILE: examples/memlatency/testmemlatency.cpp
  class MemlatencyIndication (line 42) | class MemlatencyIndication : public MemlatencyIndicationWrapper
    method MemlatencyIndication (line 46) | MemlatencyIndication(unsigned int id) : MemlatencyIndicationWrapper(id){}
    method started (line 48) | virtual void started(){
    method readLatency (line 51) | virtual void readLatency(uint32_t l) {
    method writeLatency (line 56) | virtual void writeLatency(uint32_t l){
    method readDone (line 61) | virtual void readDone() {
    method writeDone (line 65) | virtual void writeDone() {
  function main (line 74) | int main(int argc, const char **argv)

FILE: examples/memread/testmemread.cpp
  class ReadTestIndication (line 50) | class ReadTestIndication : public ReadTestIndicationWrapper
    method readDone (line 53) | void readDone(uint32_t v) {
    method started (line 59) | void started ( const uint32_t numWords ) {
    method reportStateDbg (line 61) | void reportStateDbg ( const uint32_t streamRdCnt, const uint32_t misma...
    method ReadTestIndication (line 63) | ReadTestIndication(int id, int tile=DEFAULT_TILE) : ReadTestIndication...
  function main (line 66) | int main(int argc, const char **argv)

FILE: examples/memread2/testmemread2.cpp
  function dump (line 32) | void dump(const char *prefix, char *buf, size_t len)
  class Memread2Indication (line 40) | class Memread2Indication : public Memread2IndicationWrapper
    method readReq (line 44) | virtual void readReq(uint32_t v){
    method readDone (line 47) | virtual void readDone(uint32_t v){
    method started (line 53) | virtual void started(uint32_t words){
    method rData (line 56) | virtual void rData ( uint64_t v ){
    method reportStateDbg (line 60) | virtual void reportStateDbg(uint32_t x, uint32_t y){
    method mismatch (line 63) | virtual void mismatch(uint32_t offset, uint64_t ev, uint64_t v) {
    method Memread2Indication (line 70) | Memread2Indication(int id) : Memread2IndicationWrapper(id), mismatchCo...
  function main (line 76) | int main(int argc, const char **argv)

FILE: examples/memread_simple/testmemread.cpp
  class ReadTestIndication (line 33) | class ReadTestIndication : public ReadTestIndicationWrapper
    method readDone (line 36) | void readDone(uint32_t v){
    method ReadTestIndication (line 40) | ReadTestIndication(int id) : ReadTestIndicationWrapper(id){}
  function main (line 43) | int main(int argc, const char **argv)

FILE: examples/memwrite/testmemwrite.cpp
  class MemwriteIndication (line 59) | class MemwriteIndication : public MemwriteIndicationWrapper
    method MemwriteIndication (line 62) | MemwriteIndication(int id, int tile=DEFAULT_TILE) : MemwriteIndication...
    method started (line 63) | void started(uint32_t words) {
    method writeDone (line 66) | void writeDone ( uint32_t srcGen ) {
    method reportStateDbg (line 70) | void reportStateDbg(uint32_t streamWrCnt, uint32_t srcGen) {
  function main (line 75) | int main(int argc, const char **argv)

FILE: examples/nandsim/testnandsim.cpp
  class NandCfgIndication (line 38) | class NandCfgIndication : public NandCfgIndicationWrapper
    method readDone (line 42) | virtual void readDone(uint32_t v){
    method writeDone (line 46) | virtual void writeDone(uint32_t v){
    method eraseDone (line 50) | virtual void eraseDone(uint32_t v){
    method configureNandDone (line 54) | virtual void configureNandDone(){
    method NandCfgIndication (line 59) | NandCfgIndication(int id) : NandCfgIndicationWrapper(id) {
    method wait (line 62) | void wait() {
  function main (line 70) | int main(int argc, const char **argv)

FILE: examples/portal-synth-boundary/testsimple.cpp
  class SimpleIndication (line 35) | class SimpleIndication : public SimpleIndicationWrapper
    method incr_cnt (line 39) | void incr_cnt(){
    method heard1 (line 43) | virtual void heard1(uint32_t a) {
    method SimpleIndication (line 48) | SimpleIndication(unsigned int id) : SimpleIndicationWrapper(id), cnt(0){}
  function main (line 53) | int main(int argc, const char **argv)

FILE: examples/printf/testecho.cpp
  function init_thread (line 78) | static void init_thread()
  class EchoIndication (line 87) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 90) | virtual void heard(uint32_t v) {
    method heard2 (line 94) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 100) | EchoIndication(unsigned int id, PortalPoller *poller) : EchoIndication...
  function call_say (line 105) | static void call_say(int v)
  function call_say2 (line 115) | static void call_say2(int v, int v2)
  function main (line 126) | int main(int argc, const char **argv)

FILE: examples/rbm/testrbm.cpp
  function dump (line 54) | void dump(const char *prefix, char *buf, size_t len)
  function main (line 77) | int main(int argc, const char **argv)

FILE: examples/readbw/testreadbw.cpp
  function dump (line 39) | void dump(const char *prefix, char *buf, size_t len)
  class TestCoreIndication (line 48) | class TestCoreIndication : public CoreIndication
    method storeAddress (line 50) | virtual void storeAddress ( uint64_t addr ) {
    method loadAddress (line 61) | virtual void loadAddress ( uint64_t addr ) {
    method loadValue (line 64) | virtual void loadValue ( std::bitset<128> &value, uint32_t cycles ) {
    method loadMultipleLatency (line 74) | virtual void loadMultipleLatency ( uint32_t busWidth, uint32_t beatsPe...
  class TestCoreRequest (line 88) | class TestCoreRequest : public CoreRequest
    method sglist (line 92) | virtual void sglist(uint32_t off, uint64_t addr, uint32_t len) {
    method paref (line 95) | virtual void paref(uint32_t off, uint32_t ref, uint32_t foo) {
    method TestCoreRequest (line 98) | static TestCoreRequest *createTestCoreRequest(CoreIndication *indicati...
    method TestCoreRequest (line 105) | TestCoreRequest(const char *instanceName, CoreIndication *indication)
  function main (line 113) | int main(int argc, const char **argv)

FILE: examples/regexp/testregexp.cpp
  function main (line 30) | int main(int argc, const char **argv)

FILE: examples/sdcard_spi/sdcard_spi.cpp
  function getCRC7 (line 11) | uint8_t getCRC7(uint64_t x) {
  function printR1Resp (line 25) | void printR1Resp( uint8_t resp ) {
  class SPI (line 42) | class SPI : public SPIIndicationWrapper {
    method SPI (line 49) | SPI(unsigned int indicationId, unsigned int requestId)
    method setSclkDiv (line 56) | void setSclkDiv(uint16_t x) {
    method enableChip (line 60) | void enableChip(bool x) {
    method req (line 69) | uint8_t req(uint8_t x) {
    method get (line 75) | void get(uint8_t x) {
  class SD_SPIMode (line 81) | class SD_SPIMode {
    method SD_SPIMode (line 92) | SD_SPIMode(SPI* myspi) {
    method sendSDReq (line 99) | int sendSDReq(uint8_t cmdIndx, uint32_t arg) {
    method getByteResp (line 141) | uint8_t getByteResp() {
    method getWordResp (line 145) | uint32_t getWordResp() {
    method init (line 155) | bool init(uint16_t d) {
    method readBlock (line 257) | bool readBlock(uint32_t blockAddr, void* data) {
  function main (line 290) | int main(int argc, char* argv[]) {

FILE: examples/simple/simple.h
  function class (line 54) | class Simple : public SimpleRequestWrapper

FILE: examples/simple/testsimple.cpp
  function main (line 26) | int main(int argc, const char **argv)

FILE: examples/simplemultibluesim/testsimple.cpp
  class SimpleRequest (line 53) | class SimpleRequest : public SimpleRequestWrapper
    method incr_cnt (line 57) | void incr_cnt(){
    method say1 (line 63) | virtual void say1(uint32_t a) {
    method say2 (line 68) | virtual void say2(uint16_t a, uint16_t b) {
    method say3 (line 74) | virtual void say3(S1 s){
    method say4 (line 80) | virtual void say4(S2 s){
    method say5 (line 87) | virtual void say5(uint32_t a, uint64_t b, uint32_t c) {
    method say6 (line 94) | virtual void say6(uint32_t a, uint64_t b, uint32_t c) {
    method say7 (line 101) | virtual void say7(S3 v) {
    method say8 (line 107) | virtual void say8 ( const bsvvector_Luint32_t_L128 v ) {
    method sayv1 (line 113) | void sayv1(const int32_t*arg1, const int32_t*arg2) {
    method sayv2 (line 119) | void sayv2(const int16_t* v) {
    method sayv3 (line 125) | void sayv3(const int16_t* v, int16_t count) {
    method reftest1 (line 131) | void reftest1 ( const Address dst, const Intptr dst_stride, const Addr...
    method SimpleRequest (line 136) | SimpleRequest(unsigned int id) : SimpleRequestWrapper(id), cnt(0){}
  function main (line 141) | int main(int argc, const char **argv)

FILE: examples/simplesharedhw/testsimple.cpp
  class Simple (line 47) | class Simple : public SimpleRequestWrapper
    method wait (line 53) | void wait() {
    method incr_cnt (line 57) | void incr_cnt(){
    method say1 (line 61) | void say1(uint32_t a) {
    method say2 (line 66) | void say2(uint16_t a, uint16_t b) {
    method say3 (line 72) | void say3(S1 s){
    method say4 (line 78) | void say4(S2 s){
    method say5 (line 85) | void say5(uint32_t a, uint64_t b, uint32_t c) {
    method say6 (line 92) | void say6(uint32_t a, uint64_t b, uint32_t c) {
    method say7 (line 99) | void say7(S3 v) {
    method say8 (line 105) | void say8 ( const bsvvector_Luint32_t_L128 v ) {
    method sayv1 (line 111) | void sayv1(const int32_t*arg1, const int32_t*arg2) {
    method sayv2 (line 117) | void sayv2(const int16_t* v) {
    method sayv3 (line 123) | void sayv3(const int16_t* v, int16_t count) {
    method Simple (line 129) | Simple(unsigned int id, unsigned int numtimes=1, PortalTransportFuncti...
  function main (line 136) | int main(int argc, const char **argv)

FILE: examples/strstr/teststrstr.cpp
  function main (line 31) | int main(int argc, const char **argv)

FILE: examples/swmemcpy/testswmemcpy.cpp
  class TestPM (line 37) | class TestPM : public ConnectalMemory
    method sglist (line 40) | virtual void sglist(uint32_t off, uint64_t addr, uint32_t len) {}
    method paref (line 41) | virtual void paref(uint32_t off, uint32_t ref) {}
    method TestPM (line 42) | TestPM() : ConnectalMemory(){}
  class TestPM (line 73) | class TestPM
    method sglist (line 40) | virtual void sglist(uint32_t off, uint64_t addr, uint32_t len) {}
    method paref (line 41) | virtual void paref(uint32_t off, uint32_t ref) {}
    method TestPM (line 42) | TestPM() : ConnectalMemory(){}
  function main (line 107) | int main(int argc, const char **argv)

FILE: examples/vectoradd_hls/src/vectoradd.cpp
  function vectoradd (line 3) | void vectoradd(const int in0[64], const int in1[64], int out[64])

FILE: examples/vectoradd_hls/testvadd.cpp
  class VaddResponse (line 7) | class VaddResponse : public VaddResponseWrapper
    method data (line 13) | virtual void data ( const uint32_t out ) {
    method done (line 19) | virtual void done() {
    method clear (line 25) | void clear() {
    method VaddResponse (line 30) | VaddResponse(unsigned int id, PortalTransportFunctions *transport = 0,...
  function main (line 37) | int main(int argc, const char **argv)

FILE: examples/zedboard_robot/sonarVisualize.py
  class sv (line 28) | class sv:
    method __init__ (line 29) | def __init__(self):
    method label_last (line 34) | def label_last(self):
    method add_line (line 38) | def add_line(self,start,end):
    method extend_line (line 43) | def extend_line(self,end):
    method add_ray (line 48) | def add_ray(self,heading,length):

FILE: examples/zedboard_robot/test_zedboard_robot.cpp
  function send_aux (line 74) | int send_aux(GyroSampleStreamProxy *gssp, void*b, int len, int drop, int...
  function main (line 91) | int main(int argc, const char **argv)

FILE: examples/zynqpcie/testsimple.cpp
  class Simple (line 53) | class Simple : public SimpleWrapper
    method incr_cnt (line 57) | void incr_cnt(){
    method say1 (line 61) | virtual void say1(uint32_t a) {
    method say2 (line 66) | virtual void say2(uint32_t a, uint32_t b) {
    method say3 (line 72) | virtual void say3(S1 s){
    method say4 (line 78) | virtual void say4(S2 s){
    method say5 (line 85) | virtual void say5(uint32_t a, uint64_t b, uint32_t c) {
    method say6 (line 92) | virtual void say6(uint32_t a, uint64_t b, uint32_t c) {
    method say7 (line 99) | virtual void say7(S3 v) {
    method say8 (line 105) | virtual void say8 ( const bsvvector_Luint32_t_L128 v ) {
    method Simple (line 111) | Simple(unsigned int id) : SimpleWrapper(id), cnt(0){}
  function main (line 116) | int main(int argc, const char **argv)

FILE: examples/zynqpcie/testzynqpcie.cpp
  class ZynqPcieTestIndication (line 32) | class ZynqPcieTestIndication : public ZynqPcieTestIndicationWrapper {
    method ZynqPcieTestIndication (line 34) | ZynqPcieTestIndication(int id, PortalPoller *poller = 0) : ZynqPcieTes...
    method ZynqPcieTestIndication (line 36) | ZynqPcieTestIndication(int id, PortalTransportFunctions *item, void *p...
    method status (line 38) | virtual void status ( const uint32_t v ) {
    method trace (line 41) | virtual void trace ( const uint32_t *v ) {
  function main (line 47) | int main(int argc, const char **argv)

FILE: generated/cpp/GeneratedTypes.h
  type ChannelType (line 7) | typedef enum ChannelType { ChannelType_Read, ChannelType_Write } Channel...
  type DmaDbgRec (line 8) | typedef struct DmaDbgRec {
  type DmaErrorType (line 14) | typedef enum DmaErrorType { DmaErrorNone, DmaErrorSGLIdOutOfRange_r, Dma...
  type SpecialTypeForSendingFd (line 15) | typedef uint32_t SpecialTypeForSendingFd;
  type TileState (line 16) | typedef enum TileState { Idle, Stopped, Running } TileState;
  type TileControl (line 17) | typedef struct TileControl {
  type IfcNames (line 21) | typedef enum IfcNames { NoInterface, IfcNames_ReadTestIndicationH2S, Ifc...
  type PortalInternal (line 24) | struct PortalInternal
  type PortalInternal (line 25) | struct PortalInternal
  type PortalInternal (line 26) | struct PortalInternal
  type PortalInternal (line 27) | struct PortalInternal
  type MemServerRequest_addrTransData (line 31) | typedef struct {
  type MemServerRequest_setTileStateData (line 35) | typedef struct {
  type MemServerRequest_stateDbgData (line 38) | typedef struct {
  type MemServerRequest_memoryTrafficData (line 41) | typedef struct {
  type MemServerRequestData (line 44) | typedef union {
  type PortalInternal (line 50) | struct PortalInternal
  type MemServerRequestCb (line 51) | typedef struct {
  type PortalInternal (line 59) | struct PortalInternal
  type PortalInternal (line 60) | struct PortalInternal
  type PortalInternal (line 61) | struct PortalInternal
  type PortalInternal (line 62) | struct PortalInternal
  type PortalInternal (line 63) | struct PortalInternal
  type PortalInternal (line 66) | struct PortalInternal
  type PortalInternal (line 67) | struct PortalInternal
  type PortalInternal (line 68) | struct PortalInternal
  type PortalInternal (line 69) | struct PortalInternal
  type PortalInternal (line 70) | struct PortalInternal
  type MMURequest_sglistData (line 74) | typedef struct {
  type MMURequest_regionData (line 80) | typedef struct {
  type MMURequest_idRequestData (line 91) | typedef struct {
  type MMURequest_idReturnData (line 94) | typedef struct {
  type MMURequest_setInterfaceData (line 97) | typedef struct {
  type MMURequestData (line 101) | typedef union {
  type PortalInternal (line 108) | struct PortalInternal
  type MMURequestCb (line 109) | typedef struct {
  type PortalInternal (line 118) | struct PortalInternal
  type PortalInternal (line 119) | struct PortalInternal
  type PortalInternal (line 120) | struct PortalInternal
  type PortalInternal (line 121) | struct PortalInternal
  type PortalInternal (line 122) | struct PortalInternal
  type PortalInternal (line 123) | struct PortalInternal
  type PortalInternal (line 126) | struct PortalInternal
  type PortalInternal (line 127) | struct PortalInternal
  type PortalInternal (line 128) | struct PortalInternal
  type PortalInternal (line 129) | struct PortalInternal
  type MemServerIndication_addrResponseData (line 133) | typedef struct {
  type MemServerIndication_reportStateDbgData (line 136) | typedef struct {
  type MemServerIndication_reportMemoryTrafficData (line 139) | typedef struct {
  type MemServerIndication_errorData (line 142) | typedef struct {
  type MemServerIndicationData (line 148) | typedef union {
  type PortalInternal (line 154) | struct PortalInternal
  type MemServerIndicationCb (line 155) | typedef struct {
  type PortalInternal (line 163) | struct PortalInternal
  type PortalInternal (line 164) | struct PortalInternal
  type PortalInternal (line 165) | struct PortalInternal
  type PortalInternal (line 166) | struct PortalInternal
  type PortalInternal (line 167) | struct PortalInternal
  type PortalInternal (line 170) | struct PortalInternal
  type PortalInternal (line 171) | struct PortalInternal
  type PortalInternal (line 172) | struct PortalInternal
  type MMUIndication_idResponseData (line 176) | typedef struct {
  type MMUIndication_configRespData (line 179) | typedef struct {
  type MMUIndication_errorData (line 182) | typedef struct {
  type MMUIndicationData (line 188) | typedef union {
  type PortalInternal (line 193) | struct PortalInternal
  type MMUIndicationCb (line 194) | typedef struct {
  type PortalInternal (line 201) | struct PortalInternal
  type PortalInternal (line 202) | struct PortalInternal
  type PortalInternal (line 203) | struct PortalInternal
  type PortalInternal (line 204) | struct PortalInternal
  type PortalInternal (line 207) | struct PortalInternal
  type ReadTestRequest_startReadData (line 211) | typedef struct {
  type ReadTestRequestData (line 217) | typedef union {
  type PortalInternal (line 220) | struct PortalInternal
  type ReadTestRequestCb (line 221) | typedef struct {
  type PortalInternal (line 226) | struct PortalInternal
  type PortalInternal (line 227) | struct PortalInternal
  type PortalInternal (line 230) | struct PortalInternal
  type ReadTestIndication_readDoneData (line 234) | typedef struct {
  type ReadTestIndicationData (line 237) | typedef union {
  type PortalInternal (line 240) | struct PortalInternal
  type ReadTestIndicationCb (line 241) | typedef struct {
  type PortalInternal (line 246) | struct PortalInternal
  type PortalInternal (line 247) | struct PortalInternal

FILE: generated/cpp/MMURequest.c
  function MMURequest_sglist (line 3) | int MMURequest_sglist ( struct PortalInternal *p, const uint32_t sglId, ...
  function MMURequest_region (line 17) | int MMURequest_region ( struct PortalInternal *p, const uint32_t sglId, ...
  function MMURequest_idRequest (line 39) | int MMURequest_idRequest ( struct PortalInternal *p, const SpecialTypeFo...
  function MMURequest_idReturn (line 49) | int MMURequest_idReturn ( struct PortalInternal *p, const uint32_t sglId )
  function MMURequest_setInterface (line 59) | int MMURequest_setInterface ( struct PortalInternal *p, const uint32_t i...
  function MMURequest_handleMessage (line 77) | int MMURequest_handleMessage(struct PortalInternal *p, unsigned int chan...

FILE: generated/scripts/importbvi.py
  class PinType (line 43) | class PinType(object):
    method __init__ (line 44) | def __init__(self, mode, type, name, origname):
  function parsenext (line 55) | def parsenext():
  function validate_token (line 66) | def validate_token(testval):
  function parseparam (line 73) | def parseparam():
  function parse_item (line 83) | def parse_item():
  function parse_lib (line 168) | def parse_lib(filename):
  function processline (line 203) | def processline(line, phase):
  function parse_verilog (line 323) | def parse_verilog(filename):
  function generate_condition (line 332) | def generate_condition(interfacename):
  function generate_interface (line 340) | def generate_interface(interfacename, paramlist, paramval, ilist, cname):
  function fixname (line 384) | def fixname(arg):
  function goback (line 396) | def goback(arg):
  function regroup_items (line 408) | def regroup_items(masterlist):
  function generate_inter_declarations (line 500) | def generate_inter_declarations(paramlist, paramval):
  function locate_clocks (line 510) | def locate_clocks(item, prefix):
  function generate_clocks (line 529) | def generate_clocks(item, indent, prefix):
  function generate_instance (line 547) | def generate_instance(item, indent, prefix, clockedby_arg):
  function generate_bsv (line 603) | def generate_bsv():

FILE: gralloc/gr.h
  type private_module_t (line 36) | struct private_module_t
  type private_handle_t (line 37) | struct private_handle_t
  function roundUpToPageSize (line 39) | inline size_t roundUpToPageSize(size_t x) {
  type private_module_t (line 43) | struct private_module_t
  function class (line 49) | class Locker {
  function lock (line 60) | inline void lock()     { pthread_mutex_lock(&mutex); }
  function unlock (line 61) | inline void unlock()   { pthread_mutex_unlock(&mutex); }

FILE: gralloc/gralloc.cpp
  class TestHdmiIndication (line 41) | class TestHdmiIndication : public HdmiInternalIndicationWrapper {
    method vsync (line 43) | virtual void vsync ( unsigned long long v ) {
  type gralloc_context_t (line 50) | struct gralloc_context_t {
  type hw_module_methods_t (line 95) | struct hw_module_methods_t
  type private_gralloc_module_t (line 99) | struct private_gralloc_module_t
  function gralloc_alloc_buffer (line 124) | static int gralloc_alloc_buffer(alloc_device_t* dev,
  function gralloc_alloc (line 164) | static int gralloc_alloc(alloc_device_t* dev,
  function gralloc_free (line 206) | static int gralloc_free(alloc_device_t* dev,
  function gralloc_close (line 233) | static int gralloc_close(struct hw_device_t *dev)
  function fb_setSwapInterval (line 246) | static int fb_setSwapInterval(struct framebuffer_device_t* dev,
  class GrallocHdmiDisplayIndications (line 257) | class GrallocHdmiDisplayIndications : public HdmiInternalIndicationWrapp...
    method vsync (line 258) | virtual void vsync(unsigned long long v) {
  function fb_post (line 269) | static int fb_post(struct framebuffer_device_t* dev, buffer_handle_t buf...
  function fb_close (line 305) | static int fb_close(struct hw_device_t *dev)
  function gralloc_device_open (line 315) | int gralloc_device_open(const hw_module_t* module, const char* name,

FILE: gralloc/gralloc_priv.h
  type private_handle_t (line 34) | struct private_handle_t
  type private_gralloc_module_t (line 36) | struct private_gralloc_module_t {
  function native_handle (line 47) | struct private_handle_t : public native_handle {

FILE: gralloc/mapper.cpp
  function pid_t (line 40) | pid_t gettid() { return syscall(__NR_gettid);}
  function gralloc_map (line 46) | static int gralloc_map(gralloc_module_t const* module,
  function gralloc_unmap (line 67) | static int gralloc_unmap(gralloc_module_t const* module,
  function gralloc_register_buffer (line 89) | int gralloc_register_buffer(gralloc_module_t const* module,
  function gralloc_unregister_buffer (line 105) | int gralloc_unregister_buffer(gralloc_module_t const* module,
  function mapBuffer (line 121) | int mapBuffer(gralloc_module_t const* module,
  function terminateBuffer (line 128) | int terminateBuffer(gralloc_module_t const* module,
  function gralloc_lock (line 139) | int gralloc_lock(gralloc_module_t const* module,
  function gralloc_unlock (line 160) | int gralloc_unlock(gralloc_module_t const* module,

FILE: jtag/readll.py
  function getbit (line 27) | def getbit(lastx, lasty):
  function printval (line 43) | def printval(starty, lastx, lasty, lastval):

FILE: lib/cpp/connectal_conv.cpp
  class ConvIndication (line 34) | class ConvIndication : public ConvIndicationWrapper
    method outputp (line 38) | void outputp(uint32_t addr, float v) {
    method ConvIndication (line 45) | ConvIndication(unsigned int id, ParamStruct *p) : ConvIndicationWrappe...
  function forward_kernel_hardware (line 49) | static void forward_kernel_hardware(ParamStruct *param, uint32_t p_limit,
  function forward_kernel (line 81) | void forward_kernel(const ParamType<Dtype> *param, int p_limit, int q_li...
  function backward_bias (line 167) | void backward_bias(const ParamType<Dtype> *param, CPtr tptr)
  function backward_kernel (line 180) | void backward_kernel(const ParamType<Dtype> *param, int pad_x, int pad_y...

FILE: lib/cpp/connectal_conv.h
  type CPtr (line 29) | typedef unsigned long CPtr;
  function class (line 30) | class ParamStruct {
  function class (line 83) | class ConnectalMemory {
  function init_connectal_conv_library (line 132) | void init_connectal_conv_library()
  function to_cpu (line 169) | inline void ConnectalMemory::to_cpu() {
  function set_cpu_data (line 187) | void ConnectalMemory::set_cpu_data(void* data) {

FILE: lib/cpp/edid.h
  type edid (line 24) | struct edid {
  function parseEdid (line 46) | static void parseEdid(struct edid &edid)

FILE: lib/cpp/i2chdmi.h
  function i2c_write_array (line 32) | static int i2c_write_array(int fd, int device, unsigned char *datap, int...
  function i2c_read_reg (line 57) | unsigned char i2c_read_reg(int fd, int device, unsigned char reg)
  function i2c_hdmi_start (line 139) | void i2c_hdmi_start(void)
  function init_i2c_hdmi_rgb24 (line 161) | void init_i2c_hdmi_rgb24(void)

FILE: lib/cpp/printfInd.h
  function class (line 22) | class DisplayInd : public DisplayIndWrapper

FILE: lib/cpp/userReference.h
  type RegionRef (line 39) | typedef struct {
  function send_reference_to_portal (line 44) | int send_reference_to_portal(PortalInternal *device, int numEntries, Reg...

FILE: lib/deprecated/pcietestbench/testpcie.cpp
  class PcieTestBenchIndication (line 15) | class PcieTestBenchIndication : public PcieTestBenchIndicationWrapper
    method incr_cnt (line 20) | void incr_cnt(){
    method tlpout (line 24) | void tlpout(const TLPData16 &tlp) {
    method PcieTestBenchIndication (line 28) | PcieTestBenchIndication(unsigned int id) : PcieTestBenchIndicationWrap...
    method wait (line 32) | void wait() {
  function main (line 39) | int main(int argc, const char **argv)

FILE: lib/deprecated/pcietestbench_dma_io/testpcie.cpp
  function scan_int (line 19) | uint32_t scan_int(const char *str)
  type PktClass (line 26) | enum PktClass {trace, MCont, SCont, MResp, SWReq, SReq, SResp, MWReq, MR...
  function PktClass (line 28) | PktClass pktClassification(uint32_t tlpsof, uint32_t tlpeof, uint32_t tl...
  class PcieTestBenchIndication (line 58) | class PcieTestBenchIndication : public PcieTestBenchIndicationWrapper
    method finished (line 61) | virtual void finished(uint32_t v){
    method started (line 65) | virtual void started(uint32_t words){
    method tlpout (line 68) | void tlpout(const TsTLPData16 &tlp) {
    method PcieTestBenchIndication (line 73) | PcieTestBenchIndication(unsigned int id) : PcieTestBenchIndicationWrap...
  function main (line 78) | int main(int argc, const char **argv)

FILE: lib/deprecated/pcietestbench_dma_oo/testpcie.cpp
  function scan_int (line 20) | uint32_t scan_int(const char *str)
  type PktClass (line 27) | enum PktClass {trace, MCont, SCont, MResp, SWReq, SReq, SResp, MWReq, MR...
  function PktClass (line 29) | PktClass pktClassification(uint32_t tlpsof, uint32_t tlpeof, uint32_t tl...
  class PcieTestBenchIndication (line 59) | class PcieTestBenchIndication : public PcieTestBenchIndicationWrapper
    method finished (line 62) | virtual void finished(uint32_t v){
    method started (line 66) | virtual void started(uint32_t words){
    method tlpout (line 69) | void tlpout(const TsTLPData16 &tlp) {
    method PcieTestBenchIndication (line 74) | PcieTestBenchIndication(unsigned int id) : PcieTestBenchIndicationWrap...
  function main (line 79) | int main(int argc, const char **argv)

FILE: lib/matmul/cpp/cuda.cpp
  function cuda_test (line 30) | void cuda_test()
  function cuda_mm (line 77) | long int cuda_mm(cv::Mat& src1, cv::Mat& src2, cv::Mat& dst)

FILE: lib/matmul/cpp/portalmat.cpp
  type arrayInfo (line 36) | struct arrayInfo
  type arrayInfo (line 51) | struct arrayInfo
  type arrayInfo (line 51) | struct arrayInfo
  type arrayInfo (line 58) | struct arrayInfo
  type arrayInfo (line 63) | struct arrayInfo
  type arrayInfo (line 63) | struct arrayInfo
  type arrayInfo (line 75) | struct arrayInfo
  type arrayInfo (line 75) | struct arrayInfo
  function PortalMat (line 131) | PortalMat& PortalMat::operator = (const cv::MatExpr& expr)
  function PortalMat (line 138) | PortalMat& PortalMat::operator = (const cv::Mat& o)
  function dumpMatF (line 354) | void dumpMatF(const char *prefix, const char *fmt, const cv::Mat &mat, F...
  function dumpMatOctave (line 369) | void dumpMatOctave(const char *name, const char *fmt, const cv::Mat &mat...
  function dumpMat (line 387) | void dumpMat(const char *prefix, const char *fmt, const cv::Mat &mat)
  function dynamicRange (line 395) | void dynamicRange(cv::Mat mat, int *pmin_exp, int *pmax_exp, float *pmin...

FILE: lib/matmul/cpp/portalmat.h
  function class (line 53) | class PortalMatAllocator : public cv::MatAllocator {
  function class (line 78) | class PortalMat : public cv::Mat {
  function class (line 98) | class MmIndication : public MmIndicationWrapper
  function class (line 126) | class TimerIndication : public TimerIndicationWrapper

FILE: lib/nandsim/cpp/nandsim.h
  function wait_for_connect_nandsim_exe (line 25) | void wait_for_connect_nandsim_exe()
  function read_from_nandsim_exe (line 57) | unsigned int read_from_nandsim_exe()
  function connect_to_algo_exe (line 67) | void connect_to_algo_exe(void)
  function write_to_algo_exe (line 94) | void write_to_algo_exe(unsigned int x)

FILE: lib/nvme/cpp/nvme.cpp
  class NvmeTrace (line 10) | class NvmeTrace : public NvmeTraceWrapper {
    method traceDmaRequest (line 13) | void traceDmaRequest(const DmaChannel chan, const int write, const uin...
    method traceDmaData (line 18) | void traceDmaData ( const DmaChannel chan, const int write, const bsvv...
    method traceDmaDone (line 29) | virtual void traceDmaDone ( const DmaChannel chan, const uint8_t tag, ...
    method traceData (line 34) | void traceData ( const bsvvector_Luint32_t_L4 data, const int last, co...
    method dumpTrace (line 44) | void dumpTrace() {
    method NvmeTrace (line 54) | NvmeTrace(int id, PortalPoller *poller = 0) : NvmeTraceWrapper(id, pol...
  class NvmeIndication (line 58) | class NvmeIndication : public NvmeIndicationWrapper {
    method msgIn (line 69) | virtual void msgIn ( const uint32_t value ) {
    method transferCompleted (line 72) | virtual void transferCompleted ( const uint16_t requestId, const uint6...
    method msgToSoftware (line 80) | virtual void msgToSoftware ( const uint32_t msg, uint8_t last ) {
    method messageToSoftware (line 89) | bool messageToSoftware(uint32_t *msg, bool *last, bool nonBlocking=tru...
    method wait (line 110) | void wait() {
    method NvmeIndication (line 113) | NvmeIndication(int id, PortalPoller *poller = 0) : NvmeIndicationWrapp...
  class NvmeDriverIndication (line 121) | class NvmeDriverIndication : public NvmeDriverIndicationWrapper {
    method setupDone (line 128) | virtual void setupDone (  ) {
    method readDone (line 133) | virtual void readDone ( const uint64_t data ) {
    method writeDone (line 138) | virtual void writeDone (  ) {
    method status (line 142) | virtual void status ( const uint8_t mmcm_lock, const uint32_t counter ) {
    method setupComplete (line 146) | virtual void setupComplete() {
    method strstrLoc (line 150) | virtual void strstrLoc ( const uint32_t loc ) {
    method transferCompleted (line 154) | virtual void transferCompleted ( const uint16_t requestId, const uint6...
    method wait (line 162) | void wait() {
    method waitwrite (line 165) | void waitwrite() {
    method NvmeDriverIndication (line 169) | NvmeDriverIndication(int id, PortalPoller *poller = 0) : NvmeDriverInd...
  class MemServerPortalIndication (line 176) | class MemServerPortalIndication : public MemServerPortalIndicationWrapper {
    method MemServerPortalIndication (line 181) | MemServerPortalIndication(int id, PortalPoller *poller = 0)
    method readDone (line 186) | virtual void readDone ( const uint64_t data ) {
    method writeDone (line 190) | virtual void writeDone (  ) {
    method wait (line 193) | void wait() {
    method waitw (line 196) | void waitw() {

FILE: lib/nvme/cpp/nvme.h
  type nvme_admin_opcode (line 21) | enum nvme_admin_opcode {
  type nvme_io_opcode (line 28) | enum nvme_io_opcode {
  type nvme_admin_cmd (line 42) | struct nvme_admin_cmd {
  type nvme_io_cmd (line 60) | struct nvme_io_cmd {
  type nvme_completion (line 77) | struct nvme_completion {
  type sgl_data_block_descriptor (line 84) | struct sgl_data_block_descriptor {
  type FeatureId (line 91) | enum FeatureId {
  function class (line 100) | class Nvme {

FILE: lib/qemu/fpgadev.cpp
  function sem_wait_with_timeout (line 35) | void sem_wait_with_timeout(sem_t *sem)
  class MemServerPortalResponse (line 58) | class MemServerPortalResponse : public MemServerPortalResponseWrapper
    method wait (line 66) | void wait() {
    method read32Done (line 70) | void read32Done ( const uint32_t value ) {
    method read64Done (line 76) | void read64Done ( const uint64_t value ) {
    method writeDone (line 82) | void writeDone (  ) {
    method MemServerPortalResponse (line 87) | MemServerPortalResponse(unsigned int id, IrqCallback callback=0) : Mem...
  class QemuAccelIndication (line 92) | class QemuAccelIndication : public QemuAccelIndicationWrapper {
    method QemuAccelIndication (line 96) | QemuAccelIndication(int id, PortalPoller *poller = 0) : QemuAccelIndic...
    method started (line 100) | virtual void started (  ) {
    method wait (line 102) | virtual void wait() {
  class SerialIndication (line 107) | class SerialIndication : public SerialIndicationWrapper {
    method SerialIndication (line 110) | SerialIndication(int id, PortalPoller *poller = 0) : SerialIndicationW...
    method rx (line 113) | virtual void rx (const uint8_t ch) {
  class BlockDevRequest (line 118) | class BlockDevRequest
    method BlockDevRequest (line 132) | BlockDevRequest(FpgaDev *fpgaDev, BlockDevResponseProxy *response, int...
  class BlockDevRequest (line 120) | class BlockDevRequest : public BlockDevRequestWrapper {
    method BlockDevRequest (line 132) | BlockDevRequest(FpgaDev *fpgaDev, BlockDevResponseProxy *response, int...
  class spikehw_device_t (line 332) | class spikehw_device_t : public abstract_device_t {
  function abstract_device_t (line 371) | abstract_device_t *spikehw_device_t::make_device()
  class spikeflash_device_t (line 377) | class spikeflash_device_t : public abstract_device_t {
  function abstract_device_t (line 424) | abstract_device_t *spikeflash_device_t::make_device()
  class devicetree_device_t (line 430) | class devicetree_device_t : public abstract_device_t {
  type stat (line 445) | struct stat
  function abstract_device_t (line 475) | abstract_device_t *devicetree_device_t::make_device()
  type FpgaOps (line 490) | struct FpgaOps {
  function fpga_read (line 497) | uint64_t fpga_read(uint64_t addr)
  function fpga_write (line 503) | void fpga_write(uint64_t addr, uint64_t value)
  function fpga_close (line 508) | void fpga_close()
  type FpgaOps (line 521) | struct FpgaOps
  type FpgaOps (line 521) | struct FpgaOps
  type FpgaOps (line 521) | struct FpgaOps

FILE: lib/qemu/fpgadev.h
  function class (line 18) | class FpgaDev {

FILE: lib/rbm/cpp/mnist.h
  function class (line 35) | class MnistImageFile {
  function open (line 45) | void open() {

FILE: lib/rbm/cpp/rbm.cpp
  function sigmoid (line 29) | float sigmoid(float x)
  function configureSigmoidTable (line 38) | void configureSigmoidTable()
  function printDynamicRange (line 141) | void printDynamicRange(const char *label, cv::Mat m)
  function sumOfErrorSquared (line 151) | float sumOfErrorSquared(cv::Mat &a, cv::Mat &b)

FILE: lib/rbm/cpp/rbm.h
  function class (line 37) | class RbmIndication : public RbmIndicationWrapper
  function virtual (line 47) | virtual void toBramDone() {
  function virtual (line 51) | virtual void fromBramDone() {
  function virtual (line 55) | virtual void statesDone() {
  function virtual (line 59) | virtual void updateWeightsDone() {
  function virtual (line 63) | virtual void sumOfErrorSquared(uint32_t x) {
  function virtual (line 68) | virtual void sumOfErrorSquaredDebug(uint32_t macCount) {
  function virtual (line 71) | virtual void dbg(uint32_t a, uint32_t b, uint32_t c, uint32_t d) {
  function class (line 77) | class SigmoidIndication : public SigmoidIndicationWrapper
  function virtual (line 87) | virtual void tableUpdated(uint32_t addr) {
  function tableSize (line 90) | uint32_t tableSize() { return tableSize_; }
  function virtual (line 91) | virtual void tableSize(uint32_t size) {
  function class (line 105) | class RBM {
  function class (line 114) | class RbmMat : public PortalMat {

FILE: lib/regexp/cpp/regexp_utils.h
  type P (line 33) | typedef struct P {
  function class (line 48) | class RegexpIndication : public RegexpIndicationWrapper
  function readfile (line 81) | int readfile(const char *fname, P* pP)
  function sw_ref (line 102) | int sw_ref(P *haystack, P *charMap, P *stateMap, P *stateTransitions)

FILE: lib/strstr/cpp/mp.h
  function compute_borders (line 66) | void compute_borders(const char *x, int *border, int m)
  type MP (line 77) | struct MP {
  function compute_MP_next (line 83) | void compute_MP_next(const char *x, struct MP *MP_next, int m)
  function MP (line 95) | void MP(const char *x, const char *t, struct MP *MP_next, int m, int n, ...

FILE: lib/strstr/cpp/strstr.h
  function class (line 23) | class StrstrIndication : public StrstrIndicationWrapper
  function virtual (line 30) | virtual void setupComplete() {
  function virtual (line 34) | virtual void searchResult (int v){
  function wait (line 41) | void wait() {

FILE: lib/zedboard_robot/cpp/read_buffer.h
  function class (line 23) | class reader

FILE: pcie/tlp.py
  function emit_vcd_header (line 108) | def emit_vcd_header(f):
  function emit_vcd_entry (line 114) | def emit_vcd_entry(f, timestamp, pktclass):
  function pktClassification (line 141) | def pktClassification(tlpsof, tlpeof, tlpbe, pktformat, pkttype, portnum):
  function print_tlp (line 171) | def print_tlp(tlpdata, f=None):
  function print_tlp_log (line 266) | def print_tlp_log(tlplog, f=None):

FILE: scripts/AST.py
  class InterfaceMixin (line 40) | class InterfaceMixin:
    method getSubinterface (line 41) | def getSubinterface(self, name):
    method parentClass (line 48) | def parentClass(self, default):
  function dtInfo (line 52) | def dtInfo(arg):
  function piInfo (line 72) | def piInfo(pitem):
  function declInfo (line 80) | def declInfo(mitem):
  function classInfo (line 88) | def classInfo(item):
  function serialize_json (line 98) | def serialize_json(interfaces, globalimports, bsvdefines):
  class Method (line 134) | class Method:
    method __init__ (line 135) | def __init__(self, name, return_type, params):
    method __repr__ (line 140) | def __repr__(self):
    method instantiate (line 143) | def instantiate(self, paramBindings):
  class Function (line 149) | class Function:
    method __init__ (line 150) | def __init__(self, name, return_type, params):
    method __repr__ (line 155) | def __repr__(self):
  class Variable (line 161) | class Variable:
    method __init__ (line 162) | def __init__(self, name, t, value):
    method __repr__ (line 169) | def __repr__(self):
  class Interface (line 172) | class Interface(InterfaceMixin):
    method __init__ (line 173) | def __init__(self, name, params, decls, subinterfacename, packagename):
    method interfaceType (line 181) | def interfaceType(self):
    method __repr__ (line 183) | def __repr__(self):
    method instantiate (line 185) | def instantiate(self, paramBindings):
  class Typeclass (line 193) | class Typeclass:
    method __init__ (line 194) | def __init__(self, name):
    method __repr__ (line 197) | def __repr__(self):
  class TypeclassInstance (line 200) | class TypeclassInstance:
    method __init__ (line 201) | def __init__(self, name, params, provisos, decl):
    method __repr__ (line 207) | def __repr__(self):
  class Module (line 210) | class Module:
    method __init__ (line 211) | def __init__(self, moduleContext, name, params, interface, provisos, d...
    method __repr__ (line 219) | def __repr__(self):
  class EnumElement (line 222) | class EnumElement:
    method __init__ (line 223) | def __init__(self, name, qualifiers, value):
    method __repr__ (line 226) | def __repr__(self):
  class Enum (line 229) | class Enum:
    method __init__ (line 230) | def __init__(self, elements):
    method __repr__ (line 233) | def __repr__(self):
    method instantiate (line 235) | def instantiate(self, paramBindings):
  class StructMember (line 238) | class StructMember:
    method __init__ (line 239) | def __init__(self, t, name):
    method __repr__ (line 242) | def __repr__(self):
    method instantiate (line 244) | def instantiate(self, paramBindings):
  class Struct (line 247) | class Struct:
    method __init__ (line 248) | def __init__(self, elements):
    method __repr__ (line 251) | def __repr__(self):
    method instantiate (line 253) | def instantiate(self, paramBindings):
  class TypeDef (line 256) | class TypeDef:
    method __init__ (line 257) | def __init__(self, tdtype, name, params):
    method __repr__ (line 265) | def __repr__(self):
  class Param (line 268) | class Param:
    method __init__ (line 269) | def __init__(self, name, t):
    method __repr__ (line 272) | def __repr__(self):
    method instantiate (line 274) | def instantiate(self, paramBindings):
  class Type (line 278) | class Type:
    method __init__ (line 279) | def __init__(self, name, params):
    method __repr__ (line 286) | def __repr__(self):
    method instantiate (line 289) | def instantiate(self, paramBindings):

FILE: scripts/adb/adb_commands.py
  class M2CryptoSigner (line 56) | class M2CryptoSigner(adb_protocol.AuthSigner):
    method __init__ (line 59) | def __init__(self, rsa_key_path):
    method Sign (line 65) | def Sign(self, data):
    method GetPublicKey (line 68) | def GetPublicKey(self):
  class AdbCommands (line 74) | class AdbCommands(object):
    method ConnectDevice (line 83) | def ConnectDevice(
    method __init__ (line 103) | def __init__(self, handle, device_state):
    method usb_handle (line 108) | def usb_handle(self):
    method Close (line 111) | def Close(self):
    method Connect (line 115) | def Connect(cls, usb, banner=None, **kwargs):
    method Devices (line 134) | def Devices(cls):
    method GetState (line 138) | def GetState(self):
    method Install (line 141) | def Install(self, apk_path, destination_dir=None, timeout_ms=None):
    method Push (line 164) | def Push(self, source_file, device_filename, mtime='0', timeout_ms=None):
    method Pull (line 182) | def Pull(self, device_filename, dest_file=None, timeout_ms=None):
    method Stat (line 212) | def Stat(self, device_filename):
    method List (line 220) | def List(self, device_path):
    method Reboot (line 227) | def Reboot(self, destination=''):
    method RebootBootloader (line 231) | def RebootBootloader(self):
    method Remount (line 235) | def Remount(self):
    method Root (line 239) | def Root(self):
    method Shell (line 243) | def Shell(self, command, timeout_ms=None):
    method StreamingShell (line 249) | def StreamingShell(self, command, timeout_ms=None):
    method Logcat (line 263) | def Logcat(self, options, timeout_ms=None):

FILE: scripts/adb/adb_debug.py
  function GetRSAKwargs (line 39) | def GetRSAKwargs():
  function main (line 52) | def main(argv):

FILE: scripts/adb/adb_protocol.py
  class InvalidCommandError (line 37) | class InvalidCommandError(Exception):
    method __init__ (line 40) | def __init__(self, message, response_header, response_data):
  class InvalidResponseError (line 47) | class InvalidResponseError(Exception):
  class InvalidChecksumError (line 51) | class InvalidChecksumError(Exception):
  class InterleavedDataError (line 55) | class InterleavedDataError(Exception):
  function MakeWireIDs (line 59) | def MakeWireIDs(ids):
  class AuthSigner (line 68) | class AuthSigner(object):
    method Sign (line 71) | def Sign(self, data):
    method GetPublicKey (line 75) | def GetPublicKey(self):
  class _AdbConnection (line 80) | class _AdbConnection(object):
    method __init__ (line 83) | def __init__(self, usb, local_id, remote_id, timeout_ms):
    method _Send (line 89) | def _Send(self, command, arg0, arg1, data=''):
    method Write (line 93) | def Write(self, data):
    method Okay (line 107) | def Okay(self):
    method ReadUntil (line 110) | def ReadUntil(self, *expected_cmds):
    method ReadUntilClose (line 125) | def ReadUntilClose(self):
    method Close (line 140) | def Close(self):
  class AdbMessage (line 150) | class AdbMessage(object):
    method __init__ (line 173) | def __init__(self, command=None, arg0=None, arg1=None, data=''):
    method checksum (line 181) | def checksum(self):
    method CalculateChecksum (line 185) | def CalculateChecksum(data):
    method Pack (line 189) | def Pack(self):
    method Unpack (line 195) | def Unpack(cls, message):
    method Send (line 203) | def Send(self, usb, timeout_ms=None):
    method Read (line 209) | def Read(cls, usb, expected_cmds, timeout_ms=None, total_timeout_ms=No...
    method Connect (line 243) | def Connect(cls, usb, banner='notadb', rsa_keys=None, auth_timeout_ms=...
    method Open (line 312) | def Open(cls, usb, destination, timeout_ms=None):
    method Command (line 348) | def Command(cls, usb, service, command='', timeout_ms=None):
    method StreamingCommand (line 371) | def StreamingCommand(cls, usb, service, command='', timeout_ms=None):

FILE: scripts/adb/adb_test.py
  class BaseAdbTest (line 33) | class BaseAdbTest(unittest.TestCase):
    method _ExpectWrite (line 36) | def _ExpectWrite(cls, usb, command, arg0, arg1, data):
    method _ExpectRead (line 43) | def _ExpectRead(cls, usb, command, arg0, arg1, data=''):
    method _ConvertCommand (line 51) | def _ConvertCommand(cls, command):
    method _MakeHeader (line 55) | def _MakeHeader(cls, command, arg0, arg1, data):
    method _ExpectConnection (line 62) | def _ExpectConnection(cls, usb):
    method _ExpectOpen (line 67) | def _ExpectOpen(cls, usb, service):
    method _ExpectClose (line 72) | def _ExpectClose(cls, usb):
    method _Connect (line 77) | def _Connect(cls, usb):
  class AdbTest (line 81) | class AdbTest(BaseAdbTest):
    method _ExpectCommand (line 84) | def _ExpectCommand(cls, service, command, *responses):
    method testConnect (line 94) | def testConnect(self):
    method testSmallResponseShell (line 100) | def testSmallResponseShell(self):
    method testBigResponseShell (line 108) | def testBigResponseShell(self):
    method testReboot (line 119) | def testReboot(self):
    method testRebootBootloader (line 124) | def testRebootBootloader(self):
    method testRemount (line 129) | def testRemount(self):
    method testRoot (line 134) | def testRoot(self):
  class FilesyncAdbTest (line 140) | class FilesyncAdbTest(BaseAdbTest):
    method _MakeSyncHeader (line 143) | def _MakeSyncHeader(cls, command, *int_parts):
    method _MakeWriteSyncPacket (line 148) | def _MakeWriteSyncPacket(cls, command, data='', size=None):
    method _ExpectSyncCommand (line 152) | def _ExpectSyncCommand(cls, write_commands, read_commands):
    method testPush (line 169) | def testPush(self):
    method testPull (line 184) | def testPull(self):

FILE: scripts/adb/common.py
  function GetInterface (line 39) | def GetInterface(setting):
  function InterfaceMatcher (line 44) | def InterfaceMatcher(clazz, subclass, protocol):
  class UsbHandle (line 54) | class UsbHandle(object):
    method __init__ (line 69) | def __init__(self, device, setting, usb_info=None, timeout_ms=None):
    method usb_info (line 86) | def usb_info(self):
    method Open (line 95) | def Open(self):
    method serial_number (line 138) | def serial_number(self):
    method port_path (line 142) | def port_path(self):
    method Close (line 145) | def Close(self):
    method Timeout (line 157) | def Timeout(self, timeout_ms):
    method FlushBuffers (line 160) | def FlushBuffers(self):
    method BulkWrite (line 169) | def BulkWrite(self, data, timeout_ms=None):
    method BulkRead (line 182) | def BulkRead(self, length, timeout_ms=None):
    method PortPathMatcher (line 195) | def PortPathMatcher(cls, port_path):
    method SerialMatcher (line 203) | def SerialMatcher(cls, serial):
    method FindAndOpen (line 208) | def FindAndOpen(cls, setting_matcher,
    method Find (line 218) | def Find(cls, setting_matcher, port_path=None, serial=None, timeout_ms...
    method FindFirst (line 233) | def FindFirst(cls, setting_matcher, device_matcher=None, **kwargs):
    method FindDevices (line 255) | def FindDevices(cls, setting_matcher, device_matcher=None,
  class TcpHandle (line 282) | class TcpHandle(object):
    method __init__ (line 287) | def __init__(self, serial):
    method BulkWrite (line 302) | def BulkWrite(self, data, timeout=None):
    method BulkRead (line 305) | def BulkRead(self, numbytes, timeout=None):
    method Timeout (line 308) | def Timeout(self, timeout_ms):
    method Close (line 311) | def Close(self):

FILE: scripts/adb/common_cli.py
  function Uncamelcase (line 55) | def Uncamelcase(name):
  function Camelcase (line 60) | def Camelcase(name):
  function Usage (line 64) | def Usage(adb_dev):
  function StartCli (line 89) | def StartCli(argv, device_callback, kwarg_callback=None, list_callback=N...

FILE: scripts/adb/common_stub.py
  function _Dotify (line 9) | def _Dotify(data):
  class StubUsb (line 13) | class StubUsb(object):
    method __init__ (line 16) | def __init__(self):
    method BulkWrite (line 21) | def BulkWrite(self, data, unused_timeout_ms=None):
    method BulkRead (line 27) | def BulkRead(self, length,
    method ExpectWrite (line 36) | def ExpectWrite(self, data):
    method ExpectRead (line 39) | def ExpectRead(self, data):
    method Timeout (line 42) | def Timeout(self, timeout_ms):

FILE: scripts/adb/fastboot.py
  class FastbootTransferError (line 60) | class FastbootTransferError(usb_exceptions.FormatMessageWithArgumentsExc...
  class FastbootRemoteFailure (line 64) | class FastbootRemoteFailure(usb_exceptions.FormatMessageWithArgumentsExc...
  class FastbootStateMismatch (line 68) | class FastbootStateMismatch(usb_exceptions.FormatMessageWithArgumentsExc...
  class FastbootInvalidResponse (line 72) | class FastbootInvalidResponse(
  class FastbootProtocol (line 77) | class FastbootProtocol(object):
    method __init__ (line 81) | def __init__(self, usb):
    method usb_handle (line 90) | def usb_handle(self):
    method SendCommand (line 93) | def SendCommand(self, command, arg=None):
    method HandleSimpleResponses (line 104) | def HandleSimpleResponses(
    method HandleDataSending (line 117) | def HandleDataSending(self, source_file, source_len,
    method _AcceptResponses (line 151) | def _AcceptResponses(self, expected_header, info_cb, timeout_ms=None):
    method _HandleProgress (line 188) | def _HandleProgress(self, total, progress_callback):
    method _Write (line 200) | def _Write(self, data, length, progress_callback=None):
  class FastbootCommands (line 214) | class FastbootCommands(object):
    method __init__ (line 218) | def __init__(self, usb):
    method usb_handle (line 228) | def usb_handle(self):
    method Close (line 231) | def Close(self):
    method ConnectDevice (line 235) | def ConnectDevice(
    method Devices (line 244) | def Devices(cls):
    method _SimpleCommand (line 248) | def _SimpleCommand(self, command, arg=None, **kwargs):
    method FlashFromFile (line 252) | def FlashFromFile(self, partition, source_file, source_len=0,
    method Download (line 275) | def Download(self, source_file, source_len=0,
    method Flash (line 307) | def Flash(self, partition, timeout_ms=0, info_cb=DEFAULT_MESSAGE_CALLB...
    method Erase (line 321) | def Erase(self, partition, timeout_ms=None):
    method Getvar (line 325) | def Getvar(self, var, info_cb=DEFAULT_MESSAGE_CALLBACK):
    method Oem (line 336) | def Oem(self, command, timeout_ms=None, info_cb=DEFAULT_MESSAGE_CALLBA...
    method Continue (line 349) | def Continue(self):
    method Reboot (line 353) | def Reboot(self, target_mode=None, timeout_ms=None):
    method RebootBootloader (line 365) | def RebootBootloader(self, timeout_ms=None):

FILE: scripts/adb/fastboot_debug.py
  function KwargHandler (line 32) | def KwargHandler(kwargs, argspec):
  function main (line 53) | def main(argv):

FILE: scripts/adb/fastboot_test.py
  class FastbootTest (line 31) | class FastbootTest(unittest.TestCase):
    method setUp (line 33) | def setUp(self):
    method _SumLengths (line 37) | def _SumLengths(items):
    method ExpectDownload (line 40) | def ExpectDownload(self, writes, succeed=True, accept_data=True):
    method ExpectFlash (line 56) | def ExpectFlash(self, partition, succeed=True):
    method testDownload (line 64) | def testDownload(self):
    method testDownloadFail (line 74) | def testDownloadFail(self):
    method testFlash (line 88) | def testFlash(self):
    method testFlashFail (line 102) | def testFlashFail(self):
    method testFlashFromFile (line 111) | def testFlashFromFile(self):
    method testSimplerCommands (line 136) | def testSimplerCommands(self):
    method testVariousFailures (line 163) | def testVariousFailures(self):

FILE: scripts/adb/filesync_protocol.py
  class InvalidChecksumError (line 34) | class InvalidChecksumError(Exception):
  class InterleavedDataError (line 38) | class InterleavedDataError(Exception):
  class PushFailedError (line 42) | class PushFailedError(Exception):
  class FilesyncProtocol (line 50) | class FilesyncProtocol(object):
    method Stat (line 54) | def Stat(connection, filename):
    method List (line 65) | def List(cls, connection, path):
    method Pull (line 77) | def Pull(cls, connection, filename, dest_file):
    method Push (line 87) | def Push(cls, connection, datafile, filename,
  class FileSyncConnection (line 123) | class FileSyncConnection(object):
    method __init__ (line 132) | def __init__(self, adb_connection, recv_header_format):
    method Send (line 144) | def Send(self, command_id, data='', size=0):
    method Read (line 164) | def Read(self, expected_ids, read_data=True):
    method ReadUntil (line 189) | def ReadUntil(self, expected_ids, *finish_ids):
    method _CanAddToSendBuffer (line 197) | def _CanAddToSendBuffer(self, data_len):
    method _Flush (line 201) | def _Flush(self):
    method _ReadBuffered (line 205) | def _ReadBuffered(self, size):

FILE: scripts/adb/usb_exceptions.py
  class CommonUsbError (line 17) | class CommonUsbError(Exception):
  class FormatMessageWithArgumentsException (line 21) | class FormatMessageWithArgumentsException(CommonUsbError):
    method __init__ (line 30) | def __init__(self, message, *args):
  class DeviceNotFoundError (line 35) | class DeviceNotFoundError(FormatMessageWithArgumentsException):
  class DeviceAuthError (line 39) | class DeviceAuthError(FormatMessageWithArgumentsException):
  class LibusbWrappingError (line 43) | class LibusbWrappingError(CommonUsbError):
    method __init__ (line 50) | def __init__(self, msg, usb_error):
    method __str__ (line 54) | def __str__(self):
  class WriteFailedError (line 59) | class WriteFailedError(LibusbWrappingError):
  class ReadFailedError (line 63) | class ReadFailedError(LibusbWrappingError):
  class AdbCommandFailureException (line 67) | class AdbCommandFailureException(Exception):
  class AdbOperationException (line 71) | class AdbOperationException(Exception):

FILE: scripts/boardinfo.py
  function attribute (line 29) | def attribute(boardname, name):

FILE: scripts/bsvdependencies.py
  function getBsvPackages (line 30) | def getBsvPackages(bluespecdir):
  function bsvDependencies (line 40) | def bsvDependencies(bsvfile, allBsv=False, bluespecdir=None, argbsvpath=...

FILE: scripts/bsvgen.py
  function toBsvType (line 356) | def toBsvType(titem, oitem):
  function collectElements (line 366) | def collectElements(mlist, workerfn, name):
  function fixupSubsts (line 393) | def fixupSubsts(item, suffix):
  function indent (line 438) | def indent(f, indentation):
  function bemitStructMember (line 442) | def bemitStructMember(item, f, indentation):
  function bemitStruct (line 451) | def bemitStruct(item, name, f, indentation):
  function bemitType (line 464) | def bemitType(item, name, f, indentation):
  function bemitEnum (line 482) | def bemitEnum(item, name, f, indentation):
  function emitBDef (line 495) | def emitBDef(item, generated_hpp, indentation):
  function generate_bsv (line 510) | def generate_bsv(project_dir, noisyFlag, aGenDef, jsondata):

FILE: scripts/bsvpreprocess.py
  function preprocess (line 36) | def preprocess(sourcefilename, source, defs, bsvpath):

FILE: scripts/cppgen.py
  function indent (line 219) | def indent(f, indentation):
  function cName (line 223) | def cName(x):
  class paramInfo (line 231) | class paramInfo:
    method __init__ (line 232) | def __init__(self, name, width, shifted, datatype, assignOp):
  function collectMembers (line 240) | def collectMembers(scope, pitem):
  function typeNumeric (line 272) | def typeNumeric(item):
  function typeCName (line 305) | def typeCName(item):
  function signCName (line 367) | def signCName(item):
  function typeJson (line 381) | def typeJson(item):
  function hasBitWidth (line 388) | def hasBitWidth(item):
  function getNumeric (line 391) | def getNumeric(item):
  function typeBitWidth (line 418) | def typeBitWidth(item):
  function accumWords (line 456) | def accumWords(s, pro, memberList):
  function generate_marshall (line 481) | def generate_marshall(pfmt, argWords):
  function generate_demarshall (line 513) | def generate_demarshall(fmt, methodName, argWords):
  function formalParameters (line 554) | def formalParameters(params, insertPortal):
  function genToJson (line 561) | def genToJson(var, name, prefix, ptype, appendto=False):
  function gatherMethodInfo (line 615) | def gatherMethodInfo(mname, params, itemname, classNameOrig, classVariant):
  function emitMethodDeclaration (line 693) | def emitMethodDeclaration(mname, params, f, className, methodIndex, retu...
  function generate_class (line 729) | def generate_class(classNameOrig, classVariant, declList, generatedCFile...
  function emitStructMember (line 889) | def emitStructMember(item, f, indentation):
  function emitStruct (line 898) | def emitStruct(item, name, f, indentation):
  function emitType (line 911) | def emitType(item, name, f, indentation):
  function convertVerilogNumber (line 929) | def convertVerilogNumber(n):
  function emitEnum (line 942) | def emitEnum(item, name, f, indentation):
  function emitCD (line 959) | def emitCD(item, generated_hpp, indentation):
  function generate_cpp (line 974) | def generate_cpp(project_dir, noisyFlag, jsondata):

FILE: scripts/discover_icmp.py
  function connect_with_adb (line 40) | def connect_with_adb(ipaddr):
  function calcsum (line 58) | def calcsum(source_string):
  function receive_ping (line 67) | def receive_ping(timeout):
  function send_ping (line 90) | def send_ping(dest_addr):
  function check_adb_port (line 105) | def check_adb_port(dest_addr):
  function ping_request (line 111) | def ping_request(dest_addr):
  function ping_response (line 117) | def ping_response(timeout = 0.1):
  function ip2int (line 125) | def ip2int(addr):
  function int2ip (line 128) | def int2ip(addr):
  function send_pings (line 131) | def send_pings():
  function get_pings (line 135) | def get_pings():
  function do_work (line 139) | def do_work(start, end):
  function detect_network (line 187) | def detect_network():

FILE: scripts/discover_tcp.py
  function ip2int (line 42) | def ip2int(addr):
  function int2ip (line 45) | def int2ip(addr):
  function connect_with_adb (line 48) | def connect_with_adb(ipaddr,port):
  function open_adb_socket (line 71) | def open_adb_socket(dest_addr,port):
  function do_work_poll (line 78) | def do_work_poll(start, end, port, get_hostname):
  function do_work_kqueue (line 120) | def do_work_kqueue(start, end, port, get_hostname):
  function do_work (line 165) | def do_work(start,end,port,get_hostname):
  function detect_network (line 171) | def detect_network(network=None, port=5555, get_hostname=True):

FILE: scripts/generate-constraints.py
  function newArgparser (line 35) | def newArgparser():

FILE: scripts/globalv.py
  function add_new (line 6) | def add_new(decl):

FILE: scripts/packagesource.py
  function find (line 27) | def find(name, path):
  function getBsvPackages (line 32) | def getBsvPackages(bluespecdir):
  function expandPackages (line 44) | def expandPackages(bsvfile):

FILE: scripts/portal.py
  class JsonObject (line 30) | class JsonObject:
    method __init__ (line 31) | def __init__(self, d=None, **kwargs):
  function json_object_hook (line 39) | def json_object_hook(d, encoding=None):
  class NativeProxy (line 43) | class NativeProxy:
    method __init__ (line 44) | def __init__(self, interfaceName, handler, responseInterface=None, rpc...
    method callback (line 75) | def callback(self, a):
    method worker (line 87) | def worker(self):
    method __getattr__ (line 91) | def __getattr__(self, name, default=None):

FILE: scripts/portalJson.py
  class portal (line 31) | class portal:
    method __init__ (line 32) | def __init__(self, devaddr, devport):
    method recv (line 36) | def recv(self):
    method send (line 53) | def send(self, d):
    method shutdown (line 58) | def shutdown(self):

FILE: scripts/syntax.py
  function t_error (line 220) | def t_error(t):
  function p_error (line 224) | def p_error(errtoken):
  function t_VAR (line 231) | def t_VAR(t):
  function t_newline (line 238) | def t_newline(t):
  function t_COMMENT (line 242) | def t_COMMENT(t):
  function t_MCOMMENT (line 246) | def t_MCOMMENT(t):
  function p_goal (line 253) | def p_goal(p):
  function p_typeParams (line 257) | def p_typeParams(p):
  function p_type (line 268) | def p_type(p):
  function p_expressions (line 284) | def p_expressions(p):
  function p_colonVar (line 304) | def p_colonVar(p):
  function p_expression (line 308) | def p_expression(p):
  function p_caseExprItem (line 313) | def p_caseExprItem(p):
  function p_caseExprItems (line 316) | def p_caseExprItems(p):
  function p_defaultExprItem (line 320) | def p_defaultExprItem(p):
  function p_caseExpr (line 325) | def p_caseExpr(p):
  function p_binaryExpression (line 329) | def p_binaryExpression(p):
  function p_unaryExpression (line 354) | def p_unaryExpression(p):
  function p_term (line 371) | def p_term(p):
  function p_structInits (line 404) | def p_structInits(p):
  function p_structPatternElements (line 411) | def p_structPatternElements(p):
  function p_pattern (line 415) | def p_pattern(p):
  function p_patterns (line 424) | def p_patterns(p):
  function p_importDecl (line 428) | def p_importDecl(p):
  function p_importDecls (line 434) | def p_importDecls(p):
  function p_exportDecl (line 438) | def p_exportDecl(p):
  function p_exportDecls (line 444) | def p_exportDecls(p):
  function p_interfaceFormalParam (line 448) | def p_interfaceFormalParam(p):
  function p_interfaceFormalParams (line 460) | def p_interfaceFormalParams(p):
  function p_interfaceHashParams (line 468) | def p_interfaceHashParams(p):
  function p_instanceAttributes (line 476) | def p_instanceAttributes(p):
  function p_subinterfaceDecl (line 480) | def p_subinterfaceDecl(p):
  function p_parenthesizedFormalParams (line 494) | def p_parenthesizedFormalParams(p):
  function p_methodDecl (line 503) | def p_methodDecl(p):
  function p_interfaceStmt (line 507) | def p_interfaceStmt(p):
  function p_interfaceStmts (line 512) | def p_interfaceStmts(p):
  function p_interfaceDecl (line 520) | def p_interfaceDecl(p):
  function p_arrayDecl (line 527) | def p_arrayDecl(p):
  function p_varDecl (line 532) | def p_varDecl(p):
  function p_params (line 540) | def p_params(p):
  function p_lvalue (line 544) | def p_lvalue(p):
  function p_varAssign1 (line 553) | def p_varAssign1(p):
  function p_varAssign2 (line 558) | def p_varAssign2(p):
  function p_varAssign3 (line 565) | def p_varAssign3(p):
  function p_varAssign (line 571) | def p_varAssign(p):
  function p_ruleCond (line 576) | def p_ruleCond(p):
  function p_implicitCond (line 579) | def p_implicitCond(p):
  function p_rule (line 583) | def p_rule(p):
  function p_ifStmt (line 587) | def p_ifStmt(p):
  function p_caseItem (line 591) | def p_caseItem(p):
  function p_caseItems (line 594) | def p_caseItems(p):
  function p_defaultItem (line 598) | def p_defaultItem(p):
  function p_caseStmt (line 603) | def p_caseStmt(p):
  function p_forStmt (line 607) | def p_forStmt(p):
  function p_whenStmt (line 610) | def p_whenStmt(p):
  function p_beginStmt (line 613) | def p_beginStmt(p):
  function p_expressionStmt (line 616) | def p_expressionStmt(p):
  function p_expressionStmts (line 643) | def p_expressionStmts(p):
  function p_provisos (line 647) | def p_provisos(p):
  function p_endFunction (line 655) | def p_endFunction(p):
  function p_functionBody (line 658) | def p_functionBody(p):
  function p_functionValue (line 661) | def p_functionValue(p):
  function p_functionFormal (line 664) | def p_functionFormal(p):
  function p_functionFormals (line 668) | def p_functionFormals(p):
  function p_fsmStmt (line 672) | def p_fsmStmt(p):
  function p_fsmStmts (line 678) | def p_fsmStmts(p):
  function p_fsmStmtDef (line 682) | def p_fsmStmtDef(p):
  function p_functionDef (line 685) | def p_functionDef(p):
  function p_methodDef (line 697) | def p_methodDef(p):
  function p_methodBody (line 709) | def p_methodBody(p):
  function p_endMethod (line 713) | def p_endMethod(p):
  function p_unionMember (line 716) | def p_unionMember(p):
  function p_subStruct (line 721) | def p_subStruct(p):
  function p_structMembers (line 724) | def p_structMembers(p):
  function p_structMember (line 735) | def p_structMember(p):
  function p_subUnion (line 740) | def p_subUnion(p):
  function p_unionMembers (line 743) | def p_unionMembers(p):
  function p_taggedUnionDef (line 747) | def p_taggedUnionDef(p):
  function p_structDef (line 750) | def p_structDef(p):
  function p_enumRange (line 754) | def p_enumRange(p):
  function p_enumElement (line 760) | def p_enumElement(p):
  function p_enumElements (line 768) | def p_enumElements(p):
  function p_enumDef (line 776) | def p_enumDef(p):
  function p_vardot (line 780) | def p_vardot(p):
  function p_vars (line 788) | def p_vars(p):
  function p_deriving (line 796) | def p_deriving(p):
  function p_macroDef (line 804) | def p_macroDef(p):
  function p_typeDefBody (line 808) | def p_typeDefBody(p):
  function p_typeDef (line 815) | def p_typeDef(p):
  function p_interfaceDef (line 824) | def p_interfaceDef(p):
  function p_formalParam (line 831) | def p_formalParam(p):
  function p_moduleFormalParams (line 836) | def p_moduleFormalParams(p):
  function p_moduleFormalArg (line 850) | def p_moduleFormalArg(p):
  function p_moduleFormalArgs (line 854) | def p_moduleFormalArgs(p):
  function p_moduleParamsArgs (line 863) | def p_moduleParamsArgs(p):
  function p_attrSpec (line 875) | def p_attrSpec(p):
  function p_attrSpecs (line 879) | def p_attrSpecs(p):
  function p_moduleContext (line 883) | def p_moduleContext(p):
  function p_moduleDefHeader (line 889) | def p_moduleDefHeader(p):
  function p_moduleDef (line 893) | def p_moduleDef(p):
  function p_importBviDef (line 899) | def p_importBviDef(p):
  function p_bviModuleDef (line 906) | def p_bviModuleDef(p):
  function p_bviExpressionStmts (line 910) | def p_bviExpressionStmts(p):
  function p_bviExpressionStmt (line 914) | def p_bviExpressionStmt(p):
  function p_schedOp (line 949) | def p_schedOp(p):
  function p_bviInterfaceDef (line 955) | def p_bviInterfaceDef(p):
  function p_bviMethodAttributes (line 960) | def p_bviMethodAttributes(p):
  function p_bviMethodAttribute (line 963) | def p_bviMethodAttribute(p):
  function p_bviMethodDef (line 969) | def p_bviMethodDef(p):
  function p_instanceDeclStmt (line 973) | def p_instanceDeclStmt(p):
  function p_instanceDeclStmts (line 979) | def p_instanceDeclStmts(p):
  function p_instanceDecl (line 984) | def p_instanceDecl(p):
  function p_typeClassDeclStmts (line 988) | def p_typeClassDeclStmts(p):
  function p_typeClassDecl (line 992) | def p_typeClassDecl(p):
  function p_packageStmt (line 999) | def p_packageStmt(p):
  function p_packageStmts (line 1012) | def p_packageStmts(p):
  function p_beginPackage (line 1016) | def p_beginPackage(p):
  function p_endPackage (line 1020) | def p_endPackage(p):
  function p_package (line 1024) | def p_package(p):
  function syntax_parse (line 1028) | def syntax_parse(argdata, inputfilename, bsvdefines, bsvpath):
  function generate_bsvcpp (line 1045) | def generate_bsvcpp(filelist, project_dir, bsvdefines, interfaces, bsvpa...

FILE: scripts/topgen.py
  function newArgparser (line 29) | def newArgparser():
  function addPortal (line 192) | def addPortal(outputPrefix, enumVal, ifcName, direction):
  class iReq (line 214) | class iReq:
    method __init__ (line 215) | def __init__(self):
  function instMod (line 238) | def instMod(pmap, args, modname, modext, constructor, tparam, memFlag, i...
  function flushModules (line 298) | def flushModules(key):
  function toVectorLiteral (line 304) | def toVectorLiteral(l):
  function appendVectors (line 310) | def appendVectors(l):
  function parseParam (line 318) | def parseParam(pitem, proxy):

FILE: scripts/util.py
  function createDirAndOpen (line 29) | def createDirAndOpen(f, m):
  function replaceIfChanged (line 35) | def replaceIfChanged(name, replacement):
  function capitalize (line 48) | def capitalize(s):
  function decapitalize (line 50) | def decapitalize(s):
  function foldl (line 55) | def foldl(f, x, l):
  function splitBinding (line 61) | def splitBinding(s):
  function escapequotes (line 67) | def escapequotes(s):

FILE: tests/adapter/test.cpp
  class TestIndication (line 24) | class TestIndication : public TestIndicationWrapper
    method done (line 27) | void done() {
    method TestIndication (line 31) | TestIndication(unsigned int id) : TestIndicationWrapper(id) {}
  function main (line 34) | int main(int argc, const char **argv)

FILE: tests/aecho/generated/l_class_OC_Echo.h
  function class (line 5) | class l_class_OC_Echo {

FILE: tests/aecho/generated/l_class_OC_EchoIndication.h
  function class (line 3) | class l_class_OC_EchoIndication {

FILE: tests/aecho/generated/l_class_OC_EchoRequest.h
  function class (line 3) | class l_class_OC_EchoRequest {

FILE: tests/aecho/generated/l_class_OC_EchoTest.h
  function class (line 4) | class l_class_OC_EchoTest {

FILE: tests/aecho/generated/l_class_OC_Fifo.h
  function class (line 3) | class l_class_OC_Fifo {

FILE: tests/aecho/generated/l_class_OC_Fifo1.h
  function class (line 3) | class l_class_OC_Fifo1 {

FILE: tests/aecho/generated/output.h
  function class (line 1) | class l_class_OC_EchoRequest {
  function class (line 8) | class l_class_OC_EchoIndication {
  function class (line 15) | class l_class_OC_Echo {
  function class (line 29) | class l_class_OC_EchoTest {

FILE: tests/aecho/testecho.cpp
  class EchoIndication (line 26) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 29) | virtual void heard(uint32_t v) {
    method EchoIndication (line 32) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 35) | static void call_say(int v)
  function main (line 41) | int main(int argc, const char **argv)

FILE: tests/algo1_flashmodel/flashaccess.cpp
  function timespec_diff_sec (line 82) | double timespec_diff_sec( timespec start, timespec end ) {
  function hashAddrToData (line 89) | unsigned int hashAddrToData(int bus, int chip, int blk, int word) {
  function checkReadData (line 94) | bool checkReadData(int tag) {
  class FlashIndication (line 130) | class FlashIndication : public FlashIndicationWrapper
    method FlashIndication (line 134) | FlashIndication(unsigned int id) : FlashIndicationWrapper(id){}
    method readDone (line 136) | virtual void readDone(unsigned int tag) {
    method writeDone (line 162) | virtual void writeDone(unsigned int tag) {
    method eraseDone (line 179) | virtual void eraseDone(unsigned int tag, unsigned int status) {
    method debugDumpResp (line 199) | virtual void debugDumpResp (unsigned int debug0, unsigned int debug1, ...
  function getNumReadsInFlight (line 211) | int getNumReadsInFlight() { return curReadsInFlight; }
  function getNumWritesInFlight (line 212) | int getNumWritesInFlight() { return curWritesInFlight; }
  function getNumErasesInFlight (line 213) | int getNumErasesInFlight() { return curErasesInFlight; }
  function waitIdleEraseTag (line 218) | int waitIdleEraseTag() {
  function waitIdleWriteBuffer (line 246) | int waitIdleWriteBuffer() {
  function waitIdleReadBuffer (line 275) | int waitIdleReadBuffer() {
  function eraseBlock (line 302) | void eraseBlock(int bus, int chip, int block, int tag) {
  function writePage (line 314) | void writePage(int bus, int chip, int block, int page, int tag) {
  function readPage (line 324) | void readPage(int bus, int chip, int block, int page, int tag) {
  function main (line 337) | int main(int argc, const char **argv)

FILE: tests/algo1_flashmodel/test.cpp
  class MMUIndication (line 49) | class MMUIndication : public MMUIndicationWrapper
    method MMUIndication (line 53) | MMUIndication(DmaManager *pm, unsigned int  id, int tile=DEFAULT_TILE)...
    method MMUIndication (line 54) | MMUIndication(DmaManager *pm, unsigned int  id, PortalTransportFunctio...
    method configResp (line 55) | virtual void configResp(uint32_t pointer){
    method error (line 59) | virtual void error (uint32_t code, uint32_t pointer, uint64_t offset, ...
    method idResponse (line 64) | virtual void idResponse(uint32_t sglId){
  class MemServerIndication (line 69) | class MemServerIndication : public MemServerIndicationWrapper
    method init (line 74) | void init(){
    method MemServerIndication (line 79) | MemServerIndication(unsigned int  id, int tile=DEFAULT_TILE) : MemServ...
    method MemServerIndication (line 80) | MemServerIndication(MemServerRequestProxy *p, unsigned int  id, int ti...
    method addrResponse (line 81) | virtual void addrResponse(uint64_t physAddr){
    method reportStateDbg (line 84) | virtual void reportStateDbg(const DmaDbgRec rec){
    method reportMemoryTraffic (line 87) | virtual void reportMemoryTraffic(uint64_t words){
    method error (line 92) | virtual void error (uint32_t code, uint32_t pointer, uint64_t offset, ...
    method receiveMemoryTraffic (line 97) | uint64_t receiveMemoryTraffic(){
    method getMemoryTraffic (line 101) | uint64_t getMemoryTraffic(const ChannelType rc){
  function main (line 110) | int main(int argc, const char **argv)

FILE: tests/algo1_nandsim_manual/algo1.cpp
  class NandCfgIndication (line 51) | class NandCfgIndication : public NandCfgIndicationWrapper
    method readDone (line 55) | virtual void readDone(uint32_t v){
    method writeDone (line 59) | virtual void writeDone(uint32_t v){
    method eraseDone (line 63) | virtual void eraseDone(uint32_t v){
    method configureNandDone (line 67) | virtual void configureNandDone(){
    method NandCfgIndication (line 72) | NandCfgIndication(int id) : NandCfgIndicationWrapper(id) {
    method wait (line 75) | void wait() {
  class StrstrIndication (line 83) | class StrstrIndication : public StrstrIndicationWrapper
    method StrstrIndication (line 86) | StrstrIndication(unsigned int id) : StrstrIndicationWrapper(id){
    method setupComplete (line 90) | virtual void setupComplete() {
    method searchResult (line 94) | virtual void searchResult (int v){
    method wait (line 101) | void wait() {
  function main (line 113) | int main(int argc, const char **argv)

FILE: tests/algo1_nandsim_manual/nandsim_manual.c
  function NandCfgIndicationWrappereraseDone_cb (line 54) | int NandCfgIndicationWrappereraseDone_cb (  struct PortalInternal *p, co...
  function NandCfgIndicationWrapperwriteDone_cb (line 60) | int NandCfgIndicationWrapperwriteDone_cb (  struct PortalInternal *p, co...
  function NandCfgIndicationWrapperreadDone_cb (line 66) | int NandCfgIndicationWrapperreadDone_cb (  struct PortalInternal *p, con...
  function NandCfgIndicationWrapperconfigureNandDone_cb (line 72) | int NandCfgIndicationWrapperconfigureNandDone_cb (  struct PortalInterna...
  function MMUIndicationWrapperconfigResp_cb (line 78) | int MMUIndicationWrapperconfigResp_cb (  struct PortalInternal *p, const...
  function MMUIndicationWrapperidResponse_cb (line 84) | int MMUIndicationWrapperidResponse_cb (  struct PortalInternal *p, const...
  function MMUIndicationWrappererror_cb (line 91) | int MMUIndicationWrappererror_cb (  struct PortalInternal *p, const uint...
  function manual_event (line 96) | void manual_event(void)
  type timeval (line 121) | struct timeval
  function main (line 143) | int main(int argc, const char **argv)

FILE: tests/avalon_mm/testecho.cpp
  class EchoIndication (line 31) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 34) | virtual void heard(uint32_t v) {
    method heard2 (line 37) | virtual void heard2(uint16_t a, uint16_t b) {
    method EchoIndication (line 41) | EchoIndication(unsigned int id) : EchoIndicationWrapper(id) {}
  function call_say (line 44) | static void call_say(int v)
  function main (line 51) | int main(int argc, const char **argv)

FILE: tests/axieth/axieth.h
  function class (line 8) | class AxiEth {

FILE: tests/axieth/testaxieth.cpp
  class AxiEthTestIndication (line 9) | class AxiEthTestIndication : public AxiEthTestIndicationWrapper
    method irqChanged (line 15) | void irqChanged( const uint8_t irqLevel, const uint8_t intrSources ) {
    method resetDone (line 18) | virtual void resetDone() {
    method status (line 22) | virtual void status ( const uint8_t mmcm_locked, const uint8_t irq, co...
    method wait (line 27) | void wait() {
    method readDone (line 33) | void readDone ( const uint32_t value ) {
    method writeDone (line 39) | void writeDone (  ) {
    method AxiEthTestIndication (line 44) | AxiEthTestIndication(unsigned int id) : AxiEthTestIndicationWrapper(id) {
  function main (line 54) | int main(int argc, const char **argv)

FILE: tests/bluecheck_harness/harness.py
  class BlueCheck (line 26) | class BlueCheck:
    method __init__ (line 27) | def __init__(self):
    method startTest (line 31) | def startTest(self, v):

FILE: tests/bpiflash/bpiflash.h
  function class (line 7) | class BpiFlash {

FILE: tests/bpiflash/testbpiflash.cpp
  class BpiFlashTestIndication (line 6) | class BpiFlashTestIndication : public BpiFlashTestIndicationWrapper
    method resetDone (line 11) | virtual void resetDone() {
    method readDone (line 15) | virtual void readDone(uint16_t v) {
    method writeDone (line 20) | virtual void writeDone() {
    method wait (line 24) | void wait() {
    method BpiFlashTestIndication (line 27) | BpiFlashTestIndication(unsigned int id) : BpiFlashTestIndicationWrappe...
  function main (line 37) | int main(int argc, const char **argv)

FILE: tests/ddr3/testddr3.cpp
  class Ddr3TestIndication (line 29) | class Ddr3TestIndication : public Ddr3TestIndicationWrapper
    method Ddr3TestIndication (line 32) | Ddr3TestIndication(unsigned int id) : Ddr3TestIndicationWrapper(id){}
    method writeDone (line 33) | virtual void writeDone(uint32_t v) {
    method readDone (line 37) | virtual void readDone(uint32_t v) {
  function main (line 43) | int main(int argc, const char **argv)

FILE: tests/ddr3_altera/testddr3.cpp
  class Ddr3TestIndication (line 28) | class Ddr3TestIndication : public Ddr3TestIndicationWrapper
    method Ddr3TestIndication (line 31) | Ddr3TestIndication(unsigned int id) : Ddr3TestIndicationWrapper(id){}
    method writeDone (line 32) | virtual void writeDone(uint32_t v) {
    method readDone (line 36) | virtual void readDone(uint32_t v) {
  function main (line 42) | int main(int argc, const char **argv)

FILE: tests/ddr_minimal/testddr3.cpp
  class Ddr3TestIndication (line 29) | class Ddr3TestIndication : public Ddr3TestIndicationWrapper
    method Ddr3TestIndication (line 32) | Ddr3TestIndication(unsigned int id) : Ddr3TestIndicationWrapper(id){}
    method writeDone (line 33) | virtual void writeDone(uint32_t v) {
    method readDone (line 37) | virtual void readDone(uint32_t v) {
  function main (line 45) | int main(int argc, const char **argv)

FILE: tests/dma2bram/test.cpp
  class TestIndication (line 28) | class TestIndication : public TestIndicationWrapper
    method TestIndication (line 31) | TestIndication(unsigned int id) : TestIndicationWrapper(id){}
    method writeDone (line 32) | virtual void writeDone(uint32_t v) {
  function main (line 38) | int main(int argc, const char **argv)

FILE: tests/dram_awsf1/testddr3.cpp
  class Ddr3TestIndication (line 28) | class Ddr3TestIndication : public Ddr3TestIndicationWrapper
    method Ddr3TestIndication (line 31) | Ddr3TestIndication(unsigned int id) : Ddr3TestIndicationWrapper(id){}
    method writeDone (line 32) | virtual void writeDone(uint32_t id) {
    method readDone (line 36) | virtual void readDone(uint16_t v,
    method error (line 62) | virtual void error(uint32_t code, uint32_t data){
  function main (line 68) | int main(int argc, const char **argv)

FILE: tests/echosoft2/daemon.cpp
  class EchoIndication (line 32) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 35) | void heard(uint32_t id, uint32_t v) {
    method heard2 (line 46) | void heard2(uint32_t id, uint16_t a, uint16_t b) {
    method EchoIndication (line 57) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  class EchoRequest (line 60) | class EchoRequest : public EchoRequestWrapper
    method say (line 63) | void say (const uint32_t id, const uint32_t v ) {
    method say2 (line 68) | void say2 (const uint32_t id, const uint16_t a, const uint16_t b ) {
    method setLeds (line 73) | void setLeds (const uint32_t id, const uint8_t v ) {
    method EchoRequest (line 79) | EchoRequest(unsigned int id, PortalTransportFunctions *item, void *par...
  function main (line 82) | int main(int argc, const char **argv)

FILE: tests/echosoft2/testecho.cpp
  class EchoIndication (line 32) | class EchoIndication : public EchoIndicationWrapper
    method heard (line 35) | void heard(uint32_t id, uint32_t v) {
    method heard2 (line 39) | void heard2(uint32_t id, uint16_t a, uint16_t b) {
    method EchoIndication (line 43) | EchoIndication(unsigned int id, PortalTransportFunctions *item, void *...
  function call_say (line 48) | static void call_say(int v)
  function call_say2 (line 55) | static void call_say2(int v, int v2)
  class EchoIndication2 (line 82) | class EchoIndication2 : public EchoIndicationWrapper
    method heard (line 85) | void heard(uint32_t id, uint32_t v) {
    method heard2 (line 89) | void heard2(uint32_t id, uint16_t a, uint16_t b) {
    method EchoIndication2 (line 93) | EchoIndication2(unsigned int id, PortalTransportFunctions *item, void ...
  function call2_say (line 98) | static void call2_say(int v)
  function call2_say2 (line 105) | static void call2_say2(int v, int v2)
  function main (line 128) | int main(int argc, const char **argv)
  function main (line 149) | int main(int argc, const char **argv)

FILE: tests/fastecho/testfastecho.cpp
  class FastEcho (line 29) | class FastEcho : public FastEchoIndicationAWrapper
    method FastEcho (line 32) | FastEcho(unsigned int indicationId, unsigned int requestId)
    method indication (line 38) | virtual void indication(uint64_t a, uint64_t b, uint64_t c, uint64_t d) {
    method doEcho (line 46) | bool doEcho(uint64_t a, uint64_t b, uint64_t c, uint64_t d) {
  function main (line 63) | int main(int argc, const char **argv)

FILE: tests/float/ftest.c
  function main (line 3) | int main()

FILE: tests/fp/testfp.cpp
  class FpIndication (line 28) | class FpIndication : public FpIndicationWrapper
    method incr_cnt (line 32) | void incr_cnt(){
    method added (line 36) | void added ( float a ) {
    method FpIndication (line 40) | FpIndication(unsigned int id) : FpIndicationWrapper(id), cnt(0){}
  function main (line 43) | int main(int argc, const char **argv)

FILE: tests/guard/gtest.c
  function main (line 3) | int main()

FILE: tests/ipcperf/testipctest.cpp
  class IpcTestIndication (line 51) | class IpcTestIndication : public IpcTestIndicationWrapper
    method heard (line 54) | virtual void heard(uint32_t v) {
    method heard2 (line 63) | virtual void heard2(uint16_t v1, uint16_t v2) {}
    method IpcTestIndication (line 64) | IpcTestIndication(unsigned int id, PortalPoller *poller) : IpcTestIndi...
  function run_test (line 67) | static void run_test(void)
  function main (line 111) | int main(int argc, const char **argv)

FILE: tests/memcpy_manysglists/testmemcpy.cpp
  function dump (line 35) | void dump(const char *prefix, char *buf, size_t len)
  class MemcpyIndication (line 46) | class MemcpyIndication : public MemcpyIndicationWrapper
    method MemcpyIndication (line 50) | MemcpyIndication(unsigned int id) : MemcpyIndicationWrapper(id){}
    method started (line 52) | virtual void started(){
    method done (line 55) | virtual void done() {
  function do_copy (line 63) | int do_copy(int srcAlloc, int sgl_config_request_id, int sgl_config_indi...
  function main (line 104) | int main(int argc, const char **argv)

FILE: tests/memread_err/testmemread.cpp
  function dump (line 44) | void dump(const char *prefix, char *buf, size_t len)
  class MemreadIndication (line 52) | class MemreadIndication : public MemreadIndicationWrapper
    method readDone (line 56) | virtual void readDone(uint32_t v){
    method started (line 61) | virtual void started(uint32_t words){
    method rData (line 64) | virtual void rData ( uint64_t v ){
    method MemreadIndication (line 68) | MemreadIndication(int id) : MemreadIndicationWrapper(id){}
  function runtest (line 71) | int runtest(int argc, const char ** argv)
  function main (line 161) | int main(int argc, const char **argv)

FILE: tests/memread_manual/memread_manual_manager.c
  function ReadTestIndicationWrapperreadDone_cb (line 49) | int ReadTestIndicationWrapperreadDone_cb (  struct PortalInternal *p, co...
  function MMUIndicationWrapperconfigResp_cb (line 55) | int MMUIndicationWrapperconfigResp_cb (  struct PortalInternal *p, const...
  function MMUIndicationWrapperidResponse_cb (line 61) | int MMUIndicationWrapperidResponse_cb (  struct PortalInternal *p, const...
  function MMUIndicationWrappererror_cb (line 66) | int MMUIndicationWrappererror_cb (  struct PortalInternal *p, const uint...
  function manual_event (line 73) | void manual_event(void)
  type timeval (line 97) | struct timeval
  function main (line 119) | int main(int argc, const char **argv)

FILE: tests/memserver_copy/testmemcopy.cpp
  function memdump (line 25) | static void memdump(unsigned char *p, int len, const char *title)
  class MemcopyIndication (line 44) | class MemcopyIndication : public MemcopyIndicationWrapper
    method MemcopyIndication (line 47) | MemcopyIndication(int id) : MemcopyIndicationWrapper(id){}
    method copyDone (line 49) | virtual void copyDone ( uint32_t srcGen ){
    method copyProgress (line 53) | virtual void copyProgress ( uint32_t numtodo ){
  function main (line 58) | int main(int argc, const char **argv)

FILE: tests/memserver_write/testmemwrite.cpp
  function memdump (line 27) | static void memdump(unsigned char *p, int len, const char *title)
  class MemwriteIndication (line 46) | class MemwriteIndication : public MemwriteIndicationWrapper
    method MemwriteIndication (line 49) | MemwriteIndication(int id) : MemwriteIndicationWrapper(id){}
    method writeDone (line 51) | virtual void writeDone ( uint32_t srcGen ){
    method writeProgress (line 55) | virtual void writeProgress ( uint32_t numtodo ){
  function main (line 61) | int main(int argc, const char **argv)

FILE: tests/memwrite_acp/testmemwrite.cpp
  function memdump (line 25) | static void memdump(unsigned char *p, int len, const char *title)
  class MemwriteIndication (line 44) | class MemwriteIndication : public MemwriteIndicationWrapper
    method MemwriteIndication (line 47) | MemwriteIndication(int id) : MemwriteIndicationWrapper(id){}
    method writeDone (line 49) | virtual void writeDone ( uint32_t srcGen ){
  function main (line 55) | int main(int argc, const char **argv)

FILE: tests/memwrite_trivial/testmemwrite.cpp
  function memdump (line 25) | static void memdump(unsigned char *p, int len, const char *title)
  class MemwriteIndication (line 44) | class MemwriteIndication : public MemwriteIndicationWrapper
    method MemwriteIndication (line 47) | MemwriteIndication(int id) : MemwriteIndicationWrapper(id){}
    method writeDone (line 49) | virtual void writeDone ( uint32_t srcGen ){
  function main (line 55) | int main(int argc, const char **argv)

FILE: tests/memwriteengine_test/testmemwrite.cpp
  class MemwriteIndication (line 28) | class MemwriteIndication : public MemwriteIndicationWrapper
    method MemwriteIndication (line 31) | MemwriteIndication(int id) : MemwriteIndicationWrapper(id){}
    method writeDone (line 33) | virtual void writeDone ( uint32_t srcGen ){
    method req (line 37) | virtual void req ( uint32_t addr ){
    method done (line 40) | virtual void done ( uint32_t tag ){
    method mismatch (line 43) | virtual void mismatch ( const uint32_t addr, const uint64_t data ){
  function main (line 49) | int main(int argc, const char **argv)

FILE: tests/method/mtest.cpp
  function main (line 3) | int main()

FILE: tests/mifo/testmifo.cpp
  class MifoTestIndication (line 27) | class MifoTestIndication : public MifoTestIndicationWrapper
    method incr_cnt (line 31) | void incr_cnt(){
    method mifo32 (line 35) | virtual void mifo32(uint32_t a) {
    method mifo64 (line 41) | virtual void mifo64(uint32_t a, uint32_t b) {
    method fimo64 (line 50) | virtual void fimo64(uint32_t a, uint32_t b) {
    method fimo96 (line 59) | virtual void fimo96(uint32_t a, uint32_t b, uint32_t c) {
    method fimo128 (line 7
Condensed preview — 1351 files, each showing path, character count, and a content snippet. Download the .json file or copy for the full structured content (8,753K chars).
[
  {
    "path": ".gitignore",
    "chars": 649,
    "preview": "*~\n*.pyc\n*.o\nlextab.py\nparselog.txt\nparser.out\nparsetab.py\n*.bo\n*.so\n*.ba\n*.cmd\n*.mod.c\n*.ko\nModule.symvers\n*.jou\n*.log\n"
  },
  {
    "path": ".travis.yml",
    "chars": 2613,
    "preview": "language: cpp\ncache:\n  directories:\nbefore_script:\n- if [ -d Bluespec-2018.10.beta1 ] ; then echo bluespec cached; else "
  },
  {
    "path": "LICENSE.txt",
    "chars": 1111,
    "preview": "Copyright (c) 2012 Nokia, Inc.\nCopyright (c) 2013-2015 Quanta Research Cambridge, Inc.\n\nPermission is hereby granted, fr"
  },
  {
    "path": "Makefile",
    "chars": 8763,
    "preview": "# Copyright (c) 2014 Quanta Research Cambridge, Inc\n#\n# Permission is hereby granted, free of charge, to any person obta"
  },
  {
    "path": "Makefile.connectal",
    "chars": 12642,
    "preview": "# Copyright (c) 2014 Quanta Research Cambridge, Inc\n#\n# Permission is hereby granted, free of charge, to any person obta"
  },
  {
    "path": "Makefile.version",
    "chars": 18,
    "preview": "VERSION=22.05.23b\n"
  },
  {
    "path": "README.md",
    "chars": 6905,
    "preview": "Connectal\n====\n\n\nConnectal provides a hardware-software interface for applications split\nbetween user mode code and cust"
  },
  {
    "path": "boardinfo/ac701.json",
    "chars": 2252,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Artix7\",  \"PCIE\", \"PCIE1\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/ac701_untethered.json",
    "chars": 2328,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Artix7\", \"PhysAddrWidth=40\", \"PcieLanes=4\", \"UNTETHERED=1\",\n\t\t  "
  },
  {
    "path": "boardinfo/ac701g2.json",
    "chars": 776,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Artix7\",  \"PCIE\", \"PCIE2\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/asic.json",
    "chars": 325,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"asic\",\n\t\"rewireclockstring\" : \"\",\n        \"TOP\" : \"Asi"
  },
  {
    "path": "boardinfo/awsf1.json",
    "chars": 772,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"VirtexUltrascale\", \"PhysAddrWidth=40\", \"DataBusWidth=512\", \"Xsim"
  },
  {
    "path": "boardinfo/bluesim.json",
    "chars": 5548,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"xc7z020clg484-1\",\n        \"rewireclockstring\" : \"tclzy"
  },
  {
    "path": "boardinfo/cvc.json",
    "chars": 423,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"xc7z020clg484-1\",\n        \"rewireclockstring\" : \"tclzy"
  },
  {
    "path": "boardinfo/de5.json",
    "chars": 90860,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"ALTERA=1\", \"StratixV\", \"PCIE\", \"PCIE_NO_BSCAN\", \"PcieHostInterface\", \"PhysAd"
  },
  {
    "path": "boardinfo/htg4.json",
    "chars": 6011,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"ALTERA=1\", \"StratixIV\", \"PCIE\", \"PCIE_NO_BSCAN\", \"PcieHostInterface\", \"PhysA"
  },
  {
    "path": "boardinfo/kc160g2.json",
    "chars": 652,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Kintex7\", \"PCIE\", \"PCIE2\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/kc705.json",
    "chars": 7223,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Kintex7\", \"PCIE\", \"PCIE1\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/kc705_untethered.json",
    "chars": 7659,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Kintex7\", \"PhysAddrWidth=40\", \"PcieLanes=8\", \"UNTETHERED=1\",\n\t\t "
  },
  {
    "path": "boardinfo/kc705g1.json",
    "chars": 7223,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Kintex7\", \"PCIE\", \"PCIE1\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/kc705g2.json",
    "chars": 7605,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Kintex7\", \"PCIE\", \"PCIE2\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/kcu105.json",
    "chars": 5132,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Virtex7\", \"PCIE\", \"PCIE3\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/miniitx100.json",
    "chars": 3036,
    "preview": "{\n    \"options\": {\n        \"os\" : \"android\",\n        \"partname\" : \"xc7z100ffg900-2\",\n        \"rewireclockstring\" : \"tclz"
  },
  {
    "path": "boardinfo/ncverilog.json",
    "chars": 377,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"xc7z020clg484-1\",\n        \"TOP\" : \"XsimTop\",\n\t\"bsvdefi"
  },
  {
    "path": "boardinfo/nfsume.json",
    "chars": 25934,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Virtex7\", \"PCIE\", \"PCIE3\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/parallella.json",
    "chars": 666,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqHostInterface\", \"PhysAddrWidth=32\",\n\t\t\t\"CONNECTAL_BI"
  },
  {
    "path": "boardinfo/ultra96.json",
    "chars": 12886,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqUltrascale\", \"ZynqHostInterface\", \"PhysAddrWidth=40\""
  },
  {
    "path": "boardinfo/v2000t.json",
    "chars": 579,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Virtex7\", \"PCIE\", \"PcieHostInterface\", \"PhysAddrWidth=40\",\n\t\t   "
  },
  {
    "path": "boardinfo/vc707.json",
    "chars": 8660,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Virtex7\", \"PCIE\", \"PCIE1\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/vc707g2.json",
    "chars": 9033,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Virtex7\", \"PCIE\", \"PCIE2\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/vc709.json",
    "chars": 10748,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"Virtex7\", \"PCIE\", \"PCIE3\", \"PcieHostInterface\", \"PhysAddrWidth=4"
  },
  {
    "path": "boardinfo/vcs.json",
    "chars": 371,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"xc7z020clg484-1\",\n        \"TOP\" : \"XsimTop\",\n\t\"bsvdefi"
  },
  {
    "path": "boardinfo/vcu108.json",
    "chars": 25798,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"VirtexUltrascale\", \"XilinxUltrascale\", \"PCIE\", \"PCIE3\", \"PcieHos"
  },
  {
    "path": "boardinfo/vcu118.json",
    "chars": 25850,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"VirtexUltrascalePlus\", \"VirtexUltrascale\", \"XilinxUltrascalePlus"
  },
  {
    "path": "boardinfo/verilator.json",
    "chars": 422,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"xc7z020clg484-1\",\n        \"rewireclockstring\" : \"tclzy"
  },
  {
    "path": "boardinfo/vsim.json",
    "chars": 457,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"5SGXEA7N2F45C2\",\n        \"rewireclockstring\" : \"tclzyn"
  },
  {
    "path": "boardinfo/xsim.json",
    "chars": 456,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n        \"partname\" : \"xc7z020clg484-1\",\n        \"rewireclockstring\" : \"tclzy"
  },
  {
    "path": "boardinfo/zc702.json",
    "chars": 11892,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqHostInterface\", \"PhysAddrWidth=32\",\n\t\t\t\"CONNECTAL_BI"
  },
  {
    "path": "boardinfo/zc706.json",
    "chars": 19698,
    "preview": "{\n    \"options\": {\n        \"os\" : \"android\",\n        \"partname\" : \"xc7z045ffg900-2\",\n        \"rewireclockstring\" : \"tclz"
  },
  {
    "path": "boardinfo/zc706_ubuntu.json",
    "chars": 10421,
    "preview": "{\n    \"options\": {\n        \"os\" : \"ubuntu\",\n\t\"arch\" : \"arm\",\n\t\"toolchain\" : \"arm-linux-gnueabihf-\",\n        \"partname\" :"
  },
  {
    "path": "boardinfo/zcu102.json",
    "chars": 12891,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqUltrascale\", \"ZynqHostInterface\", \"PhysAddrWidth=40\""
  },
  {
    "path": "boardinfo/zcu111.json",
    "chars": 12896,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqUltrascale\", \"ZynqHostInterface\", \"PhysAddrWidth=40\""
  },
  {
    "path": "boardinfo/zedboard.json",
    "chars": 16199,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqHostInterface\", \"PhysAddrWidth=32\", \"CFGBVS=VCCO\", \""
  },
  {
    "path": "boardinfo/zedboard_ubuntu.json",
    "chars": 16175,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqHostInterface\", \"PhysAddrWidth=32\", \"CFGBVS=VCCO\", \""
  },
  {
    "path": "boardinfo/zybo.json",
    "chars": 5604,
    "preview": "{\n    \"options\": {\n        \"bsvdefines\" : [\"XILINX=1\", \"ZYNQ\", \"ZynqHostInterface\", \"PhysAddrWidth=32\", \"NUMBER_OF_LEDS="
  },
  {
    "path": "boardinfo/zynq100.json",
    "chars": 677,
    "preview": "{\n    \"options\": {\n        \"os\" : \"android\",\n        \"partname\" : \"xc7z100ffg900-2\",\n        \"rewireclockstring\" : \"tclz"
  },
  {
    "path": "bsv/Adapter.bsv",
    "chars": 8597,
    "preview": "\n// Copyright (c) 2012 MIT\n// Copyright (c) 2012 Nokia, Inc.\n\n// Permission is hereby granted, free of charge, to any pe"
  },
  {
    "path": "bsv/AddressGenerator.bsv",
    "chars": 3409,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/AsicTop.bsv",
    "chars": 4003,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/AvalonBits.bsv",
    "chars": 2754,
    "preview": "// Copyright (c) 2015 Connectal Project.\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/AvalonDdr3Controller.bsv",
    "chars": 2186,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/AvalonDma.bsv",
    "chars": 4399,
    "preview": "// Copyright (c) 2015 Connectal Project.\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/AvalonGather.bsv",
    "chars": 2712,
    "preview": "// Copyright (c) 2015 Connectal Project.\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/AvalonMasterSlave.bsv",
    "chars": 2253,
    "preview": "// Copyright (c) 2015 Connectal Project.\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/AvalonSplitter.bsv",
    "chars": 3102,
    "preview": "// Copyright (c) 2015 Connectal Project.\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/AwsF1Top.bsv",
    "chars": 10068,
    "preview": "// Copyright (c) 2017 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/Axi4MasterSlave.bsv",
    "chars": 8438,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby g"
  },
  {
    "path": "bsv/AxiBits.bsv",
    "chars": 46346,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/AxiDdr3Controller.bsv",
    "chars": 4903,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/AxiDma.bsv",
    "chars": 10204,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/AxiGather.bsv",
    "chars": 15286,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/AxiMasterSlave.bsv",
    "chars": 7048,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/AxiStream.bsv",
    "chars": 6919,
    "preview": "// Copyright (c) 2016 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/BpiFlash.bsv",
    "chars": 4371,
    "preview": "\n`include \"ConnectalProjectConfig.bsv\"\nimport Vector::*;\nimport Clocks::*;\nimport Connectable::*;\nimport GetPut::*;\nimpo"
  },
  {
    "path": "bsv/BramMux.bsv",
    "chars": 3994,
    "preview": "\n// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n/"
  },
  {
    "path": "bsv/CnocPortal.bsv",
    "chars": 5417,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectableWithTrace.bsv",
    "chars": 8668,
    "preview": "// Copyright (c) 2014-2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any pers"
  },
  {
    "path": "bsv/ConnectalAlteraCells.bsv",
    "chars": 1238,
    "preview": "\n// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n/"
  },
  {
    "path": "bsv/ConnectalBram.bsv",
    "chars": 4898,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/ConnectalBramFifo.bsv",
    "chars": 7015,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalClocks.bsv",
    "chars": 4013,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalCompletionBuffer.bsv",
    "chars": 4308,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalConfig.bsv",
    "chars": 2065,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/ConnectalEHR.bsv",
    "chars": 2459,
    "preview": "\n// Copyright (C) 2012 Muralidaran Vijayaraghavan <vmurali@csail.mit.edu>\n\n// Permission is hereby granted, free of char"
  },
  {
    "path": "bsv/ConnectalFIFO.bsv",
    "chars": 2137,
    "preview": "\n// Copyright (C) 2012\n\n// Arvind <arvind@csail.mit.edu>\n// Muralidaran Vijayaraghavan <vmurali@csail.mit.edu>\n// Jamey "
  },
  {
    "path": "bsv/ConnectalMMU.bsv",
    "chars": 18182,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalMemTypes.bsv",
    "chars": 21507,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalMemUtils.bsv",
    "chars": 10293,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalMemory.bsv",
    "chars": 3766,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalMimo.bsv",
    "chars": 8701,
    "preview": "////////////////////////////////////////////////////////////////////////////////\n// Copyright (c) 2012  Bluespec, Inc.  "
  },
  {
    "path": "bsv/ConnectalPrelude.bsv",
    "chars": 1567,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ConnectalXilinxCells.bsv",
    "chars": 32401,
    "preview": "\n// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n/"
  },
  {
    "path": "bsv/CtrlMux.bsv",
    "chars": 19196,
    "preview": "\n// Copyright (c) 2012 Nokia, Inc.\n// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby grante"
  },
  {
    "path": "bsv/DisplayInd.bsv",
    "chars": 1165,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/Dsp48E1.bsv",
    "chars": 10858,
    "preview": "import GetPut::*;\nimport FIFO::*;\nimport FIFOF::*;\nimport Clocks::*;\nimport ConnectalClocks::*;\n`include \"ConnectalProje"
  },
  {
    "path": "bsv/GearboxGetPut.bsv",
    "chars": 2449,
    "preview": "// Copyright (c) 2015 Connectal Project.\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/GetPutM.bsv",
    "chars": 1329,
    "preview": "// Copyright (c) 2016 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/GetPutWithClocks.bsv",
    "chars": 18110,
    "preview": "\n// Copyright (c) 2013,2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any per"
  },
  {
    "path": "bsv/HostInterface.bsv",
    "chars": 6682,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/LinkerLib.bsv",
    "chars": 4427,
    "preview": "// Copyright (c) 2015 The Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining"
  },
  {
    "path": "bsv/MIFO.bsv",
    "chars": 12599,
    "preview": "\n// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n/"
  },
  {
    "path": "bsv/MemPipe.bsv",
    "chars": 10819,
    "preview": "// Copyright (c) 2015 Connectal Project.\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/MemReadEngine.bsv",
    "chars": 11624,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/MemServer.bsv",
    "chars": 12073,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/MemServerInternal.bsv",
    "chars": 20237,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/MemServerPortal.bsv",
    "chars": 5232,
    "preview": "// Copyright (c) 2016 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/MemToPcie.bsv",
    "chars": 18011,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/MemWriteEngine.bsv",
    "chars": 22191,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/OldEHR.bsv",
    "chars": 5853,
    "preview": "//----------------------------------------------------------------------//\n// The MIT License \n// \n// Copyright (c) 2008"
  },
  {
    "path": "bsv/PS4LIB.bsv",
    "chars": 16927,
    "preview": "\n// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n// Copyright (c) 2014 Cornell Univeristy.\n\n// Permission is hereb"
  },
  {
    "path": "bsv/PS5LIB.bsv",
    "chars": 27398,
    "preview": "\n// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n// Copyright (c) 2014 Cornell Univeristy.\n\n// Permission is hereb"
  },
  {
    "path": "bsv/PS7LIB.bsv",
    "chars": 13856,
    "preview": "\n// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n/"
  },
  {
    "path": "bsv/PS7Trace.bsv",
    "chars": 2816,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/PS8LIB.bsv",
    "chars": 12622,
    "preview": "\n// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n/"
  },
  {
    "path": "bsv/ParallellaTop.bsv",
    "chars": 5625,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/Pcie1EndpointX7.bsv",
    "chars": 17796,
    "preview": "////////////////////////////////////////////////////////////////////////////////\n// Copyright (c) 2012  Bluespec, Inc.  "
  },
  {
    "path": "bsv/Pcie2EndpointX7.bsv",
    "chars": 11505,
    "preview": "// Copyright (c) 2012-2013 Nokia, Inc.\n// Copyright (c) 2014-2015 Quanta Research Cambridge, Inc.\n// Copyright (c) 2015 "
  },
  {
    "path": "bsv/Pcie3EndpointX7.bsv",
    "chars": 25352,
    "preview": "// Copyright (c) 2014-2015 Quanta Research Cambridge, Inc.\n// Copyright (c) 2015 Connectal Project\n\n// Permission is her"
  },
  {
    "path": "bsv/Pcie3RootPortX7.bsv",
    "chars": 29081,
    "preview": "// Copyright (c) 2014-2015 Quanta Research Cambridge, Inc.\n// Copyright (c) 2015 Connectal Project\n\n// Permission is her"
  },
  {
    "path": "bsv/PcieCsr.bsv",
    "chars": 13371,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/PcieEndpointS5.bsv",
    "chars": 9380,
    "preview": "// Copyright (c) 2014 Cornell University\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a "
  },
  {
    "path": "bsv/PcieEndpointS5Test.bsv",
    "chars": 13826,
    "preview": "\n// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n// Copyright (c) 2014 Cornell Univeristy.\n\n// Permission is hereb"
  },
  {
    "path": "bsv/PcieGearbox.bsv",
    "chars": 4022,
    "preview": "\n// Copyright (c) 2008- 2009 Bluespec, Inc.  All rights reserved.\n// $Revision$\n// $Date$\n// Copyright (c) 2013 Quanta R"
  },
  {
    "path": "bsv/PcieHost.bsv",
    "chars": 17000,
    "preview": "// Copyright (c) 2014-2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any pers"
  },
  {
    "path": "bsv/PcieRootDevice.bsv",
    "chars": 1641,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/PcieRootPortX7.bsv",
    "chars": 8175,
    "preview": "\n// Copyright (c) 2013-2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any per"
  },
  {
    "path": "bsv/PcieSplitter.bsv",
    "chars": 5819,
    "preview": "\n// Copyright (c) 2008- 2009 Bluespec, Inc.  All rights reserved.\n// $Revision$\n// $Date$\n// Copyright (c) 2013 Quanta R"
  },
  {
    "path": "bsv/PcieStateChanges.bsv",
    "chars": 2736,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/PcieToMem.bsv",
    "chars": 13788,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/PcieTop.bsv",
    "chars": 7729,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/PcieTracer.bsv",
    "chars": 9667,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/PhysMemSlaveFromBram.bsv",
    "chars": 12075,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/Pipe.bsv",
    "chars": 37197,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/Platform.bsv",
    "chars": 8121,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/Portal.bsv",
    "chars": 3753,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/SimDma.bsv",
    "chars": 12932,
    "preview": "// Copyright (c) 2015 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/SimLink.bsv",
    "chars": 5359,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/SyncAxisFifo32x8.bsv",
    "chars": 6257,
    "preview": "\n/*\n   ../../generated/scripts/importbvi.py\n   -I\n   SyncAxisFifo32x8\n   -P\n   SyncAxisFifo32x8\n   -c\n   m_aclk\n   -c\n  "
  },
  {
    "path": "bsv/SyncBits.bsv",
    "chars": 1787,
    "preview": "\n// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n//\n// Permission is hereby granted, free of charge, to any person"
  },
  {
    "path": "bsv/Trace.bsv",
    "chars": 3567,
    "preview": "import BRAM::*;\nimport BRAMFIFO::*;\nimport ConnectalFIFO::*;\nimport DefaultValue::*;\nimport FIFOF::*;\nimport GetPut::*;\n"
  },
  {
    "path": "bsv/TraceMemClient.bsv",
    "chars": 3355,
    "preview": "// Copyright (c) 2016 Connectal Project\n\n// Permission is hereby granted, free of charge, to any person\n// obtaining a c"
  },
  {
    "path": "bsv/UntetheredTop.bsv",
    "chars": 4591,
    "preview": "// Copyright (c) 2017 Accelerated Tech, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n// obtainin"
  },
  {
    "path": "bsv/XsimIF.bsv",
    "chars": 1496,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/XsimTop.bsv",
    "chars": 6615,
    "preview": "// Copyright (c) 2015 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ZynqTop.bsv",
    "chars": 5962,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "bsv/ZynqUltraTop.bsv",
    "chars": 5048,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "constraints/altera/de5.qsf",
    "chars": 100371,
    "preview": "#============================================================\n# BUTTON\n#================================================"
  },
  {
    "path": "constraints/altera/de5.sdc",
    "chars": 3323,
    "preview": "\r\n#**************************************************************\r\n# Create Clock\r\n#************************************"
  },
  {
    "path": "constraints/altera/htg4.qsf",
    "chars": 15516,
    "preview": "set_instance_assignment -name IO_STANDARD \"DIFFERENTIAL LVPECL\" -to refclk\nset_instance_assignment -name IO_STANDARD \"2."
  },
  {
    "path": "constraints/altera/htg4.sdc",
    "chars": 2804,
    "preview": "\r\n#**************************************************************\r\n# Create Clock\r\n#************************************"
  },
  {
    "path": "constraints/xilinx/Readme.md",
    "chars": 1738,
    "preview": "Procedure for creating part constraint files\n\nStart Vivado\nCreate new project\n  In New Vivado Project window\n     click "
  },
  {
    "path": "constraints/xilinx/ac701.xdc",
    "chars": 5887,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/awsf1.xdc",
    "chars": 6,
    "preview": "# TBD\n"
  },
  {
    "path": "constraints/xilinx/bluesim.xdc",
    "chars": 35,
    "preview": "this file intentionally left blank\n"
  },
  {
    "path": "constraints/xilinx/bluesim_pcie.xdc",
    "chars": 35,
    "preview": "this file intentionally left blank\n"
  },
  {
    "path": "constraints/xilinx/cdc.tcl",
    "chars": 375,
    "preview": "##\n## set properties to help out clock domain crossing analysis\n##\n\n# set ASYNC_REG property on SyncReset and SyncFifo v"
  },
  {
    "path": "constraints/xilinx/kc160g2.xdc",
    "chars": 2244,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/kc705-3.0.xdc",
    "chars": 12997,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/kc705-ddr3.prj",
    "chars": 17221,
    "preview": "<?xml version='1.0' encoding='UTF-8'?>\n<!-- IMPORTANT: This is an internal file that has been generated by the MIG softw"
  },
  {
    "path": "constraints/xilinx/kc705.xdc",
    "chars": 4469,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/kc705g2.xdc",
    "chars": 4262,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/kcu105.xdc",
    "chars": 1879,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/miniitx100-axiddr3.prj",
    "chars": 12634,
    "preview": "<?xml version='1.0' encoding='UTF-8'?>\n<!-- IMPORTANT: This is an internal file that has been generated by the MIG softw"
  },
  {
    "path": "constraints/xilinx/miniitx100.xdc",
    "chars": 2078,
    "preview": "# Avnet Mini-ITX Zynq100\nset_property LOC H9  [get_ports { CLK_sys_clk_p }]\nset_property LOC G9  [get_ports { CLK_sys_cl"
  },
  {
    "path": "constraints/xilinx/nfsume-axiddr3.prj",
    "chars": 18040,
    "preview": "<?xml version='1.0' encoding='UTF-8'?>\n<!-- IMPORTANT: This is an internal file that has been generated by the MIG softw"
  },
  {
    "path": "constraints/xilinx/nfsume.xdc",
    "chars": 4630,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/ok/zc7z010clg400.xdc",
    "chars": 18287,
    "preview": "############################################################################\n##\n##  Xilinx, Inc. 2006            www.xil"
  },
  {
    "path": "constraints/xilinx/ok/zc7z020clg400.xdc",
    "chars": 17890,
    "preview": "############################################################################\n##\n##  Xilinx, Inc. 2006            www.xil"
  },
  {
    "path": "constraints/xilinx/ok/zc7z020clg484.xdc",
    "chars": 17890,
    "preview": "############################################################################\n##\n##  Xilinx, Inc. 2006            www.xil"
  },
  {
    "path": "constraints/xilinx/ok/zc7z045ffg900.xdc",
    "chars": 17957,
    "preview": "############################################################################\n##\n##  Xilinx, Inc. 2006            www.xil"
  },
  {
    "path": "constraints/xilinx/ok/zc7z100ffg900.xdc",
    "chars": 17957,
    "preview": "############################################################################\n##\n##  Xilinx, Inc. 2006            www.xil"
  },
  {
    "path": "constraints/xilinx/parallella.xdc",
    "chars": 65,
    "preview": "# Nothing here, until the standard Parallella stuff gets defined\n"
  },
  {
    "path": "constraints/xilinx/pcie-clocks.xdc",
    "chars": 1884,
    "preview": "#create_clock -name bscan_refclk -period 20 [get_pins host_pciehost_bscan_bscan/TCK]\ncreate_clock -name pci_refclk -peri"
  },
  {
    "path": "constraints/xilinx/v2000t.xdc",
    "chars": 18,
    "preview": "# constraints TBD\n"
  },
  {
    "path": "constraints/xilinx/vc707-axiddr3.prj",
    "chars": 17587,
    "preview": "<?xml version='1.0' encoding='UTF-8'?>\n<!-- IMPORTANT: This is an internal file that has been generated by the MIG softw"
  },
  {
    "path": "constraints/xilinx/vc707-portal-pblock.xdc",
    "chars": 271,
    "preview": "startgroup\ncreate_pblock pblock_portalTop\nresize_pblock pblock_portalTop -add {SLICE_X0Y0:SLICE_X105Y199 DSP48_X0Y0:DSP4"
  },
  {
    "path": "constraints/xilinx/vc707.xdc",
    "chars": 4383,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/vc707_aurora.xdc",
    "chars": 6140,
    "preview": " ##################################################################################\n ##\n ## Project:  Aurora 64B/66B\n ##"
  },
  {
    "path": "constraints/xilinx/vc707_ddr3.xdc",
    "chars": 42854,
    "preview": "######################################################################################################\n##  DDR3 Constrai"
  },
  {
    "path": "constraints/xilinx/vc707_ddr3_pins.xdc",
    "chars": 28604,
    "preview": "######################################################################################################\n# PIN ASSIGNMENTS"
  },
  {
    "path": "constraints/xilinx/vc707g2-axiddr3.prj",
    "chars": 17587,
    "preview": "<?xml version='1.0' encoding='UTF-8'?>\n<!-- IMPORTANT: This is an internal file that has been generated by the MIG softw"
  },
  {
    "path": "constraints/xilinx/vc707g2.xdc",
    "chars": 4110,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/vc709.xdc",
    "chars": 1843,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/vcu108.xdc",
    "chars": 1494,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/vcu118.xdc",
    "chars": 1625,
    "preview": "######################################################################################################\n##  File name :  "
  },
  {
    "path": "constraints/xilinx/verilator.xdc",
    "chars": 35,
    "preview": "this file intentionally left blank\n"
  },
  {
    "path": "constraints/xilinx/xc7z010clg400.xdc",
    "chars": 34799,
    "preview": "#created using vivado from microzed board type\n# create_clock manually commented out\n###################################"
  },
  {
    "path": "constraints/xilinx/xc7z045ffg900.xdc",
    "chars": 18754,
    "preview": "#created using vivado, see instructions in Readme.md\n#create clock manually commented out\n##############################"
  },
  {
    "path": "constraints/xilinx/xc7z100ffg900.xdc",
    "chars": 18737,
    "preview": "#created using vivado see readme.md\n# create_clock manually commented out\n##############################################"
  },
  {
    "path": "constraints/xilinx/zc706-axiddr3.prj",
    "chars": 17971,
    "preview": "<?xml version='1.0' encoding='UTF-8'?>\n<!-- IMPORTANT: This is an internal file that has been generated by the MIG softw"
  },
  {
    "path": "constraints/xilinx/zc706.xdc",
    "chars": 2313,
    "preview": "set_property LOC H9  [get_ports { CLK_sys_clk_p }]\nset_property LOC G9  [get_ports { CLK_sys_clk_n }]\nset_property IOSTA"
  },
  {
    "path": "constraints/xilinx/zc706_pl_ddr3_pins.xdc",
    "chars": 24995,
    "preview": "######################################################################################################\n# PIN ASSIGNMENTS"
  },
  {
    "path": "constraints/xilinx/zc7z020clg400.xdc",
    "chars": 18926,
    "preview": "# This file pulled from a Vidado manual run of a minimal design\n# using PS7.  It was named \n# project/project_srcs/sourc"
  },
  {
    "path": "constraints/xilinx/zc7z020clg484.xdc",
    "chars": 18934,
    "preview": "# This file pulled from a Vidado manual run of a minimal design\n# using PS7.  It was named \n# project/project_srcs/sourc"
  },
  {
    "path": "constraints/xilinx/zcu102.xdc",
    "chars": 9,
    "preview": "\n## TBD\n\n"
  },
  {
    "path": "constraints/xilinx/zcu111.xdc",
    "chars": 9,
    "preview": "\n## TBD\n\n"
  },
  {
    "path": "constraints/xilinx/zybo.xdc",
    "chars": 943,
    "preview": "set_property iostandard \"LVCMOS25\" [get_ports \"GPIO_leds[0]\"]\nset_property PACKAGE_PIN \"M14\" [get_ports \"GPIO_leds[0]\"]\n"
  },
  {
    "path": "constraints/xilinx/zynq100.xdc",
    "chars": 2018,
    "preview": "\nset_property iostandard \"LVCMOS18\" [get_ports \"GPIO_leds[0]\"]\nset_property PACKAGE_PIN \"A17\" [get_ports \"GPIO_leds[0]\"]"
  },
  {
    "path": "contrib/bluescope/Makefile",
    "chars": 261,
    "preview": "\nCONNECTALDIR?=../..\nINTERFACES = MemcpyRequest BlueScopeRequest MemcpyIndication BlueScopeIndication MemServerIndicatio"
  },
  {
    "path": "contrib/bluescope/Memcpy.bsv",
    "chars": 3394,
    "preview": "// Copyright (c) 2013 Quanta Research Cambridge, Inc.\n\n// Permission is hereby granted, free of charge, to any person\n//"
  },
  {
    "path": "contrib/bluescope/Top.bsv",
    "chars": 4142,
    "preview": "/* Copyright (c) 2014 Quanta Research Cambridge, Inc\n *\n * Permission is hereby granted, free of charge, to any person o"
  },
  {
    "path": "contrib/bluescope/testbluescope.cpp",
    "chars": 6509,
    "preview": "/* Copyright (c) 2013 Quanta Research Cambridge, Inc\n *\n * Permission is hereby granted, free of charge, to any person o"
  },
  {
    "path": "contrib/bluescopeevent/Makefile",
    "chars": 263,
    "preview": "\nCONNECTALDIR?=../..\nINTERFACES = SignalGenRequest SignalGenIndication \\\n\tBlueScopeEventRequest BlueScopeEventIndication"
  },
  {
    "path": "contrib/bluescopeevent/SignalGen.bsv",
    "chars": 1586,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n// Permission is hereby granted, free of charge, to any person\n// "
  },
  {
    "path": "contrib/bluescopeevent/Top.bsv",
    "chars": 4131,
    "preview": "/* Copyright (c) 2014 Quanta Research Cambridge, Inc\n *\n * Permission is hereby granted, free of charge, to any person o"
  },
  {
    "path": "contrib/bluescopeevent/testbluescopeevent.cpp",
    "chars": 4974,
    "preview": "/* Copyright (c) 2013 Quanta Research Cambridge, Inc\n *\n * Permission is hereby granted, free of charge, to any person o"
  },
  {
    "path": "contrib/bluescopeeventpio/Makefile",
    "chars": 275,
    "preview": "CONNECTALDIR?=../..\nINTERFACES = SignalGenRequest SignalGenIndication \\\n\tBlueScopeEventPIORequest BlueScopeEventPIOIndic"
  },
  {
    "path": "contrib/bluescopeeventpio/SignalGen.bsv",
    "chars": 1539,
    "preview": "// Copyright (c) 2014 Quanta Research Cambridge, Inc.\n// Permission is hereby granted, free of charge, to any person\n// "
  },
  {
    "path": "contrib/bluescopeeventpio/Top.bsv",
    "chars": 2848,
    "preview": "/* Copyright (c) 2014 Quanta Research Cambridge, Inc\n *\n * Permission is hereby granted, free of charge, to any person o"
  },
  {
    "path": "contrib/bluescopeeventpio/testbluescopeeventpio.cpp",
    "chars": 4303,
    "preview": "/* Copyright (c) 2013 Quanta Research Cambridge, Inc\n *\n * Permission is hereby granted, free of charge, to any person o"
  }
]

// ... and 1151 more files (download for full content)

About this extraction

This page contains the full source code of the cambridgehackers/connectal GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 1351 files (7.9 MB), approximately 2.1M tokens, and a symbol index with 2734 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.

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