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Repository: sibradzic/upp
Branch: master
Commit: 3db7f1491021
Files: 41
Total size: 1.1 MB
Directory structure:
gitextract_265cjues/
├── .gitignore
├── LICENSE
├── README.md
├── setup.py
├── src/
│ └── upp/
│ ├── __init__.py
│ ├── atom_gen/
│ │ ├── README.md
│ │ ├── __init__.py
│ │ ├── atombios.py
│ │ ├── pptable_v1_0.py
│ │ ├── smu_v11_0_7_navi20.py
│ │ ├── smu_v11_0_arcturus.py
│ │ ├── smu_v11_0_navi10.py
│ │ ├── smu_v13_0_7_navi30.py
│ │ ├── smu_v14_0_2_navi40.py
│ │ ├── vega10_pptable.py
│ │ └── vega20_pptable.py
│ ├── decode.py
│ └── upp.py
├── test/
│ ├── AMD.RX480.8192.160603.rom.dump
│ ├── AMD.RX480.8192.160603.rom.rawdump
│ ├── AMD.RX5700XT.8192.190616.rom.check
│ ├── AMD.RX5700XT.8192.190616.rom.conf
│ ├── AMD.RX5700XT.8192.190616.rom.dump
│ ├── AMD.RX5700XT.8192.190616.rom.rawdump
│ ├── AMD.RX6900XT.16384.201104.rom.dump
│ ├── AMD.RX6900XT.16384.201104.rom.rawdump
│ ├── AMD.RX7900XTX.24576.230323.rom.dump
│ ├── AMD.RX7900XTX.24576.230323.rom.rawdump
│ ├── AMD.RXVega64.8176.170719.rom.dump
│ ├── AMD.RXVega64.8176.170719.rom.rawdump
│ ├── AMD.RXVegaFrontier.16384.170628.rom.dump
│ ├── AMD.RXVegaFrontier.16384.170628.rom.rawdump
│ ├── AMD.RadeonVII.16384.190116.rom.dump
│ ├── AMD.RadeonVII.16384.190116.rom.rawdump
│ ├── MI100_000.000.000.000.016113_113-D3431401-100.rom.dump
│ ├── MI100_000.000.000.000.016113_113-D3431401-100.rom.rawdump
│ ├── Powercolor.RX9070.16384.241204_1.rom.dump
│ ├── Powercolor.RX9070.16384.241204_1.rom.rawdump
│ ├── navi23.mpt
│ └── test.sh
└── upliftpowerplay@.service
================================================
FILE CONTENTS
================================================
================================================
FILE: .gitignore
================================================
test/ROMs/
test/tmp/
# Byte-compiled / optimized / DLL files
__pycache__/
*.py[cod]
*$py.class
# C extensions
*.so
# Distribution / packaging
.Python
build/
develop-eggs/
dist/
downloads/
eggs/
.eggs/
lib/
lib64/
parts/
sdist/
var/
wheels/
*.egg-info/
.installed.cfg
*.egg
MANIFEST
# PyInstaller
# Usually these files are written by a python script from a template
# before PyInstaller builds the exe, so as to inject date/other infos into it.
*.manifest
*.spec
# Installer logs
pip-log.txt
pip-delete-this-directory.txt
# Unit test / coverage reports
htmlcov/
.tox/
.coverage
.coverage.*
.cache
nosetests.xml
coverage.xml
*.cover
.hypothesis/
.pytest_cache/
# Translations
*.mo
*.pot
# Django stuff:
*.log
local_settings.py
db.sqlite3
# Flask stuff:
instance/
.webassets-cache
# Scrapy stuff:
.scrapy
# Sphinx documentation
docs/_build/
# PyBuilder
target/
# Jupyter Notebook
.ipynb_checkpoints
# pyenv
.python-version
# celery beat schedule file
celerybeat-schedule
# SageMath parsed files
*.sage.py
# Environments
.env
.venv
env/
venv/
ENV/
env.bak/
venv.bak/
# Spyder project settings
.spyderproject
.spyproject
# Rope project settings
.ropeproject
# mkdocs documentation
/site
# mypy
.mypy_cache/
================================================
FILE: LICENSE
================================================
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Public License "or any later version" applies to it, you have the
option of following the terms and conditions either of that numbered
version or of any later version published by the Free Software
Foundation. If the Program does not specify a version number of the
GNU General Public License, you may choose any version ever published
by the Free Software Foundation.
If the Program specifies that a proxy can decide which future
versions of the GNU General Public License can be used, that proxy's
public statement of acceptance of a version permanently authorizes you
to choose that version for the Program.
Later license versions may give you additional or different
permissions. However, no additional obligations are imposed on any
author or copyright holder as a result of your choosing to follow a
later version.
15. Disclaimer of Warranty.
THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
16. Limitation of Liability.
IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES.
17. Interpretation of Sections 15 and 16.
If the disclaimer of warranty and limitation of liability provided
above cannot be given local legal effect according to their terms,
reviewing courts shall apply local law that most closely approximates
an absolute waiver of all civil liability in connection with the
Program, unless a warranty or assumption of liability accompanies a
copy of the Program in return for a fee.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
state the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <https://www.gnu.org/licenses/>.
Also add information on how to contact you by electronic and paper mail.
If the program does terminal interaction, make it output a short
notice like this when it starts in an interactive mode:
<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<https://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<https://www.gnu.org/licenses/why-not-lgpl.html>.
================================================
FILE: README.md
================================================
## UPP
UPP: Uplift Power Play
A tool for parsing, dumping and modifying data in Radeon PowerPlay tables
### Introduction
UPP is able to parse and modify binary data structures of PowerPlay tables
commonly found on certain AMD Radeon GPUs. Drivers on recent AMD GPUs
allow PowerPlay tables to be dynamically modified on runtime, which may be
known as "soft" PowerPlay table. On Linux, the PowerPlay table is by default
found at: `/sys/class/drm/card0/device/pp_table`.
This tool does very minimal interpretation of actual PowerPlay table values.
By design, it is mostly up to the user to do such thing.
Alternatively, one can use this tool to get PowerPlay data by:
* Extracting PowerPlay table from Video ROM image (see extract command)
* Importing "Soft PowerPlay" table from Windows registry, directly from
offline Windows/System32/config/SYSTEM file on disk, so it would work
from Linux distro that has access to mounted Windows partition
(path to SYSTEM registry file is specified with `--from-registry` option)
* Importing "Soft PowerPlay" table from "More Powe Tool" MPT file
(path to MPT file is specified with `--from-mpt option`)
This tool currently supports parsing and modifying PowerPlay tables found
on the following AMD GPU families:
* Polaris
* Vega
* Radeon VII
* Navi 10
* Arcturus (MI100)
* Navi 12 (PRO V520)
* Navi 14
* Navi 21 (Sienna Cichlid)
* Navi 22 (Navy Flounder)
* Navi 23 (Dimgrey Cavefish)
* Navi 3x
* Navi 4x
Notes:
* iGPUs found in many recent AMD APUs are using completely different
PowerPlay control methods, this tool does not support them.
* The amdgpu kernel driver does not fully implement modifying the PowerPlay
tables on runtime for Navi 3x and Navi 4x cards.
* The amdgpu kernel driver does the incomplete PowerPlay table data dump
to the `/sys/class/drm/cardX/device/pp_table` file, for Navi 3x AND 4x.
The pp_table file is truncated to first 4095 bytes. Likely a driver bug.
**WARNING**: Authors of this tool are in no way responsible for any damage
that may happen to your expansive graphics card if you choose to modify
card voltages, power limits, or any other PowerPlay parameters. Always
remember that you are doing it entirely on your own risk!
If you have bugs to report or features to request please create an issue on:
https://github.com/sibradzic/upp
### Requirements
Python 3.7+, click library. Optionally, for reading "soft" PowerPlay table
from Windows registry: python-registry. Should work on Windows as well
(testers wanted).
### Installation
Either get it with pip:
pip install upp
or use it as is directly from the source tree:
cd src
python3 -m upp.upp --help
### Usage
At its current form this is a CLI only tool. Getting help:
upp --help
or
upp <command> --help
Upp will only work by specifying a command which tells it what to do to one's
Radeon PowerPlay table data. Currently available commands are:
* **dump** - Dumps all PowerPlay data to console
* **extract** - Extracts PowerPlay data from full VBIOS ROM image
* **inject** - Injects PowerPlay data from file into VBIOS ROM image
* **get** - Retrieves current value of one or multiple PowerPlay parameter(s)
* **set** - Sets value to one or multiple PowerPlay parameters
* **undump** - Sets all PowerPlay parameters to pp file or registry
* **version** - Shows UPP version
So, an usage pattern would be like this:
upp [OPTIONS] COMMAND [ARGS]...
Some generic options applicable to all commands may be used, but please note
that they have to be specified *before* an actual command:
-p, --pp-file <filename> Input/output PP table binary file.
-f, --from-registry <filename> Import PP_PhmSoftPowerPlayTable from Windows
registry (overrides -p / --pp-file option).
-m, --from-mpt <filename> Import PowerPlay Table from More Power Tool
(overrides --pp-file and --from-registry optios).
-d, --debug / --no-debug Debug mode.
-h, --help Show this message and exit.
#### Dumping all data:
The **dump** command de-serializes PowerPlay binary data into a human-readable
text output. For example:
upp dump
In standard mode all data will be dumped to console, where data tree hierarchy
is indicated by indentation. In raw mode a table showing all hex and binary
data, as well as variable names and values, will be dumped.
#### Extracting PowerPlay table from Video ROM image:
Use **extract** command for this. The source video ROM binary must be specified
with `-r/--video-rom` parameter, and extracted PowerPlay table will be saved
into file specified with generic `-p/--pp-file` option. For example:
upp --pp-file=extracted.pp_table extract -r VIDEO.rom
Default output file name will be an original ROM file name with an
additional .pp_table extension.
#### Injecting PowerPlay data from file into VBIOS ROM image:
Use **inject** command for this. The input video ROM binary must be specified
with `-i/--input-rom` parameter, and the output ROM can be specified with an
optional `-o/--output-rom parameter`. For example:
upp -p modded.pp_table inject -i original.rom -o modded.rom
**WARNING**: Modified vROM image is probably not going to work if flashed as is
to your card, due to ROM signature checks on recent Radeon cards. Authors of
this tool are in no way responsible for any damage that may happen to your
expansive graphics card if you choose to flash the modified video ROM, you are
doing it entirely on your own risk.
#### Getting PowerPlay table parameter value(s):
The **get** command retrieves current value of one or multiple PowerPlay table
parameter value(s). The parameter variable path must be specified in `/<param>`
notation, for example:
upp get smc_pptable/FreqTableGfx/1 smc_pptable/FreqTableGfx/2
1850
1400
The order of the output values will match the order of the parameter variable
paths specified.
#### Setting PowerPlay table parameter value(s):
The **set** command sets value to one or multiple PowerPlay table
parameter(s). The parameter path and value must be specified in
`/<param>=<value>` notation, for example:
upp -p /tmp/custom-pp_table set --write \
smc_pptable/SocketPowerLimitAc/0=100 \
smc_pptable/SocketPowerLimitDc/0=100 \
smc_pptable/FanStartTemp=100 \
smc_pptable/FreqTableGfx/1=1550
It is possible to set parameters from a configuration file with one
"/<param>=<value>" per line using -c/--from-conf instead of directly
passing parameters from command line
upp set --from-conf=card0.conf
Note the `--write` parameter, which has to be specified to actually commit
changes to the PowerPlay table file.
#### Undumps all PowerPlay parameters:
The **undump** command sets all values from previously dumped PowerPlay table parameter(s) back to pp_table or registry. It allows you to make changes in dumped text file and write back all changes at once. Basically it's a convenient way to set multiple values. For example:
# extract pp_table from vbios
upp --pp-file=vbios.pp_table extract -r vbios.rom
# dump powerplay table to text file
upp --pp-file=vbios.pp_table dump > vbios.pp_table.dump
# make changes in vbios.pp_table.dump
# undump all changes back into pp_table
upp --pp-file=vbios.pp_table undump -d vbios.pp_table.dump -w
Note the `--write` parameter, which has to be specified to actually commit
changes to the PowerPlay table file.
#### Getting upp version
upp version
#### Running as sudo
Note that if you need to run upp deployed with **pip** in `--user` mode with
sudo, you'll need to add some parameters to sudo command to make user env
available to super-user. For example:
sudo -E env "PATH=$PATH" upp --help
================================================
FILE: setup.py
================================================
import setuptools
with open('README.md', 'r') as fh:
long_description = fh.read()
setuptools.setup(
name='upp',
version='0.2.4',
author='Samir Ibradžić',
description='Uplift Power Play',
long_description=long_description,
long_description_content_type='text/markdown',
url='https://github.com/sibradzic/upp',
package_dir={'': 'src'},
packages=['upp', 'upp/atom_gen'],
classifiers=[
'Programming Language :: Python :: 3',
'Programming Language :: Python :: 3.7',
'Programming Language :: Python :: 3.8',
'Programming Language :: Python :: 3.9',
'Programming Language :: Python :: 3.10',
'Programming Language :: Python :: 3.11',
'Programming Language :: Python :: 3.12',
'License :: OSI Approved :: GNU General Public License v3 (GPLv3)',
'Operating System :: OS Independent',
],
python_requires='>=3.7, <4',
install_requires=[
'click',
'setuptools'
],
entry_points={
'console_scripts': [
'upp=upp.upp:main',
],
},
)
================================================
FILE: src/upp/__init__.py
================================================
================================================
FILE: src/upp/atom_gen/README.md
================================================
# How to generate Python readable ATOM C structures from Linux kernel code
## Versions
Generated against kernel commit 80e54e849 (v6.14-rc6) (Sun Mar 9 13:45:25 2025 -1000)
Generated against drm-next kernel commit 5da39dce1 tag drm-xe-next-fixes-2025-03-12
clang version 19.1.7
ctypeslib2 2.4.0
## Python Requirements
sudo apt install clang
pip3 install --user clang==19.1.7 ctypeslib2==2.4.0
or
pacman -S clang
pipx install --preinstall clang==19.1.7 ctypeslib2
## Get a particular Linux kernel release
git clone --depth=1 git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
pushd linux
# git fetch origin v6.14-rc6 --tags
# git checkout v6.14-rc6
# git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
# git fetch --tags linux-next
git remote add drm-next https://anongit.freedesktop.org/git/drm/drm.git
git fetch --tags drm-next
git checkout drm-next
popd
## Some Linux header hacks, clang2py can't deal with __counted_by()
sed -i 's| __counted_by(.*);|; //\0|' linux/drivers/gpu/drm/amd/include/pptable.h
sed -i 's| __counted_by(.*);|; //\0|' linux/drivers/gpu/drm/amd/include/atomfirmware.h
sed -i 's| __counted_by(.*);|; //\0|' linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h
sed -i 's|#include "hwmgr.h"|//\0|' linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h
## atombios.py
clang2py -k 's' --clang-args="\
--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
" \
-s struct__ATOM_COMMON_TABLE_HEADER -s struct__ATOM_MASTER_DATA_TABLE \
-s struct__ATOM_ROM_HEADER -s struct__ATOM_ROM_HEADER_V2_1 \
linux/drivers/gpu/drm/amd/include/atombios.h > atombios.py
## pptable_v1_0.py (Polaris/Tonga)
clang2py -k 'mst' \
--clang-args="\
--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atombios.h
" \
linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h > pptable_v1_0.py
## vega10_pptable.py (Vega10 aka Vega 56/64)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/include/atombios.h" \
linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h > vega10_pptable.py
## vega20_pptable.py (Vega20 aka Radeon7)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/powerplay/inc/smu11_driver_if.h " \
linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_pptable.h > vega20_pptable.py
## smu_v11_0_navi10.py (Navi10/14)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h > smu_v11_0_navi10.py
## smu_v11_0_arcturus.py (MI100)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h > smu_v11_0_arcturus.py
## smu_v11_0_navi20.py (Navi2x)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_7_pptable.h > smu_v11_0_7_navi20.py
## smu_v13_0 (Navi 3x)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0_7_pptable.h > smu_v13_0_7_navi30.py
## smu_v14_0 (Navi 4x)
clang2py -k 'mste' \
--clang-args="--include stdint.h \
--include linux/drivers/gpu/drm/amd/include/atom-types.h \
--include linux/drivers/gpu/drm/amd/include/atomfirmware.h \
--include linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h " \
linux/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h > smu_v14_0_2_navi40.py
## Linux source cleanup
pushd linux
git checkout \
drivers/gpu/drm/amd/include/pptable.h \
drivers/gpu/drm/amd/include/atomfirmware.h \
drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h
popd
================================================
FILE: src/upp/atom_gen/__init__.py
================================================
================================================
FILE: src/upp/atom_gen/atombios.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
class struct__ATOM_COMMON_TABLE_HEADER(Structure):
pass
struct__ATOM_COMMON_TABLE_HEADER._pack_ = 1 # source:False
struct__ATOM_COMMON_TABLE_HEADER._fields_ = [
('usStructureSize', ctypes.c_uint16),
('ucTableFormatRevision', ctypes.c_ubyte),
('ucTableContentRevision', ctypes.c_ubyte),
]
class struct__ATOM_ROM_HEADER(Structure):
pass
ATOM_COMMON_TABLE_HEADER = struct__ATOM_COMMON_TABLE_HEADER
struct__ATOM_ROM_HEADER._pack_ = 1 # source:False
struct__ATOM_ROM_HEADER._fields_ = [
('sHeader', ATOM_COMMON_TABLE_HEADER),
('uaFirmWareSignature', ctypes.c_ubyte * 4),
('usBiosRuntimeSegmentAddress', ctypes.c_uint16),
('usProtectedModeInfoOffset', ctypes.c_uint16),
('usConfigFilenameOffset', ctypes.c_uint16),
('usCRC_BlockOffset', ctypes.c_uint16),
('usBIOS_BootupMessageOffset', ctypes.c_uint16),
('usInt10Offset', ctypes.c_uint16),
('usPciBusDevInitCode', ctypes.c_uint16),
('usIoBaseAddress', ctypes.c_uint16),
('usSubsystemVendorID', ctypes.c_uint16),
('usSubsystemID', ctypes.c_uint16),
('usPCI_InfoOffset', ctypes.c_uint16),
('usMasterCommandTableOffset', ctypes.c_uint16),
('usMasterDataTableOffset', ctypes.c_uint16),
('ucExtendedFunctionCode', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte),
]
class struct__ATOM_ROM_HEADER_V2_1(Structure):
pass
struct__ATOM_ROM_HEADER_V2_1._pack_ = 1 # source:False
struct__ATOM_ROM_HEADER_V2_1._fields_ = [
('sHeader', ATOM_COMMON_TABLE_HEADER),
('uaFirmWareSignature', ctypes.c_ubyte * 4),
('usBiosRuntimeSegmentAddress', ctypes.c_uint16),
('usProtectedModeInfoOffset', ctypes.c_uint16),
('usConfigFilenameOffset', ctypes.c_uint16),
('usCRC_BlockOffset', ctypes.c_uint16),
('usBIOS_BootupMessageOffset', ctypes.c_uint16),
('usInt10Offset', ctypes.c_uint16),
('usPciBusDevInitCode', ctypes.c_uint16),
('usIoBaseAddress', ctypes.c_uint16),
('usSubsystemVendorID', ctypes.c_uint16),
('usSubsystemID', ctypes.c_uint16),
('usPCI_InfoOffset', ctypes.c_uint16),
('usMasterCommandTableOffset', ctypes.c_uint16),
('usMasterDataTableOffset', ctypes.c_uint16),
('ucExtendedFunctionCode', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte),
('ulPSPDirTableOffset', ctypes.c_uint32),
]
class struct__ATOM_MASTER_DATA_TABLE(Structure):
pass
class struct__ATOM_MASTER_LIST_OF_DATA_TABLES(Structure):
pass
struct__ATOM_MASTER_LIST_OF_DATA_TABLES._pack_ = 1 # source:False
struct__ATOM_MASTER_LIST_OF_DATA_TABLES._fields_ = [
('UtilityPipeLine', ctypes.c_uint16),
('MultimediaCapabilityInfo', ctypes.c_uint16),
('MultimediaConfigInfo', ctypes.c_uint16),
('StandardVESA_Timing', ctypes.c_uint16),
('FirmwareInfo', ctypes.c_uint16),
('PaletteData', ctypes.c_uint16),
('LCD_Info', ctypes.c_uint16),
('DIGTransmitterInfo', ctypes.c_uint16),
('SMU_Info', ctypes.c_uint16),
('SupportedDevicesInfo', ctypes.c_uint16),
('GPIO_I2C_Info', ctypes.c_uint16),
('VRAM_UsageByFirmware', ctypes.c_uint16),
('GPIO_Pin_LUT', ctypes.c_uint16),
('VESA_ToInternalModeLUT', ctypes.c_uint16),
('GFX_Info', ctypes.c_uint16),
('PowerPlayInfo', ctypes.c_uint16),
('GPUVirtualizationInfo', ctypes.c_uint16),
('SaveRestoreInfo', ctypes.c_uint16),
('PPLL_SS_Info', ctypes.c_uint16),
('OemInfo', ctypes.c_uint16),
('XTMDS_Info', ctypes.c_uint16),
('MclkSS_Info', ctypes.c_uint16),
('Object_Header', ctypes.c_uint16),
('IndirectIOAccess', ctypes.c_uint16),
('MC_InitParameter', ctypes.c_uint16),
('ASIC_VDDC_Info', ctypes.c_uint16),
('ASIC_InternalSS_Info', ctypes.c_uint16),
('TV_VideoMode', ctypes.c_uint16),
('VRAM_Info', ctypes.c_uint16),
('MemoryTrainingInfo', ctypes.c_uint16),
('IntegratedSystemInfo', ctypes.c_uint16),
('ASIC_ProfilingInfo', ctypes.c_uint16),
('VoltageObjectInfo', ctypes.c_uint16),
('PowerSourceInfo', ctypes.c_uint16),
('ServiceInfo', ctypes.c_uint16),
]
ATOM_MASTER_LIST_OF_DATA_TABLES = struct__ATOM_MASTER_LIST_OF_DATA_TABLES
struct__ATOM_MASTER_DATA_TABLE._pack_ = 1 # source:False
struct__ATOM_MASTER_DATA_TABLE._fields_ = [
('sHeader', ATOM_COMMON_TABLE_HEADER),
('ListOfDataTables', ATOM_MASTER_LIST_OF_DATA_TABLES),
]
__all__ = \
['ATOM_COMMON_TABLE_HEADER', 'ATOM_MASTER_LIST_OF_DATA_TABLES',
'struct__ATOM_COMMON_TABLE_HEADER',
'struct__ATOM_MASTER_DATA_TABLE',
'struct__ATOM_MASTER_LIST_OF_DATA_TABLES',
'struct__ATOM_ROM_HEADER', 'struct__ATOM_ROM_HEADER_V2_1']
================================================
FILE: src/upp/atom_gen/pptable_v1_0.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atombios.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
TONGA_PPTABLE_H = True # macro
ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK = 0x0f # macro
ATOM_TONGA_PP_FANPARAMETERS_NOFAN = 0x80 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_NONE = 0 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_LM96163 = 17 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_TONGA = 21 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_FIJI = 22 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL = 0x89 # macro
ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL = 0x8D # macro
ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL = 0x1 # macro
ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY = 0x2 # macro
ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x4 # macro
ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND = 0x8 # macro
____RETIRE16____ = 0x10 # macro
ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC = 0x20 # macro
____RETIRE64____ = 0x40 # macro
____RETIRE128____ = 0x80 # macro
____RETIRE256____ = 0x100 # macro
____RETIRE512____ = 0x200 # macro
____RETIRE1024____ = 0x400 # macro
____RETIRE2048____ = 0x800 # macro
ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL = 0x1000 # macro
____RETIRE2000____ = 0x2000 # macro
____RETIRE4000____ = 0x4000 # macro
ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL = 0x8000 # macro
____RETIRE10000____ = 0x10000 # macro
ATOM_TONGA_PP_PLATFORM_CAP_BACO = 0x20000 # macro
ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 = 0x100000 # macro
ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL = 0x1000000 # macro
ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE = 0x2000000 # macro
ATOM_PPLIB_CLASSIFICATION_UI_MASK = 0x0007 # macro
ATOM_PPLIB_CLASSIFICATION_UI_SHIFT = 0 # macro
ATOM_PPLIB_CLASSIFICATION_UI_NONE = 0 # macro
ATOM_PPLIB_CLASSIFICATION_UI_BATTERY = 1 # macro
ATOM_PPLIB_CLASSIFICATION_UI_BALANCED = 3 # macro
ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE = 5 # macro
ATOM_PPLIB_CLASSIFICATION_BOOT = 0x0008 # macro
ATOM_PPLIB_CLASSIFICATION_THERMAL = 0x0010 # macro
ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE = 0x0020 # macro
ATOM_PPLIB_CLASSIFICATION_REST = 0x0040 # macro
ATOM_PPLIB_CLASSIFICATION_FORCED = 0x0080 # macro
ATOM_PPLIB_CLASSIFICATION_ACPI = 0x1000 # macro
ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 = 0x0001 # macro
ATOM_Tonga_DISALLOW_ON_DC = 0x00004000 # macro
ATOM_Tonga_ENABLE_VARIBRIGHT = 0x00008000 # macro
ATOM_Tonga_TABLE_REVISION_TONGA = 7 # macro
ATOM_PPM_A_A = 1 # macro
ATOM_PPM_A_I = 2 # macro
class struct__ATOM_Tonga_POWERPLAYTABLE(Structure):
pass
class struct__ATOM_COMMON_TABLE_HEADER(Structure):
pass
struct__ATOM_COMMON_TABLE_HEADER._pack_ = 1 # source:False
struct__ATOM_COMMON_TABLE_HEADER._fields_ = [
('usStructureSize', ctypes.c_uint16),
('ucTableFormatRevision', ctypes.c_ubyte),
('ucTableContentRevision', ctypes.c_ubyte),
]
struct__ATOM_Tonga_POWERPLAYTABLE._pack_ = 1 # source:False
struct__ATOM_Tonga_POWERPLAYTABLE._fields_ = [
('sHeader', struct__ATOM_COMMON_TABLE_HEADER),
('ucTableRevision', ctypes.c_ubyte),
('usTableSize', ctypes.c_uint16),
('ulGoldenPPID', ctypes.c_uint32),
('ulGoldenRevision', ctypes.c_uint32),
('usFormatID', ctypes.c_uint16),
('usVoltageTime', ctypes.c_uint16),
('ulPlatformCaps', ctypes.c_uint32),
('ulMaxODEngineClock', ctypes.c_uint32),
('ulMaxODMemoryClock', ctypes.c_uint32),
('usPowerControlLimit', ctypes.c_uint16),
('usUlvVoltageOffset', ctypes.c_uint16),
('usStateArrayOffset', ctypes.c_uint16),
('usFanTableOffset', ctypes.c_uint16),
('usThermalControllerOffset', ctypes.c_uint16),
('usReserv', ctypes.c_uint16),
('usMclkDependencyTableOffset', ctypes.c_uint16),
('usSclkDependencyTableOffset', ctypes.c_uint16),
('usVddcLookupTableOffset', ctypes.c_uint16),
('usVddgfxLookupTableOffset', ctypes.c_uint16),
('usMMDependencyTableOffset', ctypes.c_uint16),
('usVCEStateTableOffset', ctypes.c_uint16),
('usPPMTableOffset', ctypes.c_uint16),
('usPowerTuneTableOffset', ctypes.c_uint16),
('usHardLimitTableOffset', ctypes.c_uint16),
('usPCIETableOffset', ctypes.c_uint16),
('usGPIOTableOffset', ctypes.c_uint16),
('usReserved', ctypes.c_uint16 * 6),
]
ATOM_Tonga_POWERPLAYTABLE = struct__ATOM_Tonga_POWERPLAYTABLE
class struct__ATOM_Tonga_State(Structure):
pass
struct__ATOM_Tonga_State._pack_ = 1 # source:False
struct__ATOM_Tonga_State._fields_ = [
('ucEngineClockIndexHigh', ctypes.c_ubyte),
('ucEngineClockIndexLow', ctypes.c_ubyte),
('ucMemoryClockIndexHigh', ctypes.c_ubyte),
('ucMemoryClockIndexLow', ctypes.c_ubyte),
('ucPCIEGenLow', ctypes.c_ubyte),
('ucPCIEGenHigh', ctypes.c_ubyte),
('ucPCIELaneLow', ctypes.c_ubyte),
('ucPCIELaneHigh', ctypes.c_ubyte),
('usClassification', ctypes.c_uint16),
('ulCapsAndSettings', ctypes.c_uint32),
('usClassification2', ctypes.c_uint16),
('ucUnused', ctypes.c_ubyte * 4),
]
ATOM_Tonga_State = struct__ATOM_Tonga_State
class struct__ATOM_Tonga_State_Array(Structure):
pass
struct__ATOM_Tonga_State_Array._pack_ = 1 # source:False
struct__ATOM_Tonga_State_Array._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_State * 0),
]
ATOM_Tonga_State_Array = struct__ATOM_Tonga_State_Array
class struct__ATOM_Tonga_MCLK_Dependency_Record(Structure):
pass
struct__ATOM_Tonga_MCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_MCLK_Dependency_Record._fields_ = [
('ucVddcInd', ctypes.c_ubyte),
('usVddci', ctypes.c_uint16),
('usVddgfxOffset', ctypes.c_uint16),
('usMvdd', ctypes.c_uint16),
('ulMclk', ctypes.c_uint32),
('usReserved', ctypes.c_uint16),
]
ATOM_Tonga_MCLK_Dependency_Record = struct__ATOM_Tonga_MCLK_Dependency_Record
class struct__ATOM_Tonga_MCLK_Dependency_Table(Structure):
pass
struct__ATOM_Tonga_MCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_MCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_MCLK_Dependency_Record * 0),
]
ATOM_Tonga_MCLK_Dependency_Table = struct__ATOM_Tonga_MCLK_Dependency_Table
class struct__ATOM_Tonga_SCLK_Dependency_Record(Structure):
pass
struct__ATOM_Tonga_SCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_SCLK_Dependency_Record._fields_ = [
('ucVddInd', ctypes.c_ubyte),
('usVddcOffset', ctypes.c_uint16),
('ulSclk', ctypes.c_uint32),
('usEdcCurrent', ctypes.c_uint16),
('ucReliabilityTemperature', ctypes.c_ubyte),
('ucCKSVOffsetandDisable', ctypes.c_ubyte),
]
ATOM_Tonga_SCLK_Dependency_Record = struct__ATOM_Tonga_SCLK_Dependency_Record
class struct__ATOM_Tonga_SCLK_Dependency_Table(Structure):
pass
struct__ATOM_Tonga_SCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_SCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_SCLK_Dependency_Record * 0),
]
ATOM_Tonga_SCLK_Dependency_Table = struct__ATOM_Tonga_SCLK_Dependency_Table
class struct__ATOM_Polaris_SCLK_Dependency_Record(Structure):
pass
struct__ATOM_Polaris_SCLK_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Polaris_SCLK_Dependency_Record._fields_ = [
('ucVddInd', ctypes.c_ubyte),
('usVddcOffset', ctypes.c_uint16),
('ulSclk', ctypes.c_uint32),
('usEdcCurrent', ctypes.c_uint16),
('ucReliabilityTemperature', ctypes.c_ubyte),
('ucCKSVOffsetandDisable', ctypes.c_ubyte),
('ulSclkOffset', ctypes.c_uint32),
]
ATOM_Polaris_SCLK_Dependency_Record = struct__ATOM_Polaris_SCLK_Dependency_Record
class struct__ATOM_Polaris_SCLK_Dependency_Table(Structure):
pass
struct__ATOM_Polaris_SCLK_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Polaris_SCLK_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Polaris_SCLK_Dependency_Record * 0),
]
ATOM_Polaris_SCLK_Dependency_Table = struct__ATOM_Polaris_SCLK_Dependency_Table
class struct__ATOM_Tonga_PCIE_Record(Structure):
pass
struct__ATOM_Tonga_PCIE_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_PCIE_Record._fields_ = [
('ucPCIEGenSpeed', ctypes.c_ubyte),
('usPCIELaneWidth', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte * 2),
]
ATOM_Tonga_PCIE_Record = struct__ATOM_Tonga_PCIE_Record
class struct__ATOM_Tonga_PCIE_Table(Structure):
pass
struct__ATOM_Tonga_PCIE_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_PCIE_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_PCIE_Record * 0),
]
ATOM_Tonga_PCIE_Table = struct__ATOM_Tonga_PCIE_Table
class struct__ATOM_Polaris10_PCIE_Record(Structure):
pass
struct__ATOM_Polaris10_PCIE_Record._pack_ = 1 # source:False
struct__ATOM_Polaris10_PCIE_Record._fields_ = [
('ucPCIEGenSpeed', ctypes.c_ubyte),
('usPCIELaneWidth', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte * 2),
('ulPCIE_Sclk', ctypes.c_uint32),
]
ATOM_Polaris10_PCIE_Record = struct__ATOM_Polaris10_PCIE_Record
class struct__ATOM_Polaris10_PCIE_Table(Structure):
pass
struct__ATOM_Polaris10_PCIE_Table._pack_ = 1 # source:False
struct__ATOM_Polaris10_PCIE_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Polaris10_PCIE_Record * 0),
]
ATOM_Polaris10_PCIE_Table = struct__ATOM_Polaris10_PCIE_Table
class struct__ATOM_Tonga_MM_Dependency_Record(Structure):
pass
struct__ATOM_Tonga_MM_Dependency_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_MM_Dependency_Record._fields_ = [
('ucVddcInd', ctypes.c_ubyte),
('usVddgfxOffset', ctypes.c_uint16),
('ulDClk', ctypes.c_uint32),
('ulVClk', ctypes.c_uint32),
('ulEClk', ctypes.c_uint32),
('ulAClk', ctypes.c_uint32),
('ulSAMUClk', ctypes.c_uint32),
]
ATOM_Tonga_MM_Dependency_Record = struct__ATOM_Tonga_MM_Dependency_Record
class struct__ATOM_Tonga_MM_Dependency_Table(Structure):
pass
struct__ATOM_Tonga_MM_Dependency_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_MM_Dependency_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_MM_Dependency_Record * 0),
]
ATOM_Tonga_MM_Dependency_Table = struct__ATOM_Tonga_MM_Dependency_Table
class struct__ATOM_Tonga_Voltage_Lookup_Record(Structure):
pass
struct__ATOM_Tonga_Voltage_Lookup_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_Voltage_Lookup_Record._fields_ = [
('usVdd', ctypes.c_uint16),
('usCACLow', ctypes.c_uint16),
('usCACMid', ctypes.c_uint16),
('usCACHigh', ctypes.c_uint16),
]
ATOM_Tonga_Voltage_Lookup_Record = struct__ATOM_Tonga_Voltage_Lookup_Record
class struct__ATOM_Tonga_Voltage_Lookup_Table(Structure):
pass
struct__ATOM_Tonga_Voltage_Lookup_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_Voltage_Lookup_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_Voltage_Lookup_Record * 0),
]
ATOM_Tonga_Voltage_Lookup_Table = struct__ATOM_Tonga_Voltage_Lookup_Table
class struct__ATOM_Tonga_Fan_Table(Structure):
pass
struct__ATOM_Tonga_Fan_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_Fan_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucTHyst', ctypes.c_ubyte),
('usTMin', ctypes.c_uint16),
('usTMed', ctypes.c_uint16),
('usTHigh', ctypes.c_uint16),
('usPWMMin', ctypes.c_uint16),
('usPWMMed', ctypes.c_uint16),
('usPWMHigh', ctypes.c_uint16),
('usTMax', ctypes.c_uint16),
('ucFanControlMode', ctypes.c_ubyte),
('usFanPWMMax', ctypes.c_uint16),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanRPMMax', ctypes.c_uint16),
('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),
('ucTargetTemperature', ctypes.c_ubyte),
('ucMinimumPWMLimit', ctypes.c_ubyte),
('usReserved', ctypes.c_uint16),
]
ATOM_Tonga_Fan_Table = struct__ATOM_Tonga_Fan_Table
class struct__ATOM_Fiji_Fan_Table(Structure):
pass
struct__ATOM_Fiji_Fan_Table._pack_ = 1 # source:False
struct__ATOM_Fiji_Fan_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucTHyst', ctypes.c_ubyte),
('usTMin', ctypes.c_uint16),
('usTMed', ctypes.c_uint16),
('usTHigh', ctypes.c_uint16),
('usPWMMin', ctypes.c_uint16),
('usPWMMed', ctypes.c_uint16),
('usPWMHigh', ctypes.c_uint16),
('usTMax', ctypes.c_uint16),
('ucFanControlMode', ctypes.c_ubyte),
('usFanPWMMax', ctypes.c_uint16),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanRPMMax', ctypes.c_uint16),
('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),
('ucTargetTemperature', ctypes.c_ubyte),
('ucMinimumPWMLimit', ctypes.c_ubyte),
('usFanGainEdge', ctypes.c_uint16),
('usFanGainHotspot', ctypes.c_uint16),
('usFanGainLiquid', ctypes.c_uint16),
('usFanGainVrVddc', ctypes.c_uint16),
('usFanGainVrMvdd', ctypes.c_uint16),
('usFanGainPlx', ctypes.c_uint16),
('usFanGainHbm', ctypes.c_uint16),
('usReserved', ctypes.c_uint16),
]
ATOM_Fiji_Fan_Table = struct__ATOM_Fiji_Fan_Table
class struct__ATOM_Polaris_Fan_Table(Structure):
pass
struct__ATOM_Polaris_Fan_Table._pack_ = 1 # source:False
struct__ATOM_Polaris_Fan_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucTHyst', ctypes.c_ubyte),
('usTMin', ctypes.c_uint16),
('usTMed', ctypes.c_uint16),
('usTHigh', ctypes.c_uint16),
('usPWMMin', ctypes.c_uint16),
('usPWMMed', ctypes.c_uint16),
('usPWMHigh', ctypes.c_uint16),
('usTMax', ctypes.c_uint16),
('ucFanControlMode', ctypes.c_ubyte),
('usFanPWMMax', ctypes.c_uint16),
('usFanOutputSensitivity', ctypes.c_uint16),
('usFanRPMMax', ctypes.c_uint16),
('ulMinFanSCLKAcousticLimit', ctypes.c_uint32),
('ucTargetTemperature', ctypes.c_ubyte),
('ucMinimumPWMLimit', ctypes.c_ubyte),
('usFanGainEdge', ctypes.c_uint16),
('usFanGainHotspot', ctypes.c_uint16),
('usFanGainLiquid', ctypes.c_uint16),
('usFanGainVrVddc', ctypes.c_uint16),
('usFanGainVrMvdd', ctypes.c_uint16),
('usFanGainPlx', ctypes.c_uint16),
('usFanGainHbm', ctypes.c_uint16),
('ucEnableZeroRPM', ctypes.c_ubyte),
('ucFanStopTemperature', ctypes.c_ubyte),
('ucFanStartTemperature', ctypes.c_ubyte),
('usReserved', ctypes.c_uint16),
]
ATOM_Polaris_Fan_Table = struct__ATOM_Polaris_Fan_Table
class struct__ATOM_Tonga_Thermal_Controller(Structure):
pass
struct__ATOM_Tonga_Thermal_Controller._pack_ = 1 # source:False
struct__ATOM_Tonga_Thermal_Controller._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucType', ctypes.c_ubyte),
('ucI2cLine', ctypes.c_ubyte),
('ucI2cAddress', ctypes.c_ubyte),
('ucFanParameters', ctypes.c_ubyte),
('ucFanMinRPM', ctypes.c_ubyte),
('ucFanMaxRPM', ctypes.c_ubyte),
('ucReserved', ctypes.c_ubyte),
('ucFlags', ctypes.c_ubyte),
]
ATOM_Tonga_Thermal_Controller = struct__ATOM_Tonga_Thermal_Controller
class struct__ATOM_Tonga_VCE_State_Record(Structure):
pass
struct__ATOM_Tonga_VCE_State_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_VCE_State_Record._fields_ = [
('ucVCEClockIndex', ctypes.c_ubyte),
('ucFlag', ctypes.c_ubyte),
('ucSCLKIndex', ctypes.c_ubyte),
('ucMCLKIndex', ctypes.c_ubyte),
]
ATOM_Tonga_VCE_State_Record = struct__ATOM_Tonga_VCE_State_Record
class struct__ATOM_Tonga_VCE_State_Table(Structure):
pass
struct__ATOM_Tonga_VCE_State_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_VCE_State_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_VCE_State_Record * 0),
]
ATOM_Tonga_VCE_State_Table = struct__ATOM_Tonga_VCE_State_Table
class struct__ATOM_Tonga_PowerTune_Table(Structure):
pass
struct__ATOM_Tonga_PowerTune_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_PowerTune_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usTDP', ctypes.c_uint16),
('usConfigurableTDP', ctypes.c_uint16),
('usTDC', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usLowCACLeakage', ctypes.c_uint16),
('usHighCACLeakage', ctypes.c_uint16),
('usMaximumPowerDeliveryLimit', ctypes.c_uint16),
('usTjMax', ctypes.c_uint16),
('usPowerTuneDataSetID', ctypes.c_uint16),
('usEDCLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usClockStretchAmount', ctypes.c_uint16),
('usReserve', ctypes.c_uint16 * 2),
]
ATOM_Tonga_PowerTune_Table = struct__ATOM_Tonga_PowerTune_Table
class struct__ATOM_Fiji_PowerTune_Table(Structure):
pass
struct__ATOM_Fiji_PowerTune_Table._pack_ = 1 # source:False
struct__ATOM_Fiji_PowerTune_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usTDP', ctypes.c_uint16),
('usConfigurableTDP', ctypes.c_uint16),
('usTDC', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usLowCACLeakage', ctypes.c_uint16),
('usHighCACLeakage', ctypes.c_uint16),
('usMaximumPowerDeliveryLimit', ctypes.c_uint16),
('usTjMax', ctypes.c_uint16),
('usPowerTuneDataSetID', ctypes.c_uint16),
('usEDCLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usClockStretchAmount', ctypes.c_uint16),
('usTemperatureLimitHotspot', ctypes.c_uint16),
('usTemperatureLimitLiquid1', ctypes.c_uint16),
('usTemperatureLimitLiquid2', ctypes.c_uint16),
('usTemperatureLimitVrVddc', ctypes.c_uint16),
('usTemperatureLimitVrMvdd', ctypes.c_uint16),
('usTemperatureLimitPlx', ctypes.c_uint16),
('ucLiquid1_I2C_address', ctypes.c_ubyte),
('ucLiquid2_I2C_address', ctypes.c_ubyte),
('ucLiquid_I2C_Line', ctypes.c_ubyte),
('ucVr_I2C_address', ctypes.c_ubyte),
('ucVr_I2C_Line', ctypes.c_ubyte),
('ucPlx_I2C_address', ctypes.c_ubyte),
('ucPlx_I2C_Line', ctypes.c_ubyte),
('usReserved', ctypes.c_uint16),
]
ATOM_Fiji_PowerTune_Table = struct__ATOM_Fiji_PowerTune_Table
class struct__ATOM_Polaris_PowerTune_Table(Structure):
pass
struct__ATOM_Polaris_PowerTune_Table._pack_ = 1 # source:False
struct__ATOM_Polaris_PowerTune_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('usTDP', ctypes.c_uint16),
('usConfigurableTDP', ctypes.c_uint16),
('usTDC', ctypes.c_uint16),
('usBatteryPowerLimit', ctypes.c_uint16),
('usSmallPowerLimit', ctypes.c_uint16),
('usLowCACLeakage', ctypes.c_uint16),
('usHighCACLeakage', ctypes.c_uint16),
('usMaximumPowerDeliveryLimit', ctypes.c_uint16),
('usTjMax', ctypes.c_uint16),
('usPowerTuneDataSetID', ctypes.c_uint16),
('usEDCLimit', ctypes.c_uint16),
('usSoftwareShutdownTemp', ctypes.c_uint16),
('usClockStretchAmount', ctypes.c_uint16),
('usTemperatureLimitHotspot', ctypes.c_uint16),
('usTemperatureLimitLiquid1', ctypes.c_uint16),
('usTemperatureLimitLiquid2', ctypes.c_uint16),
('usTemperatureLimitVrVddc', ctypes.c_uint16),
('usTemperatureLimitVrMvdd', ctypes.c_uint16),
('usTemperatureLimitPlx', ctypes.c_uint16),
('ucLiquid1_I2C_address', ctypes.c_ubyte),
('ucLiquid2_I2C_address', ctypes.c_ubyte),
('ucLiquid_I2C_Line', ctypes.c_ubyte),
('ucVr_I2C_address', ctypes.c_ubyte),
('ucVr_I2C_Line', ctypes.c_ubyte),
('ucPlx_I2C_address', ctypes.c_ubyte),
('ucPlx_I2C_Line', ctypes.c_ubyte),
('usBoostPowerLimit', ctypes.c_uint16),
('ucCKS_LDO_REFSEL', ctypes.c_ubyte),
('ucHotSpotOnly', ctypes.c_ubyte),
('ucReserve', ctypes.c_ubyte),
('usReserve', ctypes.c_uint16),
]
ATOM_Polaris_PowerTune_Table = struct__ATOM_Polaris_PowerTune_Table
class struct__ATOM_Tonga_PPM_Table(Structure):
pass
struct__ATOM_Tonga_PPM_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_PPM_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucPpmDesign', ctypes.c_ubyte),
('usCpuCoreNumber', ctypes.c_uint16),
('ulPlatformTDP', ctypes.c_uint32),
('ulSmallACPlatformTDP', ctypes.c_uint32),
('ulPlatformTDC', ctypes.c_uint32),
('ulSmallACPlatformTDC', ctypes.c_uint32),
('ulApuTDP', ctypes.c_uint32),
('ulDGpuTDP', ctypes.c_uint32),
('ulDGpuUlvPower', ctypes.c_uint32),
('ulTjmax', ctypes.c_uint32),
]
ATOM_Tonga_PPM_Table = struct__ATOM_Tonga_PPM_Table
class struct__ATOM_Tonga_Hard_Limit_Record(Structure):
pass
struct__ATOM_Tonga_Hard_Limit_Record._pack_ = 1 # source:False
struct__ATOM_Tonga_Hard_Limit_Record._fields_ = [
('ulSCLKLimit', ctypes.c_uint32),
('ulMCLKLimit', ctypes.c_uint32),
('usVddcLimit', ctypes.c_uint16),
('usVddciLimit', ctypes.c_uint16),
('usVddgfxLimit', ctypes.c_uint16),
]
ATOM_Tonga_Hard_Limit_Record = struct__ATOM_Tonga_Hard_Limit_Record
class struct__ATOM_Tonga_Hard_Limit_Table(Structure):
pass
struct__ATOM_Tonga_Hard_Limit_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_Hard_Limit_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucNumEntries', ctypes.c_ubyte),
('entries', struct__ATOM_Tonga_Hard_Limit_Record * 0),
]
ATOM_Tonga_Hard_Limit_Table = struct__ATOM_Tonga_Hard_Limit_Table
class struct__ATOM_Tonga_GPIO_Table(Structure):
pass
struct__ATOM_Tonga_GPIO_Table._pack_ = 1 # source:False
struct__ATOM_Tonga_GPIO_Table._fields_ = [
('ucRevId', ctypes.c_ubyte),
('ucVRHotTriggeredSclkDpmIndex', ctypes.c_ubyte),
('ucReserve', ctypes.c_ubyte * 5),
]
ATOM_Tonga_GPIO_Table = struct__ATOM_Tonga_GPIO_Table
class struct__PPTable_Generic_SubTable_Header(Structure):
pass
struct__PPTable_Generic_SubTable_Header._pack_ = 1 # source:False
struct__PPTable_Generic_SubTable_Header._fields_ = [
('ucRevId', ctypes.c_ubyte),
]
PPTable_Generic_SubTable_Header = struct__PPTable_Generic_SubTable_Header
__all__ = \
['ATOM_Fiji_Fan_Table', 'ATOM_Fiji_PowerTune_Table',
'ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2',
'ATOM_PPLIB_CLASSIFICATION_ACPI',
'ATOM_PPLIB_CLASSIFICATION_BOOT',
'ATOM_PPLIB_CLASSIFICATION_FORCED',
'ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE',
'ATOM_PPLIB_CLASSIFICATION_REST',
'ATOM_PPLIB_CLASSIFICATION_THERMAL',
'ATOM_PPLIB_CLASSIFICATION_UI_BALANCED',
'ATOM_PPLIB_CLASSIFICATION_UI_BATTERY',
'ATOM_PPLIB_CLASSIFICATION_UI_MASK',
'ATOM_PPLIB_CLASSIFICATION_UI_NONE',
'ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE',
'ATOM_PPLIB_CLASSIFICATION_UI_SHIFT', 'ATOM_PPM_A_A',
'ATOM_PPM_A_I', 'ATOM_Polaris10_PCIE_Record',
'ATOM_Polaris10_PCIE_Table', 'ATOM_Polaris_Fan_Table',
'ATOM_Polaris_PowerTune_Table',
'ATOM_Polaris_SCLK_Dependency_Record',
'ATOM_Polaris_SCLK_Dependency_Table',
'ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE',
'ATOM_TONGA_PP_FANPARAMETERS_NOFAN',
'ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK',
'ATOM_TONGA_PP_PLATFORM_CAP_BACO',
'ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND',
'ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC',
'ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL',
'ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17',
'ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY',
'ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL',
'ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL',
'ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL',
'ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL',
'ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL',
'ATOM_TONGA_PP_THERMALCONTROLLER_FIJI',
'ATOM_TONGA_PP_THERMALCONTROLLER_LM96163',
'ATOM_TONGA_PP_THERMALCONTROLLER_NONE',
'ATOM_TONGA_PP_THERMALCONTROLLER_TONGA',
'ATOM_Tonga_DISALLOW_ON_DC', 'ATOM_Tonga_ENABLE_VARIBRIGHT',
'ATOM_Tonga_Fan_Table', 'ATOM_Tonga_GPIO_Table',
'ATOM_Tonga_Hard_Limit_Record', 'ATOM_Tonga_Hard_Limit_Table',
'ATOM_Tonga_MCLK_Dependency_Record',
'ATOM_Tonga_MCLK_Dependency_Table',
'ATOM_Tonga_MM_Dependency_Record',
'ATOM_Tonga_MM_Dependency_Table', 'ATOM_Tonga_PCIE_Record',
'ATOM_Tonga_PCIE_Table', 'ATOM_Tonga_POWERPLAYTABLE',
'ATOM_Tonga_PPM_Table', 'ATOM_Tonga_PowerTune_Table',
'ATOM_Tonga_SCLK_Dependency_Record',
'ATOM_Tonga_SCLK_Dependency_Table', 'ATOM_Tonga_State',
'ATOM_Tonga_State_Array', 'ATOM_Tonga_TABLE_REVISION_TONGA',
'ATOM_Tonga_Thermal_Controller', 'ATOM_Tonga_VCE_State_Record',
'ATOM_Tonga_VCE_State_Table', 'ATOM_Tonga_Voltage_Lookup_Record',
'ATOM_Tonga_Voltage_Lookup_Table',
'PPTable_Generic_SubTable_Header', 'TONGA_PPTABLE_H',
'____RETIRE10000____', '____RETIRE1024____', '____RETIRE128____',
'____RETIRE16____', '____RETIRE2000____', '____RETIRE2048____',
'____RETIRE256____', '____RETIRE4000____', '____RETIRE512____',
'____RETIRE64____', 'struct__ATOM_COMMON_TABLE_HEADER',
'struct__ATOM_Fiji_Fan_Table',
'struct__ATOM_Fiji_PowerTune_Table',
'struct__ATOM_Polaris10_PCIE_Record',
'struct__ATOM_Polaris10_PCIE_Table',
'struct__ATOM_Polaris_Fan_Table',
'struct__ATOM_Polaris_PowerTune_Table',
'struct__ATOM_Polaris_SCLK_Dependency_Record',
'struct__ATOM_Polaris_SCLK_Dependency_Table',
'struct__ATOM_Tonga_Fan_Table', 'struct__ATOM_Tonga_GPIO_Table',
'struct__ATOM_Tonga_Hard_Limit_Record',
'struct__ATOM_Tonga_Hard_Limit_Table',
'struct__ATOM_Tonga_MCLK_Dependency_Record',
'struct__ATOM_Tonga_MCLK_Dependency_Table',
'struct__ATOM_Tonga_MM_Dependency_Record',
'struct__ATOM_Tonga_MM_Dependency_Table',
'struct__ATOM_Tonga_PCIE_Record', 'struct__ATOM_Tonga_PCIE_Table',
'struct__ATOM_Tonga_POWERPLAYTABLE',
'struct__ATOM_Tonga_PPM_Table',
'struct__ATOM_Tonga_PowerTune_Table',
'struct__ATOM_Tonga_SCLK_Dependency_Record',
'struct__ATOM_Tonga_SCLK_Dependency_Table',
'struct__ATOM_Tonga_State', 'struct__ATOM_Tonga_State_Array',
'struct__ATOM_Tonga_Thermal_Controller',
'struct__ATOM_Tonga_VCE_State_Record',
'struct__ATOM_Tonga_VCE_State_Table',
'struct__ATOM_Tonga_Voltage_Lookup_Record',
'struct__ATOM_Tonga_Voltage_Lookup_Table',
'struct__PPTable_Generic_SubTable_Header']
================================================
FILE: src/upp/atom_gen/smu_v11_0_7_navi20.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_11_0_7_PPTABLE_H = True # macro
SMU_11_0_7_TABLE_FORMAT_REVISION = 15 # macro
SMU_11_0_7_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_11_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_11_0_7_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_11_0_7_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_11_0_7_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_11_0_7_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_11_0_7_PP_THERMALCONTROLLER_SIENNA_CICHLID = 28 # macro
SMU_11_0_7_PP_OVERDRIVE_VERSION = 0x81 # macro
SMU_11_0_7_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro
SMU_11_0_7_MAX_ODFEATURE = 32 # macro
SMU_11_0_7_MAX_ODSETTING = 64 # macro
SMU_11_0_7_MAX_PMSETTING = 32 # macro
SMU_11_0_7_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_11_0_7_ODFEATURE_CAP'
SMU_11_0_7_ODFEATURE_CAP__enumvalues = {
0: 'SMU_11_0_7_ODCAP_GFXCLK_LIMITS',
1: 'SMU_11_0_7_ODCAP_GFXCLK_CURVE',
2: 'SMU_11_0_7_ODCAP_UCLK_LIMITS',
3: 'SMU_11_0_7_ODCAP_POWER_LIMIT',
4: 'SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',
5: 'SMU_11_0_7_ODCAP_FAN_SPEED_MIN',
6: 'SMU_11_0_7_ODCAP_TEMPERATURE_FAN',
7: 'SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM',
8: 'SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE',
9: 'SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',
10: 'SMU_11_0_7_ODCAP_AUTO_UV_ENGINE',
11: 'SMU_11_0_7_ODCAP_AUTO_OC_ENGINE',
12: 'SMU_11_0_7_ODCAP_AUTO_OC_MEMORY',
13: 'SMU_11_0_7_ODCAP_FAN_CURVE',
14: 'SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
15: 'SMU_11_0_7_ODCAP_POWER_MODE',
16: 'SMU_11_0_7_ODCAP_COUNT',
}
SMU_11_0_7_ODCAP_GFXCLK_LIMITS = 0
SMU_11_0_7_ODCAP_GFXCLK_CURVE = 1
SMU_11_0_7_ODCAP_UCLK_LIMITS = 2
SMU_11_0_7_ODCAP_POWER_LIMIT = 3
SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT = 4
SMU_11_0_7_ODCAP_FAN_SPEED_MIN = 5
SMU_11_0_7_ODCAP_TEMPERATURE_FAN = 6
SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM = 7
SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE = 8
SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL = 9
SMU_11_0_7_ODCAP_AUTO_UV_ENGINE = 10
SMU_11_0_7_ODCAP_AUTO_OC_ENGINE = 11
SMU_11_0_7_ODCAP_AUTO_OC_MEMORY = 12
SMU_11_0_7_ODCAP_FAN_CURVE = 13
SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 14
SMU_11_0_7_ODCAP_POWER_MODE = 15
SMU_11_0_7_ODCAP_COUNT = 16
SMU_11_0_7_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_7_ODFEATURE_ID'
SMU_11_0_7_ODFEATURE_ID__enumvalues = {
1: 'SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_11_0_7_ODFEATURE_GFXCLK_CURVE',
4: 'SMU_11_0_7_ODFEATURE_UCLK_LIMITS',
8: 'SMU_11_0_7_ODFEATURE_POWER_LIMIT',
16: 'SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',
32: 'SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN',
64: 'SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN',
128: 'SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM',
256: 'SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE',
512: 'SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',
1024: 'SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE',
2048: 'SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE',
4096: 'SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY',
8192: 'SMU_11_0_7_ODFEATURE_FAN_CURVE',
16384: 'SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
32768: 'SMU_11_0_7_ODFEATURE_POWER_MODE',
16: 'SMU_11_0_7_ODFEATURE_COUNT',
}
SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS = 1
SMU_11_0_7_ODFEATURE_GFXCLK_CURVE = 2
SMU_11_0_7_ODFEATURE_UCLK_LIMITS = 4
SMU_11_0_7_ODFEATURE_POWER_LIMIT = 8
SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16
SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN = 32
SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN = 64
SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM = 128
SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE = 256
SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512
SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE = 1024
SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE = 2048
SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY = 4096
SMU_11_0_7_ODFEATURE_FAN_CURVE = 8192
SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 16384
SMU_11_0_7_ODFEATURE_POWER_MODE = 32768
SMU_11_0_7_ODFEATURE_COUNT = 16
SMU_11_0_7_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_7_ODSETTING_ID'
SMU_11_0_7_ODSETTING_ID__enumvalues = {
0: 'SMU_11_0_7_ODSETTING_GFXCLKFMAX',
1: 'SMU_11_0_7_ODSETTING_GFXCLKFMIN',
2: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A',
3: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B',
4: 'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C',
5: 'SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN',
6: 'SMU_11_0_7_ODSETTING_UCLKFMIN',
7: 'SMU_11_0_7_ODSETTING_UCLKFMAX',
8: 'SMU_11_0_7_ODSETTING_POWERPERCENTAGE',
9: 'SMU_11_0_7_ODSETTING_FANRPMMIN',
10: 'SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT',
11: 'SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE',
12: 'SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX',
13: 'SMU_11_0_7_ODSETTING_ACTIMING',
14: 'SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',
15: 'SMU_11_0_7_ODSETTING_AUTOUVENGINE',
16: 'SMU_11_0_7_ODSETTING_AUTOOCENGINE',
17: 'SMU_11_0_7_ODSETTING_AUTOOCMEMORY',
18: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',
19: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1',
20: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',
21: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2',
22: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',
23: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3',
24: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',
25: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4',
26: 'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',
27: 'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5',
28: 'SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
29: 'SMU_11_0_7_ODSETTING_POWER_MODE',
30: 'SMU_11_0_7_ODSETTING_COUNT',
}
SMU_11_0_7_ODSETTING_GFXCLKFMAX = 0
SMU_11_0_7_ODSETTING_GFXCLKFMIN = 1
SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A = 2
SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B = 3
SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C = 4
SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN = 5
SMU_11_0_7_ODSETTING_UCLKFMIN = 6
SMU_11_0_7_ODSETTING_UCLKFMAX = 7
SMU_11_0_7_ODSETTING_POWERPERCENTAGE = 8
SMU_11_0_7_ODSETTING_FANRPMMIN = 9
SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT = 10
SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE = 11
SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX = 12
SMU_11_0_7_ODSETTING_ACTIMING = 13
SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL = 14
SMU_11_0_7_ODSETTING_AUTOUVENGINE = 15
SMU_11_0_7_ODSETTING_AUTOOCENGINE = 16
SMU_11_0_7_ODSETTING_AUTOOCMEMORY = 17
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1 = 18
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1 = 19
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2 = 20
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2 = 21
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3 = 22
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3 = 23
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4 = 24
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4 = 25
SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5 = 26
SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5 = 27
SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 28
SMU_11_0_7_ODSETTING_POWER_MODE = 29
SMU_11_0_7_ODSETTING_COUNT = 30
SMU_11_0_7_ODSETTING_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_7_PWRMODE_SETTING'
SMU_11_0_7_PWRMODE_SETTING__enumvalues = {
0: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET',
1: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE',
2: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO',
3: 'SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE',
4: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',
5: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',
6: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',
7: 'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',
}
SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET = 0
SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE = 1
SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO = 2
SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE = 3
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET = 4
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO = 6
SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE = 7
SMU_11_0_7_PWRMODE_SETTING = ctypes.c_uint32 # enum
class struct_smu_11_0_7_overdrive_table(Structure):
pass
struct_smu_11_0_7_overdrive_table._pack_ = 1 # source:False
struct_smu_11_0_7_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 64),
('min', ctypes.c_uint32 * 64),
('pm_setting', ctypes.c_int16 * 32),
]
# values for enumeration 'SMU_11_0_7_PPCLOCK_ID'
SMU_11_0_7_PPCLOCK_ID__enumvalues = {
0: 'SMU_11_0_7_PPCLOCK_GFXCLK',
1: 'SMU_11_0_7_PPCLOCK_SOCCLK',
2: 'SMU_11_0_7_PPCLOCK_UCLK',
3: 'SMU_11_0_7_PPCLOCK_FCLK',
4: 'SMU_11_0_7_PPCLOCK_DCLK_0',
5: 'SMU_11_0_7_PPCLOCK_VCLK_0',
6: 'SMU_11_0_7_PPCLOCK_DCLK_1',
7: 'SMU_11_0_7_PPCLOCK_VCLK_1',
8: 'SMU_11_0_7_PPCLOCK_DCEFCLK',
9: 'SMU_11_0_7_PPCLOCK_DISPCLK',
10: 'SMU_11_0_7_PPCLOCK_PIXCLK',
11: 'SMU_11_0_7_PPCLOCK_PHYCLK',
12: 'SMU_11_0_7_PPCLOCK_DTBCLK',
13: 'SMU_11_0_7_PPCLOCK_COUNT',
}
SMU_11_0_7_PPCLOCK_GFXCLK = 0
SMU_11_0_7_PPCLOCK_SOCCLK = 1
SMU_11_0_7_PPCLOCK_UCLK = 2
SMU_11_0_7_PPCLOCK_FCLK = 3
SMU_11_0_7_PPCLOCK_DCLK_0 = 4
SMU_11_0_7_PPCLOCK_VCLK_0 = 5
SMU_11_0_7_PPCLOCK_DCLK_1 = 6
SMU_11_0_7_PPCLOCK_VCLK_1 = 7
SMU_11_0_7_PPCLOCK_DCEFCLK = 8
SMU_11_0_7_PPCLOCK_DISPCLK = 9
SMU_11_0_7_PPCLOCK_PIXCLK = 10
SMU_11_0_7_PPCLOCK_PHYCLK = 11
SMU_11_0_7_PPCLOCK_DTBCLK = 12
SMU_11_0_7_PPCLOCK_COUNT = 13
SMU_11_0_7_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_7_power_saving_clock_table(Structure):
pass
struct_smu_11_0_7_power_saving_clock_table._pack_ = 1 # source:False
struct_smu_11_0_7_power_saving_clock_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('count', ctypes.c_uint32),
('max', ctypes.c_uint32 * 16),
('min', ctypes.c_uint32 * 16),
]
class struct_smu_11_0_7_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('VoltageMode', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('SsCurve', struct_QuadraticInt_t),
('SsFmin', ctypes.c_uint16),
('Padding16', ctypes.c_uint16),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_UclkDpmChangeRange_t(Structure):
pass
struct_UclkDpmChangeRange_t._pack_ = 1 # source:False
struct_UclkDpmChangeRange_t._fields_ = [
('Fmin', ctypes.c_uint16),
('Fmax', ctypes.c_uint16),
]
class struct_PiecewiseLinearDroopInt_t(Structure):
pass
struct_PiecewiseLinearDroopInt_t._pack_ = 1 # source:False
struct_PiecewiseLinearDroopInt_t._fields_ = [
('Fset', ctypes.c_uint32 * 5),
('Vdroop', ctypes.c_uint32 * 5),
]
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('SlaveAddress', ctypes.c_ubyte),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
('PaddingConfig', ctypes.c_ubyte),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('SocketPowerLimitDc', ctypes.c_uint16 * 4),
('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),
('TdcLimit', ctypes.c_uint16 * 2),
('TdcLimitTau', ctypes.c_uint16 * 2),
('TemperatureLimit', ctypes.c_uint16 * 10),
('FitLimit', ctypes.c_uint32),
('TotalPowerConfig', ctypes.c_ubyte),
('TotalPowerPadding', ctypes.c_ubyte * 3),
('ApccPlusResidencyLimit', ctypes.c_uint32),
('SmnclkDpmFreq', ctypes.c_uint16 * 2),
('SmnclkDpmVoltage', ctypes.c_uint16 * 2),
('PaddingAPCC', ctypes.c_uint32),
('PerPartDroopVsetGfxDfll', ctypes.c_uint16 * 5),
('PaddingPerPartDroop', ctypes.c_uint16),
('ThrottlerControlMask', ctypes.c_uint32),
('FwDStateMask', ctypes.c_uint32),
('UlvVoltageOffsetSoc', ctypes.c_uint16),
('UlvVoltageOffsetGfx', ctypes.c_uint16),
('MinVoltageUlvGfx', ctypes.c_uint16),
('MinVoltageUlvSoc', ctypes.c_uint16),
('SocLIVmin', ctypes.c_uint16),
('PaddingLIVmin', ctypes.c_uint16),
('GceaLinkMgrIdleThreshold', ctypes.c_ubyte),
('paddingRlcUlvParams', ctypes.c_ubyte * 3),
('MinVoltageGfx', ctypes.c_uint16),
('MinVoltageSoc', ctypes.c_uint16),
('MaxVoltageGfx', ctypes.c_uint16),
('MaxVoltageSoc', ctypes.c_uint16),
('LoadLineResistanceGfx', ctypes.c_uint16),
('LoadLineResistanceSoc', ctypes.c_uint16),
('VDDGFX_TVmin', ctypes.c_uint16),
('VDDSOC_TVmin', ctypes.c_uint16),
('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),
('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),
('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),
('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),
('VDDGFX_TVminHystersis', ctypes.c_uint16),
('VDDSOC_TVminHystersis', ctypes.c_uint16),
('DpmDescriptor', struct_DpmDescriptor_t * 13),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableDcefclk', ctypes.c_uint16 * 8),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTablePixclk', ctypes.c_uint16 * 8),
('FreqTablePhyclk', ctypes.c_uint16 * 8),
('FreqTableDtbclk', ctypes.c_uint16 * 8),
('FreqTableFclk', ctypes.c_uint16 * 8),
('Paddingclks', ctypes.c_uint32),
('PerPartDroopModelGfxDfll', struct_DroopInt_t * 5),
('DcModeMaxFreq', ctypes.c_uint32 * 13),
('FreqTableUclkDiv', ctypes.c_ubyte * 4),
('FclkBoostFreq', ctypes.c_uint16),
('FclkParamPadding', ctypes.c_uint16),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('MemVddciVoltage', ctypes.c_uint16 * 4),
('MemMvddVoltage', ctypes.c_uint16 * 4),
('GfxclkFgfxoffEntry', ctypes.c_uint16),
('GfxclkFinit', ctypes.c_uint16),
('GfxclkFidle', ctypes.c_uint16),
('GfxclkSource', ctypes.c_ubyte),
('GfxclkPadding', ctypes.c_ubyte),
('GfxGpoSubFeatureMask', ctypes.c_ubyte),
('GfxGpoEnabledWorkPolicyMask', ctypes.c_ubyte),
('GfxGpoDisabledWorkPolicyMask', ctypes.c_ubyte),
('GfxGpoPadding', ctypes.c_ubyte * 1),
('GfxGpoVotingAllow', ctypes.c_uint32),
('GfxGpoPadding32', ctypes.c_uint32 * 4),
('GfxDcsFopt', ctypes.c_uint16),
('GfxDcsFclkFopt', ctypes.c_uint16),
('GfxDcsUclkFopt', ctypes.c_uint16),
('DcsGfxOffVoltage', ctypes.c_uint16),
('DcsMinGfxOffTime', ctypes.c_uint16),
('DcsMaxGfxOffTime', ctypes.c_uint16),
('DcsMinCreditAccum', ctypes.c_uint32),
('DcsExitHysteresis', ctypes.c_uint16),
('DcsTimeout', ctypes.c_uint16),
('DcsParamPadding', ctypes.c_uint32 * 5),
('FlopsPerByteTable', ctypes.c_uint16 * 16),
('LowestUclkReservedForUlv', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 3),
('UclkDpmPstates', ctypes.c_ubyte * 4),
('UclkDpmSrcFreqRange', struct_UclkDpmChangeRange_t),
('UclkDpmTargFreqRange', struct_UclkDpmChangeRange_t),
('UclkDpmMidstepFreq', ctypes.c_uint16),
('UclkMidstepPadding', ctypes.c_uint16),
('PcieGenSpeed', ctypes.c_ubyte * 2),
('PcieLaneCount', ctypes.c_ubyte * 2),
('LclkFreq', ctypes.c_uint16 * 2),
('FanStopTemp', ctypes.c_uint16),
('FanStartTemp', ctypes.c_uint16),
('FanGain', ctypes.c_uint16 * 10),
('FanPwmMin', ctypes.c_uint16),
('FanAcousticLimitRpm', ctypes.c_uint16),
('FanThrottlingRpm', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('MGpuFanBoostLimitRpm', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('FanPadding16', ctypes.c_uint16),
('FanTempInputSelect', ctypes.c_ubyte),
('FanPadding', ctypes.c_ubyte),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('OverrideAvfsGb', ctypes.c_ubyte * 2),
('dBtcGbGfxDfllModelSelect', ctypes.c_ubyte),
('Padding8_Avfs', ctypes.c_ubyte),
('qAvfsGb', struct_QuadraticInt_t * 2),
('dBtcGbGfxPll', struct_DroopInt_t),
('dBtcGbGfxDfll', struct_DroopInt_t),
('dBtcGbSoc', struct_DroopInt_t),
('qAgingGb', struct_LinearInt_t * 2),
('PiecewiseLinearDroopIntGfxDfll', struct_PiecewiseLinearDroopInt_t),
('qStaticVoltageOffset', struct_QuadraticInt_t * 2),
('DcTol', ctypes.c_uint16 * 2),
('DcBtcEnabled', ctypes.c_ubyte * 2),
('Padding8_GfxBtc', ctypes.c_ubyte * 2),
('DcBtcMin', ctypes.c_uint16 * 2),
('DcBtcMax', ctypes.c_uint16 * 2),
('DcBtcGb', ctypes.c_uint16 * 2),
('XgmiDpmPstates', ctypes.c_ubyte * 2),
('XgmiDpmSpare', ctypes.c_ubyte * 2),
('DebugOverrides', ctypes.c_uint32),
('ReservedEquation0', struct_QuadraticInt_t),
('ReservedEquation1', struct_QuadraticInt_t),
('ReservedEquation2', struct_QuadraticInt_t),
('ReservedEquation3', struct_QuadraticInt_t),
('CustomerVariant', ctypes.c_ubyte),
('VcBtcEnabled', ctypes.c_ubyte),
('VcBtcVminT0', ctypes.c_uint16),
('VcBtcFixedVminAgingOffset', ctypes.c_uint16),
('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16),
('VcBtcPsmA', ctypes.c_uint32),
('VcBtcPsmB', ctypes.c_uint32),
('VcBtcVminA', ctypes.c_uint32),
('VcBtcVminB', ctypes.c_uint32),
('LedGpio', ctypes.c_uint16),
('GfxPowerStagesGpio', ctypes.c_uint16),
('SkuReserved', ctypes.c_uint32 * 8),
('GamingClk', ctypes.c_uint32 * 6),
('I2cControllers', struct_I2cControllerConfig_t * 16),
('GpioScl', ctypes.c_ubyte),
('GpioSda', ctypes.c_ubyte),
('FchUsbPdSlaveAddr', ctypes.c_ubyte),
('I2cSpare', ctypes.c_ubyte * 1),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMem0VrMapping', ctypes.c_ubyte),
('VddMem1VrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('SocUlvPhaseSheddingMask', ctypes.c_ubyte),
('VddciUlvPhaseSheddingMask', ctypes.c_ubyte),
('MvddUlvPhaseSheddingMask', ctypes.c_ubyte),
('GfxMaxCurrent', ctypes.c_uint16),
('GfxOffset', ctypes.c_byte),
('Padding_TelemetryGfx', ctypes.c_ubyte),
('SocMaxCurrent', ctypes.c_uint16),
('SocOffset', ctypes.c_byte),
('Padding_TelemetrySoc', ctypes.c_ubyte),
('Mem0MaxCurrent', ctypes.c_uint16),
('Mem0Offset', ctypes.c_byte),
('Padding_TelemetryMem0', ctypes.c_ubyte),
('Mem1MaxCurrent', ctypes.c_uint16),
('Mem1Offset', ctypes.c_byte),
('Padding_TelemetryMem1', ctypes.c_ubyte),
('MvddRatio', ctypes.c_uint32),
('AcDcGpio', ctypes.c_ubyte),
('AcDcPolarity', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('VR1HotGpio', ctypes.c_ubyte),
('VR1HotPolarity', ctypes.c_ubyte),
('GthrGpio', ctypes.c_ubyte),
('GthrPolarity', ctypes.c_ubyte),
('LedPin0', ctypes.c_ubyte),
('LedPin1', ctypes.c_ubyte),
('LedPin2', ctypes.c_ubyte),
('LedEnableMask', ctypes.c_ubyte),
('LedPcie', ctypes.c_ubyte),
('LedError', ctypes.c_ubyte),
('LedSpare1', ctypes.c_ubyte * 2),
('PllGfxclkSpreadEnabled', ctypes.c_ubyte),
('PllGfxclkSpreadPercent', ctypes.c_ubyte),
('PllGfxclkSpreadFreq', ctypes.c_uint16),
('DfllGfxclkSpreadEnabled', ctypes.c_ubyte),
('DfllGfxclkSpreadPercent', ctypes.c_ubyte),
('DfllGfxclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadPadding', ctypes.c_uint16),
('UclkSpreadFreq', ctypes.c_uint16),
('FclkSpreadEnabled', ctypes.c_ubyte),
('FclkSpreadPercent', ctypes.c_ubyte),
('FclkSpreadFreq', ctypes.c_uint16),
('MemoryChannelEnabled', ctypes.c_uint32),
('DramBitWidth', ctypes.c_ubyte),
('PaddingMem1', ctypes.c_ubyte * 3),
('TotalBoardPower', ctypes.c_uint16),
('BoardPowerPadding', ctypes.c_uint16),
('XgmiLinkSpeed', ctypes.c_ubyte * 4),
('XgmiLinkWidth', ctypes.c_ubyte * 4),
('XgmiFclkFreq', ctypes.c_uint16 * 4),
('XgmiSocVoltage', ctypes.c_uint16 * 4),
('HsrEnabled', ctypes.c_ubyte),
('VddqOffEnabled', ctypes.c_ubyte),
('PaddingUmcFlags', ctypes.c_ubyte * 2),
('UclkSpreadPercent', ctypes.c_ubyte * 16),
('BoardReserved', ctypes.c_uint32 * 11),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_smu_11_0_7_powerplay_table._pack_ = 1 # source:False
struct_smu_11_0_7_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_uint16 * 8),
('power_saving_clock', struct_smu_11_0_7_power_saving_clock_table),
('overdrive_table', struct_smu_11_0_7_overdrive_table),
('smc_pptable', struct_PPTable_t),
]
__all__ = \
['SMU_11_0_7_MAX_ODFEATURE', 'SMU_11_0_7_MAX_ODSETTING',
'SMU_11_0_7_MAX_PMSETTING', 'SMU_11_0_7_MAX_PPCLOCK',
'SMU_11_0_7_ODCAP_AUTO_OC_ENGINE',
'SMU_11_0_7_ODCAP_AUTO_OC_MEMORY',
'SMU_11_0_7_ODCAP_AUTO_UV_ENGINE', 'SMU_11_0_7_ODCAP_COUNT',
'SMU_11_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_7_ODCAP_FAN_CURVE', 'SMU_11_0_7_ODCAP_FAN_SPEED_MIN',
'SMU_11_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_7_ODCAP_GFXCLK_CURVE', 'SMU_11_0_7_ODCAP_GFXCLK_LIMITS',
'SMU_11_0_7_ODCAP_MEMORY_TIMING_TUNE',
'SMU_11_0_7_ODCAP_POWER_LIMIT', 'SMU_11_0_7_ODCAP_POWER_MODE',
'SMU_11_0_7_ODCAP_TEMPERATURE_FAN',
'SMU_11_0_7_ODCAP_TEMPERATURE_SYSTEM',
'SMU_11_0_7_ODCAP_UCLK_LIMITS',
'SMU_11_0_7_ODFEATURE_AUTO_OC_ENGINE',
'SMU_11_0_7_ODFEATURE_AUTO_OC_MEMORY',
'SMU_11_0_7_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_7_ODFEATURE_CAP',
'SMU_11_0_7_ODFEATURE_COUNT',
'SMU_11_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_7_ODFEATURE_FAN_CURVE',
'SMU_11_0_7_ODFEATURE_FAN_SPEED_MIN',
'SMU_11_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_7_ODFEATURE_GFXCLK_CURVE',
'SMU_11_0_7_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_7_ODFEATURE_ID',
'SMU_11_0_7_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_11_0_7_ODFEATURE_POWER_LIMIT',
'SMU_11_0_7_ODFEATURE_POWER_MODE',
'SMU_11_0_7_ODFEATURE_TEMPERATURE_FAN',
'SMU_11_0_7_ODFEATURE_TEMPERATURE_SYSTEM',
'SMU_11_0_7_ODFEATURE_UCLK_LIMITS',
'SMU_11_0_7_ODSETTING_ACTIMING',
'SMU_11_0_7_ODSETTING_AUTOOCENGINE',
'SMU_11_0_7_ODSETTING_AUTOOCMEMORY',
'SMU_11_0_7_ODSETTING_AUTOUVENGINE',
'SMU_11_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_7_ODSETTING_COUNT',
'SMU_11_0_7_ODSETTING_CUSTOM_CURVE_VFT_FMIN',
'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_A',
'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_B',
'SMU_11_0_7_ODSETTING_CUSTOM_GFX_VF_CURVE_C',
'SMU_11_0_7_ODSETTING_FANRPMACOUSTICLIMIT',
'SMU_11_0_7_ODSETTING_FANRPMMIN',
'SMU_11_0_7_ODSETTING_FANTARGETTEMPERATURE',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_1',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_2',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_3',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_4',
'SMU_11_0_7_ODSETTING_FAN_CURVE_SPEED_5',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',
'SMU_11_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',
'SMU_11_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_7_ODSETTING_GFXCLKFMAX',
'SMU_11_0_7_ODSETTING_GFXCLKFMIN', 'SMU_11_0_7_ODSETTING_ID',
'SMU_11_0_7_ODSETTING_OPERATINGTEMPMAX',
'SMU_11_0_7_ODSETTING_POWERPERCENTAGE',
'SMU_11_0_7_ODSETTING_POWER_MODE',
'SMU_11_0_7_ODSETTING_UCLKFMAX', 'SMU_11_0_7_ODSETTING_UCLKFMIN',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',
'SMU_11_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_BALANCE',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_QUIET',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_RAGE',
'SMU_11_0_7_PMSETTING_POWER_LIMIT_TURBO',
'SMU_11_0_7_PPCLOCK_COUNT', 'SMU_11_0_7_PPCLOCK_DCEFCLK',
'SMU_11_0_7_PPCLOCK_DCLK_0', 'SMU_11_0_7_PPCLOCK_DCLK_1',
'SMU_11_0_7_PPCLOCK_DISPCLK', 'SMU_11_0_7_PPCLOCK_DTBCLK',
'SMU_11_0_7_PPCLOCK_FCLK', 'SMU_11_0_7_PPCLOCK_GFXCLK',
'SMU_11_0_7_PPCLOCK_ID', 'SMU_11_0_7_PPCLOCK_PHYCLK',
'SMU_11_0_7_PPCLOCK_PIXCLK', 'SMU_11_0_7_PPCLOCK_SOCCLK',
'SMU_11_0_7_PPCLOCK_UCLK', 'SMU_11_0_7_PPCLOCK_VCLK_0',
'SMU_11_0_7_PPCLOCK_VCLK_1', 'SMU_11_0_7_PPTABLE_H',
'SMU_11_0_7_PP_OVERDRIVE_VERSION',
'SMU_11_0_7_PP_PLATFORM_CAP_BACO',
'SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_11_0_7_PP_PLATFORM_CAP_MACO',
'SMU_11_0_7_PP_PLATFORM_CAP_POWERPLAY',
'SMU_11_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_11_0_7_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_11_0_7_PP_POWERSAVINGCLOCK_VERSION',
'SMU_11_0_7_PP_THERMALCONTROLLER_NONE',
'SMU_11_0_7_PP_THERMALCONTROLLER_SIENNA_CICHLID',
'SMU_11_0_7_PWRMODE_SETTING', 'SMU_11_0_7_TABLE_FORMAT_REVISION',
'SMU_11_0_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
'struct_DpmDescriptor_t', 'struct_DroopInt_t',
'struct_I2cControllerConfig_t', 'struct_LinearInt_t',
'struct_PPTable_t', 'struct_PiecewiseLinearDroopInt_t',
'struct_QuadraticInt_t', 'struct_UclkDpmChangeRange_t',
'struct_atom_common_table_header',
'struct_smu_11_0_7_overdrive_table',
'struct_smu_11_0_7_power_saving_clock_table',
'struct_smu_11_0_7_powerplay_table']
================================================
FILE: src/upp/atom_gen/smu_v11_0_arcturus.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_11_0_PPTABLE_H = True # macro
SMU_11_0_TABLE_FORMAT_REVISION = 12 # macro
SMU_11_0_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_11_0_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_11_0_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_11_0_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_11_0_PP_OVERDRIVE_VERSION = 0x0800 # macro
SMU_11_0_PP_POWERSAVINGCLOCK_VERSION = 0x0100 # macro
SMU_11_0_MAX_ODFEATURE = 32 # macro
SMU_11_0_MAX_ODSETTING = 32 # macro
SMU_11_0_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_11_0_ODFEATURE_CAP'
SMU_11_0_ODFEATURE_CAP__enumvalues = {
0: 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
1: 'SMU_11_0_ODCAP_GFXCLK_CURVE',
2: 'SMU_11_0_ODCAP_UCLK_MAX',
3: 'SMU_11_0_ODCAP_POWER_LIMIT',
4: 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
5: 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
6: 'SMU_11_0_ODCAP_TEMPERATURE_FAN',
7: 'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM',
8: 'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE',
9: 'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
10: 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
11: 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
12: 'SMU_11_0_ODCAP_AUTO_OC_MEMORY',
13: 'SMU_11_0_ODCAP_FAN_CURVE',
14: 'SMU_11_0_ODCAP_COUNT',
}
SMU_11_0_ODCAP_GFXCLK_LIMITS = 0
SMU_11_0_ODCAP_GFXCLK_CURVE = 1
SMU_11_0_ODCAP_UCLK_MAX = 2
SMU_11_0_ODCAP_POWER_LIMIT = 3
SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT = 4
SMU_11_0_ODCAP_FAN_SPEED_MIN = 5
SMU_11_0_ODCAP_TEMPERATURE_FAN = 6
SMU_11_0_ODCAP_TEMPERATURE_SYSTEM = 7
SMU_11_0_ODCAP_MEMORY_TIMING_TUNE = 8
SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL = 9
SMU_11_0_ODCAP_AUTO_UV_ENGINE = 10
SMU_11_0_ODCAP_AUTO_OC_ENGINE = 11
SMU_11_0_ODCAP_AUTO_OC_MEMORY = 12
SMU_11_0_ODCAP_FAN_CURVE = 13
SMU_11_0_ODCAP_COUNT = 14
SMU_11_0_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODFEATURE_ID'
SMU_11_0_ODFEATURE_ID__enumvalues = {
1: 'SMU_11_0_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
4: 'SMU_11_0_ODFEATURE_UCLK_MAX',
8: 'SMU_11_0_ODFEATURE_POWER_LIMIT',
16: 'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
32: 'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
64: 'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
128: 'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
256: 'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
512: 'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
1024: 'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE',
2048: 'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
4096: 'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
8192: 'SMU_11_0_ODFEATURE_FAN_CURVE',
14: 'SMU_11_0_ODFEATURE_COUNT',
}
SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1
SMU_11_0_ODFEATURE_GFXCLK_CURVE = 2
SMU_11_0_ODFEATURE_UCLK_MAX = 4
SMU_11_0_ODFEATURE_POWER_LIMIT = 8
SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16
SMU_11_0_ODFEATURE_FAN_SPEED_MIN = 32
SMU_11_0_ODFEATURE_TEMPERATURE_FAN = 64
SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 128
SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 256
SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512
SMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1024
SMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 2048
SMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 4096
SMU_11_0_ODFEATURE_FAN_CURVE = 8192
SMU_11_0_ODFEATURE_COUNT = 14
SMU_11_0_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODSETTING_ID'
SMU_11_0_ODSETTING_ID__enumvalues = {
0: 'SMU_11_0_ODSETTING_GFXCLKFMAX',
1: 'SMU_11_0_ODSETTING_GFXCLKFMIN',
2: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
3: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
4: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
5: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
6: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
7: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
8: 'SMU_11_0_ODSETTING_UCLKFMAX',
9: 'SMU_11_0_ODSETTING_POWERPERCENTAGE',
10: 'SMU_11_0_ODSETTING_FANRPMMIN',
11: 'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
12: 'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
13: 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
14: 'SMU_11_0_ODSETTING_ACTIMING',
15: 'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
16: 'SMU_11_0_ODSETTING_AUTOUVENGINE',
17: 'SMU_11_0_ODSETTING_AUTOOCENGINE',
18: 'SMU_11_0_ODSETTING_AUTOOCMEMORY',
19: 'SMU_11_0_ODSETTING_COUNT',
}
SMU_11_0_ODSETTING_GFXCLKFMAX = 0
SMU_11_0_ODSETTING_GFXCLKFMIN = 1
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1 = 2
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1 = 3
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2 = 4
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2 = 5
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3 = 6
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3 = 7
SMU_11_0_ODSETTING_UCLKFMAX = 8
SMU_11_0_ODSETTING_POWERPERCENTAGE = 9
SMU_11_0_ODSETTING_FANRPMMIN = 10
SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT = 11
SMU_11_0_ODSETTING_FANTARGETTEMPERATURE = 12
SMU_11_0_ODSETTING_OPERATINGTEMPMAX = 13
SMU_11_0_ODSETTING_ACTIMING = 14
SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL = 15
SMU_11_0_ODSETTING_AUTOUVENGINE = 16
SMU_11_0_ODSETTING_AUTOOCENGINE = 17
SMU_11_0_ODSETTING_AUTOOCMEMORY = 18
SMU_11_0_ODSETTING_COUNT = 19
SMU_11_0_ODSETTING_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_overdrive_table(Structure):
pass
struct_smu_11_0_overdrive_table._pack_ = 1 # source:False
struct_smu_11_0_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 32),
('min', ctypes.c_uint32 * 32),
]
# values for enumeration 'SMU_11_0_PPCLOCK_ID'
SMU_11_0_PPCLOCK_ID__enumvalues = {
0: 'SMU_11_0_PPCLOCK_GFXCLK',
1: 'SMU_11_0_PPCLOCK_VCLK',
2: 'SMU_11_0_PPCLOCK_DCLK',
3: 'SMU_11_0_PPCLOCK_ECLK',
4: 'SMU_11_0_PPCLOCK_SOCCLK',
5: 'SMU_11_0_PPCLOCK_UCLK',
6: 'SMU_11_0_PPCLOCK_DCEFCLK',
7: 'SMU_11_0_PPCLOCK_DISPCLK',
8: 'SMU_11_0_PPCLOCK_PIXCLK',
9: 'SMU_11_0_PPCLOCK_PHYCLK',
10: 'SMU_11_0_PPCLOCK_COUNT',
}
SMU_11_0_PPCLOCK_GFXCLK = 0
SMU_11_0_PPCLOCK_VCLK = 1
SMU_11_0_PPCLOCK_DCLK = 2
SMU_11_0_PPCLOCK_ECLK = 3
SMU_11_0_PPCLOCK_SOCCLK = 4
SMU_11_0_PPCLOCK_UCLK = 5
SMU_11_0_PPCLOCK_DCEFCLK = 6
SMU_11_0_PPCLOCK_DISPCLK = 7
SMU_11_0_PPCLOCK_PIXCLK = 8
SMU_11_0_PPCLOCK_PHYCLK = 9
SMU_11_0_PPCLOCK_COUNT = 10
SMU_11_0_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_power_saving_clock_table(Structure):
pass
struct_smu_11_0_power_saving_clock_table._pack_ = 1 # source:False
struct_smu_11_0_power_saving_clock_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('count', ctypes.c_uint32),
('max', ctypes.c_uint32 * 16),
('min', ctypes.c_uint32 * 16),
]
class struct_smu_11_0_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('VoltageMode', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('padding', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('SsCurve', struct_QuadraticInt_t),
('SsFmin', ctypes.c_uint16),
('Padding16', ctypes.c_uint16),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 2),
('SlaveAddress', ctypes.c_uint32),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('TdcLimitSoc', ctypes.c_uint16),
('TdcLimitSocTau', ctypes.c_uint16),
('TdcLimitGfx', ctypes.c_uint16),
('TdcLimitGfxTau', ctypes.c_uint16),
('TedgeLimit', ctypes.c_uint16),
('ThotspotLimit', ctypes.c_uint16),
('TmemLimit', ctypes.c_uint16),
('Tvr_gfxLimit', ctypes.c_uint16),
('Tvr_memLimit', ctypes.c_uint16),
('Tvr_socLimit', ctypes.c_uint16),
('FitLimit', ctypes.c_uint32),
('PpmPowerLimit', ctypes.c_uint16),
('PpmTemperatureThreshold', ctypes.c_uint16),
('ThrottlerControlMask', ctypes.c_uint32),
('UlvVoltageOffsetGfx', ctypes.c_uint16),
('UlvPadding', ctypes.c_uint16),
('UlvGfxclkBypass', ctypes.c_ubyte),
('Padding234', ctypes.c_ubyte * 3),
('MinVoltageGfx', ctypes.c_uint16),
('MinVoltageSoc', ctypes.c_uint16),
('MaxVoltageGfx', ctypes.c_uint16),
('MaxVoltageSoc', ctypes.c_uint16),
('LoadLineResistanceGfx', ctypes.c_uint16),
('LoadLineResistanceSoc', ctypes.c_uint16),
('DpmDescriptor', struct_DpmDescriptor_t * 6),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableFclk', ctypes.c_uint16 * 8),
('Paddingclks', ctypes.c_uint32 * 16),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('GfxclkFidle', ctypes.c_uint16),
('GfxclkSlewRate', ctypes.c_uint16),
('Padding567', ctypes.c_ubyte * 4),
('GfxclkDsMaxFreq', ctypes.c_uint16),
('GfxclkSource', ctypes.c_ubyte),
('Padding456', ctypes.c_ubyte),
('EnableTdpm', ctypes.c_uint16),
('TdpmHighHystTemperature', ctypes.c_uint16),
('TdpmLowHystTemperature', ctypes.c_uint16),
('GfxclkFreqHighTempLimit', ctypes.c_uint16),
('FanStopTemp', ctypes.c_uint16),
('FanStartTemp', ctypes.c_uint16),
('FanGainEdge', ctypes.c_uint16),
('FanGainHotspot', ctypes.c_uint16),
('FanGainVrGfx', ctypes.c_uint16),
('FanGainVrSoc', ctypes.c_uint16),
('FanGainVrMem', ctypes.c_uint16),
('FanGainHbm', ctypes.c_uint16),
('FanPwmMin', ctypes.c_uint16),
('FanAcousticLimitRpm', ctypes.c_uint16),
('FanThrottlingRpm', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FanTempInputSelect', ctypes.c_ubyte),
('padding8_Fan', ctypes.c_ubyte),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('OverrideAvfsGb', ctypes.c_ubyte * 2),
('Padding8_Avfs', ctypes.c_ubyte * 2),
('qAvfsGb', struct_QuadraticInt_t * 2),
('dBtcGbGfxPll', struct_DroopInt_t),
('dBtcGbGfxAfll', struct_DroopInt_t),
('dBtcGbSoc', struct_DroopInt_t),
('qAgingGb', struct_LinearInt_t * 2),
('qStaticVoltageOffset', struct_QuadraticInt_t * 2),
('DcTol', ctypes.c_uint16 * 2),
('DcBtcEnabled', ctypes.c_ubyte * 2),
('Padding8_GfxBtc', ctypes.c_ubyte * 2),
('DcBtcMin', ctypes.c_uint16 * 2),
('DcBtcMax', ctypes.c_uint16 * 2),
('DcBtcGb', ctypes.c_uint16 * 2),
('XgmiDpmPstates', ctypes.c_ubyte * 2),
('XgmiDpmSpare', ctypes.c_ubyte * 2),
('VDDGFX_TVmin', ctypes.c_uint16),
('VDDSOC_TVmin', ctypes.c_uint16),
('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),
('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),
('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),
('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),
('VDDGFX_TVminHystersis', ctypes.c_uint16),
('VDDSOC_TVminHystersis', ctypes.c_uint16),
('DebugOverrides', ctypes.c_uint32),
('ReservedEquation0', struct_QuadraticInt_t),
('ReservedEquation1', struct_QuadraticInt_t),
('ReservedEquation2', struct_QuadraticInt_t),
('ReservedEquation3', struct_QuadraticInt_t),
('MinVoltageUlvGfx', ctypes.c_uint16),
('PaddingUlv', ctypes.c_uint16),
('TotalPowerConfig', ctypes.c_ubyte),
('TotalPowerSpare1', ctypes.c_ubyte),
('TotalPowerSpare2', ctypes.c_uint16),
('PccThresholdLow', ctypes.c_uint16),
('PccThresholdHigh', ctypes.c_uint16),
('PaddingAPCC', ctypes.c_uint32 * 6),
('BasePerformanceCardPower', ctypes.c_uint16),
('MaxPerformanceCardPower', ctypes.c_uint16),
('BasePerformanceFrequencyCap', ctypes.c_uint16),
('MaxPerformanceFrequencyCap', ctypes.c_uint16),
('VDDGFX_VminLow', ctypes.c_uint16),
('VDDGFX_TVminLow', ctypes.c_uint16),
('VDDGFX_VminLow_HiTemp', ctypes.c_uint16),
('VDDGFX_VminLow_LoTemp', ctypes.c_uint16),
('Reserved', ctypes.c_uint32 * 7),
('MaxVoltageStepGfx', ctypes.c_uint16),
('MaxVoltageStepSoc', ctypes.c_uint16),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMemVrMapping', ctypes.c_ubyte),
('BoardVrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('ExternalSensorPresent', ctypes.c_ubyte),
('Padding8_V', ctypes.c_ubyte * 2),
('GfxMaxCurrent', ctypes.c_uint16),
('GfxOffset', ctypes.c_byte),
('Padding_TelemetryGfx', ctypes.c_ubyte),
('SocMaxCurrent', ctypes.c_uint16),
('SocOffset', ctypes.c_byte),
('Padding_TelemetrySoc', ctypes.c_ubyte),
('MemMaxCurrent', ctypes.c_uint16),
('MemOffset', ctypes.c_byte),
('Padding_TelemetryMem', ctypes.c_ubyte),
('BoardMaxCurrent', ctypes.c_uint16),
('BoardOffset', ctypes.c_byte),
('Padding_TelemetryBoardInput', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('VR1HotGpio', ctypes.c_ubyte),
('VR1HotPolarity', ctypes.c_ubyte),
('PllGfxclkSpreadEnabled', ctypes.c_ubyte),
('PllGfxclkSpreadPercent', ctypes.c_ubyte),
('PllGfxclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadEnabled', ctypes.c_ubyte),
('UclkSpreadPercent', ctypes.c_ubyte),
('UclkSpreadFreq', ctypes.c_uint16),
('FclkSpreadEnabled', ctypes.c_ubyte),
('FclkSpreadPercent', ctypes.c_ubyte),
('FclkSpreadFreq', ctypes.c_uint16),
('FllGfxclkSpreadEnabled', ctypes.c_ubyte),
('FllGfxclkSpreadPercent', ctypes.c_ubyte),
('FllGfxclkSpreadFreq', ctypes.c_uint16),
('I2cControllers', struct_I2cControllerConfig_t * 8),
('MemoryChannelEnabled', ctypes.c_uint32),
('DramBitWidth', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 3),
('TotalBoardPower', ctypes.c_uint16),
('BoardPadding', ctypes.c_uint16),
('XgmiLinkSpeed', ctypes.c_ubyte * 4),
('XgmiLinkWidth', ctypes.c_ubyte * 4),
('XgmiFclkFreq', ctypes.c_uint16 * 4),
('XgmiSocVoltage', ctypes.c_uint16 * 4),
('GpioI2cScl', ctypes.c_ubyte),
('GpioI2cSda', ctypes.c_ubyte),
('GpioPadding', ctypes.c_uint16),
('BoardVoltageCoeffA', ctypes.c_uint32),
('BoardVoltageCoeffB', ctypes.c_uint32),
('BoardReserved', ctypes.c_uint32 * 7),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_smu_11_0_powerplay_table._pack_ = 1 # source:False
struct_smu_11_0_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('od_turbo_power_limit', ctypes.c_uint16),
('od_power_save_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_uint16 * 6),
('power_saving_clock', struct_smu_11_0_power_saving_clock_table),
('overdrive_table', struct_smu_11_0_overdrive_table),
('smc_pptable', struct_PPTable_t),
]
__all__ = \
['SMU_11_0_MAX_ODFEATURE', 'SMU_11_0_MAX_ODSETTING',
'SMU_11_0_MAX_PPCLOCK', 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
'SMU_11_0_ODCAP_AUTO_OC_MEMORY', 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
'SMU_11_0_ODCAP_COUNT', 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODCAP_FAN_CURVE', 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODCAP_GFXCLK_CURVE', 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE', 'SMU_11_0_ODCAP_POWER_LIMIT',
'SMU_11_0_ODCAP_TEMPERATURE_FAN',
'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM', 'SMU_11_0_ODCAP_UCLK_MAX',
'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_ODFEATURE_CAP',
'SMU_11_0_ODFEATURE_COUNT',
'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODFEATURE_FAN_CURVE',
'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
'SMU_11_0_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_ODFEATURE_ID',
'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_11_0_ODFEATURE_POWER_LIMIT',
'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
'SMU_11_0_ODFEATURE_UCLK_MAX', 'SMU_11_0_ODSETTING_ACTIMING',
'SMU_11_0_ODSETTING_AUTOOCENGINE',
'SMU_11_0_ODSETTING_AUTOOCMEMORY',
'SMU_11_0_ODSETTING_AUTOUVENGINE', 'SMU_11_0_ODSETTING_COUNT',
'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
'SMU_11_0_ODSETTING_FANRPMMIN',
'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODSETTING_GFXCLKFMAX', 'SMU_11_0_ODSETTING_GFXCLKFMIN',
'SMU_11_0_ODSETTING_ID', 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
'SMU_11_0_ODSETTING_POWERPERCENTAGE',
'SMU_11_0_ODSETTING_UCLKFMAX',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
'SMU_11_0_PPCLOCK_COUNT', 'SMU_11_0_PPCLOCK_DCEFCLK',
'SMU_11_0_PPCLOCK_DCLK', 'SMU_11_0_PPCLOCK_DISPCLK',
'SMU_11_0_PPCLOCK_ECLK', 'SMU_11_0_PPCLOCK_GFXCLK',
'SMU_11_0_PPCLOCK_ID', 'SMU_11_0_PPCLOCK_PHYCLK',
'SMU_11_0_PPCLOCK_PIXCLK', 'SMU_11_0_PPCLOCK_SOCCLK',
'SMU_11_0_PPCLOCK_UCLK', 'SMU_11_0_PPCLOCK_VCLK',
'SMU_11_0_PPTABLE_H', 'SMU_11_0_PP_OVERDRIVE_VERSION',
'SMU_11_0_PP_PLATFORM_CAP_BACO',
'SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_11_0_PP_PLATFORM_CAP_MACO',
'SMU_11_0_PP_PLATFORM_CAP_POWERPLAY',
'SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_11_0_PP_POWERSAVINGCLOCK_VERSION',
'SMU_11_0_PP_THERMALCONTROLLER_NONE',
'SMU_11_0_TABLE_FORMAT_REVISION', 'struct_DpmDescriptor_t',
'struct_DroopInt_t', 'struct_I2cControllerConfig_t',
'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',
'struct_atom_common_table_header',
'struct_smu_11_0_overdrive_table',
'struct_smu_11_0_power_saving_clock_table',
'struct_smu_11_0_powerplay_table']
================================================
FILE: src/upp/atom_gen/smu_v11_0_navi10.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_11_0_PPTABLE_H = True # macro
SMU_11_0_TABLE_FORMAT_REVISION = 12 # macro
SMU_11_0_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_11_0_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_11_0_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_11_0_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_11_0_PP_OVERDRIVE_VERSION = 0x0800 # macro
SMU_11_0_PP_POWERSAVINGCLOCK_VERSION = 0x0100 # macro
SMU_11_0_MAX_ODFEATURE = 32 # macro
SMU_11_0_MAX_ODSETTING = 32 # macro
SMU_11_0_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_11_0_ODFEATURE_CAP'
SMU_11_0_ODFEATURE_CAP__enumvalues = {
0: 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
1: 'SMU_11_0_ODCAP_GFXCLK_CURVE',
2: 'SMU_11_0_ODCAP_UCLK_MAX',
3: 'SMU_11_0_ODCAP_POWER_LIMIT',
4: 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
5: 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
6: 'SMU_11_0_ODCAP_TEMPERATURE_FAN',
7: 'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM',
8: 'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE',
9: 'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
10: 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
11: 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
12: 'SMU_11_0_ODCAP_AUTO_OC_MEMORY',
13: 'SMU_11_0_ODCAP_FAN_CURVE',
14: 'SMU_11_0_ODCAP_COUNT',
}
SMU_11_0_ODCAP_GFXCLK_LIMITS = 0
SMU_11_0_ODCAP_GFXCLK_CURVE = 1
SMU_11_0_ODCAP_UCLK_MAX = 2
SMU_11_0_ODCAP_POWER_LIMIT = 3
SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT = 4
SMU_11_0_ODCAP_FAN_SPEED_MIN = 5
SMU_11_0_ODCAP_TEMPERATURE_FAN = 6
SMU_11_0_ODCAP_TEMPERATURE_SYSTEM = 7
SMU_11_0_ODCAP_MEMORY_TIMING_TUNE = 8
SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL = 9
SMU_11_0_ODCAP_AUTO_UV_ENGINE = 10
SMU_11_0_ODCAP_AUTO_OC_ENGINE = 11
SMU_11_0_ODCAP_AUTO_OC_MEMORY = 12
SMU_11_0_ODCAP_FAN_CURVE = 13
SMU_11_0_ODCAP_COUNT = 14
SMU_11_0_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODFEATURE_ID'
SMU_11_0_ODFEATURE_ID__enumvalues = {
1: 'SMU_11_0_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
4: 'SMU_11_0_ODFEATURE_UCLK_MAX',
8: 'SMU_11_0_ODFEATURE_POWER_LIMIT',
16: 'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
32: 'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
64: 'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
128: 'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
256: 'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
512: 'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
1024: 'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE',
2048: 'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
4096: 'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
8192: 'SMU_11_0_ODFEATURE_FAN_CURVE',
14: 'SMU_11_0_ODFEATURE_COUNT',
}
SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1
SMU_11_0_ODFEATURE_GFXCLK_CURVE = 2
SMU_11_0_ODFEATURE_UCLK_MAX = 4
SMU_11_0_ODFEATURE_POWER_LIMIT = 8
SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 16
SMU_11_0_ODFEATURE_FAN_SPEED_MIN = 32
SMU_11_0_ODFEATURE_TEMPERATURE_FAN = 64
SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 128
SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 256
SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 512
SMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1024
SMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 2048
SMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 4096
SMU_11_0_ODFEATURE_FAN_CURVE = 8192
SMU_11_0_ODFEATURE_COUNT = 14
SMU_11_0_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_11_0_ODSETTING_ID'
SMU_11_0_ODSETTING_ID__enumvalues = {
0: 'SMU_11_0_ODSETTING_GFXCLKFMAX',
1: 'SMU_11_0_ODSETTING_GFXCLKFMIN',
2: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
3: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
4: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
5: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
6: 'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
7: 'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
8: 'SMU_11_0_ODSETTING_UCLKFMAX',
9: 'SMU_11_0_ODSETTING_POWERPERCENTAGE',
10: 'SMU_11_0_ODSETTING_FANRPMMIN',
11: 'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
12: 'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
13: 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
14: 'SMU_11_0_ODSETTING_ACTIMING',
15: 'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
16: 'SMU_11_0_ODSETTING_AUTOUVENGINE',
17: 'SMU_11_0_ODSETTING_AUTOOCENGINE',
18: 'SMU_11_0_ODSETTING_AUTOOCMEMORY',
19: 'SMU_11_0_ODSETTING_COUNT',
}
SMU_11_0_ODSETTING_GFXCLKFMAX = 0
SMU_11_0_ODSETTING_GFXCLKFMIN = 1
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1 = 2
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1 = 3
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2 = 4
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2 = 5
SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3 = 6
SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3 = 7
SMU_11_0_ODSETTING_UCLKFMAX = 8
SMU_11_0_ODSETTING_POWERPERCENTAGE = 9
SMU_11_0_ODSETTING_FANRPMMIN = 10
SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT = 11
SMU_11_0_ODSETTING_FANTARGETTEMPERATURE = 12
SMU_11_0_ODSETTING_OPERATINGTEMPMAX = 13
SMU_11_0_ODSETTING_ACTIMING = 14
SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL = 15
SMU_11_0_ODSETTING_AUTOUVENGINE = 16
SMU_11_0_ODSETTING_AUTOOCENGINE = 17
SMU_11_0_ODSETTING_AUTOOCMEMORY = 18
SMU_11_0_ODSETTING_COUNT = 19
SMU_11_0_ODSETTING_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_overdrive_table(Structure):
pass
struct_smu_11_0_overdrive_table._pack_ = 1 # source:False
struct_smu_11_0_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 32),
('min', ctypes.c_uint32 * 32),
]
# values for enumeration 'SMU_11_0_PPCLOCK_ID'
SMU_11_0_PPCLOCK_ID__enumvalues = {
0: 'SMU_11_0_PPCLOCK_GFXCLK',
1: 'SMU_11_0_PPCLOCK_VCLK',
2: 'SMU_11_0_PPCLOCK_DCLK',
3: 'SMU_11_0_PPCLOCK_ECLK',
4: 'SMU_11_0_PPCLOCK_SOCCLK',
5: 'SMU_11_0_PPCLOCK_UCLK',
6: 'SMU_11_0_PPCLOCK_DCEFCLK',
7: 'SMU_11_0_PPCLOCK_DISPCLK',
8: 'SMU_11_0_PPCLOCK_PIXCLK',
9: 'SMU_11_0_PPCLOCK_PHYCLK',
10: 'SMU_11_0_PPCLOCK_COUNT',
}
SMU_11_0_PPCLOCK_GFXCLK = 0
SMU_11_0_PPCLOCK_VCLK = 1
SMU_11_0_PPCLOCK_DCLK = 2
SMU_11_0_PPCLOCK_ECLK = 3
SMU_11_0_PPCLOCK_SOCCLK = 4
SMU_11_0_PPCLOCK_UCLK = 5
SMU_11_0_PPCLOCK_DCEFCLK = 6
SMU_11_0_PPCLOCK_DISPCLK = 7
SMU_11_0_PPCLOCK_PIXCLK = 8
SMU_11_0_PPCLOCK_PHYCLK = 9
SMU_11_0_PPCLOCK_COUNT = 10
SMU_11_0_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_11_0_power_saving_clock_table(Structure):
pass
struct_smu_11_0_power_saving_clock_table._pack_ = 1 # source:False
struct_smu_11_0_power_saving_clock_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('count', ctypes.c_uint32),
('max', ctypes.c_uint32 * 16),
('min', ctypes.c_uint32 * 16),
]
class struct_smu_11_0_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('VoltageMode', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('SsCurve', struct_QuadraticInt_t),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_I2cControllerConfig_t(Structure):
pass
struct_I2cControllerConfig_t._pack_ = 1 # source:False
struct_I2cControllerConfig_t._fields_ = [
('Enabled', ctypes.c_ubyte),
('Speed', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 2),
('SlaveAddress', ctypes.c_uint32),
('ControllerPort', ctypes.c_ubyte),
('ControllerName', ctypes.c_ubyte),
('ThermalThrotter', ctypes.c_ubyte),
('I2cProtocol', ctypes.c_ubyte),
]
struct_PPTable_t._pack_ = 1 # source:False
struct_PPTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('SocketPowerLimitDc', ctypes.c_uint16 * 4),
('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),
('TdcLimitSoc', ctypes.c_uint16),
('TdcLimitSocTau', ctypes.c_uint16),
('TdcLimitGfx', ctypes.c_uint16),
('TdcLimitGfxTau', ctypes.c_uint16),
('TedgeLimit', ctypes.c_uint16),
('ThotspotLimit', ctypes.c_uint16),
('TmemLimit', ctypes.c_uint16),
('Tvr_gfxLimit', ctypes.c_uint16),
('Tvr_mem0Limit', ctypes.c_uint16),
('Tvr_mem1Limit', ctypes.c_uint16),
('Tvr_socLimit', ctypes.c_uint16),
('Tliquid0Limit', ctypes.c_uint16),
('Tliquid1Limit', ctypes.c_uint16),
('TplxLimit', ctypes.c_uint16),
('FitLimit', ctypes.c_uint32),
('PpmPowerLimit', ctypes.c_uint16),
('PpmTemperatureThreshold', ctypes.c_uint16),
('ThrottlerControlMask', ctypes.c_uint32),
('FwDStateMask', ctypes.c_uint32),
('UlvVoltageOffsetSoc', ctypes.c_uint16),
('UlvVoltageOffsetGfx', ctypes.c_uint16),
('GceaLinkMgrIdleThreshold', ctypes.c_ubyte),
('paddingRlcUlvParams', ctypes.c_ubyte * 3),
('UlvSmnclkDid', ctypes.c_ubyte),
('UlvMp1clkDid', ctypes.c_ubyte),
('UlvGfxclkBypass', ctypes.c_ubyte),
('Padding234', ctypes.c_ubyte),
('MinVoltageUlvGfx', ctypes.c_uint16),
('MinVoltageUlvSoc', ctypes.c_uint16),
('MinVoltageGfx', ctypes.c_uint16),
('MinVoltageSoc', ctypes.c_uint16),
('MaxVoltageGfx', ctypes.c_uint16),
('MaxVoltageSoc', ctypes.c_uint16),
('LoadLineResistanceGfx', ctypes.c_uint16),
('LoadLineResistanceSoc', ctypes.c_uint16),
('DpmDescriptor', struct_DpmDescriptor_t * 9),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableDcefclk', ctypes.c_uint16 * 8),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTablePixclk', ctypes.c_uint16 * 8),
('FreqTablePhyclk', ctypes.c_uint16 * 8),
('Paddingclks', ctypes.c_uint32 * 16),
('DcModeMaxFreq', ctypes.c_uint16 * 9),
('Padding8_Clks', ctypes.c_uint16),
('FreqTableUclkDiv', ctypes.c_ubyte * 4),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('MemVddciVoltage', ctypes.c_uint16 * 4),
('MemMvddVoltage', ctypes.c_uint16 * 4),
('GfxclkFgfxoffEntry', ctypes.c_uint16),
('GfxclkFinit', ctypes.c_uint16),
('GfxclkFidle', ctypes.c_uint16),
('GfxclkSlewRate', ctypes.c_uint16),
('GfxclkFopt', ctypes.c_uint16),
('Padding567', ctypes.c_ubyte * 2),
('GfxclkDsMaxFreq', ctypes.c_uint16),
('GfxclkSource', ctypes.c_ubyte),
('Padding456', ctypes.c_ubyte),
('LowestUclkReservedForUlv', ctypes.c_ubyte),
('paddingUclk', ctypes.c_ubyte * 3),
('MemoryType', ctypes.c_ubyte),
('MemoryChannels', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 2),
('PcieGenSpeed', ctypes.c_ubyte * 2),
('PcieLaneCount', ctypes.c_ubyte * 2),
('LclkFreq', ctypes.c_uint16 * 2),
('EnableTdpm', ctypes.c_uint16),
('TdpmHighHystTemperature', ctypes.c_uint16),
('TdpmLowHystTemperature', ctypes.c_uint16),
('GfxclkFreqHighTempLimit', ctypes.c_uint16),
('FanStopTemp', ctypes.c_uint16),
('FanStartTemp', ctypes.c_uint16),
('FanGainEdge', ctypes.c_uint16),
('FanGainHotspot', ctypes.c_uint16),
('FanGainLiquid0', ctypes.c_uint16),
('FanGainLiquid1', ctypes.c_uint16),
('FanGainVrGfx', ctypes.c_uint16),
('FanGainVrSoc', ctypes.c_uint16),
('FanGainVrMem0', ctypes.c_uint16),
('FanGainVrMem1', ctypes.c_uint16),
('FanGainPlx', ctypes.c_uint16),
('FanGainMem', ctypes.c_uint16),
('FanPwmMin', ctypes.c_uint16),
('FanAcousticLimitRpm', ctypes.c_uint16),
('FanThrottlingRpm', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('FanTempInputSelect', ctypes.c_ubyte),
('FanPadding', ctypes.c_ubyte),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('OverrideAvfsGb', ctypes.c_ubyte * 2),
('Padding8_Avfs', ctypes.c_ubyte * 2),
('qAvfsGb', struct_QuadraticInt_t * 2),
('dBtcGbGfxPll', struct_DroopInt_t),
('dBtcGbGfxDfll', struct_DroopInt_t),
('dBtcGbSoc', struct_DroopInt_t),
('qAgingGb', struct_LinearInt_t * 2),
('qStaticVoltageOffset', struct_QuadraticInt_t * 2),
('DcTol', ctypes.c_uint16 * 2),
('DcBtcEnabled', ctypes.c_ubyte * 2),
('Padding8_GfxBtc', ctypes.c_ubyte * 2),
('DcBtcMin', ctypes.c_uint16 * 2),
('DcBtcMax', ctypes.c_uint16 * 2),
('DebugOverrides', ctypes.c_uint32),
('ReservedEquation0', struct_QuadraticInt_t),
('ReservedEquation1', struct_QuadraticInt_t),
('ReservedEquation2', struct_QuadraticInt_t),
('ReservedEquation3', struct_QuadraticInt_t),
('TotalPowerConfig', ctypes.c_ubyte),
('TotalPowerSpare1', ctypes.c_ubyte),
('TotalPowerSpare2', ctypes.c_uint16),
('PccThresholdLow', ctypes.c_uint16),
('PccThresholdHigh', ctypes.c_uint16),
('MGpuFanBoostLimitRpm', ctypes.c_uint32),
('PaddingAPCC', ctypes.c_uint32 * 5),
('VDDGFX_TVmin', ctypes.c_uint16),
('VDDSOC_TVmin', ctypes.c_uint16),
('VDDGFX_Vmin_HiTemp', ctypes.c_uint16),
('VDDGFX_Vmin_LoTemp', ctypes.c_uint16),
('VDDSOC_Vmin_HiTemp', ctypes.c_uint16),
('VDDSOC_Vmin_LoTemp', ctypes.c_uint16),
('VDDGFX_TVminHystersis', ctypes.c_uint16),
('VDDSOC_TVminHystersis', ctypes.c_uint16),
('BtcConfig', ctypes.c_uint32),
('SsFmin', ctypes.c_uint16 * 10),
('DcBtcGb', ctypes.c_uint16 * 2),
('Reserved', ctypes.c_uint32 * 8),
('I2cControllers', struct_I2cControllerConfig_t * 8),
('MaxVoltageStepGfx', ctypes.c_uint16),
('MaxVoltageStepSoc', ctypes.c_uint16),
('VddGfxVrMapping', ctypes.c_ubyte),
('VddSocVrMapping', ctypes.c_ubyte),
('VddMem0VrMapping', ctypes.c_ubyte),
('VddMem1VrMapping', ctypes.c_ubyte),
('GfxUlvPhaseSheddingMask', ctypes.c_ubyte),
('SocUlvPhaseSheddingMask', ctypes.c_ubyte),
('ExternalSensorPresent', ctypes.c_ubyte),
('Padding8_V', ctypes.c_ubyte),
('GfxMaxCurrent', ctypes.c_uint16),
('GfxOffset', ctypes.c_byte),
('Padding_TelemetryGfx', ctypes.c_ubyte),
('SocMaxCurrent', ctypes.c_uint16),
('SocOffset', ctypes.c_byte),
('Padding_TelemetrySoc', ctypes.c_ubyte),
('Mem0MaxCurrent', ctypes.c_uint16),
('Mem0Offset', ctypes.c_byte),
('Padding_TelemetryMem0', ctypes.c_ubyte),
('Mem1MaxCurrent', ctypes.c_uint16),
('Mem1Offset', ctypes.c_byte),
('Padding_TelemetryMem1', ctypes.c_ubyte),
('AcDcGpio', ctypes.c_ubyte),
('AcDcPolarity', ctypes.c_ubyte),
('VR0HotGpio', ctypes.c_ubyte),
('VR0HotPolarity', ctypes.c_ubyte),
('VR1HotGpio', ctypes.c_ubyte),
('VR1HotPolarity', ctypes.c_ubyte),
('GthrGpio', ctypes.c_ubyte),
('GthrPolarity', ctypes.c_ubyte),
('LedPin0', ctypes.c_ubyte),
('LedPin1', ctypes.c_ubyte),
('LedPin2', ctypes.c_ubyte),
('padding8_4', ctypes.c_ubyte),
('PllGfxclkSpreadEnabled', ctypes.c_ubyte),
('PllGfxclkSpreadPercent', ctypes.c_ubyte),
('PllGfxclkSpreadFreq', ctypes.c_uint16),
('DfllGfxclkSpreadEnabled', ctypes.c_ubyte),
('DfllGfxclkSpreadPercent', ctypes.c_ubyte),
('DfllGfxclkSpreadFreq', ctypes.c_uint16),
('UclkSpreadEnabled', ctypes.c_ubyte),
('UclkSpreadPercent', ctypes.c_ubyte),
('UclkSpreadFreq', ctypes.c_uint16),
('SoclkSpreadEnabled', ctypes.c_ubyte),
('SocclkSpreadPercent', ctypes.c_ubyte),
('SocclkSpreadFreq', ctypes.c_uint16),
('TotalBoardPower', ctypes.c_uint16),
('BoardPadding', ctypes.c_uint16),
('MvddRatio', ctypes.c_uint32),
('RenesesLoadLineEnabled', ctypes.c_ubyte),
('GfxLoadlineResistance', ctypes.c_ubyte),
('SocLoadlineResistance', ctypes.c_ubyte),
('Padding8_Loadline', ctypes.c_ubyte),
('BoardReserved', ctypes.c_uint32 * 8),
('MmHubPadding', ctypes.c_uint32 * 8),
]
struct_smu_11_0_powerplay_table._pack_ = 1 # source:False
struct_smu_11_0_powerplay_table._fields_ = [
('header', struct_atom_common_table_header),
('table_revision', ctypes.c_ubyte),
('table_size', ctypes.c_uint16),
('golden_pp_id', ctypes.c_uint32),
('golden_revision', ctypes.c_uint32),
('format_id', ctypes.c_uint16),
('platform_caps', ctypes.c_uint32),
('thermal_controller_type', ctypes.c_ubyte),
('small_power_limit1', ctypes.c_uint16),
('small_power_limit2', ctypes.c_uint16),
('boost_power_limit', ctypes.c_uint16),
('od_turbo_power_limit', ctypes.c_uint16),
('od_power_save_power_limit', ctypes.c_uint16),
('software_shutdown_temp', ctypes.c_uint16),
('reserve', ctypes.c_uint16 * 6),
('power_saving_clock', struct_smu_11_0_power_saving_clock_table),
('overdrive_table', struct_smu_11_0_overdrive_table),
('smc_pptable', struct_PPTable_t),
]
__all__ = \
['SMU_11_0_MAX_ODFEATURE', 'SMU_11_0_MAX_ODSETTING',
'SMU_11_0_MAX_PPCLOCK', 'SMU_11_0_ODCAP_AUTO_OC_ENGINE',
'SMU_11_0_ODCAP_AUTO_OC_MEMORY', 'SMU_11_0_ODCAP_AUTO_UV_ENGINE',
'SMU_11_0_ODCAP_COUNT', 'SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODCAP_FAN_CURVE', 'SMU_11_0_ODCAP_FAN_SPEED_MIN',
'SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODCAP_GFXCLK_CURVE', 'SMU_11_0_ODCAP_GFXCLK_LIMITS',
'SMU_11_0_ODCAP_MEMORY_TIMING_TUNE', 'SMU_11_0_ODCAP_POWER_LIMIT',
'SMU_11_0_ODCAP_TEMPERATURE_FAN',
'SMU_11_0_ODCAP_TEMPERATURE_SYSTEM', 'SMU_11_0_ODCAP_UCLK_MAX',
'SMU_11_0_ODFEATURE_AUTO_OC_ENGINE',
'SMU_11_0_ODFEATURE_AUTO_OC_MEMORY',
'SMU_11_0_ODFEATURE_AUTO_UV_ENGINE', 'SMU_11_0_ODFEATURE_CAP',
'SMU_11_0_ODFEATURE_COUNT',
'SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT',
'SMU_11_0_ODFEATURE_FAN_CURVE',
'SMU_11_0_ODFEATURE_FAN_SPEED_MIN',
'SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODFEATURE_GFXCLK_CURVE',
'SMU_11_0_ODFEATURE_GFXCLK_LIMITS', 'SMU_11_0_ODFEATURE_ID',
'SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE',
'SMU_11_0_ODFEATURE_POWER_LIMIT',
'SMU_11_0_ODFEATURE_TEMPERATURE_FAN',
'SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM',
'SMU_11_0_ODFEATURE_UCLK_MAX', 'SMU_11_0_ODSETTING_ACTIMING',
'SMU_11_0_ODSETTING_AUTOOCENGINE',
'SMU_11_0_ODSETTING_AUTOOCMEMORY',
'SMU_11_0_ODSETTING_AUTOUVENGINE', 'SMU_11_0_ODSETTING_COUNT',
'SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT',
'SMU_11_0_ODSETTING_FANRPMMIN',
'SMU_11_0_ODSETTING_FANTARGETTEMPERATURE',
'SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL',
'SMU_11_0_ODSETTING_GFXCLKFMAX', 'SMU_11_0_ODSETTING_GFXCLKFMIN',
'SMU_11_0_ODSETTING_ID', 'SMU_11_0_ODSETTING_OPERATINGTEMPMAX',
'SMU_11_0_ODSETTING_POWERPERCENTAGE',
'SMU_11_0_ODSETTING_UCLKFMAX',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2',
'SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3',
'SMU_11_0_PPCLOCK_COUNT', 'SMU_11_0_PPCLOCK_DCEFCLK',
'SMU_11_0_PPCLOCK_DCLK', 'SMU_11_0_PPCLOCK_DISPCLK',
'SMU_11_0_PPCLOCK_ECLK', 'SMU_11_0_PPCLOCK_GFXCLK',
'SMU_11_0_PPCLOCK_ID', 'SMU_11_0_PPCLOCK_PHYCLK',
'SMU_11_0_PPCLOCK_PIXCLK', 'SMU_11_0_PPCLOCK_SOCCLK',
'SMU_11_0_PPCLOCK_UCLK', 'SMU_11_0_PPCLOCK_VCLK',
'SMU_11_0_PPTABLE_H', 'SMU_11_0_PP_OVERDRIVE_VERSION',
'SMU_11_0_PP_PLATFORM_CAP_BACO',
'SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC',
'SMU_11_0_PP_PLATFORM_CAP_MACO',
'SMU_11_0_PP_PLATFORM_CAP_POWERPLAY',
'SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE',
'SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE',
'SMU_11_0_PP_POWERSAVINGCLOCK_VERSION',
'SMU_11_0_PP_THERMALCONTROLLER_NONE',
'SMU_11_0_TABLE_FORMAT_REVISION', 'struct_DpmDescriptor_t',
'struct_DroopInt_t', 'struct_I2cControllerConfig_t',
'struct_LinearInt_t', 'struct_PPTable_t', 'struct_QuadraticInt_t',
'struct_atom_common_table_header',
'struct_smu_11_0_overdrive_table',
'struct_smu_11_0_power_saving_clock_table',
'struct_smu_11_0_powerplay_table']
================================================
FILE: src/upp/atom_gen/smu_v13_0_7_navi30.py
================================================
# -*- coding: utf-8 -*-
#
# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/atom-types.h', '--include', 'linux/drivers/gpu/drm/amd/include/atomfirmware.h', '--include', 'linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h', '']
# WORD_SIZE is: 8
# POINTER_SIZE is: 8
# LONGDOUBLE_SIZE is: 16
#
import ctypes
class AsDictMixin:
@classmethod
def as_dict(cls, self):
result = {}
if not isinstance(self, AsDictMixin):
# not a structure, assume it's already a python object
return self
if not hasattr(cls, "_fields_"):
return result
# sys.version_info >= (3, 5)
# for (field, *_) in cls._fields_: # noqa
for field_tuple in cls._fields_: # noqa
field = field_tuple[0]
if field.startswith('PADDING_'):
continue
value = getattr(self, field)
type_ = type(value)
if hasattr(value, "_length_") and hasattr(value, "_type_"):
# array
type_ = type_._type_
if hasattr(type_, 'as_dict'):
value = [type_.as_dict(v) for v in value]
else:
value = [i for i in value]
elif hasattr(value, "contents") and hasattr(value, "_type_"):
# pointer
try:
if not hasattr(type_, "as_dict"):
value = value.contents
else:
type_ = type_._type_
value = type_.as_dict(value.contents)
except ValueError:
# nullptr
value = None
elif isinstance(value, AsDictMixin):
# other structure
value = type_.as_dict(value)
result[field] = value
return result
class Structure(ctypes.Structure, AsDictMixin):
def __init__(self, *args, **kwds):
# We don't want to use positional arguments fill PADDING_* fields
args = dict(zip(self.__class__._field_names_(), args))
args.update(kwds)
super(Structure, self).__init__(**args)
@classmethod
def _field_names_(cls):
if hasattr(cls, '_fields_'):
return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
else:
return ()
@classmethod
def get_type(cls, field):
for f in cls._fields_:
if f[0] == field:
return f[1]
return None
@classmethod
def bind(cls, bound_fields):
fields = {}
for name, type_ in cls._fields_:
if hasattr(type_, "restype"):
if name in bound_fields:
if bound_fields[name] is None:
fields[name] = type_()
else:
# use a closure to capture the callback from the loop scope
fields[name] = (
type_((lambda callback: lambda *args: callback(*args))(
bound_fields[name]))
)
del bound_fields[name]
else:
# default callback implementation (does nothing)
try:
default_ = type_(0).restype().value
except TypeError:
default_ = None
fields[name] = type_((
lambda default_: lambda *args: default_)(default_))
else:
# not a callback function, use default initialization
if name in bound_fields:
fields[name] = bound_fields[name]
del bound_fields[name]
else:
fields[name] = type_()
if len(bound_fields) != 0:
raise ValueError(
"Cannot bind the following unknown callback(s) {}.{}".format(
cls.__name__, bound_fields.keys()
))
return cls(**fields)
class Union(ctypes.Union, AsDictMixin):
pass
SMU_13_0_7_PPTABLE_H = True # macro
SMU_13_0_7_TABLE_FORMAT_REVISION = 15 # macro
SMU_13_0_7_PP_PLATFORM_CAP_POWERPLAY = 0x1 # macro
SMU_13_0_7_PP_PLATFORM_CAP_SBIOSPOWERSOURCE = 0x2 # macro
SMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC = 0x4 # macro
SMU_13_0_7_PP_PLATFORM_CAP_BACO = 0x8 # macro
SMU_13_0_7_PP_PLATFORM_CAP_MACO = 0x10 # macro
SMU_13_0_7_PP_PLATFORM_CAP_SHADOWPSTATE = 0x20 # macro
SMU_13_0_7_PP_THERMALCONTROLLER_NONE = 0 # macro
SMU_13_0_7_PP_THERMALCONTROLLER_NAVI21 = 28 # macro
SMU_13_0_7_PP_OVERDRIVE_VERSION = 0x83 # macro
SMU_13_0_7_PP_POWERSAVINGCLOCK_VERSION = 0x01 # macro
SMU_13_0_7_MAX_ODFEATURE = 32 # macro
SMU_13_0_7_MAX_ODSETTING = 64 # macro
SMU_13_0_7_MAX_PMSETTING = 32 # macro
SMU_13_0_7_MAX_PPCLOCK = 16 # macro
# values for enumeration 'SMU_13_0_7_ODFEATURE_CAP'
SMU_13_0_7_ODFEATURE_CAP__enumvalues = {
0: 'SMU_13_0_7_ODCAP_GFXCLK_LIMITS',
1: 'SMU_13_0_7_ODCAP_UCLK_LIMITS',
2: 'SMU_13_0_7_ODCAP_POWER_LIMIT',
3: 'SMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT',
4: 'SMU_13_0_7_ODCAP_FAN_SPEED_MIN',
5: 'SMU_13_0_7_ODCAP_TEMPERATURE_FAN',
6: 'SMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM',
7: 'SMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE',
8: 'SMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL',
9: 'SMU_13_0_7_ODCAP_AUTO_UV_ENGINE',
10: 'SMU_13_0_7_ODCAP_AUTO_OC_ENGINE',
11: 'SMU_13_0_7_ODCAP_AUTO_OC_MEMORY',
12: 'SMU_13_0_7_ODCAP_FAN_CURVE',
13: 'SMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT',
14: 'SMU_13_0_7_ODCAP_POWER_MODE',
15: 'SMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET',
16: 'SMU_13_0_7_ODCAP_COUNT',
}
SMU_13_0_7_ODCAP_GFXCLK_LIMITS = 0
SMU_13_0_7_ODCAP_UCLK_LIMITS = 1
SMU_13_0_7_ODCAP_POWER_LIMIT = 2
SMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMIT = 3
SMU_13_0_7_ODCAP_FAN_SPEED_MIN = 4
SMU_13_0_7_ODCAP_TEMPERATURE_FAN = 5
SMU_13_0_7_ODCAP_TEMPERATURE_SYSTEM = 6
SMU_13_0_7_ODCAP_MEMORY_TIMING_TUNE = 7
SMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROL = 8
SMU_13_0_7_ODCAP_AUTO_UV_ENGINE = 9
SMU_13_0_7_ODCAP_AUTO_OC_ENGINE = 10
SMU_13_0_7_ODCAP_AUTO_OC_MEMORY = 11
SMU_13_0_7_ODCAP_FAN_CURVE = 12
SMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT = 13
SMU_13_0_7_ODCAP_POWER_MODE = 14
SMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSET = 15
SMU_13_0_7_ODCAP_COUNT = 16
SMU_13_0_7_ODFEATURE_CAP = ctypes.c_uint32 # enum
# values for enumeration 'SMU_13_0_7_ODFEATURE_ID'
SMU_13_0_7_ODFEATURE_ID__enumvalues = {
1: 'SMU_13_0_7_ODFEATURE_GFXCLK_LIMITS',
2: 'SMU_13_0_7_ODFEATURE_UCLK_LIMITS',
4: 'SMU_13_0_7_ODFEATURE_POWER_LIMIT',
8: 'SMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT',
16: 'SMU_13_0_7_ODFEATURE_FAN_SPEED_MIN',
32: 'SMU_13_0_7_ODFEATURE_TEMPERATURE_FAN',
64: 'SMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM',
128: 'SMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE',
256: 'SMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL',
512: 'SMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE',
1024: 'SMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE',
2048: 'SMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY',
4096: 'SMU_13_0_7_ODFEATURE_FAN_CURVE',
8192: 'SMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT',
16384: 'SMU_13_0_7_ODFEATURE_POWER_MODE',
32768: 'SMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET',
16: 'SMU_13_0_7_ODFEATURE_COUNT',
}
SMU_13_0_7_ODFEATURE_GFXCLK_LIMITS = 1
SMU_13_0_7_ODFEATURE_UCLK_LIMITS = 2
SMU_13_0_7_ODFEATURE_POWER_LIMIT = 4
SMU_13_0_7_ODFEATURE_FAN_ACOUSTIC_LIMIT = 8
SMU_13_0_7_ODFEATURE_FAN_SPEED_MIN = 16
SMU_13_0_7_ODFEATURE_TEMPERATURE_FAN = 32
SMU_13_0_7_ODFEATURE_TEMPERATURE_SYSTEM = 64
SMU_13_0_7_ODFEATURE_MEMORY_TIMING_TUNE = 128
SMU_13_0_7_ODFEATURE_FAN_ZERO_RPM_CONTROL = 256
SMU_13_0_7_ODFEATURE_AUTO_UV_ENGINE = 512
SMU_13_0_7_ODFEATURE_AUTO_OC_ENGINE = 1024
SMU_13_0_7_ODFEATURE_AUTO_OC_MEMORY = 2048
SMU_13_0_7_ODFEATURE_FAN_CURVE = 4096
SMU_13_0_7_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT = 8192
SMU_13_0_7_ODFEATURE_POWER_MODE = 16384
SMU_13_0_7_ODFEATURE_PER_ZONE_GFX_VOLTAGE_OFFSET = 32768
SMU_13_0_7_ODFEATURE_COUNT = 16
SMU_13_0_7_ODFEATURE_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_13_0_7_ODSETTING_ID'
SMU_13_0_7_ODSETTING_ID__enumvalues = {
0: 'SMU_13_0_7_ODSETTING_GFXCLKFMAX',
1: 'SMU_13_0_7_ODSETTING_GFXCLKFMIN',
2: 'SMU_13_0_7_ODSETTING_UCLKFMIN',
3: 'SMU_13_0_7_ODSETTING_UCLKFMAX',
4: 'SMU_13_0_7_ODSETTING_POWERPERCENTAGE',
5: 'SMU_13_0_7_ODSETTING_FANRPMMIN',
6: 'SMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT',
7: 'SMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE',
8: 'SMU_13_0_7_ODSETTING_OPERATINGTEMPMAX',
9: 'SMU_13_0_7_ODSETTING_ACTIMING',
10: 'SMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL',
11: 'SMU_13_0_7_ODSETTING_AUTOUVENGINE',
12: 'SMU_13_0_7_ODSETTING_AUTOOCENGINE',
13: 'SMU_13_0_7_ODSETTING_AUTOOCMEMORY',
14: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1',
15: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1',
16: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2',
17: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2',
18: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3',
19: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3',
20: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4',
21: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4',
22: 'SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5',
23: 'SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5',
24: 'SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT',
25: 'SMU_13_0_7_ODSETTING_POWER_MODE',
26: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1',
27: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2',
28: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3',
29: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4',
30: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5',
31: 'SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6',
32: 'SMU_13_0_7_ODSETTING_COUNT',
}
SMU_13_0_7_ODSETTING_GFXCLKFMAX = 0
SMU_13_0_7_ODSETTING_GFXCLKFMIN = 1
SMU_13_0_7_ODSETTING_UCLKFMIN = 2
SMU_13_0_7_ODSETTING_UCLKFMAX = 3
SMU_13_0_7_ODSETTING_POWERPERCENTAGE = 4
SMU_13_0_7_ODSETTING_FANRPMMIN = 5
SMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMIT = 6
SMU_13_0_7_ODSETTING_FANTARGETTEMPERATURE = 7
SMU_13_0_7_ODSETTING_OPERATINGTEMPMAX = 8
SMU_13_0_7_ODSETTING_ACTIMING = 9
SMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROL = 10
SMU_13_0_7_ODSETTING_AUTOUVENGINE = 11
SMU_13_0_7_ODSETTING_AUTOOCENGINE = 12
SMU_13_0_7_ODSETTING_AUTOOCMEMORY = 13
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1 = 14
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1 = 15
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2 = 16
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2 = 17
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3 = 18
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3 = 19
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4 = 20
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4 = 21
SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5 = 22
SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5 = 23
SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT = 24
SMU_13_0_7_ODSETTING_POWER_MODE = 25
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1 = 26
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2 = 27
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3 = 28
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4 = 29
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5 = 30
SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6 = 31
SMU_13_0_7_ODSETTING_COUNT = 32
SMU_13_0_7_ODSETTING_ID = ctypes.c_uint32 # enum
# values for enumeration 'SMU_13_0_7_PWRMODE_SETTING'
SMU_13_0_7_PWRMODE_SETTING__enumvalues = {
0: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET',
1: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE',
2: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO',
3: 'SMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE',
4: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET',
5: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE',
6: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO',
7: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE',
8: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET',
9: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE',
10: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO',
11: 'SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE',
12: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET',
13: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE',
14: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO',
15: 'SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE',
}
SMU_13_0_7_PMSETTING_POWER_LIMIT_QUIET = 0
SMU_13_0_7_PMSETTING_POWER_LIMIT_BALANCE = 1
SMU_13_0_7_PMSETTING_POWER_LIMIT_TURBO = 2
SMU_13_0_7_PMSETTING_POWER_LIMIT_RAGE = 3
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_QUIET = 4
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_BALANCE = 5
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_TURBO = 6
SMU_13_0_7_PMSETTING_ACOUSTIC_TEMP_RAGE = 7
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET = 8
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE = 9
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO = 10
SMU_13_0_7_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE = 11
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET = 12
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE = 13
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO = 14
SMU_13_0_7_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE = 15
SMU_13_0_7_PWRMODE_SETTING = ctypes.c_uint32 # enum
class struct_smu_13_0_7_overdrive_table(Structure):
pass
struct_smu_13_0_7_overdrive_table._pack_ = 1 # source:False
struct_smu_13_0_7_overdrive_table._fields_ = [
('revision', ctypes.c_ubyte),
('reserve', ctypes.c_ubyte * 3),
('feature_count', ctypes.c_uint32),
('setting_count', ctypes.c_uint32),
('cap', ctypes.c_ubyte * 32),
('max', ctypes.c_uint32 * 64),
('min', ctypes.c_uint32 * 64),
('pm_setting', ctypes.c_int16 * 32),
]
# values for enumeration 'SMU_13_0_7_PPCLOCK_ID'
SMU_13_0_7_PPCLOCK_ID__enumvalues = {
0: 'SMU_13_0_7_PPCLOCK_GFXCLK',
1: 'SMU_13_0_7_PPCLOCK_SOCCLK',
2: 'SMU_13_0_7_PPCLOCK_UCLK',
3: 'SMU_13_0_7_PPCLOCK_FCLK',
4: 'SMU_13_0_7_PPCLOCK_DCLK_0',
5: 'SMU_13_0_7_PPCLOCK_VCLK_0',
6: 'SMU_13_0_7_PPCLOCK_DCLK_1',
7: 'SMU_13_0_7_PPCLOCK_VCLK_1',
8: 'SMU_13_0_7_PPCLOCK_DCEFCLK',
9: 'SMU_13_0_7_PPCLOCK_DISPCLK',
10: 'SMU_13_0_7_PPCLOCK_PIXCLK',
11: 'SMU_13_0_7_PPCLOCK_PHYCLK',
12: 'SMU_13_0_7_PPCLOCK_DTBCLK',
13: 'SMU_13_0_7_PPCLOCK_COUNT',
}
SMU_13_0_7_PPCLOCK_GFXCLK = 0
SMU_13_0_7_PPCLOCK_SOCCLK = 1
SMU_13_0_7_PPCLOCK_UCLK = 2
SMU_13_0_7_PPCLOCK_FCLK = 3
SMU_13_0_7_PPCLOCK_DCLK_0 = 4
SMU_13_0_7_PPCLOCK_VCLK_0 = 5
SMU_13_0_7_PPCLOCK_DCLK_1 = 6
SMU_13_0_7_PPCLOCK_VCLK_1 = 7
SMU_13_0_7_PPCLOCK_DCEFCLK = 8
SMU_13_0_7_PPCLOCK_DISPCLK = 9
SMU_13_0_7_PPCLOCK_PIXCLK = 10
SMU_13_0_7_PPCLOCK_PHYCLK = 11
SMU_13_0_7_PPCLOCK_DTBCLK = 12
SMU_13_0_7_PPCLOCK_COUNT = 13
SMU_13_0_7_PPCLOCK_ID = ctypes.c_uint32 # enum
class struct_smu_13_0_7_powerplay_table(Structure):
pass
class struct_atom_common_table_header(Structure):
pass
struct_atom_common_table_header._pack_ = 1 # source:False
struct_atom_common_table_header._fields_ = [
('structuresize', ctypes.c_uint16),
('format_revision', ctypes.c_ubyte),
('content_revision', ctypes.c_ubyte),
]
class struct_PPTable_t(Structure):
pass
class struct_SkuTable_t(Structure):
pass
class struct_QuadraticInt_t(Structure):
pass
struct_QuadraticInt_t._pack_ = 1 # source:False
struct_QuadraticInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_DpmDescriptor_t(Structure):
pass
class struct_LinearInt_t(Structure):
pass
struct_LinearInt_t._pack_ = 1 # source:False
struct_LinearInt_t._fields_ = [
('m', ctypes.c_uint32),
('b', ctypes.c_uint32),
]
struct_DpmDescriptor_t._pack_ = 1 # source:False
struct_DpmDescriptor_t._fields_ = [
('Padding', ctypes.c_ubyte),
('SnapToDiscrete', ctypes.c_ubyte),
('NumDiscreteLevels', ctypes.c_ubyte),
('CalculateFopt', ctypes.c_ubyte),
('ConversionToAvfsClk', struct_LinearInt_t),
('Padding3', ctypes.c_uint32 * 3),
('Padding4', ctypes.c_uint16),
('FoptimalDc', ctypes.c_uint16),
('FoptimalAc', ctypes.c_uint16),
('Padding2', ctypes.c_uint16),
]
class struct_AvfsDcBtcParams_t(Structure):
pass
struct_AvfsDcBtcParams_t._pack_ = 1 # source:False
struct_AvfsDcBtcParams_t._fields_ = [
('DcBtcEnabled', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 3),
('DcTol', ctypes.c_uint16),
('DcBtcGb', ctypes.c_uint16),
('DcBtcMin', ctypes.c_uint16),
('DcBtcMax', ctypes.c_uint16),
('DcBtcGbScalar', struct_LinearInt_t),
]
class struct_AvfsFuseOverride_t(Structure):
pass
struct_AvfsFuseOverride_t._pack_ = 1 # source:False
struct_AvfsFuseOverride_t._fields_ = [
('AvfsTemp', ctypes.c_uint16 * 2),
('VftFMin', ctypes.c_uint16),
('VInversion', ctypes.c_uint16),
('qVft', struct_QuadraticInt_t * 2),
('qAvfsGb', struct_QuadraticInt_t),
('qAvfsGb2', struct_QuadraticInt_t),
]
class struct_DroopInt_t(Structure):
pass
struct_DroopInt_t._pack_ = 1 # source:False
struct_DroopInt_t._fields_ = [
('a', ctypes.c_uint32),
('b', ctypes.c_uint32),
('c', ctypes.c_uint32),
]
class struct_BootValues_t(Structure):
pass
struct_BootValues_t._pack_ = 1 # source:False
struct_BootValues_t._fields_ = [
('InitGfxclk_bypass', ctypes.c_uint16),
('InitSocclk', ctypes.c_uint16),
('InitMp0clk', ctypes.c_uint16),
('InitMpioclk', ctypes.c_uint16),
('InitSmnclk', ctypes.c_uint16),
('InitUcpclk', ctypes.c_uint16),
('InitCsrclk', ctypes.c_uint16),
('InitDprefclk', ctypes.c_uint16),
('InitDcfclk', ctypes.c_uint16),
('InitDtbclk', ctypes.c_uint16),
('InitDclk', ctypes.c_uint16),
('InitVclk', ctypes.c_uint16),
('InitUsbdfsclk', ctypes.c_uint16),
('InitMp1clk', ctypes.c_uint16),
('InitLclk', ctypes.c_uint16),
('InitBaco400clk_bypass', ctypes.c_uint16),
('InitBaco1200clk_bypass', ctypes.c_uint16),
('InitBaco700clk_bypass', ctypes.c_uint16),
('InitFclk', ctypes.c_uint16),
('InitGfxclk_clkb', ctypes.c_uint16),
('InitUclkDPMState', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 3),
('InitVcoFreqPll0', ctypes.c_uint32),
('InitVcoFreqPll1', ctypes.c_uint32),
('InitVcoFreqPll2', ctypes.c_uint32),
('InitVcoFreqPll3', ctypes.c_uint32),
('InitVcoFreqPll4', ctypes.c_uint32),
('InitVcoFreqPll5', ctypes.c_uint32),
('InitVcoFreqPll6', ctypes.c_uint32),
('InitGfx', ctypes.c_uint16),
('InitSoc', ctypes.c_uint16),
('InitU', ctypes.c_uint16),
('Padding2', ctypes.c_uint16),
('Spare', ctypes.c_uint32 * 8),
]
class struct_DriverReportedClocks_t(Structure):
pass
struct_DriverReportedClocks_t._pack_ = 1 # source:False
struct_DriverReportedClocks_t._fields_ = [
('BaseClockAc', ctypes.c_uint16),
('GameClockAc', ctypes.c_uint16),
('BoostClockAc', ctypes.c_uint16),
('BaseClockDc', ctypes.c_uint16),
('GameClockDc', ctypes.c_uint16),
('BoostClockDc', ctypes.c_uint16),
('Reserved', ctypes.c_uint32 * 4),
]
class struct_MsgLimits_t(Structure):
pass
struct_MsgLimits_t._pack_ = 1 # source:False
struct_MsgLimits_t._fields_ = [
('Power', ctypes.c_uint16 * 2 * 4),
('Tdc', ctypes.c_uint16 * 3),
('Temperature', ctypes.c_uint16 * 13),
('PwmLimitMin', ctypes.c_ubyte),
('PwmLimitMax', ctypes.c_ubyte),
('FanTargetTemperature', ctypes.c_ubyte),
('Spare1', ctypes.c_ubyte * 1),
('AcousticTargetRpmThresholdMin', ctypes.c_uint16),
('AcousticTargetRpmThresholdMax', ctypes.c_uint16),
('AcousticLimitRpmThresholdMin', ctypes.c_uint16),
('AcousticLimitRpmThresholdMax', ctypes.c_uint16),
('PccLimitMin', ctypes.c_uint16),
('PccLimitMax', ctypes.c_uint16),
('FanStopTempMin', ctypes.c_uint16),
('FanStopTempMax', ctypes.c_uint16),
('FanStartTempMin', ctypes.c_uint16),
('FanStartTempMax', ctypes.c_uint16),
('PowerMinPpt0', ctypes.c_uint16 * 2),
('Spare', ctypes.c_uint32 * 11),
]
class struct_OverDriveLimits_t(Structure):
pass
struct_OverDriveLimits_t._pack_ = 1 # source:False
struct_OverDriveLimits_t._fields_ = [
('FeatureCtrlMask', ctypes.c_uint32),
('VoltageOffsetPerZoneBoundary', ctypes.c_int16),
('Reserved1', ctypes.c_uint16),
('Reserved2', ctypes.c_uint16),
('GfxclkFmin', ctypes.c_int16),
('GfxclkFmax', ctypes.c_int16),
('UclkFmin', ctypes.c_uint16),
('UclkFmax', ctypes.c_uint16),
('Ppt', ctypes.c_int16),
('Tdc', ctypes.c_int16),
('FanLinearPwmPoints', ctypes.c_ubyte),
('FanLinearTempPoints', ctypes.c_ubyte),
('FanMinimumPwm', ctypes.c_uint16),
('AcousticTargetRpmThreshold', ctypes.c_uint16),
('AcousticLimitRpmThreshold', ctypes.c_uint16),
('FanTargetTemperature', ctypes.c_uint16),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanZeroRpmStopTemp', ctypes.c_ubyte),
('FanMode', ctypes.c_ubyte),
('MaxOpTemp', ctypes.c_ubyte),
('Padding', ctypes.c_ubyte * 4),
('Spare', ctypes.c_uint32 * 12),
]
struct_SkuTable_t._pack_ = 1 # source:False
struct_SkuTable_t._fields_ = [
('Version', ctypes.c_uint32),
('FeaturesToRun', ctypes.c_uint32 * 2),
('TotalPowerConfig', ctypes.c_ubyte),
('CustomerVariant', ctypes.c_ubyte),
('MemoryTemperatureTypeMask', ctypes.c_ubyte),
('SmartShiftVersion', ctypes.c_ubyte),
('SocketPowerLimitAc', ctypes.c_uint16 * 4),
('SocketPowerLimitDc', ctypes.c_uint16 * 4),
('SocketPowerLimitSmartShift2', ctypes.c_uint16),
('EnableLegacyPptLimit', ctypes.c_ubyte),
('UseInputTelemetry', ctypes.c_ubyte),
('SmartShiftMinReportedPptinDcs', ctypes.c_ubyte),
('PaddingPpt', ctypes.c_ubyte * 1),
('VrTdcLimit', ctypes.c_uint16 * 3),
('PlatformTdcLimit', ctypes.c_uint16 * 3),
('TemperatureLimit', ctypes.c_uint16 * 13),
('HwCtfTempLimit', ctypes.c_uint16),
('PaddingInfra', ctypes.c_uint16),
('FitControllerFailureRateLimit', ctypes.c_uint32),
('FitControllerGfxDutyCycle', ctypes.c_uint32),
('FitControllerSocDutyCycle', ctypes.c_uint32),
('FitControllerSocOffset', ctypes.c_uint32),
('GfxApccPlusResidencyLimit', ctypes.c_uint32),
('ThrottlerControlMask', ctypes.c_uint32),
('FwDStateMask', ctypes.c_uint32),
('UlvVoltageOffset', ctypes.c_uint16 * 2),
('UlvVoltageOffsetU', ctypes.c_uint16),
('DeepUlvVoltageOffsetSoc', ctypes.c_uint16),
('DefaultMaxVoltage', ctypes.c_uint16 * 2),
('BoostMaxVoltage', ctypes.c_uint16 * 2),
('VminTempHystersis', ctypes.c_int16 * 2),
('VminTempThreshold', ctypes.c_int16 * 2),
('Vmin_Hot_T0', ctypes.c_uint16 * 2),
('Vmin_Cold_T0', ctypes.c_uint16 * 2),
('Vmin_Hot_Eol', ctypes.c_uint16 * 2),
('Vmin_Cold_Eol', ctypes.c_uint16 * 2),
('Vmin_Aging_Offset', ctypes.c_uint16 * 2),
('Spare_Vmin_Plat_Offset_Hot', ctypes.c_uint16 * 2),
('Spare_Vmin_Plat_Offset_Cold', ctypes.c_uint16 * 2),
('VcBtcFixedVminAgingOffset', ctypes.c_uint16 * 2),
('VcBtcVmin2PsmDegrationGb', ctypes.c_uint16 * 2),
('VcBtcPsmA', ctypes.c_uint32 * 2),
('VcBtcPsmB', ctypes.c_uint32 * 2),
('VcBtcVminA', ctypes.c_uint32 * 2),
('VcBtcVminB', ctypes.c_uint32 * 2),
('PerPartVminEnabled', ctypes.c_ubyte * 2),
('VcBtcEnabled', ctypes.c_ubyte * 2),
('SocketPowerLimitAcTau', ctypes.c_uint16 * 4),
('SocketPowerLimitDcTau', ctypes.c_uint16 * 4),
('Vmin_droop', struct_QuadraticInt_t),
('SpareVmin', ctypes.c_uint32 * 9),
('DpmDescriptor', struct_DpmDescriptor_t * 13),
('FreqTableGfx', ctypes.c_uint16 * 16),
('FreqTableVclk', ctypes.c_uint16 * 8),
('FreqTableDclk', ctypes.c_uint16 * 8),
('FreqTableSocclk', ctypes.c_uint16 * 8),
('FreqTableUclk', ctypes.c_uint16 * 4),
('FreqTableDispclk', ctypes.c_uint16 * 8),
('FreqTableDppClk', ctypes.c_uint16 * 8),
('FreqTableDprefclk', ctypes.c_uint16 * 8),
('FreqTableDcfclk', ctypes.c_uint16 * 8),
('FreqTableDtbclk', ctypes.c_uint16 * 8),
('FreqTableFclk', ctypes.c_uint16 * 8),
('DcModeMaxFreq', ctypes.c_uint32 * 13),
('Mp0clkFreq', ctypes.c_uint16 * 2),
('Mp0DpmVoltage', ctypes.c_uint16 * 2),
('GfxclkSpare', ctypes.c_ubyte * 2),
('GfxclkFreqCap', ctypes.c_uint16),
('GfxclkFgfxoffEntry', ctypes.c_uint16),
('GfxclkFgfxoffExitImu', ctypes.c_uint16),
('GfxclkFgfxoffExitRlc', ctypes.c_uint16),
('GfxclkThrottleClock', ctypes.c_uint16),
('EnableGfxPowerStagesGpio', ctypes.c_ubyte),
('GfxIdlePadding', ctypes.c_ubyte),
('SmsRepairWRCKClkDivEn', ctypes.c_ubyte),
('SmsRepairWRCKClkDivVal', ctypes.c_ubyte),
('GfxOffEntryEarlyMGCGEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGDelayEn', ctypes.c_ubyte),
('GfxOffEntryForceCGCGDelayVal', ctypes.c_ubyte),
('GfxclkFreqGfxUlv', ctypes.c_uint16),
('GfxIdlePadding2', ctypes.c_ubyte * 2),
('GfxOffEntryHysteresis', ctypes.c_uint32),
('GfxoffSpare', ctypes.c_uint32 * 15),
('DfllBtcMasterScalerM', ctypes.c_uint32),
('DfllBtcMasterScalerB', ctypes.c_int32),
('DfllBtcSlaveScalerM', ctypes.c_uint32),
('DfllBtcSlaveScalerB', ctypes.c_int32),
('DfllPccAsWaitCtrl', ctypes.c_uint32),
('DfllPccAsStepCtrl', ctypes.c_uint32),
('GfxGpoSpare', ctypes.c_uint32 * 10),
('DcsGfxOffVoltage', ctypes.c_uint16),
('PaddingDcs', ctypes.c_uint16),
('DcsMinGfxOffTime', ctypes.c_uint16),
('DcsMaxGfxOffTime', ctypes.c_uint16),
('DcsMinCreditAccum', ctypes.c_uint32),
('DcsExitHysteresis', ctypes.c_uint16),
('DcsTimeout', ctypes.c_uint16),
('DcsSpare', ctypes.c_uint32 * 14),
('ShadowFreqTableUclk', ctypes.c_uint16 * 4),
('UseStrobeModeOptimizations', ctypes.c_ubyte),
('PaddingMem', ctypes.c_ubyte * 3),
('UclkDpmPstates', ctypes.c_ubyte * 4),
('FreqTableUclkDiv', ctypes.c_ubyte * 4),
('MemVmempVoltage', ctypes.c_uint16 * 4),
('MemVddioVoltage', ctypes.c_uint16 * 4),
('FclkDpmUPstates', ctypes.c_ubyte * 8),
('FclkDpmVddU', ctypes.c_uint16 * 8),
('FclkDpmUSpeed', ctypes.c_uint16 * 8),
('FclkDpmDisallowPstateFreq', ctypes.c_uint16),
('PaddingFclk', ctypes.c_uint16),
('PcieGenSpeed', ctypes.c_ubyte * 3),
('PcieLaneCount', ctypes.c_ubyte * 3),
('LclkFreq', ctypes.c_uint16 * 3),
('FanStopTemp', ctypes.c_uint16 * 13),
('FanStartTemp', ctypes.c_uint16 * 13),
('FanGain', ctypes.c_uint16 * 13),
('FanGainPadding', ctypes.c_uint16),
('FanPwmMin', ctypes.c_uint16),
('AcousticTargetRpmThreshold', ctypes.c_uint16),
('AcousticLimitRpmThreshold', ctypes.c_uint16),
('FanMaximumRpm', ctypes.c_uint16),
('MGpuAcousticLimitRpmThreshold', ctypes.c_uint16),
('FanTargetGfxclk', ctypes.c_uint16),
('TempInputSelectMask', ctypes.c_uint32),
('FanZeroRpmEnable', ctypes.c_ubyte),
('FanTachEdgePerRev', ctypes.c_ubyte),
('FanTargetTemperature', ctypes.c_uint16 * 13),
('FuzzyFan_ErrorSetDelta', ctypes.c_int16),
('FuzzyFan_ErrorRateSetDelta', ctypes.c_int16),
('FuzzyFan_PwmSetDelta', ctypes.c_int16),
('FuzzyFan_Reserved', ctypes.c_uint16),
('FwCtfLimit', ctypes.c_uint16 * 13),
('IntakeTempEnableRPM', ctypes.c_uint16),
('IntakeTempOffsetTemp', ctypes.c_int16),
('IntakeTempReleaseTemp', ctypes.c_uint16),
('IntakeTempHighIntakeAcousticLimit', ctypes.c_uint16),
('IntakeTempAcouticLimitReleaseRate', ctypes.c_uint16),
('FanAbnormalTempLimitOffset', ctypes.c_int16),
('FanStalledTriggerRpm', ctypes.c_uint16),
('FanAbnormalTriggerRpmCoeff', ctypes.c_uint16),
('FanAbnormalDetectionEnable', ctypes.c_u
gitextract_265cjues/ ├── .gitignore ├── LICENSE ├── README.md ├── setup.py ├── src/ │ └── upp/ │ ├── __init__.py │ ├── atom_gen/ │ │ ├── README.md │ │ ├── __init__.py │ │ ├── atombios.py │ │ ├── pptable_v1_0.py │ │ ├── smu_v11_0_7_navi20.py │ │ ├── smu_v11_0_arcturus.py │ │ ├── smu_v11_0_navi10.py │ │ ├── smu_v13_0_7_navi30.py │ │ ├── smu_v14_0_2_navi40.py │ │ ├── vega10_pptable.py │ │ └── vega20_pptable.py │ ├── decode.py │ └── upp.py ├── test/ │ ├── AMD.RX480.8192.160603.rom.dump │ ├── AMD.RX480.8192.160603.rom.rawdump │ ├── AMD.RX5700XT.8192.190616.rom.check │ ├── AMD.RX5700XT.8192.190616.rom.conf │ ├── AMD.RX5700XT.8192.190616.rom.dump │ ├── AMD.RX5700XT.8192.190616.rom.rawdump │ ├── AMD.RX6900XT.16384.201104.rom.dump │ ├── AMD.RX6900XT.16384.201104.rom.rawdump │ ├── AMD.RX7900XTX.24576.230323.rom.dump │ ├── AMD.RX7900XTX.24576.230323.rom.rawdump │ ├── AMD.RXVega64.8176.170719.rom.dump │ ├── AMD.RXVega64.8176.170719.rom.rawdump │ ├── AMD.RXVegaFrontier.16384.170628.rom.dump │ ├── AMD.RXVegaFrontier.16384.170628.rom.rawdump │ ├── AMD.RadeonVII.16384.190116.rom.dump │ ├── AMD.RadeonVII.16384.190116.rom.rawdump │ ├── MI100_000.000.000.000.016113_113-D3431401-100.rom.dump │ ├── MI100_000.000.000.000.016113_113-D3431401-100.rom.rawdump │ ├── Powercolor.RX9070.16384.241204_1.rom.dump │ ├── Powercolor.RX9070.16384.241204_1.rom.rawdump │ ├── navi23.mpt │ └── test.sh └── upliftpowerplay@.service
SYMBOL INDEX (259 symbols across 11 files)
FILE: src/upp/atom_gen/atombios.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct__ATOM_COMMON_TABLE_HEADER (line 121) | class struct__ATOM_COMMON_TABLE_HEADER(Structure):
class struct__ATOM_ROM_HEADER (line 131) | class struct__ATOM_ROM_HEADER(Structure):
class struct__ATOM_ROM_HEADER_V2_1 (line 156) | class struct__ATOM_ROM_HEADER_V2_1(Structure):
class struct__ATOM_MASTER_DATA_TABLE (line 181) | class struct__ATOM_MASTER_DATA_TABLE(Structure):
class struct__ATOM_MASTER_LIST_OF_DATA_TABLES (line 184) | class struct__ATOM_MASTER_LIST_OF_DATA_TABLES(Structure):
FILE: src/upp/atom_gen/pptable_v1_0.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct__ATOM_Tonga_POWERPLAYTABLE (line 169) | class struct__ATOM_Tonga_POWERPLAYTABLE(Structure):
class struct__ATOM_COMMON_TABLE_HEADER (line 172) | class struct__ATOM_COMMON_TABLE_HEADER(Structure):
class struct__ATOM_Tonga_State (line 215) | class struct__ATOM_Tonga_State(Structure):
class struct__ATOM_Tonga_State_Array (line 235) | class struct__ATOM_Tonga_State_Array(Structure):
class struct__ATOM_Tonga_MCLK_Dependency_Record (line 246) | class struct__ATOM_Tonga_MCLK_Dependency_Record(Structure):
class struct__ATOM_Tonga_MCLK_Dependency_Table (line 260) | class struct__ATOM_Tonga_MCLK_Dependency_Table(Structure):
class struct__ATOM_Tonga_SCLK_Dependency_Record (line 271) | class struct__ATOM_Tonga_SCLK_Dependency_Record(Structure):
class struct__ATOM_Tonga_SCLK_Dependency_Table (line 285) | class struct__ATOM_Tonga_SCLK_Dependency_Table(Structure):
class struct__ATOM_Polaris_SCLK_Dependency_Record (line 296) | class struct__ATOM_Polaris_SCLK_Dependency_Record(Structure):
class struct__ATOM_Polaris_SCLK_Dependency_Table (line 311) | class struct__ATOM_Polaris_SCLK_Dependency_Table(Structure):
class struct__ATOM_Tonga_PCIE_Record (line 322) | class struct__ATOM_Tonga_PCIE_Record(Structure):
class struct__ATOM_Tonga_PCIE_Table (line 333) | class struct__ATOM_Tonga_PCIE_Table(Structure):
class struct__ATOM_Polaris10_PCIE_Record (line 344) | class struct__ATOM_Polaris10_PCIE_Record(Structure):
class struct__ATOM_Polaris10_PCIE_Table (line 356) | class struct__ATOM_Polaris10_PCIE_Table(Structure):
class struct__ATOM_Tonga_MM_Dependency_Record (line 367) | class struct__ATOM_Tonga_MM_Dependency_Record(Structure):
class struct__ATOM_Tonga_MM_Dependency_Table (line 382) | class struct__ATOM_Tonga_MM_Dependency_Table(Structure):
class struct__ATOM_Tonga_Voltage_Lookup_Record (line 393) | class struct__ATOM_Tonga_Voltage_Lookup_Record(Structure):
class struct__ATOM_Tonga_Voltage_Lookup_Table (line 405) | class struct__ATOM_Tonga_Voltage_Lookup_Table(Structure):
class struct__ATOM_Tonga_Fan_Table (line 416) | class struct__ATOM_Tonga_Fan_Table(Structure):
class struct__ATOM_Fiji_Fan_Table (line 441) | class struct__ATOM_Fiji_Fan_Table(Structure):
class struct__ATOM_Polaris_Fan_Table (line 473) | class struct__ATOM_Polaris_Fan_Table(Structure):
class struct__ATOM_Tonga_Thermal_Controller (line 508) | class struct__ATOM_Tonga_Thermal_Controller(Structure):
class struct__ATOM_Tonga_VCE_State_Record (line 525) | class struct__ATOM_Tonga_VCE_State_Record(Structure):
class struct__ATOM_Tonga_VCE_State_Table (line 537) | class struct__ATOM_Tonga_VCE_State_Table(Structure):
class struct__ATOM_Tonga_PowerTune_Table (line 548) | class struct__ATOM_Tonga_PowerTune_Table(Structure):
class struct__ATOM_Fiji_PowerTune_Table (line 571) | class struct__ATOM_Fiji_PowerTune_Table(Structure):
class struct__ATOM_Polaris_PowerTune_Table (line 607) | class struct__ATOM_Polaris_PowerTune_Table(Structure):
class struct__ATOM_Tonga_PPM_Table (line 647) | class struct__ATOM_Tonga_PPM_Table(Structure):
class struct__ATOM_Tonga_Hard_Limit_Record (line 666) | class struct__ATOM_Tonga_Hard_Limit_Record(Structure):
class struct__ATOM_Tonga_Hard_Limit_Table (line 679) | class struct__ATOM_Tonga_Hard_Limit_Table(Structure):
class struct__ATOM_Tonga_GPIO_Table (line 690) | class struct__ATOM_Tonga_GPIO_Table(Structure):
class struct__PPTable_Generic_SubTable_Header (line 701) | class struct__PPTable_Generic_SubTable_Header(Structure):
FILE: src/upp/atom_gen/smu_v11_0_7_navi20.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct_smu_11_0_7_overdrive_table (line 303) | class struct_smu_11_0_7_overdrive_table(Structure):
class struct_smu_11_0_7_power_saving_clock_table (line 351) | class struct_smu_11_0_7_power_saving_clock_table(Structure):
class struct_smu_11_0_7_powerplay_table (line 363) | class struct_smu_11_0_7_powerplay_table(Structure):
class struct_atom_common_table_header (line 366) | class struct_atom_common_table_header(Structure):
class struct_PPTable_t (line 376) | class struct_PPTable_t(Structure):
class struct_DpmDescriptor_t (line 379) | class struct_DpmDescriptor_t(Structure):
class struct_LinearInt_t (line 382) | class struct_LinearInt_t(Structure):
class struct_QuadraticInt_t (line 391) | class struct_QuadraticInt_t(Structure):
class struct_DroopInt_t (line 413) | class struct_DroopInt_t(Structure):
class struct_UclkDpmChangeRange_t (line 423) | class struct_UclkDpmChangeRange_t(Structure):
class struct_PiecewiseLinearDroopInt_t (line 432) | class struct_PiecewiseLinearDroopInt_t(Structure):
class struct_I2cControllerConfig_t (line 441) | class struct_I2cControllerConfig_t(Structure):
FILE: src/upp/atom_gen/smu_v11_0_arcturus.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct_smu_11_0_overdrive_table (line 250) | class struct_smu_11_0_overdrive_table(Structure):
class struct_smu_11_0_power_saving_clock_table (line 291) | class struct_smu_11_0_power_saving_clock_table(Structure):
class struct_smu_11_0_powerplay_table (line 303) | class struct_smu_11_0_powerplay_table(Structure):
class struct_atom_common_table_header (line 306) | class struct_atom_common_table_header(Structure):
class struct_PPTable_t (line 316) | class struct_PPTable_t(Structure):
class struct_DpmDescriptor_t (line 319) | class struct_DpmDescriptor_t(Structure):
class struct_LinearInt_t (line 322) | class struct_LinearInt_t(Structure):
class struct_QuadraticInt_t (line 331) | class struct_QuadraticInt_t(Structure):
class struct_DroopInt_t (line 353) | class struct_DroopInt_t(Structure):
class struct_I2cControllerConfig_t (line 363) | class struct_I2cControllerConfig_t(Structure):
FILE: src/upp/atom_gen/smu_v11_0_navi10.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct_smu_11_0_overdrive_table (line 250) | class struct_smu_11_0_overdrive_table(Structure):
class struct_smu_11_0_power_saving_clock_table (line 291) | class struct_smu_11_0_power_saving_clock_table(Structure):
class struct_smu_11_0_powerplay_table (line 303) | class struct_smu_11_0_powerplay_table(Structure):
class struct_atom_common_table_header (line 306) | class struct_atom_common_table_header(Structure):
class struct_PPTable_t (line 316) | class struct_PPTable_t(Structure):
class struct_DpmDescriptor_t (line 319) | class struct_DpmDescriptor_t(Structure):
class struct_LinearInt_t (line 322) | class struct_LinearInt_t(Structure):
class struct_QuadraticInt_t (line 331) | class struct_QuadraticInt_t(Structure):
class struct_DroopInt_t (line 351) | class struct_DroopInt_t(Structure):
class struct_I2cControllerConfig_t (line 361) | class struct_I2cControllerConfig_t(Structure):
FILE: src/upp/atom_gen/smu_v13_0_7_navi30.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct_smu_13_0_7_overdrive_table (line 323) | class struct_smu_13_0_7_overdrive_table(Structure):
class struct_smu_13_0_7_powerplay_table (line 371) | class struct_smu_13_0_7_powerplay_table(Structure):
class struct_atom_common_table_header (line 374) | class struct_atom_common_table_header(Structure):
class struct_PPTable_t (line 384) | class struct_PPTable_t(Structure):
class struct_SkuTable_t (line 387) | class struct_SkuTable_t(Structure):
class struct_QuadraticInt_t (line 390) | class struct_QuadraticInt_t(Structure):
class struct_DpmDescriptor_t (line 400) | class struct_DpmDescriptor_t(Structure):
class struct_LinearInt_t (line 403) | class struct_LinearInt_t(Structure):
class struct_AvfsDcBtcParams_t (line 426) | class struct_AvfsDcBtcParams_t(Structure):
class struct_AvfsFuseOverride_t (line 440) | class struct_AvfsFuseOverride_t(Structure):
class struct_DroopInt_t (line 453) | class struct_DroopInt_t(Structure):
class struct_BootValues_t (line 463) | class struct_BootValues_t(Structure):
class struct_DriverReportedClocks_t (line 504) | class struct_DriverReportedClocks_t(Structure):
class struct_MsgLimits_t (line 518) | class struct_MsgLimits_t(Structure):
class struct_OverDriveLimits_t (line 544) | class struct_OverDriveLimits_t(Structure):
class struct_BoardTable_t (line 769) | class struct_BoardTable_t(Structure):
class struct_I2cControllerConfig_t (line 772) | class struct_I2cControllerConfig_t(Structure):
class struct_SviTelemetryScale_t (line 787) | class struct_SviTelemetryScale_t(Structure):
FILE: src/upp/atom_gen/smu_v14_0_2_navi40.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct_smu_14_0_2_overdrive_table (line 262) | class struct_smu_14_0_2_overdrive_table(Structure):
class struct_smu_14_0_2_powerplay_table (line 288) | class struct_smu_14_0_2_powerplay_table(Structure):
class struct_atom_common_table_header (line 291) | class struct_atom_common_table_header(Structure):
class struct_PPTable_t (line 301) | class struct_PPTable_t(Structure):
class struct_PFE_Settings_t (line 304) | class struct_PFE_Settings_t(Structure):
class struct_SkuTable_t (line 317) | class struct_SkuTable_t(Structure):
class struct_QuadraticInt_t (line 320) | class struct_QuadraticInt_t(Structure):
class struct_DpmDescriptor_t (line 330) | class struct_DpmDescriptor_t(Structure):
class struct_LinearInt_t (line 333) | class struct_LinearInt_t(Structure):
class struct_AvfsDcBtcParams_t (line 356) | class struct_AvfsDcBtcParams_t(Structure):
class struct_AvfsFuseOverride_t (line 370) | class struct_AvfsFuseOverride_t(Structure):
class struct_DroopInt_t (line 383) | class struct_DroopInt_t(Structure):
class struct_BootValues_t (line 393) | class struct_BootValues_t(Structure):
class struct_DriverReportedClocks_t (line 438) | class struct_DriverReportedClocks_t(Structure):
class struct_MsgLimits_t (line 454) | class struct_MsgLimits_t(Structure):
class struct_OverDriveLimits_t (line 480) | class struct_OverDriveLimits_t(Structure):
class struct_CustomSkuTable_t (line 757) | class struct_CustomSkuTable_t(Structure):
class struct_BoardTable_t (line 813) | class struct_BoardTable_t(Structure):
class struct_I2cControllerConfig_t (line 816) | class struct_I2cControllerConfig_t(Structure):
class struct_Svi3RegulatorSettings_t (line 831) | class struct_Svi3RegulatorSettings_t(Structure):
class struct_smu_14_0_2_custom_overdrive_table (line 961) | class struct_smu_14_0_2_custom_overdrive_table(Structure):
class struct_smu_14_0_3_custom_powerplay_table (line 974) | class struct_smu_14_0_3_custom_powerplay_table(Structure):
FILE: src/upp/atom_gen/vega10_pptable.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct__ATOM_Vega10_POWERPLAYTABLE (line 153) | class struct__ATOM_Vega10_POWERPLAYTABLE(Structure):
class struct_atom_common_table_header (line 156) | class struct_atom_common_table_header(Structure):
class struct__ATOM_Vega10_State (line 212) | class struct__ATOM_Vega10_State(Structure):
class struct__ATOM_Vega10_State_Array (line 229) | class struct__ATOM_Vega10_State_Array(Structure):
class struct__ATOM_Vega10_CLK_Dependency_Record (line 240) | class struct__ATOM_Vega10_CLK_Dependency_Record(Structure):
class struct__ATOM_Vega10_GFXCLK_Dependency_Record (line 250) | class struct__ATOM_Vega10_GFXCLK_Dependency_Record(Structure):
class struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2 (line 262) | class struct__ATOM_Vega10_GFXCLK_Dependency_Record_V2(Structure):
class struct__ATOM_Vega10_MCLK_Dependency_Record (line 276) | class struct__ATOM_Vega10_MCLK_Dependency_Record(Structure):
class struct__ATOM_Vega10_GFXCLK_Dependency_Table (line 288) | class struct__ATOM_Vega10_GFXCLK_Dependency_Table(Structure):
class struct__ATOM_Vega10_MCLK_Dependency_Table (line 299) | class struct__ATOM_Vega10_MCLK_Dependency_Table(Structure):
class struct__ATOM_Vega10_SOCCLK_Dependency_Table (line 310) | class struct__ATOM_Vega10_SOCCLK_Dependency_Table(Structure):
class struct__ATOM_Vega10_DCEFCLK_Dependency_Table (line 321) | class struct__ATOM_Vega10_DCEFCLK_Dependency_Table(Structure):
class struct__ATOM_Vega10_PIXCLK_Dependency_Table (line 332) | class struct__ATOM_Vega10_PIXCLK_Dependency_Table(Structure):
class struct__ATOM_Vega10_DISPCLK_Dependency_Table (line 343) | class struct__ATOM_Vega10_DISPCLK_Dependency_Table(Structure):
class struct__ATOM_Vega10_PHYCLK_Dependency_Table (line 354) | class struct__ATOM_Vega10_PHYCLK_Dependency_Table(Structure):
class struct__ATOM_Vega10_MM_Dependency_Record (line 365) | class struct__ATOM_Vega10_MM_Dependency_Record(Structure):
class struct__ATOM_Vega10_MM_Dependency_Table (line 378) | class struct__ATOM_Vega10_MM_Dependency_Table(Structure):
class struct__ATOM_Vega10_PCIE_Record (line 389) | class struct__ATOM_Vega10_PCIE_Record(Structure):
class struct__ATOM_Vega10_PCIE_Table (line 400) | class struct__ATOM_Vega10_PCIE_Table(Structure):
class struct__ATOM_Vega10_Voltage_Lookup_Record (line 411) | class struct__ATOM_Vega10_Voltage_Lookup_Record(Structure):
class struct__ATOM_Vega10_Voltage_Lookup_Table (line 420) | class struct__ATOM_Vega10_Voltage_Lookup_Table(Structure):
class struct__ATOM_Vega10_Fan_Table (line 431) | class struct__ATOM_Vega10_Fan_Table(Structure):
class struct__ATOM_Vega10_Fan_Table_V2 (line 457) | class struct__ATOM_Vega10_Fan_Table_V2(Structure):
class struct__ATOM_Vega10_Fan_Table_V3 (line 485) | class struct__ATOM_Vega10_Fan_Table_V3(Structure):
class struct__ATOM_Vega10_Thermal_Controller (line 514) | class struct__ATOM_Vega10_Thermal_Controller(Structure):
class struct__ATOM_Vega10_VCE_State_Record (line 530) | class struct__ATOM_Vega10_VCE_State_Record(Structure):
class struct__ATOM_Vega10_VCE_State_Table (line 542) | class struct__ATOM_Vega10_VCE_State_Table(Structure):
class struct__ATOM_Vega10_PowerTune_Table (line 553) | class struct__ATOM_Vega10_PowerTune_Table(Structure):
class struct__ATOM_Vega10_PowerTune_Table_V2 (line 587) | class struct__ATOM_Vega10_PowerTune_Table_V2(Structure):
class struct__ATOM_Vega10_PowerTune_Table_V3 (line 618) | class struct__ATOM_Vega10_PowerTune_Table_V3(Structure):
class struct__ATOM_Vega10_Hard_Limit_Record (line 653) | class struct__ATOM_Vega10_Hard_Limit_Record(Structure):
class struct__ATOM_Vega10_Hard_Limit_Table (line 667) | class struct__ATOM_Vega10_Hard_Limit_Table(Structure):
class struct__Vega10_PPTable_Generic_SubTable_Header (line 678) | class struct__Vega10_PPTable_Generic_SubTable_Header(Structure):
FILE: src/upp/atom_gen/vega20_pptable.py
class AsDictMixin (line 11) | class AsDictMixin:
method as_dict (line 13) | def as_dict(cls, self):
class Structure (line 53) | class Structure(ctypes.Structure, AsDictMixin):
method __init__ (line 55) | def __init__(self, *args, **kwds):
method _field_names_ (line 63) | def _field_names_(cls):
method get_type (line 70) | def get_type(cls, field):
method bind (line 77) | def bind(cls, bound_fields):
class Union (line 114) | class Union(ctypes.Union, AsDictMixin):
class struct__ATOM_VEGA20_OVERDRIVE8_RECORD (line 196) | class struct__ATOM_VEGA20_OVERDRIVE8_RECORD(Structure):
class struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD (line 239) | class struct__ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD(Structure):
class struct__ATOM_VEGA20_POWERPLAYTABLE (line 251) | class struct__ATOM_VEGA20_POWERPLAYTABLE(Structure):
class struct_atom_common_table_header (line 254) | class struct_atom_common_table_header(Structure):
class struct_PPTable_t (line 264) | class struct_PPTable_t(Structure):
class struct_DpmDescriptor_t (line 267) | class struct_DpmDescriptor_t(Structure):
class struct_LinearInt_t (line 270) | class struct_LinearInt_t(Structure):
class struct_QuadraticInt_t (line 279) | class struct_QuadraticInt_t(Structure):
class struct_DroopInt_t (line 299) | class struct_DroopInt_t(Structure):
class struct_I2cControllerConfig_t (line 309) | class struct_I2cControllerConfig_t(Structure):
FILE: src/upp/decode.py
function odict (line 47) | def odict(init_data=None):
function _read_binary_file (line 57) | def _read_binary_file(filename):
function _write_binary_file (line 64) | def _write_binary_file(filename, raw_data):
function _bytes2hex (line 76) | def _bytes2hex(bytes):
function _checksum (line 85) | def _checksum(rom_bytes):
function _rom_info (line 95) | def _rom_info(vrom_file):
function extract_rom (line 229) | def extract_rom(vrom_file, out_pp_file):
function inject_pp_table (line 244) | def inject_pp_table(input_rom, output_rom, pp_bin_file):
function validate_pp (line 269) | def validate_pp(header, rawbytes, rawdump):
function decode_pp_table (line 296) | def decode_pp_table(rawdata, c_struct):
function _get_bigcap_indices (line 304) | def _get_bigcap_indices(string):
function _print_raw_value (line 331) | def _print_raw_value(offset, symbol, rawbytes, name, desc, value):
function _get_ofst_cstruct (line 343) | def _get_ofst_cstruct(module, name, header_bytes, debug=False):
function build_data_tree (line 515) | def build_data_tree(data, raw=None, decoded=None, parent_name='/',
function select_pp_struct (line 688) | def select_pp_struct(rawbytes, rawdump=False, debug=False):
function dump_pp_table (line 821) | def dump_pp_table(pp_bin_file, data_dict=None, indent=0, parent='',
function get_value (line 853) | def get_value(pp_bin_file, var_path, data_dict=None, debug=False):
function set_value (line 918) | def set_value(pp_bin_file, pp_tbl_bytes, var_path, new_value,
FILE: src/upp/upp.py
function _normalize_var_path (line 20) | def _normalize_var_path(var_path_str):
function _is_int_or_float (line 27) | def _is_int_or_float(value):
function _validate_set_pair (line 38) | def _validate_set_pair(set_pair):
function _get_pp_data_from_registry (line 49) | def _get_pp_data_from_registry(reg_file_path):
function _get_pp_data_from_mpt (line 90) | def _get_pp_data_from_mpt(mpt_filename):
function _check_file_writeable (line 105) | def _check_file_writeable(filename):
function _write_pp_to_reg_file (line 117) | def _write_pp_to_reg_file(filename, data, debug=False):
function _load_variable_set (line 134) | def _load_variable_set(dump_filename):
function cli (line 181) | def cli(ctx, debug, pp_file, from_registry, from_mpt):
function version (line 233) | def version():
function dump (line 243) | def dump(ctx, raw):
function undump (line 279) | def undump(ctx, dump_filename, to_registry, write):
function extract (line 299) | def extract(ctx, video_rom):
function inject (line 331) | def inject(ctx, input_rom, output_rom):
function get (line 363) | def get(ctx, variable_path_set):
function set (line 405) | def set(ctx, variable_path_set, to_registry, write, from_conf):
function main (line 494) | def main():
Condensed preview — 41 files, each showing path, character count, and a content snippet. Download the .json file or copy for the full structured content (1,196K chars).
[
{
"path": ".gitignore",
"chars": 1225,
"preview": "test/ROMs/\ntest/tmp/\n\n# Byte-compiled / optimized / DLL files\n__pycache__/\n*.py[cod]\n*$py.class\n\n# C extensions\n*.so\n\n# "
},
{
"path": "LICENSE",
"chars": 35149,
"preview": " GNU GENERAL PUBLIC LICENSE\n Version 3, 29 June 2007\n\n Copyright (C) 2007 Free "
},
{
"path": "README.md",
"chars": 7824,
"preview": "## UPP\n\nUPP: Uplift Power Play\n\nA tool for parsing, dumping and modifying data in Radeon PowerPlay tables\n\n### Introduct"
},
{
"path": "setup.py",
"chars": 1102,
"preview": "import setuptools\n\nwith open('README.md', 'r') as fh:\n long_description = fh.read()\n\nsetuptools.setup(\n name='upp'"
},
{
"path": "src/upp/__init__.py",
"chars": 0,
"preview": ""
},
{
"path": "src/upp/atom_gen/README.md",
"chars": 5566,
"preview": "\n# How to generate Python readable ATOM C structures from Linux kernel code\n\n## Versions\n\nGenerated against kernel commi"
},
{
"path": "src/upp/atom_gen/__init__.py",
"chars": 0,
"preview": ""
},
{
"path": "src/upp/atom_gen/atombios.py",
"chars": 8591,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/includ"
},
{
"path": "src/upp/atom_gen/pptable_v1_0.py",
"chars": 30246,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['', '--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/includ"
},
{
"path": "src/upp/atom_gen/smu_v11_0_7_navi20.py",
"chars": 31356,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/at"
},
{
"path": "src/upp/atom_gen/smu_v11_0_arcturus.py",
"chars": 24267,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/at"
},
{
"path": "src/upp/atom_gen/smu_v11_0_navi10.py",
"chars": 25351,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/at"
},
{
"path": "src/upp/atom_gen/smu_v13_0_7_navi30.py",
"chars": 39439,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/at"
},
{
"path": "src/upp/atom_gen/smu_v14_0_2_navi40.py",
"chars": 42348,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/at"
},
{
"path": "src/upp/atom_gen/vega10_pptable.py",
"chars": 30169,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/at"
},
{
"path": "src/upp/atom_gen/vega20_pptable.py",
"chars": 22587,
"preview": "# -*- coding: utf-8 -*-\n#\n# TARGET arch is: ['--include', 'stdint.h', '--include', 'linux/drivers/gpu/drm/amd/include/at"
},
{
"path": "src/upp/decode.py",
"chars": 40458,
"preview": "import codecs\nimport struct\nimport ctypes\n\nfrom upp.atom_gen import atombios\nfrom collections import OrderedDict\nfrom im"
},
{
"path": "src/upp/upp.py",
"chars": 17905,
"preview": "# To run without installing, relative imports must match the module imports,\n# which is satisfied when in 'src' director"
},
{
"path": "test/AMD.RX480.8192.160603.rom.dump",
"chars": 8888,
"preview": "sHeader:\n StructureSize: 820\n TableFormatRevision: 7\n TableContentRevision: 1\nTableRevision: 0\nTableSize: 77\nGoldenPP"
},
{
"path": "test/AMD.RX480.8192.160603.rom.rawdump",
"chars": 30539,
"preview": "PowerPlay table rev 7.1 size 820 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n---"
},
{
"path": "test/AMD.RX5700XT.8192.190616.rom.check",
"chars": 91,
"preview": "110\n110\n100\n2800\n3900\n2800\n3800\n-0.03\n0\n0\n1650\n4400\n2600\n4600\n3200\n4800\n3200\n5000\n3200\n750\n"
},
{
"path": "test/AMD.RX5700XT.8192.190616.rom.conf",
"chars": 678,
"preview": "smc_pptable/SocketPowerLimitAc/0=110\nsmc_pptable/SocketPowerLimitDc/0=110\nsmc_pptable/FanStartTemp=100\nsmc_pptable/MinVo"
},
{
"path": "test/AMD.RX5700XT.8192.190616.rom.dump",
"chars": 17367,
"preview": "header:\n structuresize: 1674\n format_revision: 12\n content_revision: 0\ntable_revision: 1\ntable_size: 482\ngolden_pp_id"
},
{
"path": "test/AMD.RX5700XT.8192.190616.rom.rawdump",
"chars": 51669,
"preview": "PowerPlay table rev 12.0 size 1674 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n-"
},
{
"path": "test/AMD.RX6900XT.16384.201104.rom.dump",
"chars": 25867,
"preview": "header:\n structuresize: 2470\n format_revision: 15\n content_revision: 0\ntable_revision: 2\ntable_size: 802\ngolden_pp_id"
},
{
"path": "test/AMD.RX6900XT.16384.201104.rom.rawdump",
"chars": 76184,
"preview": "PowerPlay table rev 15.0 size 2470 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n-"
},
{
"path": "test/AMD.RX7900XTX.24576.230323.rom.dump",
"chars": 47259,
"preview": "header:\n structuresize: 5424\n format_revision: 20\n content_revision: 0\ntable_revision: 3\npadding: 0\ntable_size: 832\ng"
},
{
"path": "test/AMD.RX7900XTX.24576.230323.rom.rawdump",
"chars": 127579,
"preview": "PowerPlay table rev 20.0 size 5424 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n-"
},
{
"path": "test/AMD.RXVega64.8176.170719.rom.dump",
"chars": 7718,
"preview": "sHeader:\n structuresize: 694\n format_revision: 8\n content_revision: 1\nTableRevision: 0\nTableSize: 92\nGoldenPPID: 1761"
},
{
"path": "test/AMD.RXVega64.8176.170719.rom.rawdump",
"chars": 25072,
"preview": "PowerPlay table rev 8.1 size 694 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n---"
},
{
"path": "test/AMD.RXVegaFrontier.16384.170628.rom.dump",
"chars": 6722,
"preview": "sHeader:\n structuresize: 642\n format_revision: 8\n content_revision: 1\nTableRevision: 0\nTableSize: 92\nGoldenPPID: 1810"
},
{
"path": "test/AMD.RXVegaFrontier.16384.170628.rom.rawdump",
"chars": 22180,
"preview": "PowerPlay table rev 8.1 size 642 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n---"
},
{
"path": "test/AMD.RadeonVII.16384.190116.rom.dump",
"chars": 16605,
"preview": "sHeader:\n structuresize: 1730\n format_revision: 11\n content_revision: 0\nTableRevision: 2\nTableSize: 1730\nGoldenPPID: "
},
{
"path": "test/AMD.RadeonVII.16384.190116.rom.rawdump",
"chars": 48006,
"preview": "PowerPlay table rev 11.0 size 1730 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n-"
},
{
"path": "test/MI100_000.000.000.000.016113_113-D3431401-100.rom.dump",
"chars": 13697,
"preview": "header:\n structuresize: 1494\n format_revision: 13\n content_revision: 0\ntable_revision: 1\ntable_size: 482\ngolden_pp_id"
},
{
"path": "test/MI100_000.000.000.000.016113_113-D3431401-100.rom.rawdump",
"chars": 45148,
"preview": "PowerPlay table rev 13.0 size 1494 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n-"
},
{
"path": "test/Powercolor.RX9070.16384.241204_1.rom.dump",
"chars": 58818,
"preview": "header:\n structuresize: 5812\n format_revision: 23\n content_revision: 0\ntable_revision: 5\npptable_source: 0\npmfw_pptab"
},
{
"path": "test/Powercolor.RX9070.16384.241204_1.rom.rawdump",
"chars": 164878,
"preview": "PowerPlay table rev 23.0 size 5812 bytes\n Offset (dec.) t Raw val. Variable name Decoded value\n-"
},
{
"path": "test/test.sh",
"chars": 6742,
"preview": "#!/bin/bash\n\nTPU_VBIOS_URL=https://www.techpowerup.com/vgabios\n# RX 480 8 GB\nROM_RX480=184327/AMD.RX480.8192.160603.rom\n"
},
{
"path": "upliftpowerplay@.service",
"chars": 496,
"preview": "[Unit]\nDescription=Uplift Power Play\nBefore=amdgpu-clocks.service\nWants=modprobe@amdgpu.service\n\n[Service]\nType=oneshot\n"
}
]
// ... and 1 more files (download for full content)
About this extraction
This page contains the full source code of the sibradzic/upp GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 41 files (1.1 MB), approximately 384.5k tokens, and a symbol index with 259 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.
Extracted by GitExtract — free GitHub repo to text converter for AI. Built by Nikandr Surkov.